├── .gitignore ├── CODE ├── CAN1.c ├── CAN1.h ├── Cpu.c ├── Cpu.h ├── DiagnosticDemo.c ├── DiagnosticDemo.prm ├── Events.c ├── Events.h ├── IO_Map.c ├── IO_Map.h ├── PE_Const.h ├── PE_Error.h ├── PE_Types.h ├── RTI1.c ├── RTI1.h ├── TJA1043_Can_Sel.c ├── TJA1043_Can_Sel.h ├── TJA1043_EN.c ├── TJA1043_EN.h └── Vectors.c ├── C_Layout.hwl ├── DOC ├── DiagnosticDemo.txt ├── DiagnosticDemo_SIGNALS.txt ├── DiagnosticDemo_Settings.previous.xml └── DiagnosticDemo_Settings.xml ├── Default.mem ├── DiagnosticDemo.G_C ├── DiagnosticDemo.dsk ├── DiagnosticDemo.mcp ├── DiagnosticDemo.pe ├── DiagnosticDemo_Data ├── CWSettingsWindows.stg └── Standard │ └── TargetDataWindows.tdt ├── LICENSE ├── P&E_Multilink_USB.ini ├── README.md ├── SI ├── DiagnosticDemo.IAB ├── DiagnosticDemo.IAD ├── DiagnosticDemo.IMB ├── DiagnosticDemo.IMD ├── DiagnosticDemo.PFI ├── DiagnosticDemo.PO ├── DiagnosticDemo.PR ├── DiagnosticDemo.PRI ├── DiagnosticDemo.PS ├── DiagnosticDemo.SearchResults └── DiagnosticDemo.WK3 ├── Sources ├── Start12.c └── datapage.c ├── TBDML.ini ├── bin ├── Project.abs ├── Project.abs.phy ├── Project.abs.s19 └── Project.map ├── cmd ├── P&E_Multilink_USB_Erase_unsecure_hcs12p.cmd ├── P&E_Multilink_USB_Postload.cmd ├── P&E_Multilink_USB_Preload.cmd ├── P&E_Multilink_USB_Reset.cmd ├── P&E_Multilink_USB_Startup.cmd ├── P&E_Multilink_USB_Vppoff.cmd ├── P&E_Multilink_USB_Vppon.cmd ├── TBDML_Erase_unsecure_hcs12p.cmd ├── TBDML_Postload.cmd ├── TBDML_Preload.cmd ├── TBDML_Reset.cmd ├── TBDML_Startup.cmd ├── TBDML_Vppoff.cmd └── TBDML_Vppon.cmd ├── diagnostic ├── Diagnostic.c ├── DiagnosticTimer.c ├── DiagnosticTimer.h ├── EEPromDriver.c ├── EEPromDriver.h ├── J1939TP.c ├── J1939TP.h ├── LinkList.c ├── LinkList.h ├── NetworkLayer.c ├── NetworkLayer.h ├── NetworkLayerTypeDefines.h ├── diagnostic.h └── heap.c ├── helpfile.docx └── prm └── burner.bbl /.gitignore: -------------------------------------------------------------------------------- 1 | # Object files 2 | *.o 3 | *.ko 4 | *.obj 5 | *.elf 6 | 7 | # Precompiled Headers 8 | *.gch 9 | *.pch 10 | 11 | # Libraries 12 | *.lib 13 | *.a 14 | *.la 15 | *.lo 16 | 17 | # Shared objects (inc. Windows DLLs) 18 | *.dll 19 | *.so 20 | *.so.* 21 | *.dylib 22 | 23 | # Executables 24 | *.exe 25 | *.out 26 | *.app 27 | *.i*86 28 | *.x86_64 29 | *.hex 30 | 31 | # Debug files 32 | *.dSYM/ 33 | *.su 34 | -------------------------------------------------------------------------------- /CODE/CAN1.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ukign/UDSDemo/a6c9713873e49af6dd21765209f2cd0de124066c/CODE/CAN1.c -------------------------------------------------------------------------------- /CODE/CAN1.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ukign/UDSDemo/a6c9713873e49af6dd21765209f2cd0de124066c/CODE/CAN1.h -------------------------------------------------------------------------------- /CODE/Cpu.c: -------------------------------------------------------------------------------- 1 | /** ################################################################### 2 | ** THIS COMPONENT MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT. 3 | ** Filename : Cpu.c 4 | ** Project : DiagnosticDemo 5 | ** Processor : MC9S12G128VLH 6 | ** Component : MC9S12G128_64 7 | ** Version : Component 01.016, Driver 02.06, CPU db: 3.00.017 8 | ** Datasheet : MC9S12GRMV1 Rev. 1.02 June 7, 2011 9 | ** Compiler : CodeWarrior HC12 C Compiler 10 | ** Date/Time : 2016/10/13, 13:48 11 | ** Abstract : 12 | ** This component "MC9S12G128_64" implements properties, methods, 13 | ** and events of the CPU. 14 | ** Settings : 15 | ** 16 | ** Contents : 17 | ** EnableInt - void Cpu_EnableInt(void); 18 | ** DisableInt - void Cpu_DisableInt(void); 19 | ** SetWaitMode - void Cpu_SetWaitMode(void); 20 | ** SetStopMode - void Cpu_SetStopMode(void); 21 | ** 22 | ** Copyright : 1997 - 2011 Freescale Semiconductor, Inc. All Rights Reserved. 23 | ** 24 | ** http : www.freescale.com 25 | ** mail : support@freescale.com 26 | ** ###################################################################*/ 27 | 28 | /* MODULE Cpu. */ 29 | 30 | #include "CAN1.h" 31 | #include "TJA1043_Can_Sel.h" 32 | #include "TJA1043_EN.h" 33 | #include "RTI1.h" 34 | #include "Events.h" 35 | #include "Cpu.h" 36 | 37 | #define CGM_DELAY 0x07FFU 38 | 39 | #pragma DATA_SEG DEFAULT /* Select data segment "DEFAULT" */ 40 | #pragma CODE_SEG DEFAULT 41 | 42 | 43 | /* Global variables */ 44 | volatile byte CCR_reg; /* Current CCR reegister */ 45 | #pragma CODE_SEG __NEAR_SEG NON_BANKED 46 | 47 | 48 | /* 49 | ** =================================================================== 50 | ** Method : Cpu_Cpu_Interrupt (component MC9S12G128_64) 51 | ** 52 | ** Description : 53 | ** The method services unhandled interrupt vectors. 54 | ** This method is internal. It is used by Processor Expert only. 55 | ** =================================================================== 56 | */ 57 | ISR(Cpu_Interrupt) 58 | { 59 | /*lint -save -e950 Disable MISRA rule (1.1) checking. */ 60 | asm(BGND); 61 | /*lint -restore Enable MISRA rule (1.1) checking. */ 62 | } 63 | 64 | 65 | #pragma CODE_SEG DEFAULT 66 | 67 | /* 68 | ** =================================================================== 69 | ** Method : Cpu_DisableInt (component MC9S12G128_64) 70 | ** 71 | ** Description : 72 | ** Disable maskable interrupts 73 | ** Parameters : None 74 | ** Returns : Nothing 75 | ** =================================================================== 76 | */ 77 | /* 78 | void Cpu_DisableInt(void) 79 | 80 | ** This method is implemented as macro in the header module. ** 81 | */ 82 | 83 | /* 84 | ** =================================================================== 85 | ** Method : Cpu_EnableInt (component MC9S12G128_64) 86 | ** 87 | ** Description : 88 | ** Enable maskable interrupts 89 | ** Parameters : None 90 | ** Returns : Nothing 91 | ** =================================================================== 92 | */ 93 | /* 94 | void Cpu_EnableInt(void) 95 | 96 | ** This method is implemented as macro in the header module. ** 97 | */ 98 | 99 | /* 100 | ** =================================================================== 101 | ** Method : Cpu_SetStopMode (component MC9S12G128_64) 102 | ** 103 | ** Description : 104 | ** Set low power mode - Stop mode. 105 | ** For more information about the stop mode see 106 | ** documentation of this CPU. 107 | ** Parameters : None 108 | ** Returns : Nothing 109 | ** =================================================================== 110 | */ 111 | /* 112 | void Cpu_SetStopMode(void) 113 | 114 | ** This method is implemented as macro in the header module. ** 115 | */ 116 | 117 | /* 118 | ** =================================================================== 119 | ** Method : Cpu_SetWaitMode (component MC9S12G128_64) 120 | ** 121 | ** Description : 122 | ** Set low power mode - Wait mode. 123 | ** For more information about the wait mode see 124 | ** documentation of this CPU. 125 | ** Release from Wait mode: Reset or interrupt 126 | ** Parameters : None 127 | ** Returns : Nothing 128 | ** =================================================================== 129 | */ 130 | /* 131 | void Cpu_SetWaitMode(void) 132 | 133 | ** This method is implemented as macro in the header module. ** 134 | */ 135 | 136 | /* 137 | ** =================================================================== 138 | ** Method : _EntryPoint (component MC9S12G128_64) 139 | ** 140 | ** Description : 141 | ** Initializes the whole system like timing and so on. At the end 142 | ** of this function, the C startup is invoked to initialize stack, 143 | ** memory areas and so on. 144 | ** This method is internal. It is used by Processor Expert only. 145 | ** =================================================================== 146 | */ 147 | extern void _Startup(void); /* Forward declaration of external startup function declared in file Start12.c */ 148 | 149 | /*** !!! Here you can place your own code using property "User data declarations" on the build options tab of the CPU component. !!! ***/ 150 | 151 | 152 | #pragma CODE_SEG __NEAR_SEG NON_BANKED 153 | 154 | 155 | #pragma NO_FRAME /* Suppress generation of frame code */ 156 | #pragma NO_EXIT /* Suppress generation of exit from a function */ 157 | void _EntryPoint(void) 158 | { 159 | 160 | /*** !!! Here you can place your own code using property "User code before PE initialization" on the build options tab of the CPU compoennt. !!! ***/ 161 | 162 | /* ### MC9S12G128_64 "Cpu" init code ... */ 163 | /* PE initialization code after reset */ 164 | /* MMCCTL1: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,NVMRES=0 */ 165 | setReg8(MMCCTL1, 0x00U); 166 | /* PKGCR: APICLKS7=0,??=0,??=0,??=0,??=0,PKGCR2=1,PKGCR1=0,PKGCR0=0 */ 167 | setReg8(PKGCR, 0x04U); 168 | /* DIRECT: DP15=0,DP14=0,DP13=0,DP12=0,DP11=0,DP10=0,DP9=0,DP8=0 */ 169 | setReg8(DIRECT, 0x00U); 170 | /* IVBR: IVB_ADDR=0xFF */ 171 | setReg8(IVBR, 0xFFU); 172 | /* ECLKCTL: NECLK=1,NCLKX2=1,DIV16=0,EDIV4=0,EDIV3=0,EDIV2=0,EDIV1=0,EDIV0=0 */ 173 | setReg8(ECLKCTL, 0xC0U); 174 | /* System clock initialization */ 175 | /* CPMUPROT: ??=0,??=0,??=1,??=0,??=0,??=1,??=1,PROT=0 */ 176 | setReg8(CPMUPROT, 0x26U); /* Disable protection of clock configuration registers */ 177 | /* CPMUCLKS: PSTP=0 */ 178 | clrReg8Bits(CPMUCLKS, 0x40U); 179 | /* CPMUCLKS: PLLSEL=1 */ 180 | setReg8Bits(CPMUCLKS, 0x80U); /* Enable the PLL to allow write to divider registers */ 181 | /* CPMUREFDIV: REFFRQ1=1,REFFRQ0=0,??=0,??=0,REFDIV3=0,REFDIV2=0,REFDIV1=0,REFDIV0=0 */ 182 | setReg8(CPMUREFDIV, 0x80U); /* Set the divider register */ 183 | /* CPMUSYNR: VCOFRQ1=0,VCOFRQ0=0,SYNDIV5=0,SYNDIV4=0,SYNDIV3=0,SYNDIV2=0,SYNDIV1=0,SYNDIV0=1 */ 184 | setReg8(CPMUSYNR, 0x01U); /* Set the multiplier register */ 185 | /* CPMUPOSTDIV: ??=0,??=0,??=0,POSTDIV4=0,POSTDIV3=0,POSTDIV2=0,POSTDIV1=0,POSTDIV0=0 */ 186 | setReg8(CPMUPOSTDIV, 0x00U); /* Set the post divider register */ 187 | /* CPMUOSC: OSCE=1,??=0,OSCPINS_EN=0,??=0,??=0,??=0,??=0,??=0 */ 188 | setReg8(CPMUOSC, 0x80U); /* Enable the oscillator */ 189 | /* CPMUPLL: ??=0,??=0,FM1=0,FM0=0,??=0,??=0,??=0,??=0 */ 190 | setReg8(CPMUPLL, 0x00U); /* Set the PLL frequency modulation */ 191 | while(CPMUFLG_UPOSC == 0U) { /* Wait until the oscillator is qualified by the PLL */ 192 | } 193 | /* CPMUPROT: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,PROT=0 */ 194 | setReg8(CPMUPROT, 0x00U); /* Enable protection of clock configuration registers */ 195 | /* CPMUCOP: RSBCK=1,WRTMASK=0 */ 196 | clrSetReg8Bits(CPMUCOP, 0x20U, 0x40U); 197 | /*** End of PE initialization code after reset ***/ 198 | 199 | /*** !!! Here you can place your own code using property "User code after PE initialization" on the build options tab of the CPU component. !!! ***/ 200 | 201 | /*lint -save -e950 Disable MISRA rule (1.1) checking. */ 202 | __asm("jmp _Startup"); /* Jump to C startup code */ 203 | /*lint -restore Enable MISRA rule (1.1) checking. */ 204 | } 205 | 206 | #pragma CODE_SEG DEFAULT 207 | /* 208 | ** =================================================================== 209 | ** Method : PE_low_level_init (component MC9S12G128_64) 210 | ** 211 | ** Description : 212 | ** Initializes components and provides common register 213 | ** initialization. The method is called automatically as a part 214 | ** of the application initialization code. 215 | ** This method is internal. It is used by Processor Expert only. 216 | ** =================================================================== 217 | */ 218 | void PE_low_level_init(void) 219 | { 220 | /* Common initialization of the CPU registers */ 221 | /* WOMM: WOMM1=0 */ 222 | clrReg8Bits(WOMM, 0x02U); 223 | /* PTS: PTS6=1 */ 224 | setReg8Bits(PTS, 0x40U); 225 | /* WOMS: WOMS6=0 */ 226 | clrReg8Bits(WOMS, 0x40U); 227 | /* DDRS: DDRS6=1 */ 228 | setReg8Bits(DDRS, 0x40U); 229 | /* PTT: PTT0=1 */ 230 | setReg8Bits(PTT, 0x01U); 231 | /* PERT: PERT0=0 */ 232 | clrReg8Bits(PERT, 0x01U); 233 | /* DDRT: DDRT0=1 */ 234 | setReg8Bits(DDRT, 0x01U); 235 | /* CPMUINT: LOCKIE=0,OSCIE=0 */ 236 | clrReg8Bits(CPMUINT, 0x12U); 237 | /* CPMULVCTL: LVIE=0 */ 238 | clrReg8Bits(CPMULVCTL, 0x02U); 239 | /* IRQCR: IRQEN=0 */ 240 | clrReg8Bits(IRQCR, 0x40U); 241 | /* ### MC9S12G128_64 "Cpu" init code ... */ 242 | /* ### Init_MSCAN "CAN1" init code ... */ 243 | CAN1_Init(); 244 | /* ### BitIO "TJA1043_Can_Sel" init code ... */ 245 | /* ### BitIO "TJA1043_EN" init code ... */ 246 | /* ### Init_RTI "RTI1" init code ... */ 247 | RTI1_Init(); 248 | __EI(); /* Enable interrupts */ 249 | } 250 | 251 | /*lint -save -e950 Disable MISRA rule (1.1) checking. */ 252 | /* Initialization of the CPU registers in FLASH */ 253 | /*lint -restore Enable MISRA rule (1.1) checking. */ 254 | 255 | /* END Cpu. */ 256 | 257 | /* 258 | ** ################################################################### 259 | ** 260 | ** This file was created by Processor Expert 3.05 [04.46] 261 | ** for the Freescale HCS12 series of microcontrollers. 262 | ** 263 | ** ################################################################### 264 | */ 265 | -------------------------------------------------------------------------------- /CODE/Cpu.h: -------------------------------------------------------------------------------- 1 | /** ################################################################### 2 | ** THIS COMPONENT MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT. 3 | ** Filename : Cpu.h 4 | ** Project : DiagnosticDemo 5 | ** Processor : MC9S12G128VLH 6 | ** Component : MC9S12G128_64 7 | ** Version : Component 01.016, Driver 02.06, CPU db: 3.00.017 8 | ** Datasheet : MC9S12GRMV1 Rev. 1.02 June 7, 2011 9 | ** Compiler : CodeWarrior HC12 C Compiler 10 | ** Date/Time : 2016/10/13, 13:48 11 | ** Abstract : 12 | ** This component "MC9S12G128_64" implements properties, methods, 13 | ** and events of the CPU. 14 | ** Settings : 15 | ** 16 | ** Contents : 17 | ** EnableInt - void Cpu_EnableInt(void); 18 | ** DisableInt - void Cpu_DisableInt(void); 19 | ** SetWaitMode - void Cpu_SetWaitMode(void); 20 | ** SetStopMode - void Cpu_SetStopMode(void); 21 | ** 22 | ** Copyright : 1997 - 2011 Freescale Semiconductor, Inc. All Rights Reserved. 23 | ** 24 | ** http : www.freescale.com 25 | ** mail : support@freescale.com 26 | ** ###################################################################*/ 27 | 28 | #ifndef __Cpu 29 | #define __Cpu 30 | 31 | /* Active configuration define symbol */ 32 | #define PEcfg_G128VLH 1U 33 | 34 | /*Include shared modules, which are used for whole project*/ 35 | #include "PE_Types.h" 36 | #include "PE_Error.h" 37 | #include "PE_Const.h" 38 | #include "IO_Map.h" 39 | 40 | /* MODULE Cpu. */ 41 | 42 | 43 | #pragma DATA_SEG DEFAULT /* Select data segment "DEFAULT" */ 44 | 45 | #define CPU_BUS_CLK_HZ 0x00F42400UL /* Initial value of the bus clock frequency in Hz */ 46 | 47 | #define CPU_INSTR_CLK_HZ 0x00F42400UL /* Initial value of the instruction clock frequency in Hz */ 48 | 49 | #define CPU_EXT_CLK_HZ 0x007A1200UL /* Value of the main clock frequency (crystal or external clock) in Hz */ 50 | #define CPU_INT_CLK_HZ 0x000F4240UL /* Value of the internal oscillator clock frequency in Hz */ 51 | 52 | #define CPU_TICK_NS 0x7DU /* CPU tick is a unit derived from the frequency of external clock source. If no external clock is enabled or available it is derived from the value of internal clock source. The value of this constant represents period of the clock source in ns. */ 53 | 54 | #define CPU_CORE_HCS12 /* Specification of the core type of the selected cpu */ 55 | #define CPU_DERIVATIVE_MC9S12G128 /* Name of the selected cpu derivative */ 56 | #define CPU_PARTNUM_MC9S12G128VLH /* Part number of the selected cpu */ 57 | 58 | /* Global variables */ 59 | 60 | extern volatile byte CCR_reg; /* Current CCR reegister */ 61 | /* Entry point routine(s) prototypes */ 62 | 63 | #pragma CODE_SEG __NEAR_SEG NON_BANKED 64 | void _EntryPoint(void); 65 | /* 66 | ** =================================================================== 67 | ** Method : _EntryPoint (component MC9S12G128_64) 68 | ** 69 | ** Description : 70 | ** Initializes the whole system like timing and so on. At the end 71 | ** of this function, the C startup is invoked to initialize stack, 72 | ** memory areas and so on. 73 | ** This method is internal. It is used by Processor Expert only. 74 | ** =================================================================== 75 | */ 76 | 77 | /* Interrupt routine(s) prototypes */ 78 | 79 | /* Forward declaration of the default interrupt routine(s) */ 80 | __interrupt void Cpu_Interrupt(void); 81 | 82 | #pragma CODE_SEG DEFAULT 83 | 84 | #define Cpu_SetStopMode() \ 85 | /*lint -save -e950 Disable MISRA rule (1.1) checking. */\ 86 | {__asm("ANDCC #0x7F"); __asm("STOP"); } \ 87 | /*lint -restore Enable MISRA rule (1.1) checking. */ 88 | /* 89 | ** =================================================================== 90 | ** Method : Cpu_SetStopMode (component MC9S12G128_64) 91 | ** 92 | ** Description : 93 | ** Set low power mode - Stop mode. 94 | ** For more information about the stop mode see 95 | ** documentation of this CPU. 96 | ** Parameters : None 97 | ** Returns : Nothing 98 | ** =================================================================== 99 | */ 100 | 101 | #define Cpu_SetWaitMode() \ 102 | /*lint -save -e950 Disable MISRA rule (1.1) checking. */\ 103 | __asm("WAI") \ 104 | /*lint -restore Enable MISRA rule (1.1) checking. */ 105 | /* 106 | ** =================================================================== 107 | ** Method : Cpu_SetWaitMode (component MC9S12G128_64) 108 | ** 109 | ** Description : 110 | ** Set low power mode - Wait mode. 111 | ** For more information about the wait mode see 112 | ** documentation of this CPU. 113 | ** Release from Wait mode: Reset or interrupt 114 | ** Parameters : None 115 | ** Returns : Nothing 116 | ** =================================================================== 117 | */ 118 | 119 | #define Cpu_DisableInt() __DI() /* Disable interrupts */ 120 | /* 121 | ** =================================================================== 122 | ** Method : Cpu_DisableInt (component MC9S12G128_64) 123 | ** 124 | ** Description : 125 | ** Disable maskable interrupts 126 | ** Parameters : None 127 | ** Returns : Nothing 128 | ** =================================================================== 129 | */ 130 | 131 | #define Cpu_EnableInt() __EI() /* Enable interrupts */ 132 | /* 133 | ** =================================================================== 134 | ** Method : Cpu_EnableInt (component MC9S12G128_64) 135 | ** 136 | ** Description : 137 | ** Enable maskable interrupts 138 | ** Parameters : None 139 | ** Returns : Nothing 140 | ** =================================================================== 141 | */ 142 | 143 | void PE_low_level_init(void); 144 | /* 145 | ** =================================================================== 146 | ** Method : PE_low_level_init (component MC9S12G128_64) 147 | ** 148 | ** Description : 149 | ** Initializes components and provides common register 150 | ** initialization. The method is called automatically as a part 151 | ** of the application initialization code. 152 | ** This method is internal. It is used by Processor Expert only. 153 | ** =================================================================== 154 | */ 155 | 156 | /* END Cpu. */ 157 | 158 | #endif /* ifndef __Cpu */ 159 | /* 160 | ** ################################################################### 161 | ** 162 | ** This file was created by Processor Expert 3.05 [04.46] 163 | ** for the Freescale HCS12 series of microcontrollers. 164 | ** 165 | ** ################################################################### 166 | */ 167 | -------------------------------------------------------------------------------- /CODE/DiagnosticDemo.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ukign/UDSDemo/a6c9713873e49af6dd21765209f2cd0de124066c/CODE/DiagnosticDemo.c -------------------------------------------------------------------------------- /CODE/DiagnosticDemo.prm: -------------------------------------------------------------------------------- 1 | /* 2 | ** ################################################################### 3 | ** THIS COMPONENT MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT. 4 | ** Filename : DiagnosticDemo.PRM 5 | ** Project : DiagnosticDemo 6 | ** Processor : MC9S12G128VLH 7 | ** Compiler : CodeWarrior HC12 C Compiler 8 | ** Date/Time : 2016/10/13, 13:48 9 | ** Abstract : 10 | ** This file is used by the linker. It describes files to be linked, 11 | ** memory ranges, stack size, etc. For detailed description of the PRM file 12 | ** see CodeWarrior documentation. This file is generated by default. 13 | ** You can switch off generation by setting the property 14 | ** "Generate PRM file = no" on the "Build options" tab in CPU component and then modify 15 | ** this file if needed. 16 | ** 17 | ** Copyright : 1997 - 2011 Freescale Semiconductor, Inc. All Rights Reserved. 18 | ** 19 | ** http : www.freescale.com 20 | ** mail : support@freescale.com 21 | ** ################################################################### 22 | */ 23 | 24 | NAMES 25 | 26 | END 27 | 28 | SEGMENTS /* Here all RAM/ROM areas of the device are listed. Used in PLACEMENT below. */ 29 | RAM = READ_WRITE 0x2000 TO 0x3FFF; 30 | ROM_C000 = READ_ONLY 0xC000 TO 0xFEFF; 31 | PAGE_08 = READ_ONLY 0x088000 TO 0x08BFFF; 32 | PAGE_09 = READ_ONLY 0x098000 TO 0x09BFFF; 33 | PAGE_0A = READ_ONLY 0x0A8000 TO 0x0ABFFF; 34 | PAGE_0B = READ_ONLY 0x0B8000 TO 0x0BBFFF; 35 | PAGE_0C = READ_ONLY 0x0C8000 TO 0x0C93FF; 36 | PAGE_0C_A000 = READ_ONLY 0x0CA000 TO 0x0CBFFF; 37 | PAGE_0E = READ_ONLY 0x0E8000 TO 0x0EBFFF; 38 | END 39 | 40 | PLACEMENT /* here all predefined and user segments are placed into the SEGMENTS defined above. */ 41 | _PRESTART, /* Used in HIWARE format: jump to _Startup at the code start */ 42 | STARTUP, /* startup data structures */ 43 | ROM_VAR, /* constant variables */ 44 | STRINGS, /* string literals */ 45 | NON_BANKED, /* runtime routines which must not be banked */ 46 | COPY INTO ROM_C000; 47 | 48 | DEFAULT_ROM INTO PAGE_0E, PAGE_0C_A000, PAGE_0C, PAGE_0B, PAGE_0A, PAGE_09, PAGE_08; 49 | 50 | DEFAULT_RAM /* all variables, the default RAM location */ 51 | INTO RAM; 52 | END 53 | 54 | INIT _EntryPoint /* The entry point of the application. This function is generated into the CPU module. */ 55 | 56 | STACKSIZE 0x0100 /* Size of the system stack. Value can be changed on the "Build options" tab */ 57 | -------------------------------------------------------------------------------- /CODE/Events.c: -------------------------------------------------------------------------------- 1 | /** ################################################################### 2 | ** Filename : Events.c 3 | ** Project : DiagnosticDemo 4 | ** Processor : MC9S12G128VLH 5 | ** Component : Events 6 | ** Version : Driver 01.04 7 | ** Compiler : CodeWarrior HC12 C Compiler 8 | ** Date/Time : 2016/9/1, 9:16 9 | ** Abstract : 10 | ** This is user's event module. 11 | ** Put your event handler code here. 12 | ** Settings : 13 | ** Contents : 14 | ** No public methods 15 | ** 16 | ** ###################################################################*/ 17 | /* MODULE Events */ 18 | 19 | 20 | #include "Cpu.h" 21 | #include "Events.h" 22 | 23 | /* User includes (#include below this line is not maintained by Processor Expert) */ 24 | 25 | #pragma CODE_SEG DEFAULT 26 | 27 | /* END Events */ 28 | 29 | /* 30 | ** ################################################################### 31 | ** 32 | ** This file was created by Processor Expert 3.02 [04.44] 33 | ** for the Freescale HCS12 series of microcontrollers. 34 | ** 35 | ** ################################################################### 36 | */ 37 | -------------------------------------------------------------------------------- /CODE/Events.h: -------------------------------------------------------------------------------- 1 | /** ################################################################### 2 | ** Filename : Events.h 3 | ** Project : DiagnosticDemo 4 | ** Processor : MC9S12G128VLH 5 | ** Component : Events 6 | ** Version : Driver 01.04 7 | ** Compiler : CodeWarrior HC12 C Compiler 8 | ** Date/Time : 2016/9/1, 9:16 9 | ** Abstract : 10 | ** This is user's event module. 11 | ** Put your event handler code here. 12 | ** Settings : 13 | ** Contents : 14 | ** No public methods 15 | ** 16 | ** ###################################################################*/ 17 | 18 | #ifndef __Events_H 19 | #define __Events_H 20 | /* MODULE Events */ 21 | 22 | #include "PE_Types.h" 23 | #include "PE_Error.h" 24 | #include "PE_Const.h" 25 | #include "IO_Map.h" 26 | #include "CAN1.h" 27 | #include "TJA1043_Can_Sel.h" 28 | #include "TJA1043_EN.h" 29 | #include "RTI1.h" 30 | 31 | #pragma CODE_SEG DEFAULT 32 | 33 | 34 | /* END Events */ 35 | #endif /* __Events_H*/ 36 | 37 | /* 38 | ** ################################################################### 39 | ** 40 | ** This file was created by Processor Expert 3.02 [04.44] 41 | ** for the Freescale HCS12 series of microcontrollers. 42 | ** 43 | ** ################################################################### 44 | */ 45 | -------------------------------------------------------------------------------- /CODE/PE_Const.h: -------------------------------------------------------------------------------- 1 | /** ################################################################### 2 | ** THIS COMPONENT MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT. 3 | ** Filename : PE_Const.h 4 | ** Project : DiagnosticDemo 5 | ** Processor : MC9S12G128VLH 6 | ** Component : PE_Const 7 | ** Version : Driver 01.01 8 | ** Compiler : CodeWarrior HC12 C Compiler 9 | ** Date/Time : 2016/10/13, 13:48 10 | ** Abstract : 11 | ** This component "PE_Const" contains internal definitions 12 | ** of the constants. 13 | ** Settings : 14 | ** Contents : 15 | ** No public methods 16 | ** 17 | ** Copyright : 1997 - 2011 Freescale Semiconductor, Inc. All Rights Reserved. 18 | ** 19 | ** http : www.freescale.com 20 | ** mail : support@freescale.com 21 | ** ###################################################################*/ 22 | 23 | #ifndef __PE_Const_H 24 | #define __PE_Const_H 25 | 26 | /* Constants for detecting running mode */ 27 | #define HIGH_SPEED 0x00U /* High speed */ 28 | #define LOW_SPEED 0x01U /* Low speed */ 29 | #define SLOW_SPEED 0x02U /* Slow speed */ 30 | 31 | /* Reset cause constants */ 32 | #define RSTSRC_POR 0x01U /* Power-on reset */ 33 | #define RSTSRC_PIN 0x08U /* External reset bit */ 34 | #define RSTSRC_COP 0x04U /* COP reset */ 35 | #define RSTSRC_ILOP 0x02U /* Illegal opcode reset */ 36 | #define RSTSRC_ILAD 0x10U /* Illegal address reset */ 37 | #define RSTSRC_LVI 0x20U /* Low voltage inhibit reset */ 38 | 39 | #endif /* _PE_Const_H */ 40 | /* 41 | ** ################################################################### 42 | ** 43 | ** This file was created by Processor Expert 3.05 [04.46] 44 | ** for the Freescale HCS12 series of microcontrollers. 45 | ** 46 | ** ################################################################### 47 | */ 48 | -------------------------------------------------------------------------------- /CODE/PE_Error.h: -------------------------------------------------------------------------------- 1 | /** ################################################################### 2 | ** THIS COMPONENT MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT. 3 | ** Filename : PE_Error.h 4 | ** Project : DiagnosticDemo 5 | ** Processor : MC9S12G128VLH 6 | ** Component : PE_Error 7 | ** Version : Driver 01.01 8 | ** Compiler : CodeWarrior HC12 C Compiler 9 | ** Date/Time : 2016/10/13, 13:48 10 | ** Abstract : 11 | ** This component "PE_Error" contains internal definitions 12 | ** of the error constants. 13 | ** Contents : 14 | ** No public methods 15 | ** 16 | ** Copyright : 1997 - 2011 Freescale Semiconductor, Inc. All Rights Reserved. 17 | ** 18 | ** http : www.freescale.com 19 | ** mail : support@freescale.com 20 | ** ###################################################################*/ 21 | 22 | #ifndef __PE_Error_H 23 | #define __PE_Error_H 24 | 25 | #define ERR_OK 0U /* OK */ 26 | #define ERR_SPEED 1U /* This device does not work in the active speed mode. */ 27 | #define ERR_RANGE 2U /* Parameter out of range. */ 28 | #define ERR_VALUE 3U /* Parameter of incorrect value. */ 29 | #define ERR_OVERFLOW 4U /* Timer overflow. */ 30 | #define ERR_MATH 5U /* Overflow during evaluation. */ 31 | #define ERR_ENABLED 6U /* Device is enabled. */ 32 | #define ERR_DISABLED 7U /* Device is disabled. */ 33 | #define ERR_BUSY 8U /* Device is busy. */ 34 | #define ERR_NOTAVAIL 9U /* Requested value or method not available. */ 35 | #define ERR_RXEMPTY 10U /* No data in receiver. */ 36 | #define ERR_TXFULL 11U /* Transmitter is full. */ 37 | #define ERR_BUSOFF 12U /* Bus not available. */ 38 | #define ERR_OVERRUN 13U /* Overrun error is detected. */ 39 | #define ERR_FRAMING 14U /* Framing error is detected. */ 40 | #define ERR_PARITY 15U /* Parity error is detected. */ 41 | #define ERR_NOISE 16U /* Noise error is detected. */ 42 | #define ERR_IDLE 17U /* Idle error is detected. */ 43 | #define ERR_FAULT 18U /* Fault error is detected. */ 44 | #define ERR_BREAK 19U /* Break char is received during communication. */ 45 | #define ERR_CRC 20U /* CRC error is detected. */ 46 | #define ERR_ARBITR 21U /* A node losts arbitration. This error occurs if two nodes start transmission at the same time. */ 47 | #define ERR_PROTECT 22U /* Protection error is detected. */ 48 | #define ERR_UNDERFLOW 23U /* Underflow error is detected. */ 49 | #define ERR_UNDERRUN 24U /* Underrun error is detected. */ 50 | #define ERR_COMMON 25U /* Common error of a device. */ 51 | #define ERR_LINSYNC 26U /* LIN synchronization error is detected. */ 52 | #define ERR_FAILED 27U /* Requested functionality or process failed. */ 53 | #define ERR_QFULL 28U /* Queue is full. */ 54 | 55 | #endif __PE_Error_H 56 | -------------------------------------------------------------------------------- /CODE/PE_Types.h: -------------------------------------------------------------------------------- 1 | /** ################################################################### 2 | ** THIS COMPONENT MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT. 3 | ** Filename : PE_Types.h 4 | ** Project : DiagnosticDemo 5 | ** Processor : MC9S12G128VLH 6 | ** Component : PE_Types 7 | ** Version : Driver 01.14 8 | ** Compiler : CodeWarrior HC12 C Compiler 9 | ** Date/Time : 2016/10/13, 13:48 10 | ** Abstract : 11 | ** PE_Types.h - contains definitions of basic types, 12 | ** register access macros and hardware specific macros 13 | ** which can be used in user application. 14 | ** Settings : 15 | ** Contents : 16 | ** No public methods 17 | ** 18 | ** Copyright : 1997 - 2011 Freescale Semiconductor, Inc. All Rights Reserved. 19 | ** 20 | ** http : www.freescale.com 21 | ** mail : support@freescale.com 22 | ** ###################################################################*/ 23 | 24 | #ifndef __PE_Types_H 25 | #define __PE_Types_H 26 | 27 | #ifdef __MISRA__ 28 | #ifndef FALSE 29 | #define FALSE 0u 30 | #endif 31 | #ifndef TRUE 32 | #define TRUE 1u 33 | #endif 34 | #else 35 | #ifndef FALSE 36 | #define FALSE 0 37 | #endif 38 | #ifndef TRUE 39 | #define TRUE 1 40 | #endif 41 | #endif 42 | 43 | /* Freescale types */ 44 | typedef unsigned char VUINT8; 45 | typedef signed char VINT8; 46 | typedef unsigned short int VUINT16; 47 | typedef signed short int VINT16; 48 | typedef unsigned long int VUINT32; 49 | 50 | /* Aditional standard ANSI C types */ 51 | #ifndef int8_t 52 | typedef signed char int8_t; 53 | #endif 54 | #ifndef int16_t 55 | typedef signed int int16_t; 56 | #endif 57 | #ifndef int32_t 58 | typedef signed long int int32_t; 59 | #endif 60 | 61 | #ifndef uint8_t 62 | typedef unsigned char uint8_t; 63 | #endif 64 | #ifndef uint16_t 65 | typedef unsigned int uint16_t; 66 | #endif 67 | #ifndef uint32_t 68 | typedef unsigned long int uint32_t; 69 | #endif 70 | #ifndef TPE_Float 71 | typedef float TPE_Float; 72 | #endif 73 | #ifndef char_t 74 | typedef char char_t; 75 | #endif 76 | 77 | /*Types definition*/ 78 | typedef unsigned char bool; 79 | typedef unsigned char byte; 80 | typedef unsigned int word; 81 | typedef unsigned long dword; 82 | typedef unsigned long dlong[2]; 83 | typedef void (*tIntFunc)(void); 84 | typedef uint8_t TPE_ErrCode; 85 | 86 | /*lint -save -esym(960,19.12) -esym(961,19.13) Disable MISRA rule (19.12,19.13) checking. */ 87 | /**************************************************/ 88 | /* PE register access macros */ 89 | /**************************************************/ 90 | #define setRegBit(reg, bit) (reg |= reg##_##bit##_##MASK) 91 | #define clrRegBit(reg, bit) (reg &= ~reg##_##bit##_##MASK) 92 | #define getRegBit(reg, bit) (reg & reg##_##bit##_##MASK) 93 | #define setReg(reg, val) (reg = (word)(val)) 94 | #define getReg(reg) (reg) 95 | #define setRegBits(reg, mask) (reg |= (word)(mask)) 96 | #define getRegBits(reg, mask) (reg & (word)(mask)) 97 | #define clrRegBits(reg, mask) (reg &= (word)(~(mask))) 98 | #define setRegBitGroup(reg, bits, val) (reg = (word)((reg & ~reg##_##bits##_##MASK) | ((val) << reg##_##bits##_##BITNUM))) 99 | #define getRegBitGroup(reg, bits) ((reg & reg##_##bits##_##MASK) >> reg##_##bits##_##BITNUM) 100 | #define setRegMask(reg, maskAnd, maskOr) (reg = (word)((getReg(reg) & ~(maskAnd)) | (maskOr))) 101 | #define setRegBitVal(reg, bit, val) ((val) == 0 ? (reg &= ~reg##_##bit##_##MASK) : (reg |= reg##_##bit##_##MASK)) 102 | #define changeRegBits(reg, mask) (reg ^= (mask)) 103 | #define changeRegBit(reg, bit) (reg ^= reg##_##bit##_##MASK) 104 | 105 | /******************************************************************/ 106 | /* Uniform multiplatform peripheral access macros - 16 bit access */ 107 | /******************************************************************/ 108 | #define setReg16Bit(RegName, BitName) (RegName |= RegName##_##BitName##_##MASK) 109 | #define clrReg16Bit(RegName, BitName) (RegName &= ~(word)RegName##_##BitName##_##MASK) 110 | #define invertReg16Bit(RegName, BitName) (RegName ^= RegName##_##BitName##_##MASK) 111 | #define testReg16Bit(RegName, BitName) (RegName & RegName##_##BitName##_##MASK) 112 | 113 | /* Whole peripheral register access macros */ 114 | #define setReg16(RegName, val) (RegName = (word)(val)) 115 | #define getReg16(RegName) (RegName) 116 | 117 | /* Bits peripheral register access macros */ 118 | #define testReg16Bits(RegName, GetMask) (RegName & (GetMask)) 119 | #define clrReg16Bits(RegName, ClrMask) (RegName &= (word)(~(word)(ClrMask))) 120 | #define setReg16Bits(RegName, SetMask) (RegName |= (word)(SetMask)) 121 | #define invertReg16Bits(RegName, InvMask) (RegName ^= (word)(InvMask)) 122 | #define clrSetReg16Bits(RegName, ClrMask, SetMask) (RegName = (RegName & (~(word)(ClrMask))) | (word)(SetMask)) 123 | #define seqClrSetReg16Bits(RegName, BitsMask, BitsVal) ((RegName &= ~(~(word)(BitsVal) & (word)(BitsMask))),\ 124 | (RegName |= (word)(BitsVal) & (word)(BitsMask)) ) 125 | #define seqSetClrReg16Bits(RegName, BitsMask, BitsVal) ((RegName |= (word)(BitsVal) & (word)(BitsMask)),\ 126 | (RegName &= ~(~(word)(BitsVal) & (word)(BitsMask))) ) 127 | #define seqResetSetReg16Bits(RegName, BitsMask, BitsVal) ((RegName &= ~(word)(BitsMask)),\ 128 | (RegName |= (word)(BitsVal) & (word)(BitsMask)) ) 129 | #define clrReg16BitsByOne(RegName, ClrMask, BitsMask) (RegName &= (word)(ClrMask) & (word)(BitsMask)) 130 | 131 | /* Bit group peripheral register access macros */ 132 | #define testReg16BitGroup(RegName, GroupName) (RegName & RegName##_##GroupName##_##MASK) 133 | #define getReg16BitGroupVal(RegName, GroupName) ((RegName & RegName##_##GroupName##_##MASK) >> RegName##_##GroupName##_##BITNUM) 134 | #define setReg16BitGroupVal(RegName, GroupName, GroupVal) (RegName = (RegName & ~(word)RegName##_##GroupName##_##MASK) | (((word)(GroupVal)) << RegName##_##GroupName##_##BITNUM)) 135 | #define seqClrSetReg16BitGroupVal(RegName,GroupName,GroupVal) ((RegName &= ~(~(((word)(GroupVal)) << RegName##_##GroupName##_##BITNUM) & RegName##_##GroupName##_##MASK)),\ 136 | (RegName |= (((word)(GroupVal)) << RegName##_##GroupName##_##BITNUM) & RegName##_##GroupName##_##MASK) ) 137 | #define seqSetClrReg16BitGroupVal(RegName,GroupName,GroupVal) ((RegName |= (((word)(GroupVal)) << RegName##_##GroupName##_##BITNUM) & RegName##_##GroupName##_##MASK),\ 138 | (RegName &= ~(~(((word)(GroupVal)) << RegName##_##GroupName##_##BITNUM) & RegName##_##GroupName##_##MASK)) ) 139 | #define seqResetSetReg16BitGroupVal(RegName,GroupName,GroupVal) ((RegName &= ~(word)RegName##_##GroupName##_##MASK),\ 140 | (RegName |= (((word)(GroupVal)) << RegName##_##GroupName##_##BITNUM) & RegName##_##GroupName##_##MASK) ) 141 | 142 | /*****************************************************************/ 143 | /* Uniform multiplatform peripheral access macros - 8 bit access */ 144 | /*****************************************************************/ 145 | #define setReg8Bit(RegName, BitName) (RegName |= RegName##_##BitName##_##MASK) 146 | #define clrReg8Bit(RegName, BitName) (RegName &= (byte)~(byte)RegName##_##BitName##_##MASK) 147 | #define invertReg8Bit(RegName, BitName) (RegName ^= RegName##_##BitName##_##MASK) 148 | #define testReg8Bit(RegName, BitName) (RegName & RegName##_##BitName##_##MASK) 149 | 150 | /* Whole peripheral register access macros */ 151 | #define setReg8(RegName, val) (RegName = (byte)(val)) 152 | #define getReg8(RegName) (RegName) 153 | 154 | /* Bits peripheral register access macros */ 155 | #define testReg8Bits(RegName, GetMask) (RegName & (GetMask)) 156 | #define clrReg8Bits(RegName, ClrMask) (RegName &= (byte)(~(byte)(ClrMask))) 157 | #define setReg8Bits(RegName, SetMask) (RegName |= (byte)(SetMask)) 158 | #define invertReg8Bits(RegName, InvMask) (RegName ^= (byte)(InvMask)) 159 | #define clrSetReg8Bits(RegName, ClrMask, SetMask) (RegName = (RegName & ((byte)(~(byte)(ClrMask)))) | (byte)(SetMask)) 160 | #define seqClrSetReg8Bits(RegName, BitsMask, BitsVal) ((RegName &= (byte)~((byte)~((byte)(BitsVal)) & ((byte)(BitsMask)))),\ 161 | (RegName |= ((byte)(BitsVal)) & ((byte)(BitsMask))) ) 162 | #define seqSetClrReg8Bits(RegName, BitsMask, BitsVal) ((RegName |= (byte)(BitsVal) & (byte)(BitsMask)),\ 163 | (RegName &= (byte)~((byte)~((byte)(BitsVal)) & (byte)(BitsMask))) ) 164 | #define seqResetSetReg8Bits(RegName, BitsMask, BitsVal) ((RegName &= (byte)~((byte)(BitsMask))),\ 165 | (RegName |= (byte)(BitsVal) & (byte)(BitsMask)) ) 166 | #define clrReg8BitsByOne(RegName, ClrMask, BitsMask) (RegName &= (byte)(ClrMask) & (byte)(BitsMask)) 167 | 168 | /* Bit group peripheral register access macros */ 169 | #define testReg8BitGroup(RegName, GroupName) (RegName & RegName##_##GroupName##_##MASK) 170 | #define getReg8BitGroupVal(RegName, GroupName) ((RegName & RegName##_##GroupName##_##MASK) >> RegName##_##GroupName##_##BITNUM) 171 | #define setReg8BitGroupVal(RegName, GroupName, GroupVal) (RegName = (RegName & (byte)~(byte)RegName##_##GroupName##_##MASK) | (byte)(((byte)(GroupVal)) << RegName##_##GroupName##_##BITNUM)) 172 | #define seqClrSetReg8BitGroupVal(RegName,GroupName,GroupVal) ((RegName &= (byte)~((byte)~(byte)(((byte)(GroupVal)) << RegName##_##GroupName##_##BITNUM) & (byte)RegName##_##GroupName##_##MASK)),\ 173 | (RegName |= (byte)(((byte)(GroupVal)) << RegName##_##GroupName##_##BITNUM) & (byte)RegName##_##GroupName##_##MASK) ) 174 | #define seqSetClrReg8BitGroupVal(RegName,GroupName,GroupVal) ((RegName |= (byte)(((byte)(GroupVal)) << RegName##_##GroupName##_##BITNUM) & (byte)RegName##_##GroupName##_##MASK),\ 175 | (RegName &= (byte)~((byte)~(byte)(((byte)(GroupVal)) << RegName##_##GroupName##_##BITNUM) & (byte)RegName##_##GroupName##_##MASK)) ) 176 | #define seqResetSetReg8BitGroupVal(RegName,GroupName,GroupVal) ((RegName &= (byte)~(byte)RegName##_##GroupName##_##MASK),\ 177 | (RegName |= (byte)(((byte)(GroupVal)) << RegName##_##GroupName##_##BITNUM) & RegName##_##GroupName##_##MASK) ) 178 | /* register access macros */ 179 | 180 | #define in16(var,l,h) (var = ((word)(l)) | (((word)(h)) << 8)) 181 | #define out16(l,h,val) (l = (byte)val, h = (byte)(val >> 8)) 182 | 183 | #define output(P, V) (P = (V)) 184 | #define input(P) (P) 185 | /*lint -restore +esym(961,19.12) +esym(961,19.13) Enable MISRA rule (19.12,19.13) checking. */ 186 | 187 | #define __DI() \ 188 | /*lint -save -e950 Disable MISRA rule (1.1) checking. */\ 189 | { __asm(sei); } /* Disable global interrupts */ \ 190 | /*lint -restore Enable MISRA rule (1.1) checking. */ 191 | #define __EI() \ 192 | /*lint -save -e950 Disable MISRA rule (1.1) checking. */\ 193 | { __asm(cli); } /* Enable global interrupts */ \ 194 | /*lint -restore Enable MISRA rule (1.1) checking. */ 195 | #define EnterCritical() \ 196 | /*lint -save -e950 Disable MISRA rule (1.1) checking. */\ 197 | { __asm(pshc); __asm(sei); __asm(movb 1,SP+,CCR_reg); } /* This macro is used by Processor Expert. It saves CCR register and disable global interrupts. */ \ 198 | /*lint -restore Enable MISRA rule (1.1) checking. */ 199 | #define ExitCritical() \ 200 | /*lint -save -e950 Disable MISRA rule (1.1) checking. */\ 201 | { __asm(movb CCR_reg, 1,-SP); __asm(pulc); } /* This macro is used by Processor Expert. It restores CCR register saved in SaveStatusReg(). */ \ 202 | /*lint -restore Enable MISRA rule (1.1) checking. */ 203 | /* obsolete definition for backward compatibility */ 204 | #define SaveStatusReg() EnterCritical() 205 | #define RestoreStatusReg() ExitCritical() 206 | #define PE_DEBUGHALT() \ 207 | /*lint -save -e950 Disable MISRA rule (1.1) checking. */\ 208 | { asm(BGND); } /* This macro forces entering to background debug mode, if enabled, and execute a sw breakpoint */ \ 209 | /*lint -restore Enable MISRA rule (1.1) checking. */ 210 | #define ISR(x) __interrupt void x(void) 211 | 212 | typedef struct { /* Image */ 213 | word width; /* Image width in pixels */ 214 | word height; /* Image height in pixels */ 215 | const byte *pixmap; /* Image pixel bitmap */ 216 | word size; /* Image size in bytes */ 217 | const char_t *name; /* Image name */ 218 | } TIMAGE; 219 | typedef TIMAGE* PIMAGE ; /* Pointer to image */ 220 | 221 | /*lint -save -esym(960,18.4) Disable MISRA rule (18.4) checking. */ 222 | /* 16-bit register (big endian) */ 223 | typedef union { 224 | word w; 225 | struct { 226 | byte high,low; 227 | } b; 228 | } TWREG; 229 | /*lint -restore +esym(961,18.4) Enable MISRA rule (18.4) checking. */ 230 | 231 | #endif /* __PE_Types_H */ 232 | /* 233 | ** ################################################################### 234 | ** 235 | ** This file was created by Processor Expert 3.05 [04.46] 236 | ** for the Freescale HCS12 series of microcontrollers. 237 | ** 238 | ** ################################################################### 239 | */ 240 | -------------------------------------------------------------------------------- /CODE/RTI1.c: -------------------------------------------------------------------------------- 1 | /** ################################################################### 2 | ** THIS COMPONENT MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT. 3 | ** Filename : RTI1.c 4 | ** Project : DiagnosticDemo 5 | ** Processor : MC9S12G128VLH 6 | ** Component : Init_RTI 7 | ** Version : Component 01.097, Driver 02.02, CPU db: 3.00.017 8 | ** Compiler : CodeWarrior HC12 C Compiler 9 | ** Date/Time : 2016/10/13, 13:48 10 | ** Abstract : 11 | ** This file implements the RTI (RTIfree) 12 | ** module initialization according to the Peripheral Initialization 13 | ** Component settings, and defines interrupt service routines prototypes. 14 | ** The RTI can be used to generate a hardware interrupt 15 | ** at a fixed periodic rate. If enabled (by setting RTIE=1), 16 | ** this interrupt will occur at the rate selected by the RTICTL 17 | ** register.The RTI runs with a gated OSCCLK ).At the end of the 18 | ** RTI time-out period the RTIF flag is set to one and a new RTI 19 | ** time-out period starts immediately. 20 | ** Settings : 21 | ** Component name : RTI1 22 | ** Device : RTI 23 | ** Settings : 24 | ** Clock settings : 25 | ** Clock source : IRCCLK 26 | ** Prescaler : 10^3 27 | ** Modulus : 1 28 | ** Divider : Decimal 29 | ** Period : 1 ms 30 | ** RTI enable in Pseudo Stop Mode : no 31 | ** Interrupts : 32 | ** RTI Interrupt : 33 | ** RTI Interrupt : Enabled 34 | ** Interrupt : Vrti 35 | ** Priority : 1 36 | ** ISR name : RTI_Interrupt 37 | ** Initialization : 38 | ** Call Init method : yes 39 | ** Contents : 40 | ** Init - void RTI1_Init(void); 41 | ** 42 | ** Copyright : 1997 - 2011 Freescale Semiconductor, Inc. All Rights Reserved. 43 | ** 44 | ** http : www.freescale.com 45 | ** mail : support@freescale.com 46 | ** ###################################################################*/ 47 | 48 | /* MODULE RTI1. */ 49 | 50 | #include "RTI1.h" 51 | 52 | /* 53 | ** ################################################################### 54 | ** 55 | ** The interrupt service routine(s) must be implemented 56 | ** by user in one of the following user modules. 57 | ** 58 | ** If the "Generate ISR" option is enabled, Processor Expert generates 59 | ** ISR templates in the CPU event module. 60 | ** 61 | ** User modules: 62 | ** DiagnosticDemo.c 63 | ** Events.c 64 | ** 65 | ** ################################################################### 66 | #pragma CODE_SEG __NEAR_SEG NON_BANKED 67 | ISR(RTI_Interrupt) 68 | { 69 | // NOTE: The routine should include the following actions to obtain 70 | // correct functionality of the hardware. 71 | // 72 | // The ISR is invoked by RTIF flag. The RTIF flag is cleared 73 | // if a "1" is written to the flag in CPMUFLG register. 74 | // Example: CPMUFLG = 128; 75 | } 76 | #pragma CODE_SEG DEFAULT 77 | */ 78 | /* 79 | ** =================================================================== 80 | ** Method : RTI1_Init (component Init_RTI) 81 | ** 82 | ** Description : 83 | ** This method initializes registers of the RTI module 84 | ** according to this Peripheral Initialization settings. Call 85 | ** this method in user code to initialize the module. By 86 | ** default, the method is called by PE automatically; see "Call 87 | ** Init method" property of the component for more details. 88 | ** Parameters : None 89 | ** Returns : Nothing 90 | ** =================================================================== 91 | */ 92 | void RTI1_Init(void) 93 | { 94 | /* CPMUINT: RTIE=0 */ 95 | clrReg8Bits(CPMUINT, 0x80U); 96 | /* CPMUFLG: RTIF=1,PORF=0,LVRF=0,LOCKIF=0,LOCK=0,ILAF=0,OSCIF=0,UPOSC=0 */ 97 | setReg8(CPMUFLG, 0x80U); 98 | /* CPMUPROT: ??=0,??=0,??=1,??=0,??=0,??=1,??=1,PROT=0 */ 99 | setReg8(CPMUPROT, 0x26U); /* Disable protection of clock-source register */ 100 | /* CPMUCLKS: PRE=0,RTIOSCSEL=0 */ 101 | clrReg8Bits(CPMUCLKS, 0x0AU); 102 | /* CPMUPROT: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,PROT=0 */ 103 | setReg8(CPMUPROT, 0x00U); /* Re-Enable protection of clock-source register */ 104 | /* CPMUINT: RTIE=1 */ 105 | setReg8Bits(CPMUINT, 0x80U); 106 | /* CPMURTI: RTDEC=1,RTR6=0,RTR5=0,RTR4=0,RTR3=0,RTR2=0,RTR1=0,RTR0=0 */ 107 | setReg8(CPMURTI, 0x80U); 108 | } 109 | 110 | /* END RTI1. */ 111 | 112 | /* 113 | ** ################################################################### 114 | ** 115 | ** This file was created by Processor Expert 3.05 [04.46] 116 | ** for the Freescale HCS12 series of microcontrollers. 117 | ** 118 | ** ################################################################### 119 | */ 120 | -------------------------------------------------------------------------------- /CODE/RTI1.h: -------------------------------------------------------------------------------- 1 | /** ################################################################### 2 | ** THIS COMPONENT MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT. 3 | ** Filename : RTI1.h 4 | ** Project : DiagnosticDemo 5 | ** Processor : MC9S12G128VLH 6 | ** Component : Init_RTI 7 | ** Version : Component 01.097, Driver 02.02, CPU db: 3.00.017 8 | ** Compiler : CodeWarrior HC12 C Compiler 9 | ** Date/Time : 2016/10/13, 13:48 10 | ** Abstract : 11 | ** This file implements the RTI (RTIfree) 12 | ** module initialization according to the Peripheral Initialization 13 | ** Component settings, and defines interrupt service routines prototypes. 14 | ** The RTI can be used to generate a hardware interrupt 15 | ** at a fixed periodic rate. If enabled (by setting RTIE=1), 16 | ** this interrupt will occur at the rate selected by the RTICTL 17 | ** register.The RTI runs with a gated OSCCLK ).At the end of the 18 | ** RTI time-out period the RTIF flag is set to one and a new RTI 19 | ** time-out period starts immediately. 20 | ** Settings : 21 | ** Component name : RTI1 22 | ** Device : RTI 23 | ** Settings : 24 | ** Clock settings : 25 | ** Clock source : IRCCLK 26 | ** Prescaler : 10^3 27 | ** Modulus : 1 28 | ** Divider : Decimal 29 | ** Period : 1 ms 30 | ** RTI enable in Pseudo Stop Mode : no 31 | ** Interrupts : 32 | ** RTI Interrupt : 33 | ** RTI Interrupt : Enabled 34 | ** Interrupt : Vrti 35 | ** Priority : 1 36 | ** ISR name : RTI_Interrupt 37 | ** Initialization : 38 | ** Call Init method : yes 39 | ** Contents : 40 | ** Init - void RTI1_Init(void); 41 | ** 42 | ** Copyright : 1997 - 2011 Freescale Semiconductor, Inc. All Rights Reserved. 43 | ** 44 | ** http : www.freescale.com 45 | ** mail : support@freescale.com 46 | ** ###################################################################*/ 47 | 48 | #ifndef __RTI1 49 | #define __RTI1 50 | 51 | /* MODULE RTI1. */ 52 | 53 | /*Include shared modules, which are used for whole project*/ 54 | #include "PE_Types.h" 55 | #include "PE_Error.h" 56 | #include "PE_Const.h" 57 | #include "IO_Map.h" 58 | /* Include inherited components */ 59 | 60 | #include "Cpu.h" 61 | 62 | 63 | void RTI1_Init(void); 64 | /* 65 | ** =================================================================== 66 | ** Method : RTI1_Init (component Init_RTI) 67 | ** 68 | ** Description : 69 | ** This method initializes registers of the RTI module 70 | ** according to this Peripheral Initialization settings. Call 71 | ** this method in user code to initialize the module. By 72 | ** default, the method is called by PE automatically; see "Call 73 | ** Init method" property of the component for more details. 74 | ** Parameters : None 75 | ** Returns : Nothing 76 | ** =================================================================== 77 | */ 78 | 79 | 80 | /* 81 | ** =================================================================== 82 | ** The interrupt service routine must be implemented by user in one 83 | ** of the user modules (see RTI1.c file for more information). 84 | ** =================================================================== 85 | */ 86 | #pragma CODE_SEG __NEAR_SEG NON_BANKED 87 | __interrupt void RTI_Interrupt(void); 88 | #pragma CODE_SEG DEFAULT 89 | /* END RTI1. */ 90 | 91 | #endif /* ifndef __RTI1 */ 92 | /* 93 | ** ################################################################### 94 | ** 95 | ** This file was created by Processor Expert 3.05 [04.46] 96 | ** for the Freescale HCS12 series of microcontrollers. 97 | ** 98 | ** ################################################################### 99 | */ 100 | 101 | -------------------------------------------------------------------------------- /CODE/TJA1043_Can_Sel.c: -------------------------------------------------------------------------------- 1 | /** ################################################################### 2 | ** THIS COMPONENT MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT. 3 | ** Filename : TJA1043_Can_Sel.c 4 | ** Project : DiagnosticDemo 5 | ** Processor : MC9S12G128VLH 6 | ** Component : BitIO 7 | ** Version : Component 02.075, Driver 03.16, CPU db: 3.00.017 8 | ** Compiler : CodeWarrior HC12 C Compiler 9 | ** Date/Time : 2016/10/13, 13:48 10 | ** Abstract : 11 | ** This component "BitIO" implements an one-bit input/output. 12 | ** It uses one bit/pin of a port. 13 | ** Note: This component is set to work in Output direction only. 14 | ** Methods of this component are mostly implemented as a macros 15 | ** (if supported by target language and compiler). 16 | ** Settings : 17 | ** Used pin : 18 | ** ---------------------------------------------------- 19 | ** Number (on package) | Name 20 | ** ---------------------------------------------------- 21 | ** 58 | PS6_SCK0 22 | ** ---------------------------------------------------- 23 | ** 24 | ** Port name : S 25 | ** 26 | ** Bit number (in port) : 6 27 | ** Bit mask of the port : $0040 28 | ** 29 | ** Initial direction : Output (direction cannot be changed) 30 | ** Initial output value : 1 31 | ** Initial pull option : off 32 | ** 33 | ** Port data register : PTS [$0248] 34 | ** Port control register : DDRS [$024A] 35 | ** 36 | ** Optimization for : speed 37 | ** Contents : 38 | ** GetVal - bool TJA1043_Can_Sel_GetVal(void); 39 | ** PutVal - void TJA1043_Can_Sel_PutVal(bool Val); 40 | ** ClrVal - void TJA1043_Can_Sel_ClrVal(void); 41 | ** SetVal - void TJA1043_Can_Sel_SetVal(void); 42 | ** 43 | ** Copyright : 1997 - 2011 Freescale Semiconductor, Inc. All Rights Reserved. 44 | ** 45 | ** http : www.freescale.com 46 | ** mail : support@freescale.com 47 | ** ###################################################################*/ 48 | 49 | /* MODULE TJA1043_Can_Sel. */ 50 | 51 | #include "TJA1043_Can_Sel.h" 52 | /* Including shared modules, which are used in the whole project */ 53 | #include "PE_Types.h" 54 | #include "PE_Error.h" 55 | #include "PE_Const.h" 56 | #include "IO_Map.h" 57 | #include "Cpu.h" 58 | 59 | #pragma DATA_SEG TJA1043_Can_Sel_DATA /* Select data segment "TJA1043_Can_Sel_DATA" */ 60 | #pragma CODE_SEG TJA1043_Can_Sel_CODE 61 | #pragma CONST_SEG TJA1043_Can_Sel_CONST /* Constant section for this module */ 62 | /* 63 | ** =================================================================== 64 | ** Method : TJA1043_Can_Sel_GetVal (component BitIO) 65 | ** 66 | ** Description : 67 | ** This method returns an input value. 68 | ** a) direction = Input : reads the input value from the 69 | ** pin and returns it 70 | ** b) direction = Output : returns the last written value 71 | ** Note: This component is set to work in Output direction only. 72 | ** Parameters : None 73 | ** Returns : 74 | ** --- - Input value. Possible values: 75 | ** FALSE - logical "0" (Low level) 76 | ** TRUE - logical "1" (High level) 77 | 78 | ** =================================================================== 79 | */ 80 | /* 81 | bool TJA1043_Can_Sel_GetVal(void) 82 | 83 | ** This method is implemented as a macro. See TJA1043_Can_Sel.h file. ** 84 | */ 85 | 86 | /* 87 | ** =================================================================== 88 | ** Method : TJA1043_Can_Sel_PutVal (component BitIO) 89 | ** 90 | ** Description : 91 | ** This method writes the new output value. 92 | ** Parameters : 93 | ** NAME - DESCRIPTION 94 | ** Val - Output value. Possible values: 95 | ** FALSE - logical "0" (Low level) 96 | ** TRUE - logical "1" (High level) 97 | ** Returns : Nothing 98 | ** =================================================================== 99 | */ 100 | void TJA1043_Can_Sel_PutVal(bool Val) 101 | { 102 | if (Val) { 103 | setReg8Bits(PTS, 0x40U); /* PTS6=0x01U */ 104 | } else { /* !Val */ 105 | clrReg8Bits(PTS, 0x40U); /* PTS6=0x00U */ 106 | } /* !Val */ 107 | } 108 | 109 | /* 110 | ** =================================================================== 111 | ** Method : TJA1043_Can_Sel_ClrVal (component BitIO) 112 | ** 113 | ** Description : 114 | ** This method clears (sets to zero) the output value. 115 | ** Parameters : None 116 | ** Returns : Nothing 117 | ** =================================================================== 118 | */ 119 | /* 120 | void TJA1043_Can_Sel_ClrVal(void) 121 | 122 | ** This method is implemented as a macro. See TJA1043_Can_Sel.h file. ** 123 | */ 124 | 125 | /* 126 | ** =================================================================== 127 | ** Method : TJA1043_Can_Sel_SetVal (component BitIO) 128 | ** 129 | ** Description : 130 | ** This method sets (sets to one) the output value. 131 | ** Parameters : None 132 | ** Returns : Nothing 133 | ** =================================================================== 134 | */ 135 | /* 136 | void TJA1043_Can_Sel_SetVal(void) 137 | 138 | ** This method is implemented as a macro. See TJA1043_Can_Sel.h file. ** 139 | */ 140 | 141 | 142 | /* END TJA1043_Can_Sel. */ 143 | /* 144 | ** ################################################################### 145 | ** 146 | ** This file was created by Processor Expert 3.05 [04.46] 147 | ** for the Freescale HCS12 series of microcontrollers. 148 | ** 149 | ** ################################################################### 150 | */ 151 | -------------------------------------------------------------------------------- /CODE/TJA1043_Can_Sel.h: -------------------------------------------------------------------------------- 1 | /** ################################################################### 2 | ** THIS COMPONENT MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT. 3 | ** Filename : TJA1043_Can_Sel.h 4 | ** Project : DiagnosticDemo 5 | ** Processor : MC9S12G128VLH 6 | ** Component : BitIO 7 | ** Version : Component 02.075, Driver 03.16, CPU db: 3.00.017 8 | ** Compiler : CodeWarrior HC12 C Compiler 9 | ** Date/Time : 2016/10/13, 13:48 10 | ** Abstract : 11 | ** This component "BitIO" implements an one-bit input/output. 12 | ** It uses one bit/pin of a port. 13 | ** Note: This component is set to work in Output direction only. 14 | ** Methods of this component are mostly implemented as a macros 15 | ** (if supported by target language and compiler). 16 | ** Settings : 17 | ** Used pin : 18 | ** ---------------------------------------------------- 19 | ** Number (on package) | Name 20 | ** ---------------------------------------------------- 21 | ** 58 | PS6_SCK0 22 | ** ---------------------------------------------------- 23 | ** 24 | ** Port name : S 25 | ** 26 | ** Bit number (in port) : 6 27 | ** Bit mask of the port : $0040 28 | ** 29 | ** Initial direction : Output (direction cannot be changed) 30 | ** Initial output value : 1 31 | ** Initial pull option : off 32 | ** 33 | ** Port data register : PTS [$0248] 34 | ** Port control register : DDRS [$024A] 35 | ** 36 | ** Optimization for : speed 37 | ** Contents : 38 | ** GetVal - bool TJA1043_Can_Sel_GetVal(void); 39 | ** PutVal - void TJA1043_Can_Sel_PutVal(bool Val); 40 | ** ClrVal - void TJA1043_Can_Sel_ClrVal(void); 41 | ** SetVal - void TJA1043_Can_Sel_SetVal(void); 42 | ** 43 | ** Copyright : 1997 - 2011 Freescale Semiconductor, Inc. All Rights Reserved. 44 | ** 45 | ** http : www.freescale.com 46 | ** mail : support@freescale.com 47 | ** ###################################################################*/ 48 | 49 | #ifndef TJA1043_Can_Sel_H_ 50 | #define TJA1043_Can_Sel_H_ 51 | 52 | /* MODULE TJA1043_Can_Sel. */ 53 | 54 | /* Including shared modules, which are used in the whole project */ 55 | #include "PE_Types.h" 56 | #include "PE_Error.h" 57 | #include "PE_Const.h" 58 | #include "IO_Map.h" 59 | #include "Cpu.h" 60 | 61 | #pragma CODE_SEG TJA1043_Can_Sel_CODE 62 | /* 63 | ** =================================================================== 64 | ** Method : TJA1043_Can_Sel_GetVal (component BitIO) 65 | ** 66 | ** Description : 67 | ** This method returns an input value. 68 | ** a) direction = Input : reads the input value from the 69 | ** pin and returns it 70 | ** b) direction = Output : returns the last written value 71 | ** Note: This component is set to work in Output direction only. 72 | ** Parameters : None 73 | ** Returns : 74 | ** --- - Input value. Possible values: 75 | ** FALSE - logical "0" (Low level) 76 | ** TRUE - logical "1" (High level) 77 | 78 | ** =================================================================== 79 | */ 80 | #define TJA1043_Can_Sel_GetVal() ( \ 81 | (bool)((getReg8(PTS) & 0x40U)) /* Return port data */ \ 82 | ) 83 | 84 | /* 85 | ** =================================================================== 86 | ** Method : TJA1043_Can_Sel_PutVal (component BitIO) 87 | ** 88 | ** Description : 89 | ** This method writes the new output value. 90 | ** Parameters : 91 | ** NAME - DESCRIPTION 92 | ** Val - Output value. Possible values: 93 | ** FALSE - logical "0" (Low level) 94 | ** TRUE - logical "1" (High level) 95 | ** Returns : Nothing 96 | ** =================================================================== 97 | */ 98 | void TJA1043_Can_Sel_PutVal(bool Val); 99 | 100 | /* 101 | ** =================================================================== 102 | ** Method : TJA1043_Can_Sel_ClrVal (component BitIO) 103 | ** 104 | ** Description : 105 | ** This method clears (sets to zero) the output value. 106 | ** Parameters : None 107 | ** Returns : Nothing 108 | ** =================================================================== 109 | */ 110 | #define TJA1043_Can_Sel_ClrVal() ( \ 111 | (void)clrReg8Bits(PTS, 0x40U) /* PTS6=0x00U */ \ 112 | ) 113 | 114 | /* 115 | ** =================================================================== 116 | ** Method : TJA1043_Can_Sel_SetVal (component BitIO) 117 | ** 118 | ** Description : 119 | ** This method sets (sets to one) the output value. 120 | ** Parameters : None 121 | ** Returns : Nothing 122 | ** =================================================================== 123 | */ 124 | #define TJA1043_Can_Sel_SetVal() ( \ 125 | (void)setReg8Bits(PTS, 0x40U) /* PTS6=0x01U */ \ 126 | ) 127 | 128 | #pragma CODE_SEG DEFAULT 129 | 130 | /* END TJA1043_Can_Sel. */ 131 | #endif /* #ifndef __TJA1043_Can_Sel_H_ */ 132 | /* 133 | ** ################################################################### 134 | ** 135 | ** This file was created by Processor Expert 3.05 [04.46] 136 | ** for the Freescale HCS12 series of microcontrollers. 137 | ** 138 | ** ################################################################### 139 | */ 140 | -------------------------------------------------------------------------------- /CODE/TJA1043_EN.c: -------------------------------------------------------------------------------- 1 | /** ################################################################### 2 | ** THIS COMPONENT MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT. 3 | ** Filename : TJA1043_EN.c 4 | ** Project : DiagnosticDemo 5 | ** Processor : MC9S12G128VLH 6 | ** Component : BitIO 7 | ** Version : Component 02.075, Driver 03.16, CPU db: 3.00.017 8 | ** Compiler : CodeWarrior HC12 C Compiler 9 | ** Date/Time : 2016/10/13, 13:48 10 | ** Abstract : 11 | ** This component "BitIO" implements an one-bit input/output. 12 | ** It uses one bit/pin of a port. 13 | ** Note: This component is set to work in Output direction only. 14 | ** Methods of this component are mostly implemented as a macros 15 | ** (if supported by target language and compiler). 16 | ** Settings : 17 | ** Used pin : 18 | ** ---------------------------------------------------- 19 | ** Number (on package) | Name 20 | ** ---------------------------------------------------- 21 | ** 32 | PT0_IOC0_XIRQ 22 | ** ---------------------------------------------------- 23 | ** 24 | ** Port name : T 25 | ** 26 | ** Bit number (in port) : 0 27 | ** Bit mask of the port : $0001 28 | ** 29 | ** Initial direction : Output (direction cannot be changed) 30 | ** Initial output value : 1 31 | ** Initial pull option : off 32 | ** 33 | ** Port data register : PTT [$0240] 34 | ** Port control register : DDRT [$0242] 35 | ** 36 | ** Optimization for : speed 37 | ** Contents : 38 | ** GetVal - bool TJA1043_EN_GetVal(void); 39 | ** PutVal - void TJA1043_EN_PutVal(bool Val); 40 | ** ClrVal - void TJA1043_EN_ClrVal(void); 41 | ** SetVal - void TJA1043_EN_SetVal(void); 42 | ** 43 | ** Copyright : 1997 - 2011 Freescale Semiconductor, Inc. All Rights Reserved. 44 | ** 45 | ** http : www.freescale.com 46 | ** mail : support@freescale.com 47 | ** ###################################################################*/ 48 | 49 | /* MODULE TJA1043_EN. */ 50 | 51 | #include "TJA1043_EN.h" 52 | /* Including shared modules, which are used in the whole project */ 53 | #include "PE_Types.h" 54 | #include "PE_Error.h" 55 | #include "PE_Const.h" 56 | #include "IO_Map.h" 57 | #include "Cpu.h" 58 | 59 | #pragma DATA_SEG TJA1043_EN_DATA /* Select data segment "TJA1043_EN_DATA" */ 60 | #pragma CODE_SEG TJA1043_EN_CODE 61 | #pragma CONST_SEG TJA1043_EN_CONST /* Constant section for this module */ 62 | /* 63 | ** =================================================================== 64 | ** Method : TJA1043_EN_GetVal (component BitIO) 65 | ** 66 | ** Description : 67 | ** This method returns an input value. 68 | ** a) direction = Input : reads the input value from the 69 | ** pin and returns it 70 | ** b) direction = Output : returns the last written value 71 | ** Note: This component is set to work in Output direction only. 72 | ** Parameters : None 73 | ** Returns : 74 | ** --- - Input value. Possible values: 75 | ** FALSE - logical "0" (Low level) 76 | ** TRUE - logical "1" (High level) 77 | 78 | ** =================================================================== 79 | */ 80 | /* 81 | bool TJA1043_EN_GetVal(void) 82 | 83 | ** This method is implemented as a macro. See TJA1043_EN.h file. ** 84 | */ 85 | 86 | /* 87 | ** =================================================================== 88 | ** Method : TJA1043_EN_PutVal (component BitIO) 89 | ** 90 | ** Description : 91 | ** This method writes the new output value. 92 | ** Parameters : 93 | ** NAME - DESCRIPTION 94 | ** Val - Output value. Possible values: 95 | ** FALSE - logical "0" (Low level) 96 | ** TRUE - logical "1" (High level) 97 | ** Returns : Nothing 98 | ** =================================================================== 99 | */ 100 | void TJA1043_EN_PutVal(bool Val) 101 | { 102 | if (Val) { 103 | setReg8Bits(PTT, 0x01U); /* PTT0=0x01U */ 104 | } else { /* !Val */ 105 | clrReg8Bits(PTT, 0x01U); /* PTT0=0x00U */ 106 | } /* !Val */ 107 | } 108 | 109 | /* 110 | ** =================================================================== 111 | ** Method : TJA1043_EN_ClrVal (component BitIO) 112 | ** 113 | ** Description : 114 | ** This method clears (sets to zero) the output value. 115 | ** Parameters : None 116 | ** Returns : Nothing 117 | ** =================================================================== 118 | */ 119 | /* 120 | void TJA1043_EN_ClrVal(void) 121 | 122 | ** This method is implemented as a macro. See TJA1043_EN.h file. ** 123 | */ 124 | 125 | /* 126 | ** =================================================================== 127 | ** Method : TJA1043_EN_SetVal (component BitIO) 128 | ** 129 | ** Description : 130 | ** This method sets (sets to one) the output value. 131 | ** Parameters : None 132 | ** Returns : Nothing 133 | ** =================================================================== 134 | */ 135 | /* 136 | void TJA1043_EN_SetVal(void) 137 | 138 | ** This method is implemented as a macro. See TJA1043_EN.h file. ** 139 | */ 140 | 141 | 142 | /* END TJA1043_EN. */ 143 | /* 144 | ** ################################################################### 145 | ** 146 | ** This file was created by Processor Expert 3.05 [04.46] 147 | ** for the Freescale HCS12 series of microcontrollers. 148 | ** 149 | ** ################################################################### 150 | */ 151 | -------------------------------------------------------------------------------- /CODE/TJA1043_EN.h: -------------------------------------------------------------------------------- 1 | /** ################################################################### 2 | ** THIS COMPONENT MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT. 3 | ** Filename : TJA1043_EN.h 4 | ** Project : DiagnosticDemo 5 | ** Processor : MC9S12G128VLH 6 | ** Component : BitIO 7 | ** Version : Component 02.075, Driver 03.16, CPU db: 3.00.017 8 | ** Compiler : CodeWarrior HC12 C Compiler 9 | ** Date/Time : 2016/10/13, 13:48 10 | ** Abstract : 11 | ** This component "BitIO" implements an one-bit input/output. 12 | ** It uses one bit/pin of a port. 13 | ** Note: This component is set to work in Output direction only. 14 | ** Methods of this component are mostly implemented as a macros 15 | ** (if supported by target language and compiler). 16 | ** Settings : 17 | ** Used pin : 18 | ** ---------------------------------------------------- 19 | ** Number (on package) | Name 20 | ** ---------------------------------------------------- 21 | ** 32 | PT0_IOC0_XIRQ 22 | ** ---------------------------------------------------- 23 | ** 24 | ** Port name : T 25 | ** 26 | ** Bit number (in port) : 0 27 | ** Bit mask of the port : $0001 28 | ** 29 | ** Initial direction : Output (direction cannot be changed) 30 | ** Initial output value : 1 31 | ** Initial pull option : off 32 | ** 33 | ** Port data register : PTT [$0240] 34 | ** Port control register : DDRT [$0242] 35 | ** 36 | ** Optimization for : speed 37 | ** Contents : 38 | ** GetVal - bool TJA1043_EN_GetVal(void); 39 | ** PutVal - void TJA1043_EN_PutVal(bool Val); 40 | ** ClrVal - void TJA1043_EN_ClrVal(void); 41 | ** SetVal - void TJA1043_EN_SetVal(void); 42 | ** 43 | ** Copyright : 1997 - 2011 Freescale Semiconductor, Inc. All Rights Reserved. 44 | ** 45 | ** http : www.freescale.com 46 | ** mail : support@freescale.com 47 | ** ###################################################################*/ 48 | 49 | #ifndef TJA1043_EN_H_ 50 | #define TJA1043_EN_H_ 51 | 52 | /* MODULE TJA1043_EN. */ 53 | 54 | /* Including shared modules, which are used in the whole project */ 55 | #include "PE_Types.h" 56 | #include "PE_Error.h" 57 | #include "PE_Const.h" 58 | #include "IO_Map.h" 59 | #include "Cpu.h" 60 | 61 | #pragma CODE_SEG TJA1043_EN_CODE 62 | /* 63 | ** =================================================================== 64 | ** Method : TJA1043_EN_GetVal (component BitIO) 65 | ** 66 | ** Description : 67 | ** This method returns an input value. 68 | ** a) direction = Input : reads the input value from the 69 | ** pin and returns it 70 | ** b) direction = Output : returns the last written value 71 | ** Note: This component is set to work in Output direction only. 72 | ** Parameters : None 73 | ** Returns : 74 | ** --- - Input value. Possible values: 75 | ** FALSE - logical "0" (Low level) 76 | ** TRUE - logical "1" (High level) 77 | 78 | ** =================================================================== 79 | */ 80 | #define TJA1043_EN_GetVal() ( \ 81 | (bool)((getReg8(PTT) & 0x01U)) /* Return port data */ \ 82 | ) 83 | 84 | /* 85 | ** =================================================================== 86 | ** Method : TJA1043_EN_PutVal (component BitIO) 87 | ** 88 | ** Description : 89 | ** This method writes the new output value. 90 | ** Parameters : 91 | ** NAME - DESCRIPTION 92 | ** Val - Output value. Possible values: 93 | ** FALSE - logical "0" (Low level) 94 | ** TRUE - logical "1" (High level) 95 | ** Returns : Nothing 96 | ** =================================================================== 97 | */ 98 | void TJA1043_EN_PutVal(bool Val); 99 | 100 | /* 101 | ** =================================================================== 102 | ** Method : TJA1043_EN_ClrVal (component BitIO) 103 | ** 104 | ** Description : 105 | ** This method clears (sets to zero) the output value. 106 | ** Parameters : None 107 | ** Returns : Nothing 108 | ** =================================================================== 109 | */ 110 | #define TJA1043_EN_ClrVal() ( \ 111 | (void)clrReg8Bits(PTT, 0x01U) /* PTT0=0x00U */ \ 112 | ) 113 | 114 | /* 115 | ** =================================================================== 116 | ** Method : TJA1043_EN_SetVal (component BitIO) 117 | ** 118 | ** Description : 119 | ** This method sets (sets to one) the output value. 120 | ** Parameters : None 121 | ** Returns : Nothing 122 | ** =================================================================== 123 | */ 124 | #define TJA1043_EN_SetVal() ( \ 125 | (void)setReg8Bits(PTT, 0x01U) /* PTT0=0x01U */ \ 126 | ) 127 | 128 | #pragma CODE_SEG DEFAULT 129 | 130 | /* END TJA1043_EN. */ 131 | #endif /* #ifndef __TJA1043_EN_H_ */ 132 | /* 133 | ** ################################################################### 134 | ** 135 | ** This file was created by Processor Expert 3.05 [04.46] 136 | ** for the Freescale HCS12 series of microcontrollers. 137 | ** 138 | ** ################################################################### 139 | */ 140 | -------------------------------------------------------------------------------- /CODE/Vectors.c: -------------------------------------------------------------------------------- 1 | /** ################################################################### 2 | ** THIS COMPONENT MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT. 3 | ** Filename : Vectors.c 4 | ** Project : DiagnosticDemo 5 | ** Processor : MC9S12G128VLH 6 | ** Version : Component 01.016, Driver 02.06, CPU db: 3.00.017 7 | ** Compiler : CodeWarrior HC12 C Compiler 8 | ** Date/Time : 2016/10/13, 13:48 9 | ** Abstract : 10 | ** This component "MC9S12G128_64" implements properties, methods, 11 | ** and events of the CPU. 12 | ** Settings : 13 | ** 14 | ** 15 | ** Copyright : 1997 - 2011 Freescale Semiconductor, Inc. All Rights Reserved. 16 | ** 17 | ** http : www.freescale.com 18 | ** mail : support@freescale.com 19 | ** ###################################################################*/ 20 | #include "Cpu.h" 21 | #include "CAN1.h" 22 | #include "TJA1043_Can_Sel.h" 23 | #include "TJA1043_EN.h" 24 | #include "RTI1.h" 25 | 26 | /* ISR prototype */ 27 | typedef void (*near tIsrFunc)(void); 28 | /*lint -save -e950 Disable MISRA rule (1.1) checking. */ 29 | static const tIsrFunc _InterruptVectorTable[] @0xFF80U = { /* Interrupt vector table */ 30 | /*lint -restore Enable MISRA rule (1.1) checking. */ 31 | /* ISR name No. Address Name Description */ 32 | &Cpu_Interrupt, /* 0x40 0xFF80 ivVsi unused by PE */ 33 | &Cpu_Interrupt, /* 0x41 0xFF82 ivVportad unused by PE */ 34 | &Cpu_Interrupt, /* 0x42 0xFF84 ivVatdcompare unused by PE */ 35 | &Cpu_Interrupt, /* 0x43 0xFF86 ivVReserved60 unused by PE */ 36 | &Cpu_Interrupt, /* 0x44 0xFF88 ivVapi unused by PE */ 37 | &Cpu_Interrupt, /* 0x45 0xFF8A ivVlvi unused by PE */ 38 | &Cpu_Interrupt, /* 0x46 0xFF8C ivVReserved57 unused by PE */ 39 | &Cpu_Interrupt, /* 0x47 0xFF8E ivVportp unused by PE */ 40 | &Cpu_Interrupt, /* 0x48 0xFF90 ivVReserved55 unused by PE */ 41 | &Cpu_Interrupt, /* 0x49 0xFF92 ivVReserved54 unused by PE */ 42 | &Cpu_Interrupt, /* 0x4A 0xFF94 ivVReserved53 unused by PE */ 43 | &Cpu_Interrupt, /* 0x4B 0xFF96 ivVReserved52 unused by PE */ 44 | &Cpu_Interrupt, /* 0x4C 0xFF98 ivVReserved51 unused by PE */ 45 | &Cpu_Interrupt, /* 0x4D 0xFF9A ivVReserved50 unused by PE */ 46 | &Cpu_Interrupt, /* 0x4E 0xFF9C ivVReserved49 unused by PE */ 47 | &Cpu_Interrupt, /* 0x4F 0xFF9E ivVReserved48 unused by PE */ 48 | &Cpu_Interrupt, /* 0x50 0xFFA0 ivVReserved47 unused by PE */ 49 | &Cpu_Interrupt, /* 0x51 0xFFA2 ivVReserved46 unused by PE */ 50 | &Cpu_Interrupt, /* 0x52 0xFFA4 ivVReserved45 unused by PE */ 51 | &Cpu_Interrupt, /* 0x53 0xFFA6 ivVReserved44 unused by PE */ 52 | &Cpu_Interrupt, /* 0x54 0xFFA8 ivVReserved43 unused by PE */ 53 | &Cpu_Interrupt, /* 0x55 0xFFAA ivVReserved42 unused by PE */ 54 | &Cpu_Interrupt, /* 0x56 0xFFAC ivVReserved41 unused by PE */ 55 | &Cpu_Interrupt, /* 0x57 0xFFAE ivVReserved40 unused by PE */ 56 | &Cpu_Interrupt, /* 0x58 0xFFB0 ivVcantx unused by PE */ 57 | &Can_Rx_Interrupt, /* 0x59 0xFFB2 ivVcanrx used by PE */ 58 | &Cpu_Interrupt, /* 0x5A 0xFFB4 ivVcanerr unused by PE */ 59 | &Cpu_Interrupt, /* 0x5B 0xFFB6 ivVcanwkup unused by PE */ 60 | &Cpu_Interrupt, /* 0x5C 0xFFB8 ivVflash unused by PE */ 61 | &Cpu_Interrupt, /* 0x5D 0xFFBA ivVflashfd unused by PE */ 62 | &Cpu_Interrupt, /* 0x5E 0xFFBC ivVspi2 unused by PE */ 63 | &Cpu_Interrupt, /* 0x5F 0xFFBE ivVspi1 unused by PE */ 64 | &Cpu_Interrupt, /* 0x60 0xFFC0 ivVReserved31 unused by PE */ 65 | &Cpu_Interrupt, /* 0x61 0xFFC2 ivVsci2 unused by PE */ 66 | &Cpu_Interrupt, /* 0x62 0xFFC4 ivVReserved29 unused by PE */ 67 | &Cpu_Interrupt, /* 0x63 0xFFC6 ivVcpmuplllck unused by PE */ 68 | &Cpu_Interrupt, /* 0x64 0xFFC8 ivVcpmuocsns unused by PE */ 69 | &Cpu_Interrupt, /* 0x65 0xFFCA ivVReserved26 unused by PE */ 70 | &Cpu_Interrupt, /* 0x66 0xFFCC ivVReserved25 unused by PE */ 71 | &Cpu_Interrupt, /* 0x67 0xFFCE ivVportj unused by PE */ 72 | &Cpu_Interrupt, /* 0x68 0xFFD0 ivVReserved23 unused by PE */ 73 | &Cpu_Interrupt, /* 0x69 0xFFD2 ivVatd unused by PE */ 74 | &Cpu_Interrupt, /* 0x6A 0xFFD4 ivVsci1 unused by PE */ 75 | &Cpu_Interrupt, /* 0x6B 0xFFD6 ivVsci0 unused by PE */ 76 | &Cpu_Interrupt, /* 0x6C 0xFFD8 ivVspi0 unused by PE */ 77 | &Cpu_Interrupt, /* 0x6D 0xFFDA ivVtimpaie unused by PE */ 78 | &Cpu_Interrupt, /* 0x6E 0xFFDC ivVtimpaaovf unused by PE */ 79 | &Cpu_Interrupt, /* 0x6F 0xFFDE ivVtimovf unused by PE */ 80 | &Cpu_Interrupt, /* 0x70 0xFFE0 ivVtimch7 unused by PE */ 81 | &Cpu_Interrupt, /* 0x71 0xFFE2 ivVtimch6 unused by PE */ 82 | &Cpu_Interrupt, /* 0x72 0xFFE4 ivVtimch5 unused by PE */ 83 | &Cpu_Interrupt, /* 0x73 0xFFE6 ivVtimch4 unused by PE */ 84 | &Cpu_Interrupt, /* 0x74 0xFFE8 ivVtimch3 unused by PE */ 85 | &Cpu_Interrupt, /* 0x75 0xFFEA ivVtimch2 unused by PE */ 86 | &Cpu_Interrupt, /* 0x76 0xFFEC ivVtimch1 unused by PE */ 87 | &Cpu_Interrupt, /* 0x77 0xFFEE ivVtimch0 unused by PE */ 88 | &RTI_Interrupt, /* 0x78 0xFFF0 ivVrti used by PE */ 89 | &Cpu_Interrupt, /* 0x79 0xFFF2 ivVirq unused by PE */ 90 | &Cpu_Interrupt, /* 0x7A 0xFFF4 ivVxirq unused by PE */ 91 | &Cpu_Interrupt, /* 0x7B 0xFFF6 ivVswi unused by PE */ 92 | &Cpu_Interrupt /* 0x7C 0xFFF8 ivVtrap unused by PE */ 93 | }; 94 | 95 | /*lint -save -e950 Disable MISRA rule (1.1) checking. */ 96 | static const tIsrFunc _ResetVectorTable[] @0xFFFAU = { /* Reset vector table */ 97 | /*lint -restore Enable MISRA rule (1.1) checking. */ 98 | /* Reset handler name Address Name Description */ 99 | &_EntryPoint, /* 0xFFFA ivVcop unused by PE */ 100 | &_EntryPoint, /* 0xFFFC ivVclkmon unused by PE */ 101 | &_EntryPoint /* 0xFFFE ivVreset used by PE */ 102 | }; 103 | /* 104 | ** ################################################################### 105 | ** 106 | ** This file was created by Processor Expert 3.05 [04.46] 107 | ** for the Freescale HCS12 series of microcontrollers. 108 | ** 109 | ** ################################################################### 110 | */ 111 | -------------------------------------------------------------------------------- /C_Layout.hwl: -------------------------------------------------------------------------------- 1 | OPEN source 0 0 60 39 2 | Source < attributes MARKS off 3 | OPEN assembly 60 0 40 31 4 | Assembly < attributes ADR on,CODE off,ABSADR on,SYMB off,TOPPC 0xF88C 5 | OPEN procedure 0 39 60 17 6 | Procedure < attributes VALUES on,TYPES off 7 | OPEN register 60 31 40 25 8 | Register < attributes FORMAT AUTO,COMPLEMENT None 9 | OPEN memory 60 56 40 22 10 | Memory < attributes FORMAT hex,COMPLEMENT None,WORD 1,ASC on,ADR on,ADDRESS 0x80 11 | OPEN data 0 56 60 22 12 | Data:1 < attributes SCOPE global,COMPLEMENT None,FORMAT Symb,MODE automatic,UPDATERATE 10,NAMEWIDTH 16 13 | OPEN data 0 78 60 22 14 | Data:2 < attributes SCOPE local,COMPLEMENT None,FORMAT Symb,MODE automatic,UPDATERATE 10,NAMEWIDTH 16 15 | OPEN command 60 78 40 22 16 | Command < attributes CACHESIZE 1000 17 | bckcolor 50331647 18 | font 'Courier New' 9 BLACK 19 | AUTOSIZE on 20 | ACTIVATE Data:2 Command Procedure Data:1 Source Register Assembly Memory 21 | -------------------------------------------------------------------------------- /DOC/DiagnosticDemo.txt: -------------------------------------------------------------------------------- 1 | ============================================================================= 2 | List of generated methods in project: DiagnosticDemo 3 | 4 | THIS TEXT DESCRIPTION IS GENERATED BY THE TOOL. DO NOT MODIFY IT. 5 | ============================================================================= 6 | 7 | Module "CAN1" (bean Init_MSCAN_HCS12) 8 | - CAN1_Init -This method initializes registers of the CAN module according to this Peripheral Initialization settings. Call 9 | this method in user code to initialize the module. By default, the method is called by PE automatically; see 10 | "Call Init method" property of the component for more details. 11 | 12 | Module "TJA1043_Can_Sel" (bean BitIO) 13 | - TJA1043_Can_Sel_GetVal -Returns the input/output value. If the direction is [input] then the input value of the pin is 14 | read and returned. If the direction is [output] then the last written value is returned (see 15 | property for limitations). This method cannot be disabled if direction is [input]. 16 | - TJA1043_Can_Sel_PutVal -The specified output value is set. If the direction is [input], the component saves the value to a 17 | memory or a register and this value will be written to the pin after switching to the output mode (using 18 | [SetDir(TRUE)]; see property for limitations). If the direction is [output], it writes the value to 19 | the pin. (Method is available only if the direction = _[output]_ or _[input/output]_). 20 | - TJA1043_Can_Sel_ClrVal -Clears (set to zero) the output value. It is equivalent to the [PutVal(FALSE)]. This method is 21 | available only if the direction = _[output]_ or _[input/output]_. 22 | - TJA1043_Can_Sel_SetVal -Sets (to one) the output value. It is equivalent to the [PutVal(TRUE)]. This method is available 23 | only if the direction = _[output]_ or _[input/output]_. 24 | 25 | Module "TJA1043_EN" (bean BitIO) 26 | - TJA1043_EN_GetVal -Returns the input/output value. If the direction is [input] then the input value of the pin is read and 27 | returned. If the direction is [output] then the last written value is returned (see property for 28 | limitations). This method cannot be disabled if direction is [input]. 29 | - TJA1043_EN_PutVal -The specified output value is set. If the direction is [input], the component saves the value to a 30 | memory or a register and this value will be written to the pin after switching to the output mode (using 31 | [SetDir(TRUE)]; see property for limitations). If the direction is [output], it writes the value to 32 | the pin. (Method is available only if the direction = _[output]_ or _[input/output]_). 33 | - TJA1043_EN_ClrVal -Clears (set to zero) the output value. It is equivalent to the [PutVal(FALSE)]. This method is 34 | available only if the direction = _[output]_ or _[input/output]_. 35 | - TJA1043_EN_SetVal -Sets (to one) the output value. It is equivalent to the [PutVal(TRUE)]. This method is available only 36 | if the direction = _[output]_ or _[input/output]_. 37 | 38 | Module "RTI1" (bean Init_RTI_HCS12) 39 | - RTI1_Init -This method initializes registers of the RTI module according to this Peripheral Initialization settings. Call 40 | this method in user code to initialize the module. By default, the method is called by PE automatically; see 41 | "Call Init method" property of the component for more details. 42 | 43 | Module "Cpu" (bean MC9S12G128_64) 44 | - Cpu_EnableInt -Enable maskable interrupts 45 | - Cpu_DisableInt -Disable maskable interrupts 46 | - Cpu_SetWaitMode -Set low power mode - Wait mode. For more information about the wait mode see documentation of this CPU. 47 | Release from Wait mode: Reset or interrupt 48 | - Cpu_SetStopMode -Set low power mode - Stop mode. For more information about the stop mode see documentation of this CPU. 49 | 50 | =================================================================================== 51 | -------------------------------------------------------------------------------- /DOC/DiagnosticDemo_SIGNALS.txt: -------------------------------------------------------------------------------- 1 | ================================================================= 2 | THIS FILE WAS GENERATED BY "Processor Expert version 3.02 for Freescale HCS12(X) family". 3 | Project "DiagnosticDemo", 2016/9/2, 8:51 4 | DO NOT MODIFY IT. 5 | ----------------------------------------------------------------- 6 | There is no signal defined in this project. 7 | Hint: Signals may be defined in the Inspector (advanced or expert view) 8 | ================================================================= 9 | 10 | ================================================================= 11 | SIGNAL LIST 12 | ----------------------------------------------------------------- 13 | SIGNAL-NAME [DIR] => PIN-NAME [PIN-NUMBER] 14 | ----------------------------------------------------------------- 15 | ================================================================= 16 | 17 | 18 | ================================================================= 19 | PIN LIST 20 | ----------------------------------------------------------------- 21 | PIN-NAME [PIN-NUM] => SIGNAL-NAME [DIRECTION] 22 | ----------------------------------------------------------------- 23 | ================================================================= 24 | 25 | -------------------------------------------------------------------------------- /DOC/DiagnosticDemo_Settings.previous.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | 43 | 44 |
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49 | 50 | 51 | 52 | 53 | 54 | 55 | 56 | 57 | 58 | 59 | 60 | 61 | 62 | 63 | 64 | 65 | 66 | 67 | 68 | 69 | 70 | 71 | 72 | 73 | 74 | 75 | 76 | 77 | 78 | 79 | 80 | 81 | 82 | 83 | 84 | 85 | 86 | 87 | 88 | 89 | 90 | 91 | 92 | 93 | 94 | 95 | 96 | 97 | 98 | 99 | 100 | 101 | 102 | 103 | 104 | 105 | 106 | 107 | 108 | 109 | 110 | 111 | 112 | 113 | 114 | 115 | 116 | 117 | 118 | 119 | 120 | 121 | 122 | 123 | 124 | 125 | 126 | 127 | 128 | 129 | 130 | 131 | 132 | 133 | 134 | 135 | 136 | 137 | 138 | 139 | 140 | 141 | 142 | 143 | 144 | 145 | 146 | 147 | 148 | 149 | 150 | 151 | 152 | 153 | 154 | /*lint -save -e950 Disable MISRA rule (1.1) checking. */ 155 | asm(BGND); 156 | /*lint -restore Enable MISRA rule (1.1) checking. */ 157 | 158 | 159 | 160 | 161 | 162 | 163 | 164 | 165 | 166 | 167 | 168 | 169 | 170 | 171 | 172 | 173 | 174 | 175 | 176 | 177 | 178 | 179 | 180 |
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273 | 274 | 275 | 276 | 277 | 278 | 279 | 280 | 281 | 282 | 283 | 284 | 285 | 286 | 287 | 288 | 289 | 290 | 291 | 292 | 293 | 294 | 295 | 296 | 297 | 298 | 299 | 300 | 301 | 302 | 303 | 304 | 305 | 306 | 307 | 308 | 309 | 310 | 311 | 312 | 313 | 314 | 315 | 316 | 317 | 318 | 319 | 320 | 321 | 322 | 323 | 324 | 325 | 326 | 327 | 328 | 329 | 330 | 331 | 332 | 333 | 334 | 335 | 336 | 337 | 338 | 339 | 340 | 341 | 342 | 343 | 344 | 345 | 346 | 347 | 348 | 349 | 350 | 351 | 352 | 353 | 354 | 355 | 356 | 357 | 358 | 359 | 360 | 361 | 362 | 363 | 364 | 365 | 366 | 367 | 368 | 369 | 370 | 371 | 372 | 373 | 374 | 375 | 376 | 377 | 378 | 379 | 380 | 381 | 382 | 383 | 384 | 385 | 386 | 387 | 388 | 389 | 390 | 391 | 392 | 393 | 394 | 395 | 396 | 397 | 398 | 399 | 400 | 401 | 402 | 403 | 404 | 405 | 406 | 407 | 408 | 409 | 410 | 411 | 412 | 413 | 414 | 415 | 416 | 417 | 418 | 419 | 420 | 421 | 422 | 423 | 424 | 425 | 426 | 427 | 428 | 429 | 430 | 431 | 432 | 433 | 434 | 435 | 436 | 437 | 438 | 439 | 440 | 441 | 442 | 443 | 444 | 445 | 446 | 447 | 448 | 449 | 450 | 451 | 452 | 453 | 454 | 455 | 456 | 457 | 458 | 459 | 460 | 461 | 462 | 463 | 464 | 465 | 466 | 467 | 468 | 469 | 470 | 471 | 472 | 473 | 474 | 475 | 476 | 477 | 478 | 479 | 480 | 481 | 482 | 483 | 484 | 485 | 486 | 487 | 488 | -------------------------------------------------------------------------------- /Default.mem: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ukign/UDSDemo/a6c9713873e49af6dd21765209f2cd0de124066c/Default.mem -------------------------------------------------------------------------------- /DiagnosticDemo.G_C: -------------------------------------------------------------------------------- 1 | ;Please do not modify this file! 2 | ;The file contains internal information about the Processor Expert project generation 3 | [Options] 4 | ProjectName=DiagnosticDemo 5 | ProjectDirectory=D:\workspace\ukign\UDS\ 6 | DestEventsDirectory=CODE\ 7 | DestDriversSubDirectory= 8 | DestDocumentationDirectory=DOC\ 9 | DestCompiledFilesSubDirectory= 10 | DestTemporaryDirectory= 11 | GenCpuDerivative=MC9S12G128VLH 12 | [GenFiles] 13 | LinkerFileGenerated=Yes 14 | MakefileGenerated=No 15 | GenSharedModules=4 16 | Line=PE_Types 17 | Line=PE_Error 18 | Line=PE_Const 19 | Line=IO_Map 20 | ShrdHeaderAge0=1229811227 21 | ShrdCodeAge0=-1 22 | ShrdAsemblAge0=-1 23 | ShrdHeaderAge1=1229811227 24 | ShrdCodeAge1=-1 25 | ShrdAsemblAge1=-1 26 | ShrdHeaderAge2=1229811227 27 | ShrdCodeAge2=-1 28 | ShrdAsemblAge2=-1 29 | ShrdHeaderAge3=1229811227 30 | ShrdCodeAge3=1229811227 31 | ShrdAsemblAge3=-1 32 | GenExtraFiles=1 33 | Line=CODE\Vectors.c 34 | XtraAge0=1229811227 35 | GenExtraFileType0=4 36 | GenEventModules=1 37 | Line=Events 38 | GenMethodsInEvents=0 39 | GenAllModules=10 40 | Line=CAN1 41 | Line=Cpu 42 | Line=Events 43 | Line=IO_Map 44 | Line=PE_Const 45 | Line=PE_Error 46 | Line=PE_Types 47 | Line=RTI1 48 | Line=TJA1043_Can_Sel 49 | Line=TJA1043_EN 50 | GenExternModules=0 51 | GenBeanModules=4 52 | Line=CAN1 53 | Line=TJA1043_Can_Sel 54 | Line=TJA1043_EN 55 | Line=RTI1 56 | SignalListFile=DOC\DiagnosticDemo_SIGNALS.txt 57 | DestinationCompiler=MetrowerksHC12CC 58 | ProjectModificationStamp=15 59 | 60 | [2] 61 | Generated=Yes 62 | GenCompName=Cpu 63 | GenEventModule=Events 64 | HeaderAge=1229811227 65 | CodeAge=1229811227 66 | AsemblAge=-1 67 | GenNumMethods=14 68 | GetResetSource=No 69 | GetPllLockStatusFlag=No 70 | GetLowVoltageFlag=No 71 | Delay100US=No 72 | SetStopMode=Yes 73 | SetWaitMode=Yes 74 | DisableInt=Yes 75 | EnableInt=Yes 76 | GetIntVect=No 77 | SetIntVect=No 78 | GetSpeedMode=No 79 | SetSlowSpeed=No 80 | SetLowSpeed=No 81 | SetHighSpeed=No 82 | GenNumEvents=8 83 | OnReset_Selected=1 84 | OnReset_Name=Cpu_OnReset 85 | OnReset_Priority=interrupts disabled 86 | OnClockMonitorFail_Selected=1 87 | OnClockMonitorFail_Name=Cpu_OnClockMonitorFail 88 | OnClockMonitorFail_Priority=interrupts disabled 89 | OnIllegalOpcode_Selected=1 90 | OnIllegalOpcode_Name=Cpu_OnIllegalOpcode 91 | OnIllegalOpcode_Priority=interrupts disabled 92 | OnSwINT_Selected=1 93 | OnSwINT_Name=Cpu_OnSwINT 94 | OnSwINT_Priority=interrupts disabled 95 | OnLvdStatusChanged_Selected=1 96 | OnLvdStatusChanged_Name=Cpu_OnLvdStatusChanged 97 | OnLvdStatusChanged_Priority=interrupts disabled 98 | OnPllLockStatusChanged_Selected=1 99 | OnPllLockStatusChanged_Name=Cpu_OnPllLockStatusChanged 100 | OnPllLockStatusChanged_Priority=interrupts disabled 101 | OnOscStatusChanged_Selected=1 102 | OnOscStatusChanged_Name=Cpu_OnOscStatusChanged 103 | OnOscStatusChanged_Priority=interrupts disabled 104 | OnSpuriousInterrupt_Selected=1 105 | OnSpuriousInterrupt_Name=Cpu_OnSpuriousInterrupt 106 | OnSpuriousInterrupt_Priority=interrupts disabled 107 | ISR_ISRnameReset=MCU_init_reset 108 | ISR_DevInit_ClockMonitorReset_ISRname=MCU_init_reset 109 | ISR_ISRnameIllegalOpcode= 110 | ISR_ISRnameMPUAccessError= 111 | ISR_ISRnameMMCRamAccViol= 112 | ISR_ISRnameSWI= 113 | ISR_DevInit_IntLVD_ISRname= 114 | ISR_DevInit_IntPLL_ISRname= 115 | ISR_DevInit_IntSCM_ISRname= 116 | ISR_DevInit_IntOscStatusChanged_ISRname= 117 | ISR_DevInit_IntSpurious_ISRname= 118 | ISR_DevInit_IntHTI_ISRname= 119 | ISR_ISRDefaultName=isr_default 120 | ISR_DevInit_IntSYS_ISRname= 121 | ISR_DevInit_IntXSEI_ISRname= 122 | ISR_DevInit_IntXST_ISRname0= 123 | ISR_IntFLEX_TBIE_ISRname= 124 | ISR_IntFLEX_RBIE_ISRname= 125 | ISR_IntFLEX_FNEAIE_ISRname= 126 | ISR_IntFLEX_FNEBIE_ISRname= 127 | ISR_IntFLEX_WUPIE_ISRname= 128 | ISR_IntFLEX_CHIE_ISRname= 129 | ISR_IntFLEX_PRIE_ISRname= 130 | GenSmartUserChangesDetected_Header=No 131 | GenSmartUserChangesDetected_Code=No 132 | GenSmartUserChangesDetected_Asembl=No 133 | 134 | [6] 135 | Generated=Yes 136 | GenCompName=CAN1 137 | GenEventModule= 138 | HeaderAge=1229811227 139 | CodeAge=1229811227 140 | AsemblAge=-1 141 | GenNumMethods=1 142 | Init=Yes 143 | GenNumEvents=0 144 | ISR_ISRHandleWakeUpCAN= 145 | ISR_ISRHandleErrorCAN= 146 | ISR_ISRHandleRecvCAN=Can_Rx_Interrupt 147 | ISR_ISRHandleTransCAN= 148 | GenSmartUserChangesDetected_Header=No 149 | GenSmartUserChangesDetected_Code=No 150 | GenSmartUserChangesDetected_Asembl=No 151 | GenMethodPos=2 152 | MethodPos0=Init 153 | MethodType=method 154 | ModuleType=Header 155 | LineBeg=123 156 | LineEnd=137 157 | MethodPos1=Init 158 | MethodType=method 159 | ModuleType=Code 160 | LineBeg=134 161 | LineEnd=210 162 | 163 | [7] 164 | Generated=Yes 165 | GenCompName=TJA1043_Can_Sel 166 | GenEventModule= 167 | HeaderAge=1229811227 168 | CodeAge=1229811227 169 | AsemblAge=-1 170 | GenNumMethods=10 171 | GetRawVal=No 172 | NegVal=No 173 | SetVal=Yes 174 | ClrVal=Yes 175 | PutVal=Yes 176 | GetVal=Yes 177 | SetOutput=No 178 | SetInput=No 179 | SetDir=No 180 | GetDir=No 181 | GenNumEvents=0 182 | GenSmartUserChangesDetected_Header=No 183 | GenSmartUserChangesDetected_Code=No 184 | GenSmartUserChangesDetected_Asembl=No 185 | GenMethodPos=8 186 | MethodPos0=GetVal 187 | MethodType=method 188 | ModuleType=Header 189 | LineBeg=61 190 | LineEnd=82 191 | MethodPos1=PutVal 192 | MethodType=method 193 | ModuleType=Header 194 | LineBeg=83 195 | LineEnd=98 196 | MethodPos2=ClrVal 197 | MethodType=method 198 | ModuleType=Header 199 | LineBeg=99 200 | LineEnd=112 201 | MethodPos3=SetVal 202 | MethodType=method 203 | ModuleType=Header 204 | LineBeg=113 205 | LineEnd=126 206 | MethodPos4=GetVal 207 | MethodType=method 208 | ModuleType=Code 209 | LineBeg=61 210 | LineEnd=84 211 | MethodPos5=PutVal 212 | MethodType=method 213 | ModuleType=Code 214 | LineBeg=85 215 | LineEnd=107 216 | MethodPos6=ClrVal 217 | MethodType=method 218 | ModuleType=Code 219 | LineBeg=108 220 | LineEnd=123 221 | MethodPos7=SetVal 222 | MethodType=method 223 | ModuleType=Code 224 | LineBeg=124 225 | LineEnd=139 226 | 227 | [8] 228 | Generated=Yes 229 | GenCompName=TJA1043_EN 230 | GenEventModule= 231 | HeaderAge=1229811227 232 | CodeAge=1229811227 233 | AsemblAge=-1 234 | GenNumMethods=10 235 | GetRawVal=No 236 | NegVal=No 237 | SetVal=Yes 238 | ClrVal=Yes 239 | PutVal=Yes 240 | GetVal=Yes 241 | SetOutput=No 242 | SetInput=No 243 | SetDir=No 244 | GetDir=No 245 | GenNumEvents=0 246 | GenSmartUserChangesDetected_Header=No 247 | GenSmartUserChangesDetected_Code=No 248 | GenSmartUserChangesDetected_Asembl=No 249 | GenMethodPos=8 250 | MethodPos0=GetVal 251 | MethodType=method 252 | ModuleType=Header 253 | LineBeg=61 254 | LineEnd=82 255 | MethodPos1=PutVal 256 | MethodType=method 257 | ModuleType=Header 258 | LineBeg=83 259 | LineEnd=98 260 | MethodPos2=ClrVal 261 | MethodType=method 262 | ModuleType=Header 263 | LineBeg=99 264 | LineEnd=112 265 | MethodPos3=SetVal 266 | MethodType=method 267 | ModuleType=Header 268 | LineBeg=113 269 | LineEnd=126 270 | MethodPos4=GetVal 271 | MethodType=method 272 | ModuleType=Code 273 | LineBeg=61 274 | LineEnd=84 275 | MethodPos5=PutVal 276 | MethodType=method 277 | ModuleType=Code 278 | LineBeg=85 279 | LineEnd=107 280 | MethodPos6=ClrVal 281 | MethodType=method 282 | ModuleType=Code 283 | LineBeg=108 284 | LineEnd=123 285 | MethodPos7=SetVal 286 | MethodType=method 287 | ModuleType=Code 288 | LineBeg=124 289 | LineEnd=139 290 | 291 | [10] 292 | Generated=Yes 293 | GenCompName=RTI1 294 | GenEventModule= 295 | HeaderAge=1229811227 296 | CodeAge=1229811227 297 | AsemblAge=-1 298 | GenNumMethods=1 299 | Init=Yes 300 | GenNumEvents=0 301 | ISR_ISRHandleRTI=RTI_Interrupt 302 | GenSmartUserChangesDetected_Header=No 303 | GenSmartUserChangesDetected_Code=No 304 | GenSmartUserChangesDetected_Asembl=No 305 | GenMethodPos=2 306 | MethodPos0=Init 307 | MethodType=method 308 | ModuleType=Header 309 | LineBeg=62 310 | LineEnd=77 311 | MethodPos1=Init 312 | MethodType=method 313 | ModuleType=Code 314 | LineBeg=77 315 | LineEnd=108 316 | 317 | [UsedSrcFiles] 318 | SrcFile=Drivers\SW\_PE_ProjectInfo.drv=1030770455 319 | SrcFile=Drivers\_PE_ProjectInfo.src=1021144883 320 | SrcFile=Drivers\common\CopyrightUserC.inc=894198410 321 | SrcFile=Drivers\Common\EvntSettings.inc=852976896 322 | SrcFile=Drivers\Common\EvntAbstract.Inc=852976896 323 | SrcFile=Drivers\HCS12\Evnt.drv=987316964 324 | SrcFile=Drivers\Event.src=1045976765 325 | SrcFile=Drivers\HCS12\MetrowerksHCS12_Plugin.prg=888313359 326 | SrcFile=Drivers\HCS12\MC9S12_Maker.prg=989220453 327 | SrcFile=Drivers\HCS12\MC9S12_Linker.prg=1045981797 328 | SrcFile=Drivers\Common\HeaderGeneral.c=1016883402 329 | SrcFile=Drivers\Common\CommonInitialization_FLASH.prg=1044011528 330 | SrcFile=Drivers\Common\CommonEnabling.prg=985827443 331 | SrcFile=Drivers\Common\CommonRegInit.prg=985827443 332 | SrcFile=Drivers\Common\CommonRegInitialization.prg=985964269 333 | SrcFile=Drivers\Common\CommonInitialization.prg=985827443 334 | SrcFile=Drivers\HCS12\InternalPeripherals_IO.prg=1117979115 335 | SrcFile=Drivers\HCS12\MC9S12_LowLevelInit.prg=1121750325 336 | SrcFile=Drivers\Common\CommonInitialization_WriteOnce.prg=985962006 337 | SrcFile=Drivers\HCS12\Common_HCS12x\MC9S12_ForDelaySubroutine.prg=1022080360 338 | SrcFile=Drivers\HCS12\MC9S12_EntryPointCode.prg=1023170759 339 | SrcFile=Drivers\HCS12\Common_HCS12x\CommonSubroutines.prg=1022080329 340 | SrcFile=Drivers\Common\GeneralInternal.Inc=988768423 341 | SrcFile=Drivers\HCS12\MC9S12_InterruptVectorTable.prg=1066165707 342 | SrcFile=Drivers\HCS12\MC9S12_SharedInterruptVectors.prg=1022080314 343 | SrcFile=Drivers\Common\MC9S12EnableInt.Inc=862417692 344 | SrcFile=Drivers\Common\MC9S12DisableInt.Inc=862417692 345 | SrcFile=Drivers\Common\MC9S12SetWaitMode.Inc=829646564 346 | SrcFile=Drivers\Common\MC9S12SetStopMode.Inc=829646564 347 | SrcFile=Drivers\Common\GeneralInternalDescription.prg=888896829 348 | SrcFile=Drivers\Common\GeneralInternalGlobal.inc=988768423 349 | SrcFile=Drivers\Common\MC9S12Settings.Inc=862417692 350 | SrcFile=Drivers\Common\MC9S12Abstract.Inc=1022657972 351 | SrcFile=Drivers\HCS12\MC9S12_PLL_CPMU.prg=987264531 352 | SrcFile=Drivers\HCS12\MC9S12.drv=1066165707 353 | SrcFile=Drivers\HCS12.src=1024215604 354 | SrcFile=Drivers\HCS12\MC9S12G128_64c.prg=1065450832 355 | SrcFile=Drivers\HCS12\MC9S12G128_64h.prg=1065450832 356 | SrcFile=Drivers\Common\IO_MapSettings.Inc=831017635 357 | SrcFile=Drivers\Common\IO_MapAbstract.Inc=831017635 358 | SrcFile=Drivers\HCS12\IO_Map.drv=1020285241 359 | SrcFile=Drivers\Common\PE_ConstSettings.Inc=852976896 360 | SrcFile=Drivers\Common\PE_ConstAbstract.Inc=998727859 361 | SrcFile=Drivers\HCS12\PE_Const.drv=1018082511 362 | SrcFile=Drivers\Common\ErrorDefinitions.Inc=1029868281 363 | SrcFile=Drivers\Common\PE_ErrorAbstract.Inc=998727873 364 | SrcFile=Drivers\HCS12\PE_Error.drv=1017608633 365 | SrcFile=Drivers\Common\PE_MisraEnableRules.prg=1020415536 366 | SrcFile=Drivers\Common\PE_MisraRuleToDocumentation_HCS12.prg=1119720294 367 | SrcFile=Drivers\Common\PE_MisraRuleToDocumentation.prg=1045977413 368 | SrcFile=Drivers\Common\PE_MisraRuleToErrorCode.prg=1045977413 369 | SrcFile=Drivers\Common\PE_MisraDisableRules.prg=1023564036 370 | SrcFile=Drivers\Common\PE_TypesSettings.Inc=852918100 371 | SrcFile=Drivers\Common\PE_TypesAbstract.Inc=852918100 372 | SrcFile=Drivers\HCS12\PE_Types.drv=1118733041 373 | SrcFile=Drivers\Common\CheckRegBits8_Rst.prg=877623367 374 | SrcFile=Drivers\Common\setRegBits8_Rst.prg=877616666 375 | SrcFile=Drivers\Common\Init_RTI_HCS12Init.Inc=1022657972 376 | SrcFile=Drivers\Common\Init_RTI_HCS12Settings.Inc=1018909699 377 | SrcFile=Drivers\Common\Init_RTI_HCS12Abstract.Inc=998726882 378 | SrcFile=Drivers\HCS12\Init_RTI_HCS12.drv=1018064659 379 | SrcFile=Drivers\Init_RTI_HCS12.src=1024215607 380 | SrcFile=Drivers\HCS12\CreateDataSection.prg=1020816585 381 | SrcFile=Drivers\Common\OneBitIOSetVal.inc=853309852 382 | SrcFile=Drivers\Common\OneBitIOClrVal.inc=853309852 383 | SrcFile=Drivers\Common\GeneralParameters.inc=852918731 384 | SrcFile=Drivers\Common\OneBitIOPutVal.inc=853309852 385 | SrcFile=Drivers\Common\OneBitIOGetVal.inc=997482628 386 | SrcFile=Drivers\Common\UsedPin.inc=853309852 387 | SrcFile=Drivers\Common\OneBitIOSettings.inc=853309852 388 | SrcFile=Drivers\Common\OneBitIOAbstract.inc=997482628 389 | SrcFile=Drivers\HCS12\BitIO.drv=1117979115 390 | SrcFile=Drivers\BitIO.src=1024216533 391 | SrcFile=Drivers\Common\setReg8.prg=1017607790 392 | SrcFile=Drivers\Common\setReg8_Rst.prg=877624838 393 | SrcFile=Drivers\Common\CommonInitialization_PIB.prg=986275458 394 | SrcFile=Drivers\HCS12\InitPin_MC9S12G128_64.prg=1044622831 395 | SrcFile=Drivers\HCS12\InitPin.prg=1065900132 396 | SrcFile=Drivers\Common\InitReg8Block.prg=985827468 397 | SrcFile=Drivers\Common\InitReg8.prg=985827485 398 | SrcFile=Drivers\Common\InitReg8_PIB.prg=910649041 399 | SrcFile=Drivers\Common\GenReg8BitsInitInfo.prg=943215901 400 | SrcFile=Drivers\Common\setRegBits8.prg=1020153198 401 | SrcFile=Drivers\Common\DefineISR.prg=1045977396 402 | SrcFile=Drivers\Common\InitISRimplement.Inc=853311881 403 | SrcFile=Drivers\Common\Header.C=1016883402 404 | SrcFile=Drivers\Common\Header.End=1009547432 405 | SrcFile=Drivers\Common\HCS12_CreateCodeSection.prg=1020877752 406 | SrcFile=Drivers\HCS12\CreateCodeSection.prg=987924249 407 | SrcFile=Drivers\Common\DeclareISR.prg=1045977396 408 | SrcFile=Drivers\Common\InitISRheader.Inc=853247114 409 | SrcFile=Drivers\Common\HCS12_CreateIntSection.prg=1020877752 410 | SrcFile=Drivers\HCS12\CreateIntSection.prg=919952314 411 | SrcFile=Drivers\Common\GeneralDamage.inc=852918100 412 | SrcFile=Drivers\Common\GeneralReturnNothing.inc=852918100 413 | SrcFile=Drivers\Common\GeneralParametersNone.inc=852918100 414 | SrcFile=Drivers\Common\GeneralMethod.inc=988768423 415 | SrcFile=Drivers\Common\Init_MSCAN_HCS12Init.Inc=815565170 416 | SrcFile=Drivers\Common\HeaderCopyright.inc=1048077793 417 | SrcFile=Drivers\Common\Init_MSCAN_HCS12Settings.Inc=815565170 418 | SrcFile=Drivers\Common\Init_MSCAN_HCS12Abstract.Inc=894198882 419 | SrcFile=Drivers\Common\Header.h=1016883402 420 | SrcFile=Drivers\HCS12\Common_HCS12x\MC9S12_WhileSet.prg=962943714 421 | SrcFile=Drivers\HCS12\Common_HCS12x\MC9S12_COPreset.prg=949508133 422 | SrcFile=Drivers\HCS12\Common_HCS12x\MC9S12_WhileNotSet.prg=1022080408 423 | SrcFile=Drivers\HCS12\Init_GPIO_HCS12_PinPrope.prg=1117979115 424 | SrcFile=Drivers\HCS12\Init_MSCAN_HCS12.drv=1119840809 425 | SrcFile=Drivers\Init_MSCAN_HCS12.src=1024215606 426 | 427 | [_end_] 428 | -------------------------------------------------------------------------------- /DiagnosticDemo.dsk: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ukign/UDSDemo/a6c9713873e49af6dd21765209f2cd0de124066c/DiagnosticDemo.dsk -------------------------------------------------------------------------------- /DiagnosticDemo.mcp: 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The text should be enclosed in the appropriate 184 | comment syntax for the file format. We also recommend that a 185 | file or class name and description of purpose be included on the 186 | same "printed page" as the copyright notice for easier 187 | identification within third-party archives. 188 | 189 | Copyright {yyyy} {name of copyright owner} 190 | 191 | Licensed under the Apache License, Version 2.0 (the "License"); 192 | you may not use this file except in compliance with the License. 193 | You may obtain a copy of the License at 194 | 195 | http://www.apache.org/licenses/LICENSE-2.0 196 | 197 | Unless required by applicable law or agreed to in writing, software 198 | distributed under the License is distributed on an "AS IS" BASIS, 199 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 200 | See the License for the specific language governing permissions and 201 | limitations under the License. 202 | -------------------------------------------------------------------------------- /P&E_Multilink_USB.ini: -------------------------------------------------------------------------------- 1 | [STARTUP] 2 | CPUTARGETTYPE=0 3 | USE_CYCLONEPRO_RELAYS=0 4 | PORT=21 5 | interface_selection=1 6 | SHOWDIALOG=0 7 | IO_DELAY_SET=0 8 | frequency_has_changed_old_io_delay_cnt=0 9 | CyclonePro_poweroffonexit=0 10 | CyclonePro_currentvoltage=255 11 | CyclonePro_PowerDownDelay=250 12 | CyclonePro_PowerUpDelay=250 13 | IO_DELAY_CNT=0 14 | PCI_DELAY=0 15 | RESET_DELAY=0 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | [Environment Variables] 27 | GENPATH={Project}Sources;{Compiler}lib\hc12c\src;{Compiler}lib\hc12c\include;{Compiler}lib\hc12c\lib;{Compiler}lib\xgatec\src;{Compiler}lib\xgatec\include;{Compiler}lib\xgatec\lib 28 | LIBPATH={Compiler}lib\hc12c\include;{Compiler}lib\xgatec\include 29 | OBJPATH={Project}bin 30 | TEXTPATH={Project}bin 31 | ABSPATH={Project}bin 32 | 33 | [HI-WAVE] 34 | Target=icd12 35 | Layout=C_layout.hwl 36 | LoadDialogOptions=AUTOERASEANDFLASH RUNANDSTOPAFTERLOAD="main" 37 | CPU=HC12 38 | MainFrame=0,1,-1,-1,-1,-1,175,175,1255,800 39 | TOOLBAR=57600 57601 32795 0 57635 57634 57637 0 57671 57669 0 32777 32776 32782 32780 32781 32778 0 32806 40 | 41 | 42 | 43 | [HC12MultilinkCyclonePro_GDI_SETTINGS] 44 | CMDFILE0=CMDFILE STARTUP ON ".\cmd\P&E_Multilink_USB_startup.cmd" 45 | CMDFILE1=CMDFILE RESET ON ".\cmd\P&E_Multilink_USB_reset.cmd" 46 | CMDFILE2=CMDFILE PRELOAD ON ".\cmd\P&E_Multilink_USB_preload.cmd" 47 | CMDFILE3=CMDFILE POSTLOAD ON ".\cmd\P&E_Multilink_USB_postload.cmd" 48 | CMDFILE4=CMDFILE VPPON ON ".\cmd\P&E_Multilink_USB_vppon.cmd" 49 | CMDFILE5=CMDFILE VPPOFF ON ".\cmd\P&E_Multilink_USB_vppoff.cmd" 50 | CMDFILE6=CMDFILE UNSECURE ON ".\cmd\P&E_Multilink_USB_erase_unsecure_hcs12p.cmd" 51 | MCUID=0x01C2 52 | NV_PARAMETER_FILE= 53 | NV_SAVE_WSP=0 54 | NV_AUTO_ID=1 55 | 56 | 57 | 58 | 59 | [ICD12] 60 | COMSETTINGS=SETCOMM DRIVER NOPROTOCOL NOPERIODICAL 61 | SETCLKSW=0 62 | HOTPLUGGING=0 63 | DETECTRUNNING=0 64 | RESYNCONCOPRESET=0 65 | BDMAutoSpeed=1 66 | BDMClockSpeed=0 67 | HIGHIODELAYCONSTFORPLL=40 68 | 69 | [PORT] 70 | IP= 71 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # UDSDemo 2 | 1.A Demo code of UDS on freesacle s12g128,may be useful to you 3 | 技术支持：+微信a17308384817 4 | contact me on weichart(a17308384817) if you need help 5 | -------------------------------------------------------------------------------- /SI/DiagnosticDemo.IAB: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ukign/UDSDemo/a6c9713873e49af6dd21765209f2cd0de124066c/SI/DiagnosticDemo.IAB -------------------------------------------------------------------------------- /SI/DiagnosticDemo.IAD: -------------------------------------------------------------------------------- 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-------------------------------------------------------------------------------- /SI/DiagnosticDemo.PS: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ukign/UDSDemo/a6c9713873e49af6dd21765209f2cd0de124066c/SI/DiagnosticDemo.PS -------------------------------------------------------------------------------- /SI/DiagnosticDemo.SearchResults: -------------------------------------------------------------------------------- 1 | ---- MAX_EXTENDED_DATA_NUMBER Matches (3 in 2 files) ---- 2 | Diagnostic.c (d:\workspace\ukign\diagnosticdemo\diagnostic)://static Snapshot ExtendedData[MAX_EXTENDED_DATA_NUMBER]; 3 | Diagnostic.c (d:\workspace\ukign\diagnosticdemo\diagnostic): if(ExtendedDataAdded < MAX_EXTENDED_DATA_NUMBER) 4 | Diagnostic.h (d:\workspace\ukign\diagnosticdemo\diagnostic):#define MAX_EXTENDED_DATA_NUMBER 5// 5 | -------------------------------------------------------------------------------- /SI/DiagnosticDemo.WK3: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ukign/UDSDemo/a6c9713873e49af6dd21765209f2cd0de124066c/SI/DiagnosticDemo.WK3 -------------------------------------------------------------------------------- /Sources/Start12.c: -------------------------------------------------------------------------------- 1 | /***************************************************** 2 | start12.c - standard startup code 3 | The startup code may be optimized to special user requests 4 | ---------------------------------------------------- 5 | Copyright (c) Metrowerks, Basel, Switzerland 6 | All rights reserved 7 | 8 | Note: ROM libraries are not implemented in this startup code 9 | Note: C++ destructors of global objects are NOT yet supported in the HIWARE Object File Format. 10 | To use this feature, please build your application with the ELF object file format. 11 | *****************************************************/ 12 | /* these macros remove some unused fields in the startup descriptor */ 13 | #define __NO_FLAGS_OFFSET /* we do not need the flags field in the startup data descriptor */ 14 | #define __NO_MAIN_OFFSET /* we do not need the main field in the startup data descriptor */ 15 | #define __NO_STACKOFFSET_OFFSET /* we do not need the stackOffset field in the startup data descriptor */ 16 | 17 | /*#define __BANKED_COPY_DOWN : allow to allocate .copy in flash area */ 18 | #if defined(__BANKED_COPY_DOWN) && (!defined(__HCS12X__) || !defined(__ELF_OBJECT_FILE_FORMAT__)) 19 | #error /* the __BANKED_COPY_DOWN switch is only supported for the HCS12X with ELF */ 20 | /* (and not for the HC12, HCS12 or for the HIWARE object file format) */ 21 | #endif 22 | 23 | #include "hidef.h" 24 | #include "start12.h" 25 | 26 | /***************************************************************************/ 27 | /* Macros to control how the startup code handles the COP: */ 28 | /* #define _DO_FEED_COP_ : do feed the COP */ 29 | /* #define _DO_ENABLE_COP_: do enable the COP */ 30 | /* #define _DO_DISABLE_COP_: disable the COP */ 31 | /* Without defining any of these, the startup code does NOT handle the COP */ 32 | /***************************************************************************/ 33 | /* __ONLY_INIT_SP define: */ 34 | /* This define selects an shorter version of the startup code */ 35 | /* which only loads the stack pointer and directly afterwards calls */ 36 | /* main. This version does however NOT initialized global variables */ 37 | /* (So this version is not ANSI compliant!) */ 38 | /***************************************************************************/ 39 | /* __FAR_DATA define: */ 40 | /* By default, the startup code only supports to initialize the default */ 41 | /* kind of memory. If some memory is allocated far in the small or banked */ 42 | /* memory model, then the startup code only supports to initialize this */ 43 | /* memory blocks if __FAR_DATA is defined. If __FAR_DATA is not defined, */ 44 | /* then the linker will issue a message like */ 45 | /* "L1128: Cutting value _Range beg data member from 0xF01000 to 0x1000" */ 46 | /* and this startup code writes to the cutted address */ 47 | /***************************************************************************/ 48 | /* __BANKED_COPY_DOWN define: */ 49 | /* by default, the startup code assumes that the startup data structure */ 50 | /* _startupData, the zero out areas and the .copy section are all */ 51 | /* allocated in NON_BANKED memory. Especially the .copy section can be */ 52 | /* huge if there are many or huge RAM areas to initialize. */ 53 | /* For the HCS12X, which also copies the XGATE RAM located code via .copy */ 54 | /* section, the startup code supports to allocate .copy in a banked flash */ 55 | /* The placement of .copy in the prm file has to be adapted when adding or */ 56 | /* removing the this macro. */ 57 | /* Note: This macro is only supported for the HCS12X and when using ELF */ 58 | /***************************************************************************/ 59 | 60 | #ifdef __cplusplus 61 | #define __EXTERN_C extern "C" 62 | #else 63 | #define __EXTERN_C 64 | #endif 65 | 66 | /*lint -estring(961,"only preprocessor statements and comments before '#include'") , MISRA 19.1 ADV, non_bank.sgm and default.sgm each contain a conditionally compiled CODE_SEG pragma */ 67 | 68 | __EXTERN_C void main(void); /* prototype of main function */ 69 | 70 | #ifndef __ONLY_INIT_SP 71 | #pragma DATA_SEG __NEAR_SEG STARTUP_DATA /* _startupData can be accessed using 16 bit accesses. */ 72 | /* This is needed because it contains the stack top, and without stack, far data cannot be accessed */ 73 | struct _tagStartup _startupData; /* read-only: */ 74 | /* _startupData is allocated in ROM and */ 75 | /* initialized by the linker */ 76 | #pragma DATA_SEG DEFAULT 77 | #endif /* __ONLY_INIT_SP */ 78 | 79 | #if defined(FAR_DATA) && (!defined(__HCS12X__) || defined(__BANKED_COPY_DOWN)) 80 | /*lint -e451 non_bank.sgm contains a conditionally compiled CODE_SEG pragma */ 81 | #include "non_bank.sgm" 82 | /*lint +e451 */ 83 | 84 | /* the init function must be in non banked memory if banked variables are used */ 85 | /* because _SET_PAGE is called, which may change any page register. */ 86 | 87 | /*lint -esym(752,_SET_PAGE) , symbol '_SET_PAGE' is referenced in HLI */ 88 | __EXTERN_C void _SET_PAGE(void); /* the inline assembler needs a prototype */ 89 | /* this is a runtime routine with a special */ 90 | /* calling convention, do not use it in c code! */ 91 | #else 92 | /*lint -e451 default.sgm contains a conditionally compiled CODE_SEG pragma */ 93 | #include "default.sgm" 94 | /*lint +e451 */ 95 | #endif /* defined(FAR_DATA) && (!defined(__HCS12X__) || defined(__BANKED_COPY_DOWN)) */ 96 | 97 | 98 | /* define value and bits for Windef Register */ 99 | #ifdef HC812A4 100 | #define WINDEF (*(volatile unsigned char*) 0x37) 101 | #if defined( __BANKED__) || defined(__LARGE__) || defined(__PPAGE__) 102 | #define __ENABLE_PPAGE__ 0x40 103 | #else 104 | #define __ENABLE_PPAGE__ 0x0 105 | #endif 106 | #if defined(__DPAGE__) 107 | #define __ENABLE_DPAGE__ 0x80 108 | #else 109 | #define __ENABLE_DPAGE__ 0x0 110 | #endif 111 | #if defined(__EPAGE__) 112 | #define __ENABLE_EPAGE__ 0x20 113 | #else 114 | #define __ENABLE_EPAGE__ 0x0 115 | #endif 116 | #endif /* HC812A4 */ 117 | 118 | #ifdef _HCS12_SERIALMON 119 | /* for Monitor based software remap the RAM & EEPROM to adhere 120 | to EB386. Edit RAM and EEPROM sections in PRM file to match these. */ 121 | #define ___INITRM (*(volatile unsigned char *) 0x0010) 122 | #define ___INITRG (*(volatile unsigned char *) 0x0011) 123 | #define ___INITEE (*(volatile unsigned char *) 0x0012) 124 | #endif 125 | 126 | #if defined(_DO_FEED_COP_) 127 | #define __FEED_COP_IN_HLI() } asm movb #0x55, _COP_RST_ADR; asm movb #0xAA, _COP_RST_ADR; asm { 128 | #else 129 | #define __FEED_COP_IN_HLI() /* do nothing */ 130 | #endif 131 | 132 | #ifndef __ONLY_INIT_SP 133 | #if (!defined(FAR_DATA) || defined(__HCS12X__)) && (defined( __BANKED__) || defined(__LARGE__) || defined(__BANKED_COPY_DOWN)) 134 | static void __far Init(void) 135 | #else 136 | static void Init(void) 137 | #endif 138 | { 139 | /* purpose: 1) zero out RAM-areas where data is allocated */ 140 | /* 2) copy initialization data from ROM to RAM */ 141 | /* 3) call global constructors in C++ */ 142 | /* called from: _Startup, LibInits */ 143 | asm { 144 | ZeroOut: 145 | #if defined(__HIWARE_OBJECT_FILE_FORMAT__) && defined(__LARGE__) 146 | LDX _startupData.pZeroOut:1 ; in the large memory model in the HIWARE format, pZeroOut is a 24 bit pointer 147 | #else 148 | LDX _startupData.pZeroOut ; *pZeroOut 149 | #endif 150 | LDY _startupData.nofZeroOuts ; nofZeroOuts 151 | BEQ CopyDown ; if nothing to zero out 152 | 153 | NextZeroOut: PSHY ; save nofZeroOuts 154 | #if defined(FAR_DATA) 155 | LDAB 1,X+ ; load page of destination address 156 | LDY 2,X+ ; load offset of destination address 157 | #if defined(__HCS12X__) 158 | STAB __GPAGE_ADR__ 159 | #else /* defined(__HCS12X__) */ 160 | __PIC_JSR(_SET_PAGE) ; sets the page in the correct page register 161 | #endif /* defined(__HCS12X__) */ 162 | #else /* FAR_DATA */ 163 | LDY 2,X+ ; start address and advance *pZeroOut (X = X+4) 164 | #endif /* FAR_DATA */ 165 | 166 | #if defined(__HCS12X__) && defined(FAR_DATA) 167 | PSHX 168 | LDX 0,X ; byte count 169 | #if defined(__OPTIMIZE_FOR_SIZE__) 170 | CLRA 171 | NextWord: GSTAA 1,Y+ ; clear memory byte 172 | __FEED_COP_IN_HLI() ; feed the COP if necessary /*lint !e505 !e522 asm code */ 173 | DBNE X, NextWord ; dec byte count 174 | #else 175 | LDD #0 176 | LSRX 177 | BEQ LoopClrW1 ; do we copy more than 1 byte? 178 | NextWord: GSTD 2,Y+ ; clear memory word 179 | __FEED_COP_IN_HLI() ; feed the COP if necessary /*lint !e505 !e522 asm code */ 180 | DBNE X, NextWord ; dec word count 181 | LoopClrW1: 182 | BCC LastClr ; handle last byte 183 | GSTAA 1,Y+ ; handle last byte 184 | LastClr: 185 | #endif 186 | PULX 187 | LEAX 2,X 188 | #elif defined(__OPTIMIZE_FOR_SIZE__) /* -os, default */ 189 | LDD 2,X+ ; byte count 190 | NextWord: CLR 1,Y+ ; clear memory byte 191 | __FEED_COP_IN_HLI() ; feed the COP if necessary /*lint !e505 !e522 asm code */ 192 | DBNE D, NextWord ; dec byte count 193 | #else /* __OPTIMIZE_FOR_TIME__ */ 194 | LDD 2,X+ ; byte count 195 | LSRD ; /2 and save bit 0 in the carry 196 | BEQ LoopClrW1 ; do we copy more than 1 byte? 197 | PSHX 198 | LDX #0 199 | LoopClrW: STX 2,Y+ ; Word-Clear 200 | __FEED_COP_IN_HLI() ; feed the COP if necessary /*lint !e505 !e522 asm code */ 201 | DBNE D, LoopClrW 202 | PULX 203 | LoopClrW1: 204 | BCC LastClr ; handle last byte 205 | CLR 1,Y+ 206 | LastClr: 207 | #endif /* __OPTIMIZE_FOR_SIZE__/__OPTIMIZE_FOR_TIME__ */ 208 | PULY ; restore nofZeroOuts 209 | DEY ; dec nofZeroOuts 210 | BNE NextZeroOut 211 | CopyDown: 212 | #if defined(__BANKED_COPY_DOWN) 213 | LDAA _startupData.toCopyDownBeg:0 ; get PAGE address of .copy section 214 | STAA __PPAGE_ADR__ ; set PPAGE address 215 | LDX _startupData.toCopyDownBeg:1 ; load address of copy down desc. 216 | #elif defined(__ELF_OBJECT_FILE_FORMAT__) 217 | LDX _startupData.toCopyDownBeg ; load address of copy down desc. 218 | #else 219 | LDX _startupData.toCopyDownBeg:2 ; load address of copy down desc. 220 | #endif 221 | NextBlock: 222 | LDD 2,X+ ; size of init-data -> D 223 | BEQ funcInits ; end of copy down desc. 224 | #ifdef FAR_DATA 225 | PSHD ; save counter 226 | LDAB 1,X+ ; load destination page 227 | LDY 2,X+ ; destination address 228 | #if defined(__HCS12X__) 229 | STAB __GPAGE_ADR__ 230 | #else /* __HCS12X__ */ 231 | __PIC_JSR(_SET_PAGE) ; sets the destinations page register 232 | #endif /* __HCS12X__ */ 233 | PULD ; restore counter 234 | #else /* FAR_DATA */ 235 | LDY 2,X+ ; load destination address 236 | #endif /* FAR_DATA */ 237 | 238 | #if defined(__HCS12X__) && defined(FAR_DATA) 239 | #if defined(__OPTIMIZE_FOR_SIZE__) /* -os, default */ 240 | Copy: PSHA 241 | LDAA 1,X+ 242 | GSTAA 1,Y+ ; move a byte from ROM to the data area 243 | PULA 244 | __FEED_COP_IN_HLI() ; feed the COP if necessary /*lint !e505 !e522 asm code */ 245 | DBNE D,Copy ; copy-byte loop 246 | #else 247 | LSRD ; /2 and save bit 0 in the carry 248 | BEQ Copy1 ; do we copy more than 1 byte? 249 | 250 | Copy: PSHD 251 | LDD 2,X+ 252 | GSTD 2,Y+ ; move a word from ROM to the data area 253 | PULD 254 | __FEED_COP_IN_HLI() ; feed the COP if necessary /*lint !e505 !e522 asm code */ 255 | DBNE D,Copy ; copy-word loop 256 | Copy1: 257 | BCC NextBlock ; handle last byte? 258 | LDAA 1,X+ 259 | GSTAA 1,Y+ ; move a byte from ROM to the data area 260 | #endif 261 | #elif defined(__OPTIMIZE_FOR_SIZE__) /* -os, default */ 262 | Copy: MOVB 1,X+,1,Y+ ; move a byte from ROM to the data area 263 | __FEED_COP_IN_HLI() ; feed the COP if necessary /*lint !e505 !e522 asm code */ 264 | DBNE D,Copy ; copy-byte loop 265 | #else /* __OPTIMIZE_FOR_TIME__ */ 266 | LSRD ; /2 and save bit 0 in the carry 267 | BEQ Copy1 ; do we copy more than 1 byte? 268 | Copy: MOVW 2,X+,2,Y+ ; move a word from ROM to the data area 269 | __FEED_COP_IN_HLI() ; feed the COP if necessary /*lint !e505 !e522 asm code */ 270 | DBNE D,Copy ; copy-word loop 271 | Copy1: 272 | BCC NextBlock ; handle last byte? 273 | MOVB 1,X+,1,Y+ ; copy the last byte 274 | #endif /* __OPTIMIZE_FOR_SIZE__/__OPTIMIZE_FOR_TIME__ */ 275 | BRA NextBlock 276 | funcInits: ; call of global construtors is only in c++ necessary 277 | #if defined(__cplusplus) 278 | #if defined(__ELF_OBJECT_FILE_FORMAT__) 279 | #if defined( __BANKED__) || defined(__LARGE__) 280 | LDY _startupData.nofInitBodies; load number of cpp. 281 | BEQ done ; if cppcount == 0, goto done 282 | LDX _startupData.initBodies ; load address of first module to initialize 283 | nextInit: 284 | LEAX 3,X ; increment to next init 285 | PSHX ; save address of next function to initialize 286 | PSHY ; save cpp counter 287 | CALL [-3,X] ; use double indirect call to load the page register also 288 | PULY ; restore cpp counter 289 | PULX ; restore actual address 290 | DEY ; decrement cpp counter 291 | BNE nextInit 292 | #else /* defined( __BANKED__) || defined(__LARGE__) */ 293 | 294 | LDD _startupData.nofInitBodies; load number of cpp. 295 | BEQ done ; if cppcount == 0, goto done 296 | LDX _startupData.initBodies ; load address of first module to initialize 297 | nextInit: 298 | LDY 2,X+ ; load address of first module to initialize 299 | PSHD 300 | PSHX ; save actual address 301 | JSR 0,Y ; call initialization function 302 | PULX ; restore actual address 303 | PULD ; restore cpp counter 304 | DBNE D, nextInit 305 | #endif /* defined( __BANKED__) || defined(__LARGE__) */ 306 | #else /* __ELF_OBJECT_FILE_FORMAT__ */ 307 | LDX _startupData.mInits ; load address of first module to initialize 308 | #if defined( __BANKED__) || defined(__LARGE__) 309 | nextInit: LDY 3,X+ ; load address of initialization function 310 | BEQ done ; stop when address == 0 311 | ; in common environments the offset of a function is never 0, so this test could be avoided 312 | #ifdef __InitFunctionsMayHaveOffset0__ 313 | BRCLR -1,X, done, 0xff ; stop when address == 0 314 | #endif /* __InitFunctionsMayHaveOffset0__ */ 315 | PSHX ; save address of next function to initialize 316 | CALL [-3,X] ; use double indirect call to load the page register also 317 | #else /* defined( __BANKED__) || defined(__LARGE__) */ 318 | nextInit: 319 | LDY 2,X+ ; load address of first module to initialize 320 | BEQ done ; stop when address of function == 0 321 | PSHX ; save actual address 322 | JSR 0,Y ; call initialization function 323 | #endif /* defined( __BANKED__) || defined(__LARGE__) */ 324 | PULX ; restore actual address 325 | BRA nextInit 326 | #endif /* __ELF_OBJECT_FILE_FORMAT__ */ 327 | done: 328 | #endif /* __cplusplus */ 329 | } 330 | } 331 | #endif /* __ONLY_INIT_SP */ 332 | 333 | #if defined( __ELF_OBJECT_FILE_FORMAT__) && defined(__cplusplus ) && 0 /* the call to main does not support to return anymore */ 334 | 335 | #if !defined(FAR_DATA) && (defined( __BANKED__) || defined(__LARGE__)) 336 | static void __far Fini(void) 337 | #else 338 | static void Fini(void) 339 | #endif 340 | { 341 | /* purpose: 1) call global destructors in C++ */ 342 | asm { 343 | #if defined( __BANKED__) || defined(__LARGE__) 344 | 345 | LDY _startupData.nofFiniBodies; load number of cpp. 346 | BEQ done ; if cppcount == 0, goto done 347 | LDX _startupData.finiBodies ; load address of first module to finalize 348 | nextInit2: 349 | LEAX 3,X ; increment to next init 350 | PSHX ; save address of next function to finalize 351 | PSHY ; save cpp counter 352 | CALL [-3,X] ; use double indirect call to load the page register also 353 | PULY ; restore cpp counter 354 | PULX ; restore actual address 355 | DEY ; decrement cpp counter 356 | BNE nextInit2 357 | #else /* defined( __BANKED__) || defined(__LARGE__) */ 358 | 359 | LDD _startupData.nofFiniBodies; load number of cpp. 360 | BEQ done ; if cppcount == 0, goto done 361 | LDX _startupData.finiBodies ; load address of first module to finalize 362 | nextInit2: 363 | LDY 2,X+ ; load address of first module to finalize 364 | PSHD 365 | PSHX ; save actual address 366 | JSR 0,Y ; call finalize function 367 | PULX ; restore actual address 368 | PULD ; restore cpp counter 369 | DBNE D, nextInit2 370 | #endif /* defined(__BANKED__) || defined(__LARGE__) */ 371 | done:; 372 | } 373 | } 374 | #endif 375 | 376 | /*lint -e451 non_bank.sgm contains a conditionally compiled CODE_SEG pragma */ 377 | #include "non_bank.sgm" 378 | /*lint +e451 */ 379 | 380 | #pragma MESSAGE DISABLE C12053 /* Stack-pointer change not in debugging-information */ 381 | #pragma NO_FRAME 382 | #pragma NO_ENTRY 383 | #if !defined(__SMALL__) 384 | #pragma NO_EXIT 385 | #endif 386 | 387 | /* The function _Startup must be called in order to initialize global variables and to call main */ 388 | /* You can adapt this function or call it from your startup code to implement a different startup */ 389 | /* functionality. */ 390 | 391 | /* You should also setup the needed IO registers as WINDEF (HC12A4 only) or the COP registers to run */ 392 | /* on hardware */ 393 | 394 | /* to set the reset vector several ways are possible : */ 395 | /* 1. define the function with "interrupt 0" as done below in the first case */ 396 | /* 2. add the following line to your prm file : VECTOR ADDRESS 0xfffe _Startup */ 397 | /* of course, even more posibilities exists */ 398 | /* the reset vector must be set so that the application has a defined entry point */ 399 | 400 | #if defined(__SET_RESET_VECTOR__) 401 | __EXTERN_C void __interrupt 0 _Startup(void) { 402 | #else 403 | __EXTERN_C void _Startup(void) { 404 | #endif 405 | /* purpose: 1) initialize the stack 406 | 2) initialize the RAM, copy down init data etc (Init) 407 | 3) call main; 408 | parameters: NONE 409 | called from: _PRESTART-code generated by the Linker 410 | or directly referenced by the reset vector */ 411 | 412 | /* initialize the stack pointer */ 413 | /*lint -e{960} , MISRA 14.3 REQ, macro INIT_SP_FROM_STARTUP_DESC() expands to HLI code */ 414 | /*lint -e{522} , MISRA 14.2 REQ, macro INIT_SP_FROM_STARTUP_DESC() expands to HLI code */ 415 | INIT_SP_FROM_STARTUP_DESC(); /* HLI macro definition in hidef.h */ 416 | #if defined(_HCS12_SERIALMON) 417 | /* for Monitor based software remap the RAM & EEPROM to adhere 418 | to EB386. Edit RAM and EEPROM sections in PRM file to match these. */ 419 | ___INITRG = 0x00; /* lock registers block to 0x0000 */ 420 | ___INITRM = 0x39; /* lock Ram to end at 0x3FFF */ 421 | ___INITEE = 0x09; /* lock EEPROM block to end at 0x0fff */ 422 | #endif 423 | 424 | /* Here user defined code could be inserted, the stack could be used */ 425 | #if defined(_DO_DISABLE_COP_) 426 | _DISABLE_COP(); 427 | #endif 428 | 429 | /* Example : Set up WinDef Register to allow Paging */ 430 | #ifdef HC812A4 /* HC12 A4 derivative needs WINDEF to configure which pages are available */ 431 | #if (__ENABLE_EPAGE__ != 0 || __ENABLE_DPAGE__ != 0 || __ENABLE_PPAGE__ != 0) 432 | WINDEF= __ENABLE_EPAGE__ | __ENABLE_DPAGE__ | __ENABLE_PPAGE__; 433 | #endif 434 | #endif 435 | 436 | #if (defined(__MAP_RAM__) || defined(__MAP_FLASH__) || defined(__MAP_EXTERNAL__)) && !defined(__DO_SET_MMCTL1__) 437 | #define __DO_SET_MMCTL1__ 438 | #endif 439 | 440 | 441 | #if defined(__DO_SET_MMCTL1__) 442 | /* Set the MMCTL1 byte. Please use for HCS12XE and change the bits according */ 443 | /* to your configuration. */ 444 | /* Note: MMCTL1 is write once therefore please adapt this initialization here. */ 445 | /* This has to be done prior to the call to Init. */ 446 | #define _MMCTL1_ADR (0x00000013) 447 | #define _MMCTL1_BIT_TGMRAMON (1<<7) /* EEE Tag RAM and FTM SCRATCH RAM visible in the memory map */ 448 | #define _MMCTL1_BIT_EEEIFRON (1<<5) /* EEE IFR visible in the memory map */ 449 | #define _MMCTL1_BIT_PGMIFRON (1<<4) /* Program IFR visible in the memory map */ 450 | #define _MMCTL1_BIT_RAMHM (1<<3) /* RAM only in the higher half of the memory map */ 451 | #define _MMCTL1_BIT_EROMON (1<<2) /* Enables emulated Flash or ROM memory in the memory map */ 452 | #define _MMCTL1_BIT_ROMHM (1<<1) /* FLASH or ROM only in higher Half of Memory Map */ 453 | #define _MMCTL1_BIT_ROMON (1<<0) /* Enable FLASH or ROM in the memory map */ 454 | 455 | #define _MMCTL1_SET(value) ((*(volatile unsigned char*)_MMCTL1_ADR)= (value)) 456 | 457 | #if defined(__MAP_FLASH__) 458 | _MMCTL1_SET(_MMCTL1_BIT_ROMON | _MMCTL1_BIT_EROMON); 459 | #elif defined(__MAP_EXTERNAL__) 460 | _MMCTL1_SET(_MMCTL1_BIT_ROMON | _MMCTL1_BIT_EROMON | _MMCTL1_BIT_ROMHM); 461 | #else /* RAM */ 462 | _MMCTL1_SET(_MMCTL1_BIT_ROMON | _MMCTL1_BIT_EROMON | _MMCTL1_BIT_RAMHM | _MMCTL1_BIT_ROMHM); 463 | #endif 464 | #endif 465 | 466 | #ifndef __ONLY_INIT_SP 467 | /*lint -e{522} , MISRA 14.2 REQ, function Init() contains HLI only */ 468 | Init(); /* zero out, copy down, call constructors */ 469 | #endif 470 | 471 | /* Here user defined code could be inserted, all global variables are initilized */ 472 | #if defined(_DO_ENABLE_COP_) 473 | _ENABLE_COP(1); 474 | #endif 475 | 476 | /* call main() */ 477 | main(); 478 | } 479 | 480 | /*lint --e{766} , non_bank.sgm is not a regular header file, it contains a conditionally compiled CODE_SEG pragma */ 481 | /*lint +estring(961,"only preprocessor statements and comments before '#include'") */ 482 | /*lint +e451 */ 483 | -------------------------------------------------------------------------------- /TBDML.ini: -------------------------------------------------------------------------------- 1 | [Environment Variables] 2 | GENPATH={Project}Sources;{Compiler}lib\hc12c\src;{Compiler}lib\hc12c\include;{Compiler}lib\hc12c\lib;{Compiler}lib\xgatec\src;{Compiler}lib\xgatec\include;{Compiler}lib\xgatec\lib 3 | LIBPATH={Compiler}lib\hc12c\include;{Compiler}lib\xgatec\include 4 | OBJPATH={Project}bin 5 | TEXTPATH={Project}bin 6 | ABSPATH={Project}bin 7 | 8 | [HI-WAVE] 9 | Target=TBDML 10 | Layout=C_layout.hwl 11 | LoadDialogOptions=AUTOERASEANDFLASH RUNANDSTOPAFTERLOAD="main" 12 | CPU=HC12 13 | AEFWarningDialog=FALSE 14 | MainFrame=2,3,-32000,-32000,-1,-1,200,200,1280,825 15 | TOOLBAR=57600 57601 32795 0 57635 57634 57637 0 57671 57669 0 32777 32776 32782 32780 32781 32778 0 32806 16 | 17 | 18 | 19 | 20 | [TBDML HCS12_GDI_SETTINGS] 21 | CMDFILE0=CMDFILE STARTUP ON ".\cmd\TBDML_startup.cmd" 22 | CMDFILE1=CMDFILE RESET ON ".\cmd\TBDML_reset.cmd" 23 | CMDFILE2=CMDFILE PRELOAD ON ".\cmd\TBDML_preload.cmd" 24 | CMDFILE3=CMDFILE POSTLOAD ON ".\cmd\TBDML_postload.cmd" 25 | CMDFILE4=CMDFILE VPPON ON ".\cmd\TBDML_vppon.cmd" 26 | CMDFILE5=CMDFILE VPPOFF ON ".\cmd\TBDML_vppoff.cmd" 27 | CMDFILE6=CMDFILE UNSECURE ON ".\cmd\TBDML_erase_unsecure_hcs12p.cmd" 28 | MCUID=0x01C2 29 | CHIPSECURE=CHIPSECURE SETUP 0xFF0F 0x3 0x2 30 | DBG0=DBG GENERAL DISARM_ON PROTECT_OFF ANALYZE_ON STEPATRUN_ON 31 | DBG1=DBG PREDEFINED SELECT 0 32 | DBG2=DBG PREDEFINED DBGENGINE TRACE ENABLE RECORDAFTER PUREPC 33 | NV_PARAMETER_FILE=D:\Freescale\CWS12v5.1\prog\FPP\mcu01C2.fpp 34 | NV_SAVE_WSP=0 35 | NV_AUTO_ID=1 36 | 37 | 38 | 39 | 40 | 41 | 42 | 43 | 44 | [TBDML] 45 | COMSETTINGS=SETCOMM DRIVER NOPROTOCOL NOPERIODICAL 46 | 47 | 48 | [Recent Applications File List] 49 | File0=D:\workspace\ukign\UDS\bin\Project.abs 50 | File1=D:\workspace\ukign\DiagnosticDemo\bin\Project.abs 51 | File2= 52 | File3= 53 | LoadFlags0=AUTOERASEANDFLASH RUNANDSTOPAFTERLOAD="main" 54 | LoadFlags1=AUTOERASEANDFLASH RUNANDSTOPAFTERLOAD="main" 55 | LoadFlags2= 56 | LoadFlags3= 57 | 58 | 59 | [Recent Layout File List] 60 | File0=C_layout.hwl 61 | File1= 62 | File2= 63 | File3= 64 | -------------------------------------------------------------------------------- /bin/Project.abs: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ukign/UDSDemo/a6c9713873e49af6dd21765209f2cd0de124066c/bin/Project.abs -------------------------------------------------------------------------------- /cmd/P&E_Multilink_USB_Erase_unsecure_hcs12p.cmd: -------------------------------------------------------------------------------- 1 | // ver 0.1 (09-Mar-08) 2 | // HCS12P Core erasing + unsecuring command file: 3 | // These commands mass erase the chip then program the security byte to 0xFE (unsecured state). 4 | 5 | DEFINEVALUEDLG "Information required to unsecure the device" "FCLKDIV" 17 "To unsecure the device, the command script needs \nthe correct value for the FCLKDIV onchip register.\n\nDatasheet proposed values:\n\noscillator frequency\tFCLKDIV value (decimal)\n\n 16 \tMHz\t\t17\n 12 \tMHz\t\t13\n 8 \tMHz\t\t9\n 4 \tMHz\t\t5\n" 6 | 7 | FLASH RELEASE 8 | 9 | reset 10 | wb 0x03c 0x00 //disable cop 11 | wait 20 12 | 13 | 14 | WB 0x100 FCLKDIV // clock divider 15 | 16 | WB 0x106 0x30 // clear any error flags 17 | WB 0x102 0x00 // CCOBIX = 0 18 | WB 0x10A 0x08 // load erase all blocks command 19 | WB 0x106 0x80 // launch command 20 | WAIT 10 21 | 22 | reset 23 | 24 | WB 0x100 FCLKDIV // clock divider 25 | WB 0x106 0x30 // clear any error flags 26 | WB 0x102 0x00 // CCOBIX = 0 27 | WB 0x10A 0x06 // load program command 28 | WB 0x10B 0x03 // load GPAGE 29 | WB 0x102 0x01 // CCOBIX = 1 30 | WB 0x10A 0xFF // load addr hi 31 | WB 0x10B 0x08 // load addr lo 32 | WB 0x102 0x02 // CCOBIX = 2 33 | WB 0x10A 0xFF // load data 34 | WB 0x10B 0xFF // load data 35 | WB 0x102 0x03 // CCOBIX = 3 36 | WB 0x10A 0xFF // load data 37 | WB 0x10B 0xFF // load data 38 | WB 0x102 0x04 // CCOBIX = 4 39 | WB 0x10A 0xFF // load data 40 | WB 0x10B 0xFF // load data 41 | WB 0x102 0x05 // CCOBIX = 5 42 | WB 0x10A 0xFF // load data 43 | WB 0x10B 0xFE // load data 44 | WB 0x106 0x80 // launch command 45 | WAIT 1 46 | 47 | undef FCLKDIV // undefine variable 48 | -------------------------------------------------------------------------------- /cmd/P&E_Multilink_USB_Postload.cmd: -------------------------------------------------------------------------------- 1 | // After load the commands written below will be executed 2 | -------------------------------------------------------------------------------- /cmd/P&E_Multilink_USB_Preload.cmd: -------------------------------------------------------------------------------- 1 | // Before load the commands written below will be executed 2 | -------------------------------------------------------------------------------- /cmd/P&E_Multilink_USB_Reset.cmd: -------------------------------------------------------------------------------- 1 | // After reset the commands written below will be executed 2 | -------------------------------------------------------------------------------- /cmd/P&E_Multilink_USB_Startup.cmd: -------------------------------------------------------------------------------- 1 | // At startup the commands written below will be executed 2 | -------------------------------------------------------------------------------- /cmd/P&E_Multilink_USB_Vppoff.cmd: -------------------------------------------------------------------------------- 1 | // After programming the flash, the commands written below will be executed 2 | -------------------------------------------------------------------------------- /cmd/P&E_Multilink_USB_Vppon.cmd: -------------------------------------------------------------------------------- 1 | // Before programming the flash, the commands written below will be executed 2 | -------------------------------------------------------------------------------- /cmd/TBDML_Erase_unsecure_hcs12p.cmd: -------------------------------------------------------------------------------- 1 | // ver 0.1 (09-Mar-08) 2 | // HCS12P Core erasing + unsecuring command file: 3 | // These commands mass erase the chip then program the security byte to 0xFE (unsecured state). 4 | 5 | DEFINEVALUEDLG "Information required to unsecure the device" "FCLKDIV" 17 "To unsecure the device, the command script needs \nthe correct value for the FCLKDIV onchip register.\n\nDatasheet proposed values:\n\noscillator frequency\tFCLKDIV value (decimal)\n\n 16 \tMHz\t\t17\n 12 \tMHz\t\t13\n 8 \tMHz\t\t9\n 4 \tMHz\t\t5\n" 6 | 7 | FLASH RELEASE 8 | 9 | reset 10 | wb 0x03c 0x00 //disable cop 11 | wait 20 12 | 13 | 14 | WB 0x100 FCLKDIV // clock divider 15 | 16 | WB 0x106 0x30 // clear any error flags 17 | WB 0x102 0x00 // CCOBIX = 0 18 | WB 0x10A 0x08 // load erase all blocks command 19 | WB 0x106 0x80 // launch command 20 | WAIT 10 21 | 22 | reset 23 | 24 | WB 0x100 FCLKDIV // clock divider 25 | WB 0x106 0x30 // clear any error flags 26 | WB 0x102 0x00 // CCOBIX = 0 27 | WB 0x10A 0x06 // load program command 28 | WB 0x10B 0x03 // load GPAGE 29 | WB 0x102 0x01 // CCOBIX = 1 30 | WB 0x10A 0xFF // load addr hi 31 | WB 0x10B 0x08 // load addr lo 32 | WB 0x102 0x02 // CCOBIX = 2 33 | WB 0x10A 0xFF // load data 34 | WB 0x10B 0xFF // load data 35 | WB 0x102 0x03 // CCOBIX = 3 36 | WB 0x10A 0xFF // load data 37 | WB 0x10B 0xFF // load data 38 | WB 0x102 0x04 // CCOBIX = 4 39 | WB 0x10A 0xFF // load data 40 | WB 0x10B 0xFF // load data 41 | WB 0x102 0x05 // CCOBIX = 5 42 | WB 0x10A 0xFF // load data 43 | WB 0x10B 0xFE // load data 44 | WB 0x106 0x80 // launch command 45 | WAIT 1 46 | 47 | undef FCLKDIV // undefine variable 48 | -------------------------------------------------------------------------------- /cmd/TBDML_Postload.cmd: -------------------------------------------------------------------------------- 1 | // After load the commands written below will be executed 2 | -------------------------------------------------------------------------------- /cmd/TBDML_Preload.cmd: -------------------------------------------------------------------------------- 1 | // Before load the commands written below will be executed 2 | -------------------------------------------------------------------------------- /cmd/TBDML_Reset.cmd: -------------------------------------------------------------------------------- 1 | // After reset the commands written below will be executed 2 | -------------------------------------------------------------------------------- /cmd/TBDML_Startup.cmd: -------------------------------------------------------------------------------- 1 | // At startup the commands written below will be executed 2 | -------------------------------------------------------------------------------- /cmd/TBDML_Vppoff.cmd: -------------------------------------------------------------------------------- 1 | // After programming the flash, the commands written below will be executed 2 | -------------------------------------------------------------------------------- /cmd/TBDML_Vppon.cmd: -------------------------------------------------------------------------------- 1 | // Before programming the flash, the commands written below will be executed 2 | -------------------------------------------------------------------------------- /diagnostic/Diagnostic.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ukign/UDSDemo/a6c9713873e49af6dd21765209f2cd0de124066c/diagnostic/Diagnostic.c -------------------------------------------------------------------------------- /diagnostic/DiagnosticTimer.c: -------------------------------------------------------------------------------- 1 | 2 | #include "DiagnosticTimer.h" 3 | 4 | /** @defgroup Private_TypesDefinitions 5 | * @{ 6 | */ 7 | /** 8 | * @} 9 | */ 10 | 11 | 12 | /** @defgroup Private_Defines 13 | * @{ 14 | */ 15 | /** 16 | * @} 17 | */ 18 | 19 | 20 | /** @defgroup Private_Macros 21 | * @{ 22 | */ 23 | /** 24 | * @} 25 | */ 26 | 27 | 28 | /** @defgroup Private_Variables 29 | * @{ 30 | */ 31 | static uint32_t SystemTickCount=0; 32 | /** 33 | * @} 34 | */ 35 | 36 | 37 | /** @defgroup Private_FunctionPrototypes 38 | * @{ 39 | */ 40 | /** 41 | * @} 42 | */ 43 | 44 | 45 | /** @defgroup Private_Functions 46 | * @{ 47 | */ 48 | 49 | /** 50 | * @brief Init Timer. 51 | * @param None. 52 | * @retval None. 53 | */ 54 | void DiagTimer_Init(void) 55 | { 56 | 57 | } 58 | 59 | void DiagTimer_Set(DiagTimer *STimer, uint32_t TimeLength) 60 | { 61 | STimer->TimerCounter = SystemTickCount + TimeLength; 62 | STimer->valid = TRUE; 63 | } 64 | 65 | 66 | void DiagTimer_Stop(DiagTimer *STimer) 67 | { 68 | STimer->valid = FALSE; 69 | } 70 | 71 | 72 | bool DiagTimer_HasStopped(DiagTimer *STimer) 73 | { 74 | return (STimer->valid == FALSE); 75 | } 76 | 77 | 78 | bool DiagTimer_HasExpired(DiagTimer *STimer) 79 | { 80 | if(STimer->valid == TRUE) 81 | { 82 | if(STimer->TimerCounter == 0) 83 | { 84 | STimer->valid = FALSE; 85 | return TRUE; 86 | } 87 | else if((SystemTickCount - STimer->TimerCounter) <= 0x7fffffff) 88 | { 89 | STimer->TimerCounter = 0; //set timer to stop 90 | STimer->valid = FALSE; 91 | return TRUE; 92 | } 93 | else 94 | { 95 | return FALSE; 96 | } 97 | } 98 | else 99 | { 100 | return FALSE; 101 | } 102 | } 103 | 104 | 105 | void DiagTimer_WaitExpired(DiagTimer *STimer) 106 | { 107 | while(1) 108 | { 109 | if(Timer_HasExpired(STimer)) 110 | break; 111 | //WatchDog_Feed(); 112 | } 113 | } 114 | 115 | 116 | void DiagTimer_DelayMs(uint32_t ms) 117 | { 118 | uint32_t timer; 119 | 120 | Timer_Set (&timer, ms); 121 | while (!Timer_HasExpired (&timer)) 122 | { 123 | //__ASM volatile ("nop"); 124 | //WatchDog_Feed(); 125 | } 126 | } 127 | 128 | void DiagTimer_DelayUs(uint32_t us) 129 | { 130 | uint32_t i=0; 131 | 132 | for(i=0;i> 16U); /* High address word */ 43 | FCCOBIX++; /* Shift index register */ 44 | FCCOB = (word)PhraseAddr; /* Low address word */ 45 | for(j = 0U;j < 8U;j+=2U) { 46 | FCCOBIX++; /* Shift index register */ 47 | FCCOB = *(const word*)(Data + (i/2U)); /* Load new data */ 48 | i += 2U; 49 | if(i >= To) {break;} 50 | } 51 | FSTAT = 0x80U; /* Clear flag command buffer empty */ 52 | while (FSTAT_CCIF == 0U) {} /* Wait to command complete */ 53 | if ((FSTAT & 0x30U) != 0U) { /* Is protection violation or acces error detected ? */ 54 | return ERR_NOTAVAIL; /* If yes then error */ 55 | } 56 | if (FSTAT_MGSTAT) { /* Was attempt to write data to the given address errorneous? */ 57 | err = 1U; /* If yes then mark an error */ 58 | } 59 | PhraseAddr += 8U; 60 | } 61 | if(err != 0U) { 62 | return ERR_VALUE; /* If yes then error */ 63 | } 64 | return ERR_OK; /* OK */ 65 | } 66 | 67 | 68 | static byte EraseSectorInternal(EEPROM_TAddress Addr) 69 | { 70 | if (FSTAT_CCIF == 0U) { /* Is command complete ? */ 71 | return ERR_BUSY; /* If yes then error */ 72 | } 73 | /* FSTAT: ACCERR=1,FPVIOL=1 */ 74 | FSTAT = 0x30U; /* Clear error flags */ 75 | FCCOBIX = 0U; /* Clear index register */ 76 | FCCOBHI = 0x12U; /* Erase D-Flash sector command */ 77 | FCCOBLO = (byte)(((dword)Addr) >> 16); /* High address word */ 78 | FCCOBIX++; /* Shift index register */ 79 | FCCOB = (word)(((dword)Addr) & 0xFFFFFFFEUL); /* Low address word aligned to word*/ 80 | FSTAT = 0x80U; /* Clear flag command buffer empty */ 81 | while (FSTAT_CCIF == 0U) {} /* Wait to command complete */ 82 | if ((FSTAT & 0x23U) != 0U) { /* Is access error or other error detected ? */ 83 | return ERR_NOTAVAIL; /* If yes then error */ 84 | } 85 | return ERR_OK; /* OK */ 86 | } 87 | 88 | static byte WriteWord(EEPROM_TAddress AddrRow,word Data16) 89 | { 90 | if (FSTAT_CCIF == 0U) { /* Is previous command in process ? */ 91 | return ERR_BUSY; /* If yes then error */ 92 | } 93 | /* FSTAT: ACCERR=1,FPVIOL=1 */ 94 | FSTAT = 0x30U; /* Clear error flags */ 95 | FCCOBIX = 0U; /* Clear index register */ 96 | FCCOBHI = 0x11U; /* Program D-Flash command */ 97 | FCCOBLO = (byte)(((dword)AddrRow) >> 16); /* High address word */ 98 | FCCOBIX++; /* Shift index register */ 99 | FCCOB = (word)((dword)AddrRow); /* Low address word */ 100 | FCCOBIX++; /* Shift index register */ 101 | FCCOB = Data16; /* Load new data */ 102 | FSTAT = 0x80U; /* Clear flag command complete */ 103 | if ((FSTAT & 0x30U) != 0U) { /* Is protection violation or acces error detected ? */ 104 | return ERR_NOTAVAIL; /* If yes then error */ 105 | } 106 | while (!FSTAT_CCIF) {} /* Wait for command completition */ 107 | if (FSTAT_MGSTAT) { /* Was attempt to write data to the given address errorneous? */ 108 | return ERR_VALUE; /* If yes then error */ 109 | } 110 | return ERR_OK; 111 | } 112 | 113 | byte EEProm_SetByte(EEPROM_TAddress Addr,byte Data) 114 | { 115 | byte err; 116 | word Data16; 117 | EEPROM_TAddress SecAddr; /* EEPROM Sector address */ 118 | 119 | if(!EEPromEnMode) { /* Is the device disabled in the actual speed CPU mode? */ 120 | return ERR_SPEED; /* If yes then error */ 121 | } 122 | if(((dword)Addr < (dword)EEPROM_AREA_START) || ((dword)Addr > (dword)EEPROM_AREA_END)) { /* Is given address out of EEPROM area array ? */ 123 | return ERR_RANGE; /* If yes then error */ 124 | } 125 | if(!FSTAT_CCIF) { /* Is reading from EEPROM possible? */ 126 | return ERR_BUSY; /* If no then error */ 127 | } 128 | SecAddr = (EEPROM_TAddress)((dword)Addr & 0x00FFFFFEUL); /* Aligned word address */ 129 | if (*((word *far)EEGlobalToLocal(SecAddr)) == 0xFFFFU) { /* Is the word erased? */ 130 | if (((dword)Addr) & 1U) { /* Not Aligned word ? */ 131 | return(WriteWord(SecAddr, ((*((word *far)EEGlobalToLocal(SecAddr)) & 0xFF00U) | Data))); 132 | } else { 133 | return(WriteWord(Addr, (((word)Data << 8) | (*(((byte *far)EEGlobalToLocal(Addr)) + 1U))))); /* Aligned word ? */ 134 | } 135 | } else { /* Is given address non-erased ? */ 136 | SecAddr = (EEPROM_TAddress)((dword)Addr & 0x00FFFFFCUL); /* Sector Aligned address */ 137 | BackupSector(SecAddr, 0U, 0x04U); /* Backup sector */ 138 | Data16 = EEBackupArray[(((dword)Addr) % 0x04U) / 2U]; /* Store new data to backup array*/ 139 | if (((dword)Addr) & 1U) { /* Not Aligned word ? */ 140 | Data16 = (Data16 & 0xFF00U) | Data; 141 | } else { 142 | Data16 = ((word)Data << 8) | (Data16 & 0xFFU); 143 | } 144 | EEBackupArray[(((dword)Addr) % 0x04U) / 2U] = Data16; /* Write new data to saved sector */ 145 | err = EraseSectorInternal(Addr); /* Erase sector */ 146 | if(err != 0U) { 147 | return(err); /* Return error code if previous operation finished not correctly */ 148 | } 149 | err = WriteBlock(SecAddr, 0U, 0x04U,EEBackupArray); /* Restore sector */ 150 | return(err); 151 | } 152 | } 153 | 154 | byte EEProm_GetByte(EEPROM_TAddress Addr,byte *Data) 155 | { 156 | if(((dword)Addr < (dword)EEPROM_AREA_START) || ((dword)Addr > (dword)EEPROM_AREA_END)) { /* Is given address out of EEPROM area array ? */ 157 | return ERR_RANGE; /* If yes then error */ 158 | } 159 | if(!FSTAT_CCIF) { /* Is reading from EEPROM possible? */ 160 | return ERR_BUSY; /* If no then error */ 161 | } 162 | *Data = *((byte *far)EEGlobalToLocal(Addr)); 163 | return ERR_OK; /* OK */ 164 | } 165 | 166 | /* 167 | ** =================================================================== 168 | ** Method : IEE1_SetWord (component IntEEPROM) 169 | ** 170 | ** Description : 171 | ** This method writes a given word (2 bytes) to the specified 172 | ** address in EEPROM. The method also sets address pointer for 173 | ** and methods (applicable only if 174 | ** these methods are enabled). The pointer is set to address 175 | ** passed as the parameter + 1. 176 | ** Parameters : 177 | ** NAME - DESCRIPTION 178 | ** Addr - Address to EEPROM 179 | ** Data - Data to write 180 | ** Returns : 181 | ** --- - Error code, possible codes: 182 | ** - ERR_OK - OK 183 | ** - ERR_SPEED - the component does not work 184 | ** in the active speed mode 185 | ** - ERR_BUSY - device is busy 186 | ** - ERR_VALUE - verification of written data 187 | ** failed (read value does not match with 188 | ** written value) 189 | ** - ERR_NOTAVAIL - other device-specific 190 | ** error 191 | ** - ERR_RANGE - selected address out of the 192 | ** selected address range 193 | ** =================================================================== 194 | */ 195 | byte EEProm_SetWord(EEPROM_TAddress Addr,word Data) 196 | { 197 | byte err; 198 | EEPROM_TAddress SecAddr; /* EEPROM Sector address */ 199 | 200 | if(!EEPromEnMode) 201 | { /* Is the device disabled in the actual speed CPU mode? */ 202 | return ERR_SPEED; /* If yes then error */ 203 | } 204 | if(((dword)Addr < (dword)EEPROM_AREA_START) || ((dword)Addr > (dword)EEPROM_AREA_END)) 205 | { /* Is given address out of EEPROM area array ? */ 206 | return ERR_RANGE; /* If yes then error */ 207 | } 208 | if ((dword)Addr & 0x01U) 209 | { /* Aligned address ? */ 210 | return ERR_NOTAVAIL; 211 | } 212 | if(!FSTAT_CCIF) 213 | { /* Is reading from EEPROM possible? */ 214 | return ERR_BUSY; /* If no then error */ 215 | } 216 | if (*((word *far)EEGlobalToLocal(Addr)) == 0xFFFFU) 217 | { /* Is the word erased? */ 218 | return(WriteWord(Addr, Data)); 219 | } 220 | else 221 | { /* Is given address non-erased ? */ 222 | SecAddr = (EEPROM_TAddress)((dword)Addr & 0x00FFFFFCUL); /* Sector Aligned address */ 223 | BackupSector(SecAddr, 0U, 0x04U); /* Backup sector */ 224 | EEBackupArray[(((dword)Addr) % 0x04U) / 2U] = Data; /* Write new data to saved sector */ 225 | err = EraseSectorInternal(Addr); /* Erase sector */ 226 | if(err) { 227 | return(err); /* Return error code if previous operation finished not correctly */ 228 | } 229 | err = WriteBlock(SecAddr, 0U, 0x04U,EEBackupArray); /* Restore sector */ 230 | return(err); 231 | } 232 | } 233 | 234 | /* 235 | ** =================================================================== 236 | ** Method : IEE1_SetLong (component IntEEPROM) 237 | ** 238 | ** Description : 239 | ** This method writes a given long word (4 bytes) to the 240 | ** specified address in EEPROM. The method also sets address 241 | ** pointer for and methods 242 | ** (applicable only if these methods are enabled). The pointer 243 | ** is set to address passed as the parameter + 3. 244 | ** Parameters : 245 | ** NAME - DESCRIPTION 246 | ** Addr - Address to EEPROM 247 | ** Data - Data to write 248 | ** Returns : 249 | ** --- - Error code, possible codes: 250 | ** - ERR_OK - OK 251 | ** - ERR_SPEED - the component does not work 252 | ** in the active speed mode 253 | ** - ERR_BUSY - device is busy 254 | ** - ERR_VALUE - verification of written data 255 | ** failed (read value does not match with 256 | ** written value) 257 | ** - ERR_NOTAVAIL - other device-specific 258 | ** error 259 | ** - ERR_RANGE - selected address out of the 260 | ** selected address range 261 | ** =================================================================== 262 | */ 263 | byte EEProm_SetLong(EEPROM_TAddress Addr,dword Data) 264 | { 265 | byte err; 266 | EEPROM_TAddress SecAddr; /* EEPROM Sector address */ 267 | 268 | if(!EEPromEnMode) { /* Is the device disabled in the actual speed CPU mode? */ 269 | return ERR_SPEED; /* If yes then error */ 270 | } 271 | if(((dword)Addr < (dword)EEPROM_AREA_START) || ((dword)Addr > (dword)EEPROM_AREA_END)) { /* Is given address out of EEPROM area array ? */ 272 | return ERR_RANGE; /* If yes then error */ 273 | } 274 | if ((dword)Addr & 0x03U) { /* Aligned address ? */ 275 | return ERR_NOTAVAIL; 276 | } 277 | if(!FSTAT_CCIF) { /* Is reading from EEPROM possible? */ 278 | return ERR_BUSY; /* If no then error */ 279 | } 280 | if (*((dword *far)EEGlobalToLocal(Addr)) == 0xFFFFFFFFUL) 281 | { /* Is the dword erased? */ 282 | err = WriteBlock(Addr, 0U, 0x04U,((word*)&Data)); /* Write dword */ 283 | } 284 | else 285 | { /* Is given address non-erased ? */ 286 | SecAddr = (EEPROM_TAddress)((dword)Addr & 0x00FFFFFCUL); /* Sector Aligned address */ 287 | BackupSector(SecAddr, 0U, 0x04U); /* Backup sector */ 288 | EEBackupArray[(((dword)Addr) % 0x04U) / 2U] = (word)(Data >> 16); /* Write new data to saved sector */ 289 | EEBackupArray[((((dword)Addr) % 0x04U) / 2U) + 1U] = (word)(Data); /* Write new data to saved sector */ 290 | err = EraseSectorInternal(Addr); /* Erase sector */ 291 | if(err) { 292 | return(err); /* Return error code if previous operation finished not correctly */ 293 | } 294 | err = WriteBlock(SecAddr, 0U, 0x04U,EEBackupArray); /* Restore sector */ 295 | } 296 | return(err); 297 | } 298 | 299 | void EEProm_SetHigh(void) 300 | { 301 | EEPromEnMode = TRUE; /* Set the flag "device enabled" in the actual speed CPU mode */ 302 | } 303 | 304 | void EEProm_SetSlow(void) 305 | { 306 | EEPromEnMode = FALSE; /* Set the flag "device disabled" in the actual speed CPU mode */ 307 | } 308 | 309 | 310 | /* 311 | ** =================================================================== 312 | **eeprom driver end 313 | ** =================================================================== 314 | */ 315 | 316 | void Diagnostic_EEProm_Init(void) 317 | { 318 | FCLKDIV = 0x0FU; /* Set up Clock Divider Register */ 319 | EEPromEnMode = TRUE; /* Set the flag "device enabled" in the actual speed CPU mode */ 320 | } 321 | 322 | /*----------------------FLASH write-------------------*/ 323 | byte Diagnostic_EEProm_Write(word add, byte size, byte *data) 324 | { 325 | uint8_t i; 326 | for(i = 0; i < size; ) 327 | { 328 | if(((add + i) %4) == 0 && (size - i) >= 4) 329 | { 330 | EEProm_SetLong((EEPROM_TAddress)(add + i) , *((uint32_t*)(data + i))); 331 | i += 4; 332 | } 333 | else if(((add + i) %2) == 0 && (size - i) >= 2) 334 | { 335 | EEProm_SetWord((EEPROM_TAddress)(add + i) , *((uint16_t*)(data + i))); 336 | i += 2; 337 | } 338 | else 339 | { 340 | EEProm_SetByte((EEPROM_TAddress)(add + i) , *(data + i)); 341 | i++; 342 | } 343 | } 344 | } 345 | 346 | /*----------------------FLASH write-------------------*/ 347 | byte Diagnostic_EEProm_Read(word add, byte size, byte *data) 348 | { 349 | int i; 350 | for(i = 0; i < size ; i++) 351 | { 352 | EEProm_GetByte((EEPROM_TAddress)(add + i) , data + i); 353 | } 354 | } 355 | -------------------------------------------------------------------------------- /diagnostic/EEPromDriver.h: -------------------------------------------------------------------------------- 1 | #ifndef EEPROM_DRIVER_H 2 | #define EEPROM_DRIVER_H 3 | void Diagnostic_EEProm_Init(void); 4 | byte Diagnostic_EEProm_Write(word add, byte size, byte *data); 5 | byte Diagnostic_EEProm_Read(word add, byte size, byte *data); 6 | #endif -------------------------------------------------------------------------------- /diagnostic/J1939TP.c: -------------------------------------------------------------------------------- 1 | #ifndef J1939TP_C 2 | #define J1939TP_C 3 | 4 | #include "J1939TP.h" 5 | #include "DiagnosticTimer.h" 6 | 7 | #define TP_CM_BAM 0x1CECFF19 8 | #define TP_CM_DT 0x1CEBFF19 9 | #define TP_GW_BAM 0x0CECFF25 10 | #define TP_GW_DT 0x0CEBFF25 11 | #define BAM_CONTROL 0x20 12 | #define BAM_RX_BUF_SIZE 80 13 | 14 | static SendJ1939CANFun sendInterface = (void*)0; 15 | static unsigned char sendBuf[8]; 16 | static unsigned char DTIndex; 17 | static unsigned char TotalFrameLength; 18 | static unsigned char* dataBuf; 19 | static DiagTimer DTTimer; 20 | static DiagTimer BAMTimer; 21 | /***********************j1939 parse***************************/ 22 | unsigned char BAMRxState;// 1: requested, 0:idle 2:wait for uplayer handing 23 | unsigned short BAMRxLength; 24 | unsigned char BAMRxFrameLength; 25 | unsigned char BAMRxReceived; 26 | unsigned char BAMRxBuf[BAM_RX_BUF_SIZE]; 27 | /***********************j1939 parse***************************/ 28 | 29 | void J1939TPGetReceiveData(unsigned short* length, unsigned char** dataPointer) 30 | { 31 | if(BAMRxState == 2) 32 | { 33 | BAMRxState = 0; 34 | *length = BAMRxLength; 35 | *dataPointer = BAMRxBuf; 36 | } 37 | else 38 | { 39 | *length = 0; 40 | *dataPointer = (void*)(0); 41 | } 42 | } 43 | 44 | void J1939TPReceiveData(unsigned long id,unsigned char* data, unsigned char length) 45 | { 46 | if(length == 8) 47 | { 48 | if(id == TP_GW_BAM && BAM_CONTROL == *data) 49 | { 50 | BAMRxLength = *(data+1) + (*(data+2) << 8); 51 | BAMRxFrameLength = *(data+3); 52 | if(BAMRxLength <= BAMRxFrameLength * 7 && BAMRxLength > (BAMRxFrameLength - 1) * 7 && BAMRxLength <= BAM_RX_BUF_SIZE) 53 | { 54 | BAMRxState = 1; 55 | BAMRxReceived = 0; 56 | } 57 | } 58 | else if(id == TP_GW_DT) 59 | { 60 | if(((BAMRxReceived / 7 + 1) == *data) && (BAMRxState == 1)) 61 | { 62 | uint8_t ValidDataLengthInFrame = (BAMRxLength - BAMRxReceived >= 7) ? 7 : (BAMRxLength - BAMRxReceived) ; 63 | memcpy(BAMRxBuf + BAMRxReceived,data + 1, ValidDataLengthInFrame); 64 | BAMRxReceived += ValidDataLengthInFrame; 65 | if(BAMRxReceived >= BAMRxLength) 66 | { 67 | BAMRxState = 2; 68 | } 69 | } 70 | } 71 | } 72 | } 73 | 74 | void TPCMSetParamBAM(SendJ1939CANFun sendinterface) 75 | { 76 | sendInterface = sendinterface; 77 | } 78 | 79 | void TPCMRequestBAM(short messageLength, long PGN,unsigned char* buf) 80 | { 81 | if(messageLength % 7 == 0) 82 | { 83 | TotalFrameLength = messageLength / 7; 84 | } 85 | else 86 | { 87 | TotalFrameLength = (messageLength / 7) + 1; 88 | } 89 | 90 | sendBuf[0] = BAM_CONTROL; 91 | sendBuf[1] = messageLength; 92 | sendBuf[2] = messageLength >> 8; 93 | sendBuf[3] = TotalFrameLength; 94 | sendBuf[4] = 0xFF; 95 | sendBuf[5] = (char)(PGN >> 16); 96 | sendBuf[6] = (char)(PGN >> 8); 97 | sendBuf[7] = (char)(PGN); 98 | DTIndex = 1; 99 | DiagTimer_Set(&DTTimer , 52); 100 | 101 | if(sendInterface != ((void*)0)) 102 | { 103 | sendInterface(TP_CM_BAM,sendBuf,8,0); 104 | } 105 | dataBuf = buf; 106 | } 107 | 108 | void TPCMDTProc(void) 109 | { 110 | 111 | if(DTIndex <= TotalFrameLength) 112 | { 113 | if(DiagTimer_HasExpired(&DTTimer)) 114 | { 115 | DiagTimer_Set(&DTTimer , 52); 116 | sendBuf[0] = DTIndex; 117 | memcpy(sendBuf + 1,dataBuf + 7*(DTIndex - 1),7); 118 | sendInterface(TP_CM_DT,sendBuf,8,0); 119 | DTIndex++; 120 | } 121 | } 122 | } 123 | #endif 124 | -------------------------------------------------------------------------------- /diagnostic/J1939TP.h: -------------------------------------------------------------------------------- 1 | #ifndef J1939TP_H 2 | #define J1939TP_H 3 | 4 | typedef char (*SendJ1939CANFun)(long ID, char *array, char length, char priority); 5 | 6 | void TPCMSetParamBAM(SendJ1939CANFun sendinterface); 7 | void TPCMRequestBAM(short messageLength, long PGN,unsigned char* buf); 8 | void TPCMDTProc(void); 9 | void J1939TPReceiveData(unsigned long id,unsigned char* data, unsigned char length); 10 | void J1939TPGetReceiveData(unsigned short* length, unsigned char** dataPointer); 11 | #endif 12 | 13 | -------------------------------------------------------------------------------- /diagnostic/LinkList.c: -------------------------------------------------------------------------------- 1 | #include "Cpu.h" 2 | #include "LinkList.h" 3 | 4 | void AddNode(node* header , node* listNode) 5 | { 6 | node* temp = header; 7 | while(temp->next != NULL) 8 | { 9 | temp = temp->next; 10 | } 11 | temp->next = listNode; 12 | temp->next->next = NULL; 13 | } 14 | 15 | void DeleteNode(node* header , int index) 16 | { 17 | uint32_t i; 18 | node* temp = header; 19 | node* prevNode; 20 | for(i = 0; i < index ; i++) 21 | { 22 | prevNode = temp; 23 | temp = temp->next; 24 | } 25 | prevNode->next = temp->next; 26 | free(temp); 27 | } 28 | 29 | void* GetNodeData(node* header , int index)//header->next is 0 index,header not mean only index 30 | { 31 | uint32_t i; 32 | node* temp = header; 33 | for(i = 0; i < index ; i++) 34 | { 35 | temp = temp->next; 36 | } 37 | return temp->dataPoint; 38 | } 39 | 40 | 41 | -------------------------------------------------------------------------------- /diagnostic/LinkList.h: -------------------------------------------------------------------------------- 1 | #ifndef LINK_LIST_H 2 | #define LINK_LIST_H 3 | 4 | #include "NetworkLayerTypeDefines.h" 5 | 6 | #ifndef node 7 | typedef struct LinkList{ 8 | void* dataPoint; 9 | //uint8_t index; 10 | struct LinkList* next; 11 | //struct LinkList* prev; 12 | }node; 13 | #endif 14 | 15 | void AddNode(node* header , node* listNode); 16 | void DeleteNode(node* header , int index); 17 | void* GetNodeData(node* header , int index); 18 | 19 | #endif 20 | -------------------------------------------------------------------------------- /diagnostic/NetworkLayer.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ukign/UDSDemo/a6c9713873e49af6dd21765209f2cd0de124066c/diagnostic/NetworkLayer.c -------------------------------------------------------------------------------- /diagnostic/NetworkLayer.h: -------------------------------------------------------------------------------- 1 | #ifndef _NETWORKLAYER_H 2 | #define _NETWORKLAYER_H 3 | 4 | #include "Diagnostic.h" 5 | 6 | #define MAX_BUFF_NUMBER 3 7 | #define MAX_INDICATION_NUMBER 3 8 | #define MAX_DTCDATA_BUF 100 9 | #define MAX_DOWNLOADING_BUF MAX_DTCDATA_BUF 10 | 11 | #define CAN_ID_DIAGNOSIS_FUNCTION 0x7DF 12 | 13 | void NetworkLayer_InitParam(uint32_t PyhReqID,uint32_t FunReqID, uint32_t ResponseID,SendCANFun sendFun); 14 | void NetworkLayer_SetSecondID(uint32_t PyhReqID,uint32_t FunReqID, uint32_t ResponseID); 15 | void NetworkLayer_Proc(void); 16 | void N_USData_request(MType Mtype, uint8_t N_SA, uint8_t N_TA, N_TAtype N_TAtype, uint8_t N_AE, uint8_t* MessageData, uint16_t Length); 17 | //void N_USData_confirm(N_PCIType PciType,MType Mtype, uint8_t N_SA, uint8_t N_TA, N_TAtype N_TAtype, uint8_t N_AE, N_Result N_Result); 18 | //void N_USData_FF_indication(MType Mtype, uint8_t N_SA, uint8_t N_TA, N_TAtype N_TAtype, uint8_t N_AE, uint16_t Length); 19 | //void N_USData_indication(N_PCIType PciType,MType Mtype, uint8_t N_SA, uint8_t N_TA, N_TAtype N_TAtype, uint8_t N_AE, uint8_t* MessageData, uint16_t Length, N_Result N_Result); 20 | 21 | void N_ChangeParameter_request(MType Mtype, uint8_t N_SA, uint8_t N_TA, N_TAtype N_TAtype, uint8_t N_AE, Parameter Parameter, uint8_t Parameter_Value); 22 | void N_ChangeParameter_confirm(MType Mtype, uint8_t N_SA, uint8_t N_TA, N_TAtype N_TAtype, uint8_t N_AE, Parameter Parameter, Result_ChangeParameter Result_ChangeParameter); 23 | void NetworkLayer_RxFrame(uint32_t ID,uint8_t* data,uint8_t IDE,uint8_t DLC,uint8_t RTR); 24 | void NetworkLayer_SetParam(uint8_t TimeAs, uint8_t TimeBs, uint8_t TimeCr, uint8_t TimeAr, uint8_t TimeBr, uint8_t TimeCs, uint8_t Bs, uint8_t m_STmin, DuplexMode nDuplex , MType Mtype , uint8_t N_SA , uint8_t N_TA , N_TAtype N_TAtype , uint8_t N_AE , uint8_t FillData); 25 | bool IsIndicationListEmpty(void); 26 | NetworkNotification PullIndication(void); 27 | #endif 28 | -------------------------------------------------------------------------------- /diagnostic/NetworkLayerTypeDefines.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ukign/UDSDemo/a6c9713873e49af6dd21765209f2cd0de124066c/diagnostic/NetworkLayerTypeDefines.h -------------------------------------------------------------------------------- /diagnostic/diagnostic.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ukign/UDSDemo/a6c9713873e49af6dd21765209f2cd0de124066c/diagnostic/diagnostic.h -------------------------------------------------------------------------------- /diagnostic/heap.c: -------------------------------------------------------------------------------- 1 | /***************************************************** 2 | heap.c - ANSI-C library: heap definition 3 | ---------------------------------------------------- 4 | Copyright (c) Metrowerks, Basel, Switzerland 5 | All rights reserved 6 | Do not modify! 7 | *****************************************************/ 8 | 9 | #include 10 | #include 11 | #include 12 | 13 | #if LIBDEF_FAR_HEAP_DATA 14 | #pragma DATA_SEG __FAR_SEG HEAP_SEGMENT 15 | #else 16 | #pragma DATA_SEG HEAP_SEGMENT 17 | #endif 18 | 19 | #if defined(__HC08__) || defined(__RS08__) || defined(__HC12__) || defined(__XGATE__) 20 | unsigned long _heap_[(((unsigned int)LIBDEF_HEAPSIZE + sizeof(long)) - 1U) / sizeof(long)]; /*lint !e960 , MISRA 10.1 REQ, the result of sizeof() has type size_t */ 21 | #else 22 | unsigned long _heap_[((LIBDEF_HEAPSIZE + sizeof(long)) - 1) / sizeof(long)]; 23 | #endif 24 | 25 | #pragma DATA_SEG DEFAULT 26 | 27 | #pragma MESSAGE DISABLE C5703 /* code: parameter declared in function _heapcrash_ but not referenced */ 28 | 29 | void _heapcrash_(void *LIBDEF_HEAP_DPTRQ element, int cause) { 30 | /**** Implement your own heap error routine here */ 31 | volatile int i = 0; 32 | i = i/i; /*lint !e414 !e564 !e931 division by zero! */ 33 | } /*lint !e818 !e715 !e438 , MISRA 16.7 ADV, symbol element not referenced */ 34 | /*****************************************************/ 35 | /* end heap.c */ 36 | -------------------------------------------------------------------------------- /helpfile.docx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ukign/UDSDemo/a6c9713873e49af6dd21765209f2cd0de124066c/helpfile.docx -------------------------------------------------------------------------------- /prm/burner.bbl: -------------------------------------------------------------------------------- 1 | /* logical s-record file */ 2 | OPENFILE "%ABS_FILE%.s19" 3 | format=motorola 4 | busWidth=1 5 | origin=0 6 | len=0x1000000 7 | destination=0 8 | SRECORD=Sx 9 | SENDBYTE 1 "%ABS_FILE%" 10 | CLOSE 11 | 12 | /* physical s-record file */ 13 | OPENFILE "%ABS_FILE%.phy" 14 | format = motorola 15 | busWidth = 1 16 | len = 0x4000 17 | 18 | /* logical non banked flash at $4000 and $C000 to physical */ 19 | origin = 0x1400 20 | destination = 0x001400 21 | len = 0xC00 22 | SENDBYTE 1 "%ABS_FILE%" 23 | 24 | origin = 0x004000 25 | destination = 0x34000 26 | len = 0x4000 27 | SENDBYTE 1 "%ABS_FILE%" 28 | 29 | origin = 0x00C000 30 | destination = 0x3C000 31 | len = 0x4000 32 | SENDBYTE 1 "%ABS_FILE%" 33 | 34 | /* logical 128 kB banked flash to physical */ 35 | origin = 0x088000 36 | destination = 0x020000 37 | len = 0x4000 38 | SENDBYTE 1 "%ABS_FILE%" 39 | 40 | origin = 0x098000 41 | destination = 0x24000 42 | len = 0x4000 43 | SENDBYTE 1 "%ABS_FILE%" 44 | 45 | origin = 0x0A8000 46 | destination = 0x288000 47 | len = 0x4000 48 | SENDBYTE 1 "%ABS_FILE%" 49 | 50 | origin = 0x0B8000 51 | destination = 0x2C000 52 | len = 0x4000 53 | SENDBYTE 1 "%ABS_FILE%" 54 | 55 | origin = 0x0C8000 56 | destination = 0x030000 57 | len = 0x1400 58 | SENDBYTE 1 "%ABS_FILE%" 59 | 60 | origin = 0x0CA000 61 | destination = 0x032000 62 | len = 0x2000 63 | SENDBYTE 1 "%ABS_FILE%" 64 | 65 | origin = 0x0D8000 66 | destination = 0x034000 67 | len = 0x4000 68 | SENDBYTE 1 "%ABS_FILE%" 69 | 70 | origin = 0x0E8000 71 | destination = 0x038000 72 | len = 0x4000 73 | SENDBYTE 1 "%ABS_FILE%" 74 | 75 | origin = 0x0F8000 76 | destination = 0x03C000 77 | len = 0x4000 78 | SENDBYTE 1 "%ABS_FILE%" 79 | 80 | CLOSE 81 | 82 | --------------------------------------------------------------------------------