├── LICENSE ├── README.md ├── docs ├── block_diagram.png └── performance.png ├── src_v ├── ft60x_axi.v ├── ft60x_axi_retime.v └── ft60x_fifo.v └── sw ├── Makefile ├── check.cpp ├── ftdi_axi_driver.cpp ├── ftdi_axi_driver.h ├── ftdi_driver_api.h ├── ftdi_ft60x.cpp ├── ftdi_ft60x.h ├── gpio_rd.cpp ├── gpio_wr.cpp ├── linux-x86_64 ├── 51-ftd3xx.rules ├── README.md ├── ftd3xx.h ├── libftd3xx-static.a ├── libftd3xx.so ├── libftd3xx.so.0.5.21 └── libstdc++-static.a ├── load.cpp ├── peek.cpp ├── poke.cpp └── verify.cpp /LICENSE: -------------------------------------------------------------------------------- 1 | GNU GENERAL PUBLIC LICENSE 2 | Version 3, 29 June 2007 3 | 4 | Copyright (C) 2007 Free Software Foundation, Inc. 5 | Everyone is permitted to copy and distribute verbatim copies 6 | of this license document, but changing it is not allowed. 7 | 8 | Preamble 9 | 10 | The GNU General Public License is a free, copyleft license for 11 | software and other kinds of works. 12 | 13 | The licenses for most software and other practical works are designed 14 | to take away your freedom to share and change the works. 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If not, see . 649 | 650 | Also add information on how to contact you by electronic and paper mail. 651 | 652 | If the program does terminal interaction, make it output a short 653 | notice like this when it starts in an interactive mode: 654 | 655 | Copyright (C) 656 | This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'. 657 | This is free software, and you are welcome to redistribute it 658 | under certain conditions; type `show c' for details. 659 | 660 | The hypothetical commands `show w' and `show c' should show the appropriate 661 | parts of the General Public License. Of course, your program's commands 662 | might be different; for a GUI interface, you would use an "about box". 663 | 664 | You should also get your employer (if you work as a programmer) or school, 665 | if any, to sign a "copyright disclaimer" for the program, if necessary. 666 | For more information on this, and how to apply and follow the GNU GPL, see 667 | . 668 | 669 | The GNU General Public License does not permit incorporating your program 670 | into proprietary programs. If your program is a subroutine library, you 671 | may consider it more useful to permit linking proprietary applications with 672 | the library. If this is what you want to do, use the GNU Lesser General 673 | Public License instead of this License. But first, please read 674 | . 675 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | ### FTDI FT601 SuperSpeed USB3.0 to AXI bus master 2 | 3 | Github: [https://github.com/ultraembedded/core_ft60x_axi](https://github.com/ultraembedded/core_ft60x_axi) 4 | 5 | This component allows an FTDI FT601 USB3.0 device to act as a high-performance AXI4 bus master. 6 | 7 | ![Block Diagram](docs/block_diagram.png) 8 | 9 | ##### Features 10 | * Interfaces to FTDI FT601 USB FIFO device. 11 | * AXI-4 bus master with support for incrementing bursts and multiple outstanding transactions (for high performance). 12 | * 2 x 8KB FIFO (which map to BlockRAMs in Xilinx FPGAs). 13 | * Designed to work @ 100MHz in FPGA (as per FTDI FT60x max clock rate). 14 | * Uses FT60x 245 mode protocol (32-bit mode). 15 | * Support for 32 GPIO. 16 | * Capable of sustained pipelined AXI-4 burst **reads @ 170MB/s** and **writes @ 230MB/s**. 17 | 18 | ##### Performance 19 | ![Block Diagram](docs/performance.png) 20 | 21 | ##### Testing 22 | Verified under simulation (constrained random testing), and tested on a Xilinx Artix 7 with blockRAM and DDR3 targets on the LambdaConcept USB2Sniffer Board (connected to a Linux host PC). 23 | 24 | Test setup; 25 | * [LambdaConcept USB2Sniffer Board](https://shop.lambdaconcept.com/home/35-usb2-sniffer.html) 26 | * Linux Distro: Linux Mint 19 Tara 27 | * Linux Kernel 5.4.0-050400rc5 28 | * Intel Corporation JHL7540 Thunderbolt 3 USB Controller [Titan Ridge 4C 2018] 29 | 30 | Uses the FTDI D3XX drivers which are available for Linux, OS-X, and Windows (although this has only been tested under Linux currently). 31 | 32 | ##### References 33 | * [FT601 USB3.0 to FIFO Bridge](https://www.ftdichip.com/Support/Documents/DataSheets/ICs/DS_FT600Q-FT601Q%20IC%20Datasheet.pdf) 34 | * [FTDI D3XX Drivers](https://www.ftdichip.com/Drivers/D3XX.htm) 35 | -------------------------------------------------------------------------------- /docs/block_diagram.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ultraembedded/core_ft60x_axi/16d599467f1a968996970fae007cb9936c7f6b33/docs/block_diagram.png -------------------------------------------------------------------------------- /docs/performance.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ultraembedded/core_ft60x_axi/16d599467f1a968996970fae007cb9936c7f6b33/docs/performance.png -------------------------------------------------------------------------------- /src_v/ft60x_axi.v: -------------------------------------------------------------------------------- 1 | //----------------------------------------------------------------- 2 | // FTDI FT601 SuperSpeed USB3.0 to AXI bus master 3 | // V0.1 4 | // Ultra-Embedded.com 5 | // Copyright 2020 6 | // 7 | // Email: admin@ultra-embedded.com 8 | // 9 | // License: GPL 10 | //----------------------------------------------------------------- 11 | // 12 | // This source code is free software: you can redistribute it and/or modify 13 | // it under the terms of the GNU General Public License as published by 14 | // the Free Software Foundation, either version 3 of the License, or 15 | // (at your option) any later version. 16 | // 17 | // This source code is distributed in the hope that it will be useful, 18 | // but WITHOUT ANY WARRANTY; without even the implied warranty of 19 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 | // GNU General Public License for more details. 21 | // 22 | // You should have received a copy of the GNU General Public License 23 | // along with this source code. If not, see . 24 | // 25 | //----------------------------------------------------------------- 26 | 27 | module ft60x_axi 28 | //----------------------------------------------------------------- 29 | // Params 30 | //----------------------------------------------------------------- 31 | #( 32 | parameter RETIME_AXI = 1 33 | ,parameter AXI_ID = 0 34 | ) 35 | //----------------------------------------------------------------- 36 | // Ports 37 | //----------------------------------------------------------------- 38 | ( 39 | // Inputs 40 | input clk_i 41 | ,input rst_i 42 | ,input ftdi_rxf_i 43 | ,input ftdi_txe_i 44 | ,input [ 31:0] ftdi_data_in_i 45 | ,input [ 3:0] ftdi_be_in_i 46 | ,input outport_awready_i 47 | ,input outport_wready_i 48 | ,input outport_bvalid_i 49 | ,input [ 1:0] outport_bresp_i 50 | ,input [ 3:0] outport_bid_i 51 | ,input outport_arready_i 52 | ,input outport_rvalid_i 53 | ,input [ 31:0] outport_rdata_i 54 | ,input [ 1:0] outport_rresp_i 55 | ,input [ 3:0] outport_rid_i 56 | ,input outport_rlast_i 57 | ,input [ 31:0] gpio_inputs_i 58 | 59 | // Outputs 60 | ,output ftdi_wrn_o 61 | ,output ftdi_rdn_o 62 | ,output ftdi_oen_o 63 | ,output [ 31:0] ftdi_data_out_o 64 | ,output [ 3:0] ftdi_be_out_o 65 | ,output outport_awvalid_o 66 | ,output [ 31:0] outport_awaddr_o 67 | ,output [ 3:0] outport_awid_o 68 | ,output [ 7:0] outport_awlen_o 69 | ,output [ 1:0] outport_awburst_o 70 | ,output outport_wvalid_o 71 | ,output [ 31:0] outport_wdata_o 72 | ,output [ 3:0] outport_wstrb_o 73 | ,output outport_wlast_o 74 | ,output outport_bready_o 75 | ,output outport_arvalid_o 76 | ,output [ 31:0] outport_araddr_o 77 | ,output [ 3:0] outport_arid_o 78 | ,output [ 7:0] outport_arlen_o 79 | ,output [ 1:0] outport_arburst_o 80 | ,output outport_rready_o 81 | ,output [ 31:0] gpio_outputs_o 82 | ); 83 | 84 | 85 | 86 | //----------------------------------------------------------------- 87 | // AXI interface retiming 88 | //----------------------------------------------------------------- 89 | wire outport_awvalid_w; 90 | wire [ 31:0] outport_awaddr_w; 91 | wire [ 3:0] outport_awid_w; 92 | wire [ 7:0] outport_awlen_w; 93 | wire [ 1:0] outport_awburst_w; 94 | wire outport_wvalid_w; 95 | wire [ 31:0] outport_wdata_w; 96 | wire [ 3:0] outport_wstrb_w; 97 | wire outport_wlast_w; 98 | wire outport_bready_w; 99 | wire outport_arvalid_w; 100 | wire [ 31:0] outport_araddr_w; 101 | wire [ 3:0] outport_arid_w; 102 | wire [ 7:0] outport_arlen_w; 103 | wire [ 1:0] outport_arburst_w; 104 | wire outport_rready_w; 105 | wire outport_awready_w; 106 | wire outport_wready_w; 107 | wire outport_bvalid_w; 108 | wire [ 1:0] outport_bresp_w; 109 | wire [ 3:0] outport_bid_w; 110 | wire outport_arready_w; 111 | wire outport_rvalid_w; 112 | wire [ 31:0] outport_rdata_w; 113 | wire [ 1:0] outport_rresp_w; 114 | wire [ 3:0] outport_rid_w; 115 | wire outport_rlast_w; 116 | 117 | generate 118 | if (RETIME_AXI) 119 | begin 120 | ft60x_axi_retime 121 | u_retime 122 | ( 123 | .clk_i(clk_i) 124 | ,.rst_i(rst_i) 125 | 126 | ,.inport_awvalid_i(outport_awvalid_w) 127 | ,.inport_awaddr_i(outport_awaddr_w) 128 | ,.inport_awid_i(outport_awid_w) 129 | ,.inport_awlen_i(outport_awlen_w) 130 | ,.inport_awburst_i(outport_awburst_w) 131 | ,.inport_wvalid_i(outport_wvalid_w) 132 | ,.inport_wdata_i(outport_wdata_w) 133 | ,.inport_wstrb_i(outport_wstrb_w) 134 | ,.inport_wlast_i(outport_wlast_w) 135 | ,.inport_bready_i(outport_bready_w) 136 | ,.inport_arvalid_i(outport_arvalid_w) 137 | ,.inport_araddr_i(outport_araddr_w) 138 | ,.inport_arid_i(outport_arid_w) 139 | ,.inport_arlen_i(outport_arlen_w) 140 | ,.inport_arburst_i(outport_arburst_w) 141 | ,.inport_rready_i(outport_rready_w) 142 | ,.inport_awready_o(outport_awready_w) 143 | ,.inport_wready_o(outport_wready_w) 144 | ,.inport_bvalid_o(outport_bvalid_w) 145 | ,.inport_bresp_o(outport_bresp_w) 146 | ,.inport_bid_o(outport_bid_w) 147 | ,.inport_arready_o(outport_arready_w) 148 | ,.inport_rvalid_o(outport_rvalid_w) 149 | ,.inport_rdata_o(outport_rdata_w) 150 | ,.inport_rresp_o(outport_rresp_w) 151 | ,.inport_rid_o(outport_rid_w) 152 | ,.inport_rlast_o(outport_rlast_w) 153 | 154 | ,.outport_awvalid_o(outport_awvalid_o) 155 | ,.outport_awaddr_o(outport_awaddr_o) 156 | ,.outport_awid_o(outport_awid_o) 157 | ,.outport_awlen_o(outport_awlen_o) 158 | ,.outport_awburst_o(outport_awburst_o) 159 | ,.outport_wvalid_o(outport_wvalid_o) 160 | ,.outport_wdata_o(outport_wdata_o) 161 | ,.outport_wstrb_o(outport_wstrb_o) 162 | ,.outport_wlast_o(outport_wlast_o) 163 | ,.outport_bready_o(outport_bready_o) 164 | ,.outport_arvalid_o(outport_arvalid_o) 165 | ,.outport_araddr_o(outport_araddr_o) 166 | ,.outport_arid_o(outport_arid_o) 167 | ,.outport_arlen_o(outport_arlen_o) 168 | ,.outport_arburst_o(outport_arburst_o) 169 | ,.outport_rready_o(outport_rready_o) 170 | ,.outport_awready_i(outport_awready_i) 171 | ,.outport_wready_i(outport_wready_i) 172 | ,.outport_bvalid_i(outport_bvalid_i) 173 | ,.outport_bresp_i(outport_bresp_i) 174 | ,.outport_bid_i(outport_bid_i) 175 | ,.outport_arready_i(outport_arready_i) 176 | ,.outport_rvalid_i(outport_rvalid_i) 177 | ,.outport_rdata_i(outport_rdata_i) 178 | ,.outport_rresp_i(outport_rresp_i) 179 | ,.outport_rid_i(outport_rid_i) 180 | ,.outport_rlast_i(outport_rlast_i) 181 | ); 182 | end 183 | else 184 | begin 185 | assign outport_arvalid_o = outport_arvalid_w; 186 | assign outport_araddr_o = outport_araddr_w; 187 | assign outport_arid_o = outport_arid_w; 188 | assign outport_arlen_o = outport_arlen_w; 189 | assign outport_arburst_o = outport_arburst_w; 190 | assign outport_awvalid_o = outport_awvalid_w; 191 | assign outport_awaddr_o = outport_awaddr_w; 192 | assign outport_awid_o = outport_awid_w; 193 | assign outport_awlen_o = outport_awlen_w; 194 | assign outport_awburst_o = outport_awburst_w; 195 | assign outport_wvalid_o = outport_wvalid_w; 196 | assign outport_wdata_o = outport_wdata_w; 197 | assign outport_wstrb_o = outport_wstrb_w; 198 | assign outport_wlast_o = outport_wlast_w; 199 | assign outport_rready_o = outport_rready_w; 200 | assign outport_bready_o = outport_bready_w; 201 | 202 | assign outport_awready_w = outport_awready_i; 203 | assign outport_wready_w = outport_wready_i; 204 | assign outport_bvalid_w = outport_bvalid_i; 205 | assign outport_bresp_w = outport_bresp_i; 206 | assign outport_bid_w = outport_bid_i; 207 | assign outport_arready_w = outport_arready_i; 208 | assign outport_rvalid_w = outport_rvalid_i; 209 | assign outport_rdata_w = outport_rdata_i; 210 | assign outport_rresp_w = outport_rresp_i; 211 | assign outport_rid_w = outport_rid_i; 212 | assign outport_rlast_w = outport_rlast_i; 213 | end 214 | endgenerate 215 | 216 | //----------------------------------------------------------------- 217 | // FT60x <-> Stream 218 | //----------------------------------------------------------------- 219 | wire rx_valid_w; 220 | wire [ 31:0] rx_data_w; 221 | wire rx_accept_w; 222 | 223 | wire tx_valid_w; 224 | wire [ 31:0] tx_data_w; 225 | wire tx_accept_w; 226 | 227 | ft60x_fifo 228 | u_ram 229 | ( 230 | .clk_i(clk_i) 231 | ,.rst_i(rst_i) 232 | ,.ftdi_rxf_i(ftdi_rxf_i) 233 | ,.ftdi_txe_i(ftdi_txe_i) 234 | ,.ftdi_data_in_i(ftdi_data_in_i) 235 | ,.ftdi_be_in_i(ftdi_be_in_i) 236 | ,.ftdi_wrn_o(ftdi_wrn_o) 237 | ,.ftdi_rdn_o(ftdi_rdn_o) 238 | ,.ftdi_oen_o(ftdi_oen_o) 239 | ,.ftdi_data_out_o(ftdi_data_out_o) 240 | ,.ftdi_be_out_o(ftdi_be_out_o) 241 | 242 | ,.inport_valid_i(tx_valid_w) 243 | ,.inport_data_i(tx_data_w) 244 | ,.inport_accept_o(tx_accept_w) 245 | 246 | ,.outport_valid_o(rx_valid_w) 247 | ,.outport_data_o(rx_data_w) 248 | ,.outport_accept_i(rx_accept_w) 249 | ); 250 | 251 | //----------------------------------------------------------------- 252 | // Defines / Local params 253 | //----------------------------------------------------------------- 254 | localparam STATE_W = 4; 255 | localparam STATE_IDLE = 4'd0; 256 | localparam STATE_CMD_REQ = 4'd1; 257 | localparam STATE_CMD_ADDR = 4'd2; 258 | localparam STATE_ECHO = 4'd3; 259 | localparam STATE_STATUS = 4'd4; 260 | localparam STATE_READ_CMD = 4'd5; 261 | localparam STATE_READ_DATA = 4'd6; 262 | localparam STATE_WRITE_CMD = 4'd7; 263 | localparam STATE_WRITE_DATA = 4'd8; 264 | localparam STATE_WRITE_RESP = 4'd9; 265 | localparam STATE_DRAIN = 4'd10; 266 | localparam STATE_GPIO_WR = 4'd11; 267 | localparam STATE_GPIO_RD = 4'd12; 268 | 269 | localparam CMD_ID_ECHO = 8'h01; 270 | localparam CMD_ID_DRAIN = 8'h02; 271 | localparam CMD_ID_READ = 8'h10; 272 | localparam CMD_ID_WRITE8_NP = 8'h20; // 8-bit write (with response) 273 | localparam CMD_ID_WRITE16_NP = 8'h21; // 16-bit write (with response) 274 | localparam CMD_ID_WRITE_NP = 8'h22; // 32-bit write (with response) 275 | localparam CMD_ID_WRITE8 = 8'h30; // 8-bit write 276 | localparam CMD_ID_WRITE16 = 8'h31; // 16-bit write 277 | localparam CMD_ID_WRITE = 8'h32; // 32-bit write 278 | localparam CMD_ID_GPIO_WR = 8'h40; 279 | localparam CMD_ID_GPIO_RD = 8'h41; 280 | 281 | reg [STATE_W-1:0] state_q; 282 | reg [7:0] cmd_len_q; 283 | reg [31:0] cmd_addr_q; 284 | reg [15:0] cmd_seq_q; 285 | reg [7:0] cmd_id_q; 286 | 287 | reg [7:0] stat_len_q; 288 | reg [1:0] stat_resp_q; 289 | 290 | //----------------------------------------------------------------- 291 | // Next State Logic 292 | //----------------------------------------------------------------- 293 | reg [STATE_W-1:0] next_state_r; 294 | always @ * 295 | begin 296 | next_state_r = state_q; 297 | 298 | case (state_q) 299 | //----------------------------------------- 300 | // STATE_IDLE 301 | //----------------------------------------- 302 | STATE_IDLE : 303 | begin 304 | if (rx_valid_w) 305 | next_state_r = STATE_CMD_REQ; 306 | end 307 | //----------------------------------------- 308 | // STATE_CMD_REQ 309 | //----------------------------------------- 310 | STATE_CMD_REQ : 311 | begin 312 | if (rx_valid_w) next_state_r = STATE_CMD_ADDR; 313 | end 314 | //----------------------------------------- 315 | // STATE_CMD_ADDR 316 | //----------------------------------------- 317 | STATE_CMD_ADDR : 318 | begin 319 | if (cmd_id_q == CMD_ID_ECHO && cmd_len_q != 8'b0) 320 | next_state_r = STATE_ECHO; 321 | else if (cmd_id_q == CMD_ID_ECHO && cmd_len_q == 8'b0) 322 | next_state_r = STATE_STATUS; 323 | else if (cmd_id_q == CMD_ID_READ) 324 | next_state_r = STATE_READ_CMD; 325 | else if (cmd_id_q == CMD_ID_WRITE8_NP || 326 | cmd_id_q == CMD_ID_WRITE16_NP || 327 | cmd_id_q == CMD_ID_WRITE_NP || 328 | cmd_id_q == CMD_ID_WRITE8 || 329 | cmd_id_q == CMD_ID_WRITE16 || 330 | cmd_id_q == CMD_ID_WRITE) 331 | next_state_r = STATE_WRITE_CMD; 332 | else if (cmd_id_q == CMD_ID_DRAIN) 333 | next_state_r = STATE_DRAIN; 334 | else if (cmd_id_q == CMD_ID_GPIO_WR) 335 | next_state_r = STATE_GPIO_WR; 336 | else if (cmd_id_q == CMD_ID_GPIO_RD) 337 | next_state_r = STATE_GPIO_RD; 338 | end 339 | //----------------------------------------- 340 | // STATE_ECHO 341 | //----------------------------------------- 342 | STATE_ECHO : 343 | begin 344 | if ((stat_len_q + 8'd1) == cmd_len_q && tx_accept_w) 345 | next_state_r = STATE_STATUS; 346 | end 347 | //----------------------------------------- 348 | // STATE_READ_CMD 349 | //----------------------------------------- 350 | STATE_READ_CMD : 351 | begin 352 | if (outport_arready_w) 353 | next_state_r = STATE_READ_DATA; 354 | end 355 | //----------------------------------------- 356 | // STATE_READ_DATA 357 | //----------------------------------------- 358 | STATE_READ_DATA : 359 | begin 360 | if (outport_rvalid_w && outport_rready_w && outport_rlast_w) 361 | next_state_r = STATE_STATUS; 362 | end 363 | //----------------------------------------- 364 | // STATE_WRITE_CMD 365 | //----------------------------------------- 366 | STATE_WRITE_CMD : 367 | begin 368 | if (outport_awready_w) 369 | next_state_r = STATE_WRITE_DATA; 370 | end 371 | //----------------------------------------- 372 | // STATE_WRITE_DATA 373 | //----------------------------------------- 374 | STATE_WRITE_DATA : 375 | begin 376 | if (outport_wvalid_w && outport_wlast_w && outport_wready_w) 377 | next_state_r = STATE_WRITE_RESP; 378 | end 379 | //----------------------------------------- 380 | // STATE_WRITE_RESP 381 | //----------------------------------------- 382 | STATE_WRITE_RESP : 383 | begin 384 | if (outport_bvalid_w && outport_bready_w) 385 | begin 386 | if (cmd_id_q == CMD_ID_WRITE8 || 387 | cmd_id_q == CMD_ID_WRITE16 || 388 | cmd_id_q == CMD_ID_WRITE) 389 | next_state_r = STATE_IDLE; 390 | else 391 | next_state_r = STATE_STATUS; 392 | end 393 | end 394 | //----------------------------------------- 395 | // STATE_STATUS 396 | //----------------------------------------- 397 | STATE_STATUS : 398 | begin 399 | if (tx_accept_w) next_state_r = STATE_IDLE; 400 | end 401 | //----------------------------------------- 402 | // STATE_DRAIN 403 | //----------------------------------------- 404 | STATE_DRAIN : 405 | begin 406 | if (!rx_valid_w) next_state_r = STATE_IDLE; 407 | end 408 | //----------------------------------------- 409 | // STATE_GPIO_WR 410 | //----------------------------------------- 411 | STATE_GPIO_WR : 412 | begin 413 | if (rx_valid_w) next_state_r = STATE_STATUS; 414 | end 415 | //----------------------------------------- 416 | // STATE_GPIO_RD 417 | //----------------------------------------- 418 | STATE_GPIO_RD : 419 | begin 420 | if (tx_accept_w) next_state_r = STATE_STATUS; 421 | end 422 | default: 423 | ; 424 | endcase 425 | end 426 | 427 | // Update state 428 | always @ (posedge clk_i or posedge rst_i) 429 | if (rst_i) 430 | state_q <= STATE_IDLE; 431 | else 432 | state_q <= next_state_r; 433 | 434 | //----------------------------------------------------------------- 435 | // Command capture 436 | //----------------------------------------------------------------- 437 | always @ (posedge clk_i or posedge rst_i) 438 | if (rst_i) 439 | cmd_id_q <= 8'b0; 440 | else if (state_q != STATE_CMD_REQ && next_state_r == STATE_CMD_REQ) 441 | cmd_id_q <= rx_data_w[7:0]; 442 | 443 | always @ (posedge clk_i or posedge rst_i) 444 | if (rst_i) 445 | cmd_len_q <= 8'b0; 446 | else if (state_q != STATE_CMD_REQ && next_state_r == STATE_CMD_REQ) 447 | cmd_len_q <= rx_data_w[15:8]; 448 | 449 | always @ (posedge clk_i or posedge rst_i) 450 | if (rst_i) 451 | cmd_seq_q <= 16'b0; 452 | else if (state_q != STATE_CMD_REQ && next_state_r == STATE_CMD_REQ) 453 | cmd_seq_q <= rx_data_w[31:16]; 454 | 455 | always @ (posedge clk_i or posedge rst_i) 456 | if (rst_i) 457 | cmd_addr_q <= 32'b0; 458 | else if (state_q != STATE_CMD_ADDR && next_state_r == STATE_CMD_ADDR) 459 | cmd_addr_q <= rx_data_w; 460 | 461 | //----------------------------------------------------------------- 462 | // Length 463 | //----------------------------------------------------------------- 464 | always @ (posedge clk_i or posedge rst_i) 465 | if (rst_i) 466 | stat_len_q <= 8'b0; 467 | else if (state_q != STATE_CMD_REQ && next_state_r == STATE_CMD_REQ) 468 | stat_len_q <= 8'b0; 469 | else if (state_q == STATE_ECHO) 470 | stat_len_q <= stat_len_q + 8'd1; 471 | else if (state_q == STATE_WRITE_DATA && outport_wvalid_w && outport_wready_w) 472 | stat_len_q <= stat_len_q + 8'd1; 473 | 474 | //----------------------------------------------------------------- 475 | // Write Mask 476 | //----------------------------------------------------------------- 477 | reg [3:0] write_strb_q; 478 | 479 | always @ (posedge clk_i or posedge rst_i) 480 | if (rst_i) 481 | write_strb_q <= 4'b0; 482 | else if (state_q != STATE_CMD_ADDR && next_state_r == STATE_CMD_ADDR) 483 | begin 484 | if (cmd_id_q == CMD_ID_WRITE8 || cmd_id_q == CMD_ID_WRITE8_NP) 485 | begin 486 | case (rx_data_w[1:0]) 487 | 2'b00: write_strb_q <= 4'b0001; 488 | 2'b01: write_strb_q <= 4'b0010; 489 | 2'b10: write_strb_q <= 4'b0100; 490 | 2'b11: write_strb_q <= 4'b1000; 491 | endcase 492 | end 493 | else if (cmd_id_q == CMD_ID_WRITE16 || cmd_id_q == CMD_ID_WRITE16_NP) 494 | begin 495 | case ({rx_data_w[1],1'b0}) 496 | 2'b00: write_strb_q <= 4'b0011; 497 | 2'b10: write_strb_q <= 4'b1100; 498 | default: ; 499 | endcase 500 | end 501 | else 502 | write_strb_q <= 4'b1111; 503 | end 504 | 505 | //----------------------------------------------------------------- 506 | // Handshaking 507 | //----------------------------------------------------------------- 508 | reg rx_accept_r; 509 | always @ * 510 | begin 511 | rx_accept_r = 1'b0; 512 | 513 | case (state_q) 514 | STATE_IDLE, 515 | STATE_CMD_REQ, 516 | STATE_GPIO_WR, 517 | STATE_DRAIN : rx_accept_r = 1'b1; 518 | STATE_CMD_ADDR : rx_accept_r = 1'b0; 519 | STATE_ECHO: rx_accept_r = tx_accept_w; 520 | STATE_WRITE_DATA: rx_accept_r = outport_wready_w; 521 | default: 522 | ; 523 | endcase 524 | end 525 | 526 | assign rx_accept_w = rx_accept_r; 527 | 528 | reg tx_valid_r; 529 | reg [31:0] tx_data_r; 530 | 531 | reg [31:0] gpio_in_q; 532 | 533 | always @ * 534 | begin 535 | tx_valid_r = 1'b0; 536 | tx_data_r = 32'b0; 537 | 538 | case (state_q) 539 | STATE_ECHO: 540 | begin 541 | tx_valid_r = rx_valid_w; 542 | tx_data_r = rx_data_w; 543 | end 544 | STATE_STATUS: 545 | begin 546 | tx_valid_r = 1'b1; 547 | tx_data_r = {14'b0, stat_resp_q, cmd_seq_q}; 548 | end 549 | STATE_READ_DATA: 550 | begin 551 | tx_valid_r = outport_rvalid_w; 552 | tx_data_r = outport_rdata_w; 553 | end 554 | STATE_GPIO_RD: 555 | begin 556 | tx_valid_r = 1'b1; 557 | tx_data_r = gpio_in_q[31:0]; 558 | end 559 | default: 560 | ; 561 | endcase 562 | end 563 | 564 | assign tx_valid_w = tx_valid_r; 565 | assign tx_data_w = tx_data_r; 566 | 567 | //----------------------------------------------------------------- 568 | // AXI Read 569 | //----------------------------------------------------------------- 570 | assign outport_arvalid_w = (state_q == STATE_READ_CMD); 571 | assign outport_araddr_w = cmd_addr_q; 572 | assign outport_arid_w = AXI_ID; 573 | assign outport_arlen_w = cmd_len_q - 8'd1; 574 | assign outport_arburst_w = 2'b01; 575 | 576 | assign outport_rready_w = (state_q == STATE_READ_DATA) && tx_accept_w; 577 | 578 | //----------------------------------------------------------------- 579 | // AXI Write 580 | //----------------------------------------------------------------- 581 | assign outport_awvalid_w = (state_q == STATE_WRITE_CMD); 582 | assign outport_awaddr_w = cmd_addr_q; 583 | assign outport_awid_w = AXI_ID; 584 | assign outport_awlen_w = cmd_len_q - 8'd1; 585 | assign outport_awburst_w = 2'b01; 586 | 587 | assign outport_wvalid_w = (state_q == STATE_WRITE_DATA) && rx_valid_w; 588 | assign outport_wdata_w = rx_data_w; 589 | assign outport_wstrb_w = write_strb_q; 590 | assign outport_wlast_w = (stat_len_q + 8'd1) == cmd_len_q; 591 | 592 | assign outport_bready_w = 1'b1; 593 | 594 | //----------------------------------------------------------------- 595 | // AXI Response 596 | //----------------------------------------------------------------- 597 | always @ (posedge clk_i or posedge rst_i) 598 | if (rst_i) 599 | stat_resp_q <= 2'b0; 600 | else if (state_q == STATE_IDLE) 601 | stat_resp_q <= 2'b0; 602 | else if (outport_bvalid_w && outport_bready_w) 603 | stat_resp_q <= outport_bresp_w; 604 | else if (outport_rvalid_w && outport_rlast_w && outport_rready_w) 605 | stat_resp_q <= outport_rresp_w; 606 | 607 | //----------------------------------------------------------------- 608 | // GPIO Outputs 609 | //----------------------------------------------------------------- 610 | reg [31:0] gpio_out_q; 611 | always @ (posedge clk_i or posedge rst_i) 612 | if (rst_i) 613 | gpio_out_q <= 32'b0; 614 | else if (state_q == STATE_GPIO_WR && rx_valid_w) 615 | gpio_out_q <= rx_data_w[31:0]; 616 | 617 | assign gpio_outputs_o = gpio_out_q; 618 | 619 | //----------------------------------------------------------------- 620 | // GPIO Inputs 621 | //----------------------------------------------------------------- 622 | always @ (posedge clk_i or posedge rst_i) 623 | if (rst_i) 624 | gpio_in_q <= 32'b0; 625 | else 626 | gpio_in_q <= gpio_inputs_i; 627 | 628 | 629 | endmodule 630 | -------------------------------------------------------------------------------- /src_v/ft60x_axi_retime.v: -------------------------------------------------------------------------------- 1 | //----------------------------------------------------------------- 2 | // FTDI FT601 SuperSpeed USB3.0 to AXI bus master 3 | // V0.1 4 | // Ultra-Embedded.com 5 | // Copyright 2020 6 | // 7 | // Email: admin@ultra-embedded.com 8 | // 9 | // License: GPL 10 | //----------------------------------------------------------------- 11 | // 12 | // This source code is free software: you can redistribute it and/or modify 13 | // it under the terms of the GNU General Public License as published by 14 | // the Free Software Foundation, either version 3 of the License, or 15 | // (at your option) any later version. 16 | // 17 | // This source code is distributed in the hope that it will be useful, 18 | // but WITHOUT ANY WARRANTY; without even the implied warranty of 19 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 | // GNU General Public License for more details. 21 | // 22 | // You should have received a copy of the GNU General Public License 23 | // along with this source code. If not, see . 24 | // 25 | //----------------------------------------------------------------- 26 | 27 | module ft60x_axi_retime 28 | ( 29 | // Inputs 30 | input clk_i 31 | ,input rst_i 32 | ,input inport_awvalid_i 33 | ,input [ 31:0] inport_awaddr_i 34 | ,input [ 3:0] inport_awid_i 35 | ,input [ 7:0] inport_awlen_i 36 | ,input [ 1:0] inport_awburst_i 37 | ,input inport_wvalid_i 38 | ,input [ 31:0] inport_wdata_i 39 | ,input [ 3:0] inport_wstrb_i 40 | ,input inport_wlast_i 41 | ,input inport_bready_i 42 | ,input inport_arvalid_i 43 | ,input [ 31:0] inport_araddr_i 44 | ,input [ 3:0] inport_arid_i 45 | ,input [ 7:0] inport_arlen_i 46 | ,input [ 1:0] inport_arburst_i 47 | ,input inport_rready_i 48 | ,input outport_awready_i 49 | ,input outport_wready_i 50 | ,input outport_bvalid_i 51 | ,input [ 1:0] outport_bresp_i 52 | ,input [ 3:0] outport_bid_i 53 | ,input outport_arready_i 54 | ,input outport_rvalid_i 55 | ,input [ 31:0] outport_rdata_i 56 | ,input [ 1:0] outport_rresp_i 57 | ,input [ 3:0] outport_rid_i 58 | ,input outport_rlast_i 59 | 60 | // Outputs 61 | ,output inport_awready_o 62 | ,output inport_wready_o 63 | ,output inport_bvalid_o 64 | ,output [ 1:0] inport_bresp_o 65 | ,output [ 3:0] inport_bid_o 66 | ,output inport_arready_o 67 | ,output inport_rvalid_o 68 | ,output [ 31:0] inport_rdata_o 69 | ,output [ 1:0] inport_rresp_o 70 | ,output [ 3:0] inport_rid_o 71 | ,output inport_rlast_o 72 | ,output outport_awvalid_o 73 | ,output [ 31:0] outport_awaddr_o 74 | ,output [ 3:0] outport_awid_o 75 | ,output [ 7:0] outport_awlen_o 76 | ,output [ 1:0] outport_awburst_o 77 | ,output outport_wvalid_o 78 | ,output [ 31:0] outport_wdata_o 79 | ,output [ 3:0] outport_wstrb_o 80 | ,output outport_wlast_o 81 | ,output outport_bready_o 82 | ,output outport_arvalid_o 83 | ,output [ 31:0] outport_araddr_o 84 | ,output [ 3:0] outport_arid_o 85 | ,output [ 7:0] outport_arlen_o 86 | ,output [ 1:0] outport_arburst_o 87 | ,output outport_rready_o 88 | ); 89 | 90 | 91 | 92 | 93 | //----------------------------------------------------------------- 94 | // Write Command Request 95 | //----------------------------------------------------------------- 96 | wire [45:0] write_cmd_req_out_w; 97 | 98 | axi4retime_fifo2x46 99 | u_write_cmd_req 100 | ( 101 | .clk_i(clk_i), 102 | .rst_i(rst_i), 103 | 104 | .push_i(inport_awvalid_i), 105 | .data_in_i({inport_awaddr_i, inport_awid_i, inport_awlen_i, inport_awburst_i}), 106 | .accept_o(inport_awready_o), 107 | 108 | .valid_o(outport_awvalid_o), 109 | .data_out_o(write_cmd_req_out_w), 110 | .pop_i(outport_awready_i) 111 | ); 112 | 113 | assign {outport_awaddr_o, outport_awid_o, outport_awlen_o, outport_awburst_o} = write_cmd_req_out_w; 114 | 115 | //----------------------------------------------------------------- 116 | // Write Data Request 117 | //----------------------------------------------------------------- 118 | wire [36:0] write_data_req_out_w; 119 | 120 | axi4retime_fifo2x37 121 | u_write_data_req 122 | ( 123 | .clk_i(clk_i), 124 | .rst_i(rst_i), 125 | 126 | .push_i(inport_wvalid_i), 127 | .data_in_i({inport_wlast_i, inport_wstrb_i, inport_wdata_i}), 128 | .accept_o(inport_wready_o), 129 | 130 | .valid_o(outport_wvalid_o), 131 | .data_out_o(write_data_req_out_w), 132 | .pop_i(outport_wready_i) 133 | ); 134 | 135 | assign {outport_wlast_o, outport_wstrb_o, outport_wdata_o} = write_data_req_out_w; 136 | 137 | //----------------------------------------------------------------- 138 | // Write Response 139 | //----------------------------------------------------------------- 140 | wire [5:0] write_resp_out_w; 141 | 142 | axi4retime_fifo2x6 143 | u_write_resp 144 | ( 145 | .clk_i(clk_i), 146 | .rst_i(rst_i), 147 | 148 | .push_i(outport_bvalid_i), 149 | .data_in_i({outport_bresp_i, outport_bid_i}), 150 | .accept_o(outport_bready_o), 151 | 152 | .valid_o(inport_bvalid_o), 153 | .data_out_o(write_resp_out_w), 154 | .pop_i(inport_bready_i) 155 | ); 156 | 157 | assign {inport_bresp_o, inport_bid_o} = write_resp_out_w; 158 | 159 | //----------------------------------------------------------------- 160 | // Read Request 161 | //----------------------------------------------------------------- 162 | wire [45:0] read_req_out_w; 163 | 164 | axi4retime_fifo2x46 165 | u_read_req 166 | ( 167 | .clk_i(clk_i), 168 | .rst_i(rst_i), 169 | 170 | .push_i(inport_arvalid_i), 171 | .data_in_i({inport_araddr_i, inport_arid_i, inport_arlen_i, inport_arburst_i}), 172 | .accept_o(inport_arready_o), 173 | 174 | .valid_o(outport_arvalid_o), 175 | .data_out_o(read_req_out_w), 176 | .pop_i(outport_arready_i) 177 | ); 178 | 179 | assign {outport_araddr_o, outport_arid_o, outport_arlen_o, outport_arburst_o} = read_req_out_w; 180 | 181 | //----------------------------------------------------------------- 182 | // Read Response 183 | //----------------------------------------------------------------- 184 | wire [38:0] read_resp_out_w; 185 | 186 | axi4retime_fifo2x39 187 | u_read_resp 188 | ( 189 | .clk_i(clk_i), 190 | .rst_i(rst_i), 191 | 192 | .push_i(outport_rvalid_i), 193 | .data_in_i({outport_rdata_i, outport_rresp_i, outport_rid_i, outport_rlast_i}), 194 | .accept_o(outport_rready_o), 195 | 196 | .valid_o(inport_rvalid_o), 197 | .data_out_o(read_resp_out_w), 198 | .pop_i(inport_rready_i) 199 | ); 200 | 201 | assign {inport_rdata_o, inport_rresp_o, inport_rid_o, inport_rlast_o} = read_resp_out_w; 202 | 203 | endmodule 204 | 205 | //----------------------------------------------------------------- 206 | // FIFO modules 207 | //----------------------------------------------------------------- 208 | 209 | module axi4retime_fifo2x37 210 | ( 211 | // Inputs 212 | input clk_i 213 | ,input rst_i 214 | ,input [ 36:0] data_in_i 215 | ,input push_i 216 | ,input pop_i 217 | 218 | // Outputs 219 | ,output [ 36:0] data_out_o 220 | ,output accept_o 221 | ,output valid_o 222 | ); 223 | 224 | 225 | 226 | //----------------------------------------------------------------- 227 | // Registers 228 | //----------------------------------------------------------------- 229 | reg [36:0] ram_q[1:0]; 230 | reg [0:0] rd_ptr_q; 231 | reg [0:0] wr_ptr_q; 232 | reg [1:0] count_q; 233 | 234 | //----------------------------------------------------------------- 235 | // Sequential 236 | //----------------------------------------------------------------- 237 | always @ (posedge clk_i or posedge rst_i) 238 | begin 239 | if (rst_i == 1'b1) 240 | begin 241 | count_q <= 2'b0; 242 | rd_ptr_q <= 1'b0; 243 | wr_ptr_q <= 1'b0; 244 | end 245 | else 246 | begin 247 | // Push 248 | if (push_i & accept_o) 249 | begin 250 | ram_q[wr_ptr_q] <= data_in_i; 251 | wr_ptr_q <= wr_ptr_q + 1'd1; 252 | end 253 | 254 | // Pop 255 | if (pop_i & valid_o) 256 | begin 257 | rd_ptr_q <= rd_ptr_q + 1'd1; 258 | end 259 | 260 | // Count up 261 | if ((push_i & accept_o) & ~(pop_i & valid_o)) 262 | begin 263 | count_q <= count_q + 2'd1; 264 | end 265 | // Count down 266 | else if (~(push_i & accept_o) & (pop_i & valid_o)) 267 | begin 268 | count_q <= count_q - 2'd1; 269 | end 270 | end 271 | end 272 | 273 | //------------------------------------------------------------------- 274 | // Combinatorial 275 | //------------------------------------------------------------------- 276 | assign valid_o = (count_q != 2'd0); 277 | assign accept_o = (count_q != 2'd2); 278 | 279 | 280 | 281 | 282 | assign data_out_o = ram_q[rd_ptr_q]; 283 | 284 | 285 | 286 | endmodule 287 | 288 | module axi4retime_fifo2x39 289 | ( 290 | // Inputs 291 | input clk_i 292 | ,input rst_i 293 | ,input [ 38:0] data_in_i 294 | ,input push_i 295 | ,input pop_i 296 | 297 | // Outputs 298 | ,output [ 38:0] data_out_o 299 | ,output accept_o 300 | ,output valid_o 301 | ); 302 | 303 | 304 | 305 | //----------------------------------------------------------------- 306 | // Registers 307 | //----------------------------------------------------------------- 308 | reg [38:0] ram_q[1:0]; 309 | reg [0:0] rd_ptr_q; 310 | reg [0:0] wr_ptr_q; 311 | reg [1:0] count_q; 312 | 313 | //----------------------------------------------------------------- 314 | // Sequential 315 | //----------------------------------------------------------------- 316 | always @ (posedge clk_i or posedge rst_i) 317 | begin 318 | if (rst_i == 1'b1) 319 | begin 320 | count_q <= 2'b0; 321 | rd_ptr_q <= 1'b0; 322 | wr_ptr_q <= 1'b0; 323 | end 324 | else 325 | begin 326 | // Push 327 | if (push_i & accept_o) 328 | begin 329 | ram_q[wr_ptr_q] <= data_in_i; 330 | wr_ptr_q <= wr_ptr_q + 1'd1; 331 | end 332 | 333 | // Pop 334 | if (pop_i & valid_o) 335 | begin 336 | rd_ptr_q <= rd_ptr_q + 1'd1; 337 | end 338 | 339 | // Count up 340 | if ((push_i & accept_o) & ~(pop_i & valid_o)) 341 | begin 342 | count_q <= count_q + 2'd1; 343 | end 344 | // Count down 345 | else if (~(push_i & accept_o) & (pop_i & valid_o)) 346 | begin 347 | count_q <= count_q - 2'd1; 348 | end 349 | end 350 | end 351 | 352 | //------------------------------------------------------------------- 353 | // Combinatorial 354 | //------------------------------------------------------------------- 355 | assign valid_o = (count_q != 2'd0); 356 | assign accept_o = (count_q != 2'd2); 357 | 358 | 359 | 360 | 361 | assign data_out_o = ram_q[rd_ptr_q]; 362 | 363 | 364 | 365 | endmodule 366 | 367 | 368 | module axi4retime_fifo2x46 369 | ( 370 | // Inputs 371 | input clk_i 372 | ,input rst_i 373 | ,input [ 45:0] data_in_i 374 | ,input push_i 375 | ,input pop_i 376 | 377 | // Outputs 378 | ,output [ 45:0] data_out_o 379 | ,output accept_o 380 | ,output valid_o 381 | ); 382 | 383 | 384 | 385 | //----------------------------------------------------------------- 386 | // Registers 387 | //----------------------------------------------------------------- 388 | reg [45:0] ram_q[1:0]; 389 | reg [0:0] rd_ptr_q; 390 | reg [0:0] wr_ptr_q; 391 | reg [1:0] count_q; 392 | 393 | //----------------------------------------------------------------- 394 | // Sequential 395 | //----------------------------------------------------------------- 396 | always @ (posedge clk_i or posedge rst_i) 397 | begin 398 | if (rst_i == 1'b1) 399 | begin 400 | count_q <= 2'b0; 401 | rd_ptr_q <= 1'b0; 402 | wr_ptr_q <= 1'b0; 403 | end 404 | else 405 | begin 406 | // Push 407 | if (push_i & accept_o) 408 | begin 409 | ram_q[wr_ptr_q] <= data_in_i; 410 | wr_ptr_q <= wr_ptr_q + 1'd1; 411 | end 412 | 413 | // Pop 414 | if (pop_i & valid_o) 415 | begin 416 | rd_ptr_q <= rd_ptr_q + 1'd1; 417 | end 418 | 419 | // Count up 420 | if ((push_i & accept_o) & ~(pop_i & valid_o)) 421 | begin 422 | count_q <= count_q + 2'd1; 423 | end 424 | // Count down 425 | else if (~(push_i & accept_o) & (pop_i & valid_o)) 426 | begin 427 | count_q <= count_q - 2'd1; 428 | end 429 | end 430 | end 431 | 432 | //------------------------------------------------------------------- 433 | // Combinatorial 434 | //------------------------------------------------------------------- 435 | assign valid_o = (count_q != 2'd0); 436 | assign accept_o = (count_q != 2'd2); 437 | 438 | 439 | 440 | 441 | assign data_out_o = ram_q[rd_ptr_q]; 442 | 443 | 444 | 445 | endmodule 446 | 447 | module axi4retime_fifo2x6 448 | ( 449 | // Inputs 450 | input clk_i 451 | ,input rst_i 452 | ,input [ 5:0] data_in_i 453 | ,input push_i 454 | ,input pop_i 455 | 456 | // Outputs 457 | ,output [ 5:0] data_out_o 458 | ,output accept_o 459 | ,output valid_o 460 | ); 461 | 462 | 463 | 464 | //----------------------------------------------------------------- 465 | // Registers 466 | //----------------------------------------------------------------- 467 | reg [5:0] ram_q[1:0]; 468 | reg [0:0] rd_ptr_q; 469 | reg [0:0] wr_ptr_q; 470 | reg [1:0] count_q; 471 | 472 | //----------------------------------------------------------------- 473 | // Sequential 474 | //----------------------------------------------------------------- 475 | always @ (posedge clk_i or posedge rst_i) 476 | begin 477 | if (rst_i == 1'b1) 478 | begin 479 | count_q <= 2'b0; 480 | rd_ptr_q <= 1'b0; 481 | wr_ptr_q <= 1'b0; 482 | end 483 | else 484 | begin 485 | // Push 486 | if (push_i & accept_o) 487 | begin 488 | ram_q[wr_ptr_q] <= data_in_i; 489 | wr_ptr_q <= wr_ptr_q + 1'd1; 490 | end 491 | 492 | // Pop 493 | if (pop_i & valid_o) 494 | begin 495 | rd_ptr_q <= rd_ptr_q + 1'd1; 496 | end 497 | 498 | // Count up 499 | if ((push_i & accept_o) & ~(pop_i & valid_o)) 500 | begin 501 | count_q <= count_q + 2'd1; 502 | end 503 | // Count down 504 | else if (~(push_i & accept_o) & (pop_i & valid_o)) 505 | begin 506 | count_q <= count_q - 2'd1; 507 | end 508 | end 509 | end 510 | 511 | //------------------------------------------------------------------- 512 | // Combinatorial 513 | //------------------------------------------------------------------- 514 | assign valid_o = (count_q != 2'd0); 515 | assign accept_o = (count_q != 2'd2); 516 | 517 | 518 | 519 | 520 | assign data_out_o = ram_q[rd_ptr_q]; 521 | 522 | 523 | 524 | 525 | endmodule 526 | -------------------------------------------------------------------------------- /src_v/ft60x_fifo.v: -------------------------------------------------------------------------------- 1 | //----------------------------------------------------------------- 2 | // FTDI FT601 SuperSpeed USB3.0 to AXI bus master 3 | // V0.1 4 | // Ultra-Embedded.com 5 | // Copyright 2020 6 | // 7 | // Email: admin@ultra-embedded.com 8 | // 9 | // License: GPL 10 | //----------------------------------------------------------------- 11 | // 12 | // This source code is free software: you can redistribute it and/or modify 13 | // it under the terms of the GNU General Public License as published by 14 | // the Free Software Foundation, either version 3 of the License, or 15 | // (at your option) any later version. 16 | // 17 | // This source code is distributed in the hope that it will be useful, 18 | // but WITHOUT ANY WARRANTY; without even the implied warranty of 19 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 | // GNU General Public License for more details. 21 | // 22 | // You should have received a copy of the GNU General Public License 23 | // along with this source code. If not, see . 24 | // 25 | //----------------------------------------------------------------- 26 | 27 | module ft60x_fifo 28 | ( 29 | // Inputs 30 | input clk_i 31 | ,input rst_i 32 | ,input ftdi_rxf_i 33 | ,input ftdi_txe_i 34 | ,input [ 31:0] ftdi_data_in_i 35 | ,input [ 3:0] ftdi_be_in_i 36 | ,input inport_valid_i 37 | ,input [ 31:0] inport_data_i 38 | ,input outport_accept_i 39 | 40 | // Outputs 41 | ,output ftdi_wrn_o 42 | ,output ftdi_rdn_o 43 | ,output ftdi_oen_o 44 | ,output [ 31:0] ftdi_data_out_o 45 | ,output [ 3:0] ftdi_be_out_o 46 | ,output inport_accept_o 47 | ,output outport_valid_o 48 | ,output [ 31:0] outport_data_o 49 | ); 50 | 51 | 52 | 53 | //----------------------------------------------------------------- 54 | // Rx RAM: FT60x -> Target 55 | //----------------------------------------------------------------- 56 | reg [10:0] rx_wr_ptr_q; 57 | wire [10:0] rx_wr_ptr_next_w = rx_wr_ptr_q + 11'd1; 58 | reg [10:0] rx_rd_ptr_q; 59 | wire [10:0] rx_rd_ptr_next_w = rx_rd_ptr_q + 11'd1; 60 | 61 | // Retime input data 62 | reg [31:0] rd_data_q; 63 | reg rd_valid_q; 64 | wire rx_valid_w; 65 | 66 | always @ (posedge clk_i or posedge rst_i) 67 | if (rst_i) 68 | rd_valid_q <= 1'b0; 69 | else 70 | rd_valid_q <= rx_valid_w; 71 | 72 | always @ (posedge clk_i or posedge rst_i) 73 | if (rst_i) 74 | rd_data_q <= 32'b0; 75 | else 76 | rd_data_q <= ftdi_data_in_i; 77 | 78 | // Write pointer 79 | always @ (posedge clk_i or posedge rst_i) 80 | if (rst_i) 81 | rx_wr_ptr_q <= 11'b0; 82 | else if (rd_valid_q) 83 | rx_wr_ptr_q <= rx_wr_ptr_next_w; 84 | 85 | wire [31:0] rx_data_w; 86 | 87 | ft60x_ram_dp 88 | u_rx_ram 89 | ( 90 | .clk0_i(clk_i) 91 | ,.rst0_i(rst_i) 92 | ,.clk1_i(clk_i) 93 | ,.rst1_i(rst_i) 94 | 95 | // Write Port 96 | ,.wr0_i(rd_valid_q) 97 | ,.addr0_i(rx_wr_ptr_q) 98 | ,.data0_i(rd_data_q) 99 | ,.data0_o() 100 | 101 | // Read Port 102 | ,.wr1_i(1'b0) 103 | ,.addr1_i(rx_rd_ptr_q) 104 | ,.data1_i(32'b0) 105 | ,.data1_o(rx_data_w) 106 | ); 107 | 108 | wire [11:0] rx_level_w = (rx_rd_ptr_q <= rx_wr_ptr_q) ? (rx_wr_ptr_q - rx_rd_ptr_q) : (12'd2048 - rx_rd_ptr_q) + rx_wr_ptr_q; 109 | wire rx_space_w = (12'd2048 - rx_level_w) > 12'd1024; 110 | 111 | // Delayed write pointer 112 | reg [10:0] rx_wr_ptr2_q; 113 | always @ (posedge clk_i or posedge rst_i) 114 | if (rst_i) 115 | rx_wr_ptr2_q <= 11'b0; 116 | else 117 | rx_wr_ptr2_q <= rx_wr_ptr_q; 118 | 119 | // Read Side 120 | wire read_ok_w = (rx_wr_ptr2_q != rx_rd_ptr_q); 121 | reg rd_q; 122 | 123 | always @ (posedge clk_i or posedge rst_i) 124 | if (rst_i) 125 | rd_q <= 1'b0; 126 | else 127 | rd_q <= read_ok_w; 128 | 129 | always @ (posedge clk_i or posedge rst_i) 130 | if (rst_i) 131 | rx_rd_ptr_q <= 11'b0; 132 | // Read address increment 133 | else if (read_ok_w && ((!outport_valid_o) || (outport_valid_o && outport_accept_i))) 134 | rx_rd_ptr_q <= rx_rd_ptr_next_w; 135 | 136 | // Read Skid Buffer 137 | reg rd_skid_q; 138 | reg [31:0] rd_skid_data_q; 139 | 140 | always @ (posedge clk_i or posedge rst_i) 141 | if (rst_i) 142 | begin 143 | rd_skid_q <= 1'b0; 144 | rd_skid_data_q <= 32'b0; 145 | end 146 | else if (outport_valid_o && !outport_accept_i) 147 | begin 148 | rd_skid_q <= 1'b1; 149 | rd_skid_data_q <= outport_data_o; 150 | end 151 | else 152 | begin 153 | rd_skid_q <= 1'b0; 154 | rd_skid_data_q <= 32'b0; 155 | end 156 | 157 | assign outport_valid_o = rd_skid_q | rd_q; 158 | assign outport_data_o = rd_skid_q ? rd_skid_data_q : rx_data_w; 159 | 160 | //----------------------------------------------------------------- 161 | // Tx RAM: Target -> FT60x 162 | //----------------------------------------------------------------- 163 | reg [10:0] tx_wr_ptr_q; 164 | wire [10:0] tx_wr_ptr_next_w = tx_wr_ptr_q + 11'd1; 165 | reg [10:0] tx_rd_ptr_q; 166 | wire [10:0] tx_rd_ptr_next_w = tx_rd_ptr_q + 11'd1; 167 | wire [10:0] tx_rd_ptr_prev_w = tx_rd_ptr_q - 11'd2; 168 | 169 | wire [31:0] tx_data_w; 170 | 171 | ft60x_ram_dp 172 | u_tx_ram 173 | ( 174 | .clk0_i(clk_i) 175 | ,.rst0_i(rst_i) 176 | ,.clk1_i(clk_i) 177 | ,.rst1_i(rst_i) 178 | 179 | // Write Port 180 | ,.wr0_i(inport_valid_i & inport_accept_o) 181 | ,.addr0_i(tx_wr_ptr_q) 182 | ,.data0_i(inport_data_i) 183 | ,.data0_o() 184 | 185 | // Read Port 186 | ,.wr1_i(1'b0) 187 | ,.addr1_i(tx_rd_ptr_q) 188 | ,.data1_i(32'b0) 189 | ,.data1_o(tx_data_w) 190 | ); 191 | 192 | // Write pointer 193 | always @ (posedge clk_i or posedge rst_i) 194 | if (rst_i) 195 | tx_wr_ptr_q <= 11'b0; 196 | else if (inport_valid_i & inport_accept_o) 197 | tx_wr_ptr_q <= tx_wr_ptr_next_w; 198 | 199 | // Delayed write pointer (pesamistic) 200 | reg [10:0] tx_wr_ptr2_q; 201 | always @ (posedge clk_i or posedge rst_i) 202 | if (rst_i) 203 | tx_wr_ptr2_q <= 11'b0; 204 | else 205 | tx_wr_ptr2_q <= tx_wr_ptr_q; 206 | 207 | // Write push timeout 208 | localparam TX_BACKOFF_THRESH = 16'h00FF; 209 | 210 | reg [15:0] tx_idle_cycles_q; 211 | always @ (posedge clk_i or posedge rst_i) 212 | if (rst_i) 213 | tx_idle_cycles_q <= 16'b0; 214 | else if (inport_valid_i) 215 | tx_idle_cycles_q <= 16'b0; 216 | else if (tx_idle_cycles_q != TX_BACKOFF_THRESH) 217 | tx_idle_cycles_q <= tx_idle_cycles_q + 16'd1; 218 | 219 | wire tx_timeout_w = (tx_idle_cycles_q == TX_BACKOFF_THRESH); 220 | 221 | wire [11:0] tx_level_w = (tx_rd_ptr_q <= tx_wr_ptr2_q) ? (tx_wr_ptr2_q - tx_rd_ptr_q) : (12'd2048 - tx_rd_ptr_q) + tx_wr_ptr2_q; 222 | wire tx_ready_w = (tx_level_w >= (1024 / 4)) || (tx_timeout_w && tx_level_w != 12'd0); 223 | 224 | assign inport_accept_o = (tx_level_w < 12'd2000); 225 | 226 | reg [11:0] tx_level_q; 227 | 228 | always @ (posedge clk_i or posedge rst_i) 229 | if (rst_i) 230 | tx_level_q <= 12'b0; 231 | else 232 | tx_level_q <= tx_level_w; 233 | 234 | //----------------------------------------------------------------- 235 | // Defines / Local params 236 | //----------------------------------------------------------------- 237 | localparam STATE_W = 3; 238 | localparam STATE_IDLE = 3'd0; 239 | localparam STATE_TX_START = 3'd1; 240 | localparam STATE_TX = 3'd2; 241 | localparam STATE_TURNAROUND = 3'd3; 242 | localparam STATE_RX_START = 3'd4; 243 | localparam STATE_RX = 3'd5; 244 | 245 | reg [STATE_W-1:0] state_q; 246 | 247 | wire rx_ready_w = !ftdi_rxf_i; 248 | wire tx_space_w = !ftdi_txe_i; 249 | 250 | assign rx_valid_w = rx_ready_w & (state_q == STATE_RX); 251 | 252 | //----------------------------------------------------------------- 253 | // Next State Logic 254 | //----------------------------------------------------------------- 255 | reg [STATE_W-1:0] next_state_r; 256 | reg [2:0] state_count_q; 257 | always @ * 258 | begin 259 | next_state_r = state_q; 260 | 261 | case (state_q) 262 | //----------------------------------------- 263 | // STATE_IDLE 264 | //----------------------------------------- 265 | STATE_IDLE : 266 | begin 267 | if (rx_ready_w && rx_space_w) 268 | next_state_r = STATE_RX_START; 269 | else if (tx_space_w && tx_ready_w) 270 | next_state_r = STATE_TX_START; 271 | end 272 | //----------------------------------------- 273 | // STATE_TX_START 274 | //----------------------------------------- 275 | STATE_TX_START : 276 | begin 277 | next_state_r = STATE_TX; 278 | end 279 | //----------------------------------------- 280 | // STATE_TX 281 | //----------------------------------------- 282 | STATE_TX : 283 | begin 284 | if (!tx_space_w || tx_level_q == 12'd0) 285 | next_state_r = STATE_TURNAROUND; 286 | end 287 | //----------------------------------------- 288 | // STATE_TURNAROUND 289 | //----------------------------------------- 290 | STATE_TURNAROUND : 291 | begin 292 | if (state_count_q == 3'b0) 293 | next_state_r = STATE_IDLE; 294 | end 295 | //----------------------------------------- 296 | // STATE_RX_START 297 | //----------------------------------------- 298 | STATE_RX_START : 299 | begin 300 | next_state_r = STATE_RX; 301 | end 302 | //----------------------------------------- 303 | // STATE_RX 304 | //----------------------------------------- 305 | STATE_RX : 306 | begin 307 | if (!rx_ready_w /*|| rx_full_next_w*/) 308 | next_state_r = STATE_TURNAROUND; 309 | end 310 | default: 311 | ; 312 | endcase 313 | end 314 | 315 | // Update state 316 | always @ (posedge clk_i or posedge rst_i) 317 | if (rst_i) 318 | state_q <= STATE_IDLE; 319 | else 320 | state_q <= next_state_r; 321 | 322 | always @ (posedge clk_i or posedge rst_i) 323 | if (rst_i) 324 | state_count_q <= 3'b0; 325 | else if (state_q == STATE_TX && next_state_r == STATE_TURNAROUND) 326 | state_count_q <= 3'd7; 327 | else if (state_q == STATE_RX && next_state_r == STATE_TURNAROUND) 328 | state_count_q <= 3'd7; 329 | else if (state_count_q != 3'b0) 330 | state_count_q <= state_count_q - 3'd1; 331 | 332 | // Read pointer 333 | always @ (posedge clk_i or posedge rst_i) 334 | if (rst_i) 335 | tx_rd_ptr_q <= 11'b0; 336 | else if (((state_q == STATE_IDLE && next_state_r == STATE_TX_START) || (state_q == STATE_TX_START) || (state_q == STATE_TX && tx_space_w)) && (tx_rd_ptr_q != tx_wr_ptr2_q) && (tx_level_q != 12'b0)) 337 | tx_rd_ptr_q <= tx_rd_ptr_next_w; 338 | else if ((state_q == STATE_TX) && !tx_space_w && tx_level_q == 12'b0) 339 | tx_rd_ptr_q <= tx_rd_ptr_q - 11'd1; 340 | else if ((state_q == STATE_TX) && !tx_space_w) 341 | tx_rd_ptr_q <= tx_rd_ptr_prev_w; 342 | 343 | //----------------------------------------------------------------- 344 | // RD/WR/OE 345 | //----------------------------------------------------------------- 346 | // Xilinx placement pragmas: 347 | //synthesis attribute IOB of rdn_q is "TRUE" 348 | //synthesis attribute IOB of wrn_q is "TRUE" 349 | //synthesis attribute IOB of oen_q is "TRUE" 350 | //synthesis attribute IOB of data_q is "TRUE" 351 | 352 | reg rdn_q; 353 | reg wrn_q; 354 | reg oen_q; 355 | reg [35:0] data_q; 356 | 357 | always @ (posedge clk_i or posedge rst_i) 358 | if (rst_i) 359 | oen_q <= 1'b1; 360 | else if (state_q == STATE_IDLE && next_state_r == STATE_RX_START) 361 | oen_q <= 1'b0; 362 | else if (state_q == STATE_RX && next_state_r == STATE_TURNAROUND) 363 | oen_q <= 1'b1; 364 | 365 | always @ (posedge clk_i or posedge rst_i) 366 | if (rst_i) 367 | rdn_q <= 1'b1; 368 | else if (state_q == STATE_RX_START && next_state_r == STATE_RX) 369 | rdn_q <= 1'b0; 370 | else if (state_q == STATE_RX && next_state_r == STATE_TURNAROUND) 371 | rdn_q <= 1'b1; 372 | 373 | always @ (posedge clk_i or posedge rst_i) 374 | if (rst_i) 375 | wrn_q <= 1'b1; 376 | else if (state_q == STATE_TX_START && next_state_r == STATE_TX) 377 | wrn_q <= 1'b0; 378 | else if (state_q == STATE_TX && next_state_r == STATE_TURNAROUND) 379 | wrn_q <= 1'b1; 380 | 381 | always @ (posedge clk_i or posedge rst_i) 382 | if (rst_i) 383 | data_q <= 36'b0; 384 | else 385 | data_q <= {4'b1111, tx_data_w}; 386 | 387 | assign ftdi_wrn_o = wrn_q; 388 | assign ftdi_rdn_o = rdn_q; 389 | assign ftdi_oen_o = oen_q; 390 | assign ftdi_data_out_o = data_q[31:0]; 391 | assign ftdi_be_out_o = data_q[35:32]; 392 | 393 | endmodule 394 | 395 | 396 | module ft60x_ram_dp 397 | ( 398 | // Inputs 399 | input clk0_i 400 | ,input rst0_i 401 | ,input [ 10:0] addr0_i 402 | ,input [ 31:0] data0_i 403 | ,input wr0_i 404 | ,input clk1_i 405 | ,input rst1_i 406 | ,input [ 10:0] addr1_i 407 | ,input [ 31:0] data1_i 408 | ,input wr1_i 409 | 410 | // Outputs 411 | ,output [ 31:0] data0_o 412 | ,output [ 31:0] data1_o 413 | ); 414 | 415 | //----------------------------------------------------------------- 416 | // Dual Port RAM 8KB 417 | // Mode: Read First 418 | //----------------------------------------------------------------- 419 | /* verilator lint_off MULTIDRIVEN */ 420 | reg [31:0] ram [2047:0] /*verilator public*/; 421 | /* verilator lint_on MULTIDRIVEN */ 422 | 423 | reg [31:0] ram_read0_q; 424 | reg [31:0] ram_read1_q; 425 | 426 | 427 | // Synchronous write 428 | always @ (posedge clk0_i) 429 | begin 430 | if (wr0_i) 431 | ram[addr0_i][31:0] <= data0_i[31:0]; 432 | 433 | ram_read0_q <= ram[addr0_i]; 434 | end 435 | 436 | always @ (posedge clk1_i) 437 | begin 438 | if (wr1_i) 439 | ram[addr1_i][31:0] <= data1_i[31:0]; 440 | 441 | ram_read1_q <= ram[addr1_i]; 442 | end 443 | 444 | assign data0_o = ram_read0_q; 445 | assign data1_o = ram_read1_q; 446 | 447 | 448 | endmodule 449 | -------------------------------------------------------------------------------- /sw/Makefile: -------------------------------------------------------------------------------- 1 | COMMON_SRC = ftdi_axi_driver.cpp ftdi_ft60x.cpp 2 | CFLAGS = -Ilinux-x86_64 3 | LFLAGS = -Llinux-x86_64 4 | LIBS = -l:libftd3xx.so 5 | 6 | TARGETS = peek poke load verify check gpio_wr gpio_rd 7 | all: $(TARGETS) 8 | 9 | $(TARGETS): 10 | g++ -o $@ $(CFLAGS) $(LFLAGS) $@.cpp $(COMMON_SRC) $(LIBS) 11 | 12 | clean: 13 | -rm -rf $(TARGETS) -------------------------------------------------------------------------------- /sw/check.cpp: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | #include 5 | #include 6 | #include 7 | #include 8 | 9 | #include "ftdi_axi_driver.h" 10 | #include "ftdi_ft60x.h" 11 | 12 | #define MEASURE_START(_t) gettimeofday(&_t, NULL) 13 | 14 | #define MEASURE_STOP(_t2, _t1, _elapsed) do { \ 15 | gettimeofday(&t2, NULL); \ 16 | _elapsed = (t2.tv_sec - t1.tv_sec) * 1000.0; \ 17 | _elapsed += (t2.tv_usec - t1.tv_usec) / 1000.0; \ 18 | } while (0) 19 | 20 | //----------------------------------------------------------------- 21 | // Command line options 22 | //----------------------------------------------------------------- 23 | #define GETOPTS_ARGS "d:t:a:s:h" 24 | 25 | static struct option long_options[] = 26 | { 27 | {"device", required_argument, 0, 'd'}, 28 | {"test", required_argument, 0, 't'}, 29 | {"addr", required_argument, 0, 'a'}, 30 | {"size", required_argument, 0, 's'}, 31 | {"help", no_argument, 0, 'h'}, 32 | {0, 0, 0, 0} 33 | }; 34 | 35 | static void help_options(void) 36 | { 37 | fprintf (stderr,"Usage:\n"); 38 | fprintf (stderr," --device | -d IDX Device index to use (default: 0)\n"); 39 | fprintf (stderr," --test | -t IDX Test index (default: 0)\n"); 40 | fprintf (stderr," --addr | -a ADDR Test arg address\n"); 41 | fprintf (stderr," --size | -s SIZE Test arg size\n"); 42 | exit(-1); 43 | } 44 | //----------------------------------------------------------------- 45 | // main: 46 | //----------------------------------------------------------------- 47 | int main(int argc, char *argv[]) 48 | { 49 | int c; 50 | int help = 0; 51 | int device = 0; 52 | int test_idx = 0; 53 | uint32_t addr = 0; 54 | uint32_t size = (64 * 1024); 55 | 56 | int option_index = 0; 57 | while ((c = getopt_long (argc, argv, GETOPTS_ARGS, long_options, &option_index)) != -1) 58 | { 59 | switch(c) 60 | { 61 | case 'd': 62 | device = strtoul(optarg, NULL, 0); 63 | break; 64 | case 't': 65 | test_idx = strtoul(optarg, NULL, 0); 66 | break; 67 | case 'a': 68 | addr = strtoul(optarg, NULL, 0); 69 | break; 70 | case 's': 71 | size = strtol(optarg, NULL, 0); 72 | break; 73 | default: 74 | help = 1; 75 | break; 76 | } 77 | } 78 | 79 | if (help) 80 | { 81 | help_options(); 82 | return -1; 83 | } 84 | 85 | // Open the port 86 | ftdi_ft60x port; 87 | if (!port.open(0)) 88 | return -1; 89 | 90 | // Reset target state machines 91 | ftdi_axi_driver driver(&port); 92 | driver.send_drain(1000); 93 | port.sleep(10000); 94 | 95 | switch (test_idx) 96 | { 97 | case 0: 98 | { 99 | printf("TEST: ECHO loopback - press CTRL-C to stop...\n"); 100 | 101 | while (true) 102 | { 103 | uint8_t echo_buf[128]; 104 | for (int i=0;i= 1000.0) 128 | { 129 | printf("Data rate: %dKB per s\n", total_data / 1024); 130 | total_data = 0; 131 | MEASURE_START(t1); 132 | } 133 | } 134 | } 135 | break; 136 | case 2: 137 | { 138 | printf("TEST: Read performance test - press CTRL-C to stop...\n"); 139 | 140 | uint32_t total_data = 0; 141 | struct timeval t1, t2; 142 | double duration; 143 | uint8_t *read_buf = new uint8_t[size]; 144 | MEASURE_START(t1); 145 | while (true) 146 | { 147 | if (!driver.read(addr, read_buf, size)) 148 | return -1; 149 | total_data += size; 150 | 151 | MEASURE_STOP(t2, t1, duration); 152 | if (duration >= 1000.0) 153 | { 154 | printf("Data rate: %dKB per s\n", total_data / 1024); 155 | total_data = 0; 156 | MEASURE_START(t1); 157 | } 158 | } 159 | } 160 | break; 161 | case 3: 162 | { 163 | printf("TEST: Read/write data test - press CTRL-C to stop...\n"); 164 | 165 | uint32_t total_data = 0; 166 | struct timeval t1, t2; 167 | double duration; 168 | uint8_t *read_buf = new uint8_t[size]; 169 | uint8_t *write_buf = new uint8_t[size]; 170 | MEASURE_START(t1); 171 | while (true) 172 | { 173 | for (int i=0;i= 1000.0) 191 | { 192 | printf("Data rate: %dKB per s\n", total_data / 1024); 193 | total_data = 0; 194 | MEASURE_START(t1); 195 | } 196 | } 197 | } 198 | break; 199 | } 200 | 201 | port.close(); 202 | return 0; 203 | } 204 | -------------------------------------------------------------------------------- /sw/ftdi_axi_driver.cpp: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | #include "ftdi_axi_driver.h" 5 | 6 | typedef struct CommandBlock 7 | { 8 | uint8_t command; 9 | uint8_t length; 10 | uint16_t seq_num; 11 | uint32_t addr; 12 | } tCommandBlock; 13 | 14 | typedef struct StatusBlock 15 | { 16 | uint16_t seq_num; 17 | uint16_t status; 18 | } tStatusBlock; 19 | 20 | #define CMD_ID_ECHO 0x01 21 | #define CMD_ID_DRAIN 0x02 22 | #define CMD_ID_READ 0x10 23 | #define CMD_ID_WRITE8_NP 0x20 // 8-bit write (with response) 24 | #define CMD_ID_WRITE16_NP 0x21 // 16-bit write (with response) 25 | #define CMD_ID_WRITE_NP 0x22 // 32-bit write (with response) 26 | #define CMD_ID_WRITE8 0x30 // 8-bit write 27 | #define CMD_ID_WRITE16 0x31 // 16-bit write 28 | #define CMD_ID_WRITE 0x32 // 32-bit write 29 | #define CMD_ID_GPIO_WR 0x40 30 | #define CMD_ID_GPIO_RD 0x41 31 | 32 | #define MAX_POSTED_WR 4096 33 | 34 | //------------------------------------------------------------- 35 | // Constructor 36 | //------------------------------------------------------------- 37 | ftdi_axi_driver::ftdi_axi_driver(ftdi_driver_api *port) 38 | { 39 | m_port = port; 40 | m_seq_num = 1; 41 | } 42 | //------------------------------------------------------------- 43 | // fill_command: Fill command with optional data into a buffer 44 | //------------------------------------------------------------- 45 | int ftdi_axi_driver::fill_command(uint8_t *wr_buf, uint8_t cmd_id, uint32_t addr, uint8_t *data, int length) 46 | { 47 | int length4 = ((length + 3)/4) * 4; 48 | tCommandBlock *cmd = (tCommandBlock*)wr_buf; 49 | int wr_len; 50 | 51 | assert((length4 / 4) < 256); 52 | cmd->command = cmd_id; 53 | cmd->length = length4 / 4; 54 | cmd->seq_num = m_seq_num; 55 | cmd->addr = addr; 56 | 57 | if (data && length) 58 | { 59 | memcpy(&wr_buf[sizeof(tCommandBlock)], data, length); 60 | wr_len = sizeof(tCommandBlock) + length4; 61 | } 62 | else 63 | wr_len = sizeof(tCommandBlock); 64 | 65 | m_seq_num++; 66 | return wr_len; 67 | } 68 | //------------------------------------------------------------- 69 | // send_command: Send command with optional data 70 | //------------------------------------------------------------- 71 | bool ftdi_axi_driver::send_command(uint8_t cmd_id, uint32_t addr, uint8_t *data, int length, int timeout_ms) 72 | { 73 | int length4 = ((length + 3)/4) * 4; 74 | uint8_t *wr_buf = new uint8_t[sizeof(tCommandBlock) + length4]; 75 | tCommandBlock *cmd = (tCommandBlock*)wr_buf; 76 | int wr_len; 77 | 78 | assert((length4 / 4) < 256); 79 | cmd->command = cmd_id; 80 | cmd->length = length4 / 4; 81 | cmd->seq_num = m_seq_num; 82 | cmd->addr = addr; 83 | 84 | if (data && length) 85 | { 86 | memcpy(&wr_buf[sizeof(tCommandBlock)], data, length); 87 | wr_len = sizeof(tCommandBlock) + length4; 88 | } 89 | else 90 | wr_len = sizeof(tCommandBlock); 91 | 92 | int sent = m_port->write(wr_buf, wr_len, timeout_ms); 93 | delete []wr_buf; 94 | 95 | bool ok = true; 96 | if (sent != wr_len) 97 | { 98 | fprintf(stderr, "ERROR: Failed to send command\n"); 99 | ok = false; 100 | } 101 | 102 | m_seq_num++; 103 | return ok; 104 | } 105 | //------------------------------------------------------------- 106 | // recv_data: Wait on response data 107 | //------------------------------------------------------------- 108 | uint8_t* ftdi_axi_driver::recv_data(uint16_t seq_num, int length, int timeout_ms) 109 | { 110 | bool ok = true; 111 | int length4 = ((length + 3)/4) * 4; 112 | int expected = sizeof(tStatusBlock) + length4; 113 | uint8_t *rd_buf = new uint8_t[expected]; 114 | int rd_len = m_port->read(rd_buf, expected, timeout_ms); 115 | if (rd_len == expected) 116 | { 117 | tStatusBlock *sts = (tStatusBlock *)&rd_buf[length4]; 118 | if (sts->seq_num != seq_num) 119 | { 120 | fprintf(stderr, "ERROR: Sequence number: %04x != %04x\n", sts->seq_num, seq_num); 121 | ok = false; 122 | } 123 | } 124 | else 125 | { 126 | fprintf(stderr, "ERROR: Failed to read data (got %d, expected %d)\n", rd_len, expected); 127 | ok = false; 128 | } 129 | 130 | if (!ok) 131 | { 132 | delete [] rd_buf; 133 | return NULL; 134 | } 135 | else 136 | return rd_buf; 137 | } 138 | //------------------------------------------------------------- 139 | // send_drain: Send drain request 140 | //------------------------------------------------------------- 141 | bool ftdi_axi_driver::send_drain(int timeout_ms) 142 | { 143 | uint8_t wr_buf[256]; 144 | for (int i=0;iwrite(wr_buf, sizeof(wr_buf), timeout_ms); 147 | 148 | return true; 149 | } 150 | //------------------------------------------------------------- 151 | // send_echo: Send an echo request 152 | //------------------------------------------------------------- 153 | bool ftdi_axi_driver::send_echo(uint8_t *data, int length, int timeout_ms) 154 | { 155 | int length4 = ((length + 3)/4) * 4; 156 | bool ok = true; 157 | 158 | if (!send_command(CMD_ID_ECHO, 0, data, length, timeout_ms)) 159 | { 160 | fprintf(stderr, "ERROR: Failed to send echo data\n"); 161 | ok = false; 162 | } 163 | else 164 | { 165 | uint8_t* rd_buf = recv_data(m_seq_num - 1, length, timeout_ms); 166 | if (rd_buf) 167 | { 168 | for (int i=0;i= 4) 288 | { 289 | int size = (length < MAX_CHUNK_SIZE) ? (length & ~3) : MAX_CHUNK_SIZE; 290 | bool last = ((length - size) < MAX_CHUNK_SIZE) || (chunks >= (MAX_WR_CHUNKS-1)); 291 | wr_buf += fill_command(wr_buf, last ? CMD_ID_WRITE_NP : CMD_ID_WRITE, addr, data, size); 292 | addr += size; 293 | data += size; 294 | length -= size; 295 | chunks += 1; 296 | 297 | if (last) 298 | { 299 | int sent = m_port->write(m_write_buf, wr_buf - m_write_buf, timeout_ms); 300 | 301 | uint8_t* rd_buf = recv_data(m_seq_num - 1, 0, timeout_ms); 302 | if (rd_buf) 303 | delete [] rd_buf; 304 | else 305 | return false; 306 | 307 | chunks = 0; 308 | wr_buf = m_write_buf; 309 | } 310 | } 311 | 312 | // Unaligned tail 313 | while (length) 314 | { 315 | if (!write8(addr, *data, timeout_ms)) 316 | return false; 317 | addr++; 318 | length--; 319 | data++; 320 | } 321 | 322 | return true; 323 | } 324 | //------------------------------------------------------------- 325 | // read: Read a block of data 326 | //------------------------------------------------------------- 327 | bool ftdi_axi_driver::read(uint32_t addr, uint8_t *data, int length, int timeout_ms) 328 | { 329 | // Unaligned head 330 | if (addr & 3) 331 | { 332 | uint32_t dw; 333 | if (!read32(addr, dw, timeout_ms)) 334 | return false; 335 | 336 | for (int b=(addr & 3);b<4;b++) 337 | { 338 | *data++ = (dw >> (8*b)); 339 | addr++; 340 | length--; 341 | } 342 | } 343 | 344 | uint8_t *wr_buf = m_write_buf; 345 | int chunks = 0; 346 | int expected = 0; 347 | 348 | while (length >= 4) 349 | { 350 | int size = (length < MAX_CHUNK_SIZE) ? (length & ~3) : MAX_CHUNK_SIZE; 351 | bool last = ((length - size) < MAX_CHUNK_SIZE) || (chunks >= (MAX_RD_CHUNKS-1)); 352 | wr_buf += fill_command(wr_buf, CMD_ID_READ, addr, NULL, size); 353 | addr += size; 354 | length -= size; 355 | chunks += 1; 356 | expected += size + 4; 357 | 358 | if (last) 359 | { 360 | int sent = m_port->write(m_write_buf, wr_buf - m_write_buf, timeout_ms); 361 | int rd_len = m_port->read(m_read_buf, expected, timeout_ms); 362 | if (rd_len < 0) 363 | return false; 364 | 365 | // Wait for remaining data 366 | if (rd_len != expected) 367 | { 368 | int remain = expected - rd_len; 369 | int retry = m_port->read(&m_read_buf[rd_len], remain, timeout_ms); 370 | if (retry != remain) 371 | { 372 | fprintf(stderr, "ERROR: Data underflow\n"); 373 | return false; 374 | } 375 | } 376 | 377 | uint8_t *p = m_read_buf; 378 | int data_ready = expected - (chunks * 4); 379 | for (int i=0;i> (8*b)); 406 | } 407 | 408 | return true; 409 | } 410 | -------------------------------------------------------------------------------- /sw/ftdi_axi_driver.h: -------------------------------------------------------------------------------- 1 | #ifndef FTDI_AXI_DRIVER_H 2 | #define FTDI_AXI_DRIVER_H 3 | 4 | #include "ftdi_driver_api.h" 5 | 6 | #define MAX_WR_CHUNKS 128 7 | #define MAX_RD_CHUNKS 128 8 | 9 | #define MAX_CHUNK_SIZE 512 10 | 11 | //------------------------------------------------------------- 12 | // ftdi_axi_driver: Wrapper interface for AXI bus master 13 | //------------------------------------------------------------- 14 | class ftdi_axi_driver 15 | { 16 | public: 17 | ftdi_axi_driver(ftdi_driver_api *port); 18 | 19 | bool send_drain(int timeout_ms); 20 | bool send_echo(uint8_t *data, int length, int timeout_ms = 100); 21 | bool write8(uint32_t addr, uint8_t data, int timeout_ms = 100, bool posted = false); 22 | bool write32(uint32_t addr, uint32_t data, int timeout_ms = 100, bool posted = false); 23 | bool read32(uint32_t addr, uint32_t &data, int timeout_ms = 100); 24 | bool write(uint32_t addr, uint8_t *data, int length, int timeout_ms = 100, bool posted = true); 25 | bool read(uint32_t addr, uint8_t *data, int length, int timeout_ms = 100); 26 | 27 | bool gpio_write(uint32_t value, int timeout_ms = 100); 28 | bool gpio_read(uint32_t &value, int timeout_ms = 100); 29 | 30 | protected: 31 | 32 | bool send_command(uint8_t cmd_id, uint32_t addr, uint8_t *data, int length, int timeout_ms); 33 | uint8_t* recv_data(uint16_t seq_num, int length, int timeout_ms); 34 | int fill_command(uint8_t *wr_buf, uint8_t cmd_id, uint32_t addr, uint8_t *data, int length); 35 | 36 | uint16_t m_seq_num; 37 | ftdi_driver_api *m_port; 38 | 39 | uint8_t m_write_buf[(MAX_CHUNK_SIZE * MAX_WR_CHUNKS) + (16 * MAX_WR_CHUNKS)]; 40 | uint8_t m_read_buf[(MAX_RD_CHUNKS * MAX_CHUNK_SIZE) + (MAX_RD_CHUNKS * 4)]; 41 | }; 42 | 43 | #endif -------------------------------------------------------------------------------- /sw/ftdi_driver_api.h: -------------------------------------------------------------------------------- 1 | #ifndef FTDI_DRIVER_API_H 2 | #define FTDI_DRIVER_API_H 3 | 4 | #include 5 | 6 | //------------------------------------------------------------- 7 | // ftdi_driver_api: API for FTDI drivers 8 | //------------------------------------------------------------- 9 | class ftdi_driver_api 10 | { 11 | public: 12 | virtual bool open(int device_idx) = 0; 13 | virtual void close(void) = 0; 14 | virtual int read(uint8_t *data, int length, int timout_ms) = 0; 15 | virtual int write(uint8_t *data, int length, int timout_ms) = 0; 16 | virtual void sleep(int wait_us) = 0; 17 | }; 18 | 19 | #endif -------------------------------------------------------------------------------- /sw/ftdi_ft60x.cpp: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | #include 5 | 6 | #include 7 | 8 | #include "ftdi_ft60x.h" 9 | #include "ftd3xx.h" 10 | 11 | //----------------------------------------------------------------------------- 12 | // configure: Check and update device configuration 13 | //----------------------------------------------------------------------------- 14 | bool ftdi_ft60x::configure(int device_idx, uint8_t clock) 15 | { 16 | FT_HANDLE handle = NULL; 17 | 18 | #if defined(_WIN32) || defined(_WIN64) 19 | DWORD numDevs = 0; 20 | FT_CreateDeviceInfoList(&numDevs); 21 | #endif 22 | 23 | // Open connection to device 24 | // TODO: Device index not working... 25 | assert(device_idx == 0); 26 | FT_Create(0, FT_OPEN_BY_INDEX, &handle); 27 | if (!handle) 28 | return false; 29 | 30 | // Check device type is supported 31 | DWORD dwType = FT_DEVICE_UNKNOWN; 32 | FT_GetDeviceInfoDetail(0, NULL, &dwType, NULL, NULL, NULL, NULL, NULL); 33 | if (dwType != FT_DEVICE_600 && dwType != FT_DEVICE_601) 34 | { 35 | fprintf(stderr, "FT60X: Incompatible device detected\n"); 36 | return false; 37 | } 38 | 39 | // Avoid rev-a parts - too many errata to workaround 40 | DWORD dwVersion; 41 | FT_GetFirmwareVersion(handle, &dwVersion); 42 | if (dwVersion <= 0x105) 43 | { 44 | fprintf(stderr, "FT60X: Incompatible device (rev-A) detected\n"); 45 | return false; 46 | } 47 | 48 | // Get current configuration 49 | FT_60XCONFIGURATION current_cfg; 50 | if (FT_OK != FT_GetChipConfiguration(handle, ¤t_cfg)) 51 | { 52 | fprintf(stderr, "FT60X: Could not fetch current configuration\n"); 53 | return false; 54 | } 55 | 56 | // Create new configuration 57 | FT_60XCONFIGURATION new_cfg; 58 | memcpy(&new_cfg, ¤t_cfg, sizeof(FT_60XCONFIGURATION)); 59 | new_cfg.FIFOClock = clock; 60 | new_cfg.FIFOMode = CONFIGURATION_FIFO_MODE_245; 61 | new_cfg.ChannelConfig = CONFIGURATION_CHANNEL_CONFIG_1; 62 | 63 | // Disable stop on underrun 64 | new_cfg.OptionalFeatureSupport = CONFIGURATION_OPTIONAL_FEATURE_DISABLECANCELSESSIONUNDERRUN; 65 | 66 | // Detect delta in configuration and apply if there is 67 | if (memcmp(&new_cfg, ¤t_cfg, sizeof(FT_60XCONFIGURATION))) 68 | { 69 | if (FT_SetChipConfiguration(handle, &new_cfg) != FT_OK) 70 | { 71 | fprintf(stderr, "FT60X: Could not write new configuration\n"); 72 | return false; 73 | } 74 | else 75 | { 76 | printf("FT60x: Configuration updated...\n"); 77 | ftdi_ft60x::sleep(1000000); 78 | } 79 | } 80 | 81 | FT_Close(handle); 82 | 83 | #if !defined(_WIN32) && !defined(_WIN64) 84 | // Enable non thread safe transfer to increase throughput 85 | { 86 | FT_TRANSFER_CONF conf; 87 | 88 | memset(&conf, 0, sizeof(FT_TRANSFER_CONF)); 89 | conf.wStructSize = sizeof(FT_TRANSFER_CONF); 90 | conf.pipe[FT_PIPE_DIR_IN].fNonThreadSafeTransfer = true; 91 | conf.pipe[FT_PIPE_DIR_OUT].fNonThreadSafeTransfer = true; 92 | for (DWORD i = 0; i < 4; i++) 93 | FT_SetTransferParams(&conf, i); 94 | } 95 | #endif 96 | 97 | return true; 98 | } 99 | //------------------------------------------------------------- 100 | // Constructor 101 | //------------------------------------------------------------- 102 | ftdi_ft60x::ftdi_ft60x() 103 | { 104 | m_handle = NULL; 105 | } 106 | //------------------------------------------------------------- 107 | // open: Try and open FT60x interface and configure 108 | //------------------------------------------------------------- 109 | bool ftdi_ft60x::open(int device_idx) 110 | { 111 | // Make sure device is configured as expected 112 | if (!configure(device_idx, CONFIGURATION_FIFO_CLK_100)) 113 | { 114 | printf("FT60x: Failed to configure device\n"); 115 | return false; 116 | } 117 | 118 | ULONG arg = device_idx; // TODO: Not working 119 | assert(device_idx == 0); 120 | 121 | // Create device handle 122 | FT_Create(NULL, FT_OPEN_BY_INDEX, &m_handle); 123 | if (!m_handle) 124 | { 125 | printf("FT60x: Failed to create device\n"); 126 | return false; 127 | } 128 | 129 | return true; 130 | } 131 | //------------------------------------------------------------- 132 | // close: Close connection to FT60x 133 | //------------------------------------------------------------- 134 | void ftdi_ft60x::close(void) 135 | { 136 | if (m_handle != NULL) 137 | { 138 | FT_Close(m_handle); 139 | } 140 | } 141 | //------------------------------------------------------------- 142 | // read: Read a chunk of data 143 | //------------------------------------------------------------- 144 | int ftdi_ft60x::read(uint8_t *data, int length, int timeout_ms) 145 | { 146 | DWORD count; 147 | FT_STATUS err; 148 | 149 | #if !defined(_WIN32) && !defined(_WIN64) // Linux / MAC 150 | if ((err = FT_ReadPipeEx(m_handle, 0, data, length, &count, timeout_ms)) != FT_OK) 151 | #else // Windows 152 | if ((err = FT_ReadPipeEx(m_handle, 0, data, length, &count, NULL)) != FT_OK) 153 | #endif 154 | { 155 | if (err == FT_TIMEOUT) 156 | return 0; 157 | 158 | printf("FT60x: FT_ReadPipeEx err %d\n", err); 159 | return -1; 160 | } 161 | 162 | return (int)count; 163 | } 164 | //------------------------------------------------------------- 165 | // write: Write a chunk of data 166 | //------------------------------------------------------------- 167 | int ftdi_ft60x::write(uint8_t *data, int length, int timeout_ms) 168 | { 169 | DWORD count; 170 | 171 | #if !defined(_WIN32) && !defined(_WIN64) // Linux / MAC 172 | FT_STATUS status = FT_WritePipeEx(m_handle, 0, data, length, &count, timeout_ms); 173 | #else // Windows 174 | FT_STATUS status = FT_WritePipeEx(m_handle, 0, data, length, &count, NULL); 175 | #endif 176 | if (status != FT_OK) 177 | { 178 | printf("FT_WritePipeEx: %d\n", status); 179 | return -1; 180 | } 181 | 182 | #if !defined(_WIN32) && !defined(_WIN64) // Linux / MAC 183 | DWORD queued_data = 0; 184 | int loops = 0; 185 | do 186 | { 187 | status = FT_GetWriteQueueStatus(m_handle, 0, &queued_data); 188 | } 189 | while (queued_data != 0); 190 | #endif 191 | if ((int)count != length) 192 | return -1; 193 | 194 | return (int)count; 195 | } 196 | //------------------------------------------------------------- 197 | // sleep: Wait for some time 198 | //------------------------------------------------------------- 199 | void ftdi_ft60x::sleep(int wait_us) 200 | { 201 | usleep(wait_us); 202 | } -------------------------------------------------------------------------------- /sw/ftdi_ft60x.h: -------------------------------------------------------------------------------- 1 | #ifndef FTDI_FT60x_H 2 | #define FTDI_FT60x_H 3 | 4 | #include "ftdi_driver_api.h" 5 | 6 | //------------------------------------------------------------- 7 | // ftdi_ft60x: FT60x interface 8 | //------------------------------------------------------------- 9 | class ftdi_ft60x: public ftdi_driver_api 10 | { 11 | public: 12 | ftdi_ft60x(); 13 | bool open(int device_idx); 14 | void close(void); 15 | int read(uint8_t *data, int length, int timeout_ms); 16 | int write(uint8_t *data, int length, int timeout_ms); 17 | void sleep(int wait_us); 18 | 19 | protected: 20 | bool configure(int device_idx, uint8_t clock); 21 | 22 | protected: 23 | void *m_handle; 24 | }; 25 | 26 | #endif -------------------------------------------------------------------------------- /sw/gpio_rd.cpp: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | #include 5 | #include 6 | #include 7 | 8 | #include "ftdi_axi_driver.h" 9 | #include "ftdi_ft60x.h" 10 | 11 | //----------------------------------------------------------------- 12 | // Command line options 13 | //----------------------------------------------------------------- 14 | #define GETOPTS_ARGS "d:v:h" 15 | 16 | static struct option long_options[] = 17 | { 18 | {"device", required_argument, 0, 'd'}, 19 | {"help", no_argument, 0, 'h'}, 20 | {0, 0, 0, 0} 21 | }; 22 | 23 | static void help_options(void) 24 | { 25 | fprintf (stderr,"Usage:\n"); 26 | fprintf (stderr," --device | -d IDX Device index to use (default: 0)\n"); 27 | exit(-1); 28 | } 29 | //----------------------------------------------------------------- 30 | // main: 31 | //----------------------------------------------------------------- 32 | int main(int argc, char *argv[]) 33 | { 34 | int c; 35 | int help = 0; 36 | int device = 0; 37 | 38 | int option_index = 0; 39 | while ((c = getopt_long (argc, argv, GETOPTS_ARGS, long_options, &option_index)) != -1) 40 | { 41 | switch(c) 42 | { 43 | case 'd': 44 | device = strtoul(optarg, NULL, 0); 45 | break; 46 | default: 47 | help = 1; 48 | break; 49 | } 50 | } 51 | 52 | if (help) 53 | { 54 | help_options(); 55 | return -1; 56 | } 57 | 58 | // Open the port 59 | ftdi_ft60x port; 60 | if (!port.open(0)) 61 | return -1; 62 | 63 | // Reset target state machines 64 | ftdi_axi_driver driver(&port); 65 | driver.send_drain(1000); 66 | port.sleep(10000); 67 | 68 | uint32_t value = 0; 69 | if (!driver.gpio_read(value)) 70 | return -1; 71 | 72 | printf("GPIO: 0x%08x (%d)\n", value, value); 73 | 74 | port.close(); 75 | return 0; 76 | } 77 | -------------------------------------------------------------------------------- /sw/gpio_wr.cpp: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | #include 5 | #include 6 | #include 7 | 8 | #include "ftdi_axi_driver.h" 9 | #include "ftdi_ft60x.h" 10 | 11 | //----------------------------------------------------------------- 12 | // Command line options 13 | //----------------------------------------------------------------- 14 | #define GETOPTS_ARGS "d:v:h" 15 | 16 | static struct option long_options[] = 17 | { 18 | {"device", required_argument, 0, 'd'}, 19 | {"help", no_argument, 0, 'h'}, 20 | {0, 0, 0, 0} 21 | }; 22 | 23 | static void help_options(void) 24 | { 25 | fprintf (stderr,"Usage:\n"); 26 | fprintf (stderr," --device | -d IDX Device index to use (default: 0)\n"); 27 | fprintf (stderr," --value | -v DATA Value to write\n"); 28 | exit(-1); 29 | } 30 | //----------------------------------------------------------------- 31 | // main: 32 | //----------------------------------------------------------------- 33 | int main(int argc, char *argv[]) 34 | { 35 | int c; 36 | int help = 0; 37 | int device = 0; 38 | uint32_t value = 0; 39 | 40 | int option_index = 0; 41 | while ((c = getopt_long (argc, argv, GETOPTS_ARGS, long_options, &option_index)) != -1) 42 | { 43 | switch(c) 44 | { 45 | case 'd': 46 | device = strtoul(optarg, NULL, 0); 47 | break; 48 | case 'v': 49 | value = strtoul(optarg, NULL, 0); 50 | break; 51 | default: 52 | help = 1; 53 | break; 54 | } 55 | } 56 | 57 | if (help) 58 | { 59 | help_options(); 60 | return -1; 61 | } 62 | 63 | // Open the port 64 | ftdi_ft60x port; 65 | if (!port.open(0)) 66 | return -1; 67 | 68 | // Reset target state machines 69 | ftdi_axi_driver driver(&port); 70 | driver.send_drain(1000); 71 | port.sleep(10000); 72 | 73 | if (!driver.gpio_write(value)) 74 | return -1; 75 | 76 | port.close(); 77 | return 0; 78 | } 79 | -------------------------------------------------------------------------------- /sw/linux-x86_64/51-ftd3xx.rules: -------------------------------------------------------------------------------- 1 | SUBSYSTEM=="usb", ATTRS{idVendor}=="0403", ATTRS{idProduct}=="601e", MODE="0666" 2 | SUBSYSTEM=="usb", ATTRS{idVendor}=="0403", ATTRS{idProduct}=="601f", MODE="0666" 3 | SUBSYSTEM=="usb", ATTRS{idVendor}=="0403", ATTRS{idProduct}=="602a", MODE="0666" 4 | SUBSYSTEM=="usb", ATTRS{idVendor}=="0403", ATTRS{idProduct}=="602b", MODE="0666" 5 | SUBSYSTEM=="usb", ATTRS{idVendor}=="0403", ATTRS{idProduct}=="602c", MODE="0666" 6 | SUBSYSTEM=="usb", ATTRS{idVendor}=="0403", ATTRS{idProduct}=="602d", MODE="0666" 7 | SUBSYSTEM=="usb", ATTRS{idVendor}=="0403", ATTRS{idProduct}=="602f", MODE="0666" 8 | -------------------------------------------------------------------------------- /sw/linux-x86_64/README.md: -------------------------------------------------------------------------------- 1 | ## Installation 2 | ``` 3 | sudo rm /usr/lib/libftd3xx.so 4 | sudo cp libftd3xx.so /usr/lib/ 5 | sudo cp libftd3xx.so.0.5.21 /usr/lib/ 6 | sudo cp 51-ftd3xx.rules /etc/udev/rules.d/ 7 | sudo udevadm control --reload-rules 8 | ``` 9 | ## Source 10 | * https://www.ftdichip.com/Drivers/D3XX/Linux/d3xx-linux-x86_64-0.5.21.tar.zip 11 | 12 | ## Licence 13 | This software is provided by Future Technology Devices International Limited 'as is' and any express or implied warranties, including, but not limited to, the implied warranties of merchantability and fitness for a particular purpose are disclaimed. In no event shall future technology devices international limited be liable for any direct, indirect, incidental, special, exemplary, or consequential damages (including, but not limited to, procurement of substitute goods or services; loss of use, data, or profits; or business interruption) however caused and on any theory of liability, whether in contract, strict liability, or tort (including negligence or otherwise) arising in any way out of the use of this software, even if advised of the possibility of such damage. 14 | FTDI drivers may be used only in conjunction with products based on FTDI parts. 15 | FTDI drivers may be distributed in any form as long as license information is not modified. 16 | If a custom vendor ID and/or product ID or description string are used, it is the responsibility of the product manufacturer to maintain any changes and subsequent WHCK re-certification as a result of making these changes. 17 | -------------------------------------------------------------------------------- /sw/linux-x86_64/ftd3xx.h: -------------------------------------------------------------------------------- 1 | #ifndef FTD3XX_H_DKFTHSPV 2 | #define FTD3XX_H_DKFTHSPV 3 | 4 | #ifdef __cplusplus 5 | #include 6 | #include 7 | #include 8 | #include 9 | #else 10 | #include 11 | #include 12 | #include 13 | #include 14 | #endif 15 | 16 | #if defined(_WIN32) || defined(_WIN64) 17 | 18 | #include 19 | #ifdef FTD3XX_EXPORTS 20 | #define FTD3XX_API __declspec(dllexport) 21 | #elif defined(FTD3XX_STATIC) 22 | #define FTD3XX_API 23 | #else 24 | #define FTD3XX_API __declspec(dllimport) 25 | #endif 26 | 27 | #else /* _WIN32 || _WIN64 */ 28 | 29 | #define WINAPI 30 | #ifndef FTD3XX_EXPORTS 31 | #define FTD3XX_API 32 | #else /* !FTD3XX_EXPORTS */ 33 | #define FTD3XX_API __attribute__((visibility("default"))) 34 | #endif /* FTD3XX_EXPORTS */ 35 | 36 | typedef uint16_t WORD; 37 | typedef uint32_t DWORD; 38 | typedef uint64_t DWORD64; 39 | typedef uint32_t * LPDWORD; 40 | typedef uint8_t BYTE; 41 | typedef uint8_t UCHAR; 42 | typedef uint16_t USHORT; 43 | typedef USHORT * PUSHORT; 44 | typedef unsigned int ULONG; 45 | typedef uint16_t WCHAR; 46 | typedef uint8_t * LPBYTE; 47 | typedef bool BOOL; 48 | typedef UCHAR *PUCHAR; 49 | typedef ULONG *PULONG; 50 | typedef const char * LPCSTR; 51 | 52 | typedef void VOID; 53 | typedef void * PVOID; 54 | typedef void * LPVOID; 55 | typedef char * PCHAR; 56 | typedef void * HANDLE; 57 | 58 | typedef struct _OVERLAPPED { 59 | DWORD Internal; 60 | DWORD InternalHigh; 61 | union { 62 | struct { 63 | DWORD Offset; 64 | DWORD OffsetHigh; 65 | }; 66 | PVOID Pointer; 67 | }; 68 | HANDLE hEvent; 69 | } OVERLAPPED, *LPOVERLAPPED; 70 | 71 | typedef struct _SECURITY_ATTRIBUTES { 72 | DWORD nLength; 73 | LPVOID lpSecurityDescriptor; 74 | BOOL bInheritHandle; 75 | } SECURITY_ATTRIBUTES , *LPSECURITY_ATTRIBUTES; 76 | 77 | #endif /* OTHER OS */ 78 | 79 | // 80 | // Standard Descriptor Types 81 | // 82 | #define FT_DEVICE_DESCRIPTOR_TYPE 0x01 83 | #define FT_CONFIGURATION_DESCRIPTOR_TYPE 0x02 84 | #define FT_STRING_DESCRIPTOR_TYPE 0x03 85 | #define FT_INTERFACE_DESCRIPTOR_TYPE 0x04 86 | 87 | // 88 | // Power Configuration 89 | // 90 | #define FT_IS_SELF_POWERED(bmAttributes) ((bmAttributes) == 0x40) 91 | #define FT_IS_BUS_POWERED(bmAttributes) (!((bmAttributes) == 0x40)) 92 | #define FT_IS_REMOTE_WAKEUP_ENABLED(bmAttributes) ((bmAttributes) == 0x20) 93 | 94 | // 95 | // Pipe Direction 96 | // 97 | #define FT_IS_READ_PIPE(ucEndpoint) ((ucEndpoint) & 0x80) 98 | #define FT_IS_WRITE_PIPE(ucEndpoint) (!((ucEndpoint) & 0x80)) 99 | 100 | // 101 | // Pipe type 102 | // 103 | #define FT_IS_BULK_PIPE(ucPipeType) ((ucPipeType) == 2) 104 | #define FT_IS_INTERRUPT_PIPE(ucPipeType) ((ucPipeType) == 3) 105 | #define FT_IS_ISOCHRONOUS_PIPE(ucPipeType) (0) 106 | 107 | // 108 | // Reserved pipes 109 | // 110 | #define FT_RESERVED_INTERFACE_INDEX 0x0 111 | #define FT_RESERVED_PIPE_INDEX_SESSION 0x0 112 | #define FT_RESERVED_PIPE_INDEX_NOTIFICATION 0x1 113 | #define FT_RESERVED_PIPE_SESSION 0x1 114 | #define FT_RESERVED_PIPE_NOTIFICATION 0x81 115 | 116 | // 117 | // Create flags 118 | // 119 | #define FT_OPEN_BY_SERIAL_NUMBER 0x00000001 120 | #define FT_OPEN_BY_DESCRIPTION 0x00000002 121 | #define FT_OPEN_BY_LOCATION 0x00000004 122 | #define FT_OPEN_BY_GUID 0x00000008 123 | #define FT_OPEN_BY_INDEX 0x00000010 124 | 125 | // 126 | // ListDevices flags 127 | // 128 | #define FT_LIST_ALL 0x20000000 129 | #define FT_LIST_BY_INDEX 0x40000000 130 | #define FT_LIST_NUMBER_ONLY 0x80000000 131 | 132 | 133 | // 134 | // GPIO direction, value 135 | // 136 | #define FT_GPIO_DIRECTION_IN 0 137 | #define FT_GPIO_DIRECTION_OUT 1 138 | #define FT_GPIO_VALUE_LOW 0 139 | #define FT_GPIO_VALUE_HIGH 1 140 | #define FT_GPIO_0 0 141 | #define FT_GPIO_1 1 142 | 143 | typedef PVOID FT_HANDLE, *PFT_HANDLE; 144 | 145 | enum _FT_STATUS { 146 | FT_OK, 147 | FT_INVALID_HANDLE, 148 | FT_DEVICE_NOT_FOUND, 149 | FT_DEVICE_NOT_OPENED, 150 | FT_IO_ERROR, 151 | FT_INSUFFICIENT_RESOURCES, 152 | FT_INVALID_PARAMETER, /* 6 */ 153 | FT_INVALID_BAUD_RATE, 154 | FT_DEVICE_NOT_OPENED_FOR_ERASE, 155 | FT_DEVICE_NOT_OPENED_FOR_WRITE, 156 | FT_FAILED_TO_WRITE_DEVICE, /* 10 */ 157 | FT_EEPROM_READ_FAILED, 158 | FT_EEPROM_WRITE_FAILED, 159 | FT_EEPROM_ERASE_FAILED, 160 | FT_EEPROM_NOT_PRESENT, 161 | FT_EEPROM_NOT_PROGRAMMED, 162 | FT_INVALID_ARGS, 163 | FT_NOT_SUPPORTED, 164 | 165 | FT_NO_MORE_ITEMS, 166 | FT_TIMEOUT, /* 19 */ 167 | FT_OPERATION_ABORTED, 168 | FT_RESERVED_PIPE, 169 | FT_INVALID_CONTROL_REQUEST_DIRECTION, 170 | FT_INVALID_CONTROL_REQUEST_TYPE, 171 | FT_IO_PENDING, 172 | FT_IO_INCOMPLETE, 173 | FT_HANDLE_EOF, 174 | FT_BUSY, 175 | FT_NO_SYSTEM_RESOURCES, 176 | FT_DEVICE_LIST_NOT_READY, 177 | FT_DEVICE_NOT_CONNECTED, 178 | FT_INCORRECT_DEVICE_PATH, 179 | 180 | FT_OTHER_ERROR, 181 | }; 182 | 183 | typedef ULONG FT_STATUS; 184 | #define FT_SUCCESS(status) ((status) == FT_OK) 185 | #define FT_FAILED(status) ((status) != FT_OK) 186 | 187 | typedef enum _FT_PIPE_TYPE { 188 | FTPipeTypeControl, 189 | FTPipeTypeIsochronous, 190 | FTPipeTypeBulk, 191 | FTPipeTypeInterrupt 192 | } FT_PIPE_TYPE; 193 | 194 | typedef struct _FT_COMMON_DESCRIPTOR { 195 | UCHAR bLength; 196 | UCHAR bDescriptorType; 197 | } FT_COMMON_DESCRIPTOR, *PFT_COMMON_DESCRIPTOR; 198 | 199 | typedef struct _FT_DEVICE_DESCRIPTOR{ 200 | UCHAR bLength; 201 | UCHAR bDescriptorType; 202 | USHORT bcdUSB; 203 | UCHAR bDeviceClass; 204 | UCHAR bDeviceSubClass; 205 | UCHAR bDeviceProtocol; 206 | UCHAR bMaxPacketSize0; 207 | USHORT idVendor; 208 | USHORT idProduct; 209 | USHORT bcdDevice; 210 | UCHAR iManufacturer; 211 | UCHAR iProduct; 212 | UCHAR iSerialNumber; 213 | UCHAR bNumConfigurations; 214 | } FT_DEVICE_DESCRIPTOR, *PFT_DEVICE_DESCRIPTOR; 215 | 216 | typedef struct _FT_CONFIGURATION_DESCRIPTOR { 217 | UCHAR bLength; 218 | UCHAR bDescriptorType; 219 | USHORT wTotalLength; 220 | UCHAR bNumInterfaces; 221 | UCHAR bConfigurationValue; 222 | UCHAR iConfiguration; 223 | UCHAR bmAttributes; 224 | UCHAR MaxPower; 225 | } FT_CONFIGURATION_DESCRIPTOR, *PFT_CONFIGURATION_DESCRIPTOR; 226 | 227 | typedef struct _FT_INTERFACE_DESCRIPTOR { 228 | UCHAR bLength; 229 | UCHAR bDescriptorType; 230 | UCHAR bInterfaceNumber; 231 | UCHAR bAlternateSetting; 232 | UCHAR bNumEndpoints; 233 | UCHAR bInterfaceClass; 234 | UCHAR bInterfaceSubClass; 235 | UCHAR bInterfaceProtocol; 236 | UCHAR iInterface; 237 | } FT_INTERFACE_DESCRIPTOR, *PFT_INTERFACE_DESCRIPTOR; 238 | 239 | typedef struct _FT_STRING_DESCRIPTOR { 240 | UCHAR bLength; 241 | UCHAR bDescriptorType; 242 | WCHAR szString[256]; 243 | } FT_STRING_DESCRIPTOR, *PFT_STRING_DESCRIPTOR; 244 | 245 | typedef struct _FT_PIPE_INFORMATION { 246 | FT_PIPE_TYPE PipeType; 247 | UCHAR PipeId; 248 | USHORT MaximumPacketSize; 249 | UCHAR Interval; 250 | } FT_PIPE_INFORMATION, *PFT_PIPE_INFORMATION; 251 | 252 | typedef struct _FT_SETUP_PACKET { 253 | UCHAR RequestType; 254 | UCHAR Request; 255 | USHORT Value; 256 | USHORT Index; 257 | USHORT Length; 258 | } FT_SETUP_PACKET, *PFT_SETUP_PACKET; 259 | 260 | typedef enum _E_FT_NOTIFICATION_CALLBACK_TYPE { 261 | E_FT_NOTIFICATION_CALLBACK_TYPE_DATA, 262 | E_FT_NOTIFICATION_CALLBACK_TYPE_GPIO, 263 | E_FT_NOTIFICATION_CALLBACK_TYPE_INTERRUPT, 264 | } E_FT_NOTIFICATION_CALLBACK_TYPE; 265 | 266 | typedef struct _FT_NOTIFICATION_CALLBACK_INFO_DATA { 267 | ULONG ulRecvNotificationLength; 268 | UCHAR ucEndpointNo; 269 | } FT_NOTIFICATION_CALLBACK_INFO_DATA; 270 | 271 | typedef struct _FT_NOTIFICATION_CALLBACK_INFO_GPIO { 272 | BOOL bGPIO0; 273 | BOOL bGPIO1; 274 | } FT_NOTIFICATION_CALLBACK_INFO_GPIO; 275 | 276 | typedef VOID(*FT_NOTIFICATION_CALLBACK)(PVOID pvCallbackContext, 277 | E_FT_NOTIFICATION_CALLBACK_TYPE eCallbackType, PVOID pvCallbackInfo); 278 | 279 | // 280 | // Chip configuration - FlashEEPROMDetection 281 | // 282 | #define CONFIGURATION_FLASH_ROM_BIT_ROM 0 283 | #define CONFIGURATION_FLASH_ROM_BIT_MEMORY_NOTEXIST 1 284 | #define CONFIGURATION_FLASH_ROM_BIT_CUSTOMDATA_INVALID 2 285 | #define CONFIGURATION_FLASH_ROM_BIT_CUSTOMDATACHKSUM_INVALID 3 286 | #define CONFIGURATION_FLASH_ROM_BIT_CUSTOM 4 287 | #define CONFIGURATION_FLASH_ROM_BIT_GPIO_INPUT 5 288 | #define CONFIGURATION_FLASH_ROM_BIT_GPIO_0 6 289 | #define CONFIGURATION_FLASH_ROM_BIT_GPIO_1 7 290 | 291 | // 292 | // Chip configuration - Battery charging 293 | // 294 | #define CONFIGURATION_BATCHG_BIT_OFFSET_DCP 6 // Bit 6 and Bit 7 295 | #define CONFIGURATION_BATCHG_BIT_OFFSET_CDP 4 // Bit 4 and Bit 5 296 | #define CONFIGURATION_BATCHG_BIT_OFFSET_SDP 2 // Bit 2 and Bit 3 297 | #define CONFIGURATION_BATCHG_BIT_OFFSET_DEF 0 // Bit 0 and Bit 1 298 | #define CONFIGURATION_BATCHG_BIT_MASK 3 // 2 bits 299 | 300 | // 301 | // Chip configuration - FIFO Clock Speed 302 | // 303 | typedef enum { 304 | CONFIGURATION_FIFO_CLK_100, 305 | CONFIGURATION_FIFO_CLK_66, 306 | CONFIGURATION_FIFO_CLK_50, 307 | CONFIGURATION_FIFO_CLK_40, 308 | } CONFIGURATION_FIFO_CLK; 309 | 310 | // 311 | // Chip configuration - FIFO Mode 312 | // 313 | typedef enum { 314 | CONFIGURATION_FIFO_MODE_245, 315 | CONFIGURATION_FIFO_MODE_600, 316 | CONFIGURATION_FIFO_MODE_COUNT, 317 | } CONFIGURATION_FIFO_MODE; 318 | 319 | // 320 | // Chip configuration - Channel Configuration 321 | // 322 | typedef enum { 323 | CONFIGURATION_CHANNEL_CONFIG_4, 324 | CONFIGURATION_CHANNEL_CONFIG_2, 325 | CONFIGURATION_CHANNEL_CONFIG_1, 326 | CONFIGURATION_CHANNEL_CONFIG_1_OUTPIPE, 327 | CONFIGURATION_CHANNEL_CONFIG_1_INPIPE, 328 | CONFIGURATION_CHANNEL_CONFIG_COUNT, 329 | } CONFIGURATION_CHANNEL_CONFIG; 330 | 331 | // 332 | // Chip configuration - Optional Feature Support 333 | // 334 | typedef enum { 335 | CONFIGURATION_OPTIONAL_FEATURE_DISABLEALL = 0, 336 | CONFIGURATION_OPTIONAL_FEATURE_ENABLEBATTERYCHARGING = 1, 337 | CONFIGURATION_OPTIONAL_FEATURE_DISABLECANCELSESSIONUNDERRUN = 2, 338 | CONFIGURATION_OPTIONAL_FEATURE_ENABLENOTIFICATIONMESSAGE_INCH1 = 4, 339 | CONFIGURATION_OPTIONAL_FEATURE_ENABLENOTIFICATIONMESSAGE_INCH2 = 8, 340 | CONFIGURATION_OPTIONAL_FEATURE_ENABLENOTIFICATIONMESSAGE_INCH3 = 0x10, 341 | CONFIGURATION_OPTIONAL_FEATURE_ENABLENOTIFICATIONMESSAGE_INCH4 = 0x20, 342 | CONFIGURATION_OPTIONAL_FEATURE_ENABLENOTIFICATIONMESSAGE_INCHALL = 0x3C, 343 | CONFIGURATION_OPTIONAL_FEATURE_DISABLEUNDERRUN_INCH1 = (0x1 << 6), 344 | CONFIGURATION_OPTIONAL_FEATURE_DISABLEUNDERRUN_INCH2 = (0x1 << 7), 345 | CONFIGURATION_OPTIONAL_FEATURE_DISABLEUNDERRUN_INCH3 = (0x1 << 8), 346 | CONFIGURATION_OPTIONAL_FEATURE_DISABLEUNDERRUN_INCH4 = (0x1 << 9), 347 | CONFIGURATION_OPTIONAL_FEATURE_DISABLEUNDERRUN_INCHALL = (0xF << 6), 348 | } CONFIGURATION_OPTIONAL_FEATURE_SUPPORT; 349 | 350 | // 351 | // Chip configuration - Default values 352 | // 353 | #define CONFIGURATION_DEFAULT_VENDORID 0x0403 354 | #define CONFIGURATION_DEFAULT_PRODUCTID_600 0x601E 355 | #define CONFIGURATION_DEFAULT_PRODUCTID_601 0x601F 356 | #define CONFIGURATION_DEFAULT_POWERATTRIBUTES 0xE0 357 | #define CONFIGURATION_DEFAULT_POWERCONSUMPTION 0x60 358 | #define CONFIGURATION_DEFAULT_FIFOCLOCK \ 359 | CONFIGURATION_FIFO_CLK_100 360 | #define CONFIGURATION_DEFAULT_FIFOMODE \ 361 | CONFIGURATION_FIFO_MODE_600 362 | #define CONFIGURATION_DEFAULT_CHANNELCONFIG \ 363 | CONFIGURATION_CHANNEL_CONFIG_4 364 | #define CONFIGURATION_DEFAULT_OPTIONALFEATURE \ 365 | CONFIGURATION_OPTIONAL_FEATURE_DISABLEALL 366 | #define CONFIGURATION_DEFAULT_BATTERYCHARGING 0xE4 367 | #define CONFIGURATION_DEFAULT_BATTERYCHARGING_TYPE_DCP 0x3 368 | #define CONFIGURATION_DEFAULT_BATTERYCHARGING_TYPE_CDP 0x2 369 | #define CONFIGURATION_DEFAULT_BATTERYCHARGING_TYPE_SDP 0x1 370 | #define CONFIGURATION_DEFAULT_BATTERYCHARGING_TYPE_OFF 0x0 371 | #define CONFIGURATION_DEFAULT_FLASHDETECTION 0x0 372 | #define CONFIGURATION_DEFAULT_MSIOCONTROL 0x10800 373 | #define CONFIGURATION_DEFAULT_GPIOCONTROL 0x0 374 | 375 | // 376 | // 377 | // Chip configuration structure 378 | // 379 | typedef struct { 380 | // Device Descriptor 381 | USHORT VendorID; 382 | USHORT ProductID; 383 | 384 | // String Descriptors 385 | UCHAR StringDescriptors[128]; 386 | 387 | // Configuration Descriptor 388 | UCHAR Reserved; 389 | UCHAR PowerAttributes; 390 | USHORT PowerConsumption; 391 | 392 | // Data Transfer Configuration 393 | UCHAR reserved; 394 | UCHAR FIFOClock; 395 | UCHAR FIFOMode; 396 | UCHAR ChannelConfig; 397 | 398 | // Optional Feature Support 399 | USHORT OptionalFeatureSupport; 400 | UCHAR BatteryChargingGPIOConfig; 401 | UCHAR FlashEEPROMDetection; // Read-only 402 | 403 | // MSIO and GPIO Configuration 404 | ULONG MSIO_Control; 405 | ULONG GPIO_Control; 406 | } FT_60XCONFIGURATION, *PFT_60XCONFIGURATION; 407 | 408 | // 409 | // Device types 410 | // 411 | typedef enum _FT_DEVICE { 412 | FT_DEVICE_UNKNOWN = 3, 413 | FT_DEVICE_600 = 600, 414 | FT_DEVICE_601 = 601, 415 | FT_DEVICE_602 = 602, 416 | FT_DEVICE_603 = 603, 417 | } FT_DEVICE; 418 | 419 | // 420 | // Device information 421 | // 422 | typedef enum _FT_FLAGS { 423 | FT_FLAGS_OPENED = 1, 424 | FT_FLAGS_HISPEED = 2, 425 | FT_FLAGS_SUPERSPEED = 4 426 | } FT_FLAGS; 427 | 428 | typedef struct _FT_DEVICE_LIST_INFO_NODE { 429 | ULONG Flags; // FT_FLAGS 430 | ULONG Type; 431 | ULONG ID; 432 | DWORD LocId; 433 | char SerialNumber[32]; 434 | char Description[32]; 435 | FT_HANDLE ftHandle; 436 | } FT_DEVICE_LIST_INFO_NODE; 437 | 438 | enum FT_GPIO_PULL { 439 | GPIO_PULL_50K_PD, 440 | GPIO_PULL_HIZ, 441 | GPIO_PULL_50K_PU, 442 | GPIO_PULL_DEFAULT = GPIO_PULL_50K_PD 443 | }; 444 | 445 | enum FT_PIPE_DIRECTION { 446 | FT_PIPE_DIR_IN, 447 | FT_PIPE_DIR_OUT, 448 | FT_PIPE_DIR_COUNT, 449 | }; 450 | 451 | struct FT_PIPE_TRANSFER_CONF { 452 | /* set to true PIPE is not used, default set to FALSE */ 453 | BOOL fPipeNotUsed; 454 | 455 | /* Enable non thread safe transfer to increase throughput, set this flag 456 | * if guarantee only single thread access the pipe at a time, default 457 | * set to FALSE */ 458 | BOOL fNonThreadSafeTransfer; 459 | 460 | /* Concurrent URB request number, 8 by default, set value < 2 to use 461 | * default value */ 462 | BYTE bURBCount; 463 | 464 | /* 256 by default, set value < 2 to use default value */ 465 | WORD wURBBufferCount; 466 | 467 | /* 32K by default, set value < 512 to use default value */ 468 | DWORD dwURBBufferSize; 469 | 470 | /* 1G by default, used by FT600 and FT601 only, set 0 to use 471 | * default value */ 472 | DWORD dwStreamingSize; 473 | }; 474 | 475 | typedef struct _FT_TRANSFER_CONF { 476 | /* structure size: sizeof(FT_TRANSFER_CONF) */ 477 | WORD wStructSize; 478 | 479 | /* Please refer to struture FT_PIPE_TRANSFER_CONF */ 480 | struct FT_PIPE_TRANSFER_CONF pipe[FT_PIPE_DIR_COUNT]; 481 | 482 | /* Stop reading next URB buffer if current buffer is not fully filled, 483 | * default set to FALSE */ 484 | BOOL fStopReadingOnURBUnderrun; 485 | 486 | /* Enable Bit Bang Mode */ 487 | BOOL fBitBangMode; 488 | 489 | /* Do not flush device side residue buffer after reopen the 490 | * device, default set to FALSE */ 491 | BOOL fKeepDeviceSideBufferAfterReopen; 492 | } FT_TRANSFER_CONF; 493 | 494 | #ifdef __cplusplus 495 | extern "C" { 496 | #endif 497 | 498 | /********************************************************************** 499 | * Linux only APIs * 500 | **********************************************************************/ 501 | 502 | /* Set transfer parameters for each FIFO channel 503 | * Must be called before FT_Create is called. Need to be called again 504 | * after FT_Close(), otherwise default parameters will be used. 505 | * 506 | * Default value will be used for each FIFO channel if this function 507 | * is not been called. Please refer to structure defines for default 508 | * value. 509 | * 510 | * pConf: Please refer to structure FT_TRANSFER_CONF 511 | * dwFifoID: FIFO interface ID. Valid values are 0-3 which represents 512 | * FIFO channel 1-4 for FT600 and FT601 */ 513 | FTD3XX_API FT_STATUS WINAPI FT_SetTransferParams( 514 | FT_TRANSFER_CONF *pConf, 515 | DWORD dwFifoID); 516 | 517 | /* ReadPipe with timeout 518 | * 519 | * dwFifoID: FIFO interface ID. Valid values are 0-3 which represents 520 | * FIFO channel 1-4 for FT600 and FT601 521 | * dwTimeoutInMs: timeout in milliseconds, 0 means return immediately 522 | * if no data */ 523 | FTD3XX_API FT_STATUS WINAPI FT_ReadPipeEx( 524 | FT_HANDLE ftHandle, 525 | UCHAR ucFifoID, 526 | PUCHAR pucBuffer, 527 | ULONG ulBufferLength, 528 | PULONG pulBytesTransferred, 529 | DWORD dwTimeoutInMs); 530 | 531 | /* WritePipe with timeout 532 | * 533 | * dwFifoID: FIFO interface ID. Valid values are 0-3 which represents 534 | * FIFO channel 1-4 for FT600 and FT601 535 | * dwTimeoutInMs: timeout in milliseconds, 0 means return immediately 536 | * if no data */ 537 | FTD3XX_API FT_STATUS WINAPI FT_WritePipeEx( 538 | FT_HANDLE ftHandle, 539 | UCHAR ucFifoID, 540 | PUCHAR pucBuffer, 541 | ULONG ulBufferLength, 542 | PULONG pulBytesTransferred, 543 | DWORD dwTimeoutInMs); 544 | 545 | /* Get total unread buffer length in library's queue 546 | * 547 | * dwFifoID: FIFO interface ID. Valid values are 0-3 which represents 548 | * FIFO channel 1-4 for FT600 and FT601 */ 549 | FTD3XX_API FT_STATUS WINAPI FT_GetReadQueueStatus( 550 | FT_HANDLE ftHandle, 551 | UCHAR ucFifoID, 552 | LPDWORD lpdwAmountInQueue); 553 | 554 | /* Get total unsent buffer length in library's queue 555 | * 556 | * dwFifoID: FIFO interface ID. Valid values are 0-3 which represents 557 | * FIFO channel 1-4 for FT600 and FT601 */ 558 | FTD3XX_API FT_STATUS WINAPI FT_GetWriteQueueStatus( 559 | FT_HANDLE ftHandle, 560 | UCHAR ucFifoID, 561 | LPDWORD lpdwAmountInQueue); 562 | 563 | /* Read unsent buffer for OUT pipe 564 | * Set byBuffer to NULL first to close the pipe to get accurate buffer 565 | * length, allocate buffer with the length, then call this function 566 | * again with the allocated buffer to read out all buffers 567 | * 568 | * dwFifoID: FIFO interface ID. Valid values are 0-3 which represents 569 | * FIFO channel 1-4 for FT600 and FT601 570 | * byBuffer: User allocated buffer 571 | * lpdwBufferLength: Pointer to receive the size of buffer if byBuffer 572 | * is NULL. Size of buffer if byBuffer is not NULL. */ 573 | FTD3XX_API FT_STATUS WINAPI FT_GetUnsentBuffer( 574 | FT_HANDLE ftHandle, 575 | UCHAR ucFifoID, 576 | BYTE *byBuffer, 577 | LPDWORD lpdwBufferLength); 578 | 579 | FTD3XX_API FT_STATUS WINAPI FT_SetPipeTimeout( 580 | FT_HANDLE ftHandle, 581 | UCHAR ucEndpoint, 582 | DWORD dwTimeoutInMs 583 | ); 584 | 585 | FTD3XX_API FT_STATUS WINAPI FT_CreateDeviceInfoList( 586 | LPDWORD lpdwNumDevs 587 | ); 588 | 589 | FTD3XX_API FT_STATUS WINAPI FT_GetDeviceInfoList( 590 | FT_DEVICE_LIST_INFO_NODE *ptDest, 591 | LPDWORD lpdwNumDevs 592 | ); 593 | 594 | FTD3XX_API FT_STATUS WINAPI FT_ListDevices( 595 | PVOID pArg1, 596 | PVOID pArg2, 597 | DWORD Flags 598 | ); 599 | 600 | FTD3XX_API FT_STATUS WINAPI FT_Create( 601 | PVOID pvArg, 602 | DWORD dwFlags, 603 | FT_HANDLE *pftHandle 604 | ); 605 | 606 | FTD3XX_API FT_STATUS WINAPI FT_Close( 607 | FT_HANDLE ftHandle); 608 | 609 | FTD3XX_API FT_STATUS WINAPI FT_GetVIDPID( 610 | FT_HANDLE ftHandle, 611 | PUSHORT puwVID, 612 | PUSHORT puwPID 613 | ); 614 | 615 | FTD3XX_API FT_STATUS WINAPI FT_WritePipe( 616 | FT_HANDLE ftHandle, 617 | UCHAR ucEndpoint, 618 | PUCHAR pucBuffer, 619 | ULONG ulBufferLength, 620 | PULONG pulBytesTransferred, 621 | LPOVERLAPPED pOverlapped 622 | ); 623 | 624 | FTD3XX_API FT_STATUS WINAPI FT_ReadPipe( 625 | FT_HANDLE ftHandle, 626 | UCHAR ucEndpoint, 627 | PUCHAR pucBuffer, 628 | ULONG ulBufferLength, 629 | PULONG pulBytesTransferred, 630 | LPOVERLAPPED pOverlapped 631 | ); 632 | 633 | FTD3XX_API FT_STATUS WINAPI FT_GetOverlappedResult( 634 | FT_HANDLE ftHandle, 635 | LPOVERLAPPED pOverlapped, 636 | PULONG pulBytesTransferred, 637 | BOOL bWait 638 | ); 639 | 640 | FTD3XX_API FT_STATUS WINAPI FT_InitializeOverlapped( 641 | FT_HANDLE ftHandle, 642 | LPOVERLAPPED pOverlapped 643 | ); 644 | 645 | FTD3XX_API FT_STATUS WINAPI FT_ReleaseOverlapped( 646 | FT_HANDLE ftHandle, 647 | LPOVERLAPPED pOverlapped 648 | ); 649 | 650 | FTD3XX_API FT_STATUS WINAPI FT_SetStreamPipe( 651 | FT_HANDLE ftHandle, 652 | BOOL bAllWritePipes, 653 | BOOL bAllReadPipes, 654 | UCHAR ucEndpoint, 655 | ULONG ulStreamSize 656 | ); 657 | 658 | FTD3XX_API FT_STATUS WINAPI FT_ClearStreamPipe( 659 | FT_HANDLE ftHandle, 660 | BOOL bAllWritePipes, 661 | BOOL bAllReadPipes, 662 | UCHAR ucEndpoint 663 | ); 664 | 665 | FTD3XX_API FT_STATUS WINAPI FT_FlushPipe( 666 | FT_HANDLE ftHandle, 667 | UCHAR ucEndpoint 668 | ); 669 | 670 | FTD3XX_API FT_STATUS WINAPI FT_AbortPipe( 671 | FT_HANDLE ftHandle, 672 | UCHAR ucEndpoint 673 | ); 674 | 675 | FTD3XX_API FT_STATUS WINAPI FT_GetDeviceDescriptor( 676 | FT_HANDLE ftHandle, 677 | PFT_DEVICE_DESCRIPTOR ptDescriptor 678 | ); 679 | 680 | FTD3XX_API FT_STATUS WINAPI FT_GetConfigurationDescriptor( 681 | FT_HANDLE ftHandle, 682 | PFT_CONFIGURATION_DESCRIPTOR ptDescriptor 683 | ); 684 | 685 | FTD3XX_API FT_STATUS WINAPI FT_GetInterfaceDescriptor( 686 | FT_HANDLE ftHandle, 687 | UCHAR ucInterfaceIndex, 688 | PFT_INTERFACE_DESCRIPTOR ptDescriptor 689 | ); 690 | 691 | FTD3XX_API FT_STATUS WINAPI FT_GetPipeInformation( 692 | FT_HANDLE ftHandle, 693 | UCHAR ucInterfaceIndex, 694 | UCHAR ucEndpoint, 695 | PFT_PIPE_INFORMATION ptPipeInformation 696 | ); 697 | 698 | FTD3XX_API FT_STATUS WINAPI FT_GetStringDescriptor( 699 | FT_HANDLE ftHandle, 700 | UCHAR ucStringIndex, 701 | PFT_STRING_DESCRIPTOR ptDescriptor 702 | ); 703 | 704 | FTD3XX_API FT_STATUS WINAPI FT_GetDescriptor( 705 | FT_HANDLE ftHandle, 706 | UCHAR ucDescriptorType, 707 | UCHAR ucIndex, 708 | PUCHAR pucBuffer, 709 | ULONG ulBufferLength, 710 | PULONG pulLengthTransferred 711 | ); 712 | 713 | FTD3XX_API FT_STATUS WINAPI FT_ControlTransfer( 714 | FT_HANDLE ftHandle, 715 | FT_SETUP_PACKET tSetupPacket, 716 | PUCHAR pucBuffer, 717 | ULONG ulBufferLength, 718 | PULONG pulLengthTransferred 719 | ); 720 | 721 | FTD3XX_API FT_STATUS WINAPI FT_SetGPIO( 722 | FT_HANDLE ftHandle, 723 | UCHAR ucDirection, 724 | UCHAR ucValue 725 | ); 726 | 727 | FTD3XX_API FT_STATUS WINAPI FT_GetGPIO( 728 | FT_HANDLE ftHandle, 729 | UCHAR ucDirection, 730 | FT_NOTIFICATION_CALLBACK pCallback, 731 | PVOID pvCallbackContext, 732 | USHORT uwCallbackLatency 733 | ); 734 | 735 | FTD3XX_API FT_STATUS WINAPI FT_SetNotificationCallback( 736 | FT_HANDLE ftHandle, 737 | FT_NOTIFICATION_CALLBACK pCallback, 738 | PVOID pvCallbackContext 739 | ); 740 | 741 | FTD3XX_API VOID WINAPI FT_ClearNotificationCallback( 742 | FT_HANDLE ftHandle 743 | ); 744 | 745 | FTD3XX_API FT_STATUS WINAPI FT_GetChipConfiguration( 746 | FT_HANDLE ftHandle, 747 | PVOID pvConfiguration 748 | ); 749 | 750 | FTD3XX_API FT_STATUS WINAPI FT_SetChipConfiguration( 751 | FT_HANDLE ftHandle, 752 | PVOID pvConfiguration 753 | ); 754 | 755 | FTD3XX_API FT_STATUS WINAPI FT_GetFirmwareVersion( 756 | FT_HANDLE ftHandle, 757 | PULONG pulFirmwareVersion 758 | ); 759 | 760 | FTD3XX_API FT_STATUS WINAPI FT_ResetDevicePort( 761 | FT_HANDLE ftHandle 762 | ); 763 | 764 | FTD3XX_API FT_STATUS WINAPI FT_CycleDevicePort( 765 | FT_HANDLE ftHandle 766 | ); 767 | 768 | FTD3XX_API FT_STATUS WINAPI FT_GetDeviceInfoDetail( 769 | DWORD dwIndex, 770 | LPDWORD lpdwFlags, 771 | LPDWORD lpdwType, 772 | LPDWORD lpdwID, 773 | LPDWORD lpdwLocId, 774 | LPVOID lpSerialNumber, 775 | LPVOID lpDescription, 776 | FT_HANDLE *pftHandle 777 | ); 778 | 779 | FTD3XX_API FT_STATUS WINAPI FT_IsDevicePath( 780 | FT_HANDLE ftHandle, 781 | LPCSTR pucDevicePath 782 | ); 783 | 784 | FTD3XX_API FT_STATUS WINAPI FT_GetDriverVersion( 785 | FT_HANDLE ftHandle, 786 | LPDWORD lpdwVersion 787 | ); 788 | 789 | FTD3XX_API FT_STATUS WINAPI FT_GetLibraryVersion( 790 | LPDWORD lpdwVersion 791 | ); 792 | 793 | /* Enable GPIOs 794 | * Each bit represents one GPIO setting, GPIO0-GPIO2 from LSB to MSB 795 | * 796 | * dwMask: set bit to 0 to skip the GPIO, 1 to enable the GPIO 797 | * dwDirection: set bit to 0 for input, 1 for output */ 798 | FTD3XX_API FT_STATUS WINAPI FT_EnableGPIO( 799 | FT_HANDLE ftHandle, 800 | DWORD dwMask, 801 | DWORD dwDirection 802 | ); 803 | 804 | /* Set GPIO level 805 | * Each bit represents one GPIO setting, GPIO0-GPIO2 from LSB to MSB 806 | * 807 | * dwMask: set bit to 0 to skip the GPIO, 1 to enable the GPIO 808 | * dwDirection: set bit to 0 for low, 1 for high */ 809 | FTD3XX_API FT_STATUS WINAPI FT_WriteGPIO( 810 | FT_HANDLE ftHandle, 811 | DWORD dwMask, 812 | DWORD dwLevel 813 | ); 814 | 815 | /* Get level of all GPIOs 816 | * Each bit represents one GPIO setting, GPIO0-GPIO2, RD_N, OE_N from 817 | * LSB to MSB */ 818 | FTD3XX_API FT_STATUS WINAPI FT_ReadGPIO( 819 | FT_HANDLE ftHandle, 820 | DWORD *pdwData 821 | ); 822 | 823 | /* Set GPIO internal pull resisters 824 | * dwMask: Each bit represents one GPIO setting, GPIO0-GPIO2 from 825 | * LSB to MSB 826 | * dwPull: Each two bits represents one GPIO setting, GPIO0-GPIO2 from 827 | * LSB to MSB 828 | * 829 | * dwMask: set bit to 0 to skip the GPIO, 1 to enable the GPIO 830 | * dwPull: refer to enum FT_GPIO_PULL */ 831 | FTD3XX_API FT_STATUS WINAPI FT_SetGPIOPull( 832 | FT_HANDLE ftHandle, 833 | DWORD dwMask, 834 | DWORD dwPull 835 | ); 836 | 837 | #ifdef __cplusplus 838 | } 839 | #endif 840 | 841 | #endif /* end of include guard: FTD3XX_H_DKFTHSPV */ 842 | -------------------------------------------------------------------------------- /sw/linux-x86_64/libftd3xx-static.a: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ultraembedded/core_ft60x_axi/16d599467f1a968996970fae007cb9936c7f6b33/sw/linux-x86_64/libftd3xx-static.a -------------------------------------------------------------------------------- /sw/linux-x86_64/libftd3xx.so: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ultraembedded/core_ft60x_axi/16d599467f1a968996970fae007cb9936c7f6b33/sw/linux-x86_64/libftd3xx.so -------------------------------------------------------------------------------- /sw/linux-x86_64/libftd3xx.so.0.5.21: -------------------------------------------------------------------------------- 1 | libftd3xx.so -------------------------------------------------------------------------------- /sw/linux-x86_64/libstdc++-static.a: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ultraembedded/core_ft60x_axi/16d599467f1a968996970fae007cb9936c7f6b33/sw/linux-x86_64/libstdc++-static.a -------------------------------------------------------------------------------- /sw/load.cpp: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | #include 5 | #include 6 | #include 7 | 8 | #include "ftdi_axi_driver.h" 9 | #include "ftdi_ft60x.h" 10 | 11 | //----------------------------------------------------------------- 12 | // Command line options 13 | //----------------------------------------------------------------- 14 | #define GETOPTS_ARGS "d:a:s:f:h" 15 | 16 | static struct option long_options[] = 17 | { 18 | {"device", required_argument, 0, 'd'}, 19 | {"address", required_argument, 0, 'a'}, 20 | {"size", required_argument, 0, 's'}, 21 | {"filename", required_argument, 0, 'f'}, 22 | {"help", no_argument, 0, 'h'}, 23 | {0, 0, 0, 0} 24 | }; 25 | 26 | static void help_options(void) 27 | { 28 | fprintf (stderr,"Usage:\n"); 29 | fprintf (stderr," --device | -d IDX Device index to use (default: 0)\n"); 30 | fprintf (stderr," --address | -a ADDR Address to load file to (default: 0)\n"); 31 | fprintf (stderr," --filename | -f FILENAME File to load\n"); 32 | fprintf (stderr," --size | -s SIZE File size (default: actual file size)\n"); 33 | exit(-1); 34 | } 35 | //----------------------------------------------------------------- 36 | // load_file_to_mem 37 | //----------------------------------------------------------------- 38 | static uint8_t* load_file_to_mem(const char *filename, long size_override, int *pSize) 39 | { 40 | uint8_t *buf = NULL; 41 | FILE *f = fopen(filename, "rb"); 42 | 43 | *pSize = 0; 44 | 45 | if (f) 46 | { 47 | long size; 48 | 49 | // Get size of file 50 | fseek(f, 0, SEEK_END); 51 | size = ftell(f); 52 | rewind(f); 53 | 54 | // User overriden file size 55 | if (size_override >= 0) 56 | { 57 | if (size > size_override) 58 | size = size_override; 59 | } 60 | 61 | buf = new uint8_t[size]; 62 | if (buf) 63 | { 64 | // Read file data into allocated memory 65 | int len = fread(buf, 1, size, f); 66 | if (len != size) 67 | { 68 | delete[] buf; 69 | buf = NULL; 70 | } 71 | else 72 | *pSize = size; 73 | } 74 | fclose(f); 75 | } 76 | 77 | return buf; 78 | } 79 | //----------------------------------------------------------------- 80 | // main: 81 | //----------------------------------------------------------------- 82 | int main(int argc, char *argv[]) 83 | { 84 | int c; 85 | int help = 0; 86 | int device = 0; 87 | uint32_t addr = 0; 88 | long size_override = -1; 89 | char * filename = NULL; 90 | 91 | int option_index = 0; 92 | while ((c = getopt_long (argc, argv, GETOPTS_ARGS, long_options, &option_index)) != -1) 93 | { 94 | switch(c) 95 | { 96 | case 'd': 97 | device = strtoul(optarg, NULL, 0); 98 | break; 99 | case 'a': 100 | addr = strtoul(optarg, NULL, 0); 101 | break; 102 | case 'f': 103 | filename = optarg; 104 | break; 105 | case 's': 106 | size_override = strtol(optarg, NULL, 0); 107 | break; 108 | default: 109 | help = 1; 110 | break; 111 | } 112 | } 113 | 114 | if (help || filename == NULL) 115 | { 116 | help_options(); 117 | return -1; 118 | } 119 | 120 | // Open the port 121 | ftdi_ft60x port; 122 | if (!port.open(0)) 123 | return -1; 124 | 125 | // Reset target state machines 126 | ftdi_axi_driver driver(&port); 127 | driver.send_drain(1000); 128 | port.sleep(10000); 129 | 130 | // Read file into memory 131 | bool ok = true; 132 | int size = 0; 133 | uint8_t *buf = load_file_to_mem(filename, size_override, &size); 134 | if (buf) 135 | { 136 | printf("Loading %s (%dKB) to 0x%x...\n", filename, (size + 1023) / 1024, addr); 137 | 138 | // Upload file to target 139 | ok = driver.write(addr, buf, size); 140 | 141 | // Free file memory 142 | delete[] buf; 143 | buf = NULL; 144 | 145 | if (ok) 146 | printf("Done!\n"); 147 | else 148 | printf("Failed!\n"); 149 | } 150 | else 151 | { 152 | fprintf (stderr,"Error: Could not open file\n"); 153 | ok = false; 154 | } 155 | 156 | port.close(); 157 | return ok ? 0: -1; 158 | } 159 | -------------------------------------------------------------------------------- /sw/peek.cpp: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | #include 5 | #include 6 | #include 7 | 8 | #include "ftdi_axi_driver.h" 9 | #include "ftdi_ft60x.h" 10 | 11 | //----------------------------------------------------------------- 12 | // Command line options 13 | //----------------------------------------------------------------- 14 | #define GETOPTS_ARGS "d:a:h" 15 | 16 | static struct option long_options[] = 17 | { 18 | {"device", required_argument, 0, 'd'}, 19 | {"address", required_argument, 0, 'a'}, 20 | {"help", no_argument, 0, 'h'}, 21 | {0, 0, 0, 0} 22 | }; 23 | 24 | static void help_options(void) 25 | { 26 | fprintf (stderr,"Usage:\n"); 27 | fprintf (stderr," --device | -d IDX Device index to use (default: 0)\n"); 28 | fprintf (stderr," --address | -a ADDR Address to read\n"); 29 | exit(-1); 30 | } 31 | //----------------------------------------------------------------- 32 | // main: 33 | //----------------------------------------------------------------- 34 | int main(int argc, char *argv[]) 35 | { 36 | int c; 37 | int help = 0; 38 | int device = 0; 39 | uint32_t addr = 0xFFFFFFFF; 40 | 41 | int option_index = 0; 42 | while ((c = getopt_long (argc, argv, GETOPTS_ARGS, long_options, &option_index)) != -1) 43 | { 44 | switch(c) 45 | { 46 | case 'd': 47 | device = strtoul(optarg, NULL, 0); 48 | break; 49 | case 'a': 50 | addr = strtoul(optarg, NULL, 0) & ~3; 51 | break; 52 | default: 53 | help = 1; 54 | break; 55 | } 56 | } 57 | 58 | if (help || addr == 0xFFFFFFFF) 59 | { 60 | help_options(); 61 | return -1; 62 | } 63 | 64 | // Open the port 65 | ftdi_ft60x port; 66 | if (!port.open(0)) 67 | return -1; 68 | 69 | // Reset target state machines 70 | ftdi_axi_driver driver(&port); 71 | driver.send_drain(1000); 72 | port.sleep(10000); 73 | 74 | uint32_t value; 75 | if (!driver.read32(addr, value)) 76 | return -1; 77 | 78 | printf("0x%08x: 0x%08x (%d)\n", addr, value, value); 79 | 80 | port.close(); 81 | return 0; 82 | } 83 | -------------------------------------------------------------------------------- /sw/poke.cpp: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | #include 5 | #include 6 | #include 7 | 8 | #include "ftdi_axi_driver.h" 9 | #include "ftdi_ft60x.h" 10 | 11 | //----------------------------------------------------------------- 12 | // Command line options 13 | //----------------------------------------------------------------- 14 | #define GETOPTS_ARGS "d:a:v:h" 15 | 16 | static struct option long_options[] = 17 | { 18 | {"device", required_argument, 0, 'd'}, 19 | {"address", required_argument, 0, 'a'}, 20 | {"value", required_argument, 0, 'v'}, 21 | {"help", no_argument, 0, 'h'}, 22 | {0, 0, 0, 0} 23 | }; 24 | 25 | static void help_options(void) 26 | { 27 | fprintf (stderr,"Usage:\n"); 28 | fprintf (stderr," --device | -d IDX Device index to use (default: 0)\n"); 29 | fprintf (stderr," --address | -a ADDR Address to write\n"); 30 | fprintf (stderr," --value | -v DATA Value to write\n"); 31 | exit(-1); 32 | } 33 | //----------------------------------------------------------------- 34 | // main: 35 | //----------------------------------------------------------------- 36 | int main(int argc, char *argv[]) 37 | { 38 | int c; 39 | int help = 0; 40 | int device = 0; 41 | uint32_t addr = 0xFFFFFFFF; 42 | uint32_t value = 0; 43 | 44 | int option_index = 0; 45 | while ((c = getopt_long (argc, argv, GETOPTS_ARGS, long_options, &option_index)) != -1) 46 | { 47 | switch(c) 48 | { 49 | case 'd': 50 | device = strtoul(optarg, NULL, 0); 51 | break; 52 | case 'a': 53 | addr = strtoul(optarg, NULL, 0) & ~3; 54 | break; 55 | case 'v': 56 | value = strtoul(optarg, NULL, 0); 57 | break; 58 | default: 59 | help = 1; 60 | break; 61 | } 62 | } 63 | 64 | if (help || addr == 0xFFFFFFFF) 65 | { 66 | help_options(); 67 | return -1; 68 | } 69 | 70 | // Open the port 71 | ftdi_ft60x port; 72 | if (!port.open(0)) 73 | return -1; 74 | 75 | // Reset target state machines 76 | ftdi_axi_driver driver(&port); 77 | driver.send_drain(1000); 78 | port.sleep(10000); 79 | 80 | if (!driver.write32(addr, value)) 81 | return -1; 82 | 83 | printf("0x%08x: 0x%08x (%d)\n", addr, value, value); 84 | 85 | port.close(); 86 | return 0; 87 | } 88 | -------------------------------------------------------------------------------- /sw/verify.cpp: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | #include 5 | #include 6 | #include 7 | 8 | #include "ftdi_axi_driver.h" 9 | #include "ftdi_ft60x.h" 10 | 11 | //----------------------------------------------------------------- 12 | // Command line options 13 | //----------------------------------------------------------------- 14 | #define GETOPTS_ARGS "d:a:s:f:h" 15 | 16 | static struct option long_options[] = 17 | { 18 | {"device", required_argument, 0, 'd'}, 19 | {"address", required_argument, 0, 'a'}, 20 | {"size", required_argument, 0, 's'}, 21 | {"filename", required_argument, 0, 'f'}, 22 | {"help", no_argument, 0, 'h'}, 23 | {0, 0, 0, 0} 24 | }; 25 | 26 | static void help_options(void) 27 | { 28 | fprintf (stderr,"Usage:\n"); 29 | fprintf (stderr," --device | -d IDX Device index to use (default: 0)\n"); 30 | fprintf (stderr," --address | -a ADDR Address to compare file to (default: 0)\n"); 31 | fprintf (stderr," --filename | -f FILENAME File to compare\n"); 32 | fprintf (stderr," --size | -s SIZE File size (default: actual file size)\n"); 33 | exit(-1); 34 | } 35 | //----------------------------------------------------------------- 36 | // load_file_to_mem 37 | //----------------------------------------------------------------- 38 | static uint8_t* load_file_to_mem(const char *filename, long size_override, int *pSize) 39 | { 40 | uint8_t *file_buf = NULL; 41 | FILE *f = fopen(filename, "rb"); 42 | 43 | *pSize = 0; 44 | 45 | if (f) 46 | { 47 | long size; 48 | 49 | // Get size of file 50 | fseek(f, 0, SEEK_END); 51 | size = ftell(f); 52 | rewind(f); 53 | 54 | // User overriden file size 55 | if (size_override >= 0) 56 | { 57 | if (size > size_override) 58 | size = size_override; 59 | } 60 | 61 | file_buf = new uint8_t[size]; 62 | if (file_buf) 63 | { 64 | // Read file data into allocated memory 65 | int len = fread(file_buf, 1, size, f); 66 | if (len != size) 67 | { 68 | delete[] file_buf; 69 | file_buf = NULL; 70 | } 71 | else 72 | *pSize = size; 73 | } 74 | fclose(f); 75 | } 76 | 77 | return file_buf; 78 | } 79 | //----------------------------------------------------------------- 80 | // main: 81 | //----------------------------------------------------------------- 82 | int main(int argc, char *argv[]) 83 | { 84 | int c; 85 | int help = 0; 86 | int device = 0; 87 | uint32_t addr = 0; 88 | long size_override = -1; 89 | char * filename = NULL; 90 | 91 | int option_index = 0; 92 | while ((c = getopt_long (argc, argv, GETOPTS_ARGS, long_options, &option_index)) != -1) 93 | { 94 | switch(c) 95 | { 96 | case 'd': 97 | device = strtoul(optarg, NULL, 0); 98 | break; 99 | case 'a': 100 | addr = strtoul(optarg, NULL, 0); 101 | break; 102 | case 'f': 103 | filename = optarg; 104 | break; 105 | case 's': 106 | size_override = strtol(optarg, NULL, 0); 107 | break; 108 | default: 109 | help = 1; 110 | break; 111 | } 112 | } 113 | 114 | if (help || filename == NULL) 115 | { 116 | help_options(); 117 | return -1; 118 | } 119 | 120 | // Open the port 121 | ftdi_ft60x port; 122 | if (!port.open(0)) 123 | return -1; 124 | 125 | // Reset target state machines 126 | ftdi_axi_driver driver(&port); 127 | driver.send_drain(1000); 128 | port.sleep(10000); 129 | 130 | // Read file into memory 131 | bool ok = true; 132 | int size = 0; 133 | uint8_t *file_buf = load_file_to_mem(filename, size_override, &size); 134 | if (file_buf) 135 | { 136 | printf("Reading %s (%dKB) from 0x%x...\n", filename, (size + 1023) / 1024, addr); 137 | 138 | // Download file from target 139 | uint8_t *read_buf = new uint8_t[size]; 140 | ok = driver.read(addr, read_buf, size); 141 | if (!ok) 142 | fprintf(stderr, "ERROR: Could not read from target\n"); 143 | 144 | // Compare contents 145 | if (ok) 146 | ok = memcmp(file_buf, read_buf, size) == 0; 147 | 148 | // Free memory 149 | delete[] file_buf; 150 | delete[] read_buf; 151 | file_buf = read_buf = NULL; 152 | 153 | if (ok) 154 | printf("Target contents match!\n"); 155 | else 156 | fprintf(stderr, "ERROR: Target contents mismatch!\n"); 157 | } 158 | else 159 | { 160 | fprintf (stderr,"Error: Could not open file\n"); 161 | ok = false; 162 | } 163 | 164 | port.close(); 165 | return ok ? 0: -1; 166 | } 167 | --------------------------------------------------------------------------------