├── src ├── solvers │ ├── .gitignore │ ├── gecode │ │ ├── presolver │ │ │ └── .gitignore │ │ ├── third-party │ │ │ └── jsoncpp │ │ │ │ ├── version │ │ │ │ └── json │ │ │ │ ├── json.h │ │ │ │ ├── autolink.h │ │ │ │ ├── version.h │ │ │ │ └── forwards.h │ │ └── .gitignore │ └── multi_backend │ │ ├── common │ │ └── .gitignore │ │ ├── mosel │ │ ├── .gitignore │ │ └── mosel-solver │ │ ├── .gitignore │ │ ├── minizinc │ │ ├── .gitignore │ │ └── symmetry-finder │ │ ├── sicstus │ │ ├── .gitignore │ │ └── sicstus-solver │ │ ├── mzn-crippled-chuffed │ │ └── portfolio-solver ├── unison │ ├── .gitignore │ ├── src │ │ ├── Unison │ │ │ ├── Target │ │ │ │ ├── ARM │ │ │ │ │ ├── ARMResourceDecl.hs │ │ │ │ │ ├── SpecsGen.hs │ │ │ │ │ └── OperandInfo.hs │ │ │ │ ├── Minimal │ │ │ │ │ ├── SpecsGen │ │ │ │ │ │ ├── MinimalItineraryDecl.hs │ │ │ │ │ │ ├── Size.hs │ │ │ │ │ │ ├── AllInstructions.hs │ │ │ │ │ │ ├── MinimalRegisterClassDecl.hs │ │ │ │ │ │ ├── Parent.hs │ │ │ │ │ │ ├── Itinerary.hs │ │ │ │ │ │ ├── InstructionType.hs │ │ │ │ │ │ ├── ReadWriteInfo.hs │ │ │ │ │ │ ├── ReadOp.hs │ │ │ │ │ │ ├── ShowInstance.hs │ │ │ │ │ │ ├── MinimalInstructionDecl.hs │ │ │ │ │ │ └── AlignedPairs.hs │ │ │ │ │ ├── MinimalRegisterDecl.hs │ │ │ │ │ └── SpecsGen.hs │ │ │ │ ├── Hexagon │ │ │ │ │ ├── HexagonResourceDecl.hs │ │ │ │ │ ├── SpecsGen.hs │ │ │ │ │ └── SpecsGen │ │ │ │ │ │ └── HexagonRegisterClassDecl.hs │ │ │ │ └── Mips │ │ │ │ │ ├── MipsResourceDecl.hs │ │ │ │ │ ├── SpecsGen │ │ │ │ │ └── input │ │ │ │ │ │ └── mips-remat.yaml │ │ │ │ │ └── SpecsGen.hs │ │ │ ├── Transformations │ │ │ │ ├── RenameMOperands.hs │ │ │ │ ├── UnbundleSingletons.hs │ │ │ │ ├── RunTargetTransforms.hs │ │ │ │ ├── SortGlobalTemps.hs │ │ │ │ ├── AddPragmas.hs │ │ │ │ ├── NormalizeFrequency.hs │ │ │ │ ├── RenameOperations.hs │ │ │ │ ├── CleanPragmas.hs │ │ │ │ ├── PostponeBranches.hs │ │ │ │ ├── ReorderInstructions.hs │ │ │ │ ├── RenameTemps.hs │ │ │ │ ├── PropagatePhis.hs │ │ │ │ ├── EstimateFrequency.hs │ │ │ │ └── PropagatePhiCongruences.hs │ │ │ ├── Tools │ │ │ │ ├── Linearize │ │ │ │ │ ├── RemovePhis.hs │ │ │ │ │ ├── NormalizeCongruences.hs │ │ │ │ │ ├── SinkLiveOuts.hs │ │ │ │ │ └── AddReflexiveCongruences.hs │ │ │ │ ├── Analyze │ │ │ │ │ ├── FilterOverhead.hs │ │ │ │ │ └── InsertFuns.hs │ │ │ │ ├── Import │ │ │ │ │ ├── ReserveRegs.hs │ │ │ │ │ ├── AdvancePhis.hs │ │ │ │ │ ├── ConnectCalls.hs │ │ │ │ │ ├── EnforceCalleeSaved.hs │ │ │ │ │ ├── LiftUndefRegs.hs │ │ │ │ │ ├── DropDebugLocations.hs │ │ │ │ │ ├── LiftMemoryPartitions.hs │ │ │ │ │ ├── RemoveUnreachableBlocks.hs │ │ │ │ │ ├── ImplementFrameOperations.hs │ │ │ │ │ ├── TagRemats.hs │ │ │ │ │ ├── RemoveUselessVirtuals.hs │ │ │ │ │ ├── LowerCalls.hs │ │ │ │ │ ├── MovePhiUndefs.hs │ │ │ │ │ ├── NormalizePhis.hs │ │ │ │ │ ├── KillUnusedTemps.hs │ │ │ │ │ └── LiftMachineUndefs.hs │ │ │ │ ├── Extend │ │ │ │ │ ├── CleanCongruences.hs │ │ │ │ │ ├── SortCopies.hs │ │ │ │ │ └── GroupCalls.hs │ │ │ │ ├── Model │ │ │ │ │ └── Presolver.hs │ │ │ │ ├── Augment │ │ │ │ │ ├── CleanAttributes.hs │ │ │ │ │ ├── AddPrologueEpilogue.hs │ │ │ │ │ ├── GeneralizeCongruences.hs │ │ │ │ │ └── AddDataCongruences.hs │ │ │ │ ├── Export │ │ │ │ │ ├── LowerFrameSize.hs │ │ │ │ │ ├── DirectFrame.hs │ │ │ │ │ ├── RemoveRedundancies.hs │ │ │ │ │ ├── ComputeFrameOffsets.hs │ │ │ │ │ ├── BundleOperations.hs │ │ │ │ │ ├── LowerFrameIndices.hs │ │ │ │ │ └── CleanNops.hs │ │ │ │ └── Legalize.hs │ │ │ ├── Construction │ │ │ │ └── LiftGoal.hs │ │ │ ├── Target.hs │ │ │ ├── Analysis │ │ │ │ ├── CopyRelated.hs │ │ │ │ └── FrameOffsets.hs │ │ │ └── Graphs │ │ │ │ └── DT.hs │ │ ├── Unison.hs │ │ ├── MachineIR │ │ │ └── Transformations │ │ │ │ ├── RunPreProcess.hs │ │ │ │ ├── RunPostProcess.hs │ │ │ │ ├── DropUnsupportedPseudos.hs │ │ │ │ ├── RenameMachineBlocks.hs │ │ │ │ ├── LiftCustomProperties.hs │ │ │ │ ├── SimplifyFallthroughs.hs │ │ │ │ ├── AddImplicitRegs.hs │ │ │ │ └── LiftBlockFreqs.hs │ │ └── MachineIR.hs │ ├── Setup.hs │ ├── exec │ │ └── uni │ │ │ └── Main.hs │ └── test │ │ ├── Main.hs │ │ ├── fast │ │ ├── Mips │ │ │ ├── speed │ │ │ │ ├── functions.mk │ │ │ │ ├── sphinx3.profile.ptmr_init.asm │ │ │ │ ├── h264ref.vlc.symbol2uvlc.asm │ │ │ │ ├── gcc.expmed.ceil_log2.asm │ │ │ │ ├── mesa.api.glIndexd.asm │ │ │ │ ├── gobmk.board.get_last_player.asm │ │ │ │ ├── sphinx3.profile.ptmr_init.stats │ │ │ │ ├── gcc.expmed.ceil_log2.ll │ │ │ │ ├── sphinx3.glist.glist_tail.asm │ │ │ │ ├── sphinx3.profile.ptmr_init.ll │ │ │ │ ├── gcc.xexit.xexit.asm │ │ │ │ └── h264ref.sei.UpdateRandomAccess.stats │ │ │ └── size │ │ │ │ ├── functions.mk │ │ │ │ ├── sphinx3.profile.ptmr_init.asm │ │ │ │ ├── h264ref.vlc.symbol2uvlc.asm │ │ │ │ ├── gcc.expmed.ceil_log2.asm │ │ │ │ ├── mesa.api.glIndexd.asm │ │ │ │ ├── gobmk.board.get_last_player.asm │ │ │ │ ├── sphinx3.profile.ptmr_init.stats │ │ │ │ ├── gcc.expmed.ceil_log2.ll │ │ │ │ ├── sphinx3.glist.glist_tail.asm │ │ │ │ ├── sphinx3.profile.ptmr_init.ll │ │ │ │ ├── gcc.xexit.xexit.asm │ │ │ │ └── h264ref.sei.UpdateRandomAccess.stats │ │ ├── Hexagon │ │ │ ├── size │ │ │ │ ├── gcc.expmed.ceil_log2.asm │ │ │ │ ├── gobmk.interface.init_gnugo.asm │ │ │ │ ├── sphinx3.profile.ptmr_init.asm │ │ │ │ ├── mesa.api.glIndexd.asm │ │ │ │ ├── h264ref.memalloc.no_mem_exit.asm │ │ │ │ ├── gcc.xexit.xexit.asm │ │ │ │ ├── gobmk.board.get_last_player.asm │ │ │ │ ├── h264ref.vlc.symbol2uvlc.asm │ │ │ │ ├── h264ref.sei.UpdateRandomAccess.asm │ │ │ │ ├── gobmk.owl_defendpat.autohelperowl_defendpat421.asm │ │ │ │ ├── sphinx3.glist.glist_tail.asm │ │ │ │ ├── gcc.c-decl.pushdecl_top_level.asm │ │ │ │ ├── hmmer.tophits.AllocFancyAli.asm │ │ │ │ ├── gobmk.interface.init_gnugo.stats │ │ │ │ ├── mesa.api.glVertex2i.asm │ │ │ │ ├── gcc.varasm.data_section.asm │ │ │ │ ├── gobmk.patterns.autohelperpat1088.asm │ │ │ │ ├── gobmk.owl_vital_apat.autohelperowl_vital_apat34.asm │ │ │ │ ├── gobmk.patterns.autohelperpat301.asm │ │ │ │ ├── gcc.rtlanal.insn_dependent_p_1.asm │ │ │ │ ├── gobmk.owl_attackpat.autohelperowl_attackpat68.asm │ │ │ │ ├── gcc.insn-output.output_51.asm │ │ │ │ ├── gobmk.barriers.autohelperbarrierspat145.asm │ │ │ │ ├── gcc.rtlanal.parms_set.asm │ │ │ │ ├── sphinx3.profile.ptmr_init.stats │ │ │ │ ├── h264ref.sei.UpdateRandomAccess.stats │ │ │ │ ├── gcc.alias.get_frame_alias_set.asm │ │ │ │ └── gcc.expmed.ceil_log2.stats │ │ │ └── speed │ │ │ │ ├── gcc.expmed.ceil_log2.asm │ │ │ │ ├── gobmk.interface.init_gnugo.asm │ │ │ │ ├── sphinx3.profile.ptmr_init.asm │ │ │ │ ├── mesa.api.glIndexd.asm │ │ │ │ ├── h264ref.memalloc.no_mem_exit.asm │ │ │ │ ├── gcc.xexit.xexit.asm │ │ │ │ ├── gobmk.board.get_last_player.asm │ │ │ │ ├── h264ref.vlc.symbol2uvlc.asm │ │ │ │ ├── h264ref.sei.UpdateRandomAccess.asm │ │ │ │ ├── gobmk.owl_defendpat.autohelperowl_defendpat421.asm │ │ │ │ ├── sphinx3.glist.glist_tail.asm │ │ │ │ ├── gcc.c-decl.pushdecl_top_level.asm │ │ │ │ ├── hmmer.tophits.AllocFancyAli.asm │ │ │ │ ├── gobmk.interface.init_gnugo.stats │ │ │ │ ├── gcc.varasm.data_section.asm │ │ │ │ ├── gobmk.patterns.autohelperpat1088.asm │ │ │ │ ├── gobmk.owl_vital_apat.autohelperowl_vital_apat34.asm │ │ │ │ ├── gobmk.patterns.autohelperpat301.asm │ │ │ │ ├── gcc.rtlanal.insn_dependent_p_1.asm │ │ │ │ ├── gobmk.owl_attackpat.autohelperowl_attackpat68.asm │ │ │ │ ├── gobmk.barriers.autohelperbarrierspat145.asm │ │ │ │ ├── gcc.insn-output.output_51.asm │ │ │ │ ├── gcc.rtlanal.parms_set.asm │ │ │ │ ├── sphinx3.profile.ptmr_init.stats │ │ │ │ ├── h264ref.sei.UpdateRandomAccess.stats │ │ │ │ ├── gcc.alias.get_frame_alias_set.asm │ │ │ │ └── gcc.expmed.ceil_log2.stats │ │ └── ARM │ │ │ ├── size │ │ │ └── gobmk.interface.init_gnugo.stats │ │ │ └── speed │ │ │ └── gobmk.interface.init_gnugo.stats │ │ └── problematic │ │ └── Hexagon │ │ └── speed │ │ └── mesa.api.glVertex2i.asm ├── presolver-reference │ ├── .gitignore │ └── presolver ├── unison-specsgen │ ├── .gitignore │ ├── Setup.hs │ ├── exec │ │ └── specsgen │ │ │ └── Main.hs │ └── src │ │ └── SpecsGen │ │ ├── InstructionDeclGen.hs │ │ ├── ItineraryDeclGen.hs │ │ ├── ReadOpGen.hs │ │ ├── SizeGen.hs │ │ ├── ShowInstanceGen.hs │ │ ├── AllInstructionsGen.hs │ │ ├── ItineraryGen.hs │ │ ├── ParentGen.hs │ │ ├── InstructionTypeGen.hs │ │ └── RegisterClassDeclGen.hs ├── .gitignore └── stack.yaml.lock ├── .travis ├── build-test-unison.sh ├── download-build-gecode.sh └── accept-svn-certificate.sh └── doc ├── .gitignore ├── code ├── factorial.c ├── instruction.yaml ├── minimal.mir ├── Makefile ├── factorial.unison.mir ├── factorial.mir ├── factorial.asm.mir ├── factorial.uni └── factorial.lssa.uni ├── Makefile ├── manual.bib ├── objective-parameters.tex ├── figures ├── styles.tex └── llvm.tex └── model-variables.tex /src/solvers/.gitignore: -------------------------------------------------------------------------------- 1 | *.json 2 | -------------------------------------------------------------------------------- /src/unison/.gitignore: -------------------------------------------------------------------------------- 1 | dist 2 | -------------------------------------------------------------------------------- /src/presolver-reference/.gitignore: -------------------------------------------------------------------------------- 1 | 2 | -------------------------------------------------------------------------------- /src/solvers/gecode/presolver/.gitignore: -------------------------------------------------------------------------------- 1 | -------------------------------------------------------------------------------- /src/solvers/multi_backend/common/.gitignore: -------------------------------------------------------------------------------- 1 | -------------------------------------------------------------------------------- /src/solvers/multi_backend/mosel/.gitignore: -------------------------------------------------------------------------------- 1 | -------------------------------------------------------------------------------- /src/unison-specsgen/.gitignore: -------------------------------------------------------------------------------- 1 | dist 2 | -------------------------------------------------------------------------------- /src/solvers/multi_backend/.gitignore: -------------------------------------------------------------------------------- 1 | portfolio -------------------------------------------------------------------------------- /src/solvers/multi_backend/minizinc/.gitignore: -------------------------------------------------------------------------------- 1 | -------------------------------------------------------------------------------- /src/solvers/multi_backend/sicstus/.gitignore: -------------------------------------------------------------------------------- 1 | -------------------------------------------------------------------------------- /src/solvers/gecode/third-party/jsoncpp/version: -------------------------------------------------------------------------------- 1 | 1.8.3 2 | -------------------------------------------------------------------------------- /.travis/build-test-unison.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | cd src && make build test UNISON_GHC_CONFIG="-O0" && cd - 3 | -------------------------------------------------------------------------------- /doc/.gitignore: -------------------------------------------------------------------------------- 1 | *.aux 2 | *.fdb_latexmk 3 | *.fls 4 | *.log 5 | *.out 6 | *.pdf 7 | *.toc 8 | *.bbl 9 | *.blg -------------------------------------------------------------------------------- /src/solvers/multi_backend/mzn-crippled-chuffed: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | # 16 GB MEM 3 | ulimit -v 16777216 4 | mzn-chuffed $@ 5 | -------------------------------------------------------------------------------- /doc/code/factorial.c: -------------------------------------------------------------------------------- 1 | int factorial(int n) { 2 | int f; 3 | f = 1; 4 | while(n > 0) { 5 | f *= n--; 6 | } 7 | return f; 8 | } 9 | -------------------------------------------------------------------------------- /doc/Makefile: -------------------------------------------------------------------------------- 1 | .PHONY: manual.pdf 2 | manual.pdf: 3 | latexmk -pdf manual.tex 4 | 5 | clean: 6 | rm -f *.pdf *.aux *.dvi *.log *_latexmk *~ *.bbl *.blg *.out *.fls *.toc *.acn 7 | -------------------------------------------------------------------------------- /src/solvers/gecode/.gitignore: -------------------------------------------------------------------------------- 1 | gecode-solver 2 | gecode-presolver 3 | generated.mk 4 | gecode-solver-static 5 | generated-static.mk 6 | presolver-generated.mk 7 | *.o 8 | moc_*.cpp 9 | moc_*.h -------------------------------------------------------------------------------- /src/.gitignore: -------------------------------------------------------------------------------- 1 | unison/.stack-work 2 | unison/build 3 | unison-specsgen/.stack-work 4 | unison-specsgen/build 5 | .stack-work 6 | *.prof 7 | *.obj 8 | *.dmp 9 | *.hi 10 | *.o 11 | *.qmake.stash 12 | *~ -------------------------------------------------------------------------------- /src/unison/src/Unison/Target/ARM/ARMResourceDecl.hs: -------------------------------------------------------------------------------- 1 | module Unison.Target.ARM.ARMResourceDecl (ARMResource (..)) where 2 | 3 | data ARMResource = 4 | BundleWidth | 5 | V6_Pipe 6 | deriving (Eq, Ord, Show, Read) 7 | -------------------------------------------------------------------------------- /.travis/download-build-gecode.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | wget https://github.com/Gecode/gecode/archive/release-6.0.0.tar.gz 3 | tar -xvzf release-6.0.0.tar.gz 4 | cd gecode-release-6.0.0 && ./configure --disable-examples --disable-float --disable-flatzinc && make && cd - 5 | -------------------------------------------------------------------------------- /src/solvers/multi_backend/mosel/mosel-solver: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | # assuming current directory is ../../.. i.e. .../src 3 | BASENAME=$(basename $1 .ext.json) 4 | echo "json2mos('$1')." | sicstus -f --nologo --noinfo -l solvers/multi_backend/mosel/model2mos.pl 5 | mosel -c "exec $BASENAME.mos" 6 | -------------------------------------------------------------------------------- /doc/manual.bib: -------------------------------------------------------------------------------- 1 | 2 | @misc{Castaneda2014c, 3 | author = {Casta\~{n}eda Lozano, Roberto}, 4 | title = {\emph{Integrated Register Allocation and Instruction Scheduling with 5 | Constraint Programming}. {Licentiate thesis}. {KTH Royal 6 | Institute of Technology, Sweden}}, 7 | year = {2014}, 8 | } 9 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Target/Minimal/SpecsGen/MinimalItineraryDecl.hs: -------------------------------------------------------------------------------- 1 | -- This file has been generated by specsgen. Do not modify by hand! 2 | 3 | module Unison.Target.Minimal.SpecsGen.MinimalItineraryDecl 4 | (MinimalItinerary(..)) where 5 | 6 | data MinimalItinerary = IT 7 | deriving (Eq, Ord, Read, Show) 8 | 9 | -------------------------------------------------------------------------------- /src/unison/Setup.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | import Distribution.Simple 13 | main = defaultMain 14 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Target/Minimal/SpecsGen/Size.hs: -------------------------------------------------------------------------------- 1 | -- This file has been generated by specsgen. Do not modify by hand! 2 | 3 | module Unison.Target.Minimal.SpecsGen.Size (size) where 4 | import Unison.Target.Minimal.SpecsGen.MinimalInstructionDecl 5 | size i 6 | | i `elem` 7 | [B, Bif, Br, Ld, Li, Load, Move, Mul, Nop, Sgt, St, Store, Sub] 8 | = 1 9 | 10 | -------------------------------------------------------------------------------- /.travis/accept-svn-certificate.sh: -------------------------------------------------------------------------------- 1 | #!/usr/bin/expect -f 2 | 3 | set svn_username [lindex $argv 0] 4 | set svn_password [lindex $argv 1] 5 | set svn_url [lindex $argv 2] 6 | 7 | spawn svn --username=${svn_username} --password=${svn_password} list ${svn_url} 8 | expect "(R)eject, accept (t)emporarily or accept (p)ermanently? " 9 | send -- "p\r" 10 | expect -re "root@.*:\/#" 11 | -------------------------------------------------------------------------------- /src/solvers/multi_backend/portfolio-solver: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | # Assumes that the environment variable UNISON_DIR is set to the top of the 3 | # Unison repo 4 | MULTIBACKEND_DIR=$UNISON_DIR/src/solvers/multi_backend 5 | # Assume aeson-pretty-0.7.2 which prints integers without decimals 6 | ghc -O2 --make -threaded $MULTIBACKEND_DIR/portfolio.hs 7 | $MULTIBACKEND_DIR/portfolio "$@" +RTS -N2 8 | -------------------------------------------------------------------------------- /src/unison-specsgen/Setup.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | import Distribution.Simple 13 | main = defaultMain 14 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Target/Minimal/SpecsGen/AllInstructions.hs: -------------------------------------------------------------------------------- 1 | -- This file has been generated by specsgen. Do not modify by hand! 2 | 3 | module Unison.Target.Minimal.SpecsGen.AllInstructions 4 | (allInstructions) where 5 | import Unison.Target.Minimal.SpecsGen.MinimalInstructionDecl 6 | allInstructions 7 | = [Li, Sub, Mul, Sgt, Nop, Bif, B, Br, St, Ld, Store, Load, Move] 8 | 9 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Target/Minimal/SpecsGen/MinimalRegisterClassDecl.hs: -------------------------------------------------------------------------------- 1 | -- This file has been generated by specsgen. Do not modify by hand! 2 | 3 | module Unison.Target.Minimal.SpecsGen.MinimalRegisterClassDecl 4 | (MinimalRegisterClass(..)) where 5 | 6 | data MinimalRegisterClass = M32 7 | | R32 8 | deriving (Eq, Ord, Read, Show) 9 | 10 | -------------------------------------------------------------------------------- /doc/code/instruction.yaml: -------------------------------------------------------------------------------- 1 | - id: A2_addi 2 | type: linear 3 | operands: 4 | - Rd: [register, def, IntRegs] 5 | - Rs: [register, use, IntRegs] 6 | - s16: bound 7 | uses: [Rs, s16] 8 | defines: [Rd] 9 | size: 4 10 | affects: 11 | affected-by: 12 | itinerary: ALU32_ADDI_tc_1_SLOT0123 -------------------------------------------------------------------------------- /src/unison/src/Unison/Target/Minimal/SpecsGen/Parent.hs: -------------------------------------------------------------------------------- 1 | -- This file has been generated by specsgen. Do not modify by hand! 2 | 3 | module Unison.Target.Minimal.SpecsGen.Parent (parent) where 4 | import Unison.Target.Minimal.SpecsGen.MinimalInstructionDecl 5 | parent i 6 | | i `elem` [B, Bif, Br, Ld, Li, Move, Mul, Nop, Sgt, St, Sub] = 7 | Nothing 8 | | i `elem` [Load] = Just Ld 9 | | i `elem` [Store] = Just St 10 | 11 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Target/Hexagon/HexagonResourceDecl.hs: -------------------------------------------------------------------------------- 1 | module Unison.Target.Hexagon.HexagonResourceDecl (HexagonResource (..)) where 2 | 3 | -- | Declares target architecture resources 4 | 5 | data HexagonResource = 6 | BundleWidth | 7 | Slot0123 | 8 | Slot01 | 9 | Slot0 | 10 | Slot23 | 11 | Slot2 | 12 | Slot3 | 13 | Store | 14 | ConNewValue | 15 | BlockEnd | 16 | SpillCost 17 | deriving (Eq, Ord, Show, Read) 18 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Target/Minimal/SpecsGen/Itinerary.hs: -------------------------------------------------------------------------------- 1 | -- This file has been generated by specsgen. Do not modify by hand! 2 | 3 | module Unison.Target.Minimal.SpecsGen.Itinerary (itinerary) where 4 | import Unison.Target.Minimal.SpecsGen.MinimalInstructionDecl 5 | import Unison.Target.Minimal.SpecsGen.MinimalItineraryDecl 6 | itinerary i 7 | | i `elem` 8 | [B, Bif, Br, Ld, Li, Load, Move, Mul, Nop, Sgt, St, Store, Sub] 9 | = IT 10 | 11 | -------------------------------------------------------------------------------- /src/unison/exec/uni/Main.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Main where 13 | 14 | import Unison.Target 15 | import Unison.Tools.Uni (mainWithTargets) 16 | 17 | main :: IO () 18 | main = mainWithTargets unisonTargets 19 | -------------------------------------------------------------------------------- /src/unison/test/Main.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Main where 13 | 14 | import Unison.Target 15 | import Unison.Test.Driver (mainWithTargets) 16 | 17 | main :: IO () 18 | main = mainWithTargets unisonTargets 19 | -------------------------------------------------------------------------------- /src/unison-specsgen/exec/specsgen/Main.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | Contributing authors: 11 | Daniel Lundén 12 | 13 | This file is part of Unison, see http://unison-code.github.io 14 | -} 15 | module Main (main) where 16 | 17 | import SpecsGen.Driver 18 | 19 | main = runSpecsGen id (\_ _ -> return ()) 20 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Target/Minimal/SpecsGen/InstructionType.hs: -------------------------------------------------------------------------------- 1 | -- This file has been generated by specsgen. Do not modify by hand! 2 | 3 | module Unison.Target.Minimal.SpecsGen.InstructionType 4 | (instructionType) where 5 | import Unison 6 | import Unison.Target.Minimal.SpecsGen.MinimalInstructionDecl 7 | instructionType i 8 | | i `elem` [B, Bif, Br] = BranchInstructionType 9 | | i `elem` [Load, Move, Store] = CopyInstructionType 10 | | i `elem` [Ld, Li, Mul, Nop, Sgt, St, Sub] = LinearInstructionType 11 | 12 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Transformations/RenameMOperands.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Transformations.RenameMOperands (renameMOperands) where 13 | 14 | import Unison.Util 15 | 16 | renameMOperands f _target = renameOperands codeAltTemps applyMOperandIdMap f -------------------------------------------------------------------------------- /src/solvers/gecode/third-party/jsoncpp/json/json.h: -------------------------------------------------------------------------------- 1 | // Copyright 2007-2010 Baptiste Lepilleur and The JsonCpp Authors 2 | // Distributed under MIT license, or public domain if desired and 3 | // recognized in your jurisdiction. 4 | // See file LICENSE for detail or copy at http://jsoncpp.sourceforge.net/LICENSE 5 | 6 | #ifndef JSON_JSON_H_INCLUDED 7 | #define JSON_JSON_H_INCLUDED 8 | 9 | #include "autolink.h" 10 | #include "value.h" 11 | #include "reader.h" 12 | #include "writer.h" 13 | #include "features.h" 14 | 15 | #endif // JSON_JSON_H_INCLUDED 16 | -------------------------------------------------------------------------------- /src/unison/src/Unison.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison (module X) where 13 | import Common.Util as X 14 | import Unison.Base as X 15 | import Unison.Constructors as X 16 | import Unison.Predicates as X 17 | import Unison.Instances as X 18 | import Unison.Util as X 19 | -------------------------------------------------------------------------------- /src/unison/src/MachineIR/Transformations/RunPreProcess.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module MachineIR.Transformations.RunPreProcess (runPreProcess) where 13 | 14 | import MachineIR.Util 15 | 16 | import Unison.Target.API 17 | 18 | runPreProcess mf target = runMachineTransformations (preProcess target) mf 19 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Linearize/RemovePhis.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Linearize.RemovePhis (removePhis) where 13 | 14 | import Unison 15 | 16 | removePhis f @ Function {fCode = code} _target = 17 | let code' = filterCode (not . isPhi) code 18 | in f {fCode = code'} 19 | -------------------------------------------------------------------------------- /src/unison/src/MachineIR.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module MachineIR (module X) where 13 | import MachineIR.Base as X 14 | import MachineIR.Constructors as X 15 | import MachineIR.Util as X 16 | import MachineIR.Predicates as X 17 | import MachineIR.Parser as X 18 | import MachineIR.Instances as X 19 | -------------------------------------------------------------------------------- /src/unison/src/MachineIR/Transformations/RunPostProcess.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module MachineIR.Transformations.RunPostProcess (runPostProcess) where 13 | 14 | import MachineIR.Util 15 | 16 | import Unison.Target.API 17 | 18 | runPostProcess mf target = runMachineTransformations (postProcess target) mf 19 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Analyze/FilterOverhead.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Analyze.FilterOverhead (filterOverhead) where 13 | 14 | import Unison 15 | 16 | filterOverhead f @ Function {fCode = code} _target = 17 | let code' = filterCode isBarrier code 18 | in f {fCode = code'} 19 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Target/Minimal/MinimalRegisterDecl.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2020, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Target.Minimal.MinimalRegisterDecl (MinimalRegister (..)) where 13 | 14 | data MinimalRegister = 15 | R0 | 16 | R1 | 17 | R2 | 18 | R3 | 19 | R4 | 20 | R5 | 21 | R6 | 22 | R7 23 | deriving (Eq, Ord) 24 | -------------------------------------------------------------------------------- /src/stack.yaml.lock: -------------------------------------------------------------------------------- 1 | # This file was autogenerated by Stack. 2 | # You should not edit this file by hand. 3 | # For more information, please see the documentation at: 4 | # https://docs.haskellstack.org/en/stable/lock_files 5 | 6 | packages: [] 7 | snapshots: 8 | - completed: 9 | sha256: 95f014df58d0679b1c4a2b7bf2b652b61da8d30de5f571abb0d59015ef678646 10 | size: 509471 11 | url: https://raw.githubusercontent.com/commercialhaskell/stackage-snapshots/master/lts/12/26.yaml 12 | original: 13 | url: https://raw.githubusercontent.com/commercialhaskell/stackage-snapshots/master/lts/12/26.yaml 14 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Target/Minimal/SpecsGen/ReadWriteInfo.hs: -------------------------------------------------------------------------------- 1 | -- This file has been generated by specsgen. Do not modify by hand! 2 | 3 | module Unison.Target.Minimal.SpecsGen.ReadWriteInfo (readWriteInfo) 4 | where 5 | import Unison 6 | import Unison.Target.Minimal.SpecsGen.MinimalInstructionDecl 7 | import Unison.Target.Minimal.MinimalRegisterDecl 8 | readWriteInfo i 9 | | i `elem` [B, Bif, Br, Li, Move, Mul, Nop, Sgt, Sub] = ([], []) 10 | | i `elem` [St] = ([], [Memory "mem"]) 11 | | i `elem` [Ld] = ([Memory "mem"], []) 12 | | i `elem` [Load, Store] = ([OtherSideEffect R0], []) 13 | 14 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Import/ReserveRegs.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Import.ReserveRegs (reserveRegs) where 13 | 14 | import Unison 15 | import Unison.Target.API 16 | 17 | reserveRegs f target = 18 | let rr = map (mkRegister . mkTargetRegister) $ reserved target 19 | in addLongLifeRegs exitBlockIds rr f 20 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Target/Minimal/SpecsGen/ReadOp.hs: -------------------------------------------------------------------------------- 1 | -- This file has been generated by specsgen. Do not modify by hand! 2 | 3 | module Unison.Target.Minimal.SpecsGen.ReadOp (readOp) where 4 | import Unison.Target.Minimal.SpecsGen.MinimalInstructionDecl 5 | readOp "li" = Li 6 | readOp "sub" = Sub 7 | readOp "mul" = Mul 8 | readOp "sgt" = Sgt 9 | readOp "nop" = Nop 10 | readOp "bif" = Bif 11 | readOp "b" = B 12 | readOp "br" = Br 13 | readOp "st" = St 14 | readOp "ld" = Ld 15 | readOp "store" = Store 16 | readOp "load" = Load 17 | readOp "move" = Move 18 | readOp a = error ("unmatched: readOp " ++ show a) 19 | 20 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Target/Mips/MipsResourceDecl.hs: -------------------------------------------------------------------------------- 1 | module Unison.Target.Mips.MipsResourceDecl (MipsResource (..)) where 2 | 3 | data MipsResource = 4 | -- Size of each instruction 5 | BundleWidth | 6 | -- Resource to model delay-slot instructions 7 | Issue | 8 | -- Resource to avoid overlaps between long-latency and delay-slot 9 | -- instructions: the former consume the resource unders all execution (but not 10 | -- issue) cycles, the latter consumes the resource at its issue cycle 11 | LongDuration | 12 | -- LLVM itinerary resources 13 | ALU | 14 | IMULDIV 15 | deriving (Eq, Ord, Show, Read) 16 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Extend/CleanCongruences.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Extend.CleanCongruences (cleanCongruences) where 13 | 14 | import Unison.Base 15 | 16 | cleanCongruences f @ Function {fCongruences = cs} _target = 17 | let cs' = filter (not . isReflexive) cs 18 | in f {fCongruences = cs'} 19 | 20 | isReflexive (o1, o2) = o1 == o2 -------------------------------------------------------------------------------- /src/unison/src/Unison/Transformations/UnbundleSingletons.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Transformations.UnbundleSingletons 13 | (unbundleSingletons) where 14 | 15 | import Unison.Base 16 | import Unison.Util 17 | 18 | unbundleSingletons f _ = mapToOperation unbundleSingleton f 19 | 20 | unbundleSingleton Bundle {bundleOs = [o]} = o 21 | unbundleSingleton o = o 22 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Transformations/RunTargetTransforms.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Transformations.RunTargetTransforms (runTargetTransforms) where 13 | 14 | import Unison.Target.API 15 | 16 | runTargetTransforms phase f target = 17 | let tfs = transforms target phase 18 | f' = foldl applyTransform f tfs 19 | in f' 20 | 21 | applyTransform f tf = tf f 22 | -------------------------------------------------------------------------------- /src/unison/test/fast/Mips/speed/functions.mk: -------------------------------------------------------------------------------- 1 | EXP_FUNCTIONS = \ 2 | gcc.alias.get_frame_alias_set \ 3 | gcc.expmed.ceil_log2 \ 4 | gcc.jump.unsigned_condition \ 5 | gcc.rtlanal.parms_set \ 6 | gcc.xexit.xexit \ 7 | gobmk.board.get_last_player \ 8 | gobmk.owl_attackpat.autohelperowl_attackpat68 \ 9 | gobmk.owl_defendpat.autohelperowl_defendpat421 \ 10 | gobmk.owl_vital_apat.autohelperowl_vital_apat34 \ 11 | gobmk.patterns.autohelperpat1088 \ 12 | h264ref.sei.UpdateRandomAccess \ 13 | h264ref.vlc.symbol2uvlc \ 14 | hmmer.tophits.AllocFancyAli \ 15 | mesa.api.glIndexd \ 16 | mesa.api.glVertex2i \ 17 | sphinx3.glist.glist_tail \ 18 | sphinx3.profile.ptmr_init 19 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Import/AdvancePhis.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | {-# LANGUAGE FlexibleContexts #-} 13 | module Unison.Tools.Import.AdvancePhis (advancePhis) where 14 | 15 | import Unison.Base 16 | import Unison.Util 17 | import Unison.Predicates 18 | 19 | advancePhis f @ Function {fCode = code} _target = 20 | let code' = map (moveOperations isPhi after isIn) code 21 | in f {fCode = code'} 22 | -------------------------------------------------------------------------------- /src/presolver-reference/presolver: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | # assuming current directory is .. i.e. .../src 3 | BASENAME=$(basename $1 .json) 4 | JSONNAME=$1 5 | OUTJSON=$BASENAME.ext.json 6 | shift 7 | case "$1" in 8 | -o) 9 | OUTJSON=$2 10 | esac 11 | echo "presolve('$JSONNAME')." | sicstus -f --nologo --noinfo -l presolver-reference/presolver.pl -- $* 12 | # If presolver timed out, just pass through the original .json file 13 | if [ ! -f $OUTJSON ]; then 14 | cp $JSONNAME $OUTJSON 15 | fi 16 | # Normalize format so that it becomes easier to compare to original .json file 17 | mv $OUTJSON $BASENAME.temp 18 | cat $BASENAME.temp | aeson-pretty > $OUTJSON 19 | rm $BASENAME.temp 20 | -------------------------------------------------------------------------------- /doc/code/minimal.mir: -------------------------------------------------------------------------------- 1 | --- | 2 | (corresponding IR) 3 | ... 4 | --- 5 | name: minimal 6 | body: | 7 | bb.0.begin (freq 1): 8 | liveins: %r0 9 | 10 | %5 = COPY %r0 11 | %6 = li 1 12 | %9 = li 0 13 | %7 = sgt %5, %9 14 | bif %7, %bb.2.end 15 | 16 | bb.1.loop (freq 20): 17 | 18 | %0 = PHI %6, %bb.0.begin, %3, %bb.1.loop 19 | %1 = PHI %5, %bb.0.begin, %2, %bb.1.loop 20 | %2 = sub %1, %6 21 | %3 = mul %1, %0 22 | %8 = sgt %1, %6 23 | bif %8, %bb.1.loop 24 | 25 | bb.2.end (freq 1): 26 | liveouts: %r2 27 | 28 | %4 = PHI %6, %bb.0.begin, %3, %bb.1.loop 29 | %r2 = COPY %4 30 | br %r7 31 | 32 | ... 33 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Construction/LiftGoal.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Construction.LiftGoal (liftGoal) where 13 | 14 | import Data.List.Split 15 | 16 | import Unison.Base 17 | import Unison.Instances() 18 | 19 | liftGoal maybeGoal f _ = 20 | let hlgoal = case maybeGoal of 21 | Nothing -> [] 22 | Just goal -> map read (splitOn "," goal) 23 | in f {fGoal = hlgoal} 24 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Target/Minimal/SpecsGen/ShowInstance.hs: -------------------------------------------------------------------------------- 1 | -- This file has been generated by specsgen. Do not modify by hand! 2 | 3 | module Unison.Target.Minimal.SpecsGen.ShowInstance where 4 | import Unison.Target.Minimal.SpecsGen.MinimalInstructionDecl 5 | 6 | instance Show MinimalInstruction where 7 | show Li = "li" 8 | show Sub = "sub" 9 | show Mul = "mul" 10 | show Sgt = "sgt" 11 | show Nop = "nop" 12 | show Bif = "bif" 13 | show B = "b" 14 | show Br = "br" 15 | show St = "st" 16 | show Ld = "ld" 17 | show Store = "store" 18 | show Load = "load" 19 | show Move = "move" 20 | 21 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Import/ConnectCalls.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Import.ConnectCalls (connectCalls) where 13 | 14 | import Unison 15 | 16 | connectCalls f _ = peephole connectCall f 17 | 18 | connectCall _ (c : f : os) _ | (isCall c || isTailCall c) && isFun f = 19 | let f' = mapToAttrCall (const (Just (oId c))) f 20 | in (os, [c, f']) 21 | 22 | connectCall _ (o : os) _ = (os, [o]) 23 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Transformations/SortGlobalTemps.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Transformations.SortGlobalTemps (sortGlobalTemps) where 13 | 14 | import Unison.Base 15 | import Unison.Util 16 | 17 | sortGlobalTemps f @ Function {fCode = code} _target = 18 | let code' = map sortEdgeTemps code 19 | in f {fCode = code'} 20 | 21 | sortEdgeTemps b @ Block {bCode = code} = b {bCode = (sortOut . sortIn) code} -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/size/gcc.expmed.ceil_log2.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gcc.expmed.ceil_log2.ll" 3 | .globl ceil_log2 4 | .align 16 5 | .type ceil_log2,@function 6 | ceil_log2: // @ceil_log2 7 | // BB#0: 8 | { 9 | call floor_log2_wide 10 | r0 = add(r0,#-1) 11 | allocframe(#0) 12 | } 13 | { 14 | r0 = add(r0, #1) 15 | dealloc_return 16 | } 17 | .Lfunc_end0: 18 | .size ceil_log2, .Lfunc_end0-ceil_log2 19 | 20 | 21 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 22 | .section ".note.GNU-stack","",@progbits 23 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/speed/gcc.expmed.ceil_log2.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gcc.expmed.ceil_log2.ll" 3 | .globl ceil_log2 4 | .align 16 5 | .type ceil_log2,@function 6 | ceil_log2: // @ceil_log2 7 | // BB#0: 8 | { 9 | call floor_log2_wide 10 | r0 = add(r0,#-1) 11 | allocframe(#0) 12 | } 13 | { 14 | r0 = add(r0, #1) 15 | dealloc_return 16 | } 17 | .Lfunc_end0: 18 | .size ceil_log2, .Lfunc_end0-ceil_log2 19 | 20 | 21 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 22 | .section ".note.GNU-stack","",@progbits 23 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Transformations/AddPragmas.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Transformations.AddPragmas (addPragmas) 13 | where 14 | 15 | import Unison.Base 16 | import Unison.Util 17 | 18 | addPragmas ps f @ Function {fComments = comments} _ = 19 | let comments' = comments ++ map toComment ps 20 | in f {fComments = comments'} 21 | 22 | toComment (tool, args) = " " ++ pragmaHeader tool ++ " " ++ args 23 | -------------------------------------------------------------------------------- /src/unison/src/MachineIR/Transformations/DropUnsupportedPseudos.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module MachineIR.Transformations.DropUnsupportedPseudos (dropUnsupportedPseudos) where 13 | 14 | import MachineIR 15 | 16 | -- Note: eventually we need to handle these pseudo-instructions 17 | 18 | dropUnsupportedPseudos mf _target = 19 | filterMachineInstructions 20 | (not . (\mi -> isMachineEHLabel mi || isMachineCFIInstruction mi)) mf 21 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Import/EnforceCalleeSaved.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Import.EnforceCalleeSaved (enforceCalleeSaved) where 13 | 14 | import Unison 15 | import Unison.Target.API 16 | 17 | enforceCalleeSaved f target = 18 | let csr = map (mkRegister . mkTargetRegister) $ calleeSaved target 19 | in if hasReturn (fCode f) then addLongLifeRegs returnBlockIds csr f else f 20 | 21 | hasReturn = not . null . returnBlockIds 22 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Model/Presolver.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Model.Presolver (presolver) where 13 | 14 | import qualified Data.Map as M 15 | import Data.Aeson (toJSON) 16 | 17 | import qualified Unison.Tools.Model.PresolverParameters as EP 18 | import Unison.Tools.Model.Definitions 19 | 20 | presolver oldModel aux target f ps = 21 | let sps = toJSON (M.fromList (EP.parameters oldModel aux f target ps)) 22 | in unionMaps ps sps 23 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Transformations/NormalizeFrequency.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Transformations.NormalizeFrequency (normalizeFrequency) 13 | where 14 | 15 | import Unison.Base 16 | import Unison.Util 17 | 18 | normalizeFrequency f @ Function {fCode = code, fRemovedFreqs = rfs} _ = 19 | let rawfreq = map blockFreq code ++ rfs 20 | freq = normalize rawfreq 21 | code' = map updateBlockFreq (zip freq code) 22 | in f {fCode = code'} 23 | -------------------------------------------------------------------------------- /doc/code/Makefile: -------------------------------------------------------------------------------- 1 | UNIARGS = --lintpragma=false 2 | 3 | .PRECIOUS: %.uni %.lssa.uni %.ext.uni %.alt.uni %.json 4 | 5 | factorial-examples: factorial.mir 6 | rm -f *.uni *.json 7 | make factorial.json 8 | 9 | %.alt.uni: %.ext.uni 10 | uni augment $(UNIARGS) --implementframes=false $< -o $@ 11 | 12 | %.ext.uni: %.lssa.uni 13 | uni extend $(UNIARGS) $< -o $@ 14 | 15 | %.lssa.uni: %.uni 16 | uni linearize $(UNIARGS) $< -o $@ 17 | 18 | %.uni: %.mir 19 | uni import $(UNIARGS) --nocc --noreserved --goal=speed --noremat $< -o $@ 20 | 21 | %.json : %.alt.uni %.llvm.mir 22 | uni model --basefile=$*.llvm.mir $< | aeson-pretty -c | sed 's/,/, /g' | sed 's/:/: /g' | sed 's/, "/,\n"/g' > $@ 23 | 24 | %.llvm.mir : %.asm.mir 25 | uni normalize $< -o $@ 26 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Target/Minimal/SpecsGen/MinimalInstructionDecl.hs: -------------------------------------------------------------------------------- 1 | -- This file has been generated by specsgen. Do not modify by hand! 2 | 3 | module Unison.Target.Minimal.SpecsGen.MinimalInstructionDecl 4 | (MinimalInstruction(..)) where 5 | 6 | data MinimalInstruction = Li 7 | | Sub 8 | | Mul 9 | | Sgt 10 | | Nop 11 | | Bif 12 | | B 13 | | Br 14 | | St 15 | | Ld 16 | | Store 17 | | Load 18 | | Move 19 | deriving (Eq, Ord) 20 | 21 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Target/Mips/SpecsGen/input/mips-remat.yaml: -------------------------------------------------------------------------------- 1 | --- 2 | instruction-set: 3 | - group: REMATERIALIZATION 4 | instructions: 5 | 6 | - id: LDC1_fi 7 | home-class: AFGR64Opnd 8 | infinite-class: RM64 9 | suffix: _fi 10 | 11 | - id: LEA_ADDiu 12 | home-class: GPR32Opnd 13 | infinite-class: RM32 14 | 15 | - id: LUi 16 | home-class: GPR32Opnd 17 | infinite-class: RM32 18 | 19 | - id: LW_fi 20 | home-class: GPR32Opnd 21 | infinite-class: RM32 22 | suffix: _fi 23 | 24 | - id: LBu_fi 25 | home-class: GPR32Opnd 26 | infinite-class: RM32 27 | suffix: _fi 28 | 29 | - id: LWC1_fi 30 | home-class: FGR32Opnd 31 | infinite-class: RM32 32 | suffix: _fi 33 | -------------------------------------------------------------------------------- /doc/code/factorial.unison.mir: -------------------------------------------------------------------------------- 1 | --- | 2 | ; ModuleID = (...) 3 | 4 | ... 5 | --- 6 | name: factorial 7 | body: | 8 | bb.0 (freq 4): 9 | successors: %bb.2(1), %bb.1(1) 10 | 11 | BUNDLE { 12 | %r1 = A2_tfrsi 1 13 | J4_cmpgti_f_jumpnv_t %r0, 0, %bb.2, implicit %pc, implicit-def %pc 14 | } 15 | 16 | bb.1 (freq 85): 17 | successors: %bb.1(1), %bb.2(1) 18 | 19 | BUNDLE { 20 | %r0 = A2_addi %r0, -1 21 | %r1 = M2_mpyi %r0, %r1 22 | %p0 = C2_cmpgti %r0, 1 23 | J2_jumpt %p0, %bb.1, implicit %pc, implicit-def %pc 24 | } 25 | 26 | bb.2 (freq 4): 27 | 28 | BUNDLE { 29 | %r0 = A2_tfr %r1 30 | JMPret %r31, implicit %pc, implicit-def %pc 31 | } 32 | 33 | ... 34 | -------------------------------------------------------------------------------- /src/unison/src/MachineIR/Transformations/RenameMachineBlocks.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module MachineIR.Transformations.RenameMachineBlocks 13 | (renameMachineBlocks) where 14 | 15 | import qualified Data.Map as M 16 | 17 | import Common.Util 18 | import MachineIR 19 | 20 | renameMachineBlocks mf @ MachineFunction {mfBlocks = code} _target = 21 | let ids = zip (map mbId code) [0..] 22 | idf = applyMap $ M.fromList ids 23 | mf' = mapToMachineBlockId always idf mf 24 | in mf' 25 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/size/gobmk.interface.init_gnugo.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gobmk.interface.init_gnugo.ll" 3 | .globl init_gnugo 4 | .align 16 5 | .type init_gnugo,@function 6 | init_gnugo: // @init_gnugo 7 | // BB#0: 8 | { 9 | call reading_cache_init 10 | allocframe(#0) 11 | } 12 | { 13 | call clear_board 14 | } 15 | { 16 | call transformation_init 17 | } 18 | { 19 | jump dfa_match_init 20 | deallocframe 21 | } 22 | .Lfunc_end0: 23 | .size init_gnugo, .Lfunc_end0-init_gnugo 24 | 25 | 26 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 27 | .section ".note.GNU-stack","",@progbits 28 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/speed/gobmk.interface.init_gnugo.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gobmk.interface.init_gnugo.ll" 3 | .globl init_gnugo 4 | .align 16 5 | .type init_gnugo,@function 6 | init_gnugo: // @init_gnugo 7 | // BB#0: 8 | { 9 | call reading_cache_init 10 | allocframe(#0) 11 | } 12 | { 13 | call clear_board 14 | } 15 | { 16 | call transformation_init 17 | } 18 | { 19 | jump dfa_match_init 20 | deallocframe 21 | } 22 | .Lfunc_end0: 23 | .size init_gnugo, .Lfunc_end0-init_gnugo 24 | 25 | 26 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 27 | .section ".note.GNU-stack","",@progbits 28 | -------------------------------------------------------------------------------- /doc/objective-parameters.tex: -------------------------------------------------------------------------------- 1 | \begin{longtable}{ l p{12cm} } 2 | 3 | \parameter{\optimizeDynamic{n}}{whether to use block frequencies as 4 | weight for the $n$\textsuperscript{th} objective} 5 | \json{optimize\_dynamic}{[true]} 6 | 7 | \tableSpace 8 | 9 | \parameter{\optimizeResource{n}}{resource whose consumption is to be 10 | optimized for the $n$\textsuperscript{th} objective} 11 | \json{optimize\_resource}{[-1]} 12 | \jsonComment{note: the estimated number of cycles (\code{cycles}) is 13 | encoded as resource \code{-1} , otherwise the usual resource numbers in 14 | \code{R} are used} 15 | 16 | \tableSpace 17 | 18 | \parameter{\maxCost{n}}{upper bound of the $n$\textsuperscript{th} objective} 19 | \json{maxf}{[274]} 20 | 21 | \end{longtable} 22 | -------------------------------------------------------------------------------- /src/unison-specsgen/src/SpecsGen/InstructionDeclGen.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module SpecsGen.InstructionDeclGen (emitInstructionDecl) where 13 | 14 | import SpecsGen.SimpleYaml 15 | import SpecsGen.HsGen 16 | 17 | emitInstructionDecl targetName is = 18 | let ids = map (toOpType . oId) is 19 | in [hsModule 20 | (moduleName targetName (targetName ++ "InstructionDecl")) 21 | (Just [hsExportDataType (targetName ++ "Instruction")]) 22 | [] 23 | [hsDataDecl targetName ids]] 24 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Import/LiftUndefRegs.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Import.LiftUndefRegs (liftUndefRegs) where 13 | 14 | import Data.List 15 | import Unison 16 | 17 | liftUndefRegs f @ Function {fCode = code} _target = 18 | let code' = mapToEntryBlock (appendToIn (orphans $ flatten code)) code 19 | in f {fCode = code'} 20 | 21 | -- | Registers that are used but not defined 22 | orphans code = 23 | filter isRegister (nub (concatMap oUses code) \\ nub (concatMap oDefs code)) 24 | -------------------------------------------------------------------------------- /doc/code/factorial.mir: -------------------------------------------------------------------------------- 1 | --- | 2 | ; ModuleID = (...) 3 | ... 4 | --- 5 | name: factorial 6 | body: | 7 | bb.0.entry (freq 12): 8 | liveins: %r0 9 | 10 | %5 = COPY %r0 11 | %6 = A2_tfrsi 1 12 | %7 = C2_cmpgti %5, 0 13 | J2_jumpf %7, %bb.2.while.end 14 | 15 | bb.1.while.body (freq 255): 16 | 17 | %0 = PHI %6, %bb.0.entry, %3, %bb.1.while.body 18 | %1 = PHI %5, %bb.0.entry, %2, %bb.1.while.body 19 | %2 = A2_addi %1, -1 20 | %3 = M2_mpyi %1, %0 21 | %8 = C2_cmpgti %1, 1 22 | J2_jumpt %8, %bb.1.while.body 23 | J2_jump %bb.2.while.end 24 | 25 | bb.2.while.end (freq 12): 26 | liveouts: %r0 27 | 28 | %4 = PHI %6, %bb.0.entry, %3, %bb.1.while.body 29 | %r0 = COPY %4 30 | JMPret %r31 31 | 32 | ... 33 | -------------------------------------------------------------------------------- /src/unison-specsgen/src/SpecsGen/ItineraryDeclGen.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module SpecsGen.ItineraryDeclGen (emitItineraryDecl) where 13 | 14 | import Data.List 15 | 16 | import SpecsGen.SimpleYaml 17 | import SpecsGen.HsGen 18 | 19 | emitItineraryDecl targetName is = 20 | let ids = nub $ map iItinerary is 21 | in [hsModule 22 | (moduleName targetName (targetName ++ "ItineraryDecl")) 23 | (Just [hsExportDataType (targetName ++ "Itinerary")]) 24 | [] 25 | [hsItinDecl targetName ids]] 26 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Target.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Target (unisonTargets) where 13 | 14 | import Unison.Target.API (Any(..)) 15 | import Unison.Target.Hexagon as Hexagon (target) 16 | import Unison.Target.ARM as ARM (target) 17 | import Unison.Target.Mips as Mips (target) 18 | import Unison.Target.Minimal as Minimal (target) 19 | 20 | unisonTargets = 21 | [("Hexagon", Any Hexagon.target), 22 | ("ARM", Any ARM.target), 23 | ("Mips", Any Mips.target), 24 | ("Minimal", Any Minimal.target)] 25 | -------------------------------------------------------------------------------- /src/unison-specsgen/src/SpecsGen/ReadOpGen.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module SpecsGen.ReadOpGen (emitReadOp) where 13 | 14 | import SpecsGen.SimpleYaml 15 | import SpecsGen.HsGen 16 | 17 | emitReadOp targetName is = 18 | let ids = map oId is 19 | in [hsModule 20 | (moduleName targetName "ReadOp") 21 | (Just [hsExportVar "readOp"]) 22 | [instructionDeclImport targetName] 23 | ([simpleFun (toHsPStr id) "readOp" (toHsCon $ toOpType id) | id <- ids] ++ 24 | [simpleErrorRhs "readOp"])] 25 | -------------------------------------------------------------------------------- /src/unison-specsgen/src/SpecsGen/SizeGen.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module SpecsGen.SizeGen (emitSize) where 13 | 14 | import SpecsGen.SimpleYaml 15 | import SpecsGen.HsGen 16 | 17 | emitSize targetName is = 18 | let us2ids = infoToIds iSize is 19 | rhss = map (mkOpcRhs idToHsCon toSizeRhs) us2ids 20 | in [hsModule 21 | (moduleName targetName "Size") 22 | (Just [hsExportVar "size"]) 23 | [instructionDeclImport targetName] 24 | [simpleOpcFunBind "size" rhss]] 25 | 26 | toSizeRhs = toHsInt 27 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Target/Minimal/SpecsGen/AlignedPairs.hs: -------------------------------------------------------------------------------- 1 | -- This file has been generated by specsgen. Do not modify by hand! 2 | 3 | module Unison.Target.Minimal.SpecsGen.AlignedPairs (alignedPairs) 4 | where 5 | import Unison.Target.Minimal.SpecsGen.MinimalInstructionDecl 6 | alignedPairs i ([], []) | i `elem` [Nop] = [] 7 | alignedPairs i ([_, _], [_]) | i `elem` [Ld] = [] 8 | alignedPairs i ([_], []) | i `elem` [Br] = [] 9 | alignedPairs i ([_], [_]) | i `elem` [Load, Move, Store] = [] 10 | alignedPairs i ([_, _, _], []) | i `elem` [St] = [] 11 | alignedPairs i ([_], [_]) | i `elem` [Li] = [] 12 | alignedPairs i ([_, _], []) | i `elem` [Bif] = [] 13 | alignedPairs i ([_, _], [_]) | i `elem` [Mul, Sgt, Sub] = [] 14 | alignedPairs i ([_], []) | i `elem` [B] = [] 15 | alignedPairs _ _ = [] 16 | 17 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Import/DropDebugLocations.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Import.DropDebugLocations (dropDebugLocations) where 13 | 14 | import MachineIR 15 | 16 | -- Note that this pass is temporary, eventually we need to handle debug 17 | -- information 18 | 19 | dropDebugLocations mf _target = 20 | mapToMachineInstruction dropDebugLocationsInInstr mf 21 | 22 | dropDebugLocationsInInstr mi @ MachineSingle {msOperands = mos} = 23 | let mos' = filter (not . isMachineDebugLocation) mos 24 | in mi {msOperands = mos'} 25 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/size/sphinx3.profile.ptmr_init.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "sphinx3.profile.ptmr_init.ll" 3 | .globl ptmr_init 4 | .align 16 5 | .type ptmr_init,@function 6 | ptmr_init: // @ptmr_init 7 | // BB#0: 8 | { 9 | memw(r0 + #12)=#0 10 | memw(r0 + #16)=#0 11 | } 12 | { 13 | memw(r0 + #20)=#0 14 | memw(r0 + #24)=#0 15 | } 16 | { 17 | memw(r0 + #28)=#0 18 | memw(r0 + #32)=#0 19 | } 20 | { 21 | jumpr r31 22 | memw(r0 + #36)=#0 23 | memw(r0 + #8)=#0 24 | } 25 | .Lfunc_end0: 26 | .size ptmr_init, .Lfunc_end0-ptmr_init 27 | 28 | 29 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 30 | .section ".note.GNU-stack","",@progbits 31 | -------------------------------------------------------------------------------- /src/unison-specsgen/src/SpecsGen/ShowInstanceGen.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module SpecsGen.ShowInstanceGen (emitShowInstance) where 13 | 14 | import SpecsGen.SimpleYaml 15 | import SpecsGen.HsGen 16 | 17 | emitShowInstance targetName is = 18 | let ids = map oId is 19 | ss = [simpleFun (toHsPVar $ toOpType id) "show" (toHsStr id) 20 | | id <- ids] 21 | in [hsModule 22 | (moduleName targetName "ShowInstance") 23 | Nothing 24 | [instructionDeclImport targetName] 25 | [hsInstDecl targetName ss]] 26 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/speed/sphinx3.profile.ptmr_init.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "sphinx3.profile.ptmr_init.ll" 3 | .globl ptmr_init 4 | .align 16 5 | .type ptmr_init,@function 6 | ptmr_init: // @ptmr_init 7 | // BB#0: 8 | { 9 | memw(r0 + #12)=#0 10 | memw(r0 + #16)=#0 11 | } 12 | { 13 | memw(r0 + #20)=#0 14 | memw(r0 + #24)=#0 15 | } 16 | { 17 | memw(r0 + #28)=#0 18 | memw(r0 + #32)=#0 19 | } 20 | { 21 | jumpr r31 22 | memw(r0 + #36)=#0 23 | memw(r0 + #8)=#0 24 | } 25 | .Lfunc_end0: 26 | .size ptmr_init, .Lfunc_end0-ptmr_init 27 | 28 | 29 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 30 | .section ".note.GNU-stack","",@progbits 31 | -------------------------------------------------------------------------------- /src/unison/test/fast/Mips/size/functions.mk: -------------------------------------------------------------------------------- 1 | EXP_FUNCTIONS = \ 2 | gcc.alias.get_frame_alias_set \ 3 | gcc.expmed.ceil_log2 \ 4 | gcc.insn-output.output_51 \ 5 | gcc.jump.unsigned_condition \ 6 | gcc.rtlanal.insn_dependent_p_1 \ 7 | gcc.rtlanal.parms_set \ 8 | gcc.xexit.xexit \ 9 | gobmk.board.get_last_player \ 10 | gobmk.interface.init_gnugo \ 11 | gobmk.owl_attackpat.autohelperowl_attackpat68 \ 12 | gobmk.owl_defendpat.autohelperowl_defendpat421 \ 13 | gobmk.owl_vital_apat.autohelperowl_vital_apat34 \ 14 | gobmk.patterns.autohelperpat1088 \ 15 | gobmk.patterns.autohelperpat301 \ 16 | h264ref.memalloc.no_mem_exit \ 17 | h264ref.sei.UpdateRandomAccess \ 18 | h264ref.vlc.symbol2uvlc \ 19 | hmmer.tophits.AllocFancyAli \ 20 | mesa.api.glIndexd \ 21 | mesa.api.glVertex2i \ 22 | sphinx3.glist.glist_tail \ 23 | sphinx3.profile.ptmr_init 24 | -------------------------------------------------------------------------------- /src/solvers/gecode/third-party/jsoncpp/json/autolink.h: -------------------------------------------------------------------------------- 1 | // Copyright 2007-2010 Baptiste Lepilleur and The JsonCpp Authors 2 | // Distributed under MIT license, or public domain if desired and 3 | // recognized in your jurisdiction. 4 | // See file LICENSE for detail or copy at http://jsoncpp.sourceforge.net/LICENSE 5 | 6 | #ifndef JSON_AUTOLINK_H_INCLUDED 7 | #define JSON_AUTOLINK_H_INCLUDED 8 | 9 | #include "config.h" 10 | 11 | #ifdef JSON_IN_CPPTL 12 | #include 13 | #endif 14 | 15 | #if !defined(JSON_NO_AUTOLINK) && !defined(JSON_DLL_BUILD) && \ 16 | !defined(JSON_IN_CPPTL) 17 | #define CPPTL_AUTOLINK_NAME "json" 18 | #undef CPPTL_AUTOLINK_DLL 19 | #ifdef JSON_DLL 20 | #define CPPTL_AUTOLINK_DLL 21 | #endif 22 | #include "autolink.h" 23 | #endif 24 | 25 | #endif // JSON_AUTOLINK_H_INCLUDED 26 | -------------------------------------------------------------------------------- /src/solvers/multi_backend/sicstus/sicstus-solver: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | # assuming current directory is ../../.. i.e. .../src 3 | timeout=0 4 | obj='speed' 5 | while [ $# -gt 1 ]; do 6 | opt="$1" 7 | shift 8 | case "${opt}" in 9 | -o) 10 | OUTJSON=$1 11 | shift 12 | ;; 13 | --speed) 14 | obj='speed' 15 | ;; 16 | --size) 17 | obj='size' 18 | ;; 19 | -t) 20 | timeout=`expr $1 / 1000` 21 | shift 22 | ;; 23 | esac 24 | done 25 | if [ $timeout -gt 0 ]; then 26 | ulimit -t $timeout 27 | fi 28 | BASENAME=$(basename $1 .ext.json) 29 | echo "json2pl('$BASENAME.ext.json',$obj)." | sicstus -f --nologo --noinfo -l solvers/multi_backend/sicstus/model2pl.pl 30 | echo top_down. | sicstus -f --nologo --noinfo -l $BASENAME.pl | solvers/multi_backend/common/outfilter.pl ${OUTJSON}.last > ${OUTJSON} 31 | -------------------------------------------------------------------------------- /src/solvers/gecode/third-party/jsoncpp/json/version.h: -------------------------------------------------------------------------------- 1 | // DO NOT EDIT. This file (and "version") is generated by CMake. 2 | // Run CMake configure step to update it. 3 | #ifndef JSON_VERSION_H_INCLUDED 4 | # define JSON_VERSION_H_INCLUDED 5 | 6 | # define JSONCPP_VERSION_STRING "1.8.3" 7 | # define JSONCPP_VERSION_MAJOR 1 8 | # define JSONCPP_VERSION_MINOR 8 9 | # define JSONCPP_VERSION_PATCH 3 10 | # define JSONCPP_VERSION_QUALIFIER 11 | # define JSONCPP_VERSION_HEXA ((JSONCPP_VERSION_MAJOR << 24) | (JSONCPP_VERSION_MINOR << 16) | (JSONCPP_VERSION_PATCH << 8)) 12 | 13 | #ifdef JSONCPP_USING_SECURE_MEMORY 14 | #undef JSONCPP_USING_SECURE_MEMORY 15 | #endif 16 | #define JSONCPP_USING_SECURE_MEMORY 0 17 | // If non-zero, the library zeroes any memory that it has allocated before 18 | // it frees its memory. 19 | 20 | #endif // JSON_VERSION_H_INCLUDED 21 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Augment/CleanAttributes.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Augment.CleanAttributes (cleanAttributes) where 13 | 14 | import qualified Data.Set as S 15 | 16 | import Unison 17 | 18 | cleanAttributes f @ Function {fCode = code} _target = 19 | let insts = S.fromList $ concatMap oInstructions (flatten code) 20 | f' = mapToOperation (cleanActivators insts) f 21 | in f' 22 | 23 | cleanActivators insts = mapToActivators (intersectionWithList insts) 24 | 25 | intersectionWithList set = S.toList . S.intersection set . S.fromList 26 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/size/mesa.api.glIndexd.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "mesa.api.glIndexd.ll" 3 | .globl glIndexd 4 | .align 16 5 | .type glIndexd,@function 6 | glIndexd: // @glIndexd 7 | // BB#0: 8 | { 9 | memd(r29 + #-16) = r17:16 10 | allocframe(#8) 11 | } 12 | { 13 | r16 = memw(##CC) 14 | } 15 | { 16 | call __hexagon_truncdfsf2 17 | r17 = memw(r16 + #380) 18 | } 19 | { 20 | r1:0 = combine(r0, r16) 21 | callr r17 22 | r17:16 = memd(r29 + #0) 23 | } 24 | { 25 | dealloc_return 26 | } 27 | .Lfunc_end0: 28 | .size glIndexd, .Lfunc_end0-glIndexd 29 | 30 | 31 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 32 | .section ".note.GNU-stack","",@progbits 33 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/speed/mesa.api.glIndexd.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "mesa.api.glIndexd.ll" 3 | .globl glIndexd 4 | .align 16 5 | .type glIndexd,@function 6 | glIndexd: // @glIndexd 7 | // BB#0: 8 | { 9 | memd(r29 + #-16) = r17:16 10 | allocframe(#8) 11 | } 12 | { 13 | r16 = memw(##CC) 14 | } 15 | { 16 | call __hexagon_truncdfsf2 17 | r17 = memw(r16 + #380) 18 | } 19 | { 20 | r0 = r16 21 | callr r17 22 | r1 = r0 23 | r17:16 = memd(r29 + #0) 24 | } 25 | { 26 | dealloc_return 27 | } 28 | .Lfunc_end0: 29 | .size glIndexd, .Lfunc_end0-glIndexd 30 | 31 | 32 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 33 | .section ".note.GNU-stack","",@progbits 34 | -------------------------------------------------------------------------------- /src/unison-specsgen/src/SpecsGen/AllInstructionsGen.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module SpecsGen.AllInstructionsGen (emitAllInstructions) where 13 | 14 | import SpecsGen.SimpleYaml 15 | import SpecsGen.HsGen 16 | 17 | emitAllInstructions targetName is = 18 | let ids = map (toOpType . oId) is 19 | in [hsModule 20 | (moduleName targetName "AllInstructions") 21 | (Just [hsExportVar "allInstructions"]) 22 | [instructionDeclImport targetName] 23 | [constantFun "allInstructions" (toInstructionsList ids)]] 24 | 25 | toInstructionsList = toHsList . map toHsCon 26 | -------------------------------------------------------------------------------- /doc/code/factorial.asm.mir: -------------------------------------------------------------------------------- 1 | --- | 2 | ; ModuleID = (...) 3 | ... 4 | --- 5 | name: factorial 6 | body: | 7 | bb.0 (freq 12): 8 | successors: %bb.2(1), %bb.1(1) 9 | 10 | BUNDLE { 11 | %r1 = A2_tfr %r0 12 | %r0 = A2_tfrsi 1 13 | } 14 | BUNDLE { 15 | %p0 = C2_cmpgti %r1, 0 16 | J2_jumpfnew %p0, %bb.1, implicit %pc, implicit-def %pc 17 | } 18 | 19 | bb.1 (freq 255): 20 | successors: %bb.1(1), %bb.2(1) 21 | 22 | BUNDLE { 23 | %r2 = A2_addi %r1, -1 24 | %r0 = M2_mpyi %r1, %r0 25 | %p0 = C2_cmpgti %r1, 1 26 | } 27 | BUNDLE { 28 | %r1 = A2_tfr %r2 29 | J2_jumpt %p0, %bb.1, implicit %pc, implicit-def %pc 30 | } 31 | J2_jump %bb.2, implicit-def %pc 32 | 33 | bb.2 (freq 12): 34 | 35 | JMPret %r31, implicit %pc, implicit-def %pc 36 | 37 | ... 38 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Analyze/InsertFuns.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Analyze.InsertFuns (insertFuns) where 13 | 14 | import Unison 15 | 16 | insertFuns f @ Function {fCode = code} _target = 17 | let code' = map insertFunsInBlock code 18 | in f {fCode = code'} 19 | 20 | insertFunsInBlock b @ Block {bCode = code} = 21 | let code' = insertFun code 22 | in b {bCode = code'} 23 | 24 | insertFun (o:os) 25 | | any (\o -> isCall o || isTailCall o) (linearizeOpr o) = o:fun:insertFun os 26 | | otherwise = o:insertFun os 27 | insertFun [] = [] 28 | 29 | fun = mkFun (-1) [] [] 30 | -------------------------------------------------------------------------------- /src/unison-specsgen/src/SpecsGen/ItineraryGen.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module SpecsGen.ItineraryGen (emitItinerary) where 13 | 14 | import SpecsGen.SimpleYaml 15 | import SpecsGen.HsGen 16 | 17 | emitItinerary targetName is = 18 | let us2ids = infoToIds iItinerary is 19 | rhss = map (mkOpcRhs idToHsCon toItineraryRhs) us2ids 20 | in [hsModule 21 | (moduleName targetName "Itinerary") 22 | (Just [hsExportVar "itinerary"]) 23 | [instructionDeclImport targetName, itineraryDeclImport targetName] 24 | [simpleOpcFunBind "itinerary" rhss]] 25 | 26 | toItineraryRhs = toHsCon 27 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Target/ARM/SpecsGen.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Target.ARM.SpecsGen (module X) where 13 | import Unison.Target.ARM.SpecsGen.ReadWriteInfo as X 14 | import Unison.Target.ARM.SpecsGen.OperandInfo as X 15 | import Unison.Target.ARM.SpecsGen.ReadOp as X 16 | import Unison.Target.ARM.SpecsGen.ShowInstance() 17 | import Unison.Target.ARM.SpecsGen.Itinerary as X 18 | import Unison.Target.ARM.SpecsGen.InstructionType as X 19 | import Unison.Target.ARM.SpecsGen.AlignedPairs as X 20 | import Unison.Target.ARM.SpecsGen.Size as X 21 | import Unison.Target.ARM.SpecsGen.Parent as X 22 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/size/h264ref.memalloc.no_mem_exit.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "h264ref.memalloc.no_mem_exit.ll" 3 | .globl no_mem_exit 4 | .align 16 5 | .type no_mem_exit,@function 6 | no_mem_exit: // @no_mem_exit 7 | // BB#0: 8 | { 9 | r2 = ##.str.20 10 | r3 = r0 11 | allocframe(#8) 12 | } 13 | { 14 | r1 = #300 15 | r0 = ##errortext 16 | memw(r29 + #0) = r3 17 | } 18 | { 19 | call snprintf 20 | } 21 | { 22 | r1:0 = combine(#100, ##errortext) 23 | deallocframe 24 | } 25 | { 26 | jump error 27 | } 28 | .Lfunc_end0: 29 | .size no_mem_exit, .Lfunc_end0-no_mem_exit 30 | 31 | .hidden .str.20 32 | 33 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 34 | .section ".note.GNU-stack","",@progbits 35 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/speed/h264ref.memalloc.no_mem_exit.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "h264ref.memalloc.no_mem_exit.ll" 3 | .globl no_mem_exit 4 | .align 16 5 | .type no_mem_exit,@function 6 | no_mem_exit: // @no_mem_exit 7 | // BB#0: 8 | { 9 | r2 = ##.str.20 10 | r3 = r0 11 | allocframe(#8) 12 | } 13 | { 14 | r1 = #300 15 | r0 = ##errortext 16 | memw(r29 + #0) = r3 17 | } 18 | { 19 | call snprintf 20 | } 21 | { 22 | r1 = #100 23 | r0 = ##errortext 24 | deallocframe 25 | } 26 | { 27 | jump error 28 | } 29 | .Lfunc_end0: 30 | .size no_mem_exit, .Lfunc_end0-no_mem_exit 31 | 32 | .hidden .str.20 33 | 34 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 35 | .section ".note.GNU-stack","",@progbits 36 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/size/gcc.xexit.xexit.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gcc.xexit.xexit.ll" 3 | .globl xexit 4 | .align 16 5 | .type xexit,@function 6 | xexit: // @xexit 7 | // BB#0: 8 | { 9 | r16 = r0 10 | memd(r29 + #-16) = r17:16 11 | allocframe(#8) 12 | } 13 | { 14 | r1 = memw(##_xexit_cleanup) 15 | if (cmp.eq(r1.new, #0)) jump:t .LBB0_2 16 | } 17 | { 18 | jump .LBB0_1 19 | } 20 | .LBB0_1: 21 | { 22 | callr r1 23 | } 24 | .LBB0_2: 25 | { 26 | call exit 27 | r0 = r16 28 | } 29 | { 30 | r17:16 = memd(r29 + #0) 31 | deallocframe 32 | } 33 | .Lfunc_end0: 34 | .size xexit, .Lfunc_end0-xexit 35 | 36 | 37 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 38 | .section ".note.GNU-stack","",@progbits 39 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/size/gobmk.board.get_last_player.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gobmk.board.get_last_player.ll" 3 | .globl get_last_player 4 | .align 16 5 | .type get_last_player,@function 6 | get_last_player: // @get_last_player 7 | // BB#0: 8 | { 9 | r0 = #0 10 | r1 = memw(##move_history_pointer) 11 | if (cmp.eq(r1.new, #0)) jump:nt .LBB0_2 12 | } 13 | { 14 | jump .LBB0_1 15 | } 16 | .LBB0_1: 17 | { 18 | r1 = add(##move_history_color, asl(r1, #2)) 19 | } 20 | { 21 | r0 = memw(r1 + #-4) 22 | } 23 | .LBB0_2: 24 | { 25 | jumpr r31 26 | } 27 | .Lfunc_end0: 28 | .size get_last_player, .Lfunc_end0-get_last_player 29 | 30 | 31 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 32 | .section ".note.GNU-stack","",@progbits 33 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/speed/gcc.xexit.xexit.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gcc.xexit.xexit.ll" 3 | .globl xexit 4 | .align 16 5 | .type xexit,@function 6 | xexit: // @xexit 7 | // BB#0: 8 | { 9 | r16 = r0 10 | memd(r29 + #-16) = r17:16 11 | allocframe(#8) 12 | } 13 | { 14 | r1 = memw(##_xexit_cleanup) 15 | if (cmp.eq(r1.new, #0)) jump:t .LBB0_2 16 | } 17 | { 18 | jump .LBB0_1 19 | } 20 | .LBB0_1: 21 | { 22 | callr r1 23 | } 24 | .LBB0_2: 25 | { 26 | call exit 27 | r0 = r16 28 | } 29 | { 30 | r17:16 = memd(r29 + #0) 31 | deallocframe 32 | } 33 | .Lfunc_end0: 34 | .size xexit, .Lfunc_end0-xexit 35 | 36 | 37 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 38 | .section ".note.GNU-stack","",@progbits 39 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/speed/gobmk.board.get_last_player.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gobmk.board.get_last_player.ll" 3 | .globl get_last_player 4 | .align 16 5 | .type get_last_player,@function 6 | get_last_player: // @get_last_player 7 | // BB#0: 8 | { 9 | r0 = #0 10 | r1 = memw(##move_history_pointer) 11 | if (cmp.eq(r1.new, #0)) jump:nt .LBB0_2 12 | } 13 | { 14 | jump .LBB0_1 15 | } 16 | .LBB0_1: 17 | { 18 | r1 = add(##move_history_color, asl(r1, #2)) 19 | } 20 | { 21 | r0 = memw(r1 + #-4) 22 | } 23 | .LBB0_2: 24 | { 25 | jumpr r31 26 | } 27 | .Lfunc_end0: 28 | .size get_last_player, .Lfunc_end0-get_last_player 29 | 30 | 31 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 32 | .section ".note.GNU-stack","",@progbits 33 | -------------------------------------------------------------------------------- /doc/code/factorial.uni: -------------------------------------------------------------------------------- 1 | function: factorial 2 | b0 (entry, freq: 4): 3 | o0: [t0:r0,t1:r31] <- (in) [] 4 | o1: [t2] <- A2_tfrsi [1] 5 | o2: [t3] <- C2_cmpgti [t0,0] 6 | o3: [] <- J2_jumpf [t3,b2] 7 | o4: [] <- (out) [] 8 | b1 (freq: 85): 9 | o5: [] <- (in) [] 10 | o6: [t4] <- (phi) [t2,b0,t7,b1] 11 | o7: [t5] <- (phi) [t0,b0,t6,b1] 12 | o8: [t6] <- A2_addi [t5,-1] 13 | o9: [t7] <- M2_mpyi [t5,t4] 14 | o10: [t8] <- C2_cmpgti [t5,1] 15 | o11: [] <- J2_jumpt [t8,b1] 16 | o12: [] <- (out) [] 17 | b2 (exit, return, freq: 4): 18 | o13: [] <- (in) [] 19 | o14: [t9] <- (phi) [t2,b0,t7,b1] 20 | o15: [] <- JMPret [t1] 21 | o16: [] <- (out) [t9:r0] 22 | adjacent: 23 | rematerializable: 24 | fixed-frame: 25 | frame: 26 | stack-pointer-offset: 0 27 | stack-arg-size: 0 28 | jump-table: 29 | goal: speed 30 | removed-freqs: 31 | source: 32 | ; ModuleID = (...) 33 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Transformations/RenameOperations.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Transformations.RenameOperations (renameOperations) where 13 | 14 | import qualified Data.Map as M 15 | import Control.Arrow 16 | 17 | import Common.Util 18 | import Unison.Base 19 | import Unison.Util 20 | 21 | renameOperations f @ Function {fCode = code, fRematerializable = rts} _target = 22 | let idMap = M.fromList (zip (map oId (flatten code)) [0..]) 23 | code' = mapToOperationInBlocks (mapToOperationId (applyMap idMap)) code 24 | rts' = map (second (map (applyMap idMap))) rts 25 | in f {fCode = code', fRematerializable = rts'} 26 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Target/ARM/OperandInfo.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Target.ARM.OperandInfo (operandInfo) where 13 | 14 | import Unison 15 | import Unison.Target.ARM.SpecsGen.ARMRegisterClassDecl 16 | import Unison.Target.ARM.SpecsGen.ARMInstructionDecl 17 | import qualified Unison.Target.ARM.SpecsGen as SpecsGen 18 | 19 | -- | Gives information about the operands of each instruction 20 | 21 | operandInfo i 22 | -- The generated operandInfo is wrong for these instructions 23 | | i `elem` [TTAILJMPd, TTAILJMPdND] = 24 | ([BoundInfo, BoundInfo, TemporaryInfo (RegisterClass CCR) 0 False], 25 | []) 26 | | otherwise = SpecsGen.operandInfo i 27 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Transformations/CleanPragmas.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Transformations.CleanPragmas (cleanPragmas) 13 | where 14 | 15 | import Data.Maybe 16 | 17 | import Unison.Base 18 | import Unison.Util 19 | 20 | cleanPragmas ts f @ Function {fComments = comments} _ = 21 | let comments' = foldl removePragma comments ts 22 | in f {fComments = comments'} 23 | 24 | removePragma comments t = mapMaybe (removePragmaInComment t) comments 25 | 26 | removePragmaInComment tool comment = 27 | case splitPragmaComment comment of 28 | hdr : _ -> if hdr == (pragmaHeader tool) then Nothing else Just comment 29 | _ -> Just comment 30 | -------------------------------------------------------------------------------- /doc/code/factorial.lssa.uni: -------------------------------------------------------------------------------- 1 | function: factorial 2 | b0 (entry, freq: 4): 3 | o0: [t0:r0,t1:r31] <- (in) [] 4 | o1: [t2] <- A2_tfrsi [1] 5 | o2: [t3] <- C2_cmpgti [t0,0] 6 | o3: [] <- J2_jumpf [t3,b2] 7 | o4: [] <- (out) [t0,t1,t2] 8 | b1 (freq: 85): 9 | o5: [t4,t5,t6] <- (in) [] 10 | o6: [t7] <- A2_addi [t5,-1] 11 | o7: [t8] <- M2_mpyi [t5,t4] 12 | o8: [t9] <- C2_cmpgti [t5,1] 13 | o9: [] <- J2_jumpt [t9,b1] 14 | o10: [] <- (out) [t6,t7,t8] 15 | b2 (exit, return, freq: 4): 16 | o11: [t10,t11] <- (in) [] 17 | o12: [] <- JMPret [t11] 18 | o13: [] <- (out) [t10:r0] 19 | adjacent: 20 | t0 -> t5, t1 -> t6, t1 -> t11, t2 -> t4, t2 -> t10, t6 -> t6, t6 -> t11, 21 | t7 -> t5, t8 -> t4, t8 -> t10 22 | rematerializable: 23 | fixed-frame: 24 | frame: 25 | stack-pointer-offset: 0 26 | stack-arg-size: 0 27 | jump-table: 28 | goal: speed 29 | removed-freqs: 30 | source: 31 | ; ModuleID = (...) 32 | -------------------------------------------------------------------------------- /src/solvers/multi_backend/minizinc/symmetry-finder: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | # assuming current directory is ../../.. i.e. .../src 3 | mzn='mzn-gecode' 4 | gc='true' 5 | ncores='1' 6 | BASENAME=$(basename $1 .ext.json) 7 | EXTJSON=$1 8 | shift 9 | while [ $# -gt 0 ]; do 10 | opt="$1" 11 | shift 12 | case "${opt}" in 13 | --gecode) 14 | mzn='mzn-gecode' 15 | gc='true' 16 | ;; 17 | --sicstus) 18 | mzn='mzn-sicstus' 19 | gc='true' 20 | ;; 21 | --cpx) 22 | mzn='mzn-g12cpx' 23 | gc='false' 24 | ;; 25 | -p) 26 | ncores=$1 27 | shift 28 | ;; 29 | esac 30 | done 31 | echo "json2dzn('${EXTJSON}')." | sicstus -f --nologo --noinfo -l solvers/multi_backend/minizinc/solution2dzn.pl 32 | cp solvers/multi_backend/minizinc/symmetry-finder.mzn . 33 | time ${mzn} -s -k -a -p ${ncores} --no-optimize -D good_cumulative=${gc} symmetry-finder.mzn $BASENAME.dzn 34 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Target/Hexagon/SpecsGen.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Target.Hexagon.SpecsGen (module X) where 13 | import Unison.Target.Hexagon.SpecsGen.ReadWriteInfo as X 14 | import Unison.Target.Hexagon.SpecsGen.OperandInfo as X 15 | import Unison.Target.Hexagon.SpecsGen.ReadOp as X 16 | import Unison.Target.Hexagon.SpecsGen.ShowInstance() 17 | import Unison.Target.Hexagon.SpecsGen.Itinerary as X 18 | import Unison.Target.Hexagon.SpecsGen.InstructionType as X 19 | import Unison.Target.Hexagon.SpecsGen.AlignedPairs as X 20 | import Unison.Target.Hexagon.SpecsGen.Parent as X 21 | import Unison.Target.Hexagon.SpecsGen.AllInstructions as X 22 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Extend/SortCopies.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Extend.SortCopies (sortCopies) where 13 | 14 | import Data.Ord 15 | import Data.List 16 | import Data.List.Split 17 | 18 | import Unison 19 | 20 | sortCopies f @ Function {fCode = code} _target = 21 | let sortedCode = map sortCopiesInBB code 22 | in f {fCode = sortedCode} 23 | 24 | sortCopiesInBB b @ Block {bCode = code} = 25 | let sCode = split (dropBlanks $ whenElt (not . isCopy)) code 26 | code' = concatMap sortCopyList sCode 27 | in b {bCode = code'} 28 | 29 | sortCopyList is 30 | | any (not . isCopy) is = is 31 | | otherwise = sortBy (comparing copySource) is 32 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/size/h264ref.vlc.symbol2uvlc.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "h264ref.vlc.symbol2uvlc.ll" 3 | .globl symbol2uvlc 4 | .align 16 5 | .type symbol2uvlc,@function 6 | symbol2uvlc: // @symbol2uvlc 7 | // BB#0: 8 | { 9 | r1:0 = combine(r0, #-1) 10 | r2 = #1 11 | } 12 | { 13 | r3 = memw(r1 + #12) 14 | } 15 | { 16 | r3 += lsr(r3, #31) 17 | } 18 | { 19 | r3 = asr(r3, #1) 20 | r4 = memw(r1 + #16) 21 | } 22 | { 23 | r0 += asl(r2, r3) 24 | } 25 | { 26 | r2 = and(r0, r4) 27 | r0 = #0 28 | } 29 | { 30 | r2 = setbit(r2, r3) 31 | jumpr r31 32 | memw(r1+#20) = r2.new 33 | } 34 | .Lfunc_end0: 35 | .size symbol2uvlc, .Lfunc_end0-symbol2uvlc 36 | 37 | 38 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 39 | .section ".note.GNU-stack","",@progbits 40 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/speed/h264ref.vlc.symbol2uvlc.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "h264ref.vlc.symbol2uvlc.ll" 3 | .globl symbol2uvlc 4 | .align 16 5 | .type symbol2uvlc,@function 6 | symbol2uvlc: // @symbol2uvlc 7 | // BB#0: 8 | { 9 | r0 = #-1 10 | r2 = #1 11 | r1 = r0 12 | } 13 | { 14 | r3 = memw(r1 + #12) 15 | } 16 | { 17 | r3 += lsr(r3, #31) 18 | } 19 | { 20 | r3 = asr(r3, #1) 21 | r4 = memw(r1 + #16) 22 | } 23 | { 24 | r0 += asl(r2, r3) 25 | } 26 | { 27 | r2 = and(r0, r4) 28 | r0 = #0 29 | } 30 | { 31 | r2 = setbit(r2, r3) 32 | jumpr r31 33 | memw(r1+#20) = r2.new 34 | } 35 | .Lfunc_end0: 36 | .size symbol2uvlc, .Lfunc_end0-symbol2uvlc 37 | 38 | 39 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 40 | .section ".note.GNU-stack","",@progbits 41 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Import/LiftMemoryPartitions.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Import.LiftMemoryPartitions (liftMemoryPartitions) where 13 | 14 | import Data.List 15 | import MachineIR 16 | 17 | liftMemoryPartitions mf _target = mapToMachineInstruction liftMemoryPartition mf 18 | 19 | liftMemoryPartition mi @ MachineSingle {msOperands = mops, msProperties = mps} = 20 | case find isMachineMemPartition mops of 21 | (Just MachineMemPartition {mmpId = id}) -> 22 | let mops' = filter (not . isMachineMemPartition) mops 23 | mps' = mps ++ [mkMachineInstructionPropertyMem id] 24 | in mi {msOperands = mops', msProperties = mps'} 25 | Nothing -> mi -------------------------------------------------------------------------------- /src/unison-specsgen/src/SpecsGen/ParentGen.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module SpecsGen.ParentGen (emitParent) where 13 | 14 | import Language.Haskell.Syntax 15 | 16 | import SpecsGen.SimpleYaml 17 | import SpecsGen.HsGen 18 | 19 | emitParent targetName is = 20 | let us2ids = infoToIds iParent is 21 | rhss = map (mkOpcRhs idToHsCon toParentRhs) us2ids 22 | in [hsModule 23 | (moduleName targetName "Parent") 24 | (Just [hsExportVar "parent"]) 25 | [instructionDeclImport targetName] 26 | [simpleOpcFunBind "parent" rhss]] 27 | 28 | toParentRhs Nothing = toHsCon "Nothing" 29 | toParentRhs (Just p) = (HsApp (toHsCon "Just") (toHsCon $ toOpType p)) 30 | -------------------------------------------------------------------------------- /src/unison/src/MachineIR/Transformations/LiftCustomProperties.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module MachineIR.Transformations.LiftCustomProperties (liftCustomProperties) where 13 | 14 | import Data.List 15 | import MachineIR 16 | 17 | liftCustomProperties mf _target = mapToMachineInstruction liftCustomProperty mf 18 | 19 | liftCustomProperty mi @ MachineSingle {msOperands = mops, msProperties = mps} = 20 | case find isMachineProperty mops of 21 | (Just MachineProperty {mpProperty = p}) -> 22 | let mops' = filter (not . isMachineProperty) mops 23 | mps' = mps ++ [mkMachineInstructionPropertyCustom p] 24 | in mi {msOperands = mops', msProperties = mps'} 25 | Nothing -> mi -------------------------------------------------------------------------------- /src/unison/src/Unison/Target/Mips/SpecsGen.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Target.Mips.SpecsGen (module X) where 13 | import Unison.Target.Mips.SpecsGen.ReadWriteInfo as X 14 | import Unison.Target.Mips.SpecsGen.OperandInfo as X 15 | import Unison.Target.Mips.SpecsGen.ReadOp as X 16 | import Unison.Target.Mips.SpecsGen.ShowInstance() 17 | import Unison.Target.Mips.SpecsGen.AllInstructions as X 18 | import Unison.Target.Mips.SpecsGen.Itinerary as X 19 | import Unison.Target.Mips.SpecsGen.InstructionType as X 20 | import Unison.Target.Mips.SpecsGen.AlignedPairs as X 21 | import Unison.Target.Mips.SpecsGen.Parent as X 22 | import Unison.Target.Mips.SpecsGen.Size as X 23 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Import/RemoveUnreachableBlocks.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Import.RemoveUnreachableBlocks 13 | (removeUnreachableBlocks) where 14 | 15 | import Data.Graph.Inductive 16 | import qualified Data.Set as S 17 | 18 | import Unison 19 | import Unison.Target.API 20 | import qualified Unison.Graphs.BCFG as BCFG 21 | 22 | removeUnreachableBlocks f @ Function {fCode = code} target = 23 | let bif = branchInfo target 24 | bcfg = BCFG.fromFunction bif f 25 | rbids = S.fromList $ reachable (bNode (entryBlock code)) bcfg 26 | code' = filter (\b -> S.member (bNode b) rbids) code 27 | in f {fCode = code'} 28 | 29 | bNode = BCFG.toNode . bLab 30 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Transformations/PostponeBranches.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | {-# LANGUAGE FlexibleContexts #-} 13 | module Unison.Transformations.PostponeBranches (postponeBranches) where 14 | 15 | import Unison.Base 16 | import Unison.Util 17 | import Unison.Predicates 18 | 19 | postponeBranches f @ Function {fCode = code} _target = 20 | let code' = map postponeBranchesInBlock code 21 | in f {fCode = code'} 22 | 23 | postponeBranchesInBlock b @ Block {bCode = code} = 24 | let isTerm = isTerminator code 25 | b1 = moveOperations isTerm before isOut b 26 | b2 = if any (isTailCallFun code) code 27 | then moveOperations isTailCall before isTerm b1 28 | else b1 29 | in b2 30 | -------------------------------------------------------------------------------- /src/solvers/gecode/third-party/jsoncpp/json/forwards.h: -------------------------------------------------------------------------------- 1 | // Copyright 2007-2010 Baptiste Lepilleur and The JsonCpp Authors 2 | // Distributed under MIT license, or public domain if desired and 3 | // recognized in your jurisdiction. 4 | // See file LICENSE for detail or copy at http://jsoncpp.sourceforge.net/LICENSE 5 | 6 | #ifndef JSON_FORWARDS_H_INCLUDED 7 | #define JSON_FORWARDS_H_INCLUDED 8 | 9 | #if !defined(JSON_IS_AMALGAMATION) 10 | #include "config.h" 11 | #endif // if !defined(JSON_IS_AMALGAMATION) 12 | 13 | namespace Json { 14 | 15 | // writer.h 16 | class FastWriter; 17 | class StyledWriter; 18 | 19 | // reader.h 20 | class Reader; 21 | 22 | // features.h 23 | class Features; 24 | 25 | // value.h 26 | typedef unsigned int ArrayIndex; 27 | class StaticString; 28 | class Path; 29 | class PathArgument; 30 | class Value; 31 | class ValueIteratorBase; 32 | class ValueIterator; 33 | class ValueConstIterator; 34 | 35 | } // namespace Json 36 | 37 | #endif // JSON_FORWARDS_H_INCLUDED 38 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Target/Minimal/SpecsGen.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2020, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Target.Minimal.SpecsGen (module X) where 13 | import Unison.Target.Minimal.SpecsGen.ReadWriteInfo as X 14 | import Unison.Target.Minimal.SpecsGen.OperandInfo as X 15 | import Unison.Target.Minimal.SpecsGen.ReadOp as X 16 | import Unison.Target.Minimal.SpecsGen.ShowInstance() 17 | import Unison.Target.Minimal.SpecsGen.AllInstructions as X 18 | import Unison.Target.Minimal.SpecsGen.Itinerary as X 19 | import Unison.Target.Minimal.SpecsGen.InstructionType as X 20 | import Unison.Target.Minimal.SpecsGen.AlignedPairs as X 21 | import Unison.Target.Minimal.SpecsGen.Parent as X 22 | import Unison.Target.Minimal.SpecsGen.Size as X 23 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/size/h264ref.sei.UpdateRandomAccess.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "h264ref.sei.UpdateRandomAccess.ll" 3 | .globl UpdateRandomAccess 4 | .align 16 5 | .type UpdateRandomAccess,@function 6 | UpdateRandomAccess: // @UpdateRandomAccess 7 | // BB#0: 8 | { 9 | r1 = #0 10 | r0 = memw(##img) 11 | } 12 | { 13 | r0 = memw(r0 + #24) 14 | } 15 | { 16 | p0 = cmp.eq(r0, #2) 17 | if (p0.new) r0 = #1 18 | r2 = #256 19 | if (!p0.new) r0 = r1 20 | } 21 | { 22 | if (p0) memh(##seiRandomAccess) = r2 23 | if (p0) memb(##seiRandomAccess+2) = r1 24 | } 25 | { 26 | jumpr r31 27 | memb(##seiHasRandomAccess_info) = r0 28 | } 29 | .Lfunc_end0: 30 | .size UpdateRandomAccess, .Lfunc_end0-UpdateRandomAccess 31 | 32 | 33 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 34 | .section ".note.GNU-stack","",@progbits 35 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/speed/h264ref.sei.UpdateRandomAccess.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "h264ref.sei.UpdateRandomAccess.ll" 3 | .globl UpdateRandomAccess 4 | .align 16 5 | .type UpdateRandomAccess,@function 6 | UpdateRandomAccess: // @UpdateRandomAccess 7 | // BB#0: 8 | { 9 | r1 = #0 10 | r0 = memw(##img) 11 | } 12 | { 13 | r0 = memw(r0 + #24) 14 | } 15 | { 16 | p0 = cmp.eq(r0, #2) 17 | if (p0.new) r0 = #1 18 | r2 = #256 19 | if (!p0.new) r0 = r1 20 | } 21 | { 22 | if (p0) memh(##seiRandomAccess) = r2 23 | if (p0) memb(##seiRandomAccess+2) = r1 24 | } 25 | { 26 | jumpr r31 27 | memb(##seiHasRandomAccess_info) = r0 28 | } 29 | .Lfunc_end0: 30 | .size UpdateRandomAccess, .Lfunc_end0-UpdateRandomAccess 31 | 32 | 33 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 34 | .section ".note.GNU-stack","",@progbits 35 | -------------------------------------------------------------------------------- /src/unison-specsgen/src/SpecsGen/InstructionTypeGen.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module SpecsGen.InstructionTypeGen (emitInstructionType) where 13 | 14 | import SpecsGen.SimpleYaml 15 | import SpecsGen.HsGen 16 | 17 | emitInstructionType targetName is = 18 | let us2ids = infoToIds iType is 19 | rhss = map (mkOpcRhs idToHsCon toInstructionTypeRhs) us2ids 20 | in [hsModule 21 | (moduleName targetName "InstructionType") 22 | (Just [hsExportVar "instructionType"]) 23 | [unisonImport, instructionDeclImport targetName] 24 | [simpleOpcFunBind "instructionType" rhss]] 25 | 26 | toInstructionTypeRhs = toHsCon . toInstructionType 27 | 28 | toInstructionType t = toOpType t ++ "InstructionType" 29 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Analysis/CopyRelated.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | 6 | Algorithms to compute classes of copy-related operands. 7 | 8 | -} 9 | {- 10 | Main authors: 11 | Roberto Castaneda Lozano 12 | 13 | This file is part of Unison, see http://unison-code.github.io 14 | -} 15 | module Unison.Analysis.CopyRelated (copyRelatedOperands) where 16 | 17 | import Data.List 18 | import Data.Graph.Inductive 19 | 20 | import Unison.Base 21 | import Unison.Constructors 22 | import Unison.Predicates 23 | import qualified Unison.Graphs.OG as OG 24 | import qualified Unison.Graphs.Partition as P 25 | 26 | copyRelatedOperands :: Ord r => Block i r -> [[Operand r]] 27 | copyRelatedOperands b = 28 | let og = OG.fromBlock b [] 29 | og' = elfilter (not . isOperandNaturalEdge) og 30 | cr = P.fromGraph og' 31 | in map (sort . map (mkOperandRef . toInteger)) (P.toList cr) 32 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Augment/AddPrologueEpilogue.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Augment.AddPrologueEpilogue (addPrologueEpilogue) where 13 | 14 | import Unison 15 | import Unison.Target.API 16 | 17 | addPrologueEpilogue f @ Function {fCode = code} target = 18 | let apf = addPrologue target 19 | aef = addEpilogue target 20 | ids = newIndexes $ flatten code 21 | code' = mapToEntryBlock (apf ids) code 22 | outBs = returnBlockIds code' 23 | code'' = foldl (addEpilogueInBlock aef) code' outBs 24 | in f {fCode = code''} 25 | 26 | addEpilogueInBlock aef code l = 27 | let ids = newIndexes $ flatten code 28 | code' = mapToBlock (aef ids) l code 29 | in code' 30 | -------------------------------------------------------------------------------- /src/unison/src/MachineIR/Transformations/SimplifyFallthroughs.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module MachineIR.Transformations.SimplifyFallthroughs 13 | (simplifyFallthroughs) where 14 | 15 | import Common.Util 16 | import MachineIR.Transformations.RemoveEmptyBlocks 17 | import MachineIR.Transformations.DropExplicitFallthroughs 18 | import MachineIR.Transformations.MergeBlocks 19 | 20 | simplifyFallthroughs onlySplits mf target = 21 | fixpoint (simplifyFallthroughsFor onlySplits target) mf 22 | 23 | simplifyFallthroughsFor onlySplits target mf = 24 | let mf1 = removeEmptyBlocks onlySplits mf target 25 | mf2 = if onlySplits then mf1 else dropExplicitFallthroughs mf1 target 26 | mf3 = mergeBlocks onlySplits mf2 target 27 | in mf3 28 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Export/LowerFrameSize.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Export.LowerFrameSize (lowerFrameSize) where 13 | 14 | import qualified Data.Map as M 15 | 16 | import MachineIR 17 | import Unison 18 | import Unison.Analysis.FrameOffsets 19 | 20 | -- This pass replaces stack size markers by the actual size of the stack. 21 | 22 | lowerFrameSize f @ Function {fCode = code, fFixedStackFrame = fobjs, 23 | fStackFrame = objs} _ = 24 | let size = frameSize (fobjs ++ objs) 25 | mfsToImm = M.fromList 26 | [(mkBound mkMachineFrameSize, mkBound (mkMachineImm size))] 27 | code' = mapToOperationInBlocks (applyMapToOperands mfsToImm) code 28 | in f {fCode = code'} 29 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Linearize/NormalizeCongruences.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Linearize.NormalizeCongruences (normalizeCongruences) where 13 | 14 | import Data.List 15 | import qualified Data.Set as S 16 | 17 | import Unison 18 | import Unison.Target.API 19 | import qualified Unison.Graphs.BCFG as BCFG 20 | import qualified Unison.Graphs.SG as SG 21 | 22 | normalizeCongruences f @ Function {fCongruences = cs} target = 23 | let bif = branchInfo target 24 | bcfg = BCFG.fromFunction bif f 25 | sg = SG.fromCongruences cs 26 | p = map S.fromList $ SG.sameTempPartitions sg 27 | cs' = BCFG.eqvNeighborTemps bcfg p 28 | cs'' = sort cs' 29 | in f {fCongruences = cs''} 30 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Transformations/ReorderInstructions.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2018, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Transformations.ReorderInstructions (reorderInstructions) where 13 | 14 | import Data.List 15 | import Data.Ord 16 | 17 | import Unison.Base 18 | import Unison.Util 19 | import Unison.Target.Query 20 | 21 | -- This pass is needed since 'minizinc-solver' assumes that the indices of the 22 | -- instructions in an operation are increasing. 23 | 24 | reorderInstructions f @ Function {fCode = code} _target = 25 | let im = instructionManager $ flatten code 26 | code' = mapToOperationInBlocks (mapToInstructions (reoderIns im)) code 27 | in f {fCode = code'} 28 | 29 | reoderIns im is = sortBy (comparing (ioId . toIndexedInstruction im)) is 30 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Graphs/DT.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | 6 | Dominance Tree. 7 | 8 | -} 9 | {- 10 | Main authors: 11 | Roberto Castaneda Lozano 12 | 13 | This file is part of Unison, see http://unison-code.github.io 14 | -} 15 | module Unison.Graphs.DT (fromCFG, dominators) where 16 | 17 | import Data.Graph.Inductive 18 | 19 | fromCFG :: Gr a b -> Gr a b 20 | fromCFG cfg = 21 | let nodes = labNodes cfg 22 | edges = if noNodes cfg > 0 23 | then [(p, c, edge cfg p c) | (c, p) <- iDom cfg 0] 24 | else [] 25 | in mkGraph nodes edges 26 | 27 | label g n = 28 | let Just l = lab g n 29 | in l 30 | 31 | dominators dt n = 32 | let ds = reaching n dt 33 | in map (label dt) ds 34 | 35 | reaching n = reachable n . grev 36 | 37 | edge g n1 n2 = 38 | let [l] = [l | (n1', n2', l) <- labEdges g, (n1, n2) == (n1', n2')] 39 | in l 40 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/size/gobmk.owl_defendpat.autohelperowl_defendpat421.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gobmk.owl_defendpat.autohelperowl_defendpat421.ll" 3 | .hidden autohelperowl_defendpat421 4 | .globl autohelperowl_defendpat421 5 | .align 16 6 | .type autohelperowl_defendpat421,@function 7 | autohelperowl_defendpat421: // @autohelperowl_defendpat421 8 | // BB#0: 9 | { 10 | r1 = sub(#3, r2) 11 | r3 = r1 12 | allocframe(#0) 13 | } 14 | { 15 | r0 = add(##transformation, asl(r0, #2)) 16 | } 17 | { 18 | r0 = memw(r0 + ##18336) 19 | } 20 | { 21 | call safe_move 22 | r0 = add(r0, r3) 23 | } 24 | { 25 | r0 = cmp.eq(r0, #0) 26 | dealloc_return 27 | } 28 | .Lfunc_end0: 29 | .size autohelperowl_defendpat421, .Lfunc_end0-autohelperowl_defendpat421 30 | 31 | 32 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 33 | .section ".note.GNU-stack","",@progbits 34 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/speed/gobmk.owl_defendpat.autohelperowl_defendpat421.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gobmk.owl_defendpat.autohelperowl_defendpat421.ll" 3 | .hidden autohelperowl_defendpat421 4 | .globl autohelperowl_defendpat421 5 | .align 16 6 | .type autohelperowl_defendpat421,@function 7 | autohelperowl_defendpat421: // @autohelperowl_defendpat421 8 | // BB#0: 9 | { 10 | r1 = sub(#3, r2) 11 | r3 = r1 12 | allocframe(#0) 13 | } 14 | { 15 | r0 = add(##transformation, asl(r0, #2)) 16 | } 17 | { 18 | r0 = memw(r0 + ##18336) 19 | } 20 | { 21 | call safe_move 22 | r0 = add(r0, r3) 23 | } 24 | { 25 | r0 = cmp.eq(r0, #0) 26 | dealloc_return 27 | } 28 | .Lfunc_end0: 29 | .size autohelperowl_defendpat421, .Lfunc_end0-autohelperowl_defendpat421 30 | 31 | 32 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 33 | .section ".note.GNU-stack","",@progbits 34 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/size/sphinx3.glist.glist_tail.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "sphinx3.glist.glist_tail.ll" 3 | .globl glist_tail 4 | .align 16 5 | .type glist_tail,@function 6 | glist_tail: // @glist_tail 7 | // BB#0: 8 | { 9 | p0 = cmp.eq(r0, #0); if (p0.new) jump:nt .LBB0_3 10 | r1 = #0 11 | } 12 | // BB#1: 13 | .LBB0_2: // %.preheader 14 | // =>This Inner Loop Header: Depth=1 15 | { 16 | r1 = r0 17 | r0 = memw(r0 + #8) 18 | if (!cmp.eq(r0.new, #0)) jump:t .LBB0_2 19 | } 20 | { 21 | jump .LBB0_3 22 | } 23 | .LBB0_3: // %.loopexit 24 | { 25 | r0 = r1 26 | jumpr r31 27 | } 28 | .Lfunc_end0: 29 | .size glist_tail, .Lfunc_end0-glist_tail 30 | 31 | 32 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 33 | .section ".note.GNU-stack","",@progbits 34 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/speed/sphinx3.glist.glist_tail.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "sphinx3.glist.glist_tail.ll" 3 | .globl glist_tail 4 | .align 16 5 | .type glist_tail,@function 6 | glist_tail: // @glist_tail 7 | // BB#0: 8 | { 9 | p0 = cmp.eq(r0, #0); if (p0.new) jump:nt .LBB0_3 10 | r1 = #0 11 | } 12 | // BB#1: 13 | .LBB0_2: // %.preheader 14 | // =>This Inner Loop Header: Depth=1 15 | { 16 | r1 = r0 17 | r0 = memw(r0 + #8) 18 | if (!cmp.eq(r0.new, #0)) jump:t .LBB0_2 19 | } 20 | { 21 | jump .LBB0_3 22 | } 23 | .LBB0_3: // %.loopexit 24 | { 25 | r0 = r1 26 | jumpr r31 27 | } 28 | .Lfunc_end0: 29 | .size glist_tail, .Lfunc_end0-glist_tail 30 | 31 | 32 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 33 | .section ".note.GNU-stack","",@progbits 34 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Export/DirectFrame.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Export.DirectFrame (directFrame) where 13 | 14 | import Unison 15 | import Unison.Target.API 16 | 17 | -- This pass directs the frame (whether the stack grows up or down) as specified 18 | -- by the target. 19 | 20 | directFrame f @ Function {fFixedStackFrame = fobjs, fStackFrame = objs} target = 21 | case stackDirection target of 22 | StackGrowsDown -> 23 | let fobjs' = map revertDirection fobjs 24 | objs' = map revertDirection objs 25 | in f {fFixedStackFrame = fobjs', fStackFrame = objs'} 26 | StackGrowsUp -> f 27 | 28 | revertDirection fo @ FrameObject {foOffset = off} = 29 | let off' = - (off + foMaybeSize fo) 30 | in fo {foOffset = off'} 31 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/size/gcc.c-decl.pushdecl_top_level.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gcc.c-decl.pushdecl_top_level.ll" 3 | .globl pushdecl_top_level 4 | .align 16 5 | .type pushdecl_top_level,@function 6 | pushdecl_top_level: // @pushdecl_top_level 7 | // BB#0: 8 | { 9 | memd(r29 + #-16) = r17:16 10 | allocframe(#8) 11 | } 12 | { 13 | r1 = memw(##global_binding_level) 14 | r16 = memw(##current_binding_level) 15 | } 16 | { 17 | call pushdecl 18 | memw(##current_binding_level) = r1 19 | } 20 | { 21 | r17:16 = memd(r29 + #0) 22 | memw(##current_binding_level) = r16 23 | } 24 | { 25 | dealloc_return 26 | } 27 | .Lfunc_end0: 28 | .size pushdecl_top_level, .Lfunc_end0-pushdecl_top_level 29 | 30 | .hidden current_binding_level 31 | .hidden global_binding_level 32 | 33 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 34 | .section ".note.GNU-stack","",@progbits 35 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/speed/gcc.c-decl.pushdecl_top_level.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gcc.c-decl.pushdecl_top_level.ll" 3 | .globl pushdecl_top_level 4 | .align 16 5 | .type pushdecl_top_level,@function 6 | pushdecl_top_level: // @pushdecl_top_level 7 | // BB#0: 8 | { 9 | memd(r29 + #-16) = r17:16 10 | allocframe(#8) 11 | } 12 | { 13 | r1 = memw(##global_binding_level) 14 | r16 = memw(##current_binding_level) 15 | } 16 | { 17 | call pushdecl 18 | memw(##current_binding_level) = r1 19 | } 20 | { 21 | r17:16 = memd(r29 + #0) 22 | memw(##current_binding_level) = r16 23 | } 24 | { 25 | dealloc_return 26 | } 27 | .Lfunc_end0: 28 | .size pushdecl_top_level, .Lfunc_end0-pushdecl_top_level 29 | 30 | .hidden current_binding_level 31 | .hidden global_binding_level 32 | 33 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 34 | .section ".note.GNU-stack","",@progbits 35 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/size/hmmer.tophits.AllocFancyAli.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "hmmer.tophits.AllocFancyAli.ll" 3 | .globl AllocFancyAli 4 | .align 16 5 | .type AllocFancyAli,@function 6 | AllocFancyAli: // @AllocFancyAli 7 | // BB#0: 8 | { 9 | r1:0 = combine(#117, ##.str) 10 | r2 = #40 11 | allocframe(#0) 12 | } 13 | { 14 | call sre_malloc 15 | } 16 | { 17 | memw(r0 + #8)=#0 18 | memw(r0 + #4)=#0 19 | } 20 | { 21 | memw(r0 + #28)=#0 22 | memw(r0 + #32)=#0 23 | } 24 | { 25 | memw(r0 + #36)=#0 26 | memw(r0 + #0)=#0 27 | } 28 | { 29 | memw(r0 + #12)=#0 30 | memw(r0 + #16)=#0 31 | } 32 | { 33 | memw(r0+#24)=#0 34 | } 35 | { 36 | dealloc_return 37 | } 38 | .Lfunc_end0: 39 | .size AllocFancyAli, .Lfunc_end0-AllocFancyAli 40 | 41 | .hidden .str 42 | 43 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 44 | .section ".note.GNU-stack","",@progbits 45 | -------------------------------------------------------------------------------- /src/unison-specsgen/src/SpecsGen/RegisterClassDeclGen.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2019, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module SpecsGen.RegisterClassDeclGen (emitRegisterClassDecl) where 13 | 14 | import Data.Maybe 15 | import qualified Data.Map as M 16 | import Data.List 17 | 18 | import SpecsGen.SimpleYaml 19 | import SpecsGen.HsGen 20 | 21 | emitRegisterClassDecl targetName is = 22 | let ids = sort $ nub $ concatMap iRegClasses is 23 | in [hsModule 24 | (moduleName targetName (targetName ++ "RegisterClassDecl")) 25 | (Just [hsExportDataType (targetName ++ "RegisterClass")]) 26 | [] 27 | [hsRegClassDecl targetName ids]] 28 | 29 | iRegClasses i = mapMaybe regClass $ M.toList $ mkOperandMap $ iOperands i 30 | 31 | regClass (_, (YRegisterInfo _ rc _)) = Just rc 32 | regClass _ = Nothing 33 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/speed/hmmer.tophits.AllocFancyAli.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "hmmer.tophits.AllocFancyAli.ll" 3 | .globl AllocFancyAli 4 | .align 16 5 | .type AllocFancyAli,@function 6 | AllocFancyAli: // @AllocFancyAli 7 | // BB#0: 8 | { 9 | r2 = #40 10 | r0 = ##.str 11 | allocframe(#0) 12 | } 13 | { 14 | call sre_malloc 15 | r1 = #117 16 | } 17 | { 18 | memw(r0 + #8)=#0 19 | memw(r0 + #4)=#0 20 | } 21 | { 22 | memw(r0 + #28)=#0 23 | memw(r0 + #32)=#0 24 | } 25 | { 26 | memw(r0 + #36)=#0 27 | memw(r0 + #0)=#0 28 | } 29 | { 30 | memw(r0 + #12)=#0 31 | memw(r0 + #16)=#0 32 | } 33 | { 34 | memw(r0+#24)=#0 35 | } 36 | { 37 | dealloc_return 38 | } 39 | .Lfunc_end0: 40 | .size AllocFancyAli, .Lfunc_end0-AllocFancyAli 41 | 42 | .hidden .str 43 | 44 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 45 | .section ".note.GNU-stack","",@progbits 46 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Linearize/SinkLiveOuts.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Linearize.SinkLiveOuts (sinkLiveOuts) where 13 | 14 | import qualified Data.Map as M 15 | import qualified Data.Set as S 16 | 17 | import Unison 18 | import Unison.Target.API 19 | import Unison.Graphs.Hoopl 20 | import Unison.Graphs.Hoopl.Liveness 21 | 22 | sinkLiveOuts f @ Function {fCode = code} target = 23 | let bif = branchInfo target 24 | cfg = toHGraph bif f 25 | b2ts = liveTemps cfg 26 | code' = map (sinkLiveOutsInBlock b2ts) code 27 | in f {fCode = code'} 28 | 29 | -- | Sink each temporary defined in a block that is live out 30 | sinkLiveOutsInBlock s2ts b @ Block {bLab = l, bCode = code} = 31 | b {bCode = addToOut (S.toList $ snd $ s2ts M.! l) code} 32 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/size/gobmk.interface.init_gnugo.stats: -------------------------------------------------------------------------------- 1 | Weighted-instructions-per-bundle 1.500000 2 | Number-of-machine-instrs-printed 4 3 | Number-of-blocks-selected-using-DAG 1 4 | Number-of-entry-blocks-encountered 1 5 | Maximum-number-of-instructions-in-a-block-(post-RA) 10 6 | Maximum-number-of-instructions-in-a-block-(pre-RA) 10 7 | Number-of-basic-blocks-(post-RA) 1 8 | Number-of-basic-blocks-(pre-RA) 1 9 | Number-of-call-instructions-(post-RA) 4 10 | Number-of-call-instructions-(pre-RA) 4 11 | Number-of-machine-instructions-(post-RA) 10 12 | Number-of-machine-instructions-(pre-RA) 10 13 | Number-of-virtual-registers-(post-RA) 81 14 | Number-of-virtual-registers-(pre-RA) 81 15 | Number-of-MCExpr-evaluations 4 16 | Number-of-functions-skipped 1 17 | Number-of-functions-visited 1 18 | Function-name init_gnugo 19 | Module-name interface 20 | Application-name gobmk 21 | Percent-of-copy-instructions 0.0 22 | Percent-of-call-instructions 0.4 23 | Percent-of-spilled-virtual-registers 0.0 24 | Percent-of-remat-instructions 0.0 25 | Instructions-per-block 10.0 26 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/speed/gobmk.interface.init_gnugo.stats: -------------------------------------------------------------------------------- 1 | Weighted-instructions-per-bundle 1.500000 2 | Number-of-machine-instrs-printed 4 3 | Number-of-blocks-selected-using-DAG 1 4 | Number-of-entry-blocks-encountered 1 5 | Maximum-number-of-instructions-in-a-block-(post-RA) 10 6 | Maximum-number-of-instructions-in-a-block-(pre-RA) 10 7 | Number-of-basic-blocks-(post-RA) 1 8 | Number-of-basic-blocks-(pre-RA) 1 9 | Number-of-call-instructions-(post-RA) 4 10 | Number-of-call-instructions-(pre-RA) 4 11 | Number-of-machine-instructions-(post-RA) 10 12 | Number-of-machine-instructions-(pre-RA) 10 13 | Number-of-virtual-registers-(post-RA) 81 14 | Number-of-virtual-registers-(pre-RA) 81 15 | Number-of-MCExpr-evaluations 4 16 | Number-of-functions-skipped 1 17 | Number-of-functions-visited 1 18 | Function-name init_gnugo 19 | Module-name interface 20 | Application-name gobmk 21 | Percent-of-copy-instructions 0.0 22 | Percent-of-call-instructions 0.4 23 | Percent-of-spilled-virtual-registers 0.0 24 | Percent-of-remat-instructions 0.0 25 | Instructions-per-block 10.0 26 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Export/RemoveRedundancies.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Export.RemoveRedundancies (removeRedundancies) where 13 | 14 | import qualified Data.Set as S 15 | 16 | import Unison 17 | 18 | removeRedundancies f @ Function {fCode = code} _target = 19 | let code' = map removeBlockRedundancies code 20 | in f {fCode = code'} 21 | 22 | removeBlockRedundancies b @ Block {bCode = code} = 23 | b {bCode = map removeBundleRedundancies code} 24 | 25 | removeBundleRedundancies (Bundle code) = 26 | let (code', _) = foldl removeDuplicates ([], S.empty) code 27 | in Bundle code' 28 | 29 | removeDuplicates (code, instrs) i = 30 | let inst = oOpr i 31 | in if S.member inst instrs 32 | then (code, instrs) 33 | else (code ++ [i], S.insert inst instrs) 34 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Import/ImplementFrameOperations.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Import.ImplementFrameOperations (implementFrameOperations) where 13 | 14 | import Unison 15 | import Unison.Target.API 16 | 17 | implementFrameOperations implementFrames f @ Function {fCode = code} target = 18 | let iff = implementFrame target 19 | code' = map (implementFrameOperationsInBlock implementFrames iff) code 20 | in f {fCode = code'} 21 | 22 | implementFrameOperationsInBlock implementFrames iff b @ Block {bCode = code} = 23 | let code' = concatMap (implementFrameOperation implementFrames iff) code 24 | in b {bCode = code'} 25 | 26 | implementFrameOperation implementFrames iff o 27 | | implementFrames && (isFrameSetup o || isFrameDestroy o) = iff o 28 | | otherwise = [o] 29 | -------------------------------------------------------------------------------- /src/unison/test/fast/Mips/size/sphinx3.profile.ptmr_init.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .abicalls 3 | .section .mdebug.abi32,"",@progbits 4 | .nan legacy 5 | .file "sphinx3.profile.ptmr_init.ll" 6 | .text 7 | .globl ptmr_init 8 | .align 2 9 | .type ptmr_init,@function 10 | .set nomicromips 11 | .set nomips16 12 | .ent ptmr_init 13 | ptmr_init: # @ptmr_init 14 | .frame $sp,0,$ra 15 | .mask 0x00000000,0 16 | .fmask 0x00000000,0 17 | .set noreorder 18 | .set nomacro 19 | .set noat 20 | # BB#0: 21 | sw $zero, 36($4) 22 | sw $zero, 32($4) 23 | sw $zero, 28($4) 24 | sw $zero, 24($4) 25 | sw $zero, 20($4) 26 | sw $zero, 16($4) 27 | sw $zero, 12($4) 28 | jr $ra 29 | sw $zero, 8($4) 30 | .set at 31 | .set macro 32 | .set reorder 33 | .end ptmr_init 34 | $func_end0: 35 | .size ptmr_init, ($func_end0)-ptmr_init 36 | 37 | 38 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 39 | .section ".note.GNU-stack","",@progbits 40 | .text 41 | -------------------------------------------------------------------------------- /src/unison/test/fast/Mips/speed/sphinx3.profile.ptmr_init.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .abicalls 3 | .section .mdebug.abi32,"",@progbits 4 | .nan legacy 5 | .file "sphinx3.profile.ptmr_init.ll" 6 | .text 7 | .globl ptmr_init 8 | .align 2 9 | .type ptmr_init,@function 10 | .set nomicromips 11 | .set nomips16 12 | .ent ptmr_init 13 | ptmr_init: # @ptmr_init 14 | .frame $sp,0,$ra 15 | .mask 0x00000000,0 16 | .fmask 0x00000000,0 17 | .set noreorder 18 | .set nomacro 19 | .set noat 20 | # BB#0: 21 | sw $zero, 36($4) 22 | sw $zero, 32($4) 23 | sw $zero, 28($4) 24 | sw $zero, 24($4) 25 | sw $zero, 20($4) 26 | sw $zero, 16($4) 27 | sw $zero, 12($4) 28 | jr $ra 29 | sw $zero, 8($4) 30 | .set at 31 | .set macro 32 | .set reorder 33 | .end ptmr_init 34 | $func_end0: 35 | .size ptmr_init, ($func_end0)-ptmr_init 36 | 37 | 38 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 39 | .section ".note.GNU-stack","",@progbits 40 | .text 41 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Export/ComputeFrameOffsets.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Export.ComputeFrameOffsets (computeFrameOffsets) where 13 | 14 | import Data.List 15 | 16 | import Unison 17 | import Unison.Analysis.FrameOffsets 18 | 19 | -- This pass computes the offsets for the variable ("free") frame objects 20 | -- and shifts all offsets according to the stack pointer offset. 21 | 22 | computeFrameOffsets f @ Function {fFixedStackFrame = fobjs, fStackFrame = objs, 23 | fStackPointerOffset = off} _ = 24 | let (_, objs') = mapAccumL allocateObject (slotSet fobjs) objs 25 | fobjs' = map (reoffset (- off)) fobjs 26 | objs'' = map (reoffset (- off)) objs' 27 | in f {fFixedStackFrame = fobjs', fStackFrame = objs'', 28 | fStackPointerOffset = 0} 29 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/size/mesa.api.glVertex2i.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "mesa.api.glVertex2i.ll" 3 | .globl glVertex2i 4 | .align 16 5 | .type glVertex2i,@function 6 | glVertex2i: // @glVertex2i 7 | // BB#0: 8 | { 9 | memd(r29 + #-16) = r17:16 10 | allocframe(#16) 11 | } 12 | { 13 | r17 = r1 14 | r16 = memw(##CC) 15 | memd(r29+#0) = r19:18 16 | } 17 | { 18 | call __hexagon_floatsisf 19 | r19 = memw(r16 + #656) 20 | } 21 | { 22 | call __hexagon_floatsisf 23 | r18 = r0 24 | r0 = r17 25 | } 26 | { 27 | r1:0 = combine(r18, r16) 28 | r4 = ##1065353216 29 | r3:2 = combine(#0, r0) 30 | } 31 | { 32 | callr r19 33 | r17:16 = memd(r29 + #8) 34 | r19:18 = memd(r29 + #0) 35 | } 36 | { 37 | dealloc_return 38 | } 39 | .Lfunc_end0: 40 | .size glVertex2i, .Lfunc_end0-glVertex2i 41 | 42 | 43 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 44 | .section ".note.GNU-stack","",@progbits 45 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Import/TagRemats.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Import.TagRemats (tagRemats) where 13 | 14 | import qualified Data.Map as M 15 | import qualified Data.Set as S 16 | 17 | import Unison 18 | import Unison.Target.API 19 | import Unison.Graphs.Hoopl 20 | import Unison.Graphs.Hoopl.ReachingConstantsSSA 21 | import qualified Unison.Graphs.BCFG as BCFG 22 | import qualified Unison.Graphs.ICFG as ICFG 23 | 24 | tagRemats f target = 25 | let bif = branchInfo target 26 | icfg = ICFG.fromBCFG $ BCFG.fromFunction bif f 27 | cfg = toHOprGraph icfg 28 | ts = map undoPreAssign $ tUniqueOps (flatCode f) 29 | rts = [(undoPreAssign t, S.toList oids) 30 | | (t, (_, oids)) <- M.toList $ reachingConstants cfg ts] 31 | in f {fRematerializable = rts} 32 | -------------------------------------------------------------------------------- /src/unison/test/problematic/Hexagon/speed/mesa.api.glVertex2i.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "mesa.api.glVertex2i.ll" 3 | .globl glVertex2i 4 | .align 16 5 | .type glVertex2i,@function 6 | glVertex2i: // @glVertex2i 7 | // BB#0: 8 | { 9 | memd(r29 + #-16) = r17:16 10 | allocframe(#16) 11 | } 12 | { 13 | r17 = r1 14 | r16 = memw(##CC) 15 | memd(r29+#0) = r19:18 16 | } 17 | { 18 | call __hexagon_floatsisf 19 | r19 = memw(r16 + #656) 20 | } 21 | { 22 | call __hexagon_floatsisf 23 | r18 = r0 24 | r0 = r17 25 | } 26 | { 27 | r1:0 = combine(r18, r16) 28 | r4 = ##1065353216 29 | r3:2 = combine(#0, r0) 30 | } 31 | { 32 | callr r19 33 | r17:16 = memd(r29 + #8) 34 | r19:18 = memd(r29 + #0) 35 | } 36 | { 37 | dealloc_return 38 | } 39 | .Lfunc_end0: 40 | .size glVertex2i, .Lfunc_end0-glVertex2i 41 | 42 | 43 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 44 | .section ".note.GNU-stack","",@progbits 45 | -------------------------------------------------------------------------------- /doc/figures/styles.tex: -------------------------------------------------------------------------------- 1 | \def\lightGray{gray!15}% 2 | \newdimen\zerolinewidth% 3 | \newdimen\cornerRadius% 4 | \newdimen\lessCornerRadius% 5 | \cornerRadius=20pt% 6 | \lessCornerRadius=10pt% 7 | \tikzset{% 8 | zero line width/.code={% 9 | \zerolinewidth=\pgflinewidth 10 | \tikzset{line width=0cm}% 11 | }, 12 | use line width/.code={% 13 | \tikzset{line width=\the\zerolinewidth}% 14 | }, 15 | file/.style={% 16 | outer sep=0, 17 | }, 18 | input/.style={% 19 | file, 20 | }, 21 | output/.style={% 22 | file, 23 | }, 24 | box/.style={% 25 | draw, 26 | fill=white, 27 | }, 28 | flow/.style={% 29 | ->, 30 | >=stealth, 31 | }, 32 | unison/.style={% 33 | draw, 34 | inner xsep=3mm, 35 | inner ysep=4mm, 36 | dash pattern=on 2mm off 2mm, 37 | fill=bgcolor2!33 38 | }, 39 | unison stage/.style={% 40 | box, 41 | fill=bgcolor2 42 | }, 43 | }% 44 | \pgfdeclarelayer{layer0}% 45 | \pgfdeclarelayer{layer1}% 46 | \pgfdeclarelayer{layer2}% 47 | \pgfdeclarelayer{layer3}% 48 | \pgfdeclarelayer{layer4}% 49 | \pgfdeclarelayer{layer5}% 50 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/size/gcc.varasm.data_section.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gcc.varasm.data_section.ll" 3 | .globl data_section 4 | .align 16 5 | .type data_section,@function 6 | data_section: // @data_section 7 | // BB#0: 8 | { 9 | r0 = memb(##in_section) 10 | if (cmp.eq(r0.new, #2)) jump:t .LBB0_2 11 | } 12 | { 13 | jump .LBB0_1 14 | } 15 | .LBB0_1: 16 | { 17 | allocframe(#8) 18 | } 19 | { 20 | r2 = ##.str.3 21 | r0 = memw(##asm_out_file) 22 | } 23 | { 24 | call fprintf 25 | r1 = ##.str 26 | memw(r29 + #0) = r2 27 | } 28 | { 29 | r0 = #2 30 | memb(###in_section) = r0.new 31 | } 32 | { 33 | deallocframe 34 | } 35 | .LBB0_2: 36 | { 37 | jumpr r31 38 | } 39 | .Lfunc_end0: 40 | .size data_section, .Lfunc_end0-data_section 41 | 42 | .hidden in_section 43 | .hidden .str 44 | .hidden .str.3 45 | 46 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 47 | .section ".note.GNU-stack","",@progbits 48 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/speed/gcc.varasm.data_section.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gcc.varasm.data_section.ll" 3 | .globl data_section 4 | .align 16 5 | .type data_section,@function 6 | data_section: // @data_section 7 | // BB#0: 8 | { 9 | r0 = memb(##in_section) 10 | if (cmp.eq(r0.new, #2)) jump:t .LBB0_2 11 | } 12 | { 13 | jump .LBB0_1 14 | } 15 | .LBB0_1: 16 | { 17 | allocframe(#8) 18 | } 19 | { 20 | r2 = ##.str.3 21 | r0 = memw(##asm_out_file) 22 | } 23 | { 24 | call fprintf 25 | r1 = ##.str 26 | memw(r29 + #0) = r2 27 | } 28 | { 29 | r0 = #2 30 | memb(###in_section) = r0.new 31 | } 32 | { 33 | deallocframe 34 | } 35 | .LBB0_2: 36 | { 37 | jumpr r31 38 | } 39 | .Lfunc_end0: 40 | .size data_section, .Lfunc_end0-data_section 41 | 42 | .hidden in_section 43 | .hidden .str 44 | .hidden .str.3 45 | 46 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 47 | .section ".note.GNU-stack","",@progbits 48 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/size/gobmk.patterns.autohelperpat1088.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gobmk.patterns.autohelperpat1088.ll" 3 | .hidden autohelperpat1088 4 | .globl autohelperpat1088 5 | .align 16 6 | .type autohelperpat1088,@function 7 | autohelperpat1088: // @autohelperpat1088 8 | // BB#0: 9 | { 10 | r4 = r1 11 | r1:0 = combine(#0, r2) 12 | r3 = r0 13 | allocframe(#8) 14 | } 15 | { 16 | r3 = add(##transformation, asl(r3, #2)) 17 | r2 = #1 18 | } 19 | { 20 | r5 = memw(r3 + ##21856) 21 | r3 = memw(r3 + ##23040) 22 | } 23 | { 24 | r5 = add(r5, r4) 25 | r3 = add(r3, r4) 26 | memw(r29+#4) = r5.new 27 | } 28 | { 29 | call play_attack_defend_n 30 | memw(r29+#0) = r3 31 | } 32 | { 33 | r0 = cmp.eq(r0, #0) 34 | dealloc_return 35 | } 36 | .Lfunc_end0: 37 | .size autohelperpat1088, .Lfunc_end0-autohelperpat1088 38 | 39 | 40 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 41 | .section ".note.GNU-stack","",@progbits 42 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/speed/gobmk.patterns.autohelperpat1088.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gobmk.patterns.autohelperpat1088.ll" 3 | .hidden autohelperpat1088 4 | .globl autohelperpat1088 5 | .align 16 6 | .type autohelperpat1088,@function 7 | autohelperpat1088: // @autohelperpat1088 8 | // BB#0: 9 | { 10 | r4 = r1 11 | r1:0 = combine(#0, r2) 12 | r3 = r0 13 | allocframe(#8) 14 | } 15 | { 16 | r3 = add(##transformation, asl(r3, #2)) 17 | r2 = #1 18 | } 19 | { 20 | r5 = memw(r3 + ##21856) 21 | r3 = memw(r3 + ##23040) 22 | } 23 | { 24 | r5 = add(r5, r4) 25 | r3 = add(r3, r4) 26 | memw(r29+#4) = r5.new 27 | } 28 | { 29 | call play_attack_defend_n 30 | memw(r29+#0) = r3 31 | } 32 | { 33 | r0 = cmp.eq(r0, #0) 34 | dealloc_return 35 | } 36 | .Lfunc_end0: 37 | .size autohelperpat1088, .Lfunc_end0-autohelperpat1088 38 | 39 | 40 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 41 | .section ".note.GNU-stack","",@progbits 42 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/size/gobmk.owl_vital_apat.autohelperowl_vital_apat34.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gobmk.owl_vital_apat.autohelperowl_vital_apat34.ll" 3 | .hidden autohelperowl_vital_apat34 4 | .globl autohelperowl_vital_apat34 5 | .align 16 6 | .type autohelperowl_vital_apat34,@function 7 | autohelperowl_vital_apat34: // @autohelperowl_vital_apat34 8 | // BB#0: 9 | { 10 | r4 = r1 11 | r1:0 = combine(#0, r2) 12 | r3 = r0 13 | allocframe(#16) 14 | } 15 | { 16 | r3 = add(##transformation, asl(r3, #2)) 17 | r2 = #1 18 | memw(r29 + #8) = r4 19 | } 20 | { 21 | r3 = memw(r3 + ##24256) 22 | memw(r29+#0) = r4 23 | } 24 | { 25 | call play_attack_defend2_n 26 | r3 = add(r3, r4) 27 | memw(r29+#4) = r3.new 28 | } 29 | { 30 | dealloc_return 31 | } 32 | .Lfunc_end0: 33 | .size autohelperowl_vital_apat34, .Lfunc_end0-autohelperowl_vital_apat34 34 | 35 | 36 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 37 | .section ".note.GNU-stack","",@progbits 38 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/size/gobmk.patterns.autohelperpat301.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gobmk.patterns.autohelperpat301.ll" 3 | .hidden autohelperpat301 4 | .globl autohelperpat301 5 | .align 16 6 | .type autohelperpat301,@function 7 | autohelperpat301: // @autohelperpat301 8 | // BB#0: 9 | { 10 | r16 = r2 11 | memd(r29 + #-16) = r17:16 12 | allocframe(#8) 13 | } 14 | { 15 | r0 = add(##transformation, asl(r0, #2)) 16 | p0 = cmp.eq(r16, #2) 17 | } 18 | { 19 | if (p0) r2 = ##initial_white_influence 20 | r3 = memw(r0 + ##25440) 21 | } 22 | { 23 | if (!p0) r2 = ##initial_black_influence 24 | } 25 | { 26 | call whose_moyo 27 | r0 = r2 28 | r1 = add(r3, r1) 29 | } 30 | { 31 | r0 = cmp.eq(r0, r16) 32 | r17:16 = memd(r29 + #0) 33 | dealloc_return 34 | } 35 | .Lfunc_end0: 36 | .size autohelperpat301, .Lfunc_end0-autohelperpat301 37 | 38 | 39 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 40 | .section ".note.GNU-stack","",@progbits 41 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/speed/gobmk.owl_vital_apat.autohelperowl_vital_apat34.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gobmk.owl_vital_apat.autohelperowl_vital_apat34.ll" 3 | .hidden autohelperowl_vital_apat34 4 | .globl autohelperowl_vital_apat34 5 | .align 16 6 | .type autohelperowl_vital_apat34,@function 7 | autohelperowl_vital_apat34: // @autohelperowl_vital_apat34 8 | // BB#0: 9 | { 10 | r4 = r1 11 | r1:0 = combine(#0, r2) 12 | r3 = r0 13 | allocframe(#16) 14 | } 15 | { 16 | r3 = add(##transformation, asl(r3, #2)) 17 | r2 = #1 18 | memw(r29 + #8) = r4 19 | } 20 | { 21 | r3 = memw(r3 + ##24256) 22 | memw(r29+#0) = r4 23 | } 24 | { 25 | call play_attack_defend2_n 26 | r3 = add(r3, r4) 27 | memw(r29+#4) = r3.new 28 | } 29 | { 30 | dealloc_return 31 | } 32 | .Lfunc_end0: 33 | .size autohelperowl_vital_apat34, .Lfunc_end0-autohelperowl_vital_apat34 34 | 35 | 36 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 37 | .section ".note.GNU-stack","",@progbits 38 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/speed/gobmk.patterns.autohelperpat301.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gobmk.patterns.autohelperpat301.ll" 3 | .hidden autohelperpat301 4 | .globl autohelperpat301 5 | .align 16 6 | .type autohelperpat301,@function 7 | autohelperpat301: // @autohelperpat301 8 | // BB#0: 9 | { 10 | r16 = r2 11 | memd(r29 + #-16) = r17:16 12 | allocframe(#8) 13 | } 14 | { 15 | r0 = add(##transformation, asl(r0, #2)) 16 | p0 = cmp.eq(r16, #2) 17 | } 18 | { 19 | if (p0) r2 = ##initial_white_influence 20 | r3 = memw(r0 + ##25440) 21 | } 22 | { 23 | if (!p0) r2 = ##initial_black_influence 24 | } 25 | { 26 | call whose_moyo 27 | r0 = r2 28 | r1 = add(r3, r1) 29 | } 30 | { 31 | r0 = cmp.eq(r0, r16) 32 | r17:16 = memd(r29 + #0) 33 | dealloc_return 34 | } 35 | .Lfunc_end0: 36 | .size autohelperpat301, .Lfunc_end0-autohelperpat301 37 | 38 | 39 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 40 | .section ".note.GNU-stack","",@progbits 41 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Transformations/RenameTemps.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Transformations.RenameTemps (renameTemps) where 13 | 14 | import Data.List 15 | import Data.Ord 16 | 17 | import Unison.Base 18 | import Unison.Util 19 | import Unison.Predicates 20 | 21 | renameTemps f _target = 22 | let f' = renameOperands defTemporaries applyTempIdMap f 23 | f'' = f' {fCode = mapToOperationInBlocks sortAltTempsInOpr (fCode f')} 24 | in f'' 25 | 26 | sortAltTempsInOpr = mapToOperandIf isMOperand sortAltTemps 27 | 28 | sortAltTemps p @ MOperand {altTemps = ts} = p {altTemps = sortBy compareTs ts} 29 | 30 | compareTs t t' 31 | | isNullTemporary t && isNullTemporary t' = EQ 32 | | isNullTemporary t && isTemporary t' = LT 33 | | isTemporary t && isNullTemporary t' = GT 34 | | isTemporary t && isTemporary t' = comparing tId t t' 35 | -------------------------------------------------------------------------------- /src/unison/src/MachineIR/Transformations/AddImplicitRegs.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module MachineIR.Transformations.AddImplicitRegs (addImplicitRegs) where 13 | 14 | import MachineIR 15 | import Unison 16 | import Unison.Target.API 17 | 18 | addImplicitRegs mf target = 19 | let rwif = readWriteInfo target 20 | in mapToMachineInstruction (addImplicitRegsToInstr rwif) mf 21 | 22 | addImplicitRegsToInstr rwif mi @ MachineSingle {msOpcode = MachineTargetOpc i, 23 | msOperands = mos} = 24 | let rws = rwif (TargetInstruction i) 25 | imp = [MachineReg u [mkMachineRegImplicit] | 26 | (OtherSideEffect u) <- fst rws ++ snd rws] ++ 27 | [MachineReg d [mkMachineRegImplicitDefine] | 28 | (OtherSideEffect d) <- snd rws] 29 | mos' = mos ++ imp 30 | in mi {msOperands = mos'} 31 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/size/gcc.rtlanal.insn_dependent_p_1.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gcc.rtlanal.insn_dependent_p_1.ll" 3 | .hidden insn_dependent_p_1 4 | .globl insn_dependent_p_1 5 | .align 16 6 | .type insn_dependent_p_1,@function 7 | insn_dependent_p_1: // @insn_dependent_p_1 8 | // BB#0: 9 | { 10 | r16 = r2 11 | memd(r29 + #-16) = r17:16 12 | allocframe(#8) 13 | } 14 | { 15 | r1 = memw(r16 + #0) 16 | if (cmp.eq(r1.new, #0)) jump:nt .LBB0_3 17 | } 18 | { 19 | jump .LBB0_1 20 | } 21 | .LBB0_1: 22 | { 23 | call reg_mentioned_p 24 | } 25 | { 26 | p0 = cmp.eq(r0, #0); if (p0.new) jump:nt .LBB0_3 27 | } 28 | { 29 | jump .LBB0_2 30 | } 31 | .LBB0_2: 32 | { 33 | memw(r16+#0)=#0 34 | } 35 | .LBB0_3: 36 | { 37 | r17:16 = memd(r29 + #0) 38 | dealloc_return 39 | } 40 | .Lfunc_end0: 41 | .size insn_dependent_p_1, .Lfunc_end0-insn_dependent_p_1 42 | 43 | 44 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 45 | .section ".note.GNU-stack","",@progbits 46 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/speed/gcc.rtlanal.insn_dependent_p_1.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gcc.rtlanal.insn_dependent_p_1.ll" 3 | .hidden insn_dependent_p_1 4 | .globl insn_dependent_p_1 5 | .align 16 6 | .type insn_dependent_p_1,@function 7 | insn_dependent_p_1: // @insn_dependent_p_1 8 | // BB#0: 9 | { 10 | r16 = r2 11 | memd(r29 + #-16) = r17:16 12 | allocframe(#8) 13 | } 14 | { 15 | r1 = memw(r16 + #0) 16 | if (cmp.eq(r1.new, #0)) jump:nt .LBB0_3 17 | } 18 | { 19 | jump .LBB0_1 20 | } 21 | .LBB0_1: 22 | { 23 | call reg_mentioned_p 24 | } 25 | { 26 | p0 = cmp.eq(r0, #0); if (p0.new) jump:nt .LBB0_3 27 | } 28 | { 29 | jump .LBB0_2 30 | } 31 | .LBB0_2: 32 | { 33 | memw(r16+#0)=#0 34 | } 35 | .LBB0_3: 36 | { 37 | r17:16 = memd(r29 + #0) 38 | dealloc_return 39 | } 40 | .Lfunc_end0: 41 | .size insn_dependent_p_1, .Lfunc_end0-insn_dependent_p_1 42 | 43 | 44 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 45 | .section ".note.GNU-stack","",@progbits 46 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Augment/GeneralizeCongruences.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Augment.GeneralizeCongruences (generalizeCongruences) where 13 | 14 | import Data.List 15 | import Data.Maybe 16 | 17 | import Unison 18 | 19 | generalizeCongruences f @ Function {fCode = code, fCongruences = cs} _ = 20 | let fcode = flatten code 21 | cs' = map (generalizeCongruence fcode) cs 22 | in f {fCongruences = cs'} 23 | 24 | generalizeCongruence code (t, t') = (toUseOperand code t, toDefOperand code t') 25 | 26 | toUseOperand code t = 27 | let i = fromJust $ find isOut (users t code) 28 | p = equivalentTo t (oUses i) 29 | in mkOperandRef p 30 | 31 | toDefOperand code t = 32 | let i = definer t code 33 | p = equivalentTo t (oDefs i) 34 | in mkOperandRef p 35 | 36 | equivalentTo t = operandId . fromJust . find (isEquivalentTo t) -------------------------------------------------------------------------------- /src/unison/src/Unison/Transformations/PropagatePhis.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Transformations.PropagatePhiCongruences (propagatePhiCongruences) where 13 | 14 | import Unison.Base 15 | import Unison.Util 16 | 17 | propagatePhiCongruences (Function code []) _target = 18 | let phis = concatMap collectPhis code 19 | sourcedCode = foldl sourceDef code phis 20 | sinkedCode = foldl sinkUses sourcedCode phis 21 | cs = concatMap duplicateTuple phis 22 | in Function sinkedCode cs 23 | 24 | collectPhis (Block l code) = 25 | [(l, phiUses i, fromSingleton $ oDefs i) | i <- code, isPhi i] 26 | 27 | sourceDef code (l, _, d) = applyToBB (addToIn [d]) l code 28 | 29 | sinkUses code (_, us, _) = foldl sinkUse code us 30 | sinkUse code (u, p) = applyToBB (addToOut [u]) p code 31 | 32 | duplicateTuple (_, us, d) = [(u, d) | (u, _) <- us] 33 | -------------------------------------------------------------------------------- /src/unison/test/fast/Mips/size/h264ref.vlc.symbol2uvlc.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .abicalls 3 | .section .mdebug.abi32,"",@progbits 4 | .nan legacy 5 | .file "h264ref.vlc.symbol2uvlc.ll" 6 | .text 7 | .globl symbol2uvlc 8 | .align 2 9 | .type symbol2uvlc,@function 10 | .set nomicromips 11 | .set nomips16 12 | .ent symbol2uvlc 13 | symbol2uvlc: # @symbol2uvlc 14 | .frame $sp,0,$ra 15 | .mask 0x00000000,0 16 | .fmask 0x00000000,0 17 | .set noreorder 18 | .set nomacro 19 | .set noat 20 | # BB#0: 21 | lw $1, 12($4) 22 | srl $2, $1, 31 23 | addu $1, $1, $2 24 | sra $1, $1, 1 25 | addiu $2, $zero, 1 26 | sllv $1, $2, $1 27 | lw $2, 16($4) 28 | addiu $3, $1, -1 29 | and $2, $3, $2 30 | or $1, $2, $1 31 | sw $1, 20($4) 32 | jr $ra 33 | addiu $2, $zero, 0 34 | .set at 35 | .set macro 36 | .set reorder 37 | .end symbol2uvlc 38 | $func_end0: 39 | .size symbol2uvlc, ($func_end0)-symbol2uvlc 40 | 41 | 42 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 43 | .section ".note.GNU-stack","",@progbits 44 | .text 45 | -------------------------------------------------------------------------------- /src/unison/test/fast/Mips/speed/h264ref.vlc.symbol2uvlc.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .abicalls 3 | .section .mdebug.abi32,"",@progbits 4 | .nan legacy 5 | .file "h264ref.vlc.symbol2uvlc.ll" 6 | .text 7 | .globl symbol2uvlc 8 | .align 2 9 | .type symbol2uvlc,@function 10 | .set nomicromips 11 | .set nomips16 12 | .ent symbol2uvlc 13 | symbol2uvlc: # @symbol2uvlc 14 | .frame $sp,0,$ra 15 | .mask 0x00000000,0 16 | .fmask 0x00000000,0 17 | .set noreorder 18 | .set nomacro 19 | .set noat 20 | # BB#0: 21 | lw $1, 12($4) 22 | srl $2, $1, 31 23 | addu $1, $1, $2 24 | sra $1, $1, 1 25 | addiu $2, $zero, 1 26 | sllv $1, $2, $1 27 | lw $2, 16($4) 28 | addiu $3, $1, -1 29 | and $2, $3, $2 30 | or $1, $2, $1 31 | sw $1, 20($4) 32 | jr $ra 33 | addiu $2, $zero, 0 34 | .set at 35 | .set macro 36 | .set reorder 37 | .end symbol2uvlc 38 | $func_end0: 39 | .size symbol2uvlc, ($func_end0)-symbol2uvlc 40 | 41 | 42 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 43 | .section ".note.GNU-stack","",@progbits 44 | .text 45 | -------------------------------------------------------------------------------- /src/unison/test/fast/ARM/size/gobmk.interface.init_gnugo.stats: -------------------------------------------------------------------------------- 1 | Weighted-instructions-per-bundle 1.000000 2 | Number-of-tail-calls 1 3 | Number-of-machine-instrs-printed 7 4 | Number-of-blocks-selected-using-DAG 1 5 | Number-of-entry-blocks-encountered 1 6 | Maximum-number-of-instructions-in-a-block-(post-RA) 10 7 | Maximum-number-of-instructions-in-a-block-(pre-RA) 10 8 | Number-of-basic-blocks-(post-RA) 1 9 | Number-of-basic-blocks-(pre-RA) 1 10 | Number-of-call-instructions-(post-RA) 4 11 | Number-of-call-instructions-(pre-RA) 4 12 | Number-of-machine-instructions-(post-RA) 10 13 | Number-of-machine-instructions-(pre-RA) 10 14 | Number-of-virtual-registers-(post-RA) 12 15 | Number-of-virtual-registers-(pre-RA) 12 16 | Number-of-bytes-used-for-stack-in-all-functions 8 17 | Number-of-functions 1 18 | Number-of-functions-skipped 1 19 | Number-of-functions-visited 1 20 | Number-of-32-bit-load-/-store-reduced-to-16-bit-ones 1 21 | Function-name init_gnugo 22 | Module-name interface 23 | Application-name gobmk 24 | Percent-of-copy-instructions 0.0 25 | Percent-of-call-instructions 0.4 26 | Percent-of-spilled-virtual-registers 0.0 27 | Percent-of-remat-instructions 0.0 28 | Instructions-per-block 10.0 29 | -------------------------------------------------------------------------------- /src/unison/test/fast/ARM/speed/gobmk.interface.init_gnugo.stats: -------------------------------------------------------------------------------- 1 | Weighted-instructions-per-bundle 1.000000 2 | Number-of-tail-calls 1 3 | Number-of-machine-instrs-printed 7 4 | Number-of-blocks-selected-using-DAG 1 5 | Number-of-entry-blocks-encountered 1 6 | Maximum-number-of-instructions-in-a-block-(post-RA) 10 7 | Maximum-number-of-instructions-in-a-block-(pre-RA) 10 8 | Number-of-basic-blocks-(post-RA) 1 9 | Number-of-basic-blocks-(pre-RA) 1 10 | Number-of-call-instructions-(post-RA) 4 11 | Number-of-call-instructions-(pre-RA) 4 12 | Number-of-machine-instructions-(post-RA) 10 13 | Number-of-machine-instructions-(pre-RA) 10 14 | Number-of-virtual-registers-(post-RA) 12 15 | Number-of-virtual-registers-(pre-RA) 12 16 | Number-of-bytes-used-for-stack-in-all-functions 8 17 | Number-of-functions 1 18 | Number-of-functions-skipped 1 19 | Number-of-functions-visited 1 20 | Number-of-32-bit-load-/-store-reduced-to-16-bit-ones 1 21 | Function-name init_gnugo 22 | Module-name interface 23 | Application-name gobmk 24 | Percent-of-copy-instructions 0.0 25 | Percent-of-call-instructions 0.4 26 | Percent-of-spilled-virtual-registers 0.0 27 | Percent-of-remat-instructions 0.0 28 | Instructions-per-block 10.0 29 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Import/RemoveUselessVirtuals.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Import.RemoveUselessVirtuals (removeUselessVirtuals) where 13 | 14 | import Data.List 15 | import Data.Maybe 16 | 17 | import Unison 18 | 19 | removeUselessVirtuals f @ Function {fCode = code} _target = 20 | let code' = fixpoint removeUseless code 21 | in f {fCode = code'} 22 | 23 | removeUseless code = map (fixpoint (removeUselessInBlock fcode)) code 24 | where fcode = flatten code 25 | 26 | removeUselessInBlock fcode b @ Block {bCode = code} = 27 | b {bCode = filter (isUseful fcode) code} 28 | 29 | isUseful fcode o 30 | | isDefine o && any isRegister (oDefs o) = True 31 | | isCombine o || isDefine o = isSingleDefUsed fcode o 32 | | isLow o || isHigh o = not (null (users (oSingleDef o) fcode)) 33 | | otherwise = True 34 | 35 | isSingleDefUsed fcode o = isJust (find (isUser (oSingleDef o)) fcode) 36 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Linearize/AddReflexiveCongruences.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Linearize.AddReflexiveCongruences 13 | (addReflexiveCongruences) where 14 | 15 | import Data.List 16 | 17 | import Unison 18 | import Unison.Target.API 19 | import Unison.Graphs.BCFG 20 | import Unison.Graphs.Util 21 | 22 | addReflexiveCongruences f @ Function {fCode = code, fCongruences = cs} target = 23 | let bcfg = fromFunction (branchInfo target) f 24 | cs' = reflexiveCongruenceTuples bcfg code 25 | cs'' = sort $ cs ++ cs' 26 | in f {fCongruences = cs''} 27 | 28 | reflexiveCongruenceTuples bcfg code = 29 | concat [inOutPairs bbCode | Block {bLab = l, bCode = bbCode} <- code, 30 | isLoop bcfg (fromInteger l)] 31 | 32 | inOutPairs code = 33 | let ds = concat [oDefs i | i <- code, isIn i] 34 | us = concat [oUses i | i <- code, isOut i] 35 | in [(u, d) | d <- ds, u <- us, d == u] 36 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/size/gobmk.owl_attackpat.autohelperowl_attackpat68.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gobmk.owl_attackpat.autohelperowl_attackpat68.ll" 3 | .hidden autohelperowl_attackpat68 4 | .globl autohelperowl_attackpat68 5 | .align 16 6 | .type autohelperowl_attackpat68,@function 7 | autohelperowl_attackpat68: // @autohelperowl_attackpat68 8 | // BB#0: 9 | { 10 | r0 = r2 11 | r4 = r1 12 | r3 = r0 13 | allocframe(#16) 14 | } 15 | { 16 | r3 = add(##transformation, asl(r3, #2)) 17 | r2 = #2 18 | r1 = #0 19 | } 20 | { 21 | r5 = memw(r3 + ##20672) 22 | r3 = memw(r3 + ##21856) 23 | } 24 | { 25 | r5 = add(r5, r4) 26 | r3 = add(r3, r4) 27 | memw(r29 + #8) = r4 28 | memw(r29 + #0) = r4 29 | } 30 | { 31 | call play_attack_defend2_n 32 | memw(r29 + #12) = r5 33 | memw(r29 + #4) = r3 34 | } 35 | { 36 | dealloc_return 37 | } 38 | .Lfunc_end0: 39 | .size autohelperowl_attackpat68, .Lfunc_end0-autohelperowl_attackpat68 40 | 41 | 42 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 43 | .section ".note.GNU-stack","",@progbits 44 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/speed/gobmk.owl_attackpat.autohelperowl_attackpat68.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gobmk.owl_attackpat.autohelperowl_attackpat68.ll" 3 | .hidden autohelperowl_attackpat68 4 | .globl autohelperowl_attackpat68 5 | .align 16 6 | .type autohelperowl_attackpat68,@function 7 | autohelperowl_attackpat68: // @autohelperowl_attackpat68 8 | // BB#0: 9 | { 10 | r0 = r2 11 | r4 = r1 12 | r3 = r0 13 | allocframe(#16) 14 | } 15 | { 16 | r3 = add(##transformation, asl(r3, #2)) 17 | r2 = #2 18 | r1 = #0 19 | } 20 | { 21 | r5 = memw(r3 + ##20672) 22 | r3 = memw(r3 + ##21856) 23 | } 24 | { 25 | r5 = add(r5, r4) 26 | r3 = add(r3, r4) 27 | memw(r29 + #8) = r4 28 | memw(r29 + #0) = r4 29 | } 30 | { 31 | call play_attack_defend2_n 32 | memw(r29 + #12) = r5 33 | memw(r29 + #4) = r3 34 | } 35 | { 36 | dealloc_return 37 | } 38 | .Lfunc_end0: 39 | .size autohelperowl_attackpat68, .Lfunc_end0-autohelperowl_attackpat68 40 | 41 | 42 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 43 | .section ".note.GNU-stack","",@progbits 44 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/size/gcc.insn-output.output_51.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gcc.insn-output.output_51.ll" 3 | .hidden output_51 4 | .globl output_51 5 | .align 16 6 | .type output_51,@function 7 | output_51: // @output_51 8 | // BB#0: 9 | { 10 | r16 = r1 11 | memd(r29 + #-16) = r17:16 12 | allocframe(#8) 13 | } 14 | { 15 | call get_attr_type 16 | r0 = r16 17 | } 18 | { 19 | r1:0 = combine(r0, ##.str.2014) 20 | } 21 | { 22 | p0 = cmp.eq(r1, #8); if (p0.new) jump:nt .LBB0_2 23 | } 24 | { 25 | jump .LBB0_1 26 | } 27 | .LBB0_1: 28 | { 29 | call get_attr_mode 30 | r0 = r16 31 | } 32 | { 33 | p0 = cmp.eq(r0, #4) 34 | if (p0.new) r0 = ##.str.2015 35 | } 36 | { 37 | if (!p0) r0 = ##.str.75 38 | } 39 | .LBB0_2: 40 | { 41 | r17:16 = memd(r29 + #0) 42 | dealloc_return 43 | } 44 | .Lfunc_end0: 45 | .size output_51, .Lfunc_end0-output_51 46 | 47 | .hidden .str.75 48 | .hidden .str.2014 49 | .hidden .str.2015 50 | 51 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 52 | .section ".note.GNU-stack","",@progbits 53 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/size/gobmk.barriers.autohelperbarrierspat145.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gobmk.barriers.autohelperbarrierspat145.ll" 3 | .hidden autohelperbarrierspat145 4 | .globl autohelperbarrierspat145 5 | .align 16 6 | .type autohelperbarrierspat145,@function 7 | autohelperbarrierspat145: // @autohelperbarrierspat145 8 | // BB#0: 9 | { 10 | r3 = r1 11 | r16 = r2 12 | memd(r29 + #-16) = r17:16 13 | allocframe(#8) 14 | } 15 | { 16 | r0 = add(##transformation, asl(r0, #2)) 17 | r1 = r16 18 | } 19 | { 20 | r2 = memw(r0 + ##19552) 21 | r4 = memw(r0 + ##20736) 22 | } 23 | { 24 | call influence_mark_non_territory 25 | r0 = add(r2, r3) 26 | r17 = add(r4, r3) 27 | } 28 | { 29 | call influence_mark_non_territory 30 | r1:0 = combine(r16, r17) 31 | } 32 | { 33 | r0 = #0 34 | r17:16 = memd(r29 + #0) 35 | dealloc_return 36 | } 37 | .Lfunc_end0: 38 | .size autohelperbarrierspat145, .Lfunc_end0-autohelperbarrierspat145 39 | 40 | 41 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 42 | .section ".note.GNU-stack","",@progbits 43 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/speed/gobmk.barriers.autohelperbarrierspat145.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gobmk.barriers.autohelperbarrierspat145.ll" 3 | .hidden autohelperbarrierspat145 4 | .globl autohelperbarrierspat145 5 | .align 16 6 | .type autohelperbarrierspat145,@function 7 | autohelperbarrierspat145: // @autohelperbarrierspat145 8 | // BB#0: 9 | { 10 | r3 = r1 11 | r16 = r2 12 | memd(r29 + #-16) = r17:16 13 | allocframe(#8) 14 | } 15 | { 16 | r0 = add(##transformation, asl(r0, #2)) 17 | r1 = r16 18 | } 19 | { 20 | r2 = memw(r0 + ##19552) 21 | r4 = memw(r0 + ##20736) 22 | } 23 | { 24 | call influence_mark_non_territory 25 | r0 = add(r2, r3) 26 | r17 = add(r4, r3) 27 | } 28 | { 29 | call influence_mark_non_territory 30 | r1:0 = combine(r16, r17) 31 | } 32 | { 33 | r0 = #0 34 | r17:16 = memd(r29 + #0) 35 | dealloc_return 36 | } 37 | .Lfunc_end0: 38 | .size autohelperbarrierspat145, .Lfunc_end0-autohelperbarrierspat145 39 | 40 | 41 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 42 | .section ".note.GNU-stack","",@progbits 43 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/speed/gcc.insn-output.output_51.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gcc.insn-output.output_51.ll" 3 | .hidden output_51 4 | .globl output_51 5 | .align 16 6 | .type output_51,@function 7 | output_51: // @output_51 8 | // BB#0: 9 | { 10 | r16 = r1 11 | memd(r29 + #-16) = r17:16 12 | allocframe(#8) 13 | } 14 | { 15 | call get_attr_type 16 | r0 = r16 17 | } 18 | { 19 | r0 = ##.str.2014 20 | r1 = r0 21 | } 22 | { 23 | p0 = cmp.eq(r1, #8); if (p0.new) jump:nt .LBB0_2 24 | } 25 | { 26 | jump .LBB0_1 27 | } 28 | .LBB0_1: 29 | { 30 | call get_attr_mode 31 | r0 = r16 32 | } 33 | { 34 | p0 = cmp.eq(r0, #4) 35 | if (p0.new) r0 = ##.str.2015 36 | } 37 | { 38 | if (!p0) r0 = ##.str.75 39 | } 40 | .LBB0_2: 41 | { 42 | r17:16 = memd(r29 + #0) 43 | dealloc_return 44 | } 45 | .Lfunc_end0: 46 | .size output_51, .Lfunc_end0-output_51 47 | 48 | .hidden .str.75 49 | .hidden .str.2014 50 | .hidden .str.2015 51 | 52 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 53 | .section ".note.GNU-stack","",@progbits 54 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Transformations/EstimateFrequency.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Transformations.EstimateFrequency (estimateFrequency) where 13 | 14 | import Data.Maybe 15 | import qualified Data.Map as M 16 | 17 | import Unison.Base 18 | import Unison.Target.API 19 | import qualified Unison.Graphs.BCFG as BCFG 20 | import qualified Unison.Graphs.DT as DT 21 | import Unison.Analysis.FrequencyEstimation 22 | 23 | estimateFrequency f @ Function {fCode = code} target = 24 | let bif = branchInfo target 25 | bcfg = BCFG.fromFunction bif f 26 | bdt = DT.fromCFG bcfg 27 | freq = fromNaturalLoops loopFactor bcfg bdt 28 | code' = map (fillBlockFreq freq) code 29 | in f {fCode = code'} 30 | 31 | fillBlockFreq freq b @ Block {bLab = l, bAs = attrs} 32 | | isJust (aFreq attrs) = b 33 | | otherwise = b {bAs = (attrs {aFreq = Just (freq M.! l)})} 34 | 35 | -- | Estimated average number of loop iterations 36 | loopFactor = 10 37 | -------------------------------------------------------------------------------- /doc/model-variables.tex: -------------------------------------------------------------------------------- 1 | \begin{longtable}{ l p{12cm} } 2 | \modelVariable{\activeOperation{o}}{\set{0, 1}}{whether operation $o$ is active} 3 | \tableSpace 4 | \modelVariable{\operationInstruction{o}}{\instructions{o}}{instruction that implements operation $o$} 5 | \tableSpace 6 | \modelVariable{\liveTemporary{t}}{\set{0, 1}}{whether temporary $t$ is live} 7 | \tableSpace 8 | \modelVariable{\temporaryRegister{t}}{\naturalNumbersZero}{register to which temporary $t$ is assigned} 9 | \tableSpace 10 | \modelVariable{\connectedOperand{p}}{\set{0, 1}}{whether operand $p$ is connected} 11 | \tableSpace 12 | \modelVariable{\operandTemporary{p}}{\temps{p}}{temporary that is connected to operand $p$} 13 | \tableSpace 14 | \modelVariable{\operationIssueCycle{o}}{\naturalNumbersZero}{issue cycle of operation $o$ relative 15 | to the beginning of its block} 16 | \tableSpace 17 | \modelVariable{\temporaryLiveStart{t}}{\naturalNumbersZero}{live start of temporary 18 | $t$} 19 | \tableSpace 20 | \modelVariable{\temporaryLiveEnd{t}}{\naturalNumbersZero}{live end of temporary $t$} 21 | \tableSpace 22 | \modelVariable{\operandLatencySlack{p}}{\integerNumbers}{latency slack of global operand $p$} 23 | \end{longtable} 24 | -------------------------------------------------------------------------------- /src/unison/test/fast/Mips/size/gcc.expmed.ceil_log2.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .abicalls 3 | .section .mdebug.abi32,"",@progbits 4 | .nan legacy 5 | .file "gcc.expmed.ceil_log2.ll" 6 | .text 7 | .globl ceil_log2 8 | .align 2 9 | .type ceil_log2,@function 10 | .set nomicromips 11 | .set nomips16 12 | .ent ceil_log2 13 | ceil_log2: # @ceil_log2 14 | .frame $sp,24,$ra 15 | .mask 0x80000000,-4 16 | .fmask 0x00000000,0 17 | .set noreorder 18 | .set nomacro 19 | .set noat 20 | # BB#0: 21 | lui $2, %hi(_gp_disp) 22 | addiu $2, $2, %lo(_gp_disp) 23 | addiu $sp, $sp, -24 24 | sw $ra, 20($sp) # 4-byte Folded Spill 25 | addu $gp, $2, $25 26 | lw $25, %call16(floor_log2_wide)($gp) 27 | jalr $25 28 | addiu $4, $4, -1 29 | addiu $2, $2, 1 30 | lw $ra, 20($sp) # 4-byte Folded Reload 31 | jr $ra 32 | addiu $sp, $sp, 24 33 | .set at 34 | .set macro 35 | .set reorder 36 | .end ceil_log2 37 | $func_end0: 38 | .size ceil_log2, ($func_end0)-ceil_log2 39 | 40 | 41 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 42 | .section ".note.GNU-stack","",@progbits 43 | .text 44 | -------------------------------------------------------------------------------- /src/unison/test/fast/Mips/speed/gcc.expmed.ceil_log2.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .abicalls 3 | .section .mdebug.abi32,"",@progbits 4 | .nan legacy 5 | .file "gcc.expmed.ceil_log2.ll" 6 | .text 7 | .globl ceil_log2 8 | .align 2 9 | .type ceil_log2,@function 10 | .set nomicromips 11 | .set nomips16 12 | .ent ceil_log2 13 | ceil_log2: # @ceil_log2 14 | .frame $sp,24,$ra 15 | .mask 0x80000000,-4 16 | .fmask 0x00000000,0 17 | .set noreorder 18 | .set nomacro 19 | .set noat 20 | # BB#0: 21 | lui $2, %hi(_gp_disp) 22 | addiu $2, $2, %lo(_gp_disp) 23 | addiu $sp, $sp, -24 24 | sw $ra, 20($sp) # 4-byte Folded Spill 25 | addu $gp, $2, $25 26 | lw $25, %call16(floor_log2_wide)($gp) 27 | jalr $25 28 | addiu $4, $4, -1 29 | addiu $2, $2, 1 30 | lw $ra, 20($sp) # 4-byte Folded Reload 31 | jr $ra 32 | addiu $sp, $sp, 24 33 | .set at 34 | .set macro 35 | .set reorder 36 | .end ceil_log2 37 | $func_end0: 38 | .size ceil_log2, ($func_end0)-ceil_log2 39 | 40 | 41 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 42 | .section ".note.GNU-stack","",@progbits 43 | .text 44 | -------------------------------------------------------------------------------- /src/unison/src/MachineIR/Transformations/LiftBlockFreqs.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module MachineIR.Transformations.LiftBlockFreqs (liftBlockFreqs) where 13 | 14 | import Data.List 15 | import MachineIR 16 | 17 | liftBlockFreqs mf @ MachineFunction {mfBlocks = mbs} _target = 18 | let mbs' = map liftBlockFreq mbs 19 | mf' = mf {mfBlocks = mbs'} 20 | in mf' 21 | 22 | liftBlockFreq mb @ MachineBlock {mbProperties = mps, 23 | mbInstructions = mis} = 24 | case partition isMachineBlockFreqInstruction mis of 25 | ([MachineSingle {msOperands = MachineBlockFreq {mbfFreq = f} : _}], mis') -> 26 | let mps' = mps ++ [mkMachineBlockPropertyFreq f] 27 | in mb {mbProperties = mps', mbInstructions = mis'} 28 | _ -> mb 29 | 30 | isMachineBlockFreqInstruction 31 | MachineSingle {msOpcode = MachineVirtualOpc ANNOTATION_LABEL, 32 | msOperands = MachineBlockFreq {} :_} = True 33 | isMachineBlockFreqInstruction _ = False 34 | -------------------------------------------------------------------------------- /src/unison/test/fast/Mips/size/mesa.api.glIndexd.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .abicalls 3 | .section .mdebug.abi32,"",@progbits 4 | .nan legacy 5 | .file "mesa.api.glIndexd.ll" 6 | .text 7 | .globl glIndexd 8 | .align 2 9 | .type glIndexd,@function 10 | .set nomicromips 11 | .set nomips16 12 | .ent glIndexd 13 | glIndexd: # @glIndexd 14 | .frame $sp,24,$ra 15 | .mask 0x80000000,-4 16 | .fmask 0x00000000,0 17 | .set noreorder 18 | .set nomacro 19 | .set noat 20 | # BB#0: 21 | lui $2, %hi(_gp_disp) 22 | addiu $2, $2, %lo(_gp_disp) 23 | addiu $sp, $sp, -24 24 | sw $ra, 20($sp) # 4-byte Folded Spill 25 | addu $1, $2, $25 26 | lw $1, %got(CC)($1) 27 | lw $4, 0($1) 28 | lw $25, 380($4) 29 | cvt.s.d $f0, $f12 30 | jalr $25 31 | mfc1 $5, $f0 32 | lw $ra, 20($sp) # 4-byte Folded Reload 33 | jr $ra 34 | addiu $sp, $sp, 24 35 | .set at 36 | .set macro 37 | .set reorder 38 | .end glIndexd 39 | $func_end0: 40 | .size glIndexd, ($func_end0)-glIndexd 41 | 42 | 43 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 44 | .section ".note.GNU-stack","",@progbits 45 | .text 46 | -------------------------------------------------------------------------------- /src/unison/test/fast/Mips/speed/mesa.api.glIndexd.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .abicalls 3 | .section .mdebug.abi32,"",@progbits 4 | .nan legacy 5 | .file "mesa.api.glIndexd.ll" 6 | .text 7 | .globl glIndexd 8 | .align 2 9 | .type glIndexd,@function 10 | .set nomicromips 11 | .set nomips16 12 | .ent glIndexd 13 | glIndexd: # @glIndexd 14 | .frame $sp,24,$ra 15 | .mask 0x80000000,-4 16 | .fmask 0x00000000,0 17 | .set noreorder 18 | .set nomacro 19 | .set noat 20 | # BB#0: 21 | lui $2, %hi(_gp_disp) 22 | addiu $2, $2, %lo(_gp_disp) 23 | addiu $sp, $sp, -24 24 | sw $ra, 20($sp) # 4-byte Folded Spill 25 | addu $1, $2, $25 26 | lw $1, %got(CC)($1) 27 | lw $4, 0($1) 28 | lw $25, 380($4) 29 | cvt.s.d $f0, $f12 30 | jalr $25 31 | mfc1 $5, $f0 32 | lw $ra, 20($sp) # 4-byte Folded Reload 33 | jr $ra 34 | addiu $sp, $sp, 24 35 | .set at 36 | .set macro 37 | .set reorder 38 | .end glIndexd 39 | $func_end0: 40 | .size glIndexd, ($func_end0)-glIndexd 41 | 42 | 43 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 44 | .section ".note.GNU-stack","",@progbits 45 | .text 46 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Target/Hexagon/SpecsGen/HexagonRegisterClassDecl.hs: -------------------------------------------------------------------------------- 1 | -- This file has been generated by specsgen. Do not modify by hand! 2 | 3 | module Unison.Target.Hexagon.SpecsGen.HexagonRegisterClassDecl 4 | (HexagonRegisterClass(..)) where 5 | 6 | data HexagonRegisterClass = CtrRegs 7 | | CtrRegs64 8 | | DoubleRegs 9 | | F32 10 | | G128 11 | | G256 12 | | IntRegs 13 | | IntRegsLow8 14 | | M32 15 | | M64 16 | | ModRegs 17 | | P128 18 | | P64 19 | | PredRegs 20 | | RM32 21 | | RM64 22 | | VecDblRegs 23 | | VecDblRegs128B 24 | | VecPredRegs 25 | | VecPredRegs128B 26 | | VectorRegs 27 | | VectorRegs128B 28 | | Ptr_rc 29 | deriving (Eq, Ord, Read, Show) 30 | 31 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Export/BundleOperations.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Export.BundleOperations (bundleOperations) where 13 | 14 | import qualified Data.Map as M 15 | import qualified Data.Set as S 16 | 17 | import Unison 18 | 19 | bundleOperations cycles f @ Function {fCode = code} _ = 20 | let i2c = M.fromList (zip (flatten code) cycles) 21 | bcode = map (toBundleBlock i2c) code 22 | in f {fCode = bcode} 23 | 24 | toBundleBlock i2c b @ Block {bCode = code} = 25 | let code' = filter isActive code 26 | is = S.fromList code' 27 | i2c' = M.filterWithKey (\i _ -> S.member i is) i2c 28 | c2is = foldr mapAppend M.empty [(c, [i]) | (i, c) <- M.toList i2c'] 29 | cs = zip [0 .. fst (M.findMax c2is)] (repeat []) 30 | c2is' = M.toList $ foldr mapAppend c2is cs 31 | bcode = map (Bundle . snd) c2is' 32 | in b {bCode = bcode} 33 | 34 | isActive o | oInstructions o == [mkNullInstruction] = False 35 | isActive _ = True -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/size/gcc.rtlanal.parms_set.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gcc.rtlanal.parms_set.ll" 3 | .hidden parms_set 4 | .globl parms_set 5 | .align 16 6 | .type parms_set,@function 7 | parms_set: // @parms_set 8 | // BB#0: 9 | { 10 | r1 = memub(r0 + #0) 11 | } 12 | { 13 | if (!p0.new) jump:nt .LBB0_4 14 | p0 = cmp.eq(r1, #61) 15 | } 16 | { 17 | jump .LBB0_1 18 | } 19 | .LBB0_1: 20 | { 21 | r1 = memw(r0 + #4) 22 | } 23 | { 24 | if (p0.new) jump:nt .LBB0_4 25 | p0 = cmp.gtu(r1, #52) 26 | } 27 | { 28 | jump .LBB0_2 29 | } 30 | .LBB0_2: 31 | { 32 | r0 = memw(r2 + #4) 33 | } 34 | { 35 | p0 = !tstbit(r0, r1) 36 | if (p0.new) jump:nt .LBB0_4 37 | } 38 | { 39 | jump .LBB0_3 40 | } 41 | .LBB0_3: 42 | { 43 | r1 = lsl(#1, r1) 44 | r3 = #-1 45 | memw(r2+#0) -= #1 46 | } 47 | { 48 | r0 &= xor(r1, r3) 49 | memw(r2+#4) = r0.new 50 | } 51 | .LBB0_4: 52 | { 53 | jumpr r31 54 | } 55 | .Lfunc_end0: 56 | .size parms_set, .Lfunc_end0-parms_set 57 | 58 | 59 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 60 | .section ".note.GNU-stack","",@progbits 61 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/speed/gcc.rtlanal.parms_set.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gcc.rtlanal.parms_set.ll" 3 | .hidden parms_set 4 | .globl parms_set 5 | .align 16 6 | .type parms_set,@function 7 | parms_set: // @parms_set 8 | // BB#0: 9 | { 10 | r1 = memub(r0 + #0) 11 | } 12 | { 13 | if (!p0.new) jump:nt .LBB0_4 14 | p0 = cmp.eq(r1, #61) 15 | } 16 | { 17 | jump .LBB0_1 18 | } 19 | .LBB0_1: 20 | { 21 | r1 = memw(r0 + #4) 22 | } 23 | { 24 | if (p0.new) jump:nt .LBB0_4 25 | p0 = cmp.gtu(r1, #52) 26 | } 27 | { 28 | jump .LBB0_2 29 | } 30 | .LBB0_2: 31 | { 32 | r0 = memw(r2 + #4) 33 | } 34 | { 35 | p0 = !tstbit(r0, r1) 36 | if (p0.new) jump:nt .LBB0_4 37 | } 38 | { 39 | jump .LBB0_3 40 | } 41 | .LBB0_3: 42 | { 43 | r1 = lsl(#1, r1) 44 | r3 = #-1 45 | memw(r2+#0) -= #1 46 | } 47 | { 48 | r0 &= xor(r1, r3) 49 | memw(r2+#4) = r0.new 50 | } 51 | .LBB0_4: 52 | { 53 | jumpr r31 54 | } 55 | .Lfunc_end0: 56 | .size parms_set, .Lfunc_end0-parms_set 57 | 58 | 59 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 60 | .section ".note.GNU-stack","",@progbits 61 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Import/LowerCalls.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Import.LowerCalls (lowerCalls) where 13 | 14 | import Unison.Target.API 15 | import MachineIR 16 | 17 | lowerCalls mf target = 18 | let itf = instructionType target 19 | oif = operandInfo target 20 | mf' = mapToMachineBlock (lowerCallInBlock (itf, oif)) mf 21 | in mf' 22 | 23 | lowerCallInBlock fs mb @ MachineBlock {mbInstructions = mis} = 24 | mb {mbInstructions = concatMap (lowerCall fs) mis} 25 | 26 | lowerCall (itf, oif) mi @ MachineSingle {msOpcode = MachineTargetOpc i, 27 | msOperands = mos} 28 | | isMachineCallOrTailCall itf mi = 29 | let oi = oif i 30 | n = length (fst oi) + length (snd oi) 31 | (cmos, fmos) = splitAt n mos 32 | mi' = mi {msOperands = cmos} 33 | mf = mkMachineSingle (mkMachineVirtualOpc FUN) [] 34 | (filter isMachineReg fmos) 35 | in [mi', mf] 36 | 37 | lowerCall _ mi = [mi] 38 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Transformations/PropagatePhiCongruences.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Transformations.PropagatePhiCongruences 13 | (propagatePhiCongruences) where 14 | 15 | import Common.Util 16 | 17 | import Unison.Base 18 | import Unison.Util 19 | import Unison.Predicates 20 | 21 | propagatePhiCongruences f @ Function {fCode = code} _target = 22 | let phis = concatMap collectPhis code 23 | sourcedCode = foldl sourceDef code phis 24 | sinkedCode = foldl sinkUses sourcedCode phis 25 | cs = concatMap duplicateTuple phis 26 | in f {fCode = sinkedCode, fCongruences = cs} 27 | 28 | collectPhis Block {bLab = l, bCode = code} = 29 | [(l, phiUses i, fromSingleton $ oDefs i) | i <- code, isPhi i] 30 | 31 | sourceDef code (l, _, d) = applyToBlock (addToIn [d]) code l 32 | 33 | sinkUses code (_, us, _) = foldl sinkUse code us 34 | sinkUse code (u, p) = applyToBlock (addToOut [u]) code p 35 | 36 | duplicateTuple (_, us, d) = [(u, d) | (u, _) <- us] 37 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Import/MovePhiUndefs.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2019, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Import.MovePhiUndefs (movePhiUndefs) where 13 | 14 | import Data.List 15 | import Data.Maybe 16 | 17 | import Unison 18 | 19 | movePhiUndefs f @ Function {fCode = code} _ = 20 | let code' = fixpoint movePhiUndef code 21 | in f {fCode = code'} 22 | 23 | movePhiUndef code = 24 | case find (isPhiDefine code) (flatten code) of 25 | Nothing -> code 26 | Just d -> 27 | let code1 = filterCode (not . isIdOf d) code 28 | p = fromJust $ definePhi code d 29 | src = fromJust $ lookup (oSingleDef d) (phiUses p) 30 | code2 = applyToBlock (insertWhen before isBranch [d]) code1 src 31 | in code2 32 | 33 | isPhiDefine code = isJust . definePhi code 34 | 35 | definePhi code d @ SingleOperation {oOpr = Virtual Define {oDefineDs = [t]}} = 36 | case users t (flatten code) of 37 | [p] | isPhi p && oprBlock code d == oprBlock code p -> Just p 38 | _ -> Nothing 39 | definePhi _ _ = Nothing 40 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Augment/AddDataCongruences.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Augment.AddDataCongruences (addDataCongruences) where 13 | 14 | import Data.List 15 | import Data.Maybe 16 | 17 | import Unison 18 | 19 | addDataCongruences f @ Function {fCode = code, fCongruences = cs} _target = 20 | let dataCs = concatMap blockDataCongruences code 21 | cs' = cs ++ dataCs 22 | cs'' = sort cs' 23 | in f {fCongruences = cs''} 24 | 25 | blockDataCongruences Block {bCode = code} = 26 | let ps = concat [[p | p <- oAllOps i, isSingletonChoice p] | i <- code] 27 | in concatMap (dataCongruences code) ps 28 | 29 | dataCongruences code p = concatMap (instructionDataCongruence p) code 30 | 31 | instructionDataCongruence p = mapMaybe (operandDataCongruence p) . oUseOperands 32 | 33 | operandDataCongruence p q 34 | | p `isEquivalentTo` q && p /= q = Just $ mapTuple toCongruenceOp (p, q) 35 | | otherwise = Nothing 36 | 37 | isSingletonChoice MOperand {altTemps = [_]} = True 38 | isSingletonChoice _ = False -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Extend/GroupCalls.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Extend.GroupCalls (groupCalls) where 13 | 14 | import Data.List.Split 15 | 16 | import Unison 17 | 18 | groupCalls f @ Function {fCode = code} _target = 19 | let code' = map groupCallsInBlock code 20 | in f {fCode = code'} 21 | 22 | groupCallsInBlock b @ Block {bCode = code} = 23 | let code' = groupOperations (True, isCall, isFun) code 24 | code'' = groupOperations (False, isFun, isKill) code' 25 | in b {bCode = code''} 26 | 27 | groupOperations (left, f1, f2) code = 28 | let codes = split (whenElt (\o -> f1 o || f2 o)) code 29 | codes' = groupOperations' (left, f1, f2) codes 30 | in concat codes' 31 | 32 | groupOperations' (left, f1, f2) ([o1]:(os:([o2]:codes))) | f1 o1 && f2 o2 = 33 | (if left then os else []):[o1]:[o2]:(if left then [] else os): 34 | groupOperations' (left, f1, f2) codes 35 | groupOperations' info (os:codes) = os:groupOperations' info codes 36 | groupOperations' _ [] = [] 37 | 38 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/size/sphinx3.profile.ptmr_init.stats: -------------------------------------------------------------------------------- 1 | CV-of-the-register-class-weights-(pre-RA) 0.000000 2 | Weighted-instructions-per-bundle 2.250000 3 | Number-of-machine-instrs-printed 4 4 | Number-of-dag-nodes-combined 7 5 | Number-of-blocks-selected-using-DAG 1 6 | Number-of-entry-blocks-encountered 1 7 | Number-of-times-dag-isel-has-to-try-another-path 120 8 | Maximum-number-of-instructions-in-a-block-(post-RA) 9 9 | Maximum-number-of-instructions-in-a-block-(pre-RA) 10 10 | Number-of-basic-blocks-(post-RA) 1 11 | Number-of-basic-blocks-(pre-RA) 1 12 | Number-of-copy-instructions-(pre-RA) 1 13 | Number-of-machine-instructions-(post-RA) 9 14 | Number-of-machine-instructions-(pre-RA) 10 15 | Number-of-register-classes-(pre-RA) 1 16 | Number-of-virtual-registers-(post-RA) 1 17 | Number-of-virtual-registers-(pre-RA) 2 18 | Number-of-identity-moves-eliminated-after-rewriting 1 19 | Number-of-registers-assigned 1 20 | Number-of-local-renumberings 2 21 | Number-of-functions-skipped 1 22 | Number-of-functions-visited 1 23 | Function-name ptmr_init 24 | Module-name profile 25 | Application-name sphinx3 26 | Percent-of-copy-instructions 0.1 27 | Percent-of-call-instructions 0.0 28 | Percent-of-spilled-virtual-registers 4.94065645841e-324 29 | Percent-of-remat-instructions 0.0 30 | Instructions-per-block 10.0 31 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/speed/sphinx3.profile.ptmr_init.stats: -------------------------------------------------------------------------------- 1 | CV-of-the-register-class-weights-(pre-RA) 0.000000 2 | Weighted-instructions-per-bundle 2.250000 3 | Number-of-machine-instrs-printed 4 4 | Number-of-dag-nodes-combined 7 5 | Number-of-blocks-selected-using-DAG 1 6 | Number-of-entry-blocks-encountered 1 7 | Number-of-times-dag-isel-has-to-try-another-path 120 8 | Maximum-number-of-instructions-in-a-block-(post-RA) 9 9 | Maximum-number-of-instructions-in-a-block-(pre-RA) 10 10 | Number-of-basic-blocks-(post-RA) 1 11 | Number-of-basic-blocks-(pre-RA) 1 12 | Number-of-copy-instructions-(pre-RA) 1 13 | Number-of-machine-instructions-(post-RA) 9 14 | Number-of-machine-instructions-(pre-RA) 10 15 | Number-of-register-classes-(pre-RA) 1 16 | Number-of-virtual-registers-(post-RA) 1 17 | Number-of-virtual-registers-(pre-RA) 2 18 | Number-of-identity-moves-eliminated-after-rewriting 1 19 | Number-of-registers-assigned 1 20 | Number-of-local-renumberings 2 21 | Number-of-functions-skipped 1 22 | Number-of-functions-visited 1 23 | Function-name ptmr_init 24 | Module-name profile 25 | Application-name sphinx3 26 | Percent-of-copy-instructions 0.1 27 | Percent-of-call-instructions 0.0 28 | Percent-of-spilled-virtual-registers 4.94065645841e-324 29 | Percent-of-remat-instructions 0.0 30 | Instructions-per-block 10.0 31 | -------------------------------------------------------------------------------- /src/unison/test/fast/Mips/size/gobmk.board.get_last_player.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .abicalls 3 | .section .mdebug.abi32,"",@progbits 4 | .nan legacy 5 | .file "gobmk.board.get_last_player.ll" 6 | .text 7 | .globl get_last_player 8 | .align 2 9 | .type get_last_player,@function 10 | .set nomicromips 11 | .set nomips16 12 | .ent get_last_player 13 | get_last_player: # @get_last_player 14 | .frame $sp,0,$ra 15 | .mask 0x00000000,0 16 | .fmask 0x00000000,0 17 | .set noreorder 18 | .set nomacro 19 | .set noat 20 | # BB#0: 21 | lui $2, %hi(_gp_disp) 22 | addiu $2, $2, %lo(_gp_disp) 23 | addu $3, $2, $25 24 | lw $1, %got(move_history_pointer)($3) 25 | lw $4, 0($1) 26 | beqz $4, $BB0_3 27 | addiu $2, $zero, 0 28 | # BB#1: 29 | b $BB0_2 30 | nop 31 | $BB0_2: 32 | sll $1, $4, 2 33 | lw $2, %got(move_history_color)($3) 34 | addu $1, $1, $2 35 | lw $2, -4($1) 36 | $BB0_3: 37 | jr $ra 38 | nop 39 | .set at 40 | .set macro 41 | .set reorder 42 | .end get_last_player 43 | $func_end0: 44 | .size get_last_player, ($func_end0)-get_last_player 45 | 46 | 47 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 48 | .section ".note.GNU-stack","",@progbits 49 | .text 50 | -------------------------------------------------------------------------------- /src/unison/test/fast/Mips/speed/gobmk.board.get_last_player.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .abicalls 3 | .section .mdebug.abi32,"",@progbits 4 | .nan legacy 5 | .file "gobmk.board.get_last_player.ll" 6 | .text 7 | .globl get_last_player 8 | .align 2 9 | .type get_last_player,@function 10 | .set nomicromips 11 | .set nomips16 12 | .ent get_last_player 13 | get_last_player: # @get_last_player 14 | .frame $sp,0,$ra 15 | .mask 0x00000000,0 16 | .fmask 0x00000000,0 17 | .set noreorder 18 | .set nomacro 19 | .set noat 20 | # BB#0: 21 | lui $2, %hi(_gp_disp) 22 | addiu $2, $2, %lo(_gp_disp) 23 | addu $3, $2, $25 24 | lw $1, %got(move_history_pointer)($3) 25 | lw $4, 0($1) 26 | beqz $4, $BB0_3 27 | addiu $2, $zero, 0 28 | # BB#1: 29 | b $BB0_2 30 | nop 31 | $BB0_2: 32 | sll $1, $4, 2 33 | lw $2, %got(move_history_color)($3) 34 | addu $1, $1, $2 35 | lw $2, -4($1) 36 | $BB0_3: 37 | jr $ra 38 | nop 39 | .set at 40 | .set macro 41 | .set reorder 42 | .end get_last_player 43 | $func_end0: 44 | .size get_last_player, ($func_end0)-get_last_player 45 | 46 | 47 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 48 | .section ".note.GNU-stack","",@progbits 49 | .text 50 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Legalize.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | {-# LANGUAGE DeriveDataTypeable, RecordWildCards #-} 13 | module Unison.Tools.Legalize (run) where 14 | 15 | import Unison 16 | import Unison.Driver 17 | import Unison.Parser 18 | import Unison.Target.API 19 | 20 | import Unison.Transformations.RenameBlocks 21 | import Unison.Transformations.RenameTemps 22 | import Unison.Transformations.RenameMOperands 23 | import Unison.Transformations.RenameOperations 24 | 25 | run legalUniFile uni target = 26 | let f = parse target uni 27 | (f', _) = 28 | applyTransformations 29 | legalizerTransformations 30 | target f 31 | in emitOutput legalUniFile (show f') 32 | 33 | legalizerTransformations :: Ord r => 34 | [(Function i r -> TargetWithOptions i r rc s -> Function i r, String, Bool)] 35 | legalizerTransformations = 36 | [(renameBlocks, "renameBlocks", True), 37 | (renameTemps, "renameTemps", True), 38 | (renameMOperands, "renameMOperands", True), 39 | (renameOperations, "renameOperations", True)] 40 | -------------------------------------------------------------------------------- /src/unison/test/fast/Mips/size/sphinx3.profile.ptmr_init.stats: -------------------------------------------------------------------------------- 1 | CV-of-the-register-class-weights-(pre-RA) 0.000000 2 | Weighted-instructions-per-bundle 1.000000 3 | Number-of-machine-instrs-printed 8 4 | Number-of-dag-nodes-combined 7 5 | Number-of-delay-slots-filled 1 6 | Number-of-delay-slots-filled-with-instructions-that-are-not-NOP. 1 7 | Number-of-blocks-selected-using-DAG 1 8 | Number-of-entry-blocks-encountered 1 9 | Number-of-times-dag-isel-has-to-try-another-path 24 10 | Maximum-number-of-instructions-in-a-block-(post-RA) 9 11 | Maximum-number-of-instructions-in-a-block-(pre-RA) 10 12 | Number-of-basic-blocks-(post-RA) 1 13 | Number-of-basic-blocks-(pre-RA) 1 14 | Number-of-copy-instructions-(pre-RA) 1 15 | Number-of-machine-instructions-(post-RA) 9 16 | Number-of-machine-instructions-(pre-RA) 10 17 | Number-of-register-classes-(pre-RA) 1 18 | Number-of-virtual-registers-(pre-RA) 1 19 | Number-of-identity-moves-eliminated-after-rewriting 1 20 | Number-of-registers-assigned 1 21 | Number-of-functions-skipped 1 22 | Number-of-functions-visited 1 23 | Function-name ptmr_init 24 | Module-name profile 25 | Application-name sphinx3 26 | Percent-of-copy-instructions 0.1 27 | Percent-of-call-instructions 0.0 28 | Percent-of-spilled-virtual-registers 1.0 29 | Percent-of-remat-instructions 0.0 30 | Instructions-per-block 10.0 31 | -------------------------------------------------------------------------------- /src/unison/test/fast/Mips/speed/sphinx3.profile.ptmr_init.stats: -------------------------------------------------------------------------------- 1 | CV-of-the-register-class-weights-(pre-RA) 0.000000 2 | Weighted-instructions-per-bundle 1.000000 3 | Number-of-machine-instrs-printed 8 4 | Number-of-dag-nodes-combined 7 5 | Number-of-delay-slots-filled 1 6 | Number-of-delay-slots-filled-with-instructions-that-are-not-NOP. 1 7 | Number-of-blocks-selected-using-DAG 1 8 | Number-of-entry-blocks-encountered 1 9 | Number-of-times-dag-isel-has-to-try-another-path 24 10 | Maximum-number-of-instructions-in-a-block-(post-RA) 9 11 | Maximum-number-of-instructions-in-a-block-(pre-RA) 10 12 | Number-of-basic-blocks-(post-RA) 1 13 | Number-of-basic-blocks-(pre-RA) 1 14 | Number-of-copy-instructions-(pre-RA) 1 15 | Number-of-machine-instructions-(post-RA) 9 16 | Number-of-machine-instructions-(pre-RA) 10 17 | Number-of-register-classes-(pre-RA) 1 18 | Number-of-virtual-registers-(pre-RA) 1 19 | Number-of-identity-moves-eliminated-after-rewriting 1 20 | Number-of-registers-assigned 1 21 | Number-of-functions-skipped 1 22 | Number-of-functions-visited 1 23 | Function-name ptmr_init 24 | Module-name profile 25 | Application-name sphinx3 26 | Percent-of-copy-instructions 0.1 27 | Percent-of-call-instructions 0.0 28 | Percent-of-spilled-virtual-registers 1.0 29 | Percent-of-remat-instructions 0.0 30 | Instructions-per-block 10.0 31 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Import/NormalizePhis.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Import.NormalizePhis (normalizePhis) where 13 | 14 | import Data.List 15 | 16 | import Unison 17 | import Unison.Target.API 18 | import MachineIR 19 | 20 | normalizePhis mf target = 21 | let itf = instructionType target 22 | oif = operandInfo target 23 | in mapToMachineInstruction (normalizePhi itf oif) mf 24 | 25 | normalizePhi itf oif mi 26 | | isMachinePhi mi = 27 | let mi1 = toMachineInstruction $ normalizePhiUses $ 28 | fromMachineInstruction itf oif (-1, mi) 29 | mos = map maybeCopyMtFlags (zip (msOperands mi) (msOperands mi1)) 30 | mi2 = mi1 {msOperands = mos} 31 | in mi2 32 | | otherwise = mi 33 | 34 | normalizePhiUses o = 35 | let us = concat [[t, mkBlockRef bid] | (t, bid) <- nub $ phiUses o] 36 | in mapToOperands (const us) id o 37 | 38 | maybeCopyMtFlags (MachineTemp {mtFlags = mtfs}, mt @ MachineTemp {}) = 39 | mt {mtFlags = mtfs} 40 | maybeCopyMtFlags (_, mo) = mo 41 | -------------------------------------------------------------------------------- /doc/figures/llvm.tex: -------------------------------------------------------------------------------- 1 | \input{./figures/styles}% 2 | \pgfsetlayers{layer1,layer2}% 3 | \begin{tikzpicture} 4 | \begin{pgfonlayer}{layer2} 5 | \node [input] (input) {}; 6 | \node [unison stage, right=of input] (clang) {\code{clang}}; 7 | \begin{scope}[node distance=1cm] 8 | \node [unison stage, right=of clang] (opt) {\code{opt}}; 9 | \node [unison stage, right=of opt] (llc) {\code{llc}}; 10 | \node [unison stage, below=of llc] (unison) {\code{unison}}; 11 | \end{scope} 12 | \node [output, right=of llc] (output) {}; 13 | \end{pgfonlayer} 14 | 15 | \begin{pgfonlayer}{layer1} 16 | \begin{scope}[flow] 17 | \draw (input) -- node[yshift=0.4cm] {\code{.c}} (clang); 18 | \draw (clang) -- node[yshift=0.4cm] {\code{.ll}} (opt); 19 | \draw (opt) -- node[yshift=0.4cm] {\code{.ll}} (llc); 20 | \draw ([xshift=-0.1cm] llc.south) -- node[xshift=-0.68cm, yshift=0.2cm] {\code{.mir}} ([xshift=-0.1cm] unison.north); 21 | \draw ([xshift=-0.2cm] llc.south) -- node[xshift=-1cm, yshift=-0.2cm] {\code{.asm.mir}} ([xshift=-0.2cm] unison.north); 22 | \draw ([xshift=0.2cm] unison.north) -- node[xshift=1.3cm] {\code{.unison.mir}} ([xshift=0.2cm] llc.south); 23 | \draw (llc) -- node[yshift=0.4cm] {\code{.s}} (output); 24 | \end{scope} 25 | \end{pgfonlayer} 26 | \end{tikzpicture} 27 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Analysis/FrameOffsets.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | 6 | Algorithms to compute frame offsets. 7 | 8 | -} 9 | {- 10 | Main authors: 11 | Roberto Castaneda Lozano 12 | 13 | This file is part of Unison, see http://unison-code.github.io 14 | -} 15 | module Unison.Analysis.FrameOffsets 16 | (allocateObject, slotSet, frameSize, reoffset) where 17 | 18 | import Data.List 19 | import Data.Maybe 20 | import qualified Data.Set as S 21 | 22 | import Unison 23 | 24 | allocateObject occ obj = 25 | let off = fromJust $ 26 | find (fitsInSlot (foMaybeSize obj) occ) [0, foAlignment obj ..] 27 | obj' = obj {foOffset = off} 28 | occ' = S.union occ (S.fromList $ foSlots obj') 29 | in (occ', obj') 30 | 31 | slotSet objs = S.fromList (concatMap foSlots objs) 32 | 33 | fitsInSlot size occ s = none (\os -> S.member os occ) (slots s size) 34 | 35 | slots init size = [init .. init + size - 1] 36 | 37 | foSlots obj = slots (foOffset obj) (foMaybeSize obj) 38 | 39 | frameSize objs = 40 | let occ = slotSet objs 41 | in if S.null occ then 0 else S.findMax occ + 1 42 | 43 | reoffset delta fo @ FrameObject {foOffset = off} = fo {foOffset = off + delta} 44 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/size/h264ref.sei.UpdateRandomAccess.stats: -------------------------------------------------------------------------------- 1 | CV-of-the-register-class-weights-(pre-RA) 0.000000 2 | Weighted-instructions-per-bundle 2.200000 3 | Number-of-machine-instrs-printed 5 4 | Number-of-GEPs-converted-to-casts 1 5 | Number-of-dag-nodes-combined 5 6 | Number-of-blocks-selected-using-DAG 3 7 | Number-of-entry-blocks-encountered 1 8 | Number-of-times-dag-isel-has-to-try-another-path 72 9 | Number-of-common-subexpression-eliminated 1 10 | Maximum-number-of-instructions-in-a-block-(post-RA) 11 11 | Maximum-number-of-instructions-in-a-block-(pre-RA) 11 12 | Number-of-basic-blocks-(post-RA) 1 13 | Number-of-basic-blocks-(pre-RA) 1 14 | Number-of-machine-instructions-(post-RA) 11 15 | Number-of-machine-instructions-(pre-RA) 11 16 | Number-of-register-classes-(pre-RA) 2 17 | Number-of-virtual-registers-(post-RA) 8 18 | Number-of-virtual-registers-(pre-RA) 8 19 | Number-of-MCExpr-evaluations 12 20 | Number-of-registers-assigned 6 21 | Number-of-local-renumberings 2 22 | Number-of-functions-skipped 1 23 | Number-of-functions-visited 1 24 | Function-name UpdateRandomAccess 25 | Module-name sei 26 | Application-name h264ref 27 | Percent-of-copy-instructions 0.0 28 | Percent-of-call-instructions 0.0 29 | Percent-of-spilled-virtual-registers 0.0 30 | Percent-of-remat-instructions 0.0 31 | Instructions-per-block 11.0 32 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/speed/h264ref.sei.UpdateRandomAccess.stats: -------------------------------------------------------------------------------- 1 | CV-of-the-register-class-weights-(pre-RA) 0.000000 2 | Weighted-instructions-per-bundle 2.200000 3 | Number-of-machine-instrs-printed 5 4 | Number-of-GEPs-converted-to-casts 1 5 | Number-of-dag-nodes-combined 5 6 | Number-of-blocks-selected-using-DAG 3 7 | Number-of-entry-blocks-encountered 1 8 | Number-of-times-dag-isel-has-to-try-another-path 72 9 | Number-of-common-subexpression-eliminated 1 10 | Maximum-number-of-instructions-in-a-block-(post-RA) 11 11 | Maximum-number-of-instructions-in-a-block-(pre-RA) 11 12 | Number-of-basic-blocks-(post-RA) 1 13 | Number-of-basic-blocks-(pre-RA) 1 14 | Number-of-machine-instructions-(post-RA) 11 15 | Number-of-machine-instructions-(pre-RA) 11 16 | Number-of-register-classes-(pre-RA) 2 17 | Number-of-virtual-registers-(post-RA) 8 18 | Number-of-virtual-registers-(pre-RA) 8 19 | Number-of-MCExpr-evaluations 12 20 | Number-of-registers-assigned 6 21 | Number-of-local-renumberings 2 22 | Number-of-functions-skipped 1 23 | Number-of-functions-visited 1 24 | Function-name UpdateRandomAccess 25 | Module-name sei 26 | Application-name h264ref 27 | Percent-of-copy-instructions 0.0 28 | Percent-of-call-instructions 0.0 29 | Percent-of-spilled-virtual-registers 0.0 30 | Percent-of-remat-instructions 0.0 31 | Instructions-per-block 11.0 32 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/size/gcc.alias.get_frame_alias_set.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gcc.alias.get_frame_alias_set.ll" 3 | .globl get_frame_alias_set 4 | .align 16 5 | .type get_frame_alias_set,@function 6 | get_frame_alias_set: // @get_frame_alias_set 7 | // BB#0: 8 | { 9 | r0 = memw(##get_frame_alias_set.set) 10 | if (!cmp.eq(r0.new, #-1)) jump:t .LBB0_4 11 | } 12 | { 13 | jump .LBB0_1 14 | } 15 | .LBB0_1: 16 | { 17 | r0 = #0 18 | r1 = memw(##flag_strict_aliasing) 19 | if (cmp.eq(r1.new, #0)) jump:nt .LBB0_3 20 | } 21 | { 22 | jump .LBB0_2 23 | } 24 | .LBB0_2: 25 | { 26 | r0 = memw(##new_alias_set.last_alias_set) 27 | } 28 | { 29 | r0 = add(r0, #1) 30 | memw(###new_alias_set.last_alias_set) = r0.new 31 | } 32 | .LBB0_3: // %new_alias_set.exit 33 | { 34 | memw(##get_frame_alias_set.set) = r0 35 | } 36 | .LBB0_4: 37 | { 38 | jumpr r31 39 | } 40 | .Lfunc_end0: 41 | .size get_frame_alias_set, .Lfunc_end0-get_frame_alias_set 42 | 43 | .hidden new_alias_set.last_alias_set 44 | .hidden get_frame_alias_set.set 45 | 46 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 47 | .section ".note.GNU-stack","",@progbits 48 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/speed/gcc.alias.get_frame_alias_set.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .file "gcc.alias.get_frame_alias_set.ll" 3 | .globl get_frame_alias_set 4 | .align 16 5 | .type get_frame_alias_set,@function 6 | get_frame_alias_set: // @get_frame_alias_set 7 | // BB#0: 8 | { 9 | r0 = memw(##get_frame_alias_set.set) 10 | if (!cmp.eq(r0.new, #-1)) jump:t .LBB0_4 11 | } 12 | { 13 | jump .LBB0_1 14 | } 15 | .LBB0_1: 16 | { 17 | r0 = #0 18 | r1 = memw(##flag_strict_aliasing) 19 | if (cmp.eq(r1.new, #0)) jump:nt .LBB0_3 20 | } 21 | { 22 | jump .LBB0_2 23 | } 24 | .LBB0_2: 25 | { 26 | r0 = memw(##new_alias_set.last_alias_set) 27 | } 28 | { 29 | r0 = add(r0, #1) 30 | memw(###new_alias_set.last_alias_set) = r0.new 31 | } 32 | .LBB0_3: // %new_alias_set.exit 33 | { 34 | memw(##get_frame_alias_set.set) = r0 35 | } 36 | .LBB0_4: 37 | { 38 | jumpr r31 39 | } 40 | .Lfunc_end0: 41 | .size get_frame_alias_set, .Lfunc_end0-get_frame_alias_set 42 | 43 | .hidden new_alias_set.last_alias_set 44 | .hidden get_frame_alias_set.set 45 | 46 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 47 | .section ".note.GNU-stack","",@progbits 48 | -------------------------------------------------------------------------------- /src/unison/test/fast/Mips/size/gcc.expmed.ceil_log2.ll: -------------------------------------------------------------------------------- 1 | ; ModuleID = 'gcc.expmed.ceil_log2.ll' 2 | target datalayout = "E-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64" 3 | target triple = "mips--linux-gnu" 4 | 5 | ; Function Attrs: nounwind 6 | define i32 @ceil_log2(i32 signext %x) #0 { 7 | %1 = add i32 %x, -1 8 | %2 = tail call i32 @floor_log2_wide(i32 signext %1) #2 9 | %3 = add nsw i32 %2, 1 10 | ret i32 %3 11 | } 12 | 13 | declare i32 @floor_log2_wide(i32 signext) #1 14 | 15 | attributes #0 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="mips32r2" "target-features"="+mips32r2" "unsafe-fp-math"="false" "use-soft-float"="false" } 16 | attributes #1 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="mips32r2" "target-features"="+mips32r2" "unsafe-fp-math"="false" "use-soft-float"="false" } 17 | attributes #2 = { nounwind } 18 | 19 | !llvm.ident = !{!0} 20 | 21 | !0 = !{!"clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)"} 22 | -------------------------------------------------------------------------------- /src/unison/test/fast/Mips/size/sphinx3.glist.glist_tail.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .abicalls 3 | .section .mdebug.abi32,"",@progbits 4 | .nan legacy 5 | .file "sphinx3.glist.glist_tail.ll" 6 | .text 7 | .globl glist_tail 8 | .align 2 9 | .type glist_tail,@function 10 | .set nomicromips 11 | .set nomips16 12 | .ent glist_tail 13 | glist_tail: # @glist_tail 14 | .frame $sp,0,$ra 15 | .mask 0x00000000,0 16 | .fmask 0x00000000,0 17 | .set noreorder 18 | .set nomacro 19 | .set noat 20 | # BB#0: 21 | beqz $4, $BB0_4 22 | addiu $2, $zero, 0 23 | # BB#1: 24 | .insn 25 | $BB0_2: # %.preheader 26 | # =>This Inner Loop Header: Depth=1 27 | move $2, $4 28 | lw $4, 8($2) 29 | bnez $4, $BB0_2 30 | nop 31 | # BB#3: # %.preheader 32 | b $BB0_4 33 | nop 34 | $BB0_4: # %.loopexit 35 | jr $ra 36 | nop 37 | .set at 38 | .set macro 39 | .set reorder 40 | .end glist_tail 41 | $func_end0: 42 | .size glist_tail, ($func_end0)-glist_tail 43 | 44 | 45 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 46 | .section ".note.GNU-stack","",@progbits 47 | .text 48 | -------------------------------------------------------------------------------- /src/unison/test/fast/Mips/speed/gcc.expmed.ceil_log2.ll: -------------------------------------------------------------------------------- 1 | ; ModuleID = 'gcc.expmed.ceil_log2.ll' 2 | target datalayout = "E-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64" 3 | target triple = "mips--linux-gnu" 4 | 5 | ; Function Attrs: nounwind 6 | define i32 @ceil_log2(i32 signext %x) #0 { 7 | %1 = add i32 %x, -1 8 | %2 = tail call i32 @floor_log2_wide(i32 signext %1) #2 9 | %3 = add nsw i32 %2, 1 10 | ret i32 %3 11 | } 12 | 13 | declare i32 @floor_log2_wide(i32 signext) #1 14 | 15 | attributes #0 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="mips32r2" "target-features"="+mips32r2" "unsafe-fp-math"="false" "use-soft-float"="false" } 16 | attributes #1 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="mips32r2" "target-features"="+mips32r2" "unsafe-fp-math"="false" "use-soft-float"="false" } 17 | attributes #2 = { nounwind } 18 | 19 | !llvm.ident = !{!0} 20 | 21 | !0 = !{!"clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)"} 22 | -------------------------------------------------------------------------------- /src/unison/test/fast/Mips/speed/sphinx3.glist.glist_tail.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .abicalls 3 | .section .mdebug.abi32,"",@progbits 4 | .nan legacy 5 | .file "sphinx3.glist.glist_tail.ll" 6 | .text 7 | .globl glist_tail 8 | .align 2 9 | .type glist_tail,@function 10 | .set nomicromips 11 | .set nomips16 12 | .ent glist_tail 13 | glist_tail: # @glist_tail 14 | .frame $sp,0,$ra 15 | .mask 0x00000000,0 16 | .fmask 0x00000000,0 17 | .set noreorder 18 | .set nomacro 19 | .set noat 20 | # BB#0: 21 | beqz $4, $BB0_4 22 | addiu $2, $zero, 0 23 | # BB#1: 24 | .insn 25 | $BB0_2: # %.preheader 26 | # =>This Inner Loop Header: Depth=1 27 | move $2, $4 28 | lw $4, 8($2) 29 | bnez $4, $BB0_2 30 | nop 31 | # BB#3: # %.preheader 32 | b $BB0_4 33 | nop 34 | $BB0_4: # %.loopexit 35 | jr $ra 36 | nop 37 | .set at 38 | .set macro 39 | .set reorder 40 | .end glist_tail 41 | $func_end0: 42 | .size glist_tail, ($func_end0)-glist_tail 43 | 44 | 45 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 46 | .section ".note.GNU-stack","",@progbits 47 | .text 48 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Export/LowerFrameIndices.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Export.LowerFrameIndices (lowerFrameIndices) where 13 | 14 | import qualified Data.Map as M 15 | 16 | import MachineIR 17 | import Unison 18 | 19 | -- This pass replaces stack frame object indices in the code by actual 20 | -- immediates. 21 | 22 | lowerFrameIndices f @ Function {fCode = code, fFixedStackFrame = fobjs, 23 | fStackFrame = objs} _target = 24 | let code' = replaceFIsByImms True fobjs code 25 | code'' = replaceFIsByImms False objs code' 26 | in f {fCode = code''} 27 | 28 | replaceFIsByImms fixed objs code = 29 | let idxToOff = M.fromList [(foIndex fo, foOffset fo) | fo <- objs] 30 | in mapToOperationInBlocks 31 | (mapToOperandIf (isFixedType fixed) (liftFI idxToOff)) code 32 | 33 | isFixedType fixed (Bound (MachineFrameIndex _ fixed' _)) = fixed == fixed' 34 | isFixedType _ _ = False 35 | 36 | liftFI idxToOff (Bound (MachineFrameIndex idx _ off)) = 37 | mkBound (mkMachineImm $ (idxToOff M.! idx) + off) 38 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/size/gcc.expmed.ceil_log2.stats: -------------------------------------------------------------------------------- 1 | CV-of-the-register-class-weights-(pre-RA) 0.000000 2 | Weighted-instructions-per-bundle 2.500000 3 | Number-of-machine-instrs-printed 2 4 | Number-of-blocks-selected-using-DAG 1 5 | Number-of-entry-blocks-encountered 1 6 | Number-of-times-dag-isel-has-to-try-another-path 26 7 | Maximum-number-of-instructions-in-a-block-(post-RA) 6 8 | Maximum-number-of-instructions-in-a-block-(pre-RA) 10 9 | Number-of-basic-blocks-(post-RA) 1 10 | Number-of-basic-blocks-(pre-RA) 1 11 | Number-of-call-instructions-(post-RA) 1 12 | Number-of-call-instructions-(pre-RA) 1 13 | Number-of-copy-instructions-(pre-RA) 4 14 | Number-of-machine-instructions-(post-RA) 6 15 | Number-of-machine-instructions-(pre-RA) 10 16 | Number-of-register-classes-(pre-RA) 1 17 | Number-of-virtual-registers-(post-RA) 31 18 | Number-of-virtual-registers-(pre-RA) 34 19 | Number-of-MCExpr-evaluations 1 20 | Number-of-identity-moves-eliminated-after-rewriting 4 21 | Number-of-registers-assigned 4 22 | Number-of-functions-skipped 1 23 | Number-of-functions-visited 1 24 | Function-name ceil_log2 25 | Module-name expmed 26 | Application-name gcc 27 | Percent-of-copy-instructions 0.4 28 | Percent-of-call-instructions 0.1 29 | Percent-of-spilled-virtual-registers 0.0 30 | Percent-of-remat-instructions 0.0 31 | Instructions-per-block 10.0 32 | -------------------------------------------------------------------------------- /src/unison/test/fast/Hexagon/speed/gcc.expmed.ceil_log2.stats: -------------------------------------------------------------------------------- 1 | CV-of-the-register-class-weights-(pre-RA) 0.000000 2 | Weighted-instructions-per-bundle 2.500000 3 | Number-of-machine-instrs-printed 2 4 | Number-of-blocks-selected-using-DAG 1 5 | Number-of-entry-blocks-encountered 1 6 | Number-of-times-dag-isel-has-to-try-another-path 26 7 | Maximum-number-of-instructions-in-a-block-(post-RA) 6 8 | Maximum-number-of-instructions-in-a-block-(pre-RA) 10 9 | Number-of-basic-blocks-(post-RA) 1 10 | Number-of-basic-blocks-(pre-RA) 1 11 | Number-of-call-instructions-(post-RA) 1 12 | Number-of-call-instructions-(pre-RA) 1 13 | Number-of-copy-instructions-(pre-RA) 4 14 | Number-of-machine-instructions-(post-RA) 6 15 | Number-of-machine-instructions-(pre-RA) 10 16 | Number-of-register-classes-(pre-RA) 1 17 | Number-of-virtual-registers-(post-RA) 31 18 | Number-of-virtual-registers-(pre-RA) 34 19 | Number-of-MCExpr-evaluations 1 20 | Number-of-identity-moves-eliminated-after-rewriting 4 21 | Number-of-registers-assigned 4 22 | Number-of-functions-skipped 1 23 | Number-of-functions-visited 1 24 | Function-name ceil_log2 25 | Module-name expmed 26 | Application-name gcc 27 | Percent-of-copy-instructions 0.4 28 | Percent-of-call-instructions 0.1 29 | Percent-of-spilled-virtual-registers 0.0 30 | Percent-of-remat-instructions 0.0 31 | Instructions-per-block 10.0 32 | -------------------------------------------------------------------------------- /src/unison/test/fast/Mips/size/sphinx3.profile.ptmr_init.ll: -------------------------------------------------------------------------------- 1 | ; ModuleID = 'sphinx3.profile.ptmr_init.ll' 2 | target datalayout = "E-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64" 3 | target triple = "mips--linux-gnu" 4 | 5 | %struct.ptmr_t.43 = type { i8*, double, double, double, double, double, double } 6 | 7 | ; Function Attrs: norecurse nounwind 8 | define void @ptmr_init(%struct.ptmr_t.43* nocapture %tm) #0 { 9 | %1 = getelementptr inbounds %struct.ptmr_t.43, %struct.ptmr_t.43* %tm, i32 0, i32 1 10 | %2 = bitcast double* %1 to i8* 11 | tail call void @llvm.memset.p0i8.i64(i8* %2, i8 0, i64 32, i32 8, i1 false) 12 | ret void 13 | } 14 | 15 | ; Function Attrs: argmemonly nounwind 16 | declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) #1 17 | 18 | attributes #0 = { norecurse nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="mips32r2" "target-features"="+mips32r2" "unsafe-fp-math"="false" "use-soft-float"="false" } 19 | attributes #1 = { argmemonly nounwind } 20 | 21 | !llvm.ident = !{!0} 22 | 23 | !0 = !{!"clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)"} 24 | -------------------------------------------------------------------------------- /src/unison/test/fast/Mips/speed/sphinx3.profile.ptmr_init.ll: -------------------------------------------------------------------------------- 1 | ; ModuleID = 'sphinx3.profile.ptmr_init.ll' 2 | target datalayout = "E-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64" 3 | target triple = "mips--linux-gnu" 4 | 5 | %struct.ptmr_t.43 = type { i8*, double, double, double, double, double, double } 6 | 7 | ; Function Attrs: norecurse nounwind 8 | define void @ptmr_init(%struct.ptmr_t.43* nocapture %tm) #0 { 9 | %1 = getelementptr inbounds %struct.ptmr_t.43, %struct.ptmr_t.43* %tm, i32 0, i32 1 10 | %2 = bitcast double* %1 to i8* 11 | tail call void @llvm.memset.p0i8.i64(i8* %2, i8 0, i64 32, i32 8, i1 false) 12 | ret void 13 | } 14 | 15 | ; Function Attrs: argmemonly nounwind 16 | declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) #1 17 | 18 | attributes #0 = { norecurse nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="mips32r2" "target-features"="+mips32r2" "unsafe-fp-math"="false" "use-soft-float"="false" } 19 | attributes #1 = { argmemonly nounwind } 20 | 21 | !llvm.ident = !{!0} 22 | 23 | !0 = !{!"clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)"} 24 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Import/KillUnusedTemps.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Import.KillUnusedTemps (killUnusedTemps) where 13 | 14 | import Data.List 15 | import Data.Maybe 16 | 17 | import Unison 18 | 19 | killUnusedTemps f @ Function {fCode = code} _target = 20 | let uses = nub $ tUses (flatten code) 21 | id = newId code 22 | (code', _) = foldl (killUnusedTempsInBB uses) ([], id) code 23 | in f {fCode = code'} 24 | 25 | killUnusedTempsInBB uses (accCode, id) b @ Block {bCode = code} = 26 | let (code', id') = foldl (killUnusedDefs uses) ([], id) code 27 | in (accCode ++ [b {bCode = code'}], id') 28 | 29 | killUnusedDefs uses (accCode, id) i 30 | | isCopy i = (accCode ++ [i], id) 31 | | otherwise = 32 | let widows = filter isTemporary (oDefs i) \\ uses 33 | widows' = map undoPreAssign widows 34 | (kills, id') = mkKills widows' id 35 | in (accCode ++ [i] ++ maybeToList kills, id') 36 | 37 | mkKills [] id = (Nothing, id) 38 | mkKills ws id = (Just (mkKill id [VirtualInstruction] ws), id + 1) 39 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Export/CleanNops.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Export.CleanNops (cleanNops) where 13 | 14 | import MachineIR 15 | 16 | import Unison 17 | import Unison.Target.API 18 | 19 | cleanNops f target = 20 | let (Natural nf) = nop target 21 | n = oTargetInstr $ fromSingleton $ oIs nf 22 | in mapToMachineBlock (cleanBlockNops n) f 23 | 24 | cleanBlockNops n mi @ MachineBlock {mbInstructions = mis} = 25 | let mis' = map (cleanBundleNops n) mis 26 | in mi {mbInstructions = mis'} 27 | 28 | cleanBundleNops n MachineBundle { 29 | mbInstrs = [mi @ MachineSingle {msOpcode = MachineTargetOpc n'}]} 30 | | n == n' = mi 31 | -- Headless bundles model branches with delay slots and should not be cleaned. 32 | cleanBundleNops _ mb @ MachineBundle {mbHead = False} = mb 33 | cleanBundleNops n mb @ MachineBundle {mbInstrs = mis} = 34 | case filter (not . hasTargetOpc n) mis of 35 | [mi] -> mi 36 | mis' -> mb {mbInstrs = mis'} 37 | cleanBundleNops _ mi = mi 38 | 39 | hasTargetOpc n MachineSingle {msOpcode = MachineTargetOpc n'} = n == n' 40 | hasTargetOpc _ _ = False 41 | -------------------------------------------------------------------------------- /src/unison/test/fast/Mips/size/gcc.xexit.xexit.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .abicalls 3 | .section .mdebug.abi32,"",@progbits 4 | .nan legacy 5 | .file "gcc.xexit.xexit.ll" 6 | .text 7 | .globl xexit 8 | .align 2 9 | .type xexit,@function 10 | .set nomicromips 11 | .set nomips16 12 | .ent xexit 13 | xexit: # @xexit 14 | .frame $sp,32,$ra 15 | .mask 0x80030000,-4 16 | .fmask 0x00000000,0 17 | .set noreorder 18 | .set nomacro 19 | .set noat 20 | # BB#0: 21 | lui $2, %hi(_gp_disp) 22 | addiu $2, $2, %lo(_gp_disp) 23 | addiu $sp, $sp, -32 24 | sw $ra, 28($sp) # 4-byte Folded Spill 25 | sw $17, 24($sp) # 4-byte Folded Spill 26 | sw $16, 20($sp) # 4-byte Folded Spill 27 | addu $16, $2, $25 28 | lw $1, %got(_xexit_cleanup)($16) 29 | lw $25, 0($1) 30 | beqz $25, $BB0_3 31 | move $17, $4 32 | # BB#1: 33 | b $BB0_2 34 | nop 35 | $BB0_2: 36 | jalr $25 37 | nop 38 | $BB0_3: 39 | lw $25, %call16(exit)($16) 40 | move $4, $17 41 | jalr $25 42 | move $gp, $16 43 | .set at 44 | .set macro 45 | .set reorder 46 | .end xexit 47 | $func_end0: 48 | .size xexit, ($func_end0)-xexit 49 | 50 | 51 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 52 | .section ".note.GNU-stack","",@progbits 53 | .text 54 | -------------------------------------------------------------------------------- /src/unison/test/fast/Mips/size/h264ref.sei.UpdateRandomAccess.stats: -------------------------------------------------------------------------------- 1 | CV-of-the-register-class-weights-(pre-RA) 0.000000 2 | Weighted-instructions-per-bundle 1.000000 3 | Number-of-machine-instrs-printed 15 4 | Number-of-dead-instructions-deleted 1 5 | Number-of-dag-nodes-combined 5 6 | Number-of-delay-slots-filled 3 7 | Number-of-delay-slots-filled-with-instructions-that-are-not-NOP. 2 8 | Number-of-blocks-selected-using-DAG 3 9 | Number-of-entry-blocks-encountered 1 10 | Number-of-times-dag-isel-has-to-try-another-path 61 11 | Maximum-number-of-instructions-in-a-block-(post-RA) 8 12 | Maximum-number-of-instructions-in-a-block-(pre-RA) 8 13 | Number-of-basic-blocks-(post-RA) 3 14 | Number-of-basic-blocks-(pre-RA) 3 15 | Number-of-machine-instructions-(post-RA) 15 16 | Number-of-machine-instructions-(pre-RA) 16 17 | Number-of-register-classes-(pre-RA) 1 18 | Number-of-virtual-registers-(post-RA) 11 19 | Number-of-virtual-registers-(pre-RA) 12 20 | Number-of-phis-lowered 1 21 | Number-of-interval-joins-performed 3 22 | Number-of-registers-assigned 8 23 | Number-of-functions-skipped 1 24 | Number-of-functions-visited 1 25 | Function-name UpdateRandomAccess 26 | Module-name sei 27 | Application-name h264ref 28 | Percent-of-copy-instructions 0.0 29 | Percent-of-call-instructions 0.0 30 | Percent-of-spilled-virtual-registers 0.0 31 | Percent-of-remat-instructions 0.0 32 | Instructions-per-block 5.33333333333 33 | -------------------------------------------------------------------------------- /src/unison/test/fast/Mips/speed/gcc.xexit.xexit.asm: -------------------------------------------------------------------------------- 1 | .text 2 | .abicalls 3 | .section .mdebug.abi32,"",@progbits 4 | .nan legacy 5 | .file "gcc.xexit.xexit.ll" 6 | .text 7 | .globl xexit 8 | .align 2 9 | .type xexit,@function 10 | .set nomicromips 11 | .set nomips16 12 | .ent xexit 13 | xexit: # @xexit 14 | .frame $sp,32,$ra 15 | .mask 0x80030000,-4 16 | .fmask 0x00000000,0 17 | .set noreorder 18 | .set nomacro 19 | .set noat 20 | # BB#0: 21 | lui $2, %hi(_gp_disp) 22 | addiu $2, $2, %lo(_gp_disp) 23 | addiu $sp, $sp, -32 24 | sw $ra, 28($sp) # 4-byte Folded Spill 25 | sw $17, 24($sp) # 4-byte Folded Spill 26 | sw $16, 20($sp) # 4-byte Folded Spill 27 | addu $16, $2, $25 28 | lw $1, %got(_xexit_cleanup)($16) 29 | lw $25, 0($1) 30 | beqz $25, $BB0_3 31 | move $17, $4 32 | # BB#1: 33 | b $BB0_2 34 | nop 35 | $BB0_2: 36 | jalr $25 37 | nop 38 | $BB0_3: 39 | lw $25, %call16(exit)($16) 40 | move $4, $17 41 | jalr $25 42 | move $gp, $16 43 | .set at 44 | .set macro 45 | .set reorder 46 | .end xexit 47 | $func_end0: 48 | .size xexit, ($func_end0)-xexit 49 | 50 | 51 | .ident "clang version 3.8.0 (http://llvm.org/git/clang.git 2d49f0a0ae8366964a93e3b7b26e29679bee7160) (http://llvm.org/git/llvm.git 60bc66b44837125843b58ed3e0fd2e6bb948d839)" 52 | .section ".note.GNU-stack","",@progbits 53 | .text 54 | -------------------------------------------------------------------------------- /src/unison/test/fast/Mips/speed/h264ref.sei.UpdateRandomAccess.stats: -------------------------------------------------------------------------------- 1 | CV-of-the-register-class-weights-(pre-RA) 0.000000 2 | Weighted-instructions-per-bundle 1.000000 3 | Number-of-machine-instrs-printed 15 4 | Number-of-dead-instructions-deleted 1 5 | Number-of-dag-nodes-combined 5 6 | Number-of-delay-slots-filled 3 7 | Number-of-delay-slots-filled-with-instructions-that-are-not-NOP. 2 8 | Number-of-blocks-selected-using-DAG 3 9 | Number-of-entry-blocks-encountered 1 10 | Number-of-times-dag-isel-has-to-try-another-path 61 11 | Maximum-number-of-instructions-in-a-block-(post-RA) 8 12 | Maximum-number-of-instructions-in-a-block-(pre-RA) 8 13 | Number-of-basic-blocks-(post-RA) 3 14 | Number-of-basic-blocks-(pre-RA) 3 15 | Number-of-machine-instructions-(post-RA) 15 16 | Number-of-machine-instructions-(pre-RA) 16 17 | Number-of-register-classes-(pre-RA) 1 18 | Number-of-virtual-registers-(post-RA) 11 19 | Number-of-virtual-registers-(pre-RA) 12 20 | Number-of-phis-lowered 1 21 | Number-of-interval-joins-performed 3 22 | Number-of-registers-assigned 8 23 | Number-of-functions-skipped 1 24 | Number-of-functions-visited 1 25 | Function-name UpdateRandomAccess 26 | Module-name sei 27 | Application-name h264ref 28 | Percent-of-copy-instructions 0.0 29 | Percent-of-call-instructions 0.0 30 | Percent-of-spilled-virtual-registers 0.0 31 | Percent-of-remat-instructions 0.0 32 | Instructions-per-block 5.33333333333 33 | -------------------------------------------------------------------------------- /src/unison/src/Unison/Tools/Import/LiftMachineUndefs.hs: -------------------------------------------------------------------------------- 1 | {-| 2 | Copyright : Copyright (c) 2016, RISE SICS AB 3 | License : BSD3 (see the LICENSE file) 4 | Maintainer : rcas@acm.org 5 | -} 6 | {- 7 | Main authors: 8 | Roberto Castaneda Lozano 9 | 10 | This file is part of Unison, see http://unison-code.github.io 11 | -} 12 | module Unison.Tools.Import.LiftMachineUndefs (liftMachineUndefs) where 13 | 14 | import Data.Maybe 15 | 16 | import MachineIR 17 | 18 | liftMachineUndefs mf _target = 19 | let mf' = mapToMachineBlock liftUndefsInBlock mf 20 | in mf' 21 | 22 | liftUndefsInBlock mb @ MachineBlock {mbInstructions = mis} = 23 | let mb' = mb {mbInstructions = concatMap liftUndefsInInstr mis} 24 | in mb' 25 | 26 | liftUndefsInInstr mi @ MachineSingle {msOperands = mos} = 27 | let mids = mapMaybe maybeMkImplicitDef mos 28 | mi' = mi {msOperands = map maybeDefineTemp mos} 29 | in mids ++ [mi'] 30 | 31 | maybeMkImplicitDef mt 32 | | isMachineTempUndef mt = 33 | let mt' = maybeDefineTemp mt 34 | in Just $ mkMachineSingle (mkMachineVirtualOpc IMPLICIT_DEF) [] [mt'] 35 | maybeMkImplicitDef _ = Nothing 36 | 37 | maybeDefineTemp mt @ MachineTemp {mtFlags = fs} = 38 | mt {mtFlags = filter (not . isMachineRegUndef) fs} 39 | maybeDefineTemp mo = mo 40 | 41 | isMachineTempUndef MachineTemp {mtFlags = fs} = any isMachineRegUndef fs 42 | isMachineTempUndef _ = False 43 | --------------------------------------------------------------------------------