├── mcu-code
├── build
│ ├── startup_stm32f103xb.d
│ ├── main.o
│ ├── uart2.bin
│ ├── uart2.elf
│ ├── stm32f1xx_it.o
│ ├── stm32f1xx_hal.o
│ ├── stm32f1xx_hal_dma.o
│ ├── stm32f1xx_hal_msp.o
│ ├── stm32f1xx_hal_pwr.o
│ ├── stm32f1xx_hal_rcc.o
│ ├── stm32f1xx_hal_tim.o
│ ├── system_stm32f1xx.o
│ ├── startup_stm32f103xb.o
│ ├── stm32f1xx_hal_cortex.o
│ ├── stm32f1xx_hal_flash.o
│ ├── stm32f1xx_hal_gpio.o
│ ├── stm32f1xx_hal_rcc_ex.o
│ ├── stm32f1xx_hal_tim_ex.o
│ ├── stm32f1xx_hal_uart.o
│ ├── stm32f1xx_hal_flash_ex.o
│ ├── stm32f1xx_hal_gpio_ex.o
│ ├── stm32f1xx_hal_tim.lst
│ ├── stm32f1xx_hal_tim_ex.lst
│ ├── main.d
│ ├── system_stm32f1xx.d
│ ├── stm32f1xx_hal_msp.d
│ ├── stm32f1xx_hal.d
│ ├── stm32f1xx_hal_dma.d
│ ├── stm32f1xx_hal_pwr.d
│ ├── stm32f1xx_hal_rcc.d
│ ├── stm32f1xx_hal_tim.d
│ ├── stm32f1xx_it.d
│ ├── stm32f1xx_hal_flash.d
│ ├── stm32f1xx_hal_gpio.d
│ ├── stm32f1xx_hal_uart.d
│ ├── stm32f1xx_hal_cortex.d
│ ├── stm32f1xx_hal_rcc_ex.d
│ ├── stm32f1xx_hal_tim_ex.d
│ ├── stm32f1xx_hal_flash_ex.d
│ └── stm32f1xx_hal_gpio_ex.d
├── Drivers
│ ├── CMSIS
│ │ ├── Device
│ │ │ └── ST
│ │ │ │ └── STM32F1xx
│ │ │ │ ├── Include
│ │ │ │ ├── stm32f1xx.h
│ │ │ │ ├── stm32f100xb.h
│ │ │ │ ├── stm32f100xe.h
│ │ │ │ ├── stm32f101x6.h
│ │ │ │ ├── stm32f101xb.h
│ │ │ │ ├── stm32f101xe.h
│ │ │ │ ├── stm32f101xg.h
│ │ │ │ ├── stm32f102x6.h
│ │ │ │ ├── stm32f102xb.h
│ │ │ │ ├── stm32f103x6.h
│ │ │ │ ├── stm32f103xb.h
│ │ │ │ ├── stm32f103xe.h
│ │ │ │ ├── stm32f103xg.h
│ │ │ │ ├── stm32f105xc.h
│ │ │ │ ├── stm32f107xc.h
│ │ │ │ └── system_stm32f1xx.h
│ │ │ │ └── Source
│ │ │ │ └── Templates
│ │ │ │ └── iar
│ │ │ │ └── linker
│ │ │ │ ├── stm32f100xb_sram.icf
│ │ │ │ ├── stm32f100xe_sram.icf
│ │ │ │ ├── stm32f101x6_sram.icf
│ │ │ │ ├── stm32f101xb_sram.icf
│ │ │ │ ├── stm32f101xe_sram.icf
│ │ │ │ ├── stm32f101xg_sram.icf
│ │ │ │ ├── stm32f102x6_sram.icf
│ │ │ │ ├── stm32f102xb_sram.icf
│ │ │ │ ├── stm32f103x6_sram.icf
│ │ │ │ ├── stm32f103xb_sram.icf
│ │ │ │ ├── stm32f103xe_sram.icf
│ │ │ │ ├── stm32f103xg_sram.icf
│ │ │ │ ├── stm32f105xc_sram.icf
│ │ │ │ ├── stm32f107xc_sram.icf
│ │ │ │ ├── stm32f100xb_flash.icf
│ │ │ │ ├── stm32f100xe_flash.icf
│ │ │ │ ├── stm32f101x6_flash.icf
│ │ │ │ ├── stm32f101xb_flash.icf
│ │ │ │ ├── stm32f101xe_flash.icf
│ │ │ │ ├── stm32f101xg_flash.icf
│ │ │ │ ├── stm32f102x6_flash.icf
│ │ │ │ ├── stm32f102xb_flash.icf
│ │ │ │ ├── stm32f103x6_flash.icf
│ │ │ │ ├── stm32f103xb_flash.icf
│ │ │ │ ├── stm32f103xe_flash.icf
│ │ │ │ ├── stm32f103xg_flash.icf
│ │ │ │ ├── stm32f105xc_flash.icf
│ │ │ │ └── stm32f107xc_flash.icf
│ │ ├── DSP_Lib
│ │ │ ├── Source
│ │ │ │ ├── ControllerFunctions
│ │ │ │ │ ├── arm_pid_reset_q15.c
│ │ │ │ │ ├── arm_pid_reset_q31.c
│ │ │ │ │ ├── arm_pid_reset_f32.c
│ │ │ │ │ └── arm_pid_init_f32.c
│ │ │ │ ├── MatrixFunctions
│ │ │ │ │ ├── arm_mat_init_q15.c
│ │ │ │ │ ├── arm_mat_init_q31.c
│ │ │ │ │ └── arm_mat_init_f32.c
│ │ │ │ ├── FilteringFunctions
│ │ │ │ │ ├── arm_fir_lattice_init_q15.c
│ │ │ │ │ ├── arm_fir_lattice_init_q31.c
│ │ │ │ │ ├── arm_fir_lattice_init_f32.c
│ │ │ │ │ ├── arm_iir_lattice_init_q15.c
│ │ │ │ │ ├── arm_iir_lattice_init_q31.c
│ │ │ │ │ ├── arm_iir_lattice_init_f32.c
│ │ │ │ │ └── arm_fir_init_q7.c
│ │ │ │ └── FastMathFunctions
│ │ │ │ │ ├── arm_sin_q31.c
│ │ │ │ │ ├── arm_sin_q15.c
│ │ │ │ │ ├── arm_cos_q15.c
│ │ │ │ │ └── arm_cos_q31.c
│ │ │ └── Examples
│ │ │ │ ├── arm_fir_example
│ │ │ │ └── ARM
│ │ │ │ │ └── math_helper.h
│ │ │ │ ├── arm_matrix_example
│ │ │ │ └── ARM
│ │ │ │ │ └── math_helper.h
│ │ │ │ ├── arm_convolution_example
│ │ │ │ ├── ARM
│ │ │ │ │ └── math_helper.h
│ │ │ │ └── GCC
│ │ │ │ │ └── math_helper.h
│ │ │ │ ├── arm_graphic_equalizer_example
│ │ │ │ └── ARM
│ │ │ │ │ └── math_helper.h
│ │ │ │ ├── arm_linear_interp_example
│ │ │ │ └── ARM
│ │ │ │ │ └── math_helper.h
│ │ │ │ └── arm_signal_converge_example
│ │ │ │ └── ARM
│ │ │ │ └── math_helper.h
│ │ └── Include
│ │ │ ├── core_cmFunc.h
│ │ │ └── core_cmInstr.h
│ └── STM32F1xx_HAL_Driver
│ │ ├── Src
│ │ ├── .stm32f1xx_hal_uart.c.swp
│ │ └── stm32f1xx_hal_timebase_rtc_alarm_template.c
│ │ └── Inc
│ │ └── stm32_assert_template.h
├── Inc
│ ├── stm32f10x_it.h
│ ├── main.h
│ └── stm32f1xx_it.h
└── uart2.ioc
├── fpga-code
├── glitch_demo.bin
├── Makefile
├── pll-72.v
├── cores
│ └── osdvu
│ │ ├── LICENCE
│ │ └── CHANGELOG
└── icestick.pcf
└── README.md
/mcu-code/build/startup_stm32f103xb.d:
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1 | build/startup_stm32f103xb.d: startup_stm32f103xb.s
2 |
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/mcu-code/build/main.o:
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/mcu-code/build/uart2.bin:
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https://raw.githubusercontent.com/unprovable/glitch-stm32/HEAD/mcu-code/build/uart2.bin
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/mcu-code/build/uart2.elf:
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/fpga-code/glitch_demo.bin:
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/mcu-code/build/stm32f1xx_it.o:
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https://raw.githubusercontent.com/unprovable/glitch-stm32/HEAD/mcu-code/build/stm32f1xx_it.o
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/mcu-code/build/stm32f1xx_hal.o:
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/mcu-code/build/stm32f1xx_hal_dma.o:
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/mcu-code/build/stm32f1xx_hal_msp.o:
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/mcu-code/build/stm32f1xx_hal_pwr.o:
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/mcu-code/build/stm32f1xx_hal_rcc.o:
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/mcu-code/build/stm32f1xx_hal_tim.o:
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/mcu-code/build/system_stm32f1xx.o:
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/mcu-code/build/startup_stm32f103xb.o:
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/mcu-code/build/stm32f1xx_hal_cortex.o:
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/mcu-code/build/stm32f1xx_hal_flash.o:
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/mcu-code/build/stm32f1xx_hal_gpio.o:
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/mcu-code/build/stm32f1xx_hal_rcc_ex.o:
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/mcu-code/build/stm32f1xx_hal_tim_ex.o:
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/mcu-code/build/stm32f1xx_hal_uart.o:
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/mcu-code/build/stm32f1xx_hal_flash_ex.o:
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/mcu-code/build/stm32f1xx_hal_gpio_ex.o:
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/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
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/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f100xb.h:
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https://raw.githubusercontent.com/unprovable/glitch-stm32/HEAD/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f100xb.h
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/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f100xe.h:
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https://raw.githubusercontent.com/unprovable/glitch-stm32/HEAD/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f100xe.h
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/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101x6.h:
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https://raw.githubusercontent.com/unprovable/glitch-stm32/HEAD/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101x6.h
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/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xb.h:
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/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xe.h:
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/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xg.h:
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/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f102x6.h:
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https://raw.githubusercontent.com/unprovable/glitch-stm32/HEAD/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f102x6.h
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/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f102xb.h:
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/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103x6.h:
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https://raw.githubusercontent.com/unprovable/glitch-stm32/HEAD/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103x6.h
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/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
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/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
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/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xg.h:
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/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f105xc.h:
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/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f107xc.h:
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/mcu-code/Drivers/STM32F1xx_HAL_Driver/Src/.stm32f1xx_hal_uart.c.swp:
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/mcu-code/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_timebase_rtc_alarm_template.c:
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/README.md:
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1 | # Glitching STM32F103 with an iCE40 'iCEstick' FPGA
2 |
3 | **FULL WRITEUP TO FOLLOW!!**
4 |
5 | `sudo /usr/local/bin/openocd -f interface/stlink-v2.cfg -f target/stm32f1x.cfg`
6 |
7 |
8 |
9 | ### Links
10 |
11 | FPGA code: made for this, using iCE40 UART lib: https://github.com/cyrozap/iCEstick-UART-Demo
12 | MCU code from: https://github.com/unprovable/STM32-IRQ-UART.git
13 |
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/fpga-code/Makefile:
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1 | SYN = yosys
2 | PNR = arachne-pnr
3 | GEN = icepack
4 | PROG = iceprog
5 |
6 | TOP = glitch_demo.v
7 | PCF = icestick.pcf
8 | DEVICE = 1k
9 |
10 | OUTPUT = $(patsubst %.v,%.bin,$(TOP))
11 |
12 | all: $(OUTPUT)
13 |
14 | %.bin: %.tiles
15 | $(GEN) $< $@
16 |
17 | %.tiles: %.blif
18 | $(PNR) -d $(DEVICE) -p $(PCF) -o $@ $<
19 |
20 | %.blif: %.v
21 | $(SYN) -p "read_verilog $<; synth_ice40 -flatten -blif $@"
22 |
23 | clean:
24 | rm -f *.bin *.blif *.tiles
25 |
26 | flash: $(OUTPUT)
27 | $(PROG) $<
28 |
29 | .PHONY: all clean flash
30 |
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/fpga-code/pll-72.v:
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1 | /**
2 | * PLL configuration
3 | *
4 | * This Verilog module was generated automatically
5 | * using the icepll tool from the IceStorm project.
6 | * Use at your own risk.
7 | *
8 | * Given input frequency: 12.000 MHz
9 | * Requested output frequency: 72.000 MHz
10 | * Achieved output frequency: 72.000 MHz
11 | */
12 |
13 | module pll(
14 | input clock_in,
15 | output clock_out,
16 | output locked
17 | );
18 |
19 | SB_PLL40_CORE #(
20 | .FEEDBACK_PATH("SIMPLE"),
21 | .DIVR(4'b0000), // DIVR = 0
22 | .DIVF(7'b0101111), // DIVF = 47
23 | .DIVQ(3'b011), // DIVQ = 3
24 | .FILTER_RANGE(3'b001) // FILTER_RANGE = 1
25 | ) uut (
26 | .LOCK(locked),
27 | .RESETB(1'b1),
28 | .BYPASS(1'b0),
29 | .REFERENCECLK(clock_in),
30 | .PLLOUTCORE(clock_out)
31 | );
32 |
33 | endmodule
34 |
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/fpga-code/cores/osdvu/LICENCE:
--------------------------------------------------------------------------------
1 | The MIT License
2 |
3 | Copyright (c) 2010 Timothy Goddard
4 |
5 | Permission is hereby granted, free of charge, to any person obtaining a copy
6 | of this software and associated documentation files (the "Software"), to deal
7 | in the Software without restriction, including without limitation the rights
8 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9 | copies of the Software, and to permit persons to whom the Software is
10 | furnished to do so, subject to the following conditions:
11 |
12 | The above copyright notice and this permission notice shall be included in
13 | all copies or substantial portions of the Software.
14 |
15 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
18 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
21 | THE SOFTWARE.
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/mcu-code/build/stm32f1xx_hal_tim.lst:
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1 | ARM GAS /tmp/ccarTPbg.s page 1
2 |
3 |
4 | 1 .cpu cortex-m3
5 | 2 .eabi_attribute 20, 1
6 | 3 .eabi_attribute 21, 1
7 | 4 .eabi_attribute 23, 3
8 | 5 .eabi_attribute 24, 1
9 | 6 .eabi_attribute 25, 1
10 | 7 .eabi_attribute 26, 1
11 | 8 .eabi_attribute 30, 1
12 | 9 .eabi_attribute 34, 1
13 | 10 .eabi_attribute 18, 4
14 | 11 .file "stm32f1xx_hal_tim.c"
15 | 12 .text
16 | 13 .Ltext0:
17 | 14 .cfi_sections .debug_frame
18 | 15 .Letext0:
19 | 16 .file 1 "/usr/arm-none-eabi/include/machine/_default_types.h"
20 | 17 .file 2 "/usr/arm-none-eabi/include/sys/_stdint.h"
21 | 18 .file 3 "Drivers/CMSIS/Include/core_cm3.h"
22 | 19 .file 4 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h"
23 | 20 .file 5 "/usr/arm-none-eabi/include/sys/lock.h"
24 | 21 .file 6 "/usr/arm-none-eabi/include/sys/_types.h"
25 | 22 .file 7 "/usr/lib/gcc/arm-none-eabi/7.1.0/include/stddef.h"
26 | 23 .file 8 "/usr/arm-none-eabi/include/sys/reent.h"
27 | ARM GAS /tmp/ccarTPbg.s page 2
28 |
29 |
30 | DEFINED SYMBOLS
31 | *ABS*:0000000000000000 stm32f1xx_hal_tim.c
32 |
33 | NO UNDEFINED SYMBOLS
34 |
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/mcu-code/build/stm32f1xx_hal_tim_ex.lst:
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1 | ARM GAS /tmp/cc80aC6y.s page 1
2 |
3 |
4 | 1 .cpu cortex-m3
5 | 2 .eabi_attribute 20, 1
6 | 3 .eabi_attribute 21, 1
7 | 4 .eabi_attribute 23, 3
8 | 5 .eabi_attribute 24, 1
9 | 6 .eabi_attribute 25, 1
10 | 7 .eabi_attribute 26, 1
11 | 8 .eabi_attribute 30, 1
12 | 9 .eabi_attribute 34, 1
13 | 10 .eabi_attribute 18, 4
14 | 11 .file "stm32f1xx_hal_tim_ex.c"
15 | 12 .text
16 | 13 .Ltext0:
17 | 14 .cfi_sections .debug_frame
18 | 15 .Letext0:
19 | 16 .file 1 "/usr/arm-none-eabi/include/machine/_default_types.h"
20 | 17 .file 2 "/usr/arm-none-eabi/include/sys/_stdint.h"
21 | 18 .file 3 "Drivers/CMSIS/Include/core_cm3.h"
22 | 19 .file 4 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h"
23 | 20 .file 5 "/usr/arm-none-eabi/include/sys/lock.h"
24 | 21 .file 6 "/usr/arm-none-eabi/include/sys/_types.h"
25 | 22 .file 7 "/usr/lib/gcc/arm-none-eabi/7.1.0/include/stddef.h"
26 | 23 .file 8 "/usr/arm-none-eabi/include/sys/reent.h"
27 | ARM GAS /tmp/cc80aC6y.s page 2
28 |
29 |
30 | DEFINED SYMBOLS
31 | *ABS*:0000000000000000 stm32f1xx_hal_tim_ex.c
32 |
33 | NO UNDEFINED SYMBOLS
34 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f100xb_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20001FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f100xe_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101x6_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200017FF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xb_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xe_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000BFFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xg_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20013FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f102x6_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200017FF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f102xb_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103x6_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200027FF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xb_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20004FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xe_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xg_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f105xc_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f107xc_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f100xb_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20001FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f100xe_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101x6_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200017FF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xb_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xe_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000BFFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xg_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20013FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f102x6_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200017FF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f102xb_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103x6_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200027FF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xb_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20004FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xe_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xg_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f105xc_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f107xc_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/fpga-code/icestick.pcf:
--------------------------------------------------------------------------------
1 | # Generic iCEstick placement constraints file
2 |
3 | # Red LEDs
4 | set_io LED0 99
5 | set_io LED1 98
6 | set_io LED2 97
7 | set_io LED3 96
8 |
9 | # Green LED
10 | set_io LED4 95
11 |
12 | # IrDA port
13 | #set_io RXD 106
14 | #set_io TXD 105
15 | #set_io SD 107
16 |
17 | # Pmod connector
18 | #set_io PIO1_02 78 # Pin 1
19 | #set_io PIO1_03 79 # Pin 2
20 | #set_io PIO1_04 80 # Pin 3
21 | #set_io PIO1_05 81 # Pin 4
22 | #set_io PIO1_06 87 # Pin 7
23 | #set_io PIO1_07 88 # Pin 8
24 | #set_io PIO1_08 90 # Pin 9
25 | #set_io PIO1_09 91 # Pin 10
26 |
27 | # Connector J1
28 | #set_io PIO0_02 112 # Pin 3
29 | #set_io PIO0_03 113 # Pin 4
30 | #set_io PIO0_04 114 # Pin 5
31 | #set_io PIO0_05 115 # Pin 6
32 | #set_io PIO0_06 116 # Pin 7
33 | #set_io PIO0_07 117 # Pin 8
34 | #set_io PIO0_08 118 # Pin 9
35 | #set_io PIO0_09 119 # Pin 10
36 |
37 | # Connector J3
38 | #set_io PIO2_17 62 # Pin 3
39 | #set_io PIO2_16 61 # Pin 4
40 | #set_io PIO2_15 60 # Pin 5
41 | #set_io PIO2_14 56 # Pin 6
42 | #set_io PIO2_13 48 # Pin 7
43 | #set_io PIO2_12 47 # Pin 8
44 | #set_io PIO2_11 45 # Pin 9
45 | #set_io PIO2_10 44 # Pin 10
46 |
47 | # FTDI Port B UART
48 | #set_io DCDn 1
49 | #set_io DSRn 2
50 | #set_io DTRn 3
51 | #set_io CTSn 4
52 | #set_io RTSn 7
53 | set_io RS232_Tx_TTL 8
54 | set_io RS232_Rx_TTL 9
55 |
56 | # SPI
57 | #set_io SPI_SCK 70
58 | #set_io SPI_SI 68
59 | #set_io SPI_SO 67
60 | #set_io SPI_SS_B 71
61 |
62 | # Configuration pins
63 | #set_io CDONE 65
64 | #set_io CRESET_B 66
65 |
66 | # 12 MHz clock
67 | set_io iCE_CLK 21
68 |
69 | # glitch output
70 | set_io J1_1 78
71 |
--------------------------------------------------------------------------------
/mcu-code/Inc/stm32f10x_it.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_it.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 08-April-2011
7 | * @brief This file contains the headers of the interrupt handlers.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | *
© COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /* Define to prevent recursive inclusion -------------------------------------*/
23 | #ifndef __STM32F10x_IT_H
24 | #define __STM32F10x_IT_H
25 |
26 | #ifdef __cplusplus
27 | extern "C" {
28 | #endif
29 |
30 | /* Includes ------------------------------------------------------------------*/
31 | #include "stm32f10x.h"
32 |
33 | /* Exported types ------------------------------------------------------------*/
34 | /* Exported constants --------------------------------------------------------*/
35 | /* Exported macro ------------------------------------------------------------*/
36 | /* Exported functions ------------------------------------------------------- */
37 |
38 | void NMI_Handler(void);
39 | void HardFault_Handler(void);
40 | void MemManage_Handler(void);
41 | void BusFault_Handler(void);
42 | void UsageFault_Handler(void);
43 | void SVC_Handler(void);
44 | void DebugMon_Handler(void);
45 | void PendSV_Handler(void);
46 | void SysTick_Handler(void);
47 |
48 | #ifdef __cplusplus
49 | }
50 | #endif
51 |
52 | #endif /* __STM32F10x_IT_H */
53 |
54 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
55 |
--------------------------------------------------------------------------------
/fpga-code/cores/osdvu/CHANGELOG:
--------------------------------------------------------------------------------
1 | Aaron Dahlen 11 Apr 13:
2 |
3 | 1) added TX_RECOVER state that waits for "transmit" to be
4 | released. This prevents the transmission of multiple characters
5 | for systems with a slowly changing transmit line.
6 |
7 | 2) Tested on Digilent NEXYS3 FPGA at 921600 baud (55 slices consumed).
8 | Also tested at 300 baud (76 slices). Not that the lower baud rate
9 | consumes additional FPGA fabric since the clock dividers are larger.
10 |
11 | 3) Problems with error at high baud rates. Split each bit into
12 | 8 sections. Discarded the first three section and sampled the last 5.
13 | poor results.
14 |
15 | 4) Continued the high bit error problem by eliminating the
16 | clock_divide prescaler. Success! the system now operated
17 | error free at 91600 baud. For this test a Digilent NEXYS3
18 | board with a 100 MHz clock was used.
19 |
20 | The solution was to implement rx_clk and tx_clk. These
21 | counters directly count down the ticks of the high speed
22 | system clock.
23 |
24 | On the downside the complexity of the design has risen as
25 | has the required fabric. The module configured for 300 baud
26 | now consumes 111 Macrocells in a coolrunner II. It consumes
27 | 79 slices in the Spartan 6.
28 |
29 | Aaron Dahlen, 10 Apr 13:
30 |
31 | 1) Continued work on eliminating warnings. It seems that
32 | the synthesis for a Spartan-6 is different that the
33 | Spartan-3 and coolrunner. Unable to clear warnings for both.
34 | This code synthesizes without warning for Coolrunner and Spartan 3.
35 |
36 | 2) Size in CoolrunnerII is 68 to 89 macrocells. Actual size is
37 | baud rate dependent with higher rates consuming less FPGA fabric.
38 |
39 | 3) removed recv_state and tx_state from the module output
40 |
41 | Aaron Dahlen, 07 Apr 13:
42 |
43 | 1) Accepts baud_rate and clock_rate as parameters. Auto calculates
44 | clock_divide.
45 |
46 | 2) Now uses localparam to prevent parameter modification.
47 |
48 | 3) Partially developed test bench, added hooks to see internal operation.
49 | These should probable be removed in the future...
50 |
51 | 4) Eliminated warnings from the XILINX ISE 14.4 synthesizer
52 |
53 |
--------------------------------------------------------------------------------
/mcu-code/build/main.d:
--------------------------------------------------------------------------------
1 | build/main.d: Src/main.c Inc/main.h \
2 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
3 | Inc/stm32f1xx_hal_conf.h Inc/main.h \
4 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
5 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
6 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
7 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h \
8 | Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/core_cmInstr.h \
9 | Drivers/CMSIS/Include/cmsis_gcc.h Drivers/CMSIS/Include/core_cmFunc.h \
10 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
11 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
12 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
13 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
14 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
15 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
16 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
17 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
18 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
19 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
20 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
21 |
22 | Inc/main.h:
23 |
24 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
25 |
26 | Inc/stm32f1xx_hal_conf.h:
27 |
28 | Inc/main.h:
29 |
30 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
31 |
32 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
33 |
34 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
35 |
36 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
37 |
38 | Drivers/CMSIS/Include/core_cm3.h:
39 |
40 | Drivers/CMSIS/Include/core_cmInstr.h:
41 |
42 | Drivers/CMSIS/Include/cmsis_gcc.h:
43 |
44 | Drivers/CMSIS/Include/core_cmFunc.h:
45 |
46 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
47 |
48 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
49 |
50 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
51 |
52 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
53 |
54 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
55 |
56 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
57 |
58 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
59 |
60 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
61 |
62 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
63 |
64 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
65 |
66 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:
67 |
--------------------------------------------------------------------------------
/mcu-code/build/system_stm32f1xx.d:
--------------------------------------------------------------------------------
1 | build/system_stm32f1xx.d: Src/system_stm32f1xx.c \
2 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
3 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h \
4 | Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/core_cmInstr.h \
5 | Drivers/CMSIS/Include/cmsis_gcc.h Drivers/CMSIS/Include/core_cmFunc.h \
6 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
7 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
8 | Inc/stm32f1xx_hal_conf.h Inc/main.h \
9 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
10 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
11 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
12 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
13 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
14 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
15 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
16 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
17 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
18 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
19 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
20 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
21 |
22 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
23 |
24 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
25 |
26 | Drivers/CMSIS/Include/core_cm3.h:
27 |
28 | Drivers/CMSIS/Include/core_cmInstr.h:
29 |
30 | Drivers/CMSIS/Include/cmsis_gcc.h:
31 |
32 | Drivers/CMSIS/Include/core_cmFunc.h:
33 |
34 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
35 |
36 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
37 |
38 | Inc/stm32f1xx_hal_conf.h:
39 |
40 | Inc/main.h:
41 |
42 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
43 |
44 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
45 |
46 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
47 |
48 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
49 |
50 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
51 |
52 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
53 |
54 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
55 |
56 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
57 |
58 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
59 |
60 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
61 |
62 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
63 |
64 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:
65 |
--------------------------------------------------------------------------------
/mcu-code/build/stm32f1xx_hal_msp.d:
--------------------------------------------------------------------------------
1 | build/stm32f1xx_hal_msp.d: Src/stm32f1xx_hal_msp.c \
2 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
3 | Inc/stm32f1xx_hal_conf.h Inc/main.h \
4 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
5 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
6 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
7 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h \
8 | Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/core_cmInstr.h \
9 | Drivers/CMSIS/Include/cmsis_gcc.h Drivers/CMSIS/Include/core_cmFunc.h \
10 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
11 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
12 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
13 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
14 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
15 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
16 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
17 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
18 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
19 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
20 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
21 |
22 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
23 |
24 | Inc/stm32f1xx_hal_conf.h:
25 |
26 | Inc/main.h:
27 |
28 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
29 |
30 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
31 |
32 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
33 |
34 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
35 |
36 | Drivers/CMSIS/Include/core_cm3.h:
37 |
38 | Drivers/CMSIS/Include/core_cmInstr.h:
39 |
40 | Drivers/CMSIS/Include/cmsis_gcc.h:
41 |
42 | Drivers/CMSIS/Include/core_cmFunc.h:
43 |
44 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
45 |
46 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
47 |
48 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
49 |
50 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
51 |
52 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
53 |
54 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
55 |
56 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
57 |
58 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
59 |
60 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
61 |
62 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
63 |
64 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:
65 |
--------------------------------------------------------------------------------
/mcu-code/build/stm32f1xx_hal.d:
--------------------------------------------------------------------------------
1 | build/stm32f1xx_hal.d: Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c \
2 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
3 | Inc/stm32f1xx_hal_conf.h Inc/main.h \
4 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
5 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
6 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
7 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h \
8 | Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/core_cmInstr.h \
9 | Drivers/CMSIS/Include/cmsis_gcc.h Drivers/CMSIS/Include/core_cmFunc.h \
10 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
11 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
12 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
13 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
14 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
15 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
16 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
17 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
18 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
19 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
20 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
21 |
22 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
23 |
24 | Inc/stm32f1xx_hal_conf.h:
25 |
26 | Inc/main.h:
27 |
28 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
29 |
30 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
31 |
32 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
33 |
34 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
35 |
36 | Drivers/CMSIS/Include/core_cm3.h:
37 |
38 | Drivers/CMSIS/Include/core_cmInstr.h:
39 |
40 | Drivers/CMSIS/Include/cmsis_gcc.h:
41 |
42 | Drivers/CMSIS/Include/core_cmFunc.h:
43 |
44 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
45 |
46 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
47 |
48 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
49 |
50 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
51 |
52 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
53 |
54 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
55 |
56 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
57 |
58 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
59 |
60 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
61 |
62 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
63 |
64 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:
65 |
--------------------------------------------------------------------------------
/mcu-code/build/stm32f1xx_hal_dma.d:
--------------------------------------------------------------------------------
1 | build/stm32f1xx_hal_dma.d: \
2 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c \
3 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
4 | Inc/stm32f1xx_hal_conf.h Inc/main.h \
5 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
6 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
7 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
8 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h \
9 | Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/core_cmInstr.h \
10 | Drivers/CMSIS/Include/cmsis_gcc.h Drivers/CMSIS/Include/core_cmFunc.h \
11 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
12 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
13 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
14 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
15 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
16 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
17 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
18 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
19 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
20 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
21 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
22 |
23 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
24 |
25 | Inc/stm32f1xx_hal_conf.h:
26 |
27 | Inc/main.h:
28 |
29 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
30 |
31 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
32 |
33 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
34 |
35 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
36 |
37 | Drivers/CMSIS/Include/core_cm3.h:
38 |
39 | Drivers/CMSIS/Include/core_cmInstr.h:
40 |
41 | Drivers/CMSIS/Include/cmsis_gcc.h:
42 |
43 | Drivers/CMSIS/Include/core_cmFunc.h:
44 |
45 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
46 |
47 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
48 |
49 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
50 |
51 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
52 |
53 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
54 |
55 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
56 |
57 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
58 |
59 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
60 |
61 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
62 |
63 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
64 |
65 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:
66 |
--------------------------------------------------------------------------------
/mcu-code/build/stm32f1xx_hal_pwr.d:
--------------------------------------------------------------------------------
1 | build/stm32f1xx_hal_pwr.d: \
2 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c \
3 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
4 | Inc/stm32f1xx_hal_conf.h Inc/main.h \
5 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
6 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
7 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
8 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h \
9 | Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/core_cmInstr.h \
10 | Drivers/CMSIS/Include/cmsis_gcc.h Drivers/CMSIS/Include/core_cmFunc.h \
11 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
12 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
13 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
14 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
15 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
16 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
17 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
18 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
19 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
20 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
21 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
22 |
23 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
24 |
25 | Inc/stm32f1xx_hal_conf.h:
26 |
27 | Inc/main.h:
28 |
29 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
30 |
31 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
32 |
33 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
34 |
35 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
36 |
37 | Drivers/CMSIS/Include/core_cm3.h:
38 |
39 | Drivers/CMSIS/Include/core_cmInstr.h:
40 |
41 | Drivers/CMSIS/Include/cmsis_gcc.h:
42 |
43 | Drivers/CMSIS/Include/core_cmFunc.h:
44 |
45 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
46 |
47 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
48 |
49 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
50 |
51 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
52 |
53 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
54 |
55 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
56 |
57 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
58 |
59 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
60 |
61 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
62 |
63 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
64 |
65 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:
66 |
--------------------------------------------------------------------------------
/mcu-code/build/stm32f1xx_hal_rcc.d:
--------------------------------------------------------------------------------
1 | build/stm32f1xx_hal_rcc.d: \
2 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c \
3 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
4 | Inc/stm32f1xx_hal_conf.h Inc/main.h \
5 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
6 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
7 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
8 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h \
9 | Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/core_cmInstr.h \
10 | Drivers/CMSIS/Include/cmsis_gcc.h Drivers/CMSIS/Include/core_cmFunc.h \
11 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
12 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
13 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
14 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
15 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
16 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
17 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
18 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
19 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
20 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
21 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
22 |
23 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
24 |
25 | Inc/stm32f1xx_hal_conf.h:
26 |
27 | Inc/main.h:
28 |
29 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
30 |
31 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
32 |
33 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
34 |
35 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
36 |
37 | Drivers/CMSIS/Include/core_cm3.h:
38 |
39 | Drivers/CMSIS/Include/core_cmInstr.h:
40 |
41 | Drivers/CMSIS/Include/cmsis_gcc.h:
42 |
43 | Drivers/CMSIS/Include/core_cmFunc.h:
44 |
45 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
46 |
47 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
48 |
49 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
50 |
51 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
52 |
53 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
54 |
55 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
56 |
57 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
58 |
59 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
60 |
61 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
62 |
63 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
64 |
65 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:
66 |
--------------------------------------------------------------------------------
/mcu-code/build/stm32f1xx_hal_tim.d:
--------------------------------------------------------------------------------
1 | build/stm32f1xx_hal_tim.d: \
2 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c \
3 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
4 | Inc/stm32f1xx_hal_conf.h Inc/main.h \
5 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
6 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
7 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
8 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h \
9 | Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/core_cmInstr.h \
10 | Drivers/CMSIS/Include/cmsis_gcc.h Drivers/CMSIS/Include/core_cmFunc.h \
11 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
12 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
13 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
14 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
15 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
16 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
17 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
18 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
19 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
20 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
21 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
22 |
23 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
24 |
25 | Inc/stm32f1xx_hal_conf.h:
26 |
27 | Inc/main.h:
28 |
29 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
30 |
31 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
32 |
33 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
34 |
35 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
36 |
37 | Drivers/CMSIS/Include/core_cm3.h:
38 |
39 | Drivers/CMSIS/Include/core_cmInstr.h:
40 |
41 | Drivers/CMSIS/Include/cmsis_gcc.h:
42 |
43 | Drivers/CMSIS/Include/core_cmFunc.h:
44 |
45 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
46 |
47 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
48 |
49 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
50 |
51 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
52 |
53 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
54 |
55 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
56 |
57 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
58 |
59 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
60 |
61 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
62 |
63 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
64 |
65 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:
66 |
--------------------------------------------------------------------------------
/mcu-code/build/stm32f1xx_it.d:
--------------------------------------------------------------------------------
1 | build/stm32f1xx_it.d: Src/stm32f1xx_it.c \
2 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
3 | Inc/stm32f1xx_hal_conf.h Inc/main.h \
4 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
5 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
6 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
7 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h \
8 | Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/core_cmInstr.h \
9 | Drivers/CMSIS/Include/cmsis_gcc.h Drivers/CMSIS/Include/core_cmFunc.h \
10 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
11 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
12 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
13 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
14 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
15 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
16 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
17 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
18 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
19 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
20 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h Inc/stm32f1xx_it.h
21 |
22 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
23 |
24 | Inc/stm32f1xx_hal_conf.h:
25 |
26 | Inc/main.h:
27 |
28 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
29 |
30 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
31 |
32 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
33 |
34 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
35 |
36 | Drivers/CMSIS/Include/core_cm3.h:
37 |
38 | Drivers/CMSIS/Include/core_cmInstr.h:
39 |
40 | Drivers/CMSIS/Include/cmsis_gcc.h:
41 |
42 | Drivers/CMSIS/Include/core_cmFunc.h:
43 |
44 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
45 |
46 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
47 |
48 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
49 |
50 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
51 |
52 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
53 |
54 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
55 |
56 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
57 |
58 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
59 |
60 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
61 |
62 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
63 |
64 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:
65 |
66 | Inc/stm32f1xx_it.h:
67 |
--------------------------------------------------------------------------------
/mcu-code/build/stm32f1xx_hal_flash.d:
--------------------------------------------------------------------------------
1 | build/stm32f1xx_hal_flash.d: \
2 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c \
3 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
4 | Inc/stm32f1xx_hal_conf.h Inc/main.h \
5 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
6 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
7 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
8 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h \
9 | Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/core_cmInstr.h \
10 | Drivers/CMSIS/Include/cmsis_gcc.h Drivers/CMSIS/Include/core_cmFunc.h \
11 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
12 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
13 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
14 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
15 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
16 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
17 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
18 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
19 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
20 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
21 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
22 |
23 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
24 |
25 | Inc/stm32f1xx_hal_conf.h:
26 |
27 | Inc/main.h:
28 |
29 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
30 |
31 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
32 |
33 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
34 |
35 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
36 |
37 | Drivers/CMSIS/Include/core_cm3.h:
38 |
39 | Drivers/CMSIS/Include/core_cmInstr.h:
40 |
41 | Drivers/CMSIS/Include/cmsis_gcc.h:
42 |
43 | Drivers/CMSIS/Include/core_cmFunc.h:
44 |
45 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
46 |
47 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
48 |
49 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
50 |
51 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
52 |
53 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
54 |
55 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
56 |
57 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
58 |
59 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
60 |
61 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
62 |
63 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
64 |
65 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:
66 |
--------------------------------------------------------------------------------
/mcu-code/build/stm32f1xx_hal_gpio.d:
--------------------------------------------------------------------------------
1 | build/stm32f1xx_hal_gpio.d: \
2 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c \
3 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
4 | Inc/stm32f1xx_hal_conf.h Inc/main.h \
5 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
6 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
7 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
8 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h \
9 | Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/core_cmInstr.h \
10 | Drivers/CMSIS/Include/cmsis_gcc.h Drivers/CMSIS/Include/core_cmFunc.h \
11 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
12 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
13 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
14 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
15 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
16 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
17 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
18 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
19 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
20 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
21 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
22 |
23 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
24 |
25 | Inc/stm32f1xx_hal_conf.h:
26 |
27 | Inc/main.h:
28 |
29 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
30 |
31 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
32 |
33 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
34 |
35 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
36 |
37 | Drivers/CMSIS/Include/core_cm3.h:
38 |
39 | Drivers/CMSIS/Include/core_cmInstr.h:
40 |
41 | Drivers/CMSIS/Include/cmsis_gcc.h:
42 |
43 | Drivers/CMSIS/Include/core_cmFunc.h:
44 |
45 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
46 |
47 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
48 |
49 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
50 |
51 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
52 |
53 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
54 |
55 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
56 |
57 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
58 |
59 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
60 |
61 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
62 |
63 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
64 |
65 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:
66 |
--------------------------------------------------------------------------------
/mcu-code/build/stm32f1xx_hal_uart.d:
--------------------------------------------------------------------------------
1 | build/stm32f1xx_hal_uart.d: \
2 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c \
3 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
4 | Inc/stm32f1xx_hal_conf.h Inc/main.h \
5 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
6 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
7 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
8 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h \
9 | Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/core_cmInstr.h \
10 | Drivers/CMSIS/Include/cmsis_gcc.h Drivers/CMSIS/Include/core_cmFunc.h \
11 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
12 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
13 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
14 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
15 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
16 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
17 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
18 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
19 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
20 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
21 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
22 |
23 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
24 |
25 | Inc/stm32f1xx_hal_conf.h:
26 |
27 | Inc/main.h:
28 |
29 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
30 |
31 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
32 |
33 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
34 |
35 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
36 |
37 | Drivers/CMSIS/Include/core_cm3.h:
38 |
39 | Drivers/CMSIS/Include/core_cmInstr.h:
40 |
41 | Drivers/CMSIS/Include/cmsis_gcc.h:
42 |
43 | Drivers/CMSIS/Include/core_cmFunc.h:
44 |
45 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
46 |
47 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
48 |
49 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
50 |
51 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
52 |
53 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
54 |
55 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
56 |
57 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
58 |
59 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
60 |
61 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
62 |
63 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
64 |
65 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:
66 |
--------------------------------------------------------------------------------
/mcu-code/build/stm32f1xx_hal_cortex.d:
--------------------------------------------------------------------------------
1 | build/stm32f1xx_hal_cortex.d: \
2 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c \
3 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
4 | Inc/stm32f1xx_hal_conf.h Inc/main.h \
5 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
6 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
7 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
8 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h \
9 | Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/core_cmInstr.h \
10 | Drivers/CMSIS/Include/cmsis_gcc.h Drivers/CMSIS/Include/core_cmFunc.h \
11 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
12 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
13 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
14 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
15 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
16 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
17 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
18 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
19 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
20 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
21 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
22 |
23 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
24 |
25 | Inc/stm32f1xx_hal_conf.h:
26 |
27 | Inc/main.h:
28 |
29 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
30 |
31 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
32 |
33 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
34 |
35 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
36 |
37 | Drivers/CMSIS/Include/core_cm3.h:
38 |
39 | Drivers/CMSIS/Include/core_cmInstr.h:
40 |
41 | Drivers/CMSIS/Include/cmsis_gcc.h:
42 |
43 | Drivers/CMSIS/Include/core_cmFunc.h:
44 |
45 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
46 |
47 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
48 |
49 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
50 |
51 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
52 |
53 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
54 |
55 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
56 |
57 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
58 |
59 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
60 |
61 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
62 |
63 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
64 |
65 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:
66 |
--------------------------------------------------------------------------------
/mcu-code/build/stm32f1xx_hal_rcc_ex.d:
--------------------------------------------------------------------------------
1 | build/stm32f1xx_hal_rcc_ex.d: \
2 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c \
3 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
4 | Inc/stm32f1xx_hal_conf.h Inc/main.h \
5 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
6 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
7 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
8 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h \
9 | Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/core_cmInstr.h \
10 | Drivers/CMSIS/Include/cmsis_gcc.h Drivers/CMSIS/Include/core_cmFunc.h \
11 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
12 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
13 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
14 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
15 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
16 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
17 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
18 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
19 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
20 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
21 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
22 |
23 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
24 |
25 | Inc/stm32f1xx_hal_conf.h:
26 |
27 | Inc/main.h:
28 |
29 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
30 |
31 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
32 |
33 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
34 |
35 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
36 |
37 | Drivers/CMSIS/Include/core_cm3.h:
38 |
39 | Drivers/CMSIS/Include/core_cmInstr.h:
40 |
41 | Drivers/CMSIS/Include/cmsis_gcc.h:
42 |
43 | Drivers/CMSIS/Include/core_cmFunc.h:
44 |
45 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
46 |
47 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
48 |
49 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
50 |
51 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
52 |
53 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
54 |
55 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
56 |
57 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
58 |
59 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
60 |
61 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
62 |
63 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
64 |
65 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:
66 |
--------------------------------------------------------------------------------
/mcu-code/build/stm32f1xx_hal_tim_ex.d:
--------------------------------------------------------------------------------
1 | build/stm32f1xx_hal_tim_ex.d: \
2 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c \
3 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
4 | Inc/stm32f1xx_hal_conf.h Inc/main.h \
5 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
6 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
7 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
8 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h \
9 | Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/core_cmInstr.h \
10 | Drivers/CMSIS/Include/cmsis_gcc.h Drivers/CMSIS/Include/core_cmFunc.h \
11 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
12 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
13 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
14 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
15 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
16 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
17 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
18 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
19 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
20 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
21 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
22 |
23 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
24 |
25 | Inc/stm32f1xx_hal_conf.h:
26 |
27 | Inc/main.h:
28 |
29 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
30 |
31 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
32 |
33 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
34 |
35 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
36 |
37 | Drivers/CMSIS/Include/core_cm3.h:
38 |
39 | Drivers/CMSIS/Include/core_cmInstr.h:
40 |
41 | Drivers/CMSIS/Include/cmsis_gcc.h:
42 |
43 | Drivers/CMSIS/Include/core_cmFunc.h:
44 |
45 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
46 |
47 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
48 |
49 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
50 |
51 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
52 |
53 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
54 |
55 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
56 |
57 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
58 |
59 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
60 |
61 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
62 |
63 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
64 |
65 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:
66 |
--------------------------------------------------------------------------------
/mcu-code/build/stm32f1xx_hal_flash_ex.d:
--------------------------------------------------------------------------------
1 | build/stm32f1xx_hal_flash_ex.d: \
2 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c \
3 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
4 | Inc/stm32f1xx_hal_conf.h Inc/main.h \
5 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
6 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
7 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
8 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h \
9 | Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/core_cmInstr.h \
10 | Drivers/CMSIS/Include/cmsis_gcc.h Drivers/CMSIS/Include/core_cmFunc.h \
11 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
12 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
13 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
14 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
15 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
16 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
17 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
18 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
19 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
20 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
21 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
22 |
23 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
24 |
25 | Inc/stm32f1xx_hal_conf.h:
26 |
27 | Inc/main.h:
28 |
29 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
30 |
31 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
32 |
33 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
34 |
35 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
36 |
37 | Drivers/CMSIS/Include/core_cm3.h:
38 |
39 | Drivers/CMSIS/Include/core_cmInstr.h:
40 |
41 | Drivers/CMSIS/Include/cmsis_gcc.h:
42 |
43 | Drivers/CMSIS/Include/core_cmFunc.h:
44 |
45 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
46 |
47 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
48 |
49 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
50 |
51 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
52 |
53 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
54 |
55 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
56 |
57 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
58 |
59 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
60 |
61 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
62 |
63 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
64 |
65 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:
66 |
--------------------------------------------------------------------------------
/mcu-code/build/stm32f1xx_hal_gpio_ex.d:
--------------------------------------------------------------------------------
1 | build/stm32f1xx_hal_gpio_ex.d: \
2 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c \
3 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
4 | Inc/stm32f1xx_hal_conf.h Inc/main.h \
5 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
6 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
7 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
8 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h \
9 | Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/core_cmInstr.h \
10 | Drivers/CMSIS/Include/cmsis_gcc.h Drivers/CMSIS/Include/core_cmFunc.h \
11 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
12 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
13 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
14 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
15 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
16 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
17 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
18 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
19 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
20 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
21 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
22 |
23 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
24 |
25 | Inc/stm32f1xx_hal_conf.h:
26 |
27 | Inc/main.h:
28 |
29 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
30 |
31 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
32 |
33 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
34 |
35 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
36 |
37 | Drivers/CMSIS/Include/core_cm3.h:
38 |
39 | Drivers/CMSIS/Include/core_cmInstr.h:
40 |
41 | Drivers/CMSIS/Include/cmsis_gcc.h:
42 |
43 | Drivers/CMSIS/Include/core_cmFunc.h:
44 |
45 | Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
46 |
47 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
48 |
49 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
50 |
51 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
52 |
53 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
54 |
55 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
56 |
57 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
58 |
59 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
60 |
61 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
62 |
63 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
64 |
65 | Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:
66 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_reset_q15.c
9 | *
10 | * Description: Q15 PID Control reset function
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup PID
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Reset function for the Q15 PID Control.
50 | * @param[in] *S Instance pointer of PID control data structure.
51 | * @return none.
52 | * \par Description:
53 | * The function resets the state buffer to zeros.
54 | */
55 | void arm_pid_reset_q15(
56 | arm_pid_instance_q15 * S)
57 | {
58 | /* Reset state to zero, The size will be always 3 samples */
59 | memset(S->state, 0, 3u * sizeof(q15_t));
60 | }
61 |
62 | /**
63 | * @} end of PID group
64 | */
65 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_reset_q31.c
9 | *
10 | * Description: Q31 PID Control reset function
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup PID
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Reset function for the Q31 PID Control.
50 | * @param[in] *S Instance pointer of PID control data structure.
51 | * @return none.
52 | * \par Description:
53 | * The function resets the state buffer to zeros.
54 | */
55 | void arm_pid_reset_q31(
56 | arm_pid_instance_q31 * S)
57 | {
58 |
59 | /* Clear the state buffer. The size will be always 3 samples */
60 | memset(S->state, 0, 3u * sizeof(q31_t));
61 | }
62 |
63 | /**
64 | * @} end of PID group
65 | */
66 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_f32.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_reset_f32.c
9 | *
10 | * Description: Floating-point PID Control reset function
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup PID
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Reset function for the floating-point PID Control.
50 | * @param[in] *S Instance pointer of PID control data structure.
51 | * @return none.
52 | * \par Description:
53 | * The function resets the state buffer to zeros.
54 | */
55 | void arm_pid_reset_f32(
56 | arm_pid_instance_f32 * S)
57 | {
58 |
59 | /* Clear the state buffer. The size will be always 3 samples */
60 | memset(S->state, 0, 3u * sizeof(float32_t));
61 | }
62 |
63 | /**
64 | * @} end of PID group
65 | */
66 |
--------------------------------------------------------------------------------
/mcu-code/Inc/main.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * File Name : main.h
4 | * Description : This file contains the common defines of the application
5 | ******************************************************************************
6 | ** This notice applies to any and all portions of this file
7 | * that are not between comment pairs USER CODE BEGIN and
8 | * USER CODE END. Other portions of this file, whether
9 | * inserted by the user or by software development tools
10 | * are owned by their respective copyright owners.
11 | *
12 | * COPYRIGHT(c) 2017 STMicroelectronics
13 | *
14 | * Redistribution and use in source and binary forms, with or without modification,
15 | * are permitted provided that the following conditions are met:
16 | * 1. Redistributions of source code must retain the above copyright notice,
17 | * this list of conditions and the following disclaimer.
18 | * 2. Redistributions in binary form must reproduce the above copyright notice,
19 | * this list of conditions and the following disclaimer in the documentation
20 | * and/or other materials provided with the distribution.
21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
22 | * may be used to endorse or promote products derived from this software
23 | * without specific prior written permission.
24 | *
25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 | *
36 | ******************************************************************************
37 | */
38 | /* Define to prevent recursive inclusion -------------------------------------*/
39 | #ifndef __MAIN_H
40 | #define __MAIN_H
41 | /* Includes ------------------------------------------------------------------*/
42 |
43 | /* USER CODE BEGIN Includes */
44 |
45 | /* USER CODE END Includes */
46 |
47 | /* Private define ------------------------------------------------------------*/
48 |
49 | /* USER CODE BEGIN Private defines */
50 |
51 | /* USER CODE END Private defines */
52 |
53 | void _Error_Handler(char *, int);
54 |
55 | #define Error_Handler() _Error_Handler(__FILE__, __LINE__)
56 |
57 | /**
58 | * @}
59 | */
60 |
61 | /**
62 | * @}
63 | */
64 |
65 | #endif /* __MAIN_H */
66 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
67 |
--------------------------------------------------------------------------------
/mcu-code/uart2.ioc:
--------------------------------------------------------------------------------
1 | #MicroXplorer Configuration settings - do not modify
2 | File.Version=6
3 | KeepUserPlacement=false
4 | Mcu.Family=STM32F1
5 | Mcu.IP0=NVIC
6 | Mcu.IP1=RCC
7 | Mcu.IP2=SYS
8 | Mcu.IP3=USART1
9 | Mcu.IPNb=4
10 | Mcu.Name=STM32F103C(8-B)Tx
11 | Mcu.Package=LQFP48
12 | Mcu.Pin0=PC13-TAMPER-RTC
13 | Mcu.Pin1=PA9
14 | Mcu.Pin2=PA10
15 | Mcu.Pin3=PA13
16 | Mcu.Pin4=PA14
17 | Mcu.Pin5=VP_SYS_VS_Systick
18 | Mcu.PinsNb=6
19 | Mcu.UserConstants=
20 | Mcu.UserName=STM32F103C8Tx
21 | MxCube.Version=4.22.0
22 | MxDb.Version=DB.4.0.220
23 | NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true
24 | NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true
25 | NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true
26 | NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true
27 | NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true
28 | NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true
29 | NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
30 | NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true
31 | NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true
32 | NVIC.USART1_IRQn=true\:0\:0\:false\:false\:true
33 | NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true
34 | PA10.Mode=Asynchronous
35 | PA10.Signal=USART1_RX
36 | PA13.Mode=Serial_Wire
37 | PA13.Signal=SYS_JTMS-SWDIO
38 | PA14.Mode=Serial_Wire
39 | PA14.Signal=SYS_JTCK-SWCLK
40 | PA9.Mode=Asynchronous
41 | PA9.Signal=USART1_TX
42 | PC13-TAMPER-RTC.Locked=true
43 | PC13-TAMPER-RTC.Signal=GPIO_Output
44 | PCC.Checker=false
45 | PCC.Line=STM32F103
46 | PCC.MCU=STM32F103C(8-B)Tx
47 | PCC.PartNumber=STM32F103C8Tx
48 | PCC.Seq0=0
49 | PCC.Series=STM32F1
50 | PCC.Temperature=25
51 | PCC.Vdd=3.3
52 | PinOutPanel.RotationAngle=0
53 | ProjectManager.AskForMigrate=true
54 | ProjectManager.BackupPrevious=false
55 | ProjectManager.CompilerOptimize=2
56 | ProjectManager.ComputerToolchain=false
57 | ProjectManager.CoupleFile=false
58 | ProjectManager.CustomerFirmwarePackage=/home/mc/STM32Cube/Repository/STM32Cube_FW_F1_V1.6.0
59 | ProjectManager.DefaultFWLocation=true
60 | ProjectManager.DeletePrevious=true
61 | ProjectManager.DeviceId=STM32F103C8Tx
62 | ProjectManager.FirmwarePackage=STM32Cube FW_F1 V1.6.0
63 | ProjectManager.FreePins=false
64 | ProjectManager.HalAssertFull=false
65 | ProjectManager.HeapSize=0x200
66 | ProjectManager.KeepUserCode=true
67 | ProjectManager.LastFirmware=true
68 | ProjectManager.LibraryCopy=0
69 | ProjectManager.PreviousToolchain=
70 | ProjectManager.ProjectBuild=false
71 | ProjectManager.ProjectFileName=uart2.ioc
72 | ProjectManager.ProjectName=uart2
73 | ProjectManager.StackSize=0x400
74 | ProjectManager.TargetToolchain=Makefile
75 | ProjectManager.ToolChainLocation=
76 | ProjectManager.UnderRoot=false
77 | ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL,2-SystemClock_Config-RCC-false-HAL,3-MX_USART1_UART_Init-USART1-false-HAL
78 | RCC.APB1Freq_Value=8000000
79 | RCC.APB2Freq_Value=8000000
80 | RCC.FamilyName=M
81 | RCC.IPParameters=APB1Freq_Value,APB2Freq_Value,FamilyName,PLLCLKFreq_Value,PLLMCOFreq_Value,TimSysFreq_Value
82 | RCC.PLLCLKFreq_Value=8000000
83 | RCC.PLLMCOFreq_Value=4000000
84 | RCC.TimSysFreq_Value=8000000
85 | USART1.IPParameters=VirtualMode
86 | USART1.VirtualMode=VM_ASYNC
87 | VP_SYS_VS_Systick.Mode=SysTick
88 | VP_SYS_VS_Systick.Signal=SYS_VS_Systick
89 | board=uart2
90 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_mat_init_q15.c
9 | *
10 | * Description: Q15 matrix initialization.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------------- */
40 |
41 |
42 | #include "arm_math.h"
43 |
44 | /**
45 | * @ingroup groupMatrix
46 | */
47 |
48 | /**
49 | * @addtogroup MatrixInit
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Q15 matrix initialization.
55 | * @param[in,out] *S points to an instance of the floating-point matrix structure.
56 | * @param[in] nRows number of rows in the matrix.
57 | * @param[in] nColumns number of columns in the matrix.
58 | * @param[in] *pData points to the matrix data array.
59 | * @return none
60 | */
61 |
62 | void arm_mat_init_q15(
63 | arm_matrix_instance_q15 * S,
64 | uint16_t nRows,
65 | uint16_t nColumns,
66 | q15_t * pData)
67 | {
68 | /* Assign Number of Rows */
69 | S->numRows = nRows;
70 |
71 | /* Assign Number of Columns */
72 | S->numCols = nColumns;
73 |
74 | /* Assign Data pointer */
75 | S->pData = pData;
76 | }
77 |
78 | /**
79 | * @} end of MatrixInit group
80 | */
81 |
--------------------------------------------------------------------------------
/mcu-code/Inc/stm32f1xx_it.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f1xx_it.h
4 | * @brief This file contains the headers of the interrupt handlers.
5 | ******************************************************************************
6 | *
7 | * COPYRIGHT(c) 2017 STMicroelectronics
8 | *
9 | * Redistribution and use in source and binary forms, with or without modification,
10 | * are permitted provided that the following conditions are met:
11 | * 1. Redistributions of source code must retain the above copyright notice,
12 | * this list of conditions and the following disclaimer.
13 | * 2. Redistributions in binary form must reproduce the above copyright notice,
14 | * this list of conditions and the following disclaimer in the documentation
15 | * and/or other materials provided with the distribution.
16 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
17 | * may be used to endorse or promote products derived from this software
18 | * without specific prior written permission.
19 | *
20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
23 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
24 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
26 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
27 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
28 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
29 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 | *
31 | ******************************************************************************
32 | */
33 |
34 | /* Define to prevent recursive inclusion -------------------------------------*/
35 | #ifndef __STM32F1xx_IT_H
36 | #define __STM32F1xx_IT_H
37 |
38 | #ifdef __cplusplus
39 | extern "C" {
40 | #endif
41 |
42 | /* Includes ------------------------------------------------------------------*/
43 | /* Exported types ------------------------------------------------------------*/
44 | /* Exported constants --------------------------------------------------------*/
45 | /* Exported macro ------------------------------------------------------------*/
46 | /* Exported functions ------------------------------------------------------- */
47 |
48 | void NMI_Handler(void);
49 | void HardFault_Handler(void);
50 | void MemManage_Handler(void);
51 | void BusFault_Handler(void);
52 | void UsageFault_Handler(void);
53 | void SVC_Handler(void);
54 | void DebugMon_Handler(void);
55 | void PendSV_Handler(void);
56 | void SysTick_Handler(void);
57 | void USART1_IRQHandler(void);
58 |
59 | #ifdef __cplusplus
60 | }
61 | #endif
62 |
63 | #endif /* __STM32F1xx_IT_H */
64 |
65 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
66 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_mat_init_q31.c
9 | *
10 | * Description: Q31 matrix initialization.
11 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
12 | *
13 | * Redistribution and use in source and binary forms, with or without
14 | * modification, are permitted provided that the following conditions
15 | * are met:
16 | * - Redistributions of source code must retain the above copyright
17 | * notice, this list of conditions and the following disclaimer.
18 | * - Redistributions in binary form must reproduce the above copyright
19 | * notice, this list of conditions and the following disclaimer in
20 | * the documentation and/or other materials provided with the
21 | * distribution.
22 | * - Neither the name of ARM LIMITED nor the names of its contributors
23 | * may be used to endorse or promote products derived from this
24 | * software without specific prior written permission.
25 | *
26 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
29 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
30 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
31 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
32 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
33 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
34 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
36 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 | * POSSIBILITY OF SUCH DAMAGE.
38 | * -------------------------------------------------------------------------- */
39 |
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupMatrix
45 | */
46 |
47 | /**
48 | * @defgroup MatrixInit Matrix Initialization
49 | *
50 | */
51 |
52 | /**
53 | * @addtogroup MatrixInit
54 | * @{
55 | */
56 |
57 | /**
58 | * @brief Q31 matrix initialization.
59 | * @param[in,out] *S points to an instance of the floating-point matrix structure.
60 | * @param[in] nRows number of rows in the matrix.
61 | * @param[in] nColumns number of columns in the matrix.
62 | * @param[in] *pData points to the matrix data array.
63 | * @return none
64 | */
65 |
66 | void arm_mat_init_q31(
67 | arm_matrix_instance_q31 * S,
68 | uint16_t nRows,
69 | uint16_t nColumns,
70 | q31_t * pData)
71 | {
72 | /* Assign Number of Rows */
73 | S->numRows = nRows;
74 |
75 | /* Assign Number of Columns */
76 | S->numCols = nColumns;
77 |
78 | /* Assign Data pointer */
79 | S->pData = pData;
80 | }
81 |
82 | /**
83 | * @} end of MatrixInit group
84 | */
85 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/DSP_Lib/Examples/arm_fir_example/ARM/math_helper.h:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.0
6 | *
7 | * Project: CMSIS DSP Library
8 | *
9 | * Title: math_helper.h
10 | *
11 | * Description: Prototypes of all helper functions required.
12 | *
13 | * Target Processor: Cortex-M4/Cortex-M3
14 | *
15 | * Redistribution and use in source and binary forms, with or without
16 | * modification, are permitted provided that the following conditions
17 | * are met:
18 | * - Redistributions of source code must retain the above copyright
19 | * notice, this list of conditions and the following disclaimer.
20 | * - Redistributions in binary form must reproduce the above copyright
21 | * notice, this list of conditions and the following disclaimer in
22 | * the documentation and/or other materials provided with the
23 | * distribution.
24 | * - Neither the name of ARM LIMITED nor the names of its contributors
25 | * may be used to endorse or promote products derived from this
26 | * software without specific prior written permission.
27 | *
28 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
31 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
32 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
33 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
34 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
35 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
36 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
38 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39 | * POSSIBILITY OF SUCH DAMAGE.
40 | * -------------------------------------------------------------------- */
41 |
42 |
43 | #include "arm_math.h"
44 |
45 | #ifndef MATH_HELPER_H
46 | #define MATH_HELPER_H
47 |
48 | float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize);
49 | void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples);
50 | void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
51 | void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
52 | void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples);
53 | void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples);
54 | void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples);
55 | void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples);
56 | void arm_clip_f32(float *pIn, uint32_t numSamples);
57 | uint32_t arm_calc_guard_bits(uint32_t num_adds);
58 | void arm_apply_guard_bits (float32_t * pIn, uint32_t numSamples, uint32_t guard_bits);
59 | uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples);
60 | uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples);
61 | uint32_t arm_calc_2pow(uint32_t guard_bits);
62 | #endif
63 |
64 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/DSP_Lib/Examples/arm_matrix_example/ARM/math_helper.h:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.0
6 | *
7 | * Project: CMSIS DSP Library
8 | *
9 | * Title: math_helper.h
10 | *
11 | * Description: Prototypes of all helper functions required.
12 | *
13 | * Target Processor: Cortex-M4/Cortex-M3
14 | *
15 | * Redistribution and use in source and binary forms, with or without
16 | * modification, are permitted provided that the following conditions
17 | * are met:
18 | * - Redistributions of source code must retain the above copyright
19 | * notice, this list of conditions and the following disclaimer.
20 | * - Redistributions in binary form must reproduce the above copyright
21 | * notice, this list of conditions and the following disclaimer in
22 | * the documentation and/or other materials provided with the
23 | * distribution.
24 | * - Neither the name of ARM LIMITED nor the names of its contributors
25 | * may be used to endorse or promote products derived from this
26 | * software without specific prior written permission.
27 | *
28 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
31 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
32 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
33 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
34 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
35 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
36 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
38 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39 | * POSSIBILITY OF SUCH DAMAGE.
40 | * -------------------------------------------------------------------- */
41 |
42 |
43 | #include "arm_math.h"
44 |
45 | #ifndef MATH_HELPER_H
46 | #define MATH_HELPER_H
47 |
48 | float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize);
49 | void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples);
50 | void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
51 | void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
52 | void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples);
53 | void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples);
54 | void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples);
55 | void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples);
56 | void arm_clip_f32(float *pIn, uint32_t numSamples);
57 | uint32_t arm_calc_guard_bits(uint32_t num_adds);
58 | void arm_apply_guard_bits (float32_t * pIn, uint32_t numSamples, uint32_t guard_bits);
59 | uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples);
60 | uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples);
61 | uint32_t arm_calc_2pow(uint32_t guard_bits);
62 | #endif
63 |
64 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/DSP_Lib/Examples/arm_convolution_example/ARM/math_helper.h:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.0
6 | *
7 | * Project: CMSIS DSP Library
8 | *
9 | * Title: math_helper.h
10 | *
11 | * Description: Prototypes of all helper functions required.
12 | *
13 | * Target Processor: Cortex-M4/Cortex-M3
14 | *
15 | * Redistribution and use in source and binary forms, with or without
16 | * modification, are permitted provided that the following conditions
17 | * are met:
18 | * - Redistributions of source code must retain the above copyright
19 | * notice, this list of conditions and the following disclaimer.
20 | * - Redistributions in binary form must reproduce the above copyright
21 | * notice, this list of conditions and the following disclaimer in
22 | * the documentation and/or other materials provided with the
23 | * distribution.
24 | * - Neither the name of ARM LIMITED nor the names of its contributors
25 | * may be used to endorse or promote products derived from this
26 | * software without specific prior written permission.
27 | *
28 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
31 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
32 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
33 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
34 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
35 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
36 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
38 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39 | * POSSIBILITY OF SUCH DAMAGE.
40 | * -------------------------------------------------------------------- */
41 |
42 |
43 | #include "arm_math.h"
44 |
45 | #ifndef MATH_HELPER_H
46 | #define MATH_HELPER_H
47 |
48 | float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize);
49 | void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples);
50 | void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
51 | void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
52 | void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples);
53 | void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples);
54 | void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples);
55 | void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples);
56 | void arm_clip_f32(float *pIn, uint32_t numSamples);
57 | uint32_t arm_calc_guard_bits(uint32_t num_adds);
58 | void arm_apply_guard_bits (float32_t * pIn, uint32_t numSamples, uint32_t guard_bits);
59 | uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples);
60 | uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples);
61 | uint32_t arm_calc_2pow(uint32_t guard_bits);
62 | #endif
63 |
64 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/DSP_Lib/Examples/arm_convolution_example/GCC/math_helper.h:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.0
6 | *
7 | * Project: CMSIS DSP Library
8 | *
9 | * Title: math_helper.h
10 | *
11 | * Description: Prototypes of all helper functions required.
12 | *
13 | * Target Processor: Cortex-M4/Cortex-M3
14 | *
15 | * Redistribution and use in source and binary forms, with or without
16 | * modification, are permitted provided that the following conditions
17 | * are met:
18 | * - Redistributions of source code must retain the above copyright
19 | * notice, this list of conditions and the following disclaimer.
20 | * - Redistributions in binary form must reproduce the above copyright
21 | * notice, this list of conditions and the following disclaimer in
22 | * the documentation and/or other materials provided with the
23 | * distribution.
24 | * - Neither the name of ARM LIMITED nor the names of its contributors
25 | * may be used to endorse or promote products derived from this
26 | * software without specific prior written permission.
27 | *
28 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
31 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
32 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
33 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
34 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
35 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
36 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
38 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39 | * POSSIBILITY OF SUCH DAMAGE.
40 | * -------------------------------------------------------------------- */
41 |
42 |
43 | #include "arm_math.h"
44 |
45 | #ifndef MATH_HELPER_H
46 | #define MATH_HELPER_H
47 |
48 | float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize);
49 | void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples);
50 | void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
51 | void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
52 | void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples);
53 | void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples);
54 | void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples);
55 | void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples);
56 | void arm_clip_f32(float *pIn, uint32_t numSamples);
57 | uint32_t arm_calc_guard_bits(uint32_t num_adds);
58 | void arm_apply_guard_bits (float32_t * pIn, uint32_t numSamples, uint32_t guard_bits);
59 | uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples);
60 | uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples);
61 | uint32_t arm_calc_2pow(uint32_t guard_bits);
62 | #endif
63 |
64 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/ARM/math_helper.h:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.0
6 | *
7 | * Project: CMSIS DSP Library
8 | *
9 | * Title: math_helper.h
10 | *
11 | * Description: Prototypes of all helper functions required.
12 | *
13 | * Target Processor: Cortex-M4/Cortex-M3
14 | *
15 | * Redistribution and use in source and binary forms, with or without
16 | * modification, are permitted provided that the following conditions
17 | * are met:
18 | * - Redistributions of source code must retain the above copyright
19 | * notice, this list of conditions and the following disclaimer.
20 | * - Redistributions in binary form must reproduce the above copyright
21 | * notice, this list of conditions and the following disclaimer in
22 | * the documentation and/or other materials provided with the
23 | * distribution.
24 | * - Neither the name of ARM LIMITED nor the names of its contributors
25 | * may be used to endorse or promote products derived from this
26 | * software without specific prior written permission.
27 | *
28 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
31 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
32 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
33 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
34 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
35 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
36 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
38 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39 | * POSSIBILITY OF SUCH DAMAGE.
40 | * -------------------------------------------------------------------- */
41 |
42 |
43 | #include "arm_math.h"
44 |
45 | #ifndef MATH_HELPER_H
46 | #define MATH_HELPER_H
47 |
48 | float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize);
49 | void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples);
50 | void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
51 | void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
52 | void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples);
53 | void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples);
54 | void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples);
55 | void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples);
56 | void arm_clip_f32(float *pIn, uint32_t numSamples);
57 | uint32_t arm_calc_guard_bits(uint32_t num_adds);
58 | void arm_apply_guard_bits (float32_t * pIn, uint32_t numSamples, uint32_t guard_bits);
59 | uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples);
60 | uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples);
61 | uint32_t arm_calc_2pow(uint32_t guard_bits);
62 | #endif
63 |
64 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/ARM/math_helper.h:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.0
6 | *
7 | * Project: CMSIS DSP Library
8 | *
9 | * Title: math_helper.h
10 | *
11 | * Description: Prototypes of all helper functions required.
12 | *
13 | * Target Processor: Cortex-M4/Cortex-M3
14 | *
15 | * Redistribution and use in source and binary forms, with or without
16 | * modification, are permitted provided that the following conditions
17 | * are met:
18 | * - Redistributions of source code must retain the above copyright
19 | * notice, this list of conditions and the following disclaimer.
20 | * - Redistributions in binary form must reproduce the above copyright
21 | * notice, this list of conditions and the following disclaimer in
22 | * the documentation and/or other materials provided with the
23 | * distribution.
24 | * - Neither the name of ARM LIMITED nor the names of its contributors
25 | * may be used to endorse or promote products derived from this
26 | * software without specific prior written permission.
27 | *
28 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
31 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
32 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
33 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
34 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
35 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
36 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
38 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39 | * POSSIBILITY OF SUCH DAMAGE.
40 | * -------------------------------------------------------------------- */
41 |
42 |
43 | #include "arm_math.h"
44 |
45 | #ifndef MATH_HELPER_H
46 | #define MATH_HELPER_H
47 |
48 | float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize);
49 | void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples);
50 | void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
51 | void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
52 | void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples);
53 | void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples);
54 | void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples);
55 | void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples);
56 | void arm_clip_f32(float *pIn, uint32_t numSamples);
57 | uint32_t arm_calc_guard_bits(uint32_t num_adds);
58 | void arm_apply_guard_bits (float32_t * pIn, uint32_t numSamples, uint32_t guard_bits);
59 | uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples);
60 | uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples);
61 | uint32_t arm_calc_2pow(uint32_t guard_bits);
62 | #endif
63 |
64 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/ARM/math_helper.h:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.0
6 | *
7 | * Project: CMSIS DSP Library
8 | *
9 | * Title: math_helper.h
10 | *
11 | * Description: Prototypes of all helper functions required.
12 | *
13 | * Target Processor: Cortex-M4/Cortex-M3
14 | *
15 | * Redistribution and use in source and binary forms, with or without
16 | * modification, are permitted provided that the following conditions
17 | * are met:
18 | * - Redistributions of source code must retain the above copyright
19 | * notice, this list of conditions and the following disclaimer.
20 | * - Redistributions in binary form must reproduce the above copyright
21 | * notice, this list of conditions and the following disclaimer in
22 | * the documentation and/or other materials provided with the
23 | * distribution.
24 | * - Neither the name of ARM LIMITED nor the names of its contributors
25 | * may be used to endorse or promote products derived from this
26 | * software without specific prior written permission.
27 | *
28 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
31 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
32 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
33 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
34 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
35 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
36 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
38 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39 | * POSSIBILITY OF SUCH DAMAGE.
40 | * -------------------------------------------------------------------- */
41 |
42 |
43 | #include "arm_math.h"
44 |
45 | #ifndef MATH_HELPER_H
46 | #define MATH_HELPER_H
47 |
48 | float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize);
49 | void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples);
50 | void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
51 | void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
52 | void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples);
53 | void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples);
54 | void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples);
55 | void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples);
56 | void arm_clip_f32(float *pIn, uint32_t numSamples);
57 | uint32_t arm_calc_guard_bits(uint32_t num_adds);
58 | void arm_apply_guard_bits (float32_t * pIn, uint32_t numSamples, uint32_t guard_bits);
59 | uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples);
60 | uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples);
61 | uint32_t arm_calc_2pow(uint32_t guard_bits);
62 | #endif
63 |
64 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q15.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_lattice_init_q15.c
9 | *
10 | * Description: Q15 FIR Lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q15 FIR lattice filter.
54 | * @param[in] *S points to an instance of the Q15 FIR lattice structure.
55 | * @param[in] numStages number of filter stages.
56 | * @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
57 | * @param[in] *pState points to the state buffer. The array is of length numStages.
58 | * @return none.
59 | */
60 |
61 | void arm_fir_lattice_init_q15(
62 | arm_fir_lattice_instance_q15 * S,
63 | uint16_t numStages,
64 | q15_t * pCoeffs,
65 | q15_t * pState)
66 | {
67 | /* Assign filter taps */
68 | S->numStages = numStages;
69 |
70 | /* Assign coefficient pointer */
71 | S->pCoeffs = pCoeffs;
72 |
73 | /* Clear state buffer and size is always numStages */
74 | memset(pState, 0, (numStages) * sizeof(q15_t));
75 |
76 | /* Assign state pointer */
77 | S->pState = pState;
78 |
79 | }
80 |
81 | /**
82 | * @} end of FIR_Lattice group
83 | */
84 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q31.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_lattice_init_q31.c
9 | *
10 | * Description: Q31 FIR lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q31 FIR lattice filter.
54 | * @param[in] *S points to an instance of the Q31 FIR lattice structure.
55 | * @param[in] numStages number of filter stages.
56 | * @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
57 | * @param[in] *pState points to the state buffer. The array is of length numStages.
58 | * @return none.
59 | */
60 |
61 | void arm_fir_lattice_init_q31(
62 | arm_fir_lattice_instance_q31 * S,
63 | uint16_t numStages,
64 | q31_t * pCoeffs,
65 | q31_t * pState)
66 | {
67 | /* Assign filter taps */
68 | S->numStages = numStages;
69 |
70 | /* Assign coefficient pointer */
71 | S->pCoeffs = pCoeffs;
72 |
73 | /* Clear state buffer and size is always numStages */
74 | memset(pState, 0, (numStages) * sizeof(q31_t));
75 |
76 | /* Assign state pointer */
77 | S->pState = pState;
78 |
79 | }
80 |
81 | /**
82 | * @} end of FIR_Lattice group
83 | */
84 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_f32.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_lattice_init_f32.c
9 | *
10 | * Description: Floating-point FIR Lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the floating-point FIR lattice filter.
54 | * @param[in] *S points to an instance of the floating-point FIR lattice structure.
55 | * @param[in] numStages number of filter stages.
56 | * @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
57 | * @param[in] *pState points to the state buffer. The array is of length numStages.
58 | * @return none.
59 | */
60 |
61 | void arm_fir_lattice_init_f32(
62 | arm_fir_lattice_instance_f32 * S,
63 | uint16_t numStages,
64 | float32_t * pCoeffs,
65 | float32_t * pState)
66 | {
67 | /* Assign filter taps */
68 | S->numStages = numStages;
69 |
70 | /* Assign coefficient pointer */
71 | S->pCoeffs = pCoeffs;
72 |
73 | /* Clear state buffer and size is always numStages */
74 | memset(pState, 0, (numStages) * sizeof(float32_t));
75 |
76 | /* Assign state pointer */
77 | S->pState = pState;
78 |
79 | }
80 |
81 | /**
82 | * @} end of FIR_Lattice group
83 | */
84 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_f32.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_mat_init_f32.c
9 | *
10 | * Description: Floating-point matrix initialization.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupMatrix
45 | */
46 |
47 | /**
48 | * @defgroup MatrixInit Matrix Initialization
49 | *
50 | * Initializes the underlying matrix data structure.
51 | * The functions set the numRows,
52 | * numCols, and pData fields
53 | * of the matrix data structure.
54 | */
55 |
56 | /**
57 | * @addtogroup MatrixInit
58 | * @{
59 | */
60 |
61 | /**
62 | * @brief Floating-point matrix initialization.
63 | * @param[in,out] *S points to an instance of the floating-point matrix structure.
64 | * @param[in] nRows number of rows in the matrix.
65 | * @param[in] nColumns number of columns in the matrix.
66 | * @param[in] *pData points to the matrix data array.
67 | * @return none
68 | */
69 |
70 | void arm_mat_init_f32(
71 | arm_matrix_instance_f32 * S,
72 | uint16_t nRows,
73 | uint16_t nColumns,
74 | float32_t * pData)
75 | {
76 | /* Assign Number of Rows */
77 | S->numRows = nRows;
78 |
79 | /* Assign Number of Columns */
80 | S->numCols = nColumns;
81 |
82 | /* Assign Data pointer */
83 | S->pData = pData;
84 | }
85 |
86 | /**
87 | * @} end of MatrixInit group
88 | */
89 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_f32.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_init_f32.c
9 | *
10 | * Description: Floating-point PID Control initialization function
11 | *
12 | *
13 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
14 | *
15 | * Redistribution and use in source and binary forms, with or without
16 | * modification, are permitted provided that the following conditions
17 | * are met:
18 | * - Redistributions of source code must retain the above copyright
19 | * notice, this list of conditions and the following disclaimer.
20 | * - Redistributions in binary form must reproduce the above copyright
21 | * notice, this list of conditions and the following disclaimer in
22 | * the documentation and/or other materials provided with the
23 | * distribution.
24 | * - Neither the name of ARM LIMITED nor the names of its contributors
25 | * may be used to endorse or promote products derived from this
26 | * software without specific prior written permission.
27 | *
28 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
31 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
32 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
33 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
34 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
35 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
36 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
38 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39 | * POSSIBILITY OF SUCH DAMAGE.
40 | * ------------------------------------------------------------------- */
41 |
42 | #include "arm_math.h"
43 |
44 | /**
45 | * @addtogroup PID
46 | * @{
47 | */
48 |
49 | /**
50 | * @brief Initialization function for the floating-point PID Control.
51 | * @param[in,out] *S points to an instance of the PID structure.
52 | * @param[in] resetStateFlag flag to reset the state. 0 = no change in state & 1 = reset the state.
53 | * @return none.
54 | * \par Description:
55 | * \par
56 | * The resetStateFlag specifies whether to set state to zero or not. \n
57 | * The function computes the structure fields: A0, A1 A2
58 | * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
59 | * also sets the state variables to all zeros.
60 | */
61 |
62 | void arm_pid_init_f32(
63 | arm_pid_instance_f32 * S,
64 | int32_t resetStateFlag)
65 | {
66 |
67 | /* Derived coefficient A0 */
68 | S->A0 = S->Kp + S->Ki + S->Kd;
69 |
70 | /* Derived coefficient A1 */
71 | S->A1 = (-S->Kp) - ((float32_t) 2.0 * S->Kd);
72 |
73 | /* Derived coefficient A2 */
74 | S->A2 = S->Kd;
75 |
76 | /* Check whether state needs reset or not */
77 | if(resetStateFlag)
78 | {
79 | /* Clear the state buffer. The size will be always 3 samples */
80 | memset(S->state, 0, 3u * sizeof(float32_t));
81 | }
82 |
83 | }
84 |
85 | /**
86 | * @} end of PID group
87 | */
88 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_sin_q31.c
9 | *
10 | * Description: Fast sine calculation for Q31 values.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 | #include "arm_common_tables.h"
43 |
44 | /**
45 | * @ingroup groupFastMath
46 | */
47 |
48 | /**
49 | * @addtogroup sin
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Fast approximation to the trigonometric sine function for Q31 data.
55 | * @param[in] x Scaled input value in radians.
56 | * @return sin(x).
57 | *
58 | * The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi). */
59 |
60 | q31_t arm_sin_q31(
61 | q31_t x)
62 | {
63 | q31_t sinVal; /* Temporary variables for input, output */
64 | int32_t index; /* Index variables */
65 | q31_t a, b; /* Four nearest output values */
66 | q31_t fract; /* Temporary values for fractional values */
67 |
68 | /* Calculate the nearest index */
69 | index = (uint32_t)x >> FAST_MATH_Q31_SHIFT;
70 |
71 | /* Calculation of fractional value */
72 | fract = (x - (index << FAST_MATH_Q31_SHIFT)) << 9;
73 |
74 | /* Read two nearest values of input value from the sin table */
75 | a = sinTable_q31[index];
76 | b = sinTable_q31[index+1];
77 |
78 | /* Linear interpolation process */
79 | sinVal = (q63_t)(0x80000000-fract)*a >> 32;
80 | sinVal = (q31_t)((((q63_t)sinVal << 32) + ((q63_t)fract*b)) >> 32);
81 |
82 | return sinVal << 1;
83 | }
84 |
85 | /**
86 | * @} end of sin group
87 | */
88 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_sin_q15.c
9 | *
10 | * Description: Fast sine calculation for Q15 values.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 | #include "arm_common_tables.h"
43 |
44 | /**
45 | * @ingroup groupFastMath
46 | */
47 |
48 | /**
49 | * @addtogroup sin
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Fast approximation to the trigonometric sine function for Q15 data.
55 | * @param[in] x Scaled input value in radians.
56 | * @return sin(x).
57 | *
58 | * The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi).
59 | */
60 |
61 | q15_t arm_sin_q15(
62 | q15_t x)
63 | {
64 | q15_t sinVal; /* Temporary variables for input, output */
65 | int32_t index; /* Index variables */
66 | q15_t a, b; /* Four nearest output values */
67 | q15_t fract; /* Temporary values for fractional values */
68 |
69 | /* Calculate the nearest index */
70 | index = (uint32_t)x >> FAST_MATH_Q15_SHIFT;
71 |
72 | /* Calculation of fractional value */
73 | fract = (x - (index << FAST_MATH_Q15_SHIFT)) << 9;
74 |
75 | /* Read two nearest values of input value from the sin table */
76 | a = sinTable_q15[index];
77 | b = sinTable_q15[index+1];
78 |
79 | /* Linear interpolation process */
80 | sinVal = (q31_t)(0x8000-fract)*a >> 16;
81 | sinVal = (q15_t)((((q31_t)sinVal << 16) + ((q31_t)fract*b)) >> 16);
82 |
83 | return sinVal << 1;
84 | }
85 |
86 | /**
87 | * @} end of sin group
88 | */
89 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/STM32F1xx_HAL_Driver/Inc/stm32_assert_template.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32_assert.h
4 | * @author MCD Application Team
5 | * @version V1.1.1
6 | * @date 12-May-2017
7 | * @brief STM32 assert template file.
8 | * This file should be copied to the application folder and renamed
9 | * to stm32_assert.h.
10 | ******************************************************************************
11 | * @attention
12 | *
13 | * © COPYRIGHT(c) 2016 STMicroelectronics
14 | *
15 | * Redistribution and use in source and binary forms, with or without modification,
16 | * are permitted provided that the following conditions are met:
17 | * 1. Redistributions of source code must retain the above copyright notice,
18 | * this list of conditions and the following disclaimer.
19 | * 2. Redistributions in binary form must reproduce the above copyright notice,
20 | * this list of conditions and the following disclaimer in the documentation
21 | * and/or other materials provided with the distribution.
22 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
23 | * may be used to endorse or promote products derived from this software
24 | * without specific prior written permission.
25 | *
26 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
27 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
29 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
30 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
32 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
33 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
34 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 | *
37 | ******************************************************************************
38 | */
39 |
40 | /* Define to prevent recursive inclusion -------------------------------------*/
41 | #ifndef __STM32_ASSERT_H
42 | #define __STM32_ASSERT_H
43 |
44 | #ifdef __cplusplus
45 | extern "C" {
46 | #endif
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 | /* Exported constants --------------------------------------------------------*/
50 | /* Includes ------------------------------------------------------------------*/
51 | /* Exported macro ------------------------------------------------------------*/
52 | #ifdef USE_FULL_ASSERT
53 | /**
54 | * @brief The assert_param macro is used for function's parameters check.
55 | * @param expr: If expr is false, it calls assert_failed function
56 | * which reports the name of the source file and the source
57 | * line number of the call that failed.
58 | * If expr is true, it returns no value.
59 | * @retval None
60 | */
61 | #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
62 | /* Exported functions ------------------------------------------------------- */
63 | void assert_failed(uint8_t* file, uint32_t line);
64 | #else
65 | #define assert_param(expr) ((void)0U)
66 | #endif /* USE_FULL_ASSERT */
67 |
68 | #ifdef __cplusplus
69 | }
70 | #endif
71 |
72 | #endif /* __STM32_ASSERT_H */
73 |
74 |
75 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
76 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q15.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_iir_lattice_init_q15.c
9 | *
10 | * Description: Q15 IIR lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup IIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q15 IIR lattice filter.
54 | * @param[in] *S points to an instance of the Q15 IIR lattice structure.
55 | * @param[in] numStages number of stages in the filter.
56 | * @param[in] *pkCoeffs points to reflection coefficient buffer. The array is of length numStages.
57 | * @param[in] *pvCoeffs points to ladder coefficient buffer. The array is of length numStages+1.
58 | * @param[in] *pState points to state buffer. The array is of length numStages+blockSize.
59 | * @param[in] blockSize number of samples to process per call.
60 | * @return none.
61 | */
62 |
63 | void arm_iir_lattice_init_q15(
64 | arm_iir_lattice_instance_q15 * S,
65 | uint16_t numStages,
66 | q15_t * pkCoeffs,
67 | q15_t * pvCoeffs,
68 | q15_t * pState,
69 | uint32_t blockSize)
70 | {
71 | /* Assign filter taps */
72 | S->numStages = numStages;
73 |
74 | /* Assign reflection coefficient pointer */
75 | S->pkCoeffs = pkCoeffs;
76 |
77 | /* Assign ladder coefficient pointer */
78 | S->pvCoeffs = pvCoeffs;
79 |
80 | /* Clear state buffer and size is always blockSize + numStages */
81 | memset(pState, 0, (numStages + blockSize) * sizeof(q15_t));
82 |
83 | /* Assign state pointer */
84 | S->pState = pState;
85 |
86 |
87 | }
88 |
89 | /**
90 | * @} end of IIR_Lattice group
91 | */
92 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q31.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_iir_lattice_init_q31.c
9 | *
10 | * Description: Initialization function for the Q31 IIR lattice filter.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup IIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q31 IIR lattice filter.
54 | * @param[in] *S points to an instance of the Q31 IIR lattice structure.
55 | * @param[in] numStages number of stages in the filter.
56 | * @param[in] *pkCoeffs points to the reflection coefficient buffer. The array is of length numStages.
57 | * @param[in] *pvCoeffs points to the ladder coefficient buffer. The array is of length numStages+1.
58 | * @param[in] *pState points to the state buffer. The array is of length numStages+blockSize.
59 | * @param[in] blockSize number of samples to process.
60 | * @return none.
61 | */
62 |
63 | void arm_iir_lattice_init_q31(
64 | arm_iir_lattice_instance_q31 * S,
65 | uint16_t numStages,
66 | q31_t * pkCoeffs,
67 | q31_t * pvCoeffs,
68 | q31_t * pState,
69 | uint32_t blockSize)
70 | {
71 | /* Assign filter taps */
72 | S->numStages = numStages;
73 |
74 | /* Assign reflection coefficient pointer */
75 | S->pkCoeffs = pkCoeffs;
76 |
77 | /* Assign ladder coefficient pointer */
78 | S->pvCoeffs = pvCoeffs;
79 |
80 | /* Clear state buffer and size is always blockSize + numStages */
81 | memset(pState, 0, (numStages + blockSize) * sizeof(q31_t));
82 |
83 | /* Assign state pointer */
84 | S->pState = pState;
85 |
86 |
87 | }
88 |
89 | /**
90 | * @} end of IIR_Lattice group
91 | */
92 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_f32.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_iir_lattice_init_f32.c
9 | *
10 | * Description: Floating-point IIR lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup IIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the floating-point IIR lattice filter.
54 | * @param[in] *S points to an instance of the floating-point IIR lattice structure.
55 | * @param[in] numStages number of stages in the filter.
56 | * @param[in] *pkCoeffs points to the reflection coefficient buffer. The array is of length numStages.
57 | * @param[in] *pvCoeffs points to the ladder coefficient buffer. The array is of length numStages+1.
58 | * @param[in] *pState points to the state buffer. The array is of length numStages+blockSize.
59 | * @param[in] blockSize number of samples to process.
60 | * @return none.
61 | */
62 |
63 | void arm_iir_lattice_init_f32(
64 | arm_iir_lattice_instance_f32 * S,
65 | uint16_t numStages,
66 | float32_t * pkCoeffs,
67 | float32_t * pvCoeffs,
68 | float32_t * pState,
69 | uint32_t blockSize)
70 | {
71 | /* Assign filter taps */
72 | S->numStages = numStages;
73 |
74 | /* Assign reflection coefficient pointer */
75 | S->pkCoeffs = pkCoeffs;
76 |
77 | /* Assign ladder coefficient pointer */
78 | S->pvCoeffs = pvCoeffs;
79 |
80 | /* Clear state buffer and size is always blockSize + numStages */
81 | memset(pState, 0, (numStages + blockSize) * sizeof(float32_t));
82 |
83 | /* Assign state pointer */
84 | S->pState = pState;
85 |
86 |
87 | }
88 |
89 | /**
90 | * @} end of IIR_Lattice group
91 | */
92 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 07. September 2015
5 | * $Revision: V.1.4.5 a
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_cos_q15.c
9 | *
10 | * Description: Fast cosine calculation for Q15 values.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 | #include "arm_common_tables.h"
43 |
44 | /**
45 | * @ingroup groupFastMath
46 | */
47 |
48 | /**
49 | * @addtogroup cos
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Fast approximation to the trigonometric cosine function for Q15 data.
55 | * @param[in] x Scaled input value in radians.
56 | * @return cos(x).
57 | *
58 | * The Q15 input value is in the range [0 +0.9999] and is mapped to a radian
59 | * value in the range [0 2*pi).
60 | */
61 |
62 | q15_t arm_cos_q15(
63 | q15_t x)
64 | {
65 | q15_t cosVal; /* Temporary variables for input, output */
66 | int32_t index; /* Index variables */
67 | q15_t a, b; /* Four nearest output values */
68 | q15_t fract; /* Temporary values for fractional values */
69 |
70 | /* add 0.25 (pi/2) to read sine table */
71 | x = (uint16_t)x + 0x2000;
72 | if(x < 0)
73 | { /* convert negative numbers to corresponding positive ones */
74 | x = (uint16_t)x + 0x8000;
75 | }
76 |
77 | /* Calculate the nearest index */
78 | index = (uint32_t)x >> FAST_MATH_Q15_SHIFT;
79 |
80 | /* Calculation of fractional value */
81 | fract = (x - (index << FAST_MATH_Q15_SHIFT)) << 9;
82 |
83 | /* Read two nearest values of input value from the sin table */
84 | a = sinTable_q15[index];
85 | b = sinTable_q15[index+1];
86 |
87 | /* Linear interpolation process */
88 | cosVal = (q31_t)(0x8000-fract)*a >> 16;
89 | cosVal = (q15_t)((((q31_t)cosVal << 16) + ((q31_t)fract*b)) >> 16);
90 |
91 | return cosVal << 1;
92 | }
93 |
94 | /**
95 | * @} end of cos group
96 | */
97 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 07. September 2015
5 | * $Revision: V.1.4.5 a
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_cos_q31.c
9 | *
10 | * Description: Fast cosine calculation for Q31 values.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 | #include "arm_common_tables.h"
43 |
44 | /**
45 | * @ingroup groupFastMath
46 | */
47 |
48 | /**
49 | * @addtogroup cos
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Fast approximation to the trigonometric cosine function for Q31 data.
55 | * @param[in] x Scaled input value in radians.
56 | * @return cos(x).
57 | *
58 | * The Q31 input value is in the range [0 +0.9999] and is mapped to a radian
59 | * value in the range [0 2*pi).
60 | */
61 |
62 | q31_t arm_cos_q31(
63 | q31_t x)
64 | {
65 | q31_t cosVal; /* Temporary variables for input, output */
66 | int32_t index; /* Index variables */
67 | q31_t a, b; /* Four nearest output values */
68 | q31_t fract; /* Temporary values for fractional values */
69 |
70 | /* add 0.25 (pi/2) to read sine table */
71 | x = (uint32_t)x + 0x20000000;
72 | if(x < 0)
73 | { /* convert negative numbers to corresponding positive ones */
74 | x = (uint32_t)x + 0x80000000;
75 | }
76 |
77 | /* Calculate the nearest index */
78 | index = (uint32_t)x >> FAST_MATH_Q31_SHIFT;
79 |
80 | /* Calculation of fractional value */
81 | fract = (x - (index << FAST_MATH_Q31_SHIFT)) << 9;
82 |
83 | /* Read two nearest values of input value from the sin table */
84 | a = sinTable_q31[index];
85 | b = sinTable_q31[index+1];
86 |
87 | /* Linear interpolation process */
88 | cosVal = (q63_t)(0x80000000-fract)*a >> 32;
89 | cosVal = (q31_t)((((q63_t)cosVal << 32) + ((q63_t)fract*b)) >> 32);
90 |
91 | return cosVal << 1;
92 | }
93 |
94 | /**
95 | * @} end of cos group
96 | */
97 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/Include/core_cmFunc.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file core_cmFunc.h
3 | * @brief CMSIS Cortex-M Core Function Access Header File
4 | * @version V4.30
5 | * @date 20. October 2015
6 | ******************************************************************************/
7 | /* Copyright (c) 2009 - 2015 ARM LIMITED
8 |
9 | All rights reserved.
10 | Redistribution and use in source and binary forms, with or without
11 | modification, are permitted provided that the following conditions are met:
12 | - Redistributions of source code must retain the above copyright
13 | notice, this list of conditions and the following disclaimer.
14 | - Redistributions in binary form must reproduce the above copyright
15 | notice, this list of conditions and the following disclaimer in the
16 | documentation and/or other materials provided with the distribution.
17 | - Neither the name of ARM nor the names of its contributors may be used
18 | to endorse or promote products derived from this software without
19 | specific prior written permission.
20 | *
21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 | POSSIBILITY OF SUCH DAMAGE.
32 | ---------------------------------------------------------------------------*/
33 |
34 |
35 | #if defined ( __ICCARM__ )
36 | #pragma system_include /* treat file as system include file for MISRA check */
37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
38 | #pragma clang system_header /* treat file as system include file */
39 | #endif
40 |
41 | #ifndef __CORE_CMFUNC_H
42 | #define __CORE_CMFUNC_H
43 |
44 |
45 | /* ########################### Core Function Access ########################### */
46 | /** \ingroup CMSIS_Core_FunctionInterface
47 | \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
48 | @{
49 | */
50 |
51 | /*------------------ RealView Compiler -----------------*/
52 | #if defined ( __CC_ARM )
53 | #include "cmsis_armcc.h"
54 |
55 | /*------------------ ARM Compiler V6 -------------------*/
56 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
57 | #include "cmsis_armcc_V6.h"
58 |
59 | /*------------------ GNU Compiler ----------------------*/
60 | #elif defined ( __GNUC__ )
61 | #include "cmsis_gcc.h"
62 |
63 | /*------------------ ICC Compiler ----------------------*/
64 | #elif defined ( __ICCARM__ )
65 | #include
66 |
67 | /*------------------ TI CCS Compiler -------------------*/
68 | #elif defined ( __TMS470__ )
69 | #include
70 |
71 | /*------------------ TASKING Compiler ------------------*/
72 | #elif defined ( __TASKING__ )
73 | /*
74 | * The CMSIS functions have been implemented as intrinsics in the compiler.
75 | * Please use "carm -?i" to get an up to date list of all intrinsics,
76 | * Including the CMSIS ones.
77 | */
78 |
79 | /*------------------ COSMIC Compiler -------------------*/
80 | #elif defined ( __CSMC__ )
81 | #include
82 |
83 | #endif
84 |
85 | /*@} end of CMSIS_Core_RegAccFunctions */
86 |
87 | #endif /* __CORE_CMFUNC_H */
88 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file system_stm32f10x.h
4 | * @author MCD Application Team
5 | * @version V4.2.0
6 | * @date 31-March-2017
7 | * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT(c) 2017 STMicroelectronics
12 | *
13 | * Redistribution and use in source and binary forms, with or without modification,
14 | * are permitted provided that the following conditions are met:
15 | * 1. Redistributions of source code must retain the above copyright notice,
16 | * this list of conditions and the following disclaimer.
17 | * 2. Redistributions in binary form must reproduce the above copyright notice,
18 | * this list of conditions and the following disclaimer in the documentation
19 | * and/or other materials provided with the distribution.
20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 | * may be used to endorse or promote products derived from this software
22 | * without specific prior written permission.
23 | *
24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 | *
35 | ******************************************************************************
36 | */
37 |
38 | /** @addtogroup CMSIS
39 | * @{
40 | */
41 |
42 | /** @addtogroup stm32f10x_system
43 | * @{
44 | */
45 |
46 | /**
47 | * @brief Define to prevent recursive inclusion
48 | */
49 | #ifndef __SYSTEM_STM32F10X_H
50 | #define __SYSTEM_STM32F10X_H
51 |
52 | #ifdef __cplusplus
53 | extern "C" {
54 | #endif
55 |
56 | /** @addtogroup STM32F10x_System_Includes
57 | * @{
58 | */
59 |
60 | /**
61 | * @}
62 | */
63 |
64 |
65 | /** @addtogroup STM32F10x_System_Exported_types
66 | * @{
67 | */
68 |
69 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
70 | extern const uint8_t AHBPrescTable[16U]; /*!< AHB prescalers table values */
71 | extern const uint8_t APBPrescTable[8U]; /*!< APB prescalers table values */
72 |
73 | /**
74 | * @}
75 | */
76 |
77 | /** @addtogroup STM32F10x_System_Exported_Constants
78 | * @{
79 | */
80 |
81 | /**
82 | * @}
83 | */
84 |
85 | /** @addtogroup STM32F10x_System_Exported_Macros
86 | * @{
87 | */
88 |
89 | /**
90 | * @}
91 | */
92 |
93 | /** @addtogroup STM32F10x_System_Exported_Functions
94 | * @{
95 | */
96 |
97 | extern void SystemInit(void);
98 | extern void SystemCoreClockUpdate(void);
99 | /**
100 | * @}
101 | */
102 |
103 | #ifdef __cplusplus
104 | }
105 | #endif
106 |
107 | #endif /*__SYSTEM_STM32F10X_H */
108 |
109 | /**
110 | * @}
111 | */
112 |
113 | /**
114 | * @}
115 | */
116 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
117 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/Include/core_cmInstr.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file core_cmInstr.h
3 | * @brief CMSIS Cortex-M Core Instruction Access Header File
4 | * @version V4.30
5 | * @date 20. October 2015
6 | ******************************************************************************/
7 | /* Copyright (c) 2009 - 2015 ARM LIMITED
8 |
9 | All rights reserved.
10 | Redistribution and use in source and binary forms, with or without
11 | modification, are permitted provided that the following conditions are met:
12 | - Redistributions of source code must retain the above copyright
13 | notice, this list of conditions and the following disclaimer.
14 | - Redistributions in binary form must reproduce the above copyright
15 | notice, this list of conditions and the following disclaimer in the
16 | documentation and/or other materials provided with the distribution.
17 | - Neither the name of ARM nor the names of its contributors may be used
18 | to endorse or promote products derived from this software without
19 | specific prior written permission.
20 | *
21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 | POSSIBILITY OF SUCH DAMAGE.
32 | ---------------------------------------------------------------------------*/
33 |
34 |
35 | #if defined ( __ICCARM__ )
36 | #pragma system_include /* treat file as system include file for MISRA check */
37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
38 | #pragma clang system_header /* treat file as system include file */
39 | #endif
40 |
41 | #ifndef __CORE_CMINSTR_H
42 | #define __CORE_CMINSTR_H
43 |
44 |
45 | /* ########################## Core Instruction Access ######################### */
46 | /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
47 | Access to dedicated instructions
48 | @{
49 | */
50 |
51 | /*------------------ RealView Compiler -----------------*/
52 | #if defined ( __CC_ARM )
53 | #include "cmsis_armcc.h"
54 |
55 | /*------------------ ARM Compiler V6 -------------------*/
56 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
57 | #include "cmsis_armcc_V6.h"
58 |
59 | /*------------------ GNU Compiler ----------------------*/
60 | #elif defined ( __GNUC__ )
61 | #include "cmsis_gcc.h"
62 |
63 | /*------------------ ICC Compiler ----------------------*/
64 | #elif defined ( __ICCARM__ )
65 | #include
66 |
67 | /*------------------ TI CCS Compiler -------------------*/
68 | #elif defined ( __TMS470__ )
69 | #include
70 |
71 | /*------------------ TASKING Compiler ------------------*/
72 | #elif defined ( __TASKING__ )
73 | /*
74 | * The CMSIS functions have been implemented as intrinsics in the compiler.
75 | * Please use "carm -?i" to get an up to date list of all intrinsics,
76 | * Including the CMSIS ones.
77 | */
78 |
79 | /*------------------ COSMIC Compiler -------------------*/
80 | #elif defined ( __CSMC__ )
81 | #include
82 |
83 | #endif
84 |
85 | /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
86 |
87 | #endif /* __CORE_CMINSTR_H */
88 |
--------------------------------------------------------------------------------
/mcu-code/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q7.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_init_q7.c
9 | *
10 | * Description: Q7 FIR filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR
49 | * @{
50 | */
51 | /**
52 | * @param[in,out] *S points to an instance of the Q7 FIR filter structure.
53 | * @param[in] numTaps Number of filter coefficients in the filter.
54 | * @param[in] *pCoeffs points to the filter coefficients buffer.
55 | * @param[in] *pState points to the state buffer.
56 | * @param[in] blockSize number of samples that are processed per call.
57 | * @return none
58 | *
59 | * Description:
60 | * \par
61 | * pCoeffs points to the array of filter coefficients stored in time reversed order:
62 | *
63 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
64 | *
65 | * \par
66 | * pState points to the array of state variables.
67 | * pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_q7().
68 | */
69 |
70 | void arm_fir_init_q7(
71 | arm_fir_instance_q7 * S,
72 | uint16_t numTaps,
73 | q7_t * pCoeffs,
74 | q7_t * pState,
75 | uint32_t blockSize)
76 | {
77 |
78 | /* Assign filter taps */
79 | S->numTaps = numTaps;
80 |
81 | /* Assign coefficient pointer */
82 | S->pCoeffs = pCoeffs;
83 |
84 | /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */
85 | memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q7_t));
86 |
87 | /* Assign state pointer */
88 | S->pState = pState;
89 |
90 | }
91 |
92 | /**
93 | * @} end of FIR group
94 | */
95 |
--------------------------------------------------------------------------------