├── Ass-1 ├── Assgn_1_Prob_1_Grp_16.s ├── Assgn_1_Prob_2_Grp_16.s └── Assignment_1.pdf ├── Ass-2 ├── Assgn_2_Prob_1Grp_16.s ├── Assgn_2_Prob_2_Grp_16.s ├── Assgn_2_Prob_3_Grp_16.s └── Assignment_2.pdf ├── Ass-3 ├── Assgn3_Prob1_Grp_16 │ ├── a.out │ ├── adder.v │ ├── comparator.v │ ├── mux.v │ ├── prob1.png │ ├── sign_mag_adder.v │ └── sign_mag_adder_tb.v ├── Assgn3_Prob2_Grp_16 │ ├── Prob2.png │ ├── a.out │ ├── bb_shifter.v │ ├── bb_shifter_tb.v │ └── mux.v └── Assignment_3.pdf ├── Ass-4 ├── Assignment_4.pdf ├── Bit_Serial_Adder │ ├── Adder.v │ ├── Bit Serial Adder.png │ ├── ShiftReg.v │ ├── a.out │ ├── bitSerialAdder.v │ ├── bitSerialAdder_test_bench.v │ ├── dff.v │ └── sipo.v ├── COA Report .pdf ├── Hybrid_Adder │ ├── Hybrid Adder.png │ ├── a.out │ ├── carry_lookahead_adder.v │ ├── hybrid_adder.v │ └── hybrid_adder_test_bench.v └── Ripple_Carry_Adder │ ├── Ripple Carry Adder.png │ ├── a.out │ ├── adder.v │ ├── ripple_carry_adder.v │ └── ripple_carry_adder_test_bench.v ├── Ass-5 ├── Array_Multiplier │ ├── a.out │ ├── array_multiplier.v │ ├── diagram.png │ └── test_bench.v ├── Assign_5_Report.pdf ├── Assignment_5.pdf ├── Booth_Multiplier │ ├── booth_multiplier.v │ ├── booth_multiplier_test_bench.v │ └── diagram.png └── combinational_multiplier │ ├── MUX16.v │ ├── MUX8.v │ ├── a.out │ ├── array_multiplier.v │ ├── block_diagram.png │ ├── combinational_multiplier.v │ └── test_bench.v ├── Ass-6 ├── Assignment_6.pdf ├── Three_Multiplier │ ├── diagram.png │ ├── fsm.v │ └── fsm_tb.v └── two_complement │ ├── diagram.png │ ├── two_complementer.v │ └── two_complementer_tb.v ├── Ass-7 ├── Assignment_7.pdf ├── Report.pdf └── codes │ ├── ALU_test_bench.v │ ├── ArithmeticLogicUnit.v │ ├── ControlUnit.v │ ├── Controller_tb.v │ ├── DataMemory.v │ ├── Data_Memory_tb.v │ ├── InstructionMemoryi.v │ ├── Instruction_Memory_tb.v │ ├── My_Processor.v │ ├── My_Processor_tb.v │ ├── ProgramCounter.v │ ├── RegisterFile.v │ └── SignExtend.v ├── End-Sem ├── Divide.v ├── Divide_tb.v └── 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