├── LICENSE ├── fundation ├── bittool │ ├── bittool.c │ └── bittool.h ├── buffer │ ├── buffer.c │ └── buffer.h ├── list │ ├── list.c │ └── list.h └── stream │ ├── stream.c │ └── stream.h ├── hal ├── core │ └── CortexM │ │ ├── cortexm.c │ │ └── cortexm.h └── gd32f1x0 │ ├── core.c │ ├── core.h │ ├── gd32f1x0.h │ ├── gpio │ └── GD32F1X0_GPIO.c │ ├── halo_basetype.h │ ├── halo_const.h │ └── startup │ └── iar │ └── startup_gd32f1x0.s ├── halo.h └── readme.md /LICENSE: -------------------------------------------------------------------------------- 1 | Copyright (c) SimonQian 2 | 3 | Permission is hereby granted, free of charge, to any person 4 | obtaining a copy of this software and associated documentation 5 | files (the "Software"), to deal in the Software without 6 | restriction, including without limitation the rights to use, 7 | copy, modify, merge, publish, distribute, sublicense, and/or sell 8 | copies of the Software, and to permit persons to whom the 9 | Software is furnished to do so, subject to the following 10 | conditions: 11 | 12 | The above copyright notice and this permission notice shall be 13 | included in all copies or substantial portions of the Software. 14 | 15 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 16 | EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 17 | OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 18 | NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 19 | HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 20 | WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 | FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 | OTHER DEALINGS IN THE SOFTWARE. 23 | -------------------------------------------------------------------------------- /fundation/bittool/bittool.c: -------------------------------------------------------------------------------- 1 | /**************************************************************************** 2 | * halo -- Open HAL for embedded systems * 3 | * * 4 | * MIT License: * 5 | * Copyright (c) 2017 SimonQian * 6 | * * 7 | * Permission is hereby granted, free of charge, to any person obtaining a * 8 | * copy of this software and associated documentation files (the * 9 | * "Software"), to deal in the Software without restriction, including * 10 | * without limitation the rights to use, copy, modify, merge, publish, * 11 | * distribute, distribute with modifications, sublicense, and/or sell * 12 | * copies of the Software, and to permit persons to whom the Software is * 13 | * furnished to do so, subject to the following conditions: * 14 | * * 15 | * The above copyright notice and this permission notice shall be included * 16 | * in all copies or substantial portions of the Software. * 17 | * * 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * 19 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * 20 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. * 21 | * IN NO EVENT SHALL THE ABOVE COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, * 22 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR * 23 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR * 24 | * THE USE OR OTHER DEALINGS IN THE SOFTWARE. * 25 | * * 26 | ****************************************************************************/ 27 | 28 | #include "halo.h" 29 | 30 | uint8_t BIT_REVERSE_U8(uint8_t v8) 31 | { 32 | v8 = ((v8 >> 1) & 0x55) | ((v8 << 1) & 0xAA); 33 | v8 = ((v8 >> 2) & 0x33) | ((v8 << 2) & 0xCC); 34 | v8 = ((v8 >> 4) & 0x0F) | ((v8 << 4) & 0xF0); 35 | return v8; 36 | } 37 | 38 | uint16_t BIT_REVERSE_U16(uint16_t v16) 39 | { 40 | v16 = ((v16 >> 1) & 0x5555) | ((v16 << 1) & 0xAAAA); 41 | v16 = ((v16 >> 2) & 0x3333) | ((v16 << 2) & 0xCCCC); 42 | v16 = ((v16 >> 4) & 0x0F0F) | ((v16 << 4) & 0xF0F0); 43 | return SWAP_U16(v16); 44 | } 45 | 46 | uint32_t BIT_REVERSE_U32(uint32_t v32) 47 | { 48 | v32 = ((v32 >> 1) & 0x55555555ul) | (((v32) << 1) & 0xAAAAAAAAul); 49 | v32 = ((v32 >> 2) & 0x33333333ul) | (((v32) << 2) & 0xCCCCCCCCul); 50 | v32 = ((v32 >> 4) & 0x0F0F0F0Ful) | (((v32) << 4) & 0xF0F0F0F0ul); 51 | return SWAP_U32(v32); 52 | } 53 | 54 | uint64_t BIT_REVERSE_U64(uint64_t v64) 55 | { 56 | v64 = ((v64 >> 1) & 0x5555555555555555ull) | ((v64 << 1) & 0xAAAAAAAAAAAAAAAAull); 57 | v64 = ((v64 >> 2) & 0x3333333333333333ull) | ((v64 << 2) & 0xCCCCCCCCCCCCCCCCull); 58 | v64 = ((v64 >> 4) & 0x0F0F0F0F0F0F0F0Full) | ((v64 << 4) & 0xF0F0F0F0F0F0F0F0ull); 59 | return SWAP_U64(v64); 60 | } 61 | 62 | uint16_t SWAP_U16(uint16_t v16) 63 | { 64 | return (v16 >> 8) | (v16 << 8); 65 | } 66 | uint32_t SWAP_U24(uint32_t v32) 67 | { 68 | return (v32 >> 16) | (v32 & 0x0000FF00ul) | ((v32 & 0x000000FFul) << 16); 69 | } 70 | uint32_t SWAP_U32(uint32_t v32) 71 | { 72 | v32 = ((v32 >> 8) & 0x00FF00FFul) | (((v32) << 8) & 0xFF00FF00ul); 73 | return (v32 >> 16) | (v32 << 16); 74 | } 75 | uint64_t SWAP_U64(uint64_t v64) 76 | { 77 | v64 = ((v64 >> 8) & 0x00FF00FF00FF00FFull) | ((v64 << 8) & 0xFF00FF00FF00FF00ull); 78 | v64 = ((v64 >> 16) & 0x0000FFFF0000FFFFull) | ((v64 << 16) & 0xFFFF0000FFFF0000ull); 79 | return (v64 >> 32) | (v64 << 32); 80 | } 81 | 82 | // GET_UXX_XXXXXXXX and SET_UXX_XXXXXXXX are align independent 83 | uint16_t GET_U16_MSBFIRST(uint8_t *p) 84 | { 85 | return ((uint16_t)p[0] << 8) | ((uint16_t)p[1] << 0); 86 | } 87 | 88 | uint32_t GET_U24_MSBFIRST(uint8_t *p) 89 | { 90 | return ((uint32_t)p[0] << 16) | ((uint32_t)p[1] << 8) | 91 | ((uint32_t)p[2] << 0); 92 | } 93 | 94 | uint32_t GET_U32_MSBFIRST(uint8_t *p) 95 | { 96 | return ((uint32_t)p[0] << 24) | ((uint32_t)p[1] << 16) | 97 | ((uint32_t)p[2] << 8) | ((uint32_t)p[3] << 0); 98 | } 99 | 100 | uint64_t GET_U64_MSBFIRST(uint8_t *p) 101 | { 102 | return ((uint64_t)p[0] << 56) | ((uint64_t)p[1] << 48) | 103 | ((uint64_t)p[2] << 40) | ((uint64_t)p[3] << 32) | 104 | ((uint64_t)p[4] << 24) | ((uint64_t)p[5] << 16) | 105 | ((uint64_t)p[6] << 8) | ((uint64_t)p[7] << 0); 106 | } 107 | 108 | uint16_t GET_U16_LSBFIRST(uint8_t *p) 109 | { 110 | return ((uint16_t)p[0] << 0) | ((uint16_t)p[1] << 8); 111 | } 112 | 113 | uint32_t GET_U24_LSBFIRST(uint8_t *p) 114 | { 115 | return ((uint32_t)p[0] << 0) | ((uint32_t)p[1] << 8) | 116 | ((uint32_t)p[2] << 16); 117 | } 118 | 119 | uint32_t GET_U32_LSBFIRST(uint8_t *p) 120 | { 121 | return ((uint32_t)p[0] << 0) | ((uint32_t)p[1] << 8) | 122 | ((uint32_t)p[2] << 16) | ((uint32_t)p[3] << 24); 123 | } 124 | 125 | uint64_t GET_U64_LSBFIRST(uint8_t *p) 126 | { 127 | return (p[0] << 0) | ((uint64_t)p[1] << 8) | 128 | ((uint64_t)p[2] << 16) | ((uint64_t)p[3] << 24) | 129 | ((uint64_t)p[4] << 32) | ((uint64_t)p[5] << 40) | 130 | ((uint64_t)p[6] << 48) | ((uint64_t)p[7] << 56); 131 | } 132 | 133 | void SET_U16_MSBFIRST(uint8_t *p, uint16_t v16) 134 | { 135 | p[0] = (v16 >> 8) & 0xFF; 136 | p[1] = (v16 >> 0) & 0xFF; 137 | } 138 | 139 | void SET_U24_MSBFIRST(uint8_t *p, uint32_t v32) 140 | { 141 | p[0] = (v32 >> 16) & 0xFF; 142 | p[1] = (v32 >> 8) & 0xFF; 143 | p[2] = (v32 >> 0) & 0xFF; 144 | } 145 | 146 | void SET_U32_MSBFIRST(uint8_t *p, uint32_t v32) 147 | { 148 | p[0] = (v32 >> 24) & 0xFF; 149 | p[1] = (v32 >> 16) & 0xFF; 150 | p[2] = (v32 >> 8) & 0xFF; 151 | p[3] = (v32 >> 0) & 0xFF; 152 | } 153 | 154 | void SET_U64_MSBFIRST(uint8_t *p, uint64_t v64) 155 | { 156 | p[0] = (v64 >> 56) & 0xFF; 157 | p[1] = (v64 >> 48) & 0xFF; 158 | p[2] = (v64 >> 40) & 0xFF; 159 | p[3] = (v64 >> 32) & 0xFF; 160 | p[4] = (v64 >> 24) & 0xFF; 161 | p[5] = (v64 >> 16) & 0xFF; 162 | p[6] = (v64 >> 8) & 0xFF; 163 | p[7] = (v64 >> 0) & 0xFF; 164 | } 165 | void SET_U16_LSBFIRST(uint8_t *p, uint16_t v16) 166 | { 167 | p[0] = (v16 >> 0) & 0xFF; 168 | p[1] = (v16 >> 8) & 0xFF; 169 | } 170 | 171 | void SET_U24_LSBFIRST(uint8_t *p, uint32_t v32) 172 | { 173 | p[0] = (v32 >> 0) & 0xFF; 174 | p[1] = (v32 >> 8) & 0xFF; 175 | p[2] = (v32 >> 16) & 0xFF; 176 | } 177 | 178 | void SET_U32_LSBFIRST(uint8_t *p, uint32_t v32) 179 | { 180 | p[0] = (v32 >> 0) & 0xFF; 181 | p[1] = (v32 >> 8) & 0xFF; 182 | p[2] = (v32 >> 16) & 0xFF; 183 | p[3] = (v32 >> 24) & 0xFF; 184 | } 185 | 186 | void SET_U64_LSBFIRST(uint8_t *p, uint64_t v64) 187 | { 188 | p[0] = (v64 >> 0) & 0xFF; 189 | p[1] = (v64 >> 8) & 0xFF; 190 | p[2] = (v64 >> 16) & 0xFF; 191 | p[3] = (v64 >> 24) & 0xFF; 192 | p[4] = (v64 >> 32) & 0xFF; 193 | p[5] = (v64 >> 40) & 0xFF; 194 | p[6] = (v64 >> 48) & 0xFF; 195 | p[7] = (v64 >> 56) & 0xFF; 196 | } 197 | 198 | int msb(uint32_t a) 199 | { 200 | int c = -1; 201 | while (a > 0) 202 | { 203 | c++; 204 | a >>= 1; 205 | } 206 | return c; 207 | } 208 | 209 | int ffz(uint32_t a) 210 | { 211 | a = ~a; 212 | return msb(a & -a); 213 | } 214 | 215 | // mask array 216 | void mskarr_set(uint32_t *arr, int bit) 217 | { 218 | arr[bit >> 5] |= (1 << (bit & 0x1F)); 219 | } 220 | 221 | void mskarr_clr(uint32_t *arr, int bit) 222 | { 223 | arr[bit >> 5] &= ~(1 << (bit & 0x1F)); 224 | } 225 | 226 | int mskarr_ffz(uint32_t *arr, int arrlen) 227 | { 228 | int i, tmp; 229 | 230 | for (i = 0; i < arrlen; i++) 231 | { 232 | tmp = ffz(arr[i]); 233 | if (tmp >= 0) 234 | { 235 | return (i << 5) + tmp; 236 | } 237 | } 238 | return -1; 239 | } 240 | -------------------------------------------------------------------------------- /fundation/bittool/bittool.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************** 2 | * halo -- Open HAL for embedded systems * 3 | * * 4 | * MIT License: * 5 | * Copyright (c) 2017 SimonQian * 6 | * * 7 | * Permission is hereby granted, free of charge, to any person obtaining a * 8 | * copy of this software and associated documentation files (the * 9 | * "Software"), to deal in the Software without restriction, including * 10 | * without limitation the rights to use, copy, modify, merge, publish, * 11 | * distribute, distribute with modifications, sublicense, and/or sell * 12 | * copies of the Software, and to permit persons to whom the Software is * 13 | * furnished to do so, subject to the following conditions: * 14 | * * 15 | * The above copyright notice and this permission notice shall be included * 16 | * in all copies or substantial portions of the Software. * 17 | * * 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * 19 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * 20 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. * 21 | * IN NO EVENT SHALL THE ABOVE COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, * 22 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR * 23 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR * 24 | * THE USE OR OTHER DEALINGS IN THE SOFTWARE. * 25 | * * 26 | ****************************************************************************/ 27 | 28 | #ifndef __BITTOOL_H_INCLUDED__ 29 | #define __BITTOOL_H_INCLUDED__ 30 | 31 | uint8_t BIT_REVERSE_U8(uint8_t); 32 | uint16_t BIT_REVERSE_U16(uint16_t); 33 | uint32_t BIT_REVERSE_U32(uint32_t); 34 | uint64_t BIT_REVERSE_U64(uint64_t); 35 | 36 | // GET_UXX_XXXXXXXX and SET_UXX_XXXXXXXX are align independent 37 | uint16_t GET_U16_MSBFIRST(uint8_t *p); 38 | uint32_t GET_U24_MSBFIRST(uint8_t *p); 39 | uint32_t GET_U32_MSBFIRST(uint8_t *p); 40 | uint64_t GET_U64_MSBFIRST(uint8_t *p); 41 | uint16_t GET_U16_LSBFIRST(uint8_t *p); 42 | uint32_t GET_U24_LSBFIRST(uint8_t *p); 43 | uint32_t GET_U32_LSBFIRST(uint8_t *p); 44 | uint64_t GET_U64_LSBFIRST(uint8_t *p); 45 | 46 | void SET_U16_MSBFIRST(uint8_t *p, uint16_t v16); 47 | void SET_U24_MSBFIRST(uint8_t *p, uint32_t v32); 48 | void SET_U32_MSBFIRST(uint8_t *p, uint32_t v32); 49 | void SET_U64_MSBFIRST(uint8_t *p, uint64_t v64); 50 | void SET_U16_LSBFIRST(uint8_t *p, uint16_t v16); 51 | void SET_U24_LSBFIRST(uint8_t *p, uint32_t v32); 52 | void SET_U32_LSBFIRST(uint8_t *p, uint32_t v32); 53 | void SET_U64_LSBFIRST(uint8_t *p, uint64_t v64); 54 | 55 | uint16_t SWAP_U16(uint16_t); 56 | uint32_t SWAP_U24(uint32_t); 57 | uint32_t SWAP_U32(uint32_t); 58 | uint64_t SWAP_U64(uint64_t); 59 | 60 | int msb(uint32_t); 61 | int ffz(uint32_t); 62 | 63 | // mask array 64 | void mskarr_set(uint32_t *arr, int bit); 65 | void mskarr_clr(uint32_t *arr, int bit); 66 | int mskarr_ffz(uint32_t *arr, int arrlen); 67 | 68 | #endif // __BITTOOL_H_INCLUDED__ 69 | -------------------------------------------------------------------------------- /fundation/buffer/buffer.c: -------------------------------------------------------------------------------- 1 | /**************************************************************************** 2 | * halo -- Open HAL for embedded systems * 3 | * * 4 | * MIT License: * 5 | * Copyright (c) 2017 SimonQian * 6 | * * 7 | * Permission is hereby granted, free of charge, to any person obtaining a * 8 | * copy of this software and associated documentation files (the * 9 | * "Software"), to deal in the Software without restriction, including * 10 | * without limitation the rights to use, copy, modify, merge, publish, * 11 | * distribute, distribute with modifications, sublicense, and/or sell * 12 | * copies of the Software, and to permit persons to whom the Software is * 13 | * furnished to do so, subject to the following conditions: * 14 | * * 15 | * The above copyright notice and this permission notice shall be included * 16 | * in all copies or substantial portions of the Software. * 17 | * * 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * 19 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * 20 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. * 21 | * IN NO EVENT SHALL THE ABOVE COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, * 22 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR * 23 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR * 24 | * THE USE OR OTHER DEALINGS IN THE SOFTWARE. * 25 | * * 26 | ****************************************************************************/ 27 | 28 | #include "halo.h" 29 | 30 | // queue 31 | void queue_init(struct queue_t *q) 32 | { 33 | q->head = q->tail = NULL; 34 | } 35 | 36 | void queue_append(struct queue_t *q, struct queue_node_t *n) 37 | { 38 | n->next = NULL; 39 | if (NULL == q->tail) 40 | { 41 | q->head = q->tail = n; 42 | } 43 | else 44 | { 45 | q->tail->next = n; 46 | q->tail = n; 47 | } 48 | } 49 | 50 | void queue_remove(struct queue_t *q, struct queue_node_t *n) 51 | { 52 | struct queue_node_t *head = q->head; 53 | 54 | if (head == n) 55 | { 56 | q->head = head->next; 57 | if (NULL == q->head) 58 | { 59 | q->tail = NULL; 60 | } 61 | } 62 | else if (head != NULL) 63 | { 64 | while (head->next != NULL) 65 | { 66 | if (head->next == n) 67 | { 68 | head->next = head->next->next; 69 | if (NULL == head->next) 70 | { 71 | q->tail = head; 72 | } 73 | break; 74 | } 75 | head = head->next; 76 | } 77 | } 78 | } 79 | 80 | void queue_enqueue(struct queue_t *q, struct queue_node_t *n) 81 | { 82 | struct queue_node_t *tmp = q->head; 83 | 84 | n->next = NULL; 85 | if (NULL == tmp) 86 | { 87 | q->head = q->tail = n; 88 | } 89 | else if (tmp->addr >= n->addr) 90 | { 91 | n->next = tmp; 92 | q->head = n; 93 | } 94 | else 95 | { 96 | while (tmp->next != NULL) 97 | { 98 | if (tmp->next->addr >= n->addr) 99 | { 100 | n->next = tmp->next; 101 | tmp->next = n; 102 | break; 103 | } 104 | tmp = tmp->next; 105 | } 106 | // insert last 107 | tmp->next = n; 108 | } 109 | } 110 | 111 | struct queue_node_t* queue_dequeue(struct queue_t *q) 112 | { 113 | struct queue_node_t *head = q->head; 114 | if (q->head != NULL) 115 | { 116 | q->head = q->head->next; 117 | if (NULL == q->head) 118 | { 119 | q->tail = NULL; 120 | } 121 | } 122 | return head; 123 | } 124 | 125 | //#define fifo_get_next_index(pos, size) (((pos) + 1) % (size)) 126 | static uint32_t fifo_get_next_index(uint32_t pos, uint32_t size) 127 | { 128 | if (++pos >= size) 129 | { 130 | pos = 0; 131 | } 132 | return pos; 133 | } 134 | 135 | halo_err_t fifo_init(struct fifo_t *fifo) 136 | { 137 | fifo->head = fifo->tail = 0; 138 | return HALOERR_NONE; 139 | } 140 | 141 | uint32_t fifo_get_data_length(struct fifo_t *fifo) 142 | { 143 | if (fifo->head >= fifo->tail) 144 | { 145 | return fifo->head - fifo->tail; 146 | } 147 | else 148 | { 149 | return fifo->buffer.size - (fifo->tail - fifo->head); 150 | } 151 | } 152 | 153 | uint32_t fifo_get_avail_length(struct fifo_t *fifo) 154 | { 155 | uint32_t len; 156 | 157 | len = fifo->buffer.size - fifo_get_data_length(fifo); 158 | if (len > 0) 159 | { 160 | len--; 161 | } 162 | return len; 163 | } 164 | 165 | uint32_t fifo_push8(struct fifo_t *fifo, uint8_t data) 166 | { 167 | if (fifo_get_avail_length(fifo) < 1) 168 | { 169 | return 0; 170 | } 171 | 172 | fifo->buffer.buffer[fifo->head] = data; 173 | fifo->head = fifo_get_next_index(fifo->head, fifo->buffer.size); 174 | return 1; 175 | } 176 | 177 | uint8_t fifo_pop8(struct fifo_t *fifo) 178 | { 179 | uint8_t data; 180 | 181 | if (fifo_get_data_length(fifo) <= 0) 182 | { 183 | return 0; 184 | } 185 | 186 | data = fifo->buffer.buffer[fifo->tail]; 187 | fifo->tail = fifo_get_next_index(fifo->tail, fifo->buffer.size); 188 | return data; 189 | } 190 | 191 | uint32_t fifo_push(struct fifo_t *fifo, uint32_t size, uint8_t *data) 192 | { 193 | uint32_t tmp32; 194 | 195 | if (size > fifo_get_avail_length(fifo)) 196 | { 197 | return 0; 198 | } 199 | 200 | tmp32 = fifo->buffer.size - fifo->head; 201 | if (size > tmp32) 202 | { 203 | if (data) 204 | { 205 | memcpy(&fifo->buffer.buffer[fifo->head], &data[0], tmp32); 206 | memcpy(&fifo->buffer.buffer[0], &data[tmp32], size - tmp32); 207 | } 208 | fifo->head = size - tmp32; 209 | } 210 | else 211 | { 212 | if (data) 213 | { 214 | memcpy(&fifo->buffer.buffer[fifo->head], data, size); 215 | } 216 | fifo->head += size; 217 | if (fifo->head == fifo->buffer.size) 218 | { 219 | fifo->head = 0; 220 | } 221 | } 222 | return size; 223 | } 224 | 225 | uint32_t fifo_get_rbuf(struct fifo_t *fifo, uint8_t **data) 226 | { 227 | uint32_t tmp32, avail_len = fifo_get_data_length(fifo); 228 | 229 | if (data) 230 | { 231 | *data = &fifo->buffer.buffer[fifo->tail]; 232 | } 233 | tmp32 = fifo->buffer.size - fifo->tail; 234 | return min(tmp32, avail_len); 235 | } 236 | 237 | uint32_t fifo_get_wbuf(struct fifo_t *fifo, uint8_t **data) 238 | { 239 | uint32_t tmp32, avail_len = fifo_get_avail_length(fifo); 240 | 241 | if (data) 242 | { 243 | *data = &fifo->buffer.buffer[fifo->head]; 244 | } 245 | tmp32 = fifo->buffer.size - fifo->head; 246 | return min(tmp32, avail_len); 247 | } 248 | 249 | uint32_t fifo_peek(struct fifo_t *fifo, uint32_t size, uint8_t *data) 250 | { 251 | uint32_t tmp32; 252 | uint32_t avail_len = fifo_get_data_length(fifo); 253 | 254 | if (size > avail_len) 255 | { 256 | size = avail_len; 257 | } 258 | 259 | tmp32 = fifo->buffer.size - fifo->tail; 260 | if (data) 261 | { 262 | if (size > tmp32) 263 | { 264 | memcpy(&data[0], &fifo->buffer.buffer[fifo->tail], tmp32); 265 | memcpy(&data[tmp32], &fifo->buffer.buffer[0], size - tmp32); 266 | } 267 | else 268 | { 269 | memcpy(data, &fifo->buffer.buffer[fifo->tail], size); 270 | } 271 | } 272 | return size; 273 | } 274 | 275 | uint32_t fifo_pop(struct fifo_t *fifo, uint32_t size, uint8_t *data) 276 | { 277 | uint32_t tmp32; 278 | uint32_t ret = fifo_peek(fifo, size, data); 279 | 280 | if (!ret) 281 | { 282 | return 0; 283 | } 284 | 285 | tmp32 = fifo->buffer.size - fifo->tail; 286 | if (ret > tmp32) 287 | { 288 | fifo->tail = ret - tmp32; 289 | } 290 | else 291 | { 292 | fifo->tail += ret; 293 | if (fifo->tail == fifo->buffer.size) 294 | { 295 | fifo->tail = 0; 296 | } 297 | } 298 | return ret; 299 | } 300 | 301 | // multibuf 302 | halo_err_t multibuf_init(struct multibuf_t *mbuffer) 303 | { 304 | mbuffer->tail = mbuffer->head = mbuffer->length = 0; 305 | return HALOERR_NONE; 306 | } 307 | 308 | uint8_t* multibuf_get_empty(struct multibuf_t *mbuffer) 309 | { 310 | if (mbuffer->count <= mbuffer->length) 311 | { 312 | return NULL; 313 | } 314 | 315 | return mbuffer->buffer_list[mbuffer->head]; 316 | } 317 | 318 | halo_err_t multibuf_push(struct multibuf_t *mbuffer) 319 | { 320 | if (mbuffer->count <= mbuffer->length) 321 | { 322 | return HALOERR_FAIL; 323 | } 324 | 325 | mbuffer->head = (uint16_t)fifo_get_next_index(mbuffer->head, mbuffer->count); 326 | mbuffer->length++; 327 | return HALOERR_NONE; 328 | } 329 | 330 | uint8_t* multibuf_get_payload(struct multibuf_t *mbuffer) 331 | { 332 | if (!mbuffer->length) 333 | { 334 | return NULL; 335 | } 336 | 337 | return mbuffer->buffer_list[mbuffer->tail]; 338 | } 339 | 340 | halo_err_t multibuf_pop(struct multibuf_t *mbuffer) 341 | { 342 | if (!mbuffer->length) 343 | { 344 | return HALOERR_FAIL; 345 | } 346 | 347 | mbuffer->tail = (uint16_t)fifo_get_next_index(mbuffer->tail, mbuffer->count); 348 | mbuffer->length--; 349 | return HALOERR_NONE; 350 | } 351 | 352 | // bufmgr 353 | #define BUFMGR_DEFAULT_ALIGN 4 354 | #define BUFMGR_BUF_CHECK_EN 0 355 | #define BUFMGR_POINT_CHECK_EN 0 356 | 357 | #if BUFMGR_BUF_CHECK_EN 358 | #define BUFMGR_MAX_SIZE (64 * 1024) 359 | #define BUFMGR_CHECK0 0x78563412 360 | #define BUFMGR_CHECK1 0xf1debc9a 361 | #define BUFMGR_INIT_BUF(a) \ 362 | do{\ 363 | (a)->temp[0] = BUFMGR_CHECK0, (a)->temp[1] = BUFMGR_CHECK1;\ 364 | }while(0) 365 | #define BUFMGR_CHECK_BUF(a) \ 366 | (((a)->temp[0] == BUFMGR_CHECK0) && ((a)->temp[1] == BUFMGR_CHECK1)) 367 | #endif // BUFMGR_BUF_CHECK_EN 368 | 369 | struct bufmgr_mcb_t 370 | { 371 | struct buffer_t buffer; 372 | struct sllist list; 373 | #if BUFMGR_POINT_CHECK_EN 374 | void *p; 375 | #endif 376 | #if BUFMGR_BUF_CHECK_EN 377 | uint32_t temp[2]; 378 | #endif 379 | }; 380 | struct bufmgr_t 381 | { 382 | // private 383 | struct bufmgr_mcb_t freed_list; 384 | struct bufmgr_mcb_t allocated_list; 385 | 386 | #if BUFMGR_BUF_CHECK_EN 387 | uint32_t err_conut; 388 | #endif 389 | }; 390 | #define MCB_SIZE sizeof(struct bufmgr_mcb_t) 391 | static struct bufmgr_t bufmgr; 392 | 393 | #if BUFMGR_BUF_CHECK_EN 394 | static void bufmgr_error(void) 395 | { 396 | if (bufmgr.err_conut < 0xffffffff) 397 | { 398 | bufmgr.err_conut++; 399 | } 400 | } 401 | 402 | static void bufmgr_check(struct bufmgr_mcb_t *mcb) 403 | { 404 | if (!BUFMGR_CHECK_BUF(mcb)) 405 | { 406 | bufmgr_error(); 407 | BUFMGR_INIT_BUF(mcb); 408 | } 409 | } 410 | #endif 411 | 412 | static void bufmgr_remove_mcb(struct bufmgr_mcb_t *list, struct bufmgr_mcb_t *mcb) 413 | { 414 | struct bufmgr_mcb_t *active_mcb, *next_mcb, *prev_mcb; 415 | 416 | active_mcb = sllist_get_container(list->list.next, struct bufmgr_mcb_t, list); 417 | prev_mcb = list; 418 | while(active_mcb != NULL) 419 | { 420 | if(active_mcb == mcb) 421 | { 422 | next_mcb = sllist_get_container(active_mcb->list.next, struct bufmgr_mcb_t, list); 423 | if(next_mcb != NULL) 424 | { 425 | sllist_insert(prev_mcb->list, next_mcb->list); 426 | } 427 | else 428 | { 429 | sllist_init_node(prev_mcb->list); 430 | } 431 | sllist_init_node(active_mcb->list); 432 | return; 433 | } 434 | prev_mcb = active_mcb; 435 | active_mcb = sllist_get_container(active_mcb->list.next, struct bufmgr_mcb_t, list); 436 | } 437 | } 438 | 439 | static void bufmgr_insert_mcb(struct bufmgr_mcb_t *list, struct bufmgr_mcb_t *mcb) 440 | { 441 | struct bufmgr_mcb_t *active_mcb, *prev_mcb; 442 | 443 | #if BUFMGR_BUF_CHECK_EN 444 | BUFMGR_INIT_BUF(mcb); 445 | #endif 446 | 447 | active_mcb = sllist_get_container(list->list.next, struct bufmgr_mcb_t, list); 448 | prev_mcb = list; 449 | 450 | while (active_mcb != NULL) 451 | { 452 | if(active_mcb->buffer.size >= mcb->buffer.size) 453 | { 454 | sllist_insert(prev_mcb->list, mcb->list); 455 | sllist_insert(mcb->list, active_mcb->list); 456 | return; 457 | } 458 | prev_mcb = active_mcb; 459 | active_mcb = sllist_get_container(active_mcb->list.next, struct bufmgr_mcb_t, list); 460 | } 461 | if(active_mcb == NULL) 462 | { 463 | sllist_insert(prev_mcb->list, mcb->list); 464 | sllist_init_node(mcb->list); 465 | } 466 | } 467 | 468 | static void bufmgr_merge_mcb(struct bufmgr_mcb_t *list, struct bufmgr_mcb_t *mcb) 469 | { 470 | struct bufmgr_mcb_t *active_mcb, *prev_mcb = NULL, *next_mcb = NULL; 471 | 472 | active_mcb = sllist_get_container(list->list.next, struct bufmgr_mcb_t, list); 473 | 474 | while (active_mcb != NULL) 475 | { 476 | if(((uint32_t)mcb->buffer.buffer + mcb->buffer.size) == (uint32_t)active_mcb) 477 | { 478 | next_mcb = active_mcb; 479 | } 480 | if(((uint32_t)active_mcb->buffer.buffer + active_mcb->buffer.size) == (uint32_t)mcb) 481 | { 482 | prev_mcb = active_mcb; 483 | } 484 | active_mcb = sllist_get_container(active_mcb->list.next, struct bufmgr_mcb_t, list); 485 | } 486 | if((next_mcb == NULL) && (prev_mcb == NULL)) 487 | { 488 | bufmgr_insert_mcb(list, mcb); 489 | } 490 | else if((next_mcb != NULL) && (prev_mcb == NULL)) 491 | { 492 | bufmgr_remove_mcb(list, next_mcb); 493 | mcb->buffer.size += MCB_SIZE + next_mcb->buffer.size; 494 | #if BUFMGR_BUF_CHECK_EN 495 | if (mcb->buffer.size > BUFMGR_MAX_SIZE) 496 | { 497 | bufmgr_error(); 498 | } 499 | #endif 500 | bufmgr_insert_mcb(list, mcb); 501 | } 502 | else if((next_mcb == NULL) && (prev_mcb != NULL)) 503 | { 504 | bufmgr_remove_mcb(list, prev_mcb); 505 | prev_mcb->buffer.size += MCB_SIZE + mcb->buffer.size; 506 | bufmgr_insert_mcb(list, prev_mcb); 507 | } 508 | else if((next_mcb != NULL) && (prev_mcb != NULL)) 509 | { 510 | bufmgr_remove_mcb(list, prev_mcb); 511 | bufmgr_remove_mcb(list, next_mcb); 512 | prev_mcb->buffer.size += MCB_SIZE * 2 + mcb->buffer.size + next_mcb->buffer.size; 513 | bufmgr_insert_mcb(list, prev_mcb); 514 | } 515 | } 516 | 517 | void bufmgr_init(uint8_t *buf, uint32_t size) 518 | { 519 | struct bufmgr_mcb_t *mcb = (struct bufmgr_mcb_t *)buf; 520 | 521 | bufmgr.freed_list.buffer.buffer = NULL; 522 | bufmgr.freed_list.buffer.size = 0; 523 | sllist_init_node(bufmgr.freed_list.list); 524 | 525 | bufmgr.allocated_list.buffer.buffer = NULL; 526 | bufmgr.allocated_list.buffer.size = 0; 527 | sllist_init_node(bufmgr.allocated_list.list); 528 | 529 | mcb->buffer.buffer = (void *)(((uint32_t)buf + MCB_SIZE + 3) & 0xfffffffc); 530 | mcb->buffer.size = (uint32_t)buf + size - (uint32_t)mcb->buffer.buffer; 531 | sllist_init_node(mcb->list); 532 | sllist_insert(bufmgr.freed_list.list, mcb->list); 533 | 534 | #if BUFMGR_BUF_CHECK_EN 535 | bufmgr.err_conut = 0; 536 | #endif 537 | } 538 | 539 | #ifdef VSFCFG_BUFMGR_LOG 540 | void* bufmgr_malloc_aligned_do(uint32_t size, uint32_t align, 541 | const char *format, ...) 542 | #else 543 | void* bufmgr_malloc_aligned(uint32_t size, uint32_t align) 544 | #endif 545 | { 546 | struct bufmgr_mcb_t *mcb= sllist_get_container( 547 | bufmgr.freed_list.list.next, struct bufmgr_mcb_t, list); 548 | #ifdef VSFCFG_BUFMGR_LOG 549 | va_list ap; 550 | uint32_t size_out; 551 | va_start(ap, format); 552 | size_out = vsnprintf((char *)bufmgr_log_buf, BUFMGR_LOG_BUF_LENGTH, format, ap); 553 | va_end(ap); 554 | #endif 555 | 556 | if (size == 0) 557 | { 558 | return NULL; 559 | } 560 | if (size & 0x3) 561 | { 562 | size &= 0xfffffffc; 563 | size += 4; 564 | } 565 | if (align < BUFMGR_DEFAULT_ALIGN) 566 | { 567 | align = BUFMGR_DEFAULT_ALIGN; 568 | } 569 | while (mcb != NULL) 570 | { 571 | uint32_t offset = (uint32_t)mcb->buffer.buffer % align; 572 | offset = offset ? (align - offset) : 0; 573 | 574 | if (mcb->buffer.size >= size + offset) 575 | { 576 | struct bufmgr_mcb_t *mcb_align; 577 | if (offset >= MCB_SIZE + BUFMGR_DEFAULT_ALIGN) 578 | { 579 | mcb_align = (struct bufmgr_mcb_t *)\ 580 | (mcb->buffer.buffer + offset - MCB_SIZE); 581 | mcb_align->buffer.buffer = (uint8_t *)mcb_align + MCB_SIZE; 582 | mcb_align->buffer.size = mcb->buffer.size - offset; 583 | 584 | bufmgr_remove_mcb(&bufmgr.freed_list, mcb); 585 | mcb->buffer.size = offset - MCB_SIZE; 586 | bufmgr_insert_mcb(&bufmgr.freed_list, mcb); 587 | 588 | offset = 0; // as return ptr offset 589 | } 590 | else 591 | { 592 | mcb_align = mcb; 593 | bufmgr_remove_mcb(&bufmgr.freed_list, mcb_align); 594 | } 595 | 596 | if (mcb_align->buffer.size > (size + offset + MCB_SIZE)) 597 | { 598 | struct bufmgr_mcb_t *mcb_tail = (struct bufmgr_mcb_t *)\ 599 | (mcb_align->buffer.buffer + offset + size); 600 | mcb_tail->buffer.buffer = (uint8_t *)mcb_tail + MCB_SIZE; 601 | mcb_tail->buffer.size = mcb_align->buffer.size - offset - size - 602 | MCB_SIZE; 603 | bufmgr_insert_mcb(&bufmgr.freed_list, mcb_tail); 604 | 605 | mcb_align->buffer.size = offset + size; 606 | } 607 | 608 | bufmgr_insert_mcb(&bufmgr.allocated_list, mcb_align); 609 | 610 | #ifdef VSFCFG_BUFMGR_LOG 611 | if (size_out > 1) 612 | { 613 | bufmgr_log_buf[size_out] = '\0'; 614 | debug("MalcOK 0x%x:%d %s", (uint32_t)(mcb_align->buffer.buffer + offset), mcb_align->buffer.size, bufmgr_log_buf); 615 | } 616 | else 617 | { 618 | debug("MalcOK 0x%x:%d", (uint32_t)(mcb_align->buffer.buffer + offset), mcb_align->buffer.size); 619 | } 620 | #endif 621 | 622 | #if BUFMGR_POINT_CHECK_EN 623 | mcb_align->p = mcb_align->buffer.buffer + offset; 624 | return mcb_align->p; 625 | #else 626 | return mcb_align->buffer.buffer + offset; 627 | #endif 628 | 629 | } 630 | mcb = sllist_get_container(mcb->list.next, struct bufmgr_mcb_t, 631 | list); 632 | } 633 | 634 | #ifdef VSFCFG_BUFMGR_LOG 635 | if (size_out > 1) 636 | { 637 | bufmgr_log_buf[size_out] = '\0'; 638 | debug("MalcFL %s", bufmgr_log_buf); 639 | } 640 | else 641 | { 642 | debug("MalcFL UNKNOWN"); 643 | } 644 | #endif 645 | 646 | #if BUFMGR_BUF_CHECK_EN 647 | bufmgr_error(); 648 | #endif 649 | return NULL; 650 | } 651 | 652 | #ifdef VSFCFG_BUFMGR_LOG 653 | void bufmgr_free_do(void *ptr, const char *format, ...) 654 | #else 655 | void bufmgr_free(void *ptr) 656 | #endif 657 | { 658 | struct bufmgr_mcb_t *mcb = sllist_get_container( 659 | bufmgr.allocated_list.list.next,struct bufmgr_mcb_t, list); 660 | #ifdef VSFCFG_BUFMGR_LOG 661 | va_list ap; 662 | uint32_t size_out; 663 | va_start(ap, format); 664 | size_out = vsnprintf((char *)bufmgr_log_buf, BUFMGR_LOG_BUF_LENGTH, format, ap); 665 | va_end(ap); 666 | #endif 667 | 668 | 669 | while (mcb != NULL) 670 | { 671 | if (((uint32_t)mcb->buffer.buffer <= (uint32_t)ptr) && 672 | ((uint32_t)mcb->buffer.buffer + mcb->buffer.size > (uint32_t)ptr)) 673 | { 674 | #if BUFMGR_BUF_CHECK_EN 675 | bufmgr_check(mcb); 676 | #endif 677 | #if BUFMGR_POINT_CHECK_EN 678 | if (mcb->p != ptr) 679 | { 680 | bufmgr_error(); 681 | } 682 | #endif 683 | bufmgr_remove_mcb(&bufmgr.allocated_list, mcb); 684 | bufmgr_merge_mcb(&bufmgr.freed_list, mcb); 685 | 686 | #ifdef VSFCFG_BUFMGR_LOG 687 | if (size_out > 1) 688 | { 689 | bufmgr_log_buf[size_out] = '\0'; 690 | debug("FreeOK 0x%x %s", (uint32_t)ptr, bufmgr_log_buf); 691 | } 692 | else 693 | { 694 | debug("FreeOK 0x%x", (uint32_t)ptr); 695 | } 696 | #endif 697 | 698 | return; 699 | } 700 | mcb = sllist_get_container(mcb->list.next, struct bufmgr_mcb_t, 701 | list); 702 | } 703 | 704 | #ifdef VSFCFG_BUFMGR_LOG 705 | if (size_out > 1) 706 | { 707 | bufmgr_log_buf[size_out] = '\0'; 708 | debug("FreeFL 0x%x %s", (uint32_t)ptr, bufmgr_log_buf); 709 | } 710 | else 711 | { 712 | debug("FreeFL 0x%x ", (uint32_t)ptr); 713 | } 714 | #endif 715 | 716 | #if BUFMGR_BUF_CHECK_EN 717 | bufmgr_error(); 718 | #endif 719 | } 720 | 721 | // pool 722 | void pool_init(struct pool_t *pool) 723 | { 724 | memset(pool->flags, 0, (pool->num + 31) >> 3); 725 | } 726 | 727 | void* pool_alloc(struct pool_t *pool) 728 | { 729 | uint32_t index = mskarr_ffz(pool->flags, (pool->num + 31) >> 5); 730 | 731 | if (index >= pool->num) 732 | { 733 | return NULL; 734 | } 735 | mskarr_set(pool->flags, index); 736 | return (uint8_t *)pool->buffer + index * pool->size; 737 | } 738 | 739 | void pool_free(struct pool_t *pool, void *buffer) 740 | { 741 | uint32_t index = ((uint8_t *)buffer - (uint8_t *)pool->buffer) / pool->size; 742 | 743 | if (index < pool->num) 744 | { 745 | mskarr_clr(pool->flags, index); 746 | } 747 | } 748 | -------------------------------------------------------------------------------- /fundation/buffer/buffer.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************** 2 | * halo -- Open HAL for embedded systems * 3 | * * 4 | * MIT License: * 5 | * Copyright (c) 2017 SimonQian * 6 | * * 7 | * Permission is hereby granted, free of charge, to any person obtaining a * 8 | * copy of this software and associated documentation files (the * 9 | * "Software"), to deal in the Software without restriction, including * 10 | * without limitation the rights to use, copy, modify, merge, publish, * 11 | * distribute, distribute with modifications, sublicense, and/or sell * 12 | * copies of the Software, and to permit persons to whom the Software is * 13 | * furnished to do so, subject to the following conditions: * 14 | * * 15 | * The above copyright notice and this permission notice shall be included * 16 | * in all copies or substantial portions of the Software. * 17 | * * 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * 19 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * 20 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. * 21 | * IN NO EVENT SHALL THE ABOVE COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, * 22 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR * 23 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR * 24 | * THE USE OR OTHER DEALINGS IN THE SOFTWARE. * 25 | * * 26 | ****************************************************************************/ 27 | 28 | #ifndef __BUFFER_H_INCLUDED__ 29 | #define __BUFFER_H_INCLUDED__ 30 | 31 | // queue 32 | struct queue_node_t 33 | { 34 | uint32_t addr; 35 | struct queue_node_t *next; 36 | }; 37 | struct queue_t 38 | { 39 | struct queue_node_t *head; 40 | struct queue_node_t *tail; 41 | }; 42 | 43 | void queue_init(struct queue_t *q); 44 | void queue_append(struct queue_t *q, struct queue_node_t *n); 45 | void queue_remove(struct queue_t *q, struct queue_node_t *n); 46 | void queue_enqueue(struct queue_t *q, struct queue_node_t *n); 47 | struct queue_node_t* queue_dequeue(struct queue_t *q); 48 | 49 | struct buffer_t 50 | { 51 | uint8_t *buffer; 52 | uint32_t size; 53 | }; 54 | 55 | struct transaction_buffer_t 56 | { 57 | struct buffer_t buffer; 58 | uint32_t position; 59 | }; 60 | 61 | // fifo 62 | struct fifo_t 63 | { 64 | struct buffer_t buffer; 65 | uint32_t head; 66 | uint32_t tail; 67 | }; 68 | halo_err_t fifo_init(struct fifo_t *fifo); 69 | uint32_t fifo_push8(struct fifo_t *fifo, uint8_t data); 70 | uint8_t fifo_pop8(struct fifo_t *fifo); 71 | uint32_t fifo_push(struct fifo_t *fifo, uint32_t size, uint8_t *data); 72 | uint32_t fifo_pop(struct fifo_t *fifo, uint32_t size, uint8_t *data); 73 | uint32_t fifo_peek(struct fifo_t *fifo, uint32_t size, uint8_t *data); 74 | uint32_t fifo_get_wbuf(struct fifo_t *fifo, uint8_t **data); 75 | uint32_t fifo_get_rbuf(struct fifo_t *fifo, uint8_t **data); 76 | uint32_t fifo_get_data_length(struct fifo_t *fifo); 77 | uint32_t fifo_get_avail_length(struct fifo_t *fifo); 78 | 79 | // multi_buffer 80 | struct multibuf_t 81 | { 82 | uint32_t size; 83 | uint8_t **buffer_list; 84 | uint16_t count; 85 | 86 | uint16_t head; 87 | uint16_t tail; 88 | uint16_t length; 89 | }; 90 | 91 | halo_err_t multibuf_init(struct multibuf_t *mbuffer); 92 | uint8_t* multibuf_get_empty(struct multibuf_t *mbuffer); 93 | halo_err_t multibuf_push(struct multibuf_t *mbuffer); 94 | uint8_t* multibuf_get_payload(struct multibuf_t *mbuffer); 95 | halo_err_t multibuf_pop(struct multibuf_t *mbuffer); 96 | 97 | // buffer_manager 98 | void bufmgr_init(uint8_t *buf, uint32_t size); 99 | 100 | void* bufmgr_malloc_aligned_do(uint32_t size, uint32_t align); 101 | void bufmgr_free_do(void *ptr); 102 | #define bufmgr_malloc(s) bufmgr_malloc_aligned(s, 4) 103 | #define bufmgr_malloc_aligned(s, a) bufmgr_malloc_aligned_do(s, a) 104 | #define bufmgr_free(p) bufmgr_free_do(p) 105 | 106 | // pool 107 | struct pool_t 108 | { 109 | uint32_t *flags; 110 | void *buffer; 111 | uint32_t size; 112 | uint32_t num; 113 | }; 114 | 115 | #define POOL_DEFINE(name, type, num) \ 116 | struct pool_##name##_t\ 117 | {\ 118 | struct pool_t pool;\ 119 | uint32_t mskarr[((num) + 31) >> 5];\ 120 | type buffer[(num)];\ 121 | } name 122 | 123 | #define POOL_INIT(p, type, n) \ 124 | do {\ 125 | (p)->pool.flags = (p)->mskarr;\ 126 | (p)->pool.buffer = (p)->buffer;\ 127 | (p)->pool.size = sizeof(type);\ 128 | (p)->pool.num = (n);\ 129 | pool_init((struct pool_t *)(p));\ 130 | } while (0) 131 | 132 | #define POOL_ALLOC(p, type) \ 133 | (type *)pool_alloc((struct pool_t *)(p)) 134 | 135 | #define POOL_FREE(p, buf) \ 136 | pool_free((struct pool_t *)(p), (buf)) 137 | 138 | void pool_init(struct pool_t *pool); 139 | void* pool_alloc(struct pool_t *pool); 140 | void pool_free(struct pool_t *pool, void *buffer); 141 | 142 | #endif // __BUFFER_H_INCLUDED__ 143 | -------------------------------------------------------------------------------- /fundation/list/list.c: -------------------------------------------------------------------------------- 1 | /**************************************************************************** 2 | * halo -- Open HAL for embedded systems * 3 | * * 4 | * MIT License: * 5 | * Copyright (c) 2017 SimonQian * 6 | * * 7 | * Permission is hereby granted, free of charge, to any person obtaining a * 8 | * copy of this software and associated documentation files (the * 9 | * "Software"), to deal in the Software without restriction, including * 10 | * without limitation the rights to use, copy, modify, merge, publish, * 11 | * distribute, distribute with modifications, sublicense, and/or sell * 12 | * copies of the Software, and to permit persons to whom the Software is * 13 | * furnished to do so, subject to the following conditions: * 14 | * * 15 | * The above copyright notice and this permission notice shall be included * 16 | * in all copies or substantial portions of the Software. * 17 | * * 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * 19 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * 20 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. * 21 | * IN NO EVENT SHALL THE ABOVE COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, * 22 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR * 23 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR * 24 | * THE USE OR OTHER DEALINGS IN THE SOFTWARE. * 25 | * * 26 | ****************************************************************************/ 27 | 28 | #include "halo.h" 29 | 30 | int list_is_in(struct list_t *head, struct list_t *node) 31 | { 32 | while (head != (struct list_t *)0) 33 | { 34 | if (head == node) 35 | { 36 | return 1; 37 | } 38 | head = head->next; 39 | } 40 | return 0; 41 | } 42 | 43 | int list_remove(struct list_t **head, struct list_t *node) 44 | { 45 | if (!list_is_in(*head, node)) 46 | { 47 | return -1; 48 | } 49 | 50 | if (*head == node) 51 | { 52 | *head = node->next; 53 | return 0; 54 | } 55 | while (*head != (struct list_t *)0) 56 | { 57 | if ((*head)->next == node) 58 | { 59 | (*head)->next = node->next; 60 | break; 61 | } 62 | *head = (*head)->next; 63 | } 64 | return 0; 65 | } 66 | 67 | void list_append(struct list_t *head, struct list_t *new_node) 68 | { 69 | struct list_t *next; 70 | 71 | next = head; 72 | while (next->next != NULL) 73 | next = next->next; 74 | 75 | next->next = new_node; 76 | new_node->next = NULL; 77 | } 78 | 79 | void list_delete_next(struct list_t *head) 80 | { 81 | struct list_t *next; 82 | 83 | next = head->next; 84 | if (next->next) 85 | head->next = next->next; 86 | else 87 | head->next = NULL; 88 | } 89 | -------------------------------------------------------------------------------- /fundation/list/list.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************** 2 | * halo -- Open HAL for embedded systems * 3 | * * 4 | * MIT License: * 5 | * Copyright (c) 2017 SimonQian * 6 | * * 7 | * Permission is hereby granted, free of charge, to any person obtaining a * 8 | * copy of this software and associated documentation files (the * 9 | * "Software"), to deal in the Software without restriction, including * 10 | * without limitation the rights to use, copy, modify, merge, publish, * 11 | * distribute, distribute with modifications, sublicense, and/or sell * 12 | * copies of the Software, and to permit persons to whom the Software is * 13 | * furnished to do so, subject to the following conditions: * 14 | * * 15 | * The above copyright notice and this permission notice shall be included * 16 | * in all copies or substantial portions of the Software. * 17 | * * 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * 19 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * 20 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. * 21 | * IN NO EVENT SHALL THE ABOVE COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, * 22 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR * 23 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR * 24 | * THE USE OR OTHER DEALINGS IN THE SOFTWARE. * 25 | * * 26 | ****************************************************************************/ 27 | 28 | #ifndef __LIST_H_INCLUDED__ 29 | #define __LIST_H_INCLUDED__ 30 | 31 | struct list_t 32 | { 33 | struct list_t *next; 34 | }; 35 | 36 | #define list_init_node(node) ((node).next = NULL) 37 | #define list_insert(node, new) ((node).next = &(new)) 38 | #define list_get_container(p, t, m) container_of(p, t, m) 39 | 40 | int list_is_in(struct list_t *head, struct list_t *node); 41 | int list_remove(struct list_t **head, struct list_t *node); 42 | void list_append(struct list_t *head, struct list_t *new_node); 43 | void list_delete_next(struct list_t *head); 44 | 45 | #endif // __LIST_H_INCLUDED__ 46 | -------------------------------------------------------------------------------- /fundation/stream/stream.c: -------------------------------------------------------------------------------- 1 | /**************************************************************************** 2 | * halo -- Open HAL for embedded systems * 3 | * * 4 | * MIT License: * 5 | * Copyright (c) 2017 SimonQian * 6 | * * 7 | * Permission is hereby granted, free of charge, to any person obtaining a * 8 | * copy of this software and associated documentation files (the * 9 | * "Software"), to deal in the Software without restriction, including * 10 | * without limitation the rights to use, copy, modify, merge, publish, * 11 | * distribute, distribute with modifications, sublicense, and/or sell * 12 | * copies of the Software, and to permit persons to whom the Software is * 13 | * furnished to do so, subject to the following conditions: * 14 | * * 15 | * The above copyright notice and this permission notice shall be included * 16 | * in all copies or substantial portions of the Software. * 17 | * * 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * 19 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * 20 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. * 21 | * IN NO EVENT SHALL THE ABOVE COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, * 22 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR * 23 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR * 24 | * THE USE OR OTHER DEALINGS IN THE SOFTWARE. * 25 | * * 26 | ****************************************************************************/ 27 | 28 | #include "halo.h" 29 | 30 | uint32_t stream_read(struct stream_t *stream, struct buffer_t *buffer) 31 | { 32 | uint32_t count = stream->op->read(stream, buffer); 33 | 34 | if (stream->tx_ready && (stream->callback_tx.on_inout != NULL) && count) 35 | { 36 | stream->callback_tx.on_inout(stream->callback_tx.param); 37 | } 38 | return count; 39 | } 40 | 41 | uint32_t stream_write(struct stream_t *stream, struct buffer_t *buffer) 42 | { 43 | uint32_t count = stream->op->write(stream, buffer); 44 | 45 | if (count < buffer->size) 46 | { 47 | stream->overflow = true; 48 | } 49 | if (stream->rx_ready && (stream->callback_rx.on_inout != NULL) && count) 50 | { 51 | stream->callback_rx.on_inout(stream->callback_rx.param); 52 | } 53 | return count; 54 | } 55 | 56 | uint32_t stream_get_data_size(struct stream_t *stream) 57 | { 58 | return stream->op->get_data_length(stream); 59 | } 60 | 61 | uint32_t stream_get_free_size(struct stream_t *stream) 62 | { 63 | return stream->op->get_avail_length(stream); 64 | } 65 | 66 | uint32_t stream_get_wbuf(struct stream_t *stream, uint8_t **ptr) 67 | { 68 | return stream->op->get_wbuf(stream, ptr); 69 | } 70 | 71 | uint32_t stream_get_rbuf(struct stream_t *stream, uint8_t **ptr) 72 | { 73 | return stream->op->get_rbuf(stream, ptr); 74 | } 75 | 76 | void stream_connect_rx(struct stream_t *stream) 77 | { 78 | if (!stream->rx_ready) 79 | { 80 | if (stream->callback_tx.on_connect != NULL) 81 | { 82 | stream->callback_tx.on_connect(stream->callback_tx.param); 83 | } 84 | if ((stream->tx_ready) && (stream->callback_rx.on_connect != NULL)) 85 | { 86 | stream->callback_rx.on_connect(stream->callback_rx.param); 87 | } 88 | stream->rx_ready = true; 89 | } 90 | } 91 | 92 | void stream_connect_tx(struct stream_t *stream) 93 | { 94 | if (!stream->tx_ready) 95 | { 96 | if (stream->callback_rx.on_connect != NULL) 97 | { 98 | stream->callback_rx.on_connect(stream->callback_rx.param); 99 | } 100 | if ((stream->rx_ready) && (stream->callback_tx.on_connect != NULL)) 101 | { 102 | stream->callback_tx.on_connect(stream->callback_tx.param); 103 | } 104 | stream->tx_ready = true; 105 | } 106 | } 107 | 108 | void stream_disconnect_rx(struct stream_t *stream) 109 | { 110 | if (stream->rx_ready && (stream->callback_tx.on_disconnect != NULL)) 111 | { 112 | stream->callback_tx.on_disconnect(stream->callback_tx.param); 113 | } 114 | stream->rx_ready = false; 115 | } 116 | 117 | void stream_disconnect_tx(struct stream_t *stream) 118 | { 119 | if (stream->tx_ready && (stream->callback_rx.on_disconnect != NULL)) 120 | { 121 | stream->callback_rx.on_disconnect(stream->callback_rx.param); 122 | } 123 | stream->tx_ready = false; 124 | } 125 | 126 | halo_err_t stream_init(struct stream_t *stream) 127 | { 128 | stream->overflow = false; 129 | stream->tx_ready = false; 130 | stream->rx_ready = false; 131 | if (stream->op->init != NULL) 132 | { 133 | stream->op->init(stream); 134 | } 135 | return HALOERR_NONE; 136 | } 137 | 138 | halo_err_t stream_fini(struct stream_t *stream) 139 | { 140 | if (stream->tx_ready) 141 | { 142 | stream_disconnect_tx(stream); 143 | } 144 | if (stream->rx_ready) 145 | { 146 | stream_disconnect_rx(stream); 147 | } 148 | if (stream->op->fini != NULL) 149 | { 150 | stream->op->fini(stream); 151 | } 152 | return HALOERR_NONE; 153 | } 154 | 155 | // fifo stream 156 | static void fifo_stream_init(struct stream_t *stream) 157 | { 158 | struct fifostream_t *fifostream = (struct fifostream_t *)stream; 159 | fifo_init(&fifostream->mem); 160 | } 161 | 162 | static uint32_t fifo_stream_get_data_length(struct stream_t *stream) 163 | { 164 | struct fifostream_t *fifostream = (struct fifostream_t *)stream; 165 | return fifo_get_data_length(&fifostream->mem); 166 | } 167 | 168 | static uint32_t fifo_stream_get_avail_length(struct stream_t *stream) 169 | { 170 | struct fifostream_t *fifostream = (struct fifostream_t *)stream; 171 | return fifo_get_avail_length(&fifostream->mem); 172 | } 173 | 174 | static uint32_t fifo_stream_get_wbuf(struct stream_t *stream, uint8_t **ptr) 175 | { 176 | struct fifostream_t *fifostream = (struct fifostream_t *)stream; 177 | return fifo_get_wbuf(&fifostream->mem, ptr); 178 | } 179 | 180 | static uint32_t fifo_stream_get_rbuf(struct stream_t *stream, uint8_t **ptr) 181 | { 182 | struct fifostream_t *fifostream = (struct fifostream_t *)stream; 183 | return fifo_get_rbuf(&fifostream->mem, ptr); 184 | } 185 | 186 | static uint32_t 187 | fifo_stream_write(struct stream_t *stream, struct buffer_t *buffer) 188 | { 189 | struct fifostream_t *fifostream = (struct fifostream_t *)stream; 190 | return fifo_push(&fifostream->mem, buffer->size, buffer->buffer); 191 | } 192 | 193 | static uint32_t 194 | fifo_stream_read(struct stream_t *stream, struct buffer_t *buffer) 195 | { 196 | struct fifostream_t *fifostream = (struct fifostream_t *)stream; 197 | return fifo_pop(&fifostream->mem, buffer->size, buffer->buffer); 198 | } 199 | 200 | // multibuf stream 201 | static void multibuf_stream_init(struct stream_t *stream) 202 | { 203 | struct mbufstream_t *mbufstream = (struct mbufstream_t *)stream; 204 | 205 | mbufstream->mem.rpos = mbufstream->mem.wpos = 0; 206 | multibuf_init(&mbufstream->mem.multibuf); 207 | } 208 | 209 | static uint32_t multibuf_stream_get_data_length(struct stream_t *stream) 210 | { 211 | struct mbufstream_t *mbufstream = (struct mbufstream_t *)stream; 212 | 213 | return (mbufstream->mem.multibuf.length * mbufstream->mem.multibuf.size) 214 | + mbufstream->mem.wpos - mbufstream->mem.rpos; 215 | } 216 | 217 | static uint32_t multibuf_stream_get_avail_length(struct stream_t *stream) 218 | { 219 | struct mbufstream_t *mbufstream = (struct mbufstream_t *)stream; 220 | 221 | return (mbufstream->mem.multibuf.count * mbufstream->mem.multibuf.size) - 222 | multibuf_stream_get_data_length(stream); 223 | } 224 | 225 | static uint32_t 226 | multibuf_stream_get_wbuf(struct stream_t *stream, uint8_t **ptr) 227 | { 228 | struct mbufstream_t *mbufstream = (struct mbufstream_t *)stream; 229 | uint8_t *buf = multibuf_get_empty(&mbufstream->mem.multibuf); 230 | uint32_t avail_len = STREAM_GET_FREE_SIZE(&mbufstream->mem.multibuf); 231 | uint32_t avail_buf = mbufstream->mem.multibuf.size - mbufstream->mem.wpos; 232 | 233 | if (ptr) 234 | *ptr = &buf[mbufstream->mem.wpos]; 235 | return min(avail_len, avail_buf); 236 | } 237 | 238 | static uint32_t 239 | multibuf_stream_get_rbuf(struct stream_t *stream, uint8_t **ptr) 240 | { 241 | struct mbufstream_t *mbufstream = (struct mbufstream_t *)stream; 242 | uint8_t *buf = multibuf_get_payload(&mbufstream->mem.multibuf); 243 | uint32_t avail_len = STREAM_GET_DATA_SIZE(&mbufstream->mem.multibuf); 244 | uint32_t avail_buf = mbufstream->mem.multibuf.size - mbufstream->mem.rpos; 245 | 246 | if (ptr) 247 | *ptr = &buf[mbufstream->mem.rpos]; 248 | return min(avail_len, avail_buf); 249 | } 250 | 251 | static uint32_t 252 | multibuf_stream_write(struct stream_t *stream, struct buffer_t *buffer) 253 | { 254 | struct mbufstream_t *mbufstream = (struct mbufstream_t *)stream; 255 | uint8_t *buf = multibuf_get_empty(&mbufstream->mem.multibuf); 256 | uint32_t wsize = 0, cur_size, remain_size = buffer->size; 257 | 258 | while ((buf != NULL) && (remain_size > 0)) 259 | { 260 | cur_size = mbufstream->mem.multibuf.size - mbufstream->mem.wpos; 261 | cur_size = min(cur_size, remain_size); 262 | if (buffer->buffer) 263 | memcpy(&buf[mbufstream->mem.wpos], &buffer->buffer[wsize], cur_size); 264 | wsize += cur_size; 265 | remain_size -= cur_size; 266 | 267 | mbufstream->mem.wpos += cur_size; 268 | if (mbufstream->mem.wpos >= mbufstream->mem.multibuf.size) 269 | { 270 | multibuf_push(&mbufstream->mem.multibuf); 271 | buf = multibuf_get_empty(&mbufstream->mem.multibuf); 272 | mbufstream->mem.wpos = 0; 273 | } 274 | } 275 | return wsize; 276 | } 277 | 278 | static uint32_t 279 | multibuf_stream_read(struct stream_t *stream, struct buffer_t *buffer) 280 | { 281 | struct mbufstream_t *mbufstream = (struct mbufstream_t *)stream; 282 | uint8_t *buf = multibuf_get_payload(&mbufstream->mem.multibuf); 283 | uint32_t rsize = 0, cur_size, remain_size = buffer->size; 284 | 285 | while ((buf != NULL) && (remain_size > 0)) 286 | { 287 | cur_size = mbufstream->mem.multibuf.size - mbufstream->mem.rpos; 288 | cur_size = min(cur_size, remain_size); 289 | if (buffer->buffer) 290 | memcpy(&buffer->buffer[rsize], &buf[mbufstream->mem.rpos], cur_size); 291 | rsize += cur_size; 292 | remain_size -= cur_size; 293 | 294 | mbufstream->mem.rpos += cur_size; 295 | if (mbufstream->mem.rpos >= mbufstream->mem.multibuf.size) 296 | { 297 | multibuf_pop(&mbufstream->mem.multibuf); 298 | buf = multibuf_get_payload(&mbufstream->mem.multibuf); 299 | mbufstream->mem.rpos = 0; 300 | } 301 | } 302 | return rsize; 303 | } 304 | 305 | // buffer stream 306 | static void buffer_stream_init(struct stream_t *stream) 307 | { 308 | struct bufstream_t *bufstream = (struct bufstream_t *)stream; 309 | bufstream->mem.pos = 0; 310 | } 311 | 312 | static uint32_t buffer_stream_get_data_length(struct stream_t *stream) 313 | { 314 | struct bufstream_t *bufstream = (struct bufstream_t *)stream; 315 | return !bufstream->mem.read ? bufstream->mem.pos : 316 | bufstream->mem.buffer.size - bufstream->mem.pos; 317 | } 318 | 319 | static uint32_t buffer_stream_get_avail_length(struct stream_t *stream) 320 | { 321 | struct bufstream_t *bufstream = (struct bufstream_t *)stream; 322 | return bufstream->mem.read ? bufstream->mem.pos : 323 | bufstream->mem.buffer.size - bufstream->mem.pos; 324 | } 325 | 326 | static uint32_t 327 | buffer_stream_get_wbuf(struct stream_t *stream, uint8_t **ptr) 328 | { 329 | struct bufstream_t *bufstream = (struct bufstream_t *)stream; 330 | uint8_t *p = NULL; 331 | uint32_t size = 0; 332 | 333 | if (!bufstream->mem.read) 334 | { 335 | p = bufstream->mem.buffer.buffer + bufstream->mem.pos; 336 | size = buffer_stream_get_avail_length(stream); 337 | } 338 | 339 | if (ptr) 340 | *ptr = p; 341 | return size; 342 | } 343 | 344 | static uint32_t 345 | buffer_stream_get_rbuf(struct stream_t *stream, uint8_t **ptr) 346 | { 347 | struct bufstream_t *bufstream = (struct bufstream_t *)stream; 348 | uint8_t *p = NULL; 349 | uint32_t size = 0; 350 | 351 | if (bufstream->mem.read) 352 | { 353 | p = bufstream->mem.buffer.buffer + bufstream->mem.pos; 354 | size = buffer_stream_get_data_length(stream); 355 | } 356 | 357 | if (ptr) 358 | *ptr = p; 359 | return size; 360 | } 361 | 362 | static uint32_t 363 | buffer_stream_write(struct stream_t *stream, struct buffer_t *buffer) 364 | { 365 | struct bufstream_t *bufstream = (struct bufstream_t *)stream; 366 | uint32_t wsize = 0; 367 | 368 | if (bufstream->mem.read) 369 | { 370 | bufstream->mem.buffer = *buffer; 371 | bufstream->mem.pos = 0; 372 | wsize = buffer->size; 373 | } 374 | else 375 | { 376 | uint32_t avail_len = buffer_stream_get_avail_length(stream); 377 | wsize = min(avail_len, buffer->size); 378 | if (buffer->buffer) 379 | memcpy(bufstream->mem.buffer.buffer + bufstream->mem.pos, 380 | buffer->buffer, wsize); 381 | bufstream->mem.pos += wsize; 382 | } 383 | return wsize; 384 | } 385 | 386 | static uint32_t 387 | buffer_stream_read(struct stream_t *stream, struct buffer_t *buffer) 388 | { 389 | struct bufstream_t *bufstream = (struct bufstream_t *)stream; 390 | uint32_t rsize = 0; 391 | 392 | if (bufstream->mem.read) 393 | { 394 | uint32_t data_len = buffer_stream_get_data_length(stream); 395 | rsize = min(data_len, buffer->size); 396 | if (buffer->buffer) 397 | memcpy(buffer->buffer, 398 | bufstream->mem.buffer.buffer + bufstream->mem.pos, rsize); 399 | bufstream->mem.pos += rsize; 400 | } 401 | else 402 | { 403 | bufstream->mem.buffer = *buffer; 404 | bufstream->mem.pos = 0; 405 | // just to notify the rx end 406 | rsize = 1; 407 | } 408 | return rsize; 409 | } 410 | 411 | const struct stream_op_t fifostream_op = 412 | { 413 | .init = fifo_stream_init, 414 | .fini = fifo_stream_init, 415 | .write = fifo_stream_write, 416 | .read = fifo_stream_read, 417 | .get_data_length = fifo_stream_get_data_length, 418 | .get_avail_length = fifo_stream_get_avail_length, 419 | .get_wbuf = fifo_stream_get_wbuf, 420 | .get_rbuf = fifo_stream_get_rbuf, 421 | }; 422 | 423 | const struct stream_op_t mbufstream_op = 424 | { 425 | .init = multibuf_stream_init, 426 | .fini = multibuf_stream_init, 427 | .write = multibuf_stream_write, 428 | .read = multibuf_stream_read, 429 | .get_data_length = multibuf_stream_get_data_length, 430 | .get_avail_length = multibuf_stream_get_avail_length, 431 | .get_wbuf = multibuf_stream_get_wbuf, 432 | .get_rbuf = multibuf_stream_get_rbuf, 433 | }; 434 | 435 | const struct stream_op_t bufstream_op = 436 | { 437 | .init = buffer_stream_init, 438 | .fini = buffer_stream_init, 439 | .write = buffer_stream_write, 440 | .read = buffer_stream_read, 441 | .get_data_length = buffer_stream_get_data_length, 442 | .get_avail_length = buffer_stream_get_avail_length, 443 | .get_wbuf = buffer_stream_get_wbuf, 444 | .get_rbuf = buffer_stream_get_rbuf, 445 | }; 446 | -------------------------------------------------------------------------------- /fundation/stream/stream.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************** 2 | * halo -- Open HAL for embedded systems * 3 | * * 4 | * MIT License: * 5 | * Copyright (c) 2017 SimonQian * 6 | * * 7 | * Permission is hereby granted, free of charge, to any person obtaining a * 8 | * copy of this software and associated documentation files (the * 9 | * "Software"), to deal in the Software without restriction, including * 10 | * without limitation the rights to use, copy, modify, merge, publish, * 11 | * distribute, distribute with modifications, sublicense, and/or sell * 12 | * copies of the Software, and to permit persons to whom the Software is * 13 | * furnished to do so, subject to the following conditions: * 14 | * * 15 | * The above copyright notice and this permission notice shall be included * 16 | * in all copies or substantial portions of the Software. * 17 | * * 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * 19 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * 20 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. * 21 | * IN NO EVENT SHALL THE ABOVE COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, * 22 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR * 23 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR * 24 | * THE USE OR OTHER DEALINGS IN THE SOFTWARE. * 25 | * * 26 | ****************************************************************************/ 27 | 28 | #ifndef __STREAM_H_INCLUDED__ 29 | #define __STREAM_H_INCLUDED__ 30 | 31 | #include "../buffer/buffer.h" 32 | 33 | struct stream_t; 34 | struct stream_op_t 35 | { 36 | void (*init)(struct stream_t *stream); 37 | void (*fini)(struct stream_t *stream); 38 | // for read/write, if buffer->buffer is NULL, 39 | // then do dummy read/write of buffer->size 40 | uint32_t (*write)(struct stream_t *stream, struct buffer_t *buffer); 41 | uint32_t (*read)(struct stream_t *stream, struct buffer_t *buffer); 42 | uint32_t (*get_data_length)(struct stream_t *stream); 43 | uint32_t (*get_avail_length)(struct stream_t *stream); 44 | // get pointer to consequent buffer for read/write 45 | uint32_t (*get_wbuf)(struct stream_t *stream, uint8_t **ptr); 46 | uint32_t (*get_rbuf)(struct stream_t *stream, uint8_t **ptr); 47 | }; 48 | 49 | struct stream_cb_t 50 | { 51 | void *param; 52 | void (*on_inout)(void *param); 53 | void (*on_connect)(void *param); 54 | void (*on_disconnect)(void *param); 55 | }; 56 | 57 | struct stream_t 58 | { 59 | struct stream_op_t const *op; 60 | 61 | // callback_tx is notification for tx end if any change in rx end 62 | struct stream_cb_t callback_tx; 63 | // callback_rx is notification for rx end if any change in tx end 64 | struct stream_cb_t callback_rx; 65 | bool tx_ready; 66 | bool rx_ready; 67 | bool overflow; 68 | }; 69 | 70 | #define STREAM_INIT(s) stream_init((struct stream_t *)(s)) 71 | #define STREAM_FINI(s) stream_fini((struct stream_t *)(s)) 72 | #define STREAM_WRITE(s, b) stream_write((struct stream_t *)(s), (b)) 73 | #define STREAM_READ(s, b) stream_read((struct stream_t *)(s), (b)) 74 | #define STREAM_GET_DATA_SIZE(s) stream_get_data_size((struct stream_t *)(s)) 75 | #define STREAM_GET_FREE_SIZE(s) stream_get_free_size((struct stream_t *)(s)) 76 | #define STREAM_GET_WBUF(s, p) stream_get_wbuf((struct stream_t *)(s), (p)) 77 | #define STREAM_GET_RBUF(s, p) stream_get_rbuf((struct stream_t *)(s), (p)) 78 | #define STREAM_CONNECT_RX(s) stream_connect_rx((struct stream_t *)(s)) 79 | #define STREAM_CONNECT_TX(s) stream_connect_tx((struct stream_t *)(s)) 80 | #define STREAM_DISCONNECT_RX(s) stream_disconnect_rx((struct stream_t *)(s)) 81 | #define STREAM_DISCONNECT_TX(s) stream_disconnect_tx((struct stream_t *)(s)) 82 | 83 | // fifo stream, user_mem is fifo_t: available in interrupt 84 | struct fifostream_t 85 | { 86 | struct stream_t stream; 87 | struct fifo_t mem; 88 | }; 89 | // multibuf stream, user_mem is multibuf_stream_t: unavailable in interrupt 90 | struct mbufstream_mem_t 91 | { 92 | struct multibuf_t multibuf; 93 | // private 94 | uint32_t rpos, wpos; 95 | }; 96 | struct mbufstream_t 97 | { 98 | struct stream_t stream; 99 | struct mbufstream_mem_t mem; 100 | }; 101 | // buffer stream, user_mem is buffer_stream_t: unavailable in interrupt 102 | struct bufstream_mem_t 103 | { 104 | struct buffer_t buffer; 105 | bool read; 106 | // private 107 | uint32_t pos; 108 | }; 109 | struct bufstream_t 110 | { 111 | struct stream_t stream; 112 | struct bufstream_mem_t mem; 113 | }; 114 | 115 | halo_err_t stream_init(struct stream_t *stream); 116 | halo_err_t stream_fini(struct stream_t *stream); 117 | uint32_t stream_write(struct stream_t *stream, struct buffer_t *buffer); 118 | uint32_t stream_read(struct stream_t *stream, struct buffer_t *buffer); 119 | uint32_t stream_get_data_size(struct stream_t *stream); 120 | uint32_t stream_get_free_size(struct stream_t *stream); 121 | uint32_t stream_get_wbuf(struct stream_t *stream, uint8_t **ptr); 122 | uint32_t stream_get_rbuf(struct stream_t *stream, uint8_t **ptr); 123 | void stream_connect_rx(struct stream_t *stream); 124 | void stream_connect_tx(struct stream_t *stream); 125 | void stream_disconnect_rx(struct stream_t *stream); 126 | void stream_disconnect_tx(struct stream_t *stream); 127 | 128 | extern const struct stream_op_t fifostream_op; 129 | extern const struct stream_op_t mbufstream_op; 130 | extern const struct stream_op_t bufstream_op; 131 | 132 | #endif // __STREAM_H_INCLUDED__ 133 | -------------------------------------------------------------------------------- /hal/core/CortexM/cortexm.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/versaloon/halo/43c2f32877164bf1db7608b51b73b27f67cb74ba/hal/core/CortexM/cortexm.c -------------------------------------------------------------------------------- /hal/core/CortexM/cortexm.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/versaloon/halo/43c2f32877164bf1db7608b51b73b27f67cb74ba/hal/core/CortexM/cortexm.h -------------------------------------------------------------------------------- /hal/gd32f1x0/core.c: -------------------------------------------------------------------------------- 1 | /**************************************************************************** 2 | * halo -- Open HAL for embedded systems * 3 | * * 4 | * MIT License: * 5 | * Copyright (c) 2017 SimonQian * 6 | * * 7 | * Permission is hereby granted, free of charge, to any person obtaining a * 8 | * copy of this software and associated documentation files (the * 9 | * "Software"), to deal in the Software without restriction, including * 10 | * without limitation the rights to use, copy, modify, merge, publish, * 11 | * distribute, distribute with modifications, sublicense, and/or sell * 12 | * copies of the Software, and to permit persons to whom the Software is * 13 | * furnished to do so, subject to the following conditions: * 14 | * * 15 | * The above copyright notice and this permission notice shall be included * 16 | * in all copies or substantial portions of the Software. * 17 | * * 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * 19 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * 20 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. * 21 | * IN NO EVENT SHALL THE ABOVE COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, * 22 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR * 23 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR * 24 | * THE USE OR OTHER DEALINGS IN THE SOFTWARE. * 25 | * * 26 | ****************************************************************************/ 27 | 28 | #include "halo.h" 29 | 30 | static struct halo_sysinfo_t halo_sysinfo = 31 | { 32 | 0, CORE_VECTOR_TABLE, 33 | CORE_CLKEN, 34 | CORE_CLKSRC, halo_PLLSRC_HSE, 35 | HSE_FREQ_HZ, HSI_FREQ_HZ, CORE_PLL_FREQ_HZ, 36 | CORE_MCLK_FREQ_HZ, CORE_APB_FREQ_HZ, CORE_MCLK_FREQ_HZ, 37 | }; 38 | 39 | // Pendsv 40 | struct halo_pendsv_t 41 | { 42 | void (*on_pendsv)(void *); 43 | void *param; 44 | } static halo_pendsv; 45 | 46 | ROOTFUNC void PendSV_Handler(void) 47 | { 48 | if (halo_pendsv.on_pendsv != NULL) 49 | { 50 | halo_pendsv.on_pendsv(halo_pendsv.param); 51 | } 52 | } 53 | 54 | halo_err_t halo_pendsv_config(void (*on_pendsv)(void *), void *param) 55 | { 56 | halo_pendsv.on_pendsv = on_pendsv; 57 | halo_pendsv.param = param; 58 | 59 | if (halo_pendsv.on_pendsv != NULL) 60 | { 61 | SCB->SHP[10] = 0xFF; 62 | } 63 | return HALOERR_NONE; 64 | } 65 | 66 | halo_err_t halo_pendsv_trigger(void) 67 | { 68 | SCB->ICSR = SCB_ICSR_PENDSVSET_Msk; 69 | return HALOERR_NONE; 70 | } 71 | 72 | halo_err_t halo_core_get_info(struct halo_info_t **info) 73 | { 74 | *info = &halo_info; 75 | return HALOERR_NONE; 76 | } 77 | 78 | halo_err_t halo_core_fini(void *p) 79 | { 80 | return HALOERR_NONE; 81 | } 82 | 83 | halo_err_t halo_core_reset(void *p) 84 | { 85 | NVIC_SystemReset(); 86 | return HALOERR_NONE; 87 | } 88 | 89 | uint32_t halo_core_get_stack(void) 90 | { 91 | return __get_MSP(); 92 | } 93 | 94 | halo_err_t halo_core_set_stack(uint32_t sp) 95 | { 96 | __set_MSP(sp); 97 | return HALOERR_NONE; 98 | } 99 | 100 | // sleep will enable interrupt 101 | // for cortex processor, if an interrupt occur between enable the interrupt 102 | // and __WFI, wfi will not make the core sleep 103 | void halo_core_sleep(uint32_t mode) 104 | { 105 | vsf_leave_critical(); 106 | __WFI(); 107 | } 108 | 109 | static uint32_t __log2__(uint32_t n) 110 | { 111 | uint32_t i, value = 1; 112 | 113 | for (i = 0; i < 31; i++) 114 | { 115 | if (value == n) 116 | { 117 | return i; 118 | } 119 | value <<= 1; 120 | } 121 | return 0; 122 | } 123 | 124 | #define RCC_GCFGR_FREQ_DIVIDE_RESET (uint32_t)0x083F000C /* Reset SCS[1:0], AHBPS[3:0], APB1PS[2:0],APB2PS[2:0], 125 | ADCPS[1:0],USBPS[1:0],CKOTUSRC[2:0], CKOUTDIV, and PLLDV bits*/ 126 | #define RCC_GCCR_CLK_ENABLE_RESET (uint32_t)0xFEF6FFFF /* Reset HSEEN, CKMEN and PLLEN bits */ 127 | #define RCC_GCCR_HSEBPS_RESET (uint32_t)0xFFFBFFFF /* Reset HSEBPS bit */ 128 | #define RCC_GCFGR_CLK_SELECT_RESET (uint32_t)0xF7C0FFFF /* Reset PLLSEL, PLLPREDV and PLLMF[3:0] bits */ 129 | #define RCC_GCFGR2_HSEPREDV1_RESET (uint32_t)0xFFFFFFF0 /* Reset HSEPREDV1[3:0] bits */ 130 | #define RCC_GCFGR3_RESET (uint32_t)0xFFFFFEBC /* Reset USARTSEL[1:0], I2CSEL, CECSEL and ADCSEL bits */ 131 | #define RCC_GCCR2_HSI14_RESET (uint32_t)0xFFFFFFFE /* Reset HSI14 bit */ 132 | #define RCC_GCIR_DISABLE (uint32_t)0x00000000 /* Disable all interrupts */ 133 | #define RCC_GCFGR_PLLMF3_0 (uint32_t)0x003C0000 /* PLLMF[3:0] Bits */ 134 | halo_err_t halo_core_init(void *p) 135 | { 136 | uint32_t tmp32; 137 | 138 | if (p != NULL) 139 | { 140 | halo_info = *(struct halo_info_t *)p; 141 | } 142 | 143 | // move from System_Init 144 | RCC->GCCR |= RCC_GCCR_HSIEN; 145 | RCC->GCFGR &= RCC_GCFGR_FREQ_DIVIDE_RESET; 146 | RCC->GCCR &= RCC_GCCR_CLK_ENABLE_RESET; 147 | RCC->GCCR &= RCC_GCCR_HSEBPS_RESET; 148 | RCC->GCFGR &= RCC_GCFGR_CLK_SELECT_RESET; 149 | RCC->GCFGR2 &= RCC_GCFGR2_HSEPREDV1_RESET; 150 | RCC->GCFGR3 &= RCC_GCFGR3_RESET; 151 | RCC->GCCR2 &= RCC_GCCR2_HSI14_RESET; 152 | RCC->GCIR = RCC_GCIR_DISABLE; 153 | 154 | if (halo_info.clk_enable & halo_CLK_HSI) 155 | { 156 | RCC->GCCR |= RCC_GCCR_HSIEN; 157 | while (!(RCC->GCCR & RCC_GCCR_HSISTB)); 158 | RCC->GCFGR &= ~RCC_GCFGR_SCS; 159 | while (RCC->GCFGR & RCC_GCFGR_SCSS); 160 | } 161 | 162 | if (halo_info.clk_enable & halo_CLK_HSE) 163 | { 164 | RCC->GCCR |= RCC_GCCR_HSEEN; 165 | while (!(RCC->GCCR & RCC_GCCR_HSESTB)); 166 | RCC->GCFGR = (RCC->GCFGR & ~RCC_GCFGR_SCS) | RCC_GCFGR_SCS_HSE; 167 | while ((RCC->GCFGR & RCC_GCFGR_SCSS) != RCC_GCFGR_SCSS_HSE); 168 | } 169 | 170 | RCC->GCCR &= ~RCC_GCCR_PLLEN; 171 | RCC->GCFGR &= ~(RCC_GCFGR_AHBPS | RCC_GCFGR_APB1PS | RCC_GCFGR_APB2PS); 172 | 173 | if (halo_info.clk_enable & halo_CLK_PLL) 174 | { 175 | if (halo_info.pllsrc == halo_PLLSRC_HSID2) 176 | { 177 | RCC->GCFGR &= ~RCC_GCFGR_PLLSEL; 178 | tmp32 = halo_info.hsi_freq_hz / 2; 179 | } 180 | else if (halo_info.pllsrc == halo_PLLSRC_HSE) 181 | { 182 | RCC->GCFGR |= RCC_GCFGR_PLLSEL_HSEPREDIV; 183 | RCC->GCFGR &= ~RCC_GCFGR_PLLPREDV; 184 | tmp32 = halo_info.hse_freq_hz; 185 | } 186 | else if (halo_info.pllsrc == halo_PLLSRC_HSED2) 187 | { 188 | RCC->GCFGR |= RCC_GCFGR_PLLSEL_HSEPREDIV; 189 | RCC->GCFGR |= RCC_GCFGR_PLLPREDV_PREDIV1_DIV2; 190 | tmp32 = halo_info.hse_freq_hz / 2; 191 | } 192 | else 193 | return HALOERR_FAIL; 194 | 195 | RCC->GCFGR &= ~(RCC_GCFGR_PLLMF | RCC_GCFGR_USBPS); 196 | tmp32 = halo_info.pll_freq_hz / tmp32; 197 | tmp32 -= 2; 198 | if (tmp32 & 0xf) 199 | RCC->GCFGR |= (tmp32 & 0xf) << 18; 200 | if (tmp32 & 0x10) 201 | RCC->GCFGR |= RCC_GCFGR_PLLMF_4; 202 | 203 | RCC->GCCR |= RCC_GCCR_PLLEN; 204 | while (!(RCC->GCCR & RCC_GCCR_PLLSTB)); 205 | 206 | if (halo_info.pll_freq_hz == 48000000) 207 | RCC->GCFGR |= RCC_GCFGR_USBPS_Div1; 208 | else if (halo_info.pll_freq_hz == 72000000) 209 | RCC->GCFGR |= RCC_GCFGR_USBPS_Div1_5; 210 | else if (halo_info.pll_freq_hz == 96000000) 211 | RCC->GCFGR |= RCC_GCFGR_USBPS_Div2; 212 | else if (halo_info.pll_freq_hz == 120000000) 213 | RCC->GCFGR |= RCC_GCFGR_USBPS_Div2_5; 214 | } 215 | 216 | if (halo_info.clksrc == halo_CLKSRC_PLL) 217 | { 218 | tmp32 = halo_info.pll_freq_hz / halo_info.sys_freq_hz; 219 | 220 | RCC->GCFGR &= ~RCC_GCFGR_AHBPS; 221 | tmp32 = __log2__(tmp32); 222 | if (tmp32 > 0) 223 | RCC->GCFGR |= ((0x08 | (tmp32 - 1)) << 4); 224 | tmp32 = RCC_GCFGR_SCS_PLL; 225 | } 226 | else 227 | return HALOERR_FAIL; 228 | RCC->GCFGR = (RCC->GCFGR & ~RCC_GCFGR_SCS) | tmp32; 229 | while ((RCC->GCFGR & RCC_GCFGR_SCSS) != (tmp32 << 2)); 230 | 231 | RCC->APB2CCR |= RCC_APB2CCR_CFGEN; 232 | 233 | SCB->VTOR = halo_info.vector_table; 234 | SCB->AIRCR = 0x05FA0000 | halo_info.priority_group; 235 | return HALOERR_NONE; 236 | } 237 | 238 | uint32_t halo_uid_get(uint8_t *buffer, uint32_t size) 239 | { 240 | if (NULL == buffer) 241 | { 242 | return 0; 243 | } 244 | 245 | if (size > 12) 246 | { 247 | size = 12; 248 | } 249 | 250 | memcpy(buffer, (uint8_t *)0x1ffff7ac, size); 251 | return size; 252 | } 253 | 254 | // tickclk 255 | #define CM3_SYSTICK_ENABLE (1 << 0) 256 | #define CM3_SYSTICK_INT (1 << 1) 257 | #define CM3_SYSTICK_CLKSOURCE (1 << 2) 258 | #define CM3_SYSTICK_COUNTFLAG (1 << 16) 259 | 260 | static void (*halo_tickclk_cb)(void *param) = NULL; 261 | static void *halo_tickclk_param = NULL; 262 | static uint32_t halo_tickcnt = 0; 263 | halo_err_t halo_tickclk_start(void) 264 | { 265 | SysTick->VAL = 0; 266 | SysTick->CTRL |= CM3_SYSTICK_ENABLE; 267 | return HALOERR_NONE; 268 | } 269 | 270 | halo_err_t halo_tickclk_stop(void) 271 | { 272 | SysTick->CTRL &= ~CM3_SYSTICK_ENABLE; 273 | return HALOERR_NONE; 274 | } 275 | 276 | static uint32_t halo_tickclk_get_count_local(void) 277 | { 278 | return halo_tickcnt; 279 | } 280 | 281 | uint32_t halo_tickclk_get_count(void) 282 | { 283 | uint32_t count1, count2; 284 | 285 | do { 286 | count1 = halo_tickclk_get_count_local(); 287 | count2 = halo_tickclk_get_count_local(); 288 | } while (count1 != count2); 289 | return count1; 290 | } 291 | 292 | ROOTFUNC void SysTick_Handler(void) 293 | { 294 | halo_tickcnt++; 295 | if (halo_tickclk_cb != NULL) 296 | { 297 | halo_tickclk_cb(halo_tickclk_param); 298 | } 299 | } 300 | 301 | halo_err_t halo_tickclk_config_cb(void (*callback)(void*), void *param) 302 | { 303 | uint32_t tmp = SysTick->CTRL; 304 | 305 | SysTick->CTRL &= ~CM3_SYSTICK_INT; 306 | halo_tickclk_cb = callback; 307 | halo_tickclk_param = param; 308 | SysTick->CTRL = tmp; 309 | return HALOERR_NONE; 310 | } 311 | 312 | void halo_tickclk_poll() 313 | { 314 | if (SysTick->CTRL & CM3_SYSTICK_COUNTFLAG) 315 | SysTick_Handler(); 316 | } 317 | 318 | halo_err_t halo_tickclk_init() 319 | { 320 | halo_tickcnt = 0; 321 | SysTick->LOAD = halo_info.sys_freq_hz / 1000; 322 | #ifdef IFS_TICKCLK_NOINT 323 | SysTick->CTRL = CM3_SYSTICK_CLKSOURCE; 324 | #else 325 | SysTick->CTRL = CM3_SYSTICK_INT | CM3_SYSTICK_CLKSOURCE; 326 | NVIC_SetPriority(SysTick_IRQn, (1 << __NVIC_PRIO_BITS) - 1); 327 | #endif 328 | return HALOERR_NONE; 329 | } 330 | 331 | halo_err_t halo_tickclk_fini(void) 332 | { 333 | return halo_tickclk_stop(); 334 | } 335 | 336 | void HardFault_Handler(void) 337 | { 338 | while(1); 339 | } 340 | 341 | // AFIO 342 | halo_err_t halo_afio_config(const struct halo_afio_pin_t *pin, uint32_t mode) 343 | { 344 | GPIO_TypeDef *GPIOx = (GPIO_TypeDef *)(GPIOA_BASE + (pin->port << 10)); 345 | RCC->AHBCCR |= RCC_AHBCCR_PAEN << pin->port; 346 | 347 | if (pin->af >= 0) 348 | { 349 | GPIOx->AFS[pin->pin >> 3] &= ~((uint32_t)0xF << ((pin->pin & 7) << 2)); 350 | GPIOx->AFS[pin->pin >> 3] |= (uint32_t)pin->af << ((pin->pin & 7) << 2); 351 | } 352 | halo_gpio_config_pin(pin->port, pin->pin, mode); 353 | return HALOERR_NONE; 354 | } 355 | 356 | -------------------------------------------------------------------------------- /hal/gd32f1x0/core.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************** 2 | * halo -- Open HAL for embedded systems * 3 | * * 4 | * MIT License: * 5 | * Copyright (c) 2017 SimonQian * 6 | * * 7 | * Permission is hereby granted, free of charge, to any person obtaining a * 8 | * copy of this software and associated documentation files (the * 9 | * "Software"), to deal in the Software without restriction, including * 10 | * without limitation the rights to use, copy, modify, merge, publish, * 11 | * distribute, distribute with modifications, sublicense, and/or sell * 12 | * copies of the Software, and to permit persons to whom the Software is * 13 | * furnished to do so, subject to the following conditions: * 14 | * * 15 | * The above copyright notice and this permission notice shall be included * 16 | * in all copies or substantial portions of the Software. * 17 | * * 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * 19 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * 20 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. * 21 | * IN NO EVENT SHALL THE ABOVE COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, * 22 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR * 23 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR * 24 | * THE USE OR OTHER DEALINGS IN THE SOFTWARE. * 25 | * * 26 | ****************************************************************************/ 27 | 28 | #ifndef __HALO_CORE_H_INCLUDED__ 29 | #define __HALO_CORE_H_INCLUDED__ 30 | 31 | #define GD32F1X0_CLK_HSI (1UL << 0) 32 | #define GD32F1X0_CLK_HSE (1UL << 1) 33 | #define GD32F1X0_CLK_PLL (1UL << 2) 34 | 35 | struct halo_afio_pin_t 36 | { 37 | uint8_t port; 38 | uint8_t pin; 39 | int8_t af; 40 | }; 41 | halo_err_t halo_afio_config(const struct halo_afio_pin_t *pin, uint32_t mode); 42 | 43 | enum gd32f1x0_clksrc_t 44 | { 45 | GD32F1X0_CLKSRC_HSI = 0, 46 | GD32F1X0_CLKSRC_HSE = 1, 47 | GD32F1X0_CLKSRC_PLL = 2 48 | }; 49 | enum gd32f1x0_pllsrc_t 50 | { 51 | GD32F1X0_PLLSRC_HSID2, 52 | GD32F1X0_PLLSRC_HSE, 53 | GD32F1X0_PLLSRC_HSED2, 54 | }; 55 | struct halo_sysinfo_t 56 | { 57 | uint8_t priority_group; 58 | uint32_t vector_table; 59 | 60 | uint32_t clk_enable; 61 | 62 | enum gd32f1x0_clksrc_t clksrc; 63 | enum gd32f1x0_pllsrc_t pllsrc; 64 | 65 | uint32_t hse_freq_hz; 66 | uint32_t hsi_freq_hz; 67 | uint32_t pll_freq_hz; 68 | uint32_t ahb_freq_hz; 69 | uint32_t apb_freq_hz; 70 | 71 | uint32_t sys_freq_hz; 72 | }; 73 | 74 | #endif // __GD32F1X0_CORE_H_INCLUDED__ 75 | -------------------------------------------------------------------------------- /hal/gd32f1x0/gpio/GD32F1X0_GPIO.c: -------------------------------------------------------------------------------- 1 | /**************************************************************************** 2 | * halo -- Open HAL for embedded systems * 3 | * * 4 | * MIT License: * 5 | * Copyright (c) 2017 SimonQian * 6 | * * 7 | * Permission is hereby granted, free of charge, to any person obtaining a * 8 | * copy of this software and associated documentation files (the * 9 | * "Software"), to deal in the Software without restriction, including * 10 | * without limitation the rights to use, copy, modify, merge, publish, * 11 | * distribute, distribute with modifications, sublicense, and/or sell * 12 | * copies of the Software, and to permit persons to whom the Software is * 13 | * furnished to do so, subject to the following conditions: * 14 | * * 15 | * The above copyright notice and this permission notice shall be included * 16 | * in all copies or substantial portions of the Software. * 17 | * * 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * 19 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * 20 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. * 21 | * IN NO EVENT SHALL THE ABOVE COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, * 22 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR * 23 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR * 24 | * THE USE OR OTHER DEALINGS IN THE SOFTWARE. * 25 | * * 26 | ****************************************************************************/ 27 | 28 | #include "halo.h" 29 | 30 | #define RCC_APB2Periph_GPIOA ((uint32_t)0x00000004) 31 | 32 | halo_err_t halo_gpio_init(uint8_t index) 33 | { 34 | RCC->AHBCCR |= RCC_AHBCCR_PAEN << index; 35 | return HALOERR_NONE; 36 | } 37 | 38 | halo_err_t halo_gpio_fini(uint8_t index) 39 | { 40 | RCC->AHBRCR |= RCC_AHBRCR_PARST << index; 41 | RCC->AHBCCR &= ~(RCC_AHBCCR_PAEN << index); 42 | return HALOERR_NONE; 43 | } 44 | 45 | halo_err_t halo_gpio_config_pin(uint8_t index, uint8_t pin_idx, uint32_t mode) 46 | { 47 | GPIO_TypeDef *gpio; 48 | uint8_t offset = pin_idx << 1; 49 | 50 | gpio = (GPIO_TypeDef *)(GPIOA_BASE + ((uint32_t)index << 10)); 51 | 52 | gpio->CTLR = (gpio->CTLR & ~(0x3 << offset)) | ((mode & 0x3) << offset); 53 | 54 | gpio->OMODE &= ~(GPIO_OMODE_OM0 << pin_idx); 55 | gpio->OMODE |= ((mode >> 2) & 0x1) << offset; 56 | 57 | gpio->PUPD &= ~(GPIO_PUPD_PUPD0 << offset); 58 | gpio->PUPD |= ((mode >> 3) & 0x3) << offset; 59 | 60 | gpio->OSPD &= ~(GPIO_OSPD_OSPD0 << offset); 61 | gpio->OSPD |= GPIO_OSPD_OSPD0 << offset; 62 | // gpio->OSPD |= ((mode >> 5) & 0x3) << offset; 63 | 64 | return HALOERR_NONE; 65 | } 66 | 67 | halo_err_t halo_gpio_config(uint8_t index, uint32_t pin_mask, uint32_t io, 68 | uint32_t pull_en_mask, uint32_t input_pull_mask) 69 | { 70 | return HALOERR_NONE; 71 | } 72 | 73 | halo_err_t halo_gpio_set(uint8_t index, uint32_t pin_mask) 74 | { 75 | GPIO_TypeDef *gpio; 76 | 77 | gpio = (GPIO_TypeDef *)(GPIOA_BASE + ((uint32_t)index << 10)); 78 | gpio->BOR = pin_mask & 0xffff; 79 | return HALOERR_NONE; 80 | } 81 | 82 | halo_err_t halo_gpio_clear(uint8_t index, uint32_t pin_mask) 83 | { 84 | GPIO_TypeDef *gpio; 85 | 86 | gpio = (GPIO_TypeDef *)(GPIOA_BASE + ((uint32_t)index << 10)); 87 | gpio->BCR = pin_mask; 88 | return HALOERR_NONE; 89 | } 90 | 91 | halo_err_t halo_gpio_out(uint8_t index, uint32_t pin_mask, uint32_t value) 92 | { 93 | GPIO_TypeDef *gpio; 94 | 95 | gpio = (GPIO_TypeDef *)(GPIOA_BASE + ((uint32_t)index << 10)); 96 | gpio->BOR = ((pin_mask & ~value) << 16) | (pin_mask & value); 97 | return HALOERR_NONE; 98 | } 99 | 100 | uint32_t halo_gpio_get(uint8_t index, uint32_t pin_mask) 101 | { 102 | GPIO_TypeDef *gpio; 103 | 104 | gpio = (GPIO_TypeDef *)(GPIOA_BASE + ((uint32_t)index << 10)); 105 | return gpio->DIR & pin_mask; 106 | } 107 | 108 | halo_err_t halo_gpio_in(uint8_t index, uint32_t pin_mask, uint32_t *value) 109 | { 110 | *value = halo_gpio_get(index, pin_mask); 111 | return HALOERR_NONE; 112 | } 113 | -------------------------------------------------------------------------------- /hal/gd32f1x0/halo_basetype.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************** 2 | * halo -- Open HAL for embedded systems * 3 | * * 4 | * MIT License: * 5 | * Copyright (c) 2017 SimonQian * 6 | * * 7 | * Permission is hereby granted, free of charge, to any person obtaining a * 8 | * copy of this software and associated documentation files (the * 9 | * "Software"), to deal in the Software without restriction, including * 10 | * without limitation the rights to use, copy, modify, merge, publish, * 11 | * distribute, distribute with modifications, sublicense, and/or sell * 12 | * copies of the Software, and to permit persons to whom the Software is * 13 | * furnished to do so, subject to the following conditions: * 14 | * * 15 | * The above copyright notice and this permission notice shall be included * 16 | * in all copies or substantial portions of the Software. * 17 | * * 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * 19 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * 20 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. * 21 | * IN NO EVENT SHALL THE ABOVE COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, * 22 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR * 23 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR * 24 | * THE USE OR OTHER DEALINGS IN THE SOFTWARE. * 25 | * * 26 | ****************************************************************************/ 27 | 28 | #ifndef __HALO_BASETYPE_H_INCLUDED__ 29 | #define __HALO_BASETYPE_H_INCLUDED__ 30 | 31 | // define the most efficient atom integer 32 | typedef int halo_int_t; 33 | 34 | #endif // __HALO_BASETYPE_H_INCLUDED__ 35 | -------------------------------------------------------------------------------- /hal/gd32f1x0/halo_const.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************** 2 | * halo -- Open HAL for embedded systems * 3 | * * 4 | * MIT License: * 5 | * Copyright (c) 2017 SimonQian * 6 | * * 7 | * Permission is hereby granted, free of charge, to any person obtaining a * 8 | * copy of this software and associated documentation files (the * 9 | * "Software"), to deal in the Software without restriction, including * 10 | * without limitation the rights to use, copy, modify, merge, publish, * 11 | * distribute, distribute with modifications, sublicense, and/or sell * 12 | * copies of the Software, and to permit persons to whom the Software is * 13 | * furnished to do so, subject to the following conditions: * 14 | * * 15 | * The above copyright notice and this permission notice shall be included * 16 | * in all copies or substantial portions of the Software. * 17 | * * 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * 19 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * 20 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. * 21 | * IN NO EVENT SHALL THE ABOVE COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, * 22 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR * 23 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR * 24 | * THE USE OR OTHER DEALINGS IN THE SOFTWARE. * 25 | * * 26 | ****************************************************************************/ 27 | 28 | #ifndef __HALO_CONST_H_INCLUDED__ 29 | #define __HALO_CONST_H_INCLUDED__ 30 | 31 | #include "gd32f1x0.h" 32 | #include "core.h" 33 | 34 | #define SLEEP_WFI 0 35 | #define SLEEP_PWRDOWN 1 36 | 37 | #define GPIO_INFLOAT 0x00 38 | #define GPIO_INPU 0x08 39 | #define GPIO_INPD 0x10 40 | #define GPIO_OUTPP 0x01 41 | #define GPIO_OUTOD 0x05 42 | 43 | #define GPIO_OD 0x04 44 | #define GPIO_AF 0x02 45 | #define GPIO_AN 0x03 46 | 47 | #endif // __HALO_CONST_H_INCLUDED__ 48 | -------------------------------------------------------------------------------- /hal/gd32f1x0/startup/iar/startup_gd32f1x0.s: -------------------------------------------------------------------------------- 1 | ;/** 2 | ; ****************************************************************************** 3 | ; * @file startup_gd32f1x0.s 4 | ; * @author MCU SD 5 | ; * @version V1.0.1 6 | ; * @date 6-Sep-2014 7 | ; * @brief GD32F1x0 startup code. 8 | ; ****************************************************************************** 9 | ; */ 10 | 11 | MODULE ?cstartup 12 | 13 | ;; Forward declaration of sections. 14 | SECTION CSTACK:DATA:NOROOT(3) 15 | 16 | SECTION .intvec:CODE:NOROOT(2) 17 | 18 | EXTERN __iar_program_start 19 | PUBLIC __vector_table 20 | 21 | DATA 22 | __vector_table 23 | DCD sfe(CSTACK) 24 | DCD Reset_Handler ; Reset Handler 25 | 26 | DCD NMI_Handler ; NMI Handler 27 | DCD HardFault_Handler ; Hard Fault Handler 28 | DCD MemManage_Handler ; MPU Fault Handler//by denvice 29 | DCD BusFault_Handler ; Bus Fault Handler//by denvice 30 | DCD UsageFault_Handler ; Usage Fault Handler//by denvice 31 | DCD 0 ; Reserved 32 | DCD 0 ; Reserved 33 | DCD 0 ; Reserved 34 | DCD 0 ; Reserved 35 | DCD SVC_Handler ; SVCall Handler 36 | DCD DebugMon_Handler ; Debug Monitor Handler//by denvice 37 | DCD 0 ; Reserved 38 | DCD PendSV_Handler ; PendSV Handler 39 | DCD SysTick_Handler ; SysTick Handler 40 | 41 | ; External Interrupts 42 | DCD WWDG_IRQHandler ; Window Watchdog 43 | DCD LVD_IRQHandler ; LVD through EXTI Line detect 44 | DCD RTC_IRQHandler ; RTC through EXTI Line 45 | DCD FMC_IRQHandler ; FMC 46 | DCD RCC_IRQHandler ; RCC 47 | DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1 48 | DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3 49 | DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15 50 | DCD TS_IRQHandler ; TS 51 | DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 52 | DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3 53 | DCD DMA1_Channel4_5_IRQHandler ; DMA1 Channel 4 and Channel 5 54 | DCD ADC1_CMP_IRQHandler ; ADC1, CMP1 and CMP2 55 | DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation 56 | DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare 57 | DCD TIM2_IRQHandler ; TIM2 58 | DCD TIM3_IRQHandler ; TIM3 59 | DCD TIM6_DAC_IRQHandler ; TIM6 and DAC 60 | DCD 0 ; Reserved 61 | DCD TIM14_IRQHandler ; TIM14 62 | DCD TIM15_IRQHandler ; TIM15 63 | DCD TIM16_IRQHandler ; TIM16 64 | DCD TIM17_IRQHandler ; TIM17 65 | DCD I2C1_EV_IRQHandler ; I2C1 Event by denvice 66 | DCD I2C2_EV_IRQHandler ; I2C2 Event by denvice 67 | DCD SPI1_IRQHandler ; SPI1 68 | DCD SPI2_IRQHandler ; SPI2 69 | DCD USART1_IRQHandler ; USART1 70 | DCD USART2_IRQHandler ; USART2 71 | DCD 0 ; Reserved 72 | DCD CEC_IRQHandler ; CEC 73 | DCD 0 ; Reserved 74 | 75 | DCD I2C1_ER_IRQHandler ; I2C1 Error by denvice 76 | DCD 0 ; Reserved by denvice 77 | DCD I2C2_ER_IRQHandler ; I2C2 Error by denvice 78 | DCD I2C3_EV_IRQHandler ; I2C3 Event by denvice 79 | DCD I2C3_ER_IRQHandler ; I2C3 Error by denvice 80 | DCD USB_LP_IRQHandler ; USB Low Priority by denvice 81 | DCD USB_HP_IRQHandler ; USB High Priority by denvice 82 | DCD 0 ; Reserved by denvice 83 | DCD 0 ; Reserved by denvice 84 | DCD 0 ; Reserved by denvice 85 | DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend by denvice 86 | DCD 0 ; Reserved by denvice 87 | DCD 0 ; Reserved by denvice 88 | DCD 0 ; Reserved by denvice 89 | DCD 0 ; Reserved by denvice 90 | DCD 0 ; Reserved by denvice 91 | DCD DMA1_Channel6_7_IRQHandler ; DMA1 Channel 6 and Channel 7 by denvice 92 | DCD 0 ; Reserved by denvice 93 | DCD 0 ; Reserved by denvice 94 | DCD SPI3_IRQHandler ; SPI3 by denvice 95 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 96 | ;; 97 | ;; Default interrupt handlers. 98 | ;; 99 | THUMB 100 | 101 | PUBWEAK Reset_Handler 102 | SECTION .text:CODE:NOROOT:REORDER(2) 103 | Reset_Handler 104 | LDR R0, =__iar_program_start 105 | BX R0 106 | 107 | PUBWEAK NMI_Handler 108 | SECTION .text:CODE:NOROOT:REORDER(1) 109 | NMI_Handler 110 | B NMI_Handler 111 | 112 | 113 | PUBWEAK HardFault_Handler 114 | SECTION .text:CODE:NOROOT:REORDER(1) 115 | HardFault_Handler 116 | B HardFault_Handler 117 | 118 | 119 | PUBWEAK MemManage_Handler 120 | SECTION .text:CODE:NOROOT:REORDER(1) 121 | MemManage_Handler 122 | B MemManage_Handler 123 | 124 | PUBWEAK BusFault_Handler 125 | SECTION .text:CODE:NOROOT:REORDER(1) 126 | BusFault_Handler 127 | B BusFault_Handler 128 | 129 | PUBWEAK UsageFault_Handler 130 | SECTION .text:CODE:NOROOT:REORDER(1) 131 | UsageFault_Handler 132 | B UsageFault_Handler 133 | 134 | PUBWEAK SVC_Handler 135 | SECTION .text:CODE:NOROOT:REORDER(1) 136 | SVC_Handler 137 | B SVC_Handler 138 | 139 | PUBWEAK DebugMon_Handler 140 | SECTION .text:CODE:NOROOT:REORDER(1) 141 | DebugMon_Handler 142 | B DebugMon_Handler 143 | 144 | 145 | PUBWEAK PendSV_Handler 146 | SECTION .text:CODE:NOROOT:REORDER(1) 147 | PendSV_Handler 148 | B PendSV_Handler 149 | 150 | 151 | PUBWEAK SysTick_Handler 152 | SECTION .text:CODE:NOROOT:REORDER(1) 153 | SysTick_Handler 154 | B SysTick_Handler 155 | 156 | 157 | PUBWEAK WWDG_IRQHandler 158 | SECTION .text:CODE:NOROOT:REORDER(1) 159 | WWDG_IRQHandler 160 | B WWDG_IRQHandler 161 | 162 | 163 | PUBWEAK LVD_IRQHandler 164 | SECTION .text:CODE:NOROOT:REORDER(1) 165 | LVD_IRQHandler 166 | B LVD_IRQHandler 167 | 168 | 169 | PUBWEAK RTC_IRQHandler 170 | SECTION .text:CODE:NOROOT:REORDER(1) 171 | RTC_IRQHandler 172 | B RTC_IRQHandler 173 | 174 | 175 | PUBWEAK FMC_IRQHandler 176 | SECTION .text:CODE:NOROOT:REORDER(1) 177 | FMC_IRQHandler 178 | B FMC_IRQHandler 179 | 180 | 181 | PUBWEAK RCC_IRQHandler 182 | SECTION .text:CODE:NOROOT:REORDER(1) 183 | RCC_IRQHandler 184 | B RCC_IRQHandler 185 | 186 | 187 | PUBWEAK EXTI0_1_IRQHandler 188 | SECTION .text:CODE:NOROOT:REORDER(1) 189 | EXTI0_1_IRQHandler 190 | B EXTI0_1_IRQHandler 191 | 192 | 193 | PUBWEAK EXTI2_3_IRQHandler 194 | SECTION .text:CODE:NOROOT:REORDER(1) 195 | EXTI2_3_IRQHandler 196 | B EXTI2_3_IRQHandler 197 | 198 | 199 | PUBWEAK EXTI4_15_IRQHandler 200 | SECTION .text:CODE:NOROOT:REORDER(1) 201 | EXTI4_15_IRQHandler 202 | B EXTI4_15_IRQHandler 203 | 204 | 205 | PUBWEAK TS_IRQHandler 206 | SECTION .text:CODE:NOROOT:REORDER(1) 207 | TS_IRQHandler 208 | B TS_IRQHandler 209 | 210 | 211 | PUBWEAK DMA1_Channel1_IRQHandler 212 | SECTION .text:CODE:NOROOT:REORDER(1) 213 | DMA1_Channel1_IRQHandler 214 | B DMA1_Channel1_IRQHandler 215 | 216 | 217 | PUBWEAK DMA1_Channel2_3_IRQHandler 218 | SECTION .text:CODE:NOROOT:REORDER(1) 219 | DMA1_Channel2_3_IRQHandler 220 | B DMA1_Channel2_3_IRQHandler 221 | 222 | 223 | PUBWEAK DMA1_Channel4_5_IRQHandler 224 | SECTION .text:CODE:NOROOT:REORDER(1) 225 | DMA1_Channel4_5_IRQHandler 226 | B DMA1_Channel4_5_IRQHandler 227 | 228 | PUBWEAK DMA1_Channel6_7_IRQHandler 229 | SECTION .text:CODE:NOROOT:REORDER(1) 230 | DMA1_Channel6_7_IRQHandler 231 | B DMA1_Channel6_7_IRQHandler 232 | 233 | PUBWEAK ADC1_CMP_IRQHandler 234 | SECTION .text:CODE:NOROOT:REORDER(1) 235 | ADC1_CMP_IRQHandler 236 | B ADC1_CMP_IRQHandler 237 | 238 | 239 | PUBWEAK TIM1_BRK_UP_TRG_COM_IRQHandler 240 | SECTION .text:CODE:NOROOT:REORDER(1) 241 | TIM1_BRK_UP_TRG_COM_IRQHandler 242 | B TIM1_BRK_UP_TRG_COM_IRQHandler 243 | 244 | 245 | PUBWEAK TIM1_CC_IRQHandler 246 | SECTION .text:CODE:NOROOT:REORDER(1) 247 | TIM1_CC_IRQHandler 248 | B TIM1_CC_IRQHandler 249 | 250 | 251 | PUBWEAK TIM2_IRQHandler 252 | SECTION .text:CODE:NOROOT:REORDER(1) 253 | TIM2_IRQHandler 254 | B TIM2_IRQHandler 255 | 256 | 257 | PUBWEAK TIM3_IRQHandler 258 | SECTION .text:CODE:NOROOT:REORDER(1) 259 | TIM3_IRQHandler 260 | B TIM3_IRQHandler 261 | 262 | 263 | PUBWEAK TIM6_DAC_IRQHandler 264 | SECTION .text:CODE:NOROOT:REORDER(1) 265 | TIM6_DAC_IRQHandler 266 | B TIM6_DAC_IRQHandler 267 | 268 | 269 | PUBWEAK TIM14_IRQHandler 270 | SECTION .text:CODE:NOROOT:REORDER(1) 271 | TIM14_IRQHandler 272 | B TIM14_IRQHandler 273 | 274 | 275 | PUBWEAK TIM15_IRQHandler 276 | SECTION .text:CODE:NOROOT:REORDER(1) 277 | TIM15_IRQHandler 278 | B TIM15_IRQHandler 279 | 280 | 281 | PUBWEAK TIM16_IRQHandler 282 | SECTION .text:CODE:NOROOT:REORDER(1) 283 | TIM16_IRQHandler 284 | B TIM16_IRQHandler 285 | 286 | 287 | PUBWEAK TIM17_IRQHandler 288 | SECTION .text:CODE:NOROOT:REORDER(1) 289 | TIM17_IRQHandler 290 | B TIM17_IRQHandler 291 | 292 | 293 | PUBWEAK I2C1_EV_IRQHandler 294 | SECTION .text:CODE:NOROOT:REORDER(1) 295 | I2C1_EV_IRQHandler 296 | B I2C1_EV_IRQHandler 297 | 298 | 299 | PUBWEAK I2C2_EV_IRQHandler 300 | SECTION .text:CODE:NOROOT:REORDER(1) 301 | I2C2_EV_IRQHandler 302 | B I2C2_EV_IRQHandler 303 | 304 | PUBWEAK SPI1_IRQHandler 305 | SECTION .text:CODE:NOROOT:REORDER(1) 306 | SPI1_IRQHandler 307 | B SPI1_IRQHandler 308 | 309 | 310 | PUBWEAK SPI2_IRQHandler 311 | SECTION .text:CODE:NOROOT:REORDER(1) 312 | SPI2_IRQHandler 313 | B SPI2_IRQHandler 314 | 315 | 316 | PUBWEAK USART1_IRQHandler 317 | SECTION .text:CODE:NOROOT:REORDER(1) 318 | USART1_IRQHandler 319 | B USART1_IRQHandler 320 | 321 | 322 | PUBWEAK USART2_IRQHandler 323 | SECTION .text:CODE:NOROOT:REORDER(1) 324 | USART2_IRQHandler 325 | B USART2_IRQHandler 326 | 327 | 328 | PUBWEAK CEC_IRQHandler 329 | SECTION .text:CODE:NOROOT:REORDER(1) 330 | CEC_IRQHandler 331 | B CEC_IRQHandler 332 | 333 | PUBWEAK I2C1_ER_IRQHandler 334 | SECTION .text:CODE:NOROOT:REORDER(1) 335 | I2C1_ER_IRQHandler 336 | B I2C1_ER_IRQHandler 337 | 338 | PUBWEAK I2C2_ER_IRQHandler 339 | SECTION .text:CODE:NOROOT:REORDER(1) 340 | I2C2_ER_IRQHandler 341 | B I2C2_ER_IRQHandler 342 | 343 | PUBWEAK I2C3_EV_IRQHandler 344 | SECTION .text:CODE:NOROOT:REORDER(1) 345 | I2C3_EV_IRQHandler 346 | B I2C3_EV_IRQHandler 347 | 348 | PUBWEAK I2C3_ER_IRQHandler 349 | SECTION .text:CODE:NOROOT:REORDER(1) 350 | I2C3_ER_IRQHandler 351 | B I2C3_ER_IRQHandler 352 | 353 | PUBWEAK SPI3_IRQHandler 354 | SECTION .text:CODE:NOROOT:REORDER(1) 355 | SPI3_IRQHandler 356 | B SPI3_IRQHandler 357 | 358 | PUBWEAK USBWakeUp_IRQHandler 359 | SECTION .text:CODE:NOROOT:REORDER(1) 360 | USBWakeUp_IRQHandler 361 | B USBWakeUp_IRQHandler 362 | 363 | PUBWEAK USB_HP_IRQHandler 364 | SECTION .text:CODE:NOROOT:REORDER(1) 365 | USB_HP_IRQHandler 366 | B USB_HP_IRQHandler 367 | 368 | PUBWEAK USB_LP_IRQHandler 369 | SECTION .text:CODE:NOROOT:REORDER(1) 370 | USB_LP_IRQHandler 371 | B USB_LP_IRQHandler 372 | 373 | END 374 | 375 | -------------------------------------------------------------------------------- /halo.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************** 2 | * halo -- Open HAL for embedded systems * 3 | * * 4 | * MIT License: * 5 | * Copyright (c) 2017 SimonQian * 6 | * * 7 | * Permission is hereby granted, free of charge, to any person obtaining a * 8 | * copy of this software and associated documentation files (the * 9 | * "Software"), to deal in the Software without restriction, including * 10 | * without limitation the rights to use, copy, modify, merge, publish, * 11 | * distribute, distribute with modifications, sublicense, and/or sell * 12 | * copies of the Software, and to permit persons to whom the Software is * 13 | * furnished to do so, subject to the following conditions: * 14 | * * 15 | * The above copyright notice and this permission notice shall be included * 16 | * in all copies or substantial portions of the Software. * 17 | * * 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * 19 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * 20 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. * 21 | * IN NO EVENT SHALL THE ABOVE COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, * 22 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR * 23 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR * 24 | * THE USE OR OTHER DEALINGS IN THE SOFTWARE. * 25 | * * 26 | ****************************************************************************/ 27 | 28 | #ifndef __HALO_H_INCLUDED__ 29 | #define __HALO_H_INCLUDED__ 30 | 31 | #include "compiler.h" 32 | #include "halo_const.h" 33 | #include "halo_basetype.h" 34 | 35 | #include "halo_type.h" 36 | #include "halo_cfg.h" 37 | 38 | // fundation 39 | #include "fundation/bittool/bittool.h" 40 | #include "fundation/buffer/buffer.h" 41 | #include "fundation/list/list.h" 42 | #include "fundation/stream/stream.h" 43 | 44 | // hal lv0 api 45 | // core 46 | halo_err_t halo_core_init(struct halo_sysinfo_t *info); 47 | halo_err_t halo_core_fini(void); 48 | halo_err_t halo_core_reset(void); 49 | halo_err_t halo_core_sleep(enum halo_sleep_mode_t mode); 50 | // uid 51 | uint32_t halo_uid_get(uint8_t *buffer, uint32_t size); 52 | // pendsv 53 | halo_err_t halo_pendsv_config(void (*on_pendsv)(void *), void *param); 54 | halo_err_t halo_pendsv_trigger(void); 55 | // tickclk 56 | halo_err_t halo_tickclk_init(void); 57 | halo_err_t halo_tickclk_fini(void); 58 | halo_err_t halo_tickclk_start(void); 59 | halo_err_t halo_tickclk_stop(void); 60 | halo_err_t halo_tickclk_config_cb(void (*callback)(void*), void *param); 61 | void halo_tickclk_poll(); 62 | // gpio 63 | halo_err_t halo_gpio_init(uint8_t index); 64 | halo_err_t halo_gpio_fini(uint8_t index); 65 | halo_err_t halo_gpio_config_pin(uint8_t index, uint8_t pin_idx, enum halo_gpio_mode_t mode); 66 | halo_err_t halo_gpio_config(uint8_t index, uint32_t pin_mask, uint32_t io, uint32_t pull_en_mask, uint32_t input_pull_mask); 67 | halo_err_t halo_gpio_in(uint8_t index, uint32_t pin_mask, uint32_t *value); 68 | halo_err_t halo_gpio_out(uint8_t index, uint32_t pin_mask, uint32_t value); 69 | halo_err_t halo_gpio_set(uint8_t index, uint32_t pin_mask); 70 | halo_err_t halo_gpio_clear(uint8_t index, uint32_t pin_mask); 71 | uint32_t halo_gpio_get(uint8_t index, uint32_t pin_mask); 72 | // spi 73 | 74 | #endif // __HALO_H_INCLUDED__ 75 | -------------------------------------------------------------------------------- /readme.md: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/versaloon/halo/43c2f32877164bf1db7608b51b73b27f67cb74ba/readme.md --------------------------------------------------------------------------------