├── .gitattributes
├── .gitignore
├── CORE
├── core_cm4.h
├── core_cm4_simd.h
├── core_cmFunc.h
├── core_cmInstr.h
└── startup_stm32f40_41xxx.s
├── FWLIB
├── inc
│ ├── misc.h
│ ├── stm32f4xx_adc.h
│ ├── stm32f4xx_can.h
│ ├── stm32f4xx_crc.h
│ ├── stm32f4xx_cryp.h
│ ├── stm32f4xx_dac.h
│ ├── stm32f4xx_dbgmcu.h
│ ├── stm32f4xx_dcmi.h
│ ├── stm32f4xx_dma.h
│ ├── stm32f4xx_dma2d.h
│ ├── stm32f4xx_exti.h
│ ├── stm32f4xx_flash.h
│ ├── stm32f4xx_flash_ramfunc.h
│ ├── stm32f4xx_fmc.h
│ ├── stm32f4xx_fsmc.h
│ ├── stm32f4xx_gpio.h
│ ├── stm32f4xx_hash.h
│ ├── stm32f4xx_i2c.h
│ ├── stm32f4xx_iwdg.h
│ ├── stm32f4xx_ltdc.h
│ ├── stm32f4xx_pwr.h
│ ├── stm32f4xx_rcc.h
│ ├── stm32f4xx_rng.h
│ ├── stm32f4xx_rtc.h
│ ├── stm32f4xx_sai.h
│ ├── stm32f4xx_sdio.h
│ ├── stm32f4xx_spi.h
│ ├── stm32f4xx_syscfg.h
│ ├── stm32f4xx_tim.h
│ ├── stm32f4xx_usart.h
│ └── stm32f4xx_wwdg.h
└── src
│ ├── misc.c
│ ├── stm32f4xx_adc.c
│ ├── stm32f4xx_can.c
│ ├── stm32f4xx_crc.c
│ ├── stm32f4xx_cryp.c
│ ├── stm32f4xx_cryp_aes.c
│ ├── stm32f4xx_cryp_des.c
│ ├── stm32f4xx_cryp_tdes.c
│ ├── stm32f4xx_dac.c
│ ├── stm32f4xx_dbgmcu.c
│ ├── stm32f4xx_dcmi.c
│ ├── stm32f4xx_dma.c
│ ├── stm32f4xx_dma2d.c
│ ├── stm32f4xx_exti.c
│ ├── stm32f4xx_flash.c
│ ├── stm32f4xx_flash_ramfunc.c
│ ├── stm32f4xx_fmc.c
│ ├── stm32f4xx_fsmc.c
│ ├── stm32f4xx_gpio.c
│ ├── stm32f4xx_hash.c
│ ├── stm32f4xx_hash_md5.c
│ ├── stm32f4xx_hash_sha1.c
│ ├── stm32f4xx_i2c.c
│ ├── stm32f4xx_iwdg.c
│ ├── stm32f4xx_ltdc.c
│ ├── stm32f4xx_pwr.c
│ ├── stm32f4xx_rcc.c
│ ├── stm32f4xx_rng.c
│ ├── stm32f4xx_rtc.c
│ ├── stm32f4xx_sai.c
│ ├── stm32f4xx_sdio.c
│ ├── stm32f4xx_spi.c
│ ├── stm32f4xx_syscfg.c
│ ├── stm32f4xx_tim.c
│ ├── stm32f4xx_usart.c
│ └── stm32f4xx_wwdg.c
├── HardWareDriver
├── HMC5883L
│ ├── HMC5883L.c
│ └── HMC5883L.h
├── IMU
│ ├── IMU.c
│ └── IMU.h
├── MPU6050
│ ├── MPU6050.c
│ └── MPU6050.h
├── Math
│ ├── Fmath.c
│ └── Fmath.h
└── Service
│ ├── IOI2C.c
│ ├── IOI2C.h
│ ├── common.h
│ ├── report.c
│ └── report.h
├── LICENSE
├── OBJ
└── .gitignore
├── README.md
├── SYSTEM
├── delay
│ ├── delay.c
│ └── delay.h
├── sys
│ ├── sys.c
│ └── sys.h
└── usart
│ ├── usart.c
│ └── usart.h
├── SchematicDiagram
├── pcb.png
├── pcb2.png
└── schematicDiagram.pdf
├── USER
├── .gitignore
├── Attitude.uvoptx
├── Attitude.uvprojx
├── JLinkSettings.ini
├── main.c
├── stm32f4xx.h
├── stm32f4xx_conf.h
├── stm32f4xx_it.c
├── stm32f4xx_it.h
├── system_stm32f4xx.c
└── system_stm32f4xx.h
└── keilkilll.bat
/.gitattributes:
--------------------------------------------------------------------------------
1 | # Auto detect text files and perform LF normalization
2 | * text=auto
3 |
4 | # Custom for Visual Studio
5 | *.cs diff=csharp
6 |
7 | # Standard to msysgit
8 | *.doc diff=astextplain
9 | *.DOC diff=astextplain
10 | *.docx diff=astextplain
11 | *.DOCX diff=astextplain
12 | *.dot diff=astextplain
13 | *.DOT diff=astextplain
14 | *.pdf diff=astextplain
15 | *.PDF diff=astextplain
16 | *.rtf diff=astextplain
17 | *.RTF diff=astextplain
18 |
--------------------------------------------------------------------------------
/.gitignore:
--------------------------------------------------------------------------------
1 | # Object files
2 | *.o
3 | *.ko
4 | *.obj
5 | *.elf
6 |
7 | # Precompiled Headers
8 | *.gch
9 | *.pch
10 |
11 | # Libraries
12 | *.lib
13 | *.a
14 | *.la
15 | *.lo
16 |
17 | # Shared objects (inc. Windows DLLs)
18 | *.dll
19 | *.so
20 | *.so.*
21 | *.dylib
22 |
23 | # Executables
24 | *.exe
25 | *.out
26 | *.app
27 | *.i*86
28 | *.x86_64
29 | *.hex
30 |
31 | # Debug files
32 | *.dSYM/
33 | *.su
34 |
35 | /List/*
36 | /Output/*
37 | JLink*
38 | *.bak
39 | *.dep
40 | *.cris
41 | *.uvopt
42 | !.gitignore
43 | *.htm
44 | OBJ/*
45 | OBJ/*.htm
46 |
47 |
--------------------------------------------------------------------------------
/FWLIB/inc/misc.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file misc.h
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file contains all the functions prototypes for the miscellaneous
8 | * firmware library functions (add-on to CMSIS functions).
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2014 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __MISC_H
31 | #define __MISC_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f4xx.h"
39 |
40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup MISC
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 |
50 | /**
51 | * @brief NVIC Init Structure definition
52 | */
53 |
54 | typedef struct
55 | {
56 | uint8_t NVIC_IRQChannel; /*!< Specifies the IRQ channel to be enabled or disabled.
57 | This parameter can be an enumerator of @ref IRQn_Type
58 | enumeration (For the complete STM32 Devices IRQ Channels
59 | list, please refer to stm32f4xx.h file) */
60 |
61 | uint8_t NVIC_IRQChannelPreemptionPriority; /*!< Specifies the pre-emption priority for the IRQ channel
62 | specified in NVIC_IRQChannel. This parameter can be a value
63 | between 0 and 15 as described in the table @ref MISC_NVIC_Priority_Table
64 | A lower priority value indicates a higher priority */
65 |
66 | uint8_t NVIC_IRQChannelSubPriority; /*!< Specifies the subpriority level for the IRQ channel specified
67 | in NVIC_IRQChannel. This parameter can be a value
68 | between 0 and 15 as described in the table @ref MISC_NVIC_Priority_Table
69 | A lower priority value indicates a higher priority */
70 |
71 | FunctionalState NVIC_IRQChannelCmd; /*!< Specifies whether the IRQ channel defined in NVIC_IRQChannel
72 | will be enabled or disabled.
73 | This parameter can be set either to ENABLE or DISABLE */
74 | } NVIC_InitTypeDef;
75 |
76 | /* Exported constants --------------------------------------------------------*/
77 |
78 | /** @defgroup MISC_Exported_Constants
79 | * @{
80 | */
81 |
82 | /** @defgroup MISC_Vector_Table_Base
83 | * @{
84 | */
85 |
86 | #define NVIC_VectTab_RAM ((uint32_t)0x20000000)
87 | #define NVIC_VectTab_FLASH ((uint32_t)0x08000000)
88 | #define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == NVIC_VectTab_RAM) || \
89 | ((VECTTAB) == NVIC_VectTab_FLASH))
90 | /**
91 | * @}
92 | */
93 |
94 | /** @defgroup MISC_System_Low_Power
95 | * @{
96 | */
97 |
98 | #define NVIC_LP_SEVONPEND ((uint8_t)0x10)
99 | #define NVIC_LP_SLEEPDEEP ((uint8_t)0x04)
100 | #define NVIC_LP_SLEEPONEXIT ((uint8_t)0x02)
101 | #define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \
102 | ((LP) == NVIC_LP_SLEEPDEEP) || \
103 | ((LP) == NVIC_LP_SLEEPONEXIT))
104 | /**
105 | * @}
106 | */
107 |
108 | /** @defgroup MISC_Preemption_Priority_Group
109 | * @{
110 | */
111 |
112 | #define NVIC_PriorityGroup_0 ((uint32_t)0x700) /*!< 0 bits for pre-emption priority
113 | 4 bits for subpriority */
114 | #define NVIC_PriorityGroup_1 ((uint32_t)0x600) /*!< 1 bits for pre-emption priority
115 | 3 bits for subpriority */
116 | #define NVIC_PriorityGroup_2 ((uint32_t)0x500) /*!< 2 bits for pre-emption priority
117 | 2 bits for subpriority */
118 | #define NVIC_PriorityGroup_3 ((uint32_t)0x400) /*!< 3 bits for pre-emption priority
119 | 1 bits for subpriority */
120 | #define NVIC_PriorityGroup_4 ((uint32_t)0x300) /*!< 4 bits for pre-emption priority
121 | 0 bits for subpriority */
122 |
123 | #define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PriorityGroup_0) || \
124 | ((GROUP) == NVIC_PriorityGroup_1) || \
125 | ((GROUP) == NVIC_PriorityGroup_2) || \
126 | ((GROUP) == NVIC_PriorityGroup_3) || \
127 | ((GROUP) == NVIC_PriorityGroup_4))
128 |
129 | #define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
130 |
131 | #define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
132 |
133 | #define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF)
134 |
135 | /**
136 | * @}
137 | */
138 |
139 | /** @defgroup MISC_SysTick_clock_source
140 | * @{
141 | */
142 |
143 | #define SysTick_CLKSource_HCLK_Div8 ((uint32_t)0xFFFFFFFB)
144 | #define SysTick_CLKSource_HCLK ((uint32_t)0x00000004)
145 | #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \
146 | ((SOURCE) == SysTick_CLKSource_HCLK_Div8))
147 | /**
148 | * @}
149 | */
150 |
151 | /**
152 | * @}
153 | */
154 |
155 | /* Exported macro ------------------------------------------------------------*/
156 | /* Exported functions --------------------------------------------------------*/
157 |
158 | void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup);
159 | void NVIC_Init(NVIC_InitTypeDef *NVIC_InitStruct);
160 | void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset);
161 | void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState);
162 | void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource);
163 |
164 | #ifdef __cplusplus
165 | }
166 | #endif
167 |
168 | #endif /* __MISC_H */
169 |
170 | /**
171 | * @}
172 | */
173 |
174 | /**
175 | * @}
176 | */
177 |
178 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
179 |
--------------------------------------------------------------------------------
/FWLIB/inc/stm32f4xx_crc.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_crc.h
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file contains all the functions prototypes for the CRC firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2014 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F4xx_CRC_H
31 | #define __STM32F4xx_CRC_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f4xx.h"
39 |
40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup CRC
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 | /* Exported constants --------------------------------------------------------*/
50 |
51 | /** @defgroup CRC_Exported_Constants
52 | * @{
53 | */
54 |
55 | /**
56 | * @}
57 | */
58 |
59 | /* Exported macro ------------------------------------------------------------*/
60 | /* Exported functions --------------------------------------------------------*/
61 |
62 | void CRC_ResetDR(void);
63 | uint32_t CRC_CalcCRC(uint32_t Data);
64 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength);
65 | uint32_t CRC_GetCRC(void);
66 | void CRC_SetIDRegister(uint8_t IDValue);
67 | uint8_t CRC_GetIDRegister(void);
68 |
69 | #ifdef __cplusplus
70 | }
71 | #endif
72 |
73 | #endif /* __STM32F4xx_CRC_H */
74 |
75 | /**
76 | * @}
77 | */
78 |
79 | /**
80 | * @}
81 | */
82 |
83 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
84 |
--------------------------------------------------------------------------------
/FWLIB/inc/stm32f4xx_dbgmcu.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_dbgmcu.h
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file contains all the functions prototypes for the DBGMCU firmware library.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2014 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /* Define to prevent recursive inclusion -------------------------------------*/
29 | #ifndef __STM32F4xx_DBGMCU_H
30 | #define __STM32F4xx_DBGMCU_H
31 |
32 | #ifdef __cplusplus
33 | extern "C" {
34 | #endif
35 |
36 | /* Includes ------------------------------------------------------------------*/
37 | #include "stm32f4xx.h"
38 |
39 | /** @addtogroup STM32F4xx_StdPeriph_Driver
40 | * @{
41 | */
42 |
43 | /** @addtogroup DBGMCU
44 | * @{
45 | */
46 |
47 | /* Exported types ------------------------------------------------------------*/
48 | /* Exported constants --------------------------------------------------------*/
49 |
50 | /** @defgroup DBGMCU_Exported_Constants
51 | * @{
52 | */
53 | #define DBGMCU_SLEEP ((uint32_t)0x00000001)
54 | #define DBGMCU_STOP ((uint32_t)0x00000002)
55 | #define DBGMCU_STANDBY ((uint32_t)0x00000004)
56 | #define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFFF8) == 0x00) && ((PERIPH) != 0x00))
57 |
58 | #define DBGMCU_TIM2_STOP ((uint32_t)0x00000001)
59 | #define DBGMCU_TIM3_STOP ((uint32_t)0x00000002)
60 | #define DBGMCU_TIM4_STOP ((uint32_t)0x00000004)
61 | #define DBGMCU_TIM5_STOP ((uint32_t)0x00000008)
62 | #define DBGMCU_TIM6_STOP ((uint32_t)0x00000010)
63 | #define DBGMCU_TIM7_STOP ((uint32_t)0x00000020)
64 | #define DBGMCU_TIM12_STOP ((uint32_t)0x00000040)
65 | #define DBGMCU_TIM13_STOP ((uint32_t)0x00000080)
66 | #define DBGMCU_TIM14_STOP ((uint32_t)0x00000100)
67 | #define DBGMCU_RTC_STOP ((uint32_t)0x00000400)
68 | #define DBGMCU_WWDG_STOP ((uint32_t)0x00000800)
69 | #define DBGMCU_IWDG_STOP ((uint32_t)0x00001000)
70 | #define DBGMCU_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00200000)
71 | #define DBGMCU_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00400000)
72 | #define DBGMCU_I2C3_SMBUS_TIMEOUT ((uint32_t)0x00800000)
73 | #define DBGMCU_CAN1_STOP ((uint32_t)0x02000000)
74 | #define DBGMCU_CAN2_STOP ((uint32_t)0x04000000)
75 | #define IS_DBGMCU_APB1PERIPH(PERIPH) ((((PERIPH) & 0xF91FE200) == 0x00) && ((PERIPH) != 0x00))
76 |
77 | #define DBGMCU_TIM1_STOP ((uint32_t)0x00000001)
78 | #define DBGMCU_TIM8_STOP ((uint32_t)0x00000002)
79 | #define DBGMCU_TIM9_STOP ((uint32_t)0x00010000)
80 | #define DBGMCU_TIM10_STOP ((uint32_t)0x00020000)
81 | #define DBGMCU_TIM11_STOP ((uint32_t)0x00040000)
82 | #define IS_DBGMCU_APB2PERIPH(PERIPH) ((((PERIPH) & 0xFFF8FFFC) == 0x00) && ((PERIPH) != 0x00))
83 | /**
84 | * @}
85 | */
86 |
87 | /* Exported macro ------------------------------------------------------------*/
88 | /* Exported functions --------------------------------------------------------*/
89 | uint32_t DBGMCU_GetREVID(void);
90 | uint32_t DBGMCU_GetDEVID(void);
91 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState);
92 | void DBGMCU_APB1PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState);
93 | void DBGMCU_APB2PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState);
94 |
95 | #ifdef __cplusplus
96 | }
97 | #endif
98 |
99 | #endif /* __STM32F4xx_DBGMCU_H */
100 |
101 | /**
102 | * @}
103 | */
104 |
105 | /**
106 | * @}
107 | */
108 |
109 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
110 |
--------------------------------------------------------------------------------
/FWLIB/inc/stm32f4xx_dcmi.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_dcmi.h
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file contains all the functions prototypes for the DCMI firmware library.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2014 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /* Define to prevent recursive inclusion -------------------------------------*/
29 | #ifndef __STM32F4xx_DCMI_H
30 | #define __STM32F4xx_DCMI_H
31 |
32 | #ifdef __cplusplus
33 | extern "C" {
34 | #endif
35 |
36 | /* Includes ------------------------------------------------------------------*/
37 | #include "stm32f4xx.h"
38 |
39 | /** @addtogroup STM32F4xx_StdPeriph_Driver
40 | * @{
41 | */
42 |
43 | /** @addtogroup DCMI
44 | * @{
45 | */
46 |
47 | /* Exported types ------------------------------------------------------------*/
48 | /**
49 | * @brief DCMI Init structure definition
50 | */
51 | typedef struct
52 | {
53 | uint16_t DCMI_CaptureMode; /*!< Specifies the Capture Mode: Continuous or Snapshot.
54 | This parameter can be a value of @ref DCMI_Capture_Mode */
55 |
56 | uint16_t DCMI_SynchroMode; /*!< Specifies the Synchronization Mode: Hardware or Embedded.
57 | This parameter can be a value of @ref DCMI_Synchronization_Mode */
58 |
59 | uint16_t DCMI_PCKPolarity; /*!< Specifies the Pixel clock polarity: Falling or Rising.
60 | This parameter can be a value of @ref DCMI_PIXCK_Polarity */
61 |
62 | uint16_t DCMI_VSPolarity; /*!< Specifies the Vertical synchronization polarity: High or Low.
63 | This parameter can be a value of @ref DCMI_VSYNC_Polarity */
64 |
65 | uint16_t DCMI_HSPolarity; /*!< Specifies the Horizontal synchronization polarity: High or Low.
66 | This parameter can be a value of @ref DCMI_HSYNC_Polarity */
67 |
68 | uint16_t DCMI_CaptureRate; /*!< Specifies the frequency of frame capture: All, 1/2 or 1/4.
69 | This parameter can be a value of @ref DCMI_Capture_Rate */
70 |
71 | uint16_t DCMI_ExtendedDataMode; /*!< Specifies the data width: 8-bit, 10-bit, 12-bit or 14-bit.
72 | This parameter can be a value of @ref DCMI_Extended_Data_Mode */
73 | } DCMI_InitTypeDef;
74 |
75 | /**
76 | * @brief DCMI CROP Init structure definition
77 | */
78 | typedef struct
79 | {
80 | uint16_t DCMI_VerticalStartLine; /*!< Specifies the Vertical start line count from which the image capture
81 | will start. This parameter can be a value between 0x00 and 0x1FFF */
82 |
83 | uint16_t DCMI_HorizontalOffsetCount; /*!< Specifies the number of pixel clocks to count before starting a capture.
84 | This parameter can be a value between 0x00 and 0x3FFF */
85 |
86 | uint16_t DCMI_VerticalLineCount; /*!< Specifies the number of lines to be captured from the starting point.
87 | This parameter can be a value between 0x00 and 0x3FFF */
88 |
89 | uint16_t DCMI_CaptureCount; /*!< Specifies the number of pixel clocks to be captured from the starting
90 | point on the same line.
91 | This parameter can be a value between 0x00 and 0x3FFF */
92 | } DCMI_CROPInitTypeDef;
93 |
94 | /**
95 | * @brief DCMI Embedded Synchronisation CODE Init structure definition
96 | */
97 | typedef struct
98 | {
99 | uint8_t DCMI_FrameStartCode; /*!< Specifies the code of the frame start delimiter. */
100 | uint8_t DCMI_LineStartCode; /*!< Specifies the code of the line start delimiter. */
101 | uint8_t DCMI_LineEndCode; /*!< Specifies the code of the line end delimiter. */
102 | uint8_t DCMI_FrameEndCode; /*!< Specifies the code of the frame end delimiter. */
103 | } DCMI_CodesInitTypeDef;
104 |
105 | /* Exported constants --------------------------------------------------------*/
106 |
107 | /** @defgroup DCMI_Exported_Constants
108 | * @{
109 | */
110 |
111 | /** @defgroup DCMI_Capture_Mode
112 | * @{
113 | */
114 | #define DCMI_CaptureMode_Continuous ((uint16_t)0x0000) /*!< The received data are transferred continuously
115 | into the destination memory through the DMA */
116 | #define DCMI_CaptureMode_SnapShot ((uint16_t)0x0002) /*!< Once activated, the interface waits for the start of
117 | frame and then transfers a single frame through the DMA */
118 | #define IS_DCMI_CAPTURE_MODE(MODE)(((MODE) == DCMI_CaptureMode_Continuous) || \
119 | ((MODE) == DCMI_CaptureMode_SnapShot))
120 | /**
121 | * @}
122 | */
123 |
124 |
125 | /** @defgroup DCMI_Synchronization_Mode
126 | * @{
127 | */
128 | #define DCMI_SynchroMode_Hardware ((uint16_t)0x0000) /*!< Hardware synchronization data capture (frame/line start/stop)
129 | is synchronized with the HSYNC/VSYNC signals */
130 | #define DCMI_SynchroMode_Embedded ((uint16_t)0x0010) /*!< Embedded synchronization data capture is synchronized with
131 | synchronization codes embedded in the data flow */
132 | #define IS_DCMI_SYNCHRO(MODE)(((MODE) == DCMI_SynchroMode_Hardware) || \
133 | ((MODE) == DCMI_SynchroMode_Embedded))
134 | /**
135 | * @}
136 | */
137 |
138 |
139 | /** @defgroup DCMI_PIXCK_Polarity
140 | * @{
141 | */
142 | #define DCMI_PCKPolarity_Falling ((uint16_t)0x0000) /*!< Pixel clock active on Falling edge */
143 | #define DCMI_PCKPolarity_Rising ((uint16_t)0x0020) /*!< Pixel clock active on Rising edge */
144 | #define IS_DCMI_PCKPOLARITY(POLARITY)(((POLARITY) == DCMI_PCKPolarity_Falling) || \
145 | ((POLARITY) == DCMI_PCKPolarity_Rising))
146 | /**
147 | * @}
148 | */
149 |
150 |
151 | /** @defgroup DCMI_VSYNC_Polarity
152 | * @{
153 | */
154 | #define DCMI_VSPolarity_Low ((uint16_t)0x0000) /*!< Vertical synchronization active Low */
155 | #define DCMI_VSPolarity_High ((uint16_t)0x0080) /*!< Vertical synchronization active High */
156 | #define IS_DCMI_VSPOLARITY(POLARITY)(((POLARITY) == DCMI_VSPolarity_Low) || \
157 | ((POLARITY) == DCMI_VSPolarity_High))
158 | /**
159 | * @}
160 | */
161 |
162 |
163 | /** @defgroup DCMI_HSYNC_Polarity
164 | * @{
165 | */
166 | #define DCMI_HSPolarity_Low ((uint16_t)0x0000) /*!< Horizontal synchronization active Low */
167 | #define DCMI_HSPolarity_High ((uint16_t)0x0040) /*!< Horizontal synchronization active High */
168 | #define IS_DCMI_HSPOLARITY(POLARITY)(((POLARITY) == DCMI_HSPolarity_Low) || \
169 | ((POLARITY) == DCMI_HSPolarity_High))
170 | /**
171 | * @}
172 | */
173 |
174 |
175 | /** @defgroup DCMI_Capture_Rate
176 | * @{
177 | */
178 | #define DCMI_CaptureRate_All_Frame ((uint16_t)0x0000) /*!< All frames are captured */
179 | #define DCMI_CaptureRate_1of2_Frame ((uint16_t)0x0100) /*!< Every alternate frame captured */
180 | #define DCMI_CaptureRate_1of4_Frame ((uint16_t)0x0200) /*!< One frame in 4 frames captured */
181 | #define IS_DCMI_CAPTURE_RATE(RATE) (((RATE) == DCMI_CaptureRate_All_Frame) || \
182 | ((RATE) == DCMI_CaptureRate_1of2_Frame) ||\
183 | ((RATE) == DCMI_CaptureRate_1of4_Frame))
184 | /**
185 | * @}
186 | */
187 |
188 |
189 | /** @defgroup DCMI_Extended_Data_Mode
190 | * @{
191 | */
192 | #define DCMI_ExtendedDataMode_8b ((uint16_t)0x0000) /*!< Interface captures 8-bit data on every pixel clock */
193 | #define DCMI_ExtendedDataMode_10b ((uint16_t)0x0400) /*!< Interface captures 10-bit data on every pixel clock */
194 | #define DCMI_ExtendedDataMode_12b ((uint16_t)0x0800) /*!< Interface captures 12-bit data on every pixel clock */
195 | #define DCMI_ExtendedDataMode_14b ((uint16_t)0x0C00) /*!< Interface captures 14-bit data on every pixel clock */
196 | #define IS_DCMI_EXTENDED_DATA(DATA)(((DATA) == DCMI_ExtendedDataMode_8b) || \
197 | ((DATA) == DCMI_ExtendedDataMode_10b) ||\
198 | ((DATA) == DCMI_ExtendedDataMode_12b) ||\
199 | ((DATA) == DCMI_ExtendedDataMode_14b))
200 | /**
201 | * @}
202 | */
203 |
204 |
205 | /** @defgroup DCMI_interrupt_sources
206 | * @{
207 | */
208 | #define DCMI_IT_FRAME ((uint16_t)0x0001)
209 | #define DCMI_IT_OVF ((uint16_t)0x0002)
210 | #define DCMI_IT_ERR ((uint16_t)0x0004)
211 | #define DCMI_IT_VSYNC ((uint16_t)0x0008)
212 | #define DCMI_IT_LINE ((uint16_t)0x0010)
213 | #define IS_DCMI_CONFIG_IT(IT) ((((IT) & (uint16_t)0xFFE0) == 0x0000) && ((IT) != 0x0000))
214 | #define IS_DCMI_GET_IT(IT) (((IT) == DCMI_IT_FRAME) || \
215 | ((IT) == DCMI_IT_OVF) || \
216 | ((IT) == DCMI_IT_ERR) || \
217 | ((IT) == DCMI_IT_VSYNC) || \
218 | ((IT) == DCMI_IT_LINE))
219 | /**
220 | * @}
221 | */
222 |
223 |
224 | /** @defgroup DCMI_Flags
225 | * @{
226 | */
227 | /**
228 | * @brief DCMI SR register
229 | */
230 | #define DCMI_FLAG_HSYNC ((uint16_t)0x2001)
231 | #define DCMI_FLAG_VSYNC ((uint16_t)0x2002)
232 | #define DCMI_FLAG_FNE ((uint16_t)0x2004)
233 | /**
234 | * @brief DCMI RISR register
235 | */
236 | #define DCMI_FLAG_FRAMERI ((uint16_t)0x0001)
237 | #define DCMI_FLAG_OVFRI ((uint16_t)0x0002)
238 | #define DCMI_FLAG_ERRRI ((uint16_t)0x0004)
239 | #define DCMI_FLAG_VSYNCRI ((uint16_t)0x0008)
240 | #define DCMI_FLAG_LINERI ((uint16_t)0x0010)
241 | /**
242 | * @brief DCMI MISR register
243 | */
244 | #define DCMI_FLAG_FRAMEMI ((uint16_t)0x1001)
245 | #define DCMI_FLAG_OVFMI ((uint16_t)0x1002)
246 | #define DCMI_FLAG_ERRMI ((uint16_t)0x1004)
247 | #define DCMI_FLAG_VSYNCMI ((uint16_t)0x1008)
248 | #define DCMI_FLAG_LINEMI ((uint16_t)0x1010)
249 | #define IS_DCMI_GET_FLAG(FLAG) (((FLAG) == DCMI_FLAG_HSYNC) || \
250 | ((FLAG) == DCMI_FLAG_VSYNC) || \
251 | ((FLAG) == DCMI_FLAG_FNE) || \
252 | ((FLAG) == DCMI_FLAG_FRAMERI) || \
253 | ((FLAG) == DCMI_FLAG_OVFRI) || \
254 | ((FLAG) == DCMI_FLAG_ERRRI) || \
255 | ((FLAG) == DCMI_FLAG_VSYNCRI) || \
256 | ((FLAG) == DCMI_FLAG_LINERI) || \
257 | ((FLAG) == DCMI_FLAG_FRAMEMI) || \
258 | ((FLAG) == DCMI_FLAG_OVFMI) || \
259 | ((FLAG) == DCMI_FLAG_ERRMI) || \
260 | ((FLAG) == DCMI_FLAG_VSYNCMI) || \
261 | ((FLAG) == DCMI_FLAG_LINEMI))
262 |
263 | #define IS_DCMI_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFFE0) == 0x0000) && ((FLAG) != 0x0000))
264 | /**
265 | * @}
266 | */
267 |
268 | /**
269 | * @}
270 | */
271 |
272 | /* Exported macro ------------------------------------------------------------*/
273 | /* Exported functions --------------------------------------------------------*/
274 |
275 | /* Function used to set the DCMI configuration to the default reset state ****/
276 | void DCMI_DeInit(void);
277 |
278 | /* Initialization and Configuration functions *********************************/
279 | void DCMI_Init(DCMI_InitTypeDef *DCMI_InitStruct);
280 | void DCMI_StructInit(DCMI_InitTypeDef *DCMI_InitStruct);
281 | void DCMI_CROPConfig(DCMI_CROPInitTypeDef *DCMI_CROPInitStruct);
282 | void DCMI_CROPCmd(FunctionalState NewState);
283 | void DCMI_SetEmbeddedSynchroCodes(DCMI_CodesInitTypeDef *DCMI_CodesInitStruct);
284 | void DCMI_JPEGCmd(FunctionalState NewState);
285 |
286 | /* Image capture functions ****************************************************/
287 | void DCMI_Cmd(FunctionalState NewState);
288 | void DCMI_CaptureCmd(FunctionalState NewState);
289 | uint32_t DCMI_ReadData(void);
290 |
291 | /* Interrupts and flags management functions **********************************/
292 | void DCMI_ITConfig(uint16_t DCMI_IT, FunctionalState NewState);
293 | FlagStatus DCMI_GetFlagStatus(uint16_t DCMI_FLAG);
294 | void DCMI_ClearFlag(uint16_t DCMI_FLAG);
295 | ITStatus DCMI_GetITStatus(uint16_t DCMI_IT);
296 | void DCMI_ClearITPendingBit(uint16_t DCMI_IT);
297 |
298 | #ifdef __cplusplus
299 | }
300 | #endif
301 |
302 | #endif /*__STM32F4xx_DCMI_H */
303 |
304 | /**
305 | * @}
306 | */
307 |
308 | /**
309 | * @}
310 | */
311 |
312 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
313 |
--------------------------------------------------------------------------------
/FWLIB/inc/stm32f4xx_exti.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_exti.h
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file contains all the functions prototypes for the EXTI firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2014 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F4xx_EXTI_H
31 | #define __STM32F4xx_EXTI_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f4xx.h"
39 |
40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup EXTI
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 |
50 | /**
51 | * @brief EXTI mode enumeration
52 | */
53 |
54 | typedef enum
55 | {
56 | EXTI_Mode_Interrupt = 0x00,
57 | EXTI_Mode_Event = 0x04
58 | }
59 | EXTIMode_TypeDef;
60 |
61 | #define IS_EXTI_MODE(MODE) (((MODE) == EXTI_Mode_Interrupt) || ((MODE) == EXTI_Mode_Event))
62 |
63 | /**
64 | * @brief EXTI Trigger enumeration
65 | */
66 |
67 | typedef enum
68 | {
69 | EXTI_Trigger_Rising = 0x08,
70 | EXTI_Trigger_Falling = 0x0C,
71 | EXTI_Trigger_Rising_Falling = 0x10
72 | } EXTITrigger_TypeDef;
73 |
74 | #define IS_EXTI_TRIGGER(TRIGGER) (((TRIGGER) == EXTI_Trigger_Rising) || \
75 | ((TRIGGER) == EXTI_Trigger_Falling) || \
76 | ((TRIGGER) == EXTI_Trigger_Rising_Falling))
77 | /**
78 | * @brief EXTI Init Structure definition
79 | */
80 |
81 | typedef struct
82 | {
83 | uint32_t EXTI_Line; /*!< Specifies the EXTI lines to be enabled or disabled.
84 | This parameter can be any combination value of @ref EXTI_Lines */
85 |
86 | EXTIMode_TypeDef EXTI_Mode; /*!< Specifies the mode for the EXTI lines.
87 | This parameter can be a value of @ref EXTIMode_TypeDef */
88 |
89 | EXTITrigger_TypeDef EXTI_Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
90 | This parameter can be a value of @ref EXTITrigger_TypeDef */
91 |
92 | FunctionalState EXTI_LineCmd; /*!< Specifies the new state of the selected EXTI lines.
93 | This parameter can be set either to ENABLE or DISABLE */
94 | } EXTI_InitTypeDef;
95 |
96 | /* Exported constants --------------------------------------------------------*/
97 |
98 | /** @defgroup EXTI_Exported_Constants
99 | * @{
100 | */
101 |
102 | /** @defgroup EXTI_Lines
103 | * @{
104 | */
105 |
106 | #define EXTI_Line0 ((uint32_t)0x00001) /*!< External interrupt line 0 */
107 | #define EXTI_Line1 ((uint32_t)0x00002) /*!< External interrupt line 1 */
108 | #define EXTI_Line2 ((uint32_t)0x00004) /*!< External interrupt line 2 */
109 | #define EXTI_Line3 ((uint32_t)0x00008) /*!< External interrupt line 3 */
110 | #define EXTI_Line4 ((uint32_t)0x00010) /*!< External interrupt line 4 */
111 | #define EXTI_Line5 ((uint32_t)0x00020) /*!< External interrupt line 5 */
112 | #define EXTI_Line6 ((uint32_t)0x00040) /*!< External interrupt line 6 */
113 | #define EXTI_Line7 ((uint32_t)0x00080) /*!< External interrupt line 7 */
114 | #define EXTI_Line8 ((uint32_t)0x00100) /*!< External interrupt line 8 */
115 | #define EXTI_Line9 ((uint32_t)0x00200) /*!< External interrupt line 9 */
116 | #define EXTI_Line10 ((uint32_t)0x00400) /*!< External interrupt line 10 */
117 | #define EXTI_Line11 ((uint32_t)0x00800) /*!< External interrupt line 11 */
118 | #define EXTI_Line12 ((uint32_t)0x01000) /*!< External interrupt line 12 */
119 | #define EXTI_Line13 ((uint32_t)0x02000) /*!< External interrupt line 13 */
120 | #define EXTI_Line14 ((uint32_t)0x04000) /*!< External interrupt line 14 */
121 | #define EXTI_Line15 ((uint32_t)0x08000) /*!< External interrupt line 15 */
122 | #define EXTI_Line16 ((uint32_t)0x10000) /*!< External interrupt line 16 Connected to the PVD Output */
123 | #define EXTI_Line17 ((uint32_t)0x20000) /*!< External interrupt line 17 Connected to the RTC Alarm event */
124 | #define EXTI_Line18 ((uint32_t)0x40000) /*!< External interrupt line 18 Connected to the USB OTG FS Wakeup from suspend event */
125 | #define EXTI_Line19 ((uint32_t)0x80000) /*!< External interrupt line 19 Connected to the Ethernet Wakeup event */
126 | #define EXTI_Line20 ((uint32_t)0x00100000) /*!< External interrupt line 20 Connected to the USB OTG HS (configured in FS) Wakeup event */
127 | #define EXTI_Line21 ((uint32_t)0x00200000) /*!< External interrupt line 21 Connected to the RTC Tamper and Time Stamp events */
128 | #define EXTI_Line22 ((uint32_t)0x00400000) /*!< External interrupt line 22 Connected to the RTC Wakeup event */
129 |
130 | #define IS_EXTI_LINE(LINE) ((((LINE) & (uint32_t)0xFF800000) == 0x00) && ((LINE) != (uint16_t)0x00))
131 |
132 | #define IS_GET_EXTI_LINE(LINE) (((LINE) == EXTI_Line0) || ((LINE) == EXTI_Line1) || \
133 | ((LINE) == EXTI_Line2) || ((LINE) == EXTI_Line3) || \
134 | ((LINE) == EXTI_Line4) || ((LINE) == EXTI_Line5) || \
135 | ((LINE) == EXTI_Line6) || ((LINE) == EXTI_Line7) || \
136 | ((LINE) == EXTI_Line8) || ((LINE) == EXTI_Line9) || \
137 | ((LINE) == EXTI_Line10) || ((LINE) == EXTI_Line11) || \
138 | ((LINE) == EXTI_Line12) || ((LINE) == EXTI_Line13) || \
139 | ((LINE) == EXTI_Line14) || ((LINE) == EXTI_Line15) || \
140 | ((LINE) == EXTI_Line16) || ((LINE) == EXTI_Line17) || \
141 | ((LINE) == EXTI_Line18) || ((LINE) == EXTI_Line19) || \
142 | ((LINE) == EXTI_Line20) || ((LINE) == EXTI_Line21) ||\
143 | ((LINE) == EXTI_Line22))
144 |
145 | /**
146 | * @}
147 | */
148 |
149 | /**
150 | * @}
151 | */
152 |
153 | /* Exported macro ------------------------------------------------------------*/
154 | /* Exported functions --------------------------------------------------------*/
155 |
156 | /* Function used to set the EXTI configuration to the default reset state *****/
157 | void EXTI_DeInit(void);
158 |
159 | /* Initialization and Configuration functions *********************************/
160 | void EXTI_Init(EXTI_InitTypeDef *EXTI_InitStruct);
161 | void EXTI_StructInit(EXTI_InitTypeDef *EXTI_InitStruct);
162 | void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line);
163 |
164 | /* Interrupts and flags management functions **********************************/
165 | FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line);
166 | void EXTI_ClearFlag(uint32_t EXTI_Line);
167 | ITStatus EXTI_GetITStatus(uint32_t EXTI_Line);
168 | void EXTI_ClearITPendingBit(uint32_t EXTI_Line);
169 |
170 | #ifdef __cplusplus
171 | }
172 | #endif
173 |
174 | #endif /* __STM32F4xx_EXTI_H */
175 |
176 | /**
177 | * @}
178 | */
179 |
180 | /**
181 | * @}
182 | */
183 |
184 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
185 |
--------------------------------------------------------------------------------
/FWLIB/inc/stm32f4xx_flash_ramfunc.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_flash_ramfunc.h
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief Header file of FLASH RAMFUNC driver.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2014 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F4xx_FLASH_RAMFUNC_H
31 | #define __STM32F4xx_FLASH_RAMFUNC_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f4xx.h"
39 |
40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup FLASH RAMFUNC
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 | /* Private define ------------------------------------------------------------*/
50 | /**
51 | * @brief __RAM_FUNC definition
52 | */
53 | #if defined ( __CC_ARM )
54 | /* ARM Compiler
55 | ------------
56 | RAM functions are defined using the toolchain options.
57 | Functions that are executed in RAM should reside in a separate source module.
58 | Using the 'Options for File' dialog you can simply change the 'Code / Const'
59 | area of a module to a memory space in physical RAM.
60 | Available memory areas are declared in the 'Target' tab of the 'Options for Target'
61 | dialog.
62 | */
63 | #define __RAM_FUNC void
64 |
65 | #elif defined ( __ICCARM__ )
66 | /* ICCARM Compiler
67 | ---------------
68 | RAM functions are defined using a specific toolchain keyword "__ramfunc".
69 | */
70 | #define __RAM_FUNC __ramfunc void
71 |
72 | #elif defined ( __GNUC__ )
73 | /* GNU Compiler
74 | ------------
75 | RAM functions are defined using a specific toolchain attribute
76 | "__attribute__((section(".RamFunc")))".
77 | */
78 | #define __RAM_FUNC void __attribute__((section(".RamFunc")))
79 |
80 | #endif
81 | /* Exported constants --------------------------------------------------------*/
82 | /* Exported macro ------------------------------------------------------------*/
83 | /* Exported functions --------------------------------------------------------*/
84 | __RAM_FUNC FLASH_FlashInterfaceCmd(FunctionalState NewState);
85 | __RAM_FUNC FLASH_FlashSleepModeCmd(FunctionalState NewState);
86 |
87 |
88 | #ifdef __cplusplus
89 | }
90 | #endif
91 |
92 | #endif /* __STM32F4xx_FLASH_RAMFUNC_H */
93 |
94 | /**
95 | * @}
96 | */
97 |
98 | /**
99 | * @}
100 | */
101 |
102 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
103 |
104 |
--------------------------------------------------------------------------------
/FWLIB/inc/stm32f4xx_hash.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_hash.h
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file contains all the functions prototypes for the HASH
8 | * firmware library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2014 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F4xx_HASH_H
31 | #define __STM32F4xx_HASH_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f4xx.h"
39 |
40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup HASH
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 |
50 | /**
51 | * @brief HASH Init structure definition
52 | */
53 | typedef struct
54 | {
55 | uint32_t HASH_AlgoSelection; /*!< SHA-1, SHA-224, SHA-256 or MD5. This parameter
56 | can be a value of @ref HASH_Algo_Selection */
57 | uint32_t HASH_AlgoMode; /*!< HASH or HMAC. This parameter can be a value
58 | of @ref HASH_processor_Algorithm_Mode */
59 | uint32_t HASH_DataType; /*!< 32-bit data, 16-bit data, 8-bit data or
60 | bit string. This parameter can be a value of
61 | @ref HASH_Data_Type */
62 | uint32_t HASH_HMACKeyType; /*!< HMAC Short key or HMAC Long Key. This parameter
63 | can be a value of @ref HASH_HMAC_Long_key_only_for_HMAC_mode */
64 | } HASH_InitTypeDef;
65 |
66 | /**
67 | * @brief HASH message digest result structure definition
68 | */
69 | typedef struct
70 | {
71 | uint32_t Data[8]; /*!< Message digest result : 8x 32bit wors for SHA-256,
72 | 7x 32bit wors for SHA-224,
73 | 5x 32bit words for SHA-1 or
74 | 4x 32bit words for MD5 */
75 | } HASH_MsgDigest;
76 |
77 | /**
78 | * @brief HASH context swapping structure definition
79 | */
80 | typedef struct
81 | {
82 | uint32_t HASH_IMR;
83 | uint32_t HASH_STR;
84 | uint32_t HASH_CR;
85 | uint32_t HASH_CSR[54];
86 | } HASH_Context;
87 |
88 | /* Exported constants --------------------------------------------------------*/
89 |
90 | /** @defgroup HASH_Exported_Constants
91 | * @{
92 | */
93 |
94 | /** @defgroup HASH_Algo_Selection
95 | * @{
96 | */
97 | #define HASH_AlgoSelection_SHA1 ((uint32_t)0x0000) /*!< HASH function is SHA1 */
98 | #define HASH_AlgoSelection_SHA224 HASH_CR_ALGO_1 /*!< HASH function is SHA224 */
99 | #define HASH_AlgoSelection_SHA256 HASH_CR_ALGO /*!< HASH function is SHA256 */
100 | #define HASH_AlgoSelection_MD5 HASH_CR_ALGO_0 /*!< HASH function is MD5 */
101 |
102 | #define IS_HASH_ALGOSELECTION(ALGOSELECTION) (((ALGOSELECTION) == HASH_AlgoSelection_SHA1) || \
103 | ((ALGOSELECTION) == HASH_AlgoSelection_SHA224) || \
104 | ((ALGOSELECTION) == HASH_AlgoSelection_SHA256) || \
105 | ((ALGOSELECTION) == HASH_AlgoSelection_MD5))
106 | /**
107 | * @}
108 | */
109 |
110 | /** @defgroup HASH_processor_Algorithm_Mode
111 | * @{
112 | */
113 | #define HASH_AlgoMode_HASH ((uint32_t)0x00000000) /*!< Algorithm is HASH */
114 | #define HASH_AlgoMode_HMAC HASH_CR_MODE /*!< Algorithm is HMAC */
115 |
116 | #define IS_HASH_ALGOMODE(ALGOMODE) (((ALGOMODE) == HASH_AlgoMode_HASH) || \
117 | ((ALGOMODE) == HASH_AlgoMode_HMAC))
118 | /**
119 | * @}
120 | */
121 |
122 | /** @defgroup HASH_Data_Type
123 | * @{
124 | */
125 | #define HASH_DataType_32b ((uint32_t)0x0000) /*!< 32-bit data. No swapping */
126 | #define HASH_DataType_16b HASH_CR_DATATYPE_0 /*!< 16-bit data. Each half word is swapped */
127 | #define HASH_DataType_8b HASH_CR_DATATYPE_1 /*!< 8-bit data. All bytes are swapped */
128 | #define HASH_DataType_1b HASH_CR_DATATYPE /*!< 1-bit data. In the word all bits are swapped */
129 |
130 | #define IS_HASH_DATATYPE(DATATYPE) (((DATATYPE) == HASH_DataType_32b)|| \
131 | ((DATATYPE) == HASH_DataType_16b)|| \
132 | ((DATATYPE) == HASH_DataType_8b) || \
133 | ((DATATYPE) == HASH_DataType_1b))
134 | /**
135 | * @}
136 | */
137 |
138 | /** @defgroup HASH_HMAC_Long_key_only_for_HMAC_mode
139 | * @{
140 | */
141 | #define HASH_HMACKeyType_ShortKey ((uint32_t)0x00000000) /*!< HMAC Key is <= 64 bytes */
142 | #define HASH_HMACKeyType_LongKey HASH_CR_LKEY /*!< HMAC Key is > 64 bytes */
143 |
144 | #define IS_HASH_HMAC_KEYTYPE(KEYTYPE) (((KEYTYPE) == HASH_HMACKeyType_ShortKey) || \
145 | ((KEYTYPE) == HASH_HMACKeyType_LongKey))
146 | /**
147 | * @}
148 | */
149 |
150 | /** @defgroup Number_of_valid_bits_in_last_word_of_the_message
151 | * @{
152 | */
153 | #define IS_HASH_VALIDBITSNUMBER(VALIDBITS) ((VALIDBITS) <= 0x1F)
154 |
155 | /**
156 | * @}
157 | */
158 |
159 | /** @defgroup HASH_interrupts_definition
160 | * @{
161 | */
162 | #define HASH_IT_DINI HASH_IMR_DINIM /*!< A new block can be entered into the input buffer (DIN) */
163 | #define HASH_IT_DCI HASH_IMR_DCIM /*!< Digest calculation complete */
164 |
165 | #define IS_HASH_IT(IT) ((((IT) & (uint32_t)0xFFFFFFFC) == 0x00000000) && ((IT) != 0x00000000))
166 | #define IS_HASH_GET_IT(IT) (((IT) == HASH_IT_DINI) || ((IT) == HASH_IT_DCI))
167 |
168 | /**
169 | * @}
170 | */
171 |
172 | /** @defgroup HASH_flags_definition
173 | * @{
174 | */
175 | #define HASH_FLAG_DINIS HASH_SR_DINIS /*!< 16 locations are free in the DIN : A new block can be entered into the input buffer */
176 | #define HASH_FLAG_DCIS HASH_SR_DCIS /*!< Digest calculation complete */
177 | #define HASH_FLAG_DMAS HASH_SR_DMAS /*!< DMA interface is enabled (DMAE=1) or a transfer is ongoing */
178 | #define HASH_FLAG_BUSY HASH_SR_BUSY /*!< The hash core is Busy : processing a block of data */
179 | #define HASH_FLAG_DINNE HASH_CR_DINNE /*!< DIN not empty : The input buffer contains at least one word of data */
180 |
181 | #define IS_HASH_GET_FLAG(FLAG) (((FLAG) == HASH_FLAG_DINIS) || \
182 | ((FLAG) == HASH_FLAG_DCIS) || \
183 | ((FLAG) == HASH_FLAG_DMAS) || \
184 | ((FLAG) == HASH_FLAG_BUSY) || \
185 | ((FLAG) == HASH_FLAG_DINNE))
186 |
187 | #define IS_HASH_CLEAR_FLAG(FLAG)(((FLAG) == HASH_FLAG_DINIS) || \
188 | ((FLAG) == HASH_FLAG_DCIS))
189 |
190 | /**
191 | * @}
192 | */
193 |
194 | /**
195 | * @}
196 | */
197 |
198 | /* Exported macro ------------------------------------------------------------*/
199 | /* Exported functions --------------------------------------------------------*/
200 |
201 | /* Function used to set the HASH configuration to the default reset state ****/
202 | void HASH_DeInit(void);
203 |
204 | /* HASH Configuration function ************************************************/
205 | void HASH_Init(HASH_InitTypeDef *HASH_InitStruct);
206 | void HASH_StructInit(HASH_InitTypeDef *HASH_InitStruct);
207 | void HASH_Reset(void);
208 |
209 | /* HASH Message Digest generation functions ***********************************/
210 | void HASH_DataIn(uint32_t Data);
211 | uint8_t HASH_GetInFIFOWordsNbr(void);
212 | void HASH_SetLastWordValidBitsNbr(uint16_t ValidNumber);
213 | void HASH_StartDigest(void);
214 | void HASH_AutoStartDigest(FunctionalState NewState);
215 | void HASH_GetDigest(HASH_MsgDigest *HASH_MessageDigest);
216 |
217 | /* HASH Context swapping functions ********************************************/
218 | void HASH_SaveContext(HASH_Context *HASH_ContextSave);
219 | void HASH_RestoreContext(HASH_Context *HASH_ContextRestore);
220 |
221 | /* HASH DMA interface function ************************************************/
222 | void HASH_DMACmd(FunctionalState NewState);
223 |
224 | /* HASH Interrupts and flags management functions *****************************/
225 | void HASH_ITConfig(uint32_t HASH_IT, FunctionalState NewState);
226 | FlagStatus HASH_GetFlagStatus(uint32_t HASH_FLAG);
227 | void HASH_ClearFlag(uint32_t HASH_FLAG);
228 | ITStatus HASH_GetITStatus(uint32_t HASH_IT);
229 | void HASH_ClearITPendingBit(uint32_t HASH_IT);
230 |
231 | /* High Level SHA1 functions **************************************************/
232 | ErrorStatus HASH_SHA1(uint8_t *Input, uint32_t Ilen, uint8_t Output[20]);
233 | ErrorStatus HMAC_SHA1(uint8_t *Key, uint32_t Keylen,
234 | uint8_t *Input, uint32_t Ilen,
235 | uint8_t Output[20]);
236 |
237 | /* High Level MD5 functions ***************************************************/
238 | ErrorStatus HASH_MD5(uint8_t *Input, uint32_t Ilen, uint8_t Output[16]);
239 | ErrorStatus HMAC_MD5(uint8_t *Key, uint32_t Keylen,
240 | uint8_t *Input, uint32_t Ilen,
241 | uint8_t Output[16]);
242 |
243 | #ifdef __cplusplus
244 | }
245 | #endif
246 |
247 | #endif /*__STM32F4xx_HASH_H */
248 |
249 | /**
250 | * @}
251 | */
252 |
253 | /**
254 | * @}
255 | */
256 |
257 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
258 |
--------------------------------------------------------------------------------
/FWLIB/inc/stm32f4xx_iwdg.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_iwdg.h
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file contains all the functions prototypes for the IWDG
8 | * firmware library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2014 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F4xx_IWDG_H
31 | #define __STM32F4xx_IWDG_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f4xx.h"
39 |
40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup IWDG
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 | /* Exported constants --------------------------------------------------------*/
50 |
51 | /** @defgroup IWDG_Exported_Constants
52 | * @{
53 | */
54 |
55 | /** @defgroup IWDG_WriteAccess
56 | * @{
57 | */
58 | #define IWDG_WriteAccess_Enable ((uint16_t)0x5555)
59 | #define IWDG_WriteAccess_Disable ((uint16_t)0x0000)
60 | #define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \
61 | ((ACCESS) == IWDG_WriteAccess_Disable))
62 | /**
63 | * @}
64 | */
65 |
66 | /** @defgroup IWDG_prescaler
67 | * @{
68 | */
69 | #define IWDG_Prescaler_4 ((uint8_t)0x00)
70 | #define IWDG_Prescaler_8 ((uint8_t)0x01)
71 | #define IWDG_Prescaler_16 ((uint8_t)0x02)
72 | #define IWDG_Prescaler_32 ((uint8_t)0x03)
73 | #define IWDG_Prescaler_64 ((uint8_t)0x04)
74 | #define IWDG_Prescaler_128 ((uint8_t)0x05)
75 | #define IWDG_Prescaler_256 ((uint8_t)0x06)
76 | #define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4) || \
77 | ((PRESCALER) == IWDG_Prescaler_8) || \
78 | ((PRESCALER) == IWDG_Prescaler_16) || \
79 | ((PRESCALER) == IWDG_Prescaler_32) || \
80 | ((PRESCALER) == IWDG_Prescaler_64) || \
81 | ((PRESCALER) == IWDG_Prescaler_128)|| \
82 | ((PRESCALER) == IWDG_Prescaler_256))
83 | /**
84 | * @}
85 | */
86 |
87 | /** @defgroup IWDG_Flag
88 | * @{
89 | */
90 | #define IWDG_FLAG_PVU ((uint16_t)0x0001)
91 | #define IWDG_FLAG_RVU ((uint16_t)0x0002)
92 | #define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU))
93 | #define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF)
94 | /**
95 | * @}
96 | */
97 |
98 | /**
99 | * @}
100 | */
101 |
102 | /* Exported macro ------------------------------------------------------------*/
103 | /* Exported functions --------------------------------------------------------*/
104 |
105 | /* Prescaler and Counter configuration functions ******************************/
106 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess);
107 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler);
108 | void IWDG_SetReload(uint16_t Reload);
109 | void IWDG_ReloadCounter(void);
110 |
111 | /* IWDG activation function ***************************************************/
112 | void IWDG_Enable(void);
113 |
114 | /* Flag management function ***************************************************/
115 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG);
116 |
117 | #ifdef __cplusplus
118 | }
119 | #endif
120 |
121 | #endif /* __STM32F4xx_IWDG_H */
122 |
123 | /**
124 | * @}
125 | */
126 |
127 | /**
128 | * @}
129 | */
130 |
131 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
132 |
--------------------------------------------------------------------------------
/FWLIB/inc/stm32f4xx_pwr.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_pwr.h
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file contains all the functions prototypes for the PWR firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2014 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F4xx_PWR_H
31 | #define __STM32F4xx_PWR_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f4xx.h"
39 |
40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup PWR
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 | /* Exported constants --------------------------------------------------------*/
50 |
51 | /** @defgroup PWR_Exported_Constants
52 | * @{
53 | */
54 |
55 | /** @defgroup PWR_PVD_detection_level
56 | * @{
57 | */
58 | #define PWR_PVDLevel_0 PWR_CR_PLS_LEV0
59 | #define PWR_PVDLevel_1 PWR_CR_PLS_LEV1
60 | #define PWR_PVDLevel_2 PWR_CR_PLS_LEV2
61 | #define PWR_PVDLevel_3 PWR_CR_PLS_LEV3
62 | #define PWR_PVDLevel_4 PWR_CR_PLS_LEV4
63 | #define PWR_PVDLevel_5 PWR_CR_PLS_LEV5
64 | #define PWR_PVDLevel_6 PWR_CR_PLS_LEV6
65 | #define PWR_PVDLevel_7 PWR_CR_PLS_LEV7
66 |
67 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_0) || ((LEVEL) == PWR_PVDLevel_1)|| \
68 | ((LEVEL) == PWR_PVDLevel_2) || ((LEVEL) == PWR_PVDLevel_3)|| \
69 | ((LEVEL) == PWR_PVDLevel_4) || ((LEVEL) == PWR_PVDLevel_5)|| \
70 | ((LEVEL) == PWR_PVDLevel_6) || ((LEVEL) == PWR_PVDLevel_7))
71 | /**
72 | * @}
73 | */
74 |
75 |
76 | /** @defgroup PWR_Regulator_state_in_STOP_mode
77 | * @{
78 | */
79 | #define PWR_MainRegulator_ON ((uint32_t)0x00000000)
80 | #define PWR_LowPowerRegulator_ON PWR_CR_LPDS
81 |
82 | /* --- PWR_Legacy ---*/
83 | #define PWR_Regulator_ON PWR_MainRegulator_ON
84 | #define PWR_Regulator_LowPower PWR_LowPowerRegulator_ON
85 |
86 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MainRegulator_ON) || \
87 | ((REGULATOR) == PWR_LowPowerRegulator_ON))
88 |
89 | /**
90 | * @}
91 | */
92 |
93 | /** @defgroup PWR_Regulator_state_in_UnderDrive_mode
94 | * @{
95 | */
96 | #define PWR_MainRegulator_UnderDrive_ON PWR_CR_MRUDS
97 | #define PWR_LowPowerRegulator_UnderDrive_ON ((uint32_t)(PWR_CR_LPDS | PWR_CR_LPUDS))
98 |
99 | #define IS_PWR_REGULATOR_UNDERDRIVE(REGULATOR) (((REGULATOR) == PWR_MainRegulator_UnderDrive_ON) || \
100 | ((REGULATOR) == PWR_LowPowerRegulator_UnderDrive_ON))
101 |
102 | /**
103 | * @}
104 | */
105 |
106 | /** @defgroup PWR_STOP_mode_entry
107 | * @{
108 | */
109 | #define PWR_STOPEntry_WFI ((uint8_t)0x01)
110 | #define PWR_STOPEntry_WFE ((uint8_t)0x02)
111 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE))
112 | /**
113 | * @}
114 | */
115 |
116 | /** @defgroup PWR_Regulator_Voltage_Scale
117 | * @{
118 | */
119 | #define PWR_Regulator_Voltage_Scale1 ((uint32_t)0x0000C000)
120 | #define PWR_Regulator_Voltage_Scale2 ((uint32_t)0x00008000)
121 | #define PWR_Regulator_Voltage_Scale3 ((uint32_t)0x00004000)
122 | #define IS_PWR_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_Regulator_Voltage_Scale1) || \
123 | ((VOLTAGE) == PWR_Regulator_Voltage_Scale2) || \
124 | ((VOLTAGE) == PWR_Regulator_Voltage_Scale3))
125 | /**
126 | * @}
127 | */
128 |
129 | /** @defgroup PWR_Flag
130 | * @{
131 | */
132 | #define PWR_FLAG_WU PWR_CSR_WUF
133 | #define PWR_FLAG_SB PWR_CSR_SBF
134 | #define PWR_FLAG_PVDO PWR_CSR_PVDO
135 | #define PWR_FLAG_BRR PWR_CSR_BRR
136 | #define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY
137 | #define PWR_FLAG_ODRDY PWR_CSR_ODRDY
138 | #define PWR_FLAG_ODSWRDY PWR_CSR_ODSWRDY
139 | #define PWR_FLAG_UDRDY PWR_CSR_UDSWRDY
140 |
141 | /* --- FLAG Legacy ---*/
142 | #define PWR_FLAG_REGRDY PWR_FLAG_VOSRDY
143 |
144 | #define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \
145 | ((FLAG) == PWR_FLAG_PVDO) || ((FLAG) == PWR_FLAG_BRR) || \
146 | ((FLAG) == PWR_FLAG_VOSRDY) || ((FLAG) == PWR_FLAG_ODRDY) || \
147 | ((FLAG) == PWR_FLAG_ODSWRDY) || ((FLAG) == PWR_FLAG_UDRDY))
148 |
149 |
150 | #define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \
151 | ((FLAG) == PWR_FLAG_UDRDY))
152 |
153 | /**
154 | * @}
155 | */
156 |
157 | /**
158 | * @}
159 | */
160 |
161 | /* Exported macro ------------------------------------------------------------*/
162 | /* Exported functions --------------------------------------------------------*/
163 |
164 | /* Function used to set the PWR configuration to the default reset state ******/
165 | void PWR_DeInit(void);
166 |
167 | /* Backup Domain Access function **********************************************/
168 | void PWR_BackupAccessCmd(FunctionalState NewState);
169 |
170 | /* PVD configuration functions ************************************************/
171 | void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel);
172 | void PWR_PVDCmd(FunctionalState NewState);
173 |
174 | /* WakeUp pins configuration functions ****************************************/
175 | void PWR_WakeUpPinCmd(FunctionalState NewState);
176 |
177 | /* Main and Backup Regulators configuration functions *************************/
178 | void PWR_BackupRegulatorCmd(FunctionalState NewState);
179 | void PWR_MainRegulatorModeConfig(uint32_t PWR_Regulator_Voltage);
180 | void PWR_OverDriveCmd(FunctionalState NewState);
181 | void PWR_OverDriveSWCmd(FunctionalState NewState);
182 | void PWR_UnderDriveCmd(FunctionalState NewState);
183 | void PWR_MainRegulatorLowVoltageCmd(FunctionalState NewState);
184 | void PWR_LowRegulatorLowVoltageCmd(FunctionalState NewState);
185 |
186 | /* FLASH Power Down configuration functions ***********************************/
187 | void PWR_FlashPowerDownCmd(FunctionalState NewState);
188 |
189 | /* Low Power modes configuration functions ************************************/
190 | void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry);
191 | void PWR_EnterUnderDriveSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry);
192 | void PWR_EnterSTANDBYMode(void);
193 |
194 | /* Flags management functions *************************************************/
195 | FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG);
196 | void PWR_ClearFlag(uint32_t PWR_FLAG);
197 |
198 | #ifdef __cplusplus
199 | }
200 | #endif
201 |
202 | #endif /* __STM32F4xx_PWR_H */
203 |
204 | /**
205 | * @}
206 | */
207 |
208 | /**
209 | * @}
210 | */
211 |
212 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
213 |
--------------------------------------------------------------------------------
/FWLIB/inc/stm32f4xx_rng.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_rng.h
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file contains all the functions prototypes for the Random
8 | * Number Generator(RNG) firmware library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2014 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F4xx_RNG_H
31 | #define __STM32F4xx_RNG_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f4xx.h"
39 |
40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup RNG
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 | /* Exported constants --------------------------------------------------------*/
50 |
51 | /** @defgroup RNG_Exported_Constants
52 | * @{
53 | */
54 |
55 | /** @defgroup RNG_flags_definition
56 | * @{
57 | */
58 | #define RNG_FLAG_DRDY ((uint8_t)0x0001) /*!< Data ready */
59 | #define RNG_FLAG_CECS ((uint8_t)0x0002) /*!< Clock error current status */
60 | #define RNG_FLAG_SECS ((uint8_t)0x0004) /*!< Seed error current status */
61 |
62 | #define IS_RNG_GET_FLAG(RNG_FLAG) (((RNG_FLAG) == RNG_FLAG_DRDY) || \
63 | ((RNG_FLAG) == RNG_FLAG_CECS) || \
64 | ((RNG_FLAG) == RNG_FLAG_SECS))
65 | #define IS_RNG_CLEAR_FLAG(RNG_FLAG) (((RNG_FLAG) == RNG_FLAG_CECS) || \
66 | ((RNG_FLAG) == RNG_FLAG_SECS))
67 | /**
68 | * @}
69 | */
70 |
71 | /** @defgroup RNG_interrupts_definition
72 | * @{
73 | */
74 | #define RNG_IT_CEI ((uint8_t)0x20) /*!< Clock error interrupt */
75 | #define RNG_IT_SEI ((uint8_t)0x40) /*!< Seed error interrupt */
76 |
77 | #define IS_RNG_IT(IT) ((((IT) & (uint8_t)0x9F) == 0x00) && ((IT) != 0x00))
78 | #define IS_RNG_GET_IT(RNG_IT) (((RNG_IT) == RNG_IT_CEI) || ((RNG_IT) == RNG_IT_SEI))
79 | /**
80 | * @}
81 | */
82 |
83 | /**
84 | * @}
85 | */
86 |
87 | /* Exported macro ------------------------------------------------------------*/
88 | /* Exported functions --------------------------------------------------------*/
89 |
90 | /* Function used to set the RNG configuration to the default reset state *****/
91 | void RNG_DeInit(void);
92 |
93 | /* Configuration function *****************************************************/
94 | void RNG_Cmd(FunctionalState NewState);
95 |
96 | /* Get 32 bit Random number function ******************************************/
97 | uint32_t RNG_GetRandomNumber(void);
98 |
99 | /* Interrupts and flags management functions **********************************/
100 | void RNG_ITConfig(FunctionalState NewState);
101 | FlagStatus RNG_GetFlagStatus(uint8_t RNG_FLAG);
102 | void RNG_ClearFlag(uint8_t RNG_FLAG);
103 | ITStatus RNG_GetITStatus(uint8_t RNG_IT);
104 | void RNG_ClearITPendingBit(uint8_t RNG_IT);
105 |
106 | #ifdef __cplusplus
107 | }
108 | #endif
109 |
110 | #endif /*__STM32F4xx_RNG_H */
111 |
112 | /**
113 | * @}
114 | */
115 |
116 | /**
117 | * @}
118 | */
119 |
120 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
121 |
--------------------------------------------------------------------------------
/FWLIB/inc/stm32f4xx_syscfg.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_syscfg.h
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file contains all the functions prototypes for the SYSCFG firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2014 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F4xx_SYSCFG_H
31 | #define __STM32F4xx_SYSCFG_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f4xx.h"
39 |
40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup SYSCFG
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 | /* Exported constants --------------------------------------------------------*/
50 |
51 | /** @defgroup SYSCFG_Exported_Constants
52 | * @{
53 | */
54 |
55 | /** @defgroup SYSCFG_EXTI_Port_Sources
56 | * @{
57 | */
58 | #define EXTI_PortSourceGPIOA ((uint8_t)0x00)
59 | #define EXTI_PortSourceGPIOB ((uint8_t)0x01)
60 | #define EXTI_PortSourceGPIOC ((uint8_t)0x02)
61 | #define EXTI_PortSourceGPIOD ((uint8_t)0x03)
62 | #define EXTI_PortSourceGPIOE ((uint8_t)0x04)
63 | #define EXTI_PortSourceGPIOF ((uint8_t)0x05)
64 | #define EXTI_PortSourceGPIOG ((uint8_t)0x06)
65 | #define EXTI_PortSourceGPIOH ((uint8_t)0x07)
66 | #define EXTI_PortSourceGPIOI ((uint8_t)0x08)
67 | #define EXTI_PortSourceGPIOJ ((uint8_t)0x09)
68 | #define EXTI_PortSourceGPIOK ((uint8_t)0x0A)
69 |
70 | #define IS_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == EXTI_PortSourceGPIOA) || \
71 | ((PORTSOURCE) == EXTI_PortSourceGPIOB) || \
72 | ((PORTSOURCE) == EXTI_PortSourceGPIOC) || \
73 | ((PORTSOURCE) == EXTI_PortSourceGPIOD) || \
74 | ((PORTSOURCE) == EXTI_PortSourceGPIOE) || \
75 | ((PORTSOURCE) == EXTI_PortSourceGPIOF) || \
76 | ((PORTSOURCE) == EXTI_PortSourceGPIOG) || \
77 | ((PORTSOURCE) == EXTI_PortSourceGPIOH) || \
78 | ((PORTSOURCE) == EXTI_PortSourceGPIOI) || \
79 | ((PORTSOURCE) == EXTI_PortSourceGPIOJ) || \
80 | ((PORTSOURCE) == EXTI_PortSourceGPIOK))
81 |
82 | /**
83 | * @}
84 | */
85 |
86 |
87 | /** @defgroup SYSCFG_EXTI_Pin_Sources
88 | * @{
89 | */
90 | #define EXTI_PinSource0 ((uint8_t)0x00)
91 | #define EXTI_PinSource1 ((uint8_t)0x01)
92 | #define EXTI_PinSource2 ((uint8_t)0x02)
93 | #define EXTI_PinSource3 ((uint8_t)0x03)
94 | #define EXTI_PinSource4 ((uint8_t)0x04)
95 | #define EXTI_PinSource5 ((uint8_t)0x05)
96 | #define EXTI_PinSource6 ((uint8_t)0x06)
97 | #define EXTI_PinSource7 ((uint8_t)0x07)
98 | #define EXTI_PinSource8 ((uint8_t)0x08)
99 | #define EXTI_PinSource9 ((uint8_t)0x09)
100 | #define EXTI_PinSource10 ((uint8_t)0x0A)
101 | #define EXTI_PinSource11 ((uint8_t)0x0B)
102 | #define EXTI_PinSource12 ((uint8_t)0x0C)
103 | #define EXTI_PinSource13 ((uint8_t)0x0D)
104 | #define EXTI_PinSource14 ((uint8_t)0x0E)
105 | #define EXTI_PinSource15 ((uint8_t)0x0F)
106 | #define IS_EXTI_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == EXTI_PinSource0) || \
107 | ((PINSOURCE) == EXTI_PinSource1) || \
108 | ((PINSOURCE) == EXTI_PinSource2) || \
109 | ((PINSOURCE) == EXTI_PinSource3) || \
110 | ((PINSOURCE) == EXTI_PinSource4) || \
111 | ((PINSOURCE) == EXTI_PinSource5) || \
112 | ((PINSOURCE) == EXTI_PinSource6) || \
113 | ((PINSOURCE) == EXTI_PinSource7) || \
114 | ((PINSOURCE) == EXTI_PinSource8) || \
115 | ((PINSOURCE) == EXTI_PinSource9) || \
116 | ((PINSOURCE) == EXTI_PinSource10) || \
117 | ((PINSOURCE) == EXTI_PinSource11) || \
118 | ((PINSOURCE) == EXTI_PinSource12) || \
119 | ((PINSOURCE) == EXTI_PinSource13) || \
120 | ((PINSOURCE) == EXTI_PinSource14) || \
121 | ((PINSOURCE) == EXTI_PinSource15))
122 | /**
123 | * @}
124 | */
125 |
126 |
127 | /** @defgroup SYSCFG_Memory_Remap_Config
128 | * @{
129 | */
130 | #define SYSCFG_MemoryRemap_Flash ((uint8_t)0x00)
131 | #define SYSCFG_MemoryRemap_SystemFlash ((uint8_t)0x01)
132 | #define SYSCFG_MemoryRemap_SRAM ((uint8_t)0x03)
133 | #define SYSCFG_MemoryRemap_SDRAM ((uint8_t)0x04)
134 |
135 | #if defined (STM32F40_41xxx)
136 | #define SYSCFG_MemoryRemap_FSMC ((uint8_t)0x02)
137 | #endif /* STM32F40_41xxx */
138 |
139 | #if defined (STM32F427_437xx) || defined (STM32F429_439xx)
140 | #define SYSCFG_MemoryRemap_FMC ((uint8_t)0x02)
141 | #endif /* STM32F427_437xx || STM32F429_439xx */
142 |
143 | #if defined (STM32F40_41xxx)
144 | #define IS_SYSCFG_MEMORY_REMAP_CONFING(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash) || \
145 | ((REMAP) == SYSCFG_MemoryRemap_SystemFlash) || \
146 | ((REMAP) == SYSCFG_MemoryRemap_SRAM) || \
147 | ((REMAP) == SYSCFG_MemoryRemap_FSMC))
148 | #endif /* STM32F40_41xxx */
149 |
150 | #if defined (STM32F401xx) || defined (STM32F411xE)
151 | #define IS_SYSCFG_MEMORY_REMAP_CONFING(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash) || \
152 | ((REMAP) == SYSCFG_MemoryRemap_SystemFlash) || \
153 | ((REMAP) == SYSCFG_MemoryRemap_SRAM))
154 | #endif /* STM32F401xx || STM32F411xE */
155 |
156 | #if defined (STM32F427_437xx) || defined (STM32F429_439xx)
157 | #define IS_SYSCFG_MEMORY_REMAP_CONFING(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash) || \
158 | ((REMAP) == SYSCFG_MemoryRemap_SystemFlash) || \
159 | ((REMAP) == SYSCFG_MemoryRemap_SRAM) || \
160 | ((REMAP) == SYSCFG_MemoryRemap_SDRAM) || \
161 | ((REMAP) == SYSCFG_MemoryRemap_FMC))
162 | #endif /* STM32F427_437xx || STM32F429_439xx */
163 |
164 | /**
165 | * @}
166 | */
167 |
168 |
169 | /** @defgroup SYSCFG_ETHERNET_Media_Interface
170 | * @{
171 | */
172 | #define SYSCFG_ETH_MediaInterface_MII ((uint32_t)0x00000000)
173 | #define SYSCFG_ETH_MediaInterface_RMII ((uint32_t)0x00000001)
174 |
175 | #define IS_SYSCFG_ETH_MEDIA_INTERFACE(INTERFACE) (((INTERFACE) == SYSCFG_ETH_MediaInterface_MII) || \
176 | ((INTERFACE) == SYSCFG_ETH_MediaInterface_RMII))
177 | /**
178 | * @}
179 | */
180 |
181 | /**
182 | * @}
183 | */
184 |
185 | /* Exported macro ------------------------------------------------------------*/
186 | /* Exported functions --------------------------------------------------------*/
187 |
188 | void SYSCFG_DeInit(void);
189 | void SYSCFG_MemoryRemapConfig(uint8_t SYSCFG_MemoryRemap);
190 | void SYSCFG_MemorySwappingBank(FunctionalState NewState);
191 | void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex);
192 | void SYSCFG_ETH_MediaInterfaceConfig(uint32_t SYSCFG_ETH_MediaInterface);
193 | void SYSCFG_CompensationCellCmd(FunctionalState NewState);
194 | FlagStatus SYSCFG_GetCompensationCellStatus(void);
195 |
196 | #ifdef __cplusplus
197 | }
198 | #endif
199 |
200 | #endif /*__STM32F4xx_SYSCFG_H */
201 |
202 | /**
203 | * @}
204 | */
205 |
206 | /**
207 | * @}
208 | */
209 |
210 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
211 |
--------------------------------------------------------------------------------
/FWLIB/inc/stm32f4xx_wwdg.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_wwdg.h
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file contains all the functions prototypes for the WWDG firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2014 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F4xx_WWDG_H
31 | #define __STM32F4xx_WWDG_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f4xx.h"
39 |
40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup WWDG
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 | /* Exported constants --------------------------------------------------------*/
50 |
51 | /** @defgroup WWDG_Exported_Constants
52 | * @{
53 | */
54 |
55 | /** @defgroup WWDG_Prescaler
56 | * @{
57 | */
58 |
59 | #define WWDG_Prescaler_1 ((uint32_t)0x00000000)
60 | #define WWDG_Prescaler_2 ((uint32_t)0x00000080)
61 | #define WWDG_Prescaler_4 ((uint32_t)0x00000100)
62 | #define WWDG_Prescaler_8 ((uint32_t)0x00000180)
63 | #define IS_WWDG_PRESCALER(PRESCALER) (((PRESCALER) == WWDG_Prescaler_1) || \
64 | ((PRESCALER) == WWDG_Prescaler_2) || \
65 | ((PRESCALER) == WWDG_Prescaler_4) || \
66 | ((PRESCALER) == WWDG_Prescaler_8))
67 | #define IS_WWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0x7F)
68 | #define IS_WWDG_COUNTER(COUNTER) (((COUNTER) >= 0x40) && ((COUNTER) <= 0x7F))
69 |
70 | /**
71 | * @}
72 | */
73 |
74 | /**
75 | * @}
76 | */
77 |
78 | /* Exported macro ------------------------------------------------------------*/
79 | /* Exported functions --------------------------------------------------------*/
80 |
81 | /* Function used to set the WWDG configuration to the default reset state ****/
82 | void WWDG_DeInit(void);
83 |
84 | /* Prescaler, Refresh window and Counter configuration functions **************/
85 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler);
86 | void WWDG_SetWindowValue(uint8_t WindowValue);
87 | void WWDG_EnableIT(void);
88 | void WWDG_SetCounter(uint8_t Counter);
89 |
90 | /* WWDG activation function ***************************************************/
91 | void WWDG_Enable(uint8_t Counter);
92 |
93 | /* Interrupts and flags management functions **********************************/
94 | FlagStatus WWDG_GetFlagStatus(void);
95 | void WWDG_ClearFlag(void);
96 |
97 | #ifdef __cplusplus
98 | }
99 | #endif
100 |
101 | #endif /* __STM32F4xx_WWDG_H */
102 |
103 | /**
104 | * @}
105 | */
106 |
107 | /**
108 | * @}
109 | */
110 |
111 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
112 |
--------------------------------------------------------------------------------
/FWLIB/src/misc.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file misc.c
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file provides all the miscellaneous firmware functions (add-on
8 | * to CMSIS functions).
9 | *
10 | * @verbatim
11 | *
12 | * ===================================================================
13 | * How to configure Interrupts using driver
14 | * ===================================================================
15 | *
16 | * This section provide functions allowing to configure the NVIC interrupts (IRQ).
17 | * The Cortex-M4 exceptions are managed by CMSIS functions.
18 | *
19 | * 1. Configure the NVIC Priority Grouping using NVIC_PriorityGroupConfig()
20 | * function according to the following table.
21 |
22 | * The table below gives the allowed values of the pre-emption priority and subpriority according
23 | * to the Priority Grouping configuration performed by NVIC_PriorityGroupConfig function
24 | * ==========================================================================================================================
25 | * NVIC_PriorityGroup | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority | Description
26 | * ==========================================================================================================================
27 | * NVIC_PriorityGroup_0 | 0 | 0-15 | 0 bits for pre-emption priority
28 | * | | | 4 bits for subpriority
29 | * --------------------------------------------------------------------------------------------------------------------------
30 | * NVIC_PriorityGroup_1 | 0-1 | 0-7 | 1 bits for pre-emption priority
31 | * | | | 3 bits for subpriority
32 | * --------------------------------------------------------------------------------------------------------------------------
33 | * NVIC_PriorityGroup_2 | 0-3 | 0-3 | 2 bits for pre-emption priority
34 | * | | | 2 bits for subpriority
35 | * --------------------------------------------------------------------------------------------------------------------------
36 | * NVIC_PriorityGroup_3 | 0-7 | 0-1 | 3 bits for pre-emption priority
37 | * | | | 1 bits for subpriority
38 | * --------------------------------------------------------------------------------------------------------------------------
39 | * NVIC_PriorityGroup_4 | 0-15 | 0 | 4 bits for pre-emption priority
40 | * | | | 0 bits for subpriority
41 | * ==========================================================================================================================
42 | *
43 | * 2. Enable and Configure the priority of the selected IRQ Channels using NVIC_Init()
44 | *
45 | * @note When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible.
46 | * The pending IRQ priority will be managed only by the subpriority.
47 | *
48 | * @note IRQ priority order (sorted by highest to lowest priority):
49 | * - Lowest pre-emption priority
50 | * - Lowest subpriority
51 | * - Lowest hardware priority (IRQ number)
52 | *
53 | * @endverbatim
54 | *
55 | ******************************************************************************
56 | * @attention
57 | *
58 | * © COPYRIGHT 2014 STMicroelectronics
59 | *
60 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
61 | * You may not use this file except in compliance with the License.
62 | * You may obtain a copy of the License at:
63 | *
64 | * http://www.st.com/software_license_agreement_liberty_v2
65 | *
66 | * Unless required by applicable law or agreed to in writing, software
67 | * distributed under the License is distributed on an "AS IS" BASIS,
68 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
69 | * See the License for the specific language governing permissions and
70 | * limitations under the License.
71 | *
72 | ******************************************************************************
73 | */
74 |
75 | /* Includes ------------------------------------------------------------------*/
76 | #include "misc.h"
77 |
78 | /** @addtogroup STM32F4xx_StdPeriph_Driver
79 | * @{
80 | */
81 |
82 | /** @defgroup MISC
83 | * @brief MISC driver modules
84 | * @{
85 | */
86 |
87 | /* Private typedef -----------------------------------------------------------*/
88 | /* Private define ------------------------------------------------------------*/
89 | #define AIRCR_VECTKEY_MASK ((uint32_t)0x05FA0000)
90 |
91 | /* Private macro -------------------------------------------------------------*/
92 | /* Private variables ---------------------------------------------------------*/
93 | /* Private function prototypes -----------------------------------------------*/
94 | /* Private functions ---------------------------------------------------------*/
95 |
96 | /** @defgroup MISC_Private_Functions
97 | * @{
98 | */
99 |
100 | /**
101 | * @brief Configures the priority grouping: pre-emption priority and subpriority.
102 | * @param NVIC_PriorityGroup: specifies the priority grouping bits length.
103 | * This parameter can be one of the following values:
104 | * @arg NVIC_PriorityGroup_0: 0 bits for pre-emption priority
105 | * 4 bits for subpriority
106 | * @arg NVIC_PriorityGroup_1: 1 bits for pre-emption priority
107 | * 3 bits for subpriority
108 | * @arg NVIC_PriorityGroup_2: 2 bits for pre-emption priority
109 | * 2 bits for subpriority
110 | * @arg NVIC_PriorityGroup_3: 3 bits for pre-emption priority
111 | * 1 bits for subpriority
112 | * @arg NVIC_PriorityGroup_4: 4 bits for pre-emption priority
113 | * 0 bits for subpriority
114 | * @note When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible.
115 | * The pending IRQ priority will be managed only by the subpriority.
116 | * @retval None
117 | */
118 | void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup)
119 | {
120 | /* Check the parameters */
121 | assert_param(IS_NVIC_PRIORITY_GROUP(NVIC_PriorityGroup));
122 |
123 | /* Set the PRIGROUP[10:8] bits according to NVIC_PriorityGroup value */
124 | SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PriorityGroup;
125 | }
126 |
127 | /**
128 | * @brief Initializes the NVIC peripheral according to the specified
129 | * parameters in the NVIC_InitStruct.
130 | * @note To configure interrupts priority correctly, the NVIC_PriorityGroupConfig()
131 | * function should be called before.
132 | * @param NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains
133 | * the configuration information for the specified NVIC peripheral.
134 | * @retval None
135 | */
136 | void NVIC_Init(NVIC_InitTypeDef *NVIC_InitStruct)
137 | {
138 | uint8_t tmppriority = 0x00, tmppre = 0x00, tmpsub = 0x0F;
139 |
140 | /* Check the parameters */
141 | assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd));
142 | assert_param(IS_NVIC_PREEMPTION_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority));
143 | assert_param(IS_NVIC_SUB_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelSubPriority));
144 |
145 | if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE)
146 | {
147 | /* Compute the Corresponding IRQ Priority --------------------------------*/
148 | tmppriority = (0x700 - ((SCB->AIRCR) & (uint32_t)0x700)) >> 0x08;
149 | tmppre = (0x4 - tmppriority);
150 | tmpsub = tmpsub >> tmppriority;
151 |
152 | tmppriority = NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority << tmppre;
153 | tmppriority |= (uint8_t)(NVIC_InitStruct->NVIC_IRQChannelSubPriority & tmpsub);
154 |
155 | tmppriority = tmppriority << 0x04;
156 |
157 | NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel] = tmppriority;
158 |
159 | /* Enable the Selected IRQ Channels --------------------------------------*/
160 | NVIC->ISER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
161 | (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
162 | }
163 | else
164 | {
165 | /* Disable the Selected IRQ Channels -------------------------------------*/
166 | NVIC->ICER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
167 | (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
168 | }
169 | }
170 |
171 | /**
172 | * @brief Sets the vector table location and Offset.
173 | * @param NVIC_VectTab: specifies if the vector table is in RAM or FLASH memory.
174 | * This parameter can be one of the following values:
175 | * @arg NVIC_VectTab_RAM: Vector Table in internal SRAM.
176 | * @arg NVIC_VectTab_FLASH: Vector Table in internal FLASH.
177 | * @param Offset: Vector Table base offset field. This value must be a multiple of 0x200.
178 | * @retval None
179 | */
180 | void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset)
181 | {
182 | /* Check the parameters */
183 | assert_param(IS_NVIC_VECTTAB(NVIC_VectTab));
184 | assert_param(IS_NVIC_OFFSET(Offset));
185 |
186 | SCB->VTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80);
187 | }
188 |
189 | /**
190 | * @brief Selects the condition for the system to enter low power mode.
191 | * @param LowPowerMode: Specifies the new mode for the system to enter low power mode.
192 | * This parameter can be one of the following values:
193 | * @arg NVIC_LP_SEVONPEND: Low Power SEV on Pend.
194 | * @arg NVIC_LP_SLEEPDEEP: Low Power DEEPSLEEP request.
195 | * @arg NVIC_LP_SLEEPONEXIT: Low Power Sleep on Exit.
196 | * @param NewState: new state of LP condition. This parameter can be: ENABLE or DISABLE.
197 | * @retval None
198 | */
199 | void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState)
200 | {
201 | /* Check the parameters */
202 | assert_param(IS_NVIC_LP(LowPowerMode));
203 | assert_param(IS_FUNCTIONAL_STATE(NewState));
204 |
205 | if (NewState != DISABLE)
206 | {
207 | SCB->SCR |= LowPowerMode;
208 | }
209 | else
210 | {
211 | SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode);
212 | }
213 | }
214 |
215 | /**
216 | * @brief Configures the SysTick clock source.
217 | * @param SysTick_CLKSource: specifies the SysTick clock source.
218 | * This parameter can be one of the following values:
219 | * @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source.
220 | * @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source.
221 | * @retval None
222 | */
223 | void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource)
224 | {
225 | /* Check the parameters */
226 | assert_param(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource));
227 | if (SysTick_CLKSource == SysTick_CLKSource_HCLK)
228 | {
229 | SysTick->CTRL |= SysTick_CLKSource_HCLK;
230 | }
231 | else
232 | {
233 | SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8;
234 | }
235 | }
236 |
237 | /**
238 | * @}
239 | */
240 |
241 | /**
242 | * @}
243 | */
244 |
245 | /**
246 | * @}
247 | */
248 |
249 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
250 |
--------------------------------------------------------------------------------
/FWLIB/src/stm32f4xx_crc.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_crc.c
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file provides all the CRC firmware functions.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2014 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /* Includes ------------------------------------------------------------------*/
29 | #include "stm32f4xx_crc.h"
30 |
31 | /** @addtogroup STM32F4xx_StdPeriph_Driver
32 | * @{
33 | */
34 |
35 | /** @defgroup CRC
36 | * @brief CRC driver modules
37 | * @{
38 | */
39 |
40 | /* Private typedef -----------------------------------------------------------*/
41 | /* Private define ------------------------------------------------------------*/
42 | /* Private macro -------------------------------------------------------------*/
43 | /* Private variables ---------------------------------------------------------*/
44 | /* Private function prototypes -----------------------------------------------*/
45 | /* Private functions ---------------------------------------------------------*/
46 |
47 | /** @defgroup CRC_Private_Functions
48 | * @{
49 | */
50 |
51 | /**
52 | * @brief Resets the CRC Data register (DR).
53 | * @param None
54 | * @retval None
55 | */
56 | void CRC_ResetDR(void)
57 | {
58 | /* Reset CRC generator */
59 | CRC->CR = CRC_CR_RESET;
60 | }
61 |
62 | /**
63 | * @brief Computes the 32-bit CRC of a given data word(32-bit).
64 | * @param Data: data word(32-bit) to compute its CRC
65 | * @retval 32-bit CRC
66 | */
67 | uint32_t CRC_CalcCRC(uint32_t Data)
68 | {
69 | CRC->DR = Data;
70 |
71 | return (CRC->DR);
72 | }
73 |
74 | /**
75 | * @brief Computes the 32-bit CRC of a given buffer of data word(32-bit).
76 | * @param pBuffer: pointer to the buffer containing the data to be computed
77 | * @param BufferLength: length of the buffer to be computed
78 | * @retval 32-bit CRC
79 | */
80 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength)
81 | {
82 | uint32_t index = 0;
83 |
84 | for(index = 0; index < BufferLength; index++)
85 | {
86 | CRC->DR = pBuffer[index];
87 | }
88 | return (CRC->DR);
89 | }
90 |
91 | /**
92 | * @brief Returns the current CRC value.
93 | * @param None
94 | * @retval 32-bit CRC
95 | */
96 | uint32_t CRC_GetCRC(void)
97 | {
98 | return (CRC->DR);
99 | }
100 |
101 | /**
102 | * @brief Stores a 8-bit data in the Independent Data(ID) register.
103 | * @param IDValue: 8-bit value to be stored in the ID register
104 | * @retval None
105 | */
106 | void CRC_SetIDRegister(uint8_t IDValue)
107 | {
108 | CRC->IDR = IDValue;
109 | }
110 |
111 | /**
112 | * @brief Returns the 8-bit data stored in the Independent Data(ID) register
113 | * @param None
114 | * @retval 8-bit value of the ID register
115 | */
116 | uint8_t CRC_GetIDRegister(void)
117 | {
118 | return (CRC->IDR);
119 | }
120 |
121 | /**
122 | * @}
123 | */
124 |
125 | /**
126 | * @}
127 | */
128 |
129 | /**
130 | * @}
131 | */
132 |
133 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
134 |
--------------------------------------------------------------------------------
/FWLIB/src/stm32f4xx_cryp_des.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_cryp_des.c
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file provides high level functions to encrypt and decrypt an
8 | * input message using DES in ECB/CBC modes.
9 | * It uses the stm32f4xx_cryp.c/.h drivers to access the STM32F4xx CRYP
10 | * peripheral.
11 | *
12 | @verbatim
13 |
14 | ===================================================================
15 | ##### How to use this driver #####
16 | ===================================================================
17 | [..]
18 | (#) Enable The CRYP controller clock using
19 | RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_CRYP, ENABLE); function.
20 |
21 | (#) Encrypt and decrypt using DES in ECB Mode using CRYP_DES_ECB() function.
22 |
23 | (#) Encrypt and decrypt using DES in CBC Mode using CRYP_DES_CBC() function.
24 |
25 | @endverbatim
26 | *
27 | ******************************************************************************
28 | * @attention
29 | *
30 | * © COPYRIGHT 2014 STMicroelectronics
31 | *
32 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
33 | * You may not use this file except in compliance with the License.
34 | * You may obtain a copy of the License at:
35 | *
36 | * http://www.st.com/software_license_agreement_liberty_v2
37 | *
38 | * Unless required by applicable law or agreed to in writing, software
39 | * distributed under the License is distributed on an "AS IS" BASIS,
40 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
41 | * See the License for the specific language governing permissions and
42 | * limitations under the License.
43 | *
44 | ******************************************************************************
45 | */
46 |
47 | /* Includes ------------------------------------------------------------------*/
48 | #include "stm32f4xx_cryp.h"
49 |
50 |
51 | /** @addtogroup STM32F4xx_StdPeriph_Driver
52 | * @{
53 | */
54 |
55 | /** @defgroup CRYP
56 | * @brief CRYP driver modules
57 | * @{
58 | */
59 |
60 | /* Private typedef -----------------------------------------------------------*/
61 | /* Private define ------------------------------------------------------------*/
62 | #define DESBUSY_TIMEOUT ((uint32_t) 0x00010000)
63 |
64 | /* Private macro -------------------------------------------------------------*/
65 | /* Private variables ---------------------------------------------------------*/
66 | /* Private function prototypes -----------------------------------------------*/
67 | /* Private functions ---------------------------------------------------------*/
68 |
69 |
70 | /** @defgroup CRYP_Private_Functions
71 | * @{
72 | */
73 |
74 | /** @defgroup CRYP_Group8 High Level DES functions
75 | * @brief High Level DES functions
76 | *
77 | @verbatim
78 | ===============================================================================
79 | ##### High Level DES functions #####
80 | ===============================================================================
81 | @endverbatim
82 | * @{
83 | */
84 |
85 | /**
86 | * @brief Encrypt and decrypt using DES in ECB Mode
87 | * @param Mode: encryption or decryption Mode.
88 | * This parameter can be one of the following values:
89 | * @arg MODE_ENCRYPT: Encryption
90 | * @arg MODE_DECRYPT: Decryption
91 | * @param Key: Key used for DES algorithm.
92 | * @param Ilength: length of the Input buffer, must be a multiple of 8.
93 | * @param Input: pointer to the Input buffer.
94 | * @param Output: pointer to the returned buffer.
95 | * @retval An ErrorStatus enumeration value:
96 | * - SUCCESS: Operation done
97 | * - ERROR: Operation failed
98 | */
99 | ErrorStatus CRYP_DES_ECB(uint8_t Mode, uint8_t Key[8], uint8_t *Input,
100 | uint32_t Ilength, uint8_t *Output)
101 | {
102 | CRYP_InitTypeDef DES_CRYP_InitStructure;
103 | CRYP_KeyInitTypeDef DES_CRYP_KeyInitStructure;
104 | __IO uint32_t counter = 0;
105 | uint32_t busystatus = 0;
106 | ErrorStatus status = SUCCESS;
107 | uint32_t keyaddr = (uint32_t)Key;
108 | uint32_t inputaddr = (uint32_t)Input;
109 | uint32_t outputaddr = (uint32_t)Output;
110 | uint32_t i = 0;
111 |
112 | /* Crypto structures initialisation*/
113 | CRYP_KeyStructInit(&DES_CRYP_KeyInitStructure);
114 |
115 | /* Crypto Init for Encryption process */
116 | if( Mode == MODE_ENCRYPT ) /* DES encryption */
117 | {
118 | DES_CRYP_InitStructure.CRYP_AlgoDir = CRYP_AlgoDir_Encrypt;
119 | }
120 | else/* if( Mode == MODE_DECRYPT )*/ /* DES decryption */
121 | {
122 | DES_CRYP_InitStructure.CRYP_AlgoDir = CRYP_AlgoDir_Decrypt;
123 | }
124 |
125 | DES_CRYP_InitStructure.CRYP_AlgoMode = CRYP_AlgoMode_DES_ECB;
126 | DES_CRYP_InitStructure.CRYP_DataType = CRYP_DataType_8b;
127 | CRYP_Init(&DES_CRYP_InitStructure);
128 |
129 | /* Key Initialisation */
130 | DES_CRYP_KeyInitStructure.CRYP_Key1Left = __REV(*(uint32_t *)(keyaddr));
131 | keyaddr += 4;
132 | DES_CRYP_KeyInitStructure.CRYP_Key1Right = __REV(*(uint32_t *)(keyaddr));
133 | CRYP_KeyInit(& DES_CRYP_KeyInitStructure);
134 |
135 | /* Flush IN/OUT FIFO */
136 | CRYP_FIFOFlush();
137 |
138 | /* Enable Crypto processor */
139 | CRYP_Cmd(ENABLE);
140 |
141 | if(CRYP_GetCmdStatus() == DISABLE)
142 | {
143 | /* The CRYP peripheral clock is not enabled or the device doesn't embedd
144 | the CRYP peripheral (please check the device sales type. */
145 | return(ERROR);
146 | }
147 | for(i = 0; ((i < Ilength) && (status != ERROR)); i += 8)
148 | {
149 |
150 | /* Write the Input block in the Input FIFO */
151 | CRYP_DataIn(*(uint32_t *)(inputaddr));
152 | inputaddr += 4;
153 | CRYP_DataIn(*(uint32_t *)(inputaddr));
154 | inputaddr += 4;
155 |
156 | /* Wait until the complete message has been processed */
157 | counter = 0;
158 | do
159 | {
160 | busystatus = CRYP_GetFlagStatus(CRYP_FLAG_BUSY);
161 | counter++;
162 | }
163 | while ((counter != DESBUSY_TIMEOUT) && (busystatus != RESET));
164 |
165 | if (busystatus != RESET)
166 | {
167 | status = ERROR;
168 | }
169 | else
170 | {
171 |
172 | /* Read the Output block from the Output FIFO */
173 | *(uint32_t *)(outputaddr) = CRYP_DataOut();
174 | outputaddr += 4;
175 | *(uint32_t *)(outputaddr) = CRYP_DataOut();
176 | outputaddr += 4;
177 | }
178 | }
179 |
180 | /* Disable Crypto */
181 | CRYP_Cmd(DISABLE);
182 |
183 | return status;
184 | }
185 |
186 | /**
187 | * @brief Encrypt and decrypt using DES in CBC Mode
188 | * @param Mode: encryption or decryption Mode.
189 | * This parameter can be one of the following values:
190 | * @arg MODE_ENCRYPT: Encryption
191 | * @arg MODE_DECRYPT: Decryption
192 | * @param Key: Key used for DES algorithm.
193 | * @param InitVectors: Initialisation Vectors used for DES algorithm.
194 | * @param Ilength: length of the Input buffer, must be a multiple of 8.
195 | * @param Input: pointer to the Input buffer.
196 | * @param Output: pointer to the returned buffer.
197 | * @retval An ErrorStatus enumeration value:
198 | * - SUCCESS: Operation done
199 | * - ERROR: Operation failed
200 | */
201 | ErrorStatus CRYP_DES_CBC(uint8_t Mode, uint8_t Key[8], uint8_t InitVectors[8],
202 | uint8_t *Input, uint32_t Ilength, uint8_t *Output)
203 | {
204 | CRYP_InitTypeDef DES_CRYP_InitStructure;
205 | CRYP_KeyInitTypeDef DES_CRYP_KeyInitStructure;
206 | CRYP_IVInitTypeDef DES_CRYP_IVInitStructure;
207 | __IO uint32_t counter = 0;
208 | uint32_t busystatus = 0;
209 | ErrorStatus status = SUCCESS;
210 | uint32_t keyaddr = (uint32_t)Key;
211 | uint32_t inputaddr = (uint32_t)Input;
212 | uint32_t outputaddr = (uint32_t)Output;
213 | uint32_t ivaddr = (uint32_t)InitVectors;
214 | uint32_t i = 0;
215 |
216 | /* Crypto structures initialisation*/
217 | CRYP_KeyStructInit(&DES_CRYP_KeyInitStructure);
218 |
219 | /* Crypto Init for Encryption process */
220 | if(Mode == MODE_ENCRYPT) /* DES encryption */
221 | {
222 | DES_CRYP_InitStructure.CRYP_AlgoDir = CRYP_AlgoDir_Encrypt;
223 | }
224 | else /*if(Mode == MODE_DECRYPT)*/ /* DES decryption */
225 | {
226 | DES_CRYP_InitStructure.CRYP_AlgoDir = CRYP_AlgoDir_Decrypt;
227 | }
228 |
229 | DES_CRYP_InitStructure.CRYP_AlgoMode = CRYP_AlgoMode_DES_CBC;
230 | DES_CRYP_InitStructure.CRYP_DataType = CRYP_DataType_8b;
231 | CRYP_Init(&DES_CRYP_InitStructure);
232 |
233 | /* Key Initialisation */
234 | DES_CRYP_KeyInitStructure.CRYP_Key1Left = __REV(*(uint32_t *)(keyaddr));
235 | keyaddr += 4;
236 | DES_CRYP_KeyInitStructure.CRYP_Key1Right = __REV(*(uint32_t *)(keyaddr));
237 | CRYP_KeyInit(& DES_CRYP_KeyInitStructure);
238 |
239 | /* Initialization Vectors */
240 | DES_CRYP_IVInitStructure.CRYP_IV0Left = __REV(*(uint32_t *)(ivaddr));
241 | ivaddr += 4;
242 | DES_CRYP_IVInitStructure.CRYP_IV0Right = __REV(*(uint32_t *)(ivaddr));
243 | CRYP_IVInit(&DES_CRYP_IVInitStructure);
244 |
245 | /* Flush IN/OUT FIFO */
246 | CRYP_FIFOFlush();
247 |
248 | /* Enable Crypto processor */
249 | CRYP_Cmd(ENABLE);
250 |
251 | if(CRYP_GetCmdStatus() == DISABLE)
252 | {
253 | /* The CRYP peripheral clock is not enabled or the device doesn't embedd
254 | the CRYP peripheral (please check the device sales type. */
255 | return(ERROR);
256 | }
257 | for(i = 0; ((i < Ilength) && (status != ERROR)); i += 8)
258 | {
259 | /* Write the Input block in the Input FIFO */
260 | CRYP_DataIn(*(uint32_t *)(inputaddr));
261 | inputaddr += 4;
262 | CRYP_DataIn(*(uint32_t *)(inputaddr));
263 | inputaddr += 4;
264 |
265 | /* Wait until the complete message has been processed */
266 | counter = 0;
267 | do
268 | {
269 | busystatus = CRYP_GetFlagStatus(CRYP_FLAG_BUSY);
270 | counter++;
271 | }
272 | while ((counter != DESBUSY_TIMEOUT) && (busystatus != RESET));
273 |
274 | if (busystatus != RESET)
275 | {
276 | status = ERROR;
277 | }
278 | else
279 | {
280 | /* Read the Output block from the Output FIFO */
281 | *(uint32_t *)(outputaddr) = CRYP_DataOut();
282 | outputaddr += 4;
283 | *(uint32_t *)(outputaddr) = CRYP_DataOut();
284 | outputaddr += 4;
285 | }
286 | }
287 |
288 | /* Disable Crypto */
289 | CRYP_Cmd(DISABLE);
290 |
291 | return status;
292 | }
293 |
294 | /**
295 | * @}
296 | */
297 |
298 | /**
299 | * @}
300 | */
301 |
302 | /**
303 | * @}
304 | */
305 |
306 | /**
307 | * @}
308 | */
309 |
310 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
311 |
--------------------------------------------------------------------------------
/FWLIB/src/stm32f4xx_cryp_tdes.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_cryp_tdes.c
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file provides high level functions to encrypt and decrypt an
8 | * input message using TDES in ECB/CBC modes .
9 | * It uses the stm32f4xx_cryp.c/.h drivers to access the STM32F4xx CRYP
10 | * peripheral.
11 | *
12 | @verbatim
13 |
14 | ===============================================================================
15 | ##### How to use this driver #####
16 | ===============================================================================
17 | [..]
18 | (#) Enable The CRYP controller clock using
19 | RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_CRYP, ENABLE); function.
20 |
21 | (#) Encrypt and decrypt using TDES in ECB Mode using CRYP_TDES_ECB() function.
22 |
23 | (#) Encrypt and decrypt using TDES in CBC Mode using CRYP_TDES_CBC() function.
24 |
25 | @endverbatim
26 | *
27 | ******************************************************************************
28 | * @attention
29 | *
30 | * © COPYRIGHT 2014 STMicroelectronics
31 | *
32 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
33 | * You may not use this file except in compliance with the License.
34 | * You may obtain a copy of the License at:
35 | *
36 | * http://www.st.com/software_license_agreement_liberty_v2
37 | *
38 | * Unless required by applicable law or agreed to in writing, software
39 | * distributed under the License is distributed on an "AS IS" BASIS,
40 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
41 | * See the License for the specific language governing permissions and
42 | * limitations under the License.
43 | *
44 | ******************************************************************************
45 | */
46 |
47 | /* Includes ------------------------------------------------------------------*/
48 | #include "stm32f4xx_cryp.h"
49 |
50 |
51 | /** @addtogroup STM32F4xx_StdPeriph_Driver
52 | * @{
53 | */
54 |
55 | /** @defgroup CRYP
56 | * @brief CRYP driver modules
57 | * @{
58 | */
59 |
60 | /* Private typedef -----------------------------------------------------------*/
61 | /* Private define ------------------------------------------------------------*/
62 | #define TDESBUSY_TIMEOUT ((uint32_t) 0x00010000)
63 |
64 | /* Private macro -------------------------------------------------------------*/
65 | /* Private variables ---------------------------------------------------------*/
66 | /* Private function prototypes -----------------------------------------------*/
67 | /* Private functions ---------------------------------------------------------*/
68 |
69 |
70 | /** @defgroup CRYP_Private_Functions
71 | * @{
72 | */
73 |
74 | /** @defgroup CRYP_Group7 High Level TDES functions
75 | * @brief High Level TDES functions
76 | *
77 | @verbatim
78 | ===============================================================================
79 | ##### High Level TDES functions #####
80 | ===============================================================================
81 |
82 | @endverbatim
83 | * @{
84 | */
85 |
86 | /**
87 | * @brief Encrypt and decrypt using TDES in ECB Mode
88 | * @param Mode: encryption or decryption Mode.
89 | * This parameter can be one of the following values:
90 | * @arg MODE_ENCRYPT: Encryption
91 | * @arg MODE_DECRYPT: Decryption
92 | * @param Key: Key used for TDES algorithm.
93 | * @param Ilength: length of the Input buffer, must be a multiple of 8.
94 | * @param Input: pointer to the Input buffer.
95 | * @param Output: pointer to the returned buffer.
96 | * @retval An ErrorStatus enumeration value:
97 | * - SUCCESS: Operation done
98 | * - ERROR: Operation failed
99 | */
100 | ErrorStatus CRYP_TDES_ECB(uint8_t Mode, uint8_t Key[24], uint8_t *Input,
101 | uint32_t Ilength, uint8_t *Output)
102 | {
103 | CRYP_InitTypeDef TDES_CRYP_InitStructure;
104 | CRYP_KeyInitTypeDef TDES_CRYP_KeyInitStructure;
105 | __IO uint32_t counter = 0;
106 | uint32_t busystatus = 0;
107 | ErrorStatus status = SUCCESS;
108 | uint32_t keyaddr = (uint32_t)Key;
109 | uint32_t inputaddr = (uint32_t)Input;
110 | uint32_t outputaddr = (uint32_t)Output;
111 | uint32_t i = 0;
112 |
113 | /* Crypto structures initialisation*/
114 | CRYP_KeyStructInit(&TDES_CRYP_KeyInitStructure);
115 |
116 | /* Crypto Init for Encryption process */
117 | if(Mode == MODE_ENCRYPT) /* TDES encryption */
118 | {
119 | TDES_CRYP_InitStructure.CRYP_AlgoDir = CRYP_AlgoDir_Encrypt;
120 | }
121 | else /*if(Mode == MODE_DECRYPT)*/ /* TDES decryption */
122 | {
123 | TDES_CRYP_InitStructure.CRYP_AlgoDir = CRYP_AlgoDir_Decrypt;
124 | }
125 |
126 | TDES_CRYP_InitStructure.CRYP_AlgoMode = CRYP_AlgoMode_TDES_ECB;
127 | TDES_CRYP_InitStructure.CRYP_DataType = CRYP_DataType_8b;
128 | CRYP_Init(&TDES_CRYP_InitStructure);
129 |
130 | /* Key Initialisation */
131 | TDES_CRYP_KeyInitStructure.CRYP_Key1Left = __REV(*(uint32_t *)(keyaddr));
132 | keyaddr += 4;
133 | TDES_CRYP_KeyInitStructure.CRYP_Key1Right = __REV(*(uint32_t *)(keyaddr));
134 | keyaddr += 4;
135 | TDES_CRYP_KeyInitStructure.CRYP_Key2Left = __REV(*(uint32_t *)(keyaddr));
136 | keyaddr += 4;
137 | TDES_CRYP_KeyInitStructure.CRYP_Key2Right = __REV(*(uint32_t *)(keyaddr));
138 | keyaddr += 4;
139 | TDES_CRYP_KeyInitStructure.CRYP_Key3Left = __REV(*(uint32_t *)(keyaddr));
140 | keyaddr += 4;
141 | TDES_CRYP_KeyInitStructure.CRYP_Key3Right = __REV(*(uint32_t *)(keyaddr));
142 | CRYP_KeyInit(& TDES_CRYP_KeyInitStructure);
143 |
144 | /* Flush IN/OUT FIFO */
145 | CRYP_FIFOFlush();
146 |
147 | /* Enable Crypto processor */
148 | CRYP_Cmd(ENABLE);
149 |
150 | if(CRYP_GetCmdStatus() == DISABLE)
151 | {
152 | /* The CRYP peripheral clock is not enabled or the device doesn't embedd
153 | the CRYP peripheral (please check the device sales type. */
154 | return(ERROR);
155 | }
156 | for(i = 0; ((i < Ilength) && (status != ERROR)); i += 8)
157 | {
158 | /* Write the Input block in the Input FIFO */
159 | CRYP_DataIn(*(uint32_t *)(inputaddr));
160 | inputaddr += 4;
161 | CRYP_DataIn(*(uint32_t *)(inputaddr));
162 | inputaddr += 4;
163 |
164 | /* Wait until the complete message has been processed */
165 | counter = 0;
166 | do
167 | {
168 | busystatus = CRYP_GetFlagStatus(CRYP_FLAG_BUSY);
169 | counter++;
170 | }
171 | while ((counter != TDESBUSY_TIMEOUT) && (busystatus != RESET));
172 |
173 | if (busystatus != RESET)
174 | {
175 | status = ERROR;
176 | }
177 | else
178 | {
179 |
180 | /* Read the Output block from the Output FIFO */
181 | *(uint32_t *)(outputaddr) = CRYP_DataOut();
182 | outputaddr += 4;
183 | *(uint32_t *)(outputaddr) = CRYP_DataOut();
184 | outputaddr += 4;
185 | }
186 | }
187 |
188 | /* Disable Crypto */
189 | CRYP_Cmd(DISABLE);
190 |
191 | return status;
192 | }
193 |
194 | /**
195 | * @brief Encrypt and decrypt using TDES in CBC Mode
196 | * @param Mode: encryption or decryption Mode.
197 | * This parameter can be one of the following values:
198 | * @arg MODE_ENCRYPT: Encryption
199 | * @arg MODE_DECRYPT: Decryption
200 | * @param Key: Key used for TDES algorithm.
201 | * @param InitVectors: Initialisation Vectors used for TDES algorithm.
202 | * @param Input: pointer to the Input buffer.
203 | * @param Ilength: length of the Input buffer, must be a multiple of 8.
204 | * @param Output: pointer to the returned buffer.
205 | * @retval An ErrorStatus enumeration value:
206 | * - SUCCESS: Operation done
207 | * - ERROR: Operation failed
208 | */
209 | ErrorStatus CRYP_TDES_CBC(uint8_t Mode, uint8_t Key[24], uint8_t InitVectors[8],
210 | uint8_t *Input, uint32_t Ilength, uint8_t *Output)
211 | {
212 | CRYP_InitTypeDef TDES_CRYP_InitStructure;
213 | CRYP_KeyInitTypeDef TDES_CRYP_KeyInitStructure;
214 | CRYP_IVInitTypeDef TDES_CRYP_IVInitStructure;
215 | __IO uint32_t counter = 0;
216 | uint32_t busystatus = 0;
217 | ErrorStatus status = SUCCESS;
218 | uint32_t keyaddr = (uint32_t)Key;
219 | uint32_t inputaddr = (uint32_t)Input;
220 | uint32_t outputaddr = (uint32_t)Output;
221 | uint32_t ivaddr = (uint32_t)InitVectors;
222 | uint32_t i = 0;
223 |
224 | /* Crypto structures initialisation*/
225 | CRYP_KeyStructInit(&TDES_CRYP_KeyInitStructure);
226 |
227 | /* Crypto Init for Encryption process */
228 | if(Mode == MODE_ENCRYPT) /* TDES encryption */
229 | {
230 | TDES_CRYP_InitStructure.CRYP_AlgoDir = CRYP_AlgoDir_Encrypt;
231 | }
232 | else
233 | {
234 | TDES_CRYP_InitStructure.CRYP_AlgoDir = CRYP_AlgoDir_Decrypt;
235 | }
236 | TDES_CRYP_InitStructure.CRYP_AlgoMode = CRYP_AlgoMode_TDES_CBC;
237 | TDES_CRYP_InitStructure.CRYP_DataType = CRYP_DataType_8b;
238 |
239 | CRYP_Init(&TDES_CRYP_InitStructure);
240 |
241 | /* Key Initialisation */
242 | TDES_CRYP_KeyInitStructure.CRYP_Key1Left = __REV(*(uint32_t *)(keyaddr));
243 | keyaddr += 4;
244 | TDES_CRYP_KeyInitStructure.CRYP_Key1Right = __REV(*(uint32_t *)(keyaddr));
245 | keyaddr += 4;
246 | TDES_CRYP_KeyInitStructure.CRYP_Key2Left = __REV(*(uint32_t *)(keyaddr));
247 | keyaddr += 4;
248 | TDES_CRYP_KeyInitStructure.CRYP_Key2Right = __REV(*(uint32_t *)(keyaddr));
249 | keyaddr += 4;
250 | TDES_CRYP_KeyInitStructure.CRYP_Key3Left = __REV(*(uint32_t *)(keyaddr));
251 | keyaddr += 4;
252 | TDES_CRYP_KeyInitStructure.CRYP_Key3Right = __REV(*(uint32_t *)(keyaddr));
253 | CRYP_KeyInit(& TDES_CRYP_KeyInitStructure);
254 |
255 | /* Initialization Vectors */
256 | TDES_CRYP_IVInitStructure.CRYP_IV0Left = __REV(*(uint32_t *)(ivaddr));
257 | ivaddr += 4;
258 | TDES_CRYP_IVInitStructure.CRYP_IV0Right = __REV(*(uint32_t *)(ivaddr));
259 | CRYP_IVInit(&TDES_CRYP_IVInitStructure);
260 |
261 | /* Flush IN/OUT FIFO */
262 | CRYP_FIFOFlush();
263 |
264 | /* Enable Crypto processor */
265 | CRYP_Cmd(ENABLE);
266 |
267 | if(CRYP_GetCmdStatus() == DISABLE)
268 | {
269 | /* The CRYP peripheral clock is not enabled or the device doesn't embedd
270 | the CRYP peripheral (please check the device sales type. */
271 | return(ERROR);
272 | }
273 |
274 | for(i = 0; ((i < Ilength) && (status != ERROR)); i += 8)
275 | {
276 | /* Write the Input block in the Input FIFO */
277 | CRYP_DataIn(*(uint32_t *)(inputaddr));
278 | inputaddr += 4;
279 | CRYP_DataIn(*(uint32_t *)(inputaddr));
280 | inputaddr += 4;
281 |
282 | /* Wait until the complete message has been processed */
283 | counter = 0;
284 | do
285 | {
286 | busystatus = CRYP_GetFlagStatus(CRYP_FLAG_BUSY);
287 | counter++;
288 | }
289 | while ((counter != TDESBUSY_TIMEOUT) && (busystatus != RESET));
290 |
291 | if (busystatus != RESET)
292 | {
293 | status = ERROR;
294 | }
295 | else
296 | {
297 |
298 | /* Read the Output block from the Output FIFO */
299 | *(uint32_t *)(outputaddr) = CRYP_DataOut();
300 | outputaddr += 4;
301 | *(uint32_t *)(outputaddr) = CRYP_DataOut();
302 | outputaddr += 4;
303 | }
304 | }
305 |
306 | /* Disable Crypto */
307 | CRYP_Cmd(DISABLE);
308 |
309 | return status;
310 | }
311 | /**
312 | * @}
313 | */
314 |
315 | /**
316 | * @}
317 | */
318 |
319 | /**
320 | * @}
321 | */
322 |
323 | /**
324 | * @}
325 | */
326 |
327 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
328 |
--------------------------------------------------------------------------------
/FWLIB/src/stm32f4xx_dbgmcu.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_dbgmcu.c
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file provides all the DBGMCU firmware functions.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2014 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /* Includes ------------------------------------------------------------------*/
29 | #include "stm32f4xx_dbgmcu.h"
30 |
31 | /** @addtogroup STM32F4xx_StdPeriph_Driver
32 | * @{
33 | */
34 |
35 | /** @defgroup DBGMCU
36 | * @brief DBGMCU driver modules
37 | * @{
38 | */
39 |
40 | /* Private typedef -----------------------------------------------------------*/
41 | /* Private define ------------------------------------------------------------*/
42 | #define IDCODE_DEVID_MASK ((uint32_t)0x00000FFF)
43 |
44 | /* Private macro -------------------------------------------------------------*/
45 | /* Private variables ---------------------------------------------------------*/
46 | /* Private function prototypes -----------------------------------------------*/
47 | /* Private functions ---------------------------------------------------------*/
48 |
49 | /** @defgroup DBGMCU_Private_Functions
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Returns the device revision identifier.
55 | * @param None
56 | * @retval Device revision identifier
57 | */
58 | uint32_t DBGMCU_GetREVID(void)
59 | {
60 | return(DBGMCU->IDCODE >> 16);
61 | }
62 |
63 | /**
64 | * @brief Returns the device identifier.
65 | * @param None
66 | * @retval Device identifier
67 | */
68 | uint32_t DBGMCU_GetDEVID(void)
69 | {
70 | return(DBGMCU->IDCODE & IDCODE_DEVID_MASK);
71 | }
72 |
73 | /**
74 | * @brief Configures low power mode behavior when the MCU is in Debug mode.
75 | * @param DBGMCU_Periph: specifies the low power mode.
76 | * This parameter can be any combination of the following values:
77 | * @arg DBGMCU_SLEEP: Keep debugger connection during SLEEP mode
78 | * @arg DBGMCU_STOP: Keep debugger connection during STOP mode
79 | * @arg DBGMCU_STANDBY: Keep debugger connection during STANDBY mode
80 | * @param NewState: new state of the specified low power mode in Debug mode.
81 | * This parameter can be: ENABLE or DISABLE.
82 | * @retval None
83 | */
84 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState)
85 | {
86 | /* Check the parameters */
87 | assert_param(IS_DBGMCU_PERIPH(DBGMCU_Periph));
88 | assert_param(IS_FUNCTIONAL_STATE(NewState));
89 | if (NewState != DISABLE)
90 | {
91 | DBGMCU->CR |= DBGMCU_Periph;
92 | }
93 | else
94 | {
95 | DBGMCU->CR &= ~DBGMCU_Periph;
96 | }
97 | }
98 |
99 | /**
100 | * @brief Configures APB1 peripheral behavior when the MCU is in Debug mode.
101 | * @param DBGMCU_Periph: specifies the APB1 peripheral.
102 | * This parameter can be any combination of the following values:
103 | * @arg DBGMCU_TIM2_STOP: TIM2 counter stopped when Core is halted
104 | * @arg DBGMCU_TIM3_STOP: TIM3 counter stopped when Core is halted
105 | * @arg DBGMCU_TIM4_STOP: TIM4 counter stopped when Core is halted
106 | * @arg DBGMCU_TIM5_STOP: TIM5 counter stopped when Core is halted
107 | * @arg DBGMCU_TIM6_STOP: TIM6 counter stopped when Core is halted
108 | * @arg DBGMCU_TIM7_STOP: TIM7 counter stopped when Core is halted
109 | * @arg DBGMCU_TIM12_STOP: TIM12 counter stopped when Core is halted
110 | * @arg DBGMCU_TIM13_STOP: TIM13 counter stopped when Core is halted
111 | * @arg DBGMCU_TIM14_STOP: TIM14 counter stopped when Core is halted
112 | * @arg DBGMCU_RTC_STOP: RTC Calendar and Wakeup counter stopped when Core is halted.
113 | * @arg DBGMCU_WWDG_STOP: Debug WWDG stopped when Core is halted
114 | * @arg DBGMCU_IWDG_STOP: Debug IWDG stopped when Core is halted
115 | * @arg DBGMCU_I2C1_SMBUS_TIMEOUT: I2C1 SMBUS timeout mode stopped when Core is halted
116 | * @arg DBGMCU_I2C2_SMBUS_TIMEOUT: I2C2 SMBUS timeout mode stopped when Core is halted
117 | * @arg DBGMCU_I2C3_SMBUS_TIMEOUT: I2C3 SMBUS timeout mode stopped when Core is halted
118 | * @arg DBGMCU_CAN2_STOP: Debug CAN1 stopped when Core is halted
119 | * @arg DBGMCU_CAN1_STOP: Debug CAN2 stopped when Core is halted
120 | * This parameter can be: ENABLE or DISABLE.
121 | * @retval None
122 | */
123 | void DBGMCU_APB1PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState)
124 | {
125 | /* Check the parameters */
126 | assert_param(IS_DBGMCU_APB1PERIPH(DBGMCU_Periph));
127 | assert_param(IS_FUNCTIONAL_STATE(NewState));
128 |
129 | if (NewState != DISABLE)
130 | {
131 | DBGMCU->APB1FZ |= DBGMCU_Periph;
132 | }
133 | else
134 | {
135 | DBGMCU->APB1FZ &= ~DBGMCU_Periph;
136 | }
137 | }
138 |
139 | /**
140 | * @brief Configures APB2 peripheral behavior when the MCU is in Debug mode.
141 | * @param DBGMCU_Periph: specifies the APB2 peripheral.
142 | * This parameter can be any combination of the following values:
143 | * @arg DBGMCU_TIM1_STOP: TIM1 counter stopped when Core is halted
144 | * @arg DBGMCU_TIM8_STOP: TIM8 counter stopped when Core is halted
145 | * @arg DBGMCU_TIM9_STOP: TIM9 counter stopped when Core is halted
146 | * @arg DBGMCU_TIM10_STOP: TIM10 counter stopped when Core is halted
147 | * @arg DBGMCU_TIM11_STOP: TIM11 counter stopped when Core is halted
148 | * @param NewState: new state of the specified peripheral in Debug mode.
149 | * This parameter can be: ENABLE or DISABLE.
150 | * @retval None
151 | */
152 | void DBGMCU_APB2PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState)
153 | {
154 | /* Check the parameters */
155 | assert_param(IS_DBGMCU_APB2PERIPH(DBGMCU_Periph));
156 | assert_param(IS_FUNCTIONAL_STATE(NewState));
157 |
158 | if (NewState != DISABLE)
159 | {
160 | DBGMCU->APB2FZ |= DBGMCU_Periph;
161 | }
162 | else
163 | {
164 | DBGMCU->APB2FZ &= ~DBGMCU_Periph;
165 | }
166 | }
167 |
168 | /**
169 | * @}
170 | */
171 |
172 | /**
173 | * @}
174 | */
175 |
176 | /**
177 | * @}
178 | */
179 |
180 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
181 |
--------------------------------------------------------------------------------
/FWLIB/src/stm32f4xx_exti.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_exti.c
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file provides firmware functions to manage the following
8 | * functionalities of the EXTI peripheral:
9 | * + Initialization and Configuration
10 | * + Interrupts and flags management
11 | *
12 | @verbatim
13 |
14 | ===============================================================================
15 | ##### EXTI features #####
16 | ===============================================================================
17 |
18 | [..] External interrupt/event lines are mapped as following:
19 | (#) All available GPIO pins are connected to the 16 external
20 | interrupt/event lines from EXTI0 to EXTI15.
21 | (#) EXTI line 16 is connected to the PVD Output
22 | (#) EXTI line 17 is connected to the RTC Alarm event
23 | (#) EXTI line 18 is connected to the USB OTG FS Wakeup from suspend event
24 | (#) EXTI line 19 is connected to the Ethernet Wakeup event
25 | (#) EXTI line 20 is connected to the USB OTG HS (configured in FS) Wakeup event
26 | (#) EXTI line 21 is connected to the RTC Tamper and Time Stamp events
27 | (#) EXTI line 22 is connected to the RTC Wakeup event
28 |
29 | ##### How to use this driver #####
30 | ===============================================================================
31 |
32 | [..] In order to use an I/O pin as an external interrupt source, follow steps
33 | below:
34 | (#) Configure the I/O in input mode using GPIO_Init()
35 | (#) Select the input source pin for the EXTI line using SYSCFG_EXTILineConfig()
36 | (#) Select the mode(interrupt, event) and configure the trigger
37 | selection (Rising, falling or both) using EXTI_Init()
38 | (#) Configure NVIC IRQ channel mapped to the EXTI line using NVIC_Init()
39 |
40 | [..]
41 | (@) SYSCFG APB clock must be enabled to get write access to SYSCFG_EXTICRx
42 | registers using RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
43 |
44 | @endverbatim
45 | *
46 | ******************************************************************************
47 | * @attention
48 | *
49 | * © COPYRIGHT 2014 STMicroelectronics
50 | *
51 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
52 | * You may not use this file except in compliance with the License.
53 | * You may obtain a copy of the License at:
54 | *
55 | * http://www.st.com/software_license_agreement_liberty_v2
56 | *
57 | * Unless required by applicable law or agreed to in writing, software
58 | * distributed under the License is distributed on an "AS IS" BASIS,
59 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
60 | * See the License for the specific language governing permissions and
61 | * limitations under the License.
62 | *
63 | ******************************************************************************
64 | */
65 |
66 | /* Includes ------------------------------------------------------------------*/
67 | #include "stm32f4xx_exti.h"
68 |
69 | /** @addtogroup STM32F4xx_StdPeriph_Driver
70 | * @{
71 | */
72 |
73 | /** @defgroup EXTI
74 | * @brief EXTI driver modules
75 | * @{
76 | */
77 |
78 | /* Private typedef -----------------------------------------------------------*/
79 | /* Private define ------------------------------------------------------------*/
80 |
81 | #define EXTI_LINENONE ((uint32_t)0x00000) /* No interrupt selected */
82 |
83 | /* Private macro -------------------------------------------------------------*/
84 | /* Private variables ---------------------------------------------------------*/
85 | /* Private function prototypes -----------------------------------------------*/
86 | /* Private functions ---------------------------------------------------------*/
87 |
88 | /** @defgroup EXTI_Private_Functions
89 | * @{
90 | */
91 |
92 | /** @defgroup EXTI_Group1 Initialization and Configuration functions
93 | * @brief Initialization and Configuration functions
94 | *
95 | @verbatim
96 | ===============================================================================
97 | ##### Initialization and Configuration functions #####
98 | ===============================================================================
99 |
100 | @endverbatim
101 | * @{
102 | */
103 |
104 | /**
105 | * @brief Deinitializes the EXTI peripheral registers to their default reset values.
106 | * @param None
107 | * @retval None
108 | */
109 | void EXTI_DeInit(void)
110 | {
111 | EXTI->IMR = 0x00000000;
112 | EXTI->EMR = 0x00000000;
113 | EXTI->RTSR = 0x00000000;
114 | EXTI->FTSR = 0x00000000;
115 | EXTI->PR = 0x007FFFFF;
116 | }
117 |
118 | /**
119 | * @brief Initializes the EXTI peripheral according to the specified
120 | * parameters in the EXTI_InitStruct.
121 | * @param EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure
122 | * that contains the configuration information for the EXTI peripheral.
123 | * @retval None
124 | */
125 | void EXTI_Init(EXTI_InitTypeDef *EXTI_InitStruct)
126 | {
127 | uint32_t tmp = 0;
128 |
129 | /* Check the parameters */
130 | assert_param(IS_EXTI_MODE(EXTI_InitStruct->EXTI_Mode));
131 | assert_param(IS_EXTI_TRIGGER(EXTI_InitStruct->EXTI_Trigger));
132 | assert_param(IS_EXTI_LINE(EXTI_InitStruct->EXTI_Line));
133 | assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->EXTI_LineCmd));
134 |
135 | tmp = (uint32_t)EXTI_BASE;
136 |
137 | if (EXTI_InitStruct->EXTI_LineCmd != DISABLE)
138 | {
139 | /* Clear EXTI line configuration */
140 | EXTI->IMR &= ~EXTI_InitStruct->EXTI_Line;
141 | EXTI->EMR &= ~EXTI_InitStruct->EXTI_Line;
142 |
143 | tmp += EXTI_InitStruct->EXTI_Mode;
144 |
145 | *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line;
146 |
147 | /* Clear Rising Falling edge configuration */
148 | EXTI->RTSR &= ~EXTI_InitStruct->EXTI_Line;
149 | EXTI->FTSR &= ~EXTI_InitStruct->EXTI_Line;
150 |
151 | /* Select the trigger for the selected external interrupts */
152 | if (EXTI_InitStruct->EXTI_Trigger == EXTI_Trigger_Rising_Falling)
153 | {
154 | /* Rising Falling edge */
155 | EXTI->RTSR |= EXTI_InitStruct->EXTI_Line;
156 | EXTI->FTSR |= EXTI_InitStruct->EXTI_Line;
157 | }
158 | else
159 | {
160 | tmp = (uint32_t)EXTI_BASE;
161 | tmp += EXTI_InitStruct->EXTI_Trigger;
162 |
163 | *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line;
164 | }
165 | }
166 | else
167 | {
168 | tmp += EXTI_InitStruct->EXTI_Mode;
169 |
170 | /* Disable the selected external lines */
171 | *(__IO uint32_t *) tmp &= ~EXTI_InitStruct->EXTI_Line;
172 | }
173 | }
174 |
175 | /**
176 | * @brief Fills each EXTI_InitStruct member with its reset value.
177 | * @param EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure which will
178 | * be initialized.
179 | * @retval None
180 | */
181 | void EXTI_StructInit(EXTI_InitTypeDef *EXTI_InitStruct)
182 | {
183 | EXTI_InitStruct->EXTI_Line = EXTI_LINENONE;
184 | EXTI_InitStruct->EXTI_Mode = EXTI_Mode_Interrupt;
185 | EXTI_InitStruct->EXTI_Trigger = EXTI_Trigger_Falling;
186 | EXTI_InitStruct->EXTI_LineCmd = DISABLE;
187 | }
188 |
189 | /**
190 | * @brief Generates a Software interrupt on selected EXTI line.
191 | * @param EXTI_Line: specifies the EXTI line on which the software interrupt
192 | * will be generated.
193 | * This parameter can be any combination of EXTI_Linex where x can be (0..22)
194 | * @retval None
195 | */
196 | void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line)
197 | {
198 | /* Check the parameters */
199 | assert_param(IS_EXTI_LINE(EXTI_Line));
200 |
201 | EXTI->SWIER |= EXTI_Line;
202 | }
203 |
204 | /**
205 | * @}
206 | */
207 |
208 | /** @defgroup EXTI_Group2 Interrupts and flags management functions
209 | * @brief Interrupts and flags management functions
210 | *
211 | @verbatim
212 | ===============================================================================
213 | ##### Interrupts and flags management functions #####
214 | ===============================================================================
215 |
216 | @endverbatim
217 | * @{
218 | */
219 |
220 | /**
221 | * @brief Checks whether the specified EXTI line flag is set or not.
222 | * @param EXTI_Line: specifies the EXTI line flag to check.
223 | * This parameter can be EXTI_Linex where x can be(0..22)
224 | * @retval The new state of EXTI_Line (SET or RESET).
225 | */
226 | FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line)
227 | {
228 | FlagStatus bitstatus = RESET;
229 | /* Check the parameters */
230 | assert_param(IS_GET_EXTI_LINE(EXTI_Line));
231 |
232 | if ((EXTI->PR & EXTI_Line) != (uint32_t)RESET)
233 | {
234 | bitstatus = SET;
235 | }
236 | else
237 | {
238 | bitstatus = RESET;
239 | }
240 | return bitstatus;
241 | }
242 |
243 | /**
244 | * @brief Clears the EXTI's line pending flags.
245 | * @param EXTI_Line: specifies the EXTI lines flags to clear.
246 | * This parameter can be any combination of EXTI_Linex where x can be (0..22)
247 | * @retval None
248 | */
249 | void EXTI_ClearFlag(uint32_t EXTI_Line)
250 | {
251 | /* Check the parameters */
252 | assert_param(IS_EXTI_LINE(EXTI_Line));
253 |
254 | EXTI->PR = EXTI_Line;
255 | }
256 |
257 | /**
258 | * @brief Checks whether the specified EXTI line is asserted or not.
259 | * @param EXTI_Line: specifies the EXTI line to check.
260 | * This parameter can be EXTI_Linex where x can be(0..22)
261 | * @retval The new state of EXTI_Line (SET or RESET).
262 | */
263 | ITStatus EXTI_GetITStatus(uint32_t EXTI_Line)
264 | {
265 | FlagStatus bitstatus = RESET;
266 | /* Check the parameters */
267 | assert_param(IS_GET_EXTI_LINE(EXTI_Line));
268 |
269 | if ((EXTI->PR & EXTI_Line) != (uint32_t)RESET)
270 | {
271 | bitstatus = SET;
272 | }
273 | else
274 | {
275 | bitstatus = RESET;
276 | }
277 | return bitstatus;
278 |
279 | }
280 |
281 | /**
282 | * @brief Clears the EXTI's line pending bits.
283 | * @param EXTI_Line: specifies the EXTI lines to clear.
284 | * This parameter can be any combination of EXTI_Linex where x can be (0..22)
285 | * @retval None
286 | */
287 | void EXTI_ClearITPendingBit(uint32_t EXTI_Line)
288 | {
289 | /* Check the parameters */
290 | assert_param(IS_EXTI_LINE(EXTI_Line));
291 |
292 | EXTI->PR = EXTI_Line;
293 | }
294 |
295 | /**
296 | * @}
297 | */
298 |
299 | /**
300 | * @}
301 | */
302 |
303 | /**
304 | * @}
305 | */
306 |
307 | /**
308 | * @}
309 | */
310 |
311 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
312 |
--------------------------------------------------------------------------------
/FWLIB/src/stm32f4xx_flash_ramfunc.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_flash_ramfunc.c
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief FLASH RAMFUNC module driver.
8 | * This file provides a FLASH firmware functions which should be
9 | * executed from internal SRAM
10 | * + Stop/Start the flash interface while System Run
11 | * + Enable/Disable the flash sleep while System Run
12 | *
13 | @verbatim
14 | ==============================================================================
15 | ##### APIs executed from Internal RAM #####
16 | ==============================================================================
17 | [..]
18 | *** ARM Compiler ***
19 | --------------------
20 | [..] RAM functions are defined using the toolchain options.
21 | Functions that are be executed in RAM should reside in a separate
22 | source module. Using the 'Options for File' dialog you can simply change
23 | the 'Code / Const' area of a module to a memory space in physical RAM.
24 | Available memory areas are declared in the 'Target' tab of the
25 | Options for Target' dialog.
26 |
27 | *** ICCARM Compiler ***
28 | -----------------------
29 | [..] RAM functions are defined using a specific toolchain keyword "__ramfunc".
30 |
31 | *** GNU Compiler ***
32 | --------------------
33 | [..] RAM functions are defined using a specific toolchain attribute
34 | "__attribute__((section(".RamFunc")))".
35 |
36 | @endverbatim
37 | ******************************************************************************
38 | * @attention
39 | *
40 | * © COPYRIGHT 2014 STMicroelectronics
41 | *
42 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
43 | * You may not use this file except in compliance with the License.
44 | * You may obtain a copy of the License at:
45 | *
46 | * http://www.st.com/software_license_agreement_liberty_v2
47 | *
48 | * Unless required by applicable law or agreed to in writing, software
49 | * distributed under the License is distributed on an "AS IS" BASIS,
50 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
51 | * See the License for the specific language governing permissions and
52 | * limitations under the License.
53 | *
54 | ******************************************************************************
55 | */
56 |
57 | /* Includes ------------------------------------------------------------------*/
58 | #include "stm32f4xx_flash_ramfunc.h"
59 |
60 | /** @addtogroup STM32F4xx_StdPeriph_Driver
61 | * @{
62 | */
63 |
64 | /** @defgroup FLASH RAMFUNC
65 | * @brief FLASH RAMFUNC driver modules
66 | * @{
67 | */
68 |
69 | /* Private typedef -----------------------------------------------------------*/
70 | /* Private define ------------------------------------------------------------*/
71 | /* Private macro -------------------------------------------------------------*/
72 | /* Private variables ---------------------------------------------------------*/
73 | /* Private function prototypes -----------------------------------------------*/
74 | /* Private functions ---------------------------------------------------------*/
75 |
76 | /** @defgroup FLASH_RAMFUNC_Private_Functions
77 | * @{
78 | */
79 |
80 | /** @defgroup FLASH_RAMFUNC_Group1 Peripheral features functions executed from internal RAM
81 | * @brief Peripheral Extended features functions
82 | *
83 | @verbatim
84 |
85 | ===============================================================================
86 | ##### ramfunc functions #####
87 | ===============================================================================
88 | [..]
89 | This subsection provides a set of functions that should be executed from RAM
90 | transfers.
91 |
92 | @endverbatim
93 | * @{
94 | */
95 |
96 | /**
97 | * @brief Start/Stop the flash interface while System Run
98 | * @note This mode is only available for STM32F411xx devices.
99 | * @note This mode could n't be set while executing with the flash itself.
100 | * It should be done with specific routine executed from RAM.
101 | * @param NewState: new state of the Smart Card mode.
102 | * This parameter can be: ENABLE or DISABLE.
103 | * @retval None
104 | */
105 | __RAM_FUNC FLASH_FlashInterfaceCmd(FunctionalState NewState)
106 | {
107 | if (NewState != DISABLE)
108 | {
109 | /* Start the flash interface while System Run */
110 | CLEAR_BIT(PWR->CR, PWR_CR_FISSR);
111 | }
112 | else
113 | {
114 | /* Stop the flash interface while System Run */
115 | SET_BIT(PWR->CR, PWR_CR_FISSR);
116 | }
117 | }
118 |
119 | /**
120 | * @brief Enable/Disable the flash sleep while System Run
121 | * @note This mode is only available for STM32F411xx devices.
122 | * @note This mode could n't be set while executing with the flash itself.
123 | * It should be done with specific routine executed from RAM.
124 | * @param NewState: new state of the Smart Card mode.
125 | * This parameter can be: ENABLE or DISABLE.
126 | * @retval None
127 | */
128 | __RAM_FUNC FLASH_FlashSleepModeCmd(FunctionalState NewState)
129 | {
130 | if (NewState != DISABLE)
131 | {
132 | /* Enable the flash sleep while System Run */
133 | SET_BIT(PWR->CR, PWR_CR_FMSSR);
134 | }
135 | else
136 | {
137 | /* Disable the flash sleep while System Run */
138 | CLEAR_BIT(PWR->CR, PWR_CR_FMSSR);
139 | }
140 | }
141 |
142 | /**
143 | * @}
144 | */
145 |
146 | /**
147 | * @}
148 | */
149 |
150 | /**
151 | * @}
152 | */
153 |
154 | /**
155 | * @}
156 | */
157 |
158 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
159 |
--------------------------------------------------------------------------------
/FWLIB/src/stm32f4xx_hash_md5.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_hash_md5.c
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file provides high level functions to compute the HASH MD5 and
8 | * HMAC MD5 Digest of an input message.
9 | * It uses the stm32f4xx_hash.c/.h drivers to access the STM32F4xx HASH
10 | * peripheral.
11 | *
12 | @verbatim
13 | ===================================================================
14 | ##### How to use this driver #####
15 | ===================================================================
16 | [..]
17 | (#) Enable The HASH controller clock using
18 | RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_HASH, ENABLE); function.
19 |
20 | (#) Calculate the HASH MD5 Digest using HASH_MD5() function.
21 |
22 | (#) Calculate the HMAC MD5 Digest using HMAC_MD5() function.
23 |
24 | @endverbatim
25 | *
26 | ******************************************************************************
27 | * @attention
28 | *
29 | * © COPYRIGHT 2014 STMicroelectronics
30 | *
31 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
32 | * You may not use this file except in compliance with the License.
33 | * You may obtain a copy of the License at:
34 | *
35 | * http://www.st.com/software_license_agreement_liberty_v2
36 | *
37 | * Unless required by applicable law or agreed to in writing, software
38 | * distributed under the License is distributed on an "AS IS" BASIS,
39 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
40 | * See the License for the specific language governing permissions and
41 | * limitations under the License.
42 | *
43 | ******************************************************************************
44 | */
45 |
46 | /* Includes ------------------------------------------------------------------*/
47 | #include "stm32f4xx_hash.h"
48 |
49 | /** @addtogroup STM32F4xx_StdPeriph_Driver
50 | * @{
51 | */
52 |
53 | /** @defgroup HASH
54 | * @brief HASH driver modules
55 | * @{
56 | */
57 |
58 | /* Private typedef -----------------------------------------------------------*/
59 | /* Private define ------------------------------------------------------------*/
60 | #define MD5BUSY_TIMEOUT ((uint32_t) 0x00010000)
61 |
62 | /* Private macro -------------------------------------------------------------*/
63 | /* Private variables ---------------------------------------------------------*/
64 | /* Private function prototypes -----------------------------------------------*/
65 | /* Private functions ---------------------------------------------------------*/
66 |
67 | /** @defgroup HASH_Private_Functions
68 | * @{
69 | */
70 |
71 | /** @defgroup HASH_Group7 High Level MD5 functions
72 | * @brief High Level MD5 Hash and HMAC functions
73 | *
74 | @verbatim
75 | ===============================================================================
76 | ##### High Level MD5 Hash and HMAC functions #####
77 | ===============================================================================
78 |
79 |
80 | @endverbatim
81 | * @{
82 | */
83 |
84 | /**
85 | * @brief Compute the HASH MD5 digest.
86 | * @param Input: pointer to the Input buffer to be treated.
87 | * @param Ilen: length of the Input buffer.
88 | * @param Output: the returned digest
89 | * @retval An ErrorStatus enumeration value:
90 | * - SUCCESS: digest computation done
91 | * - ERROR: digest computation failed
92 | */
93 | ErrorStatus HASH_MD5(uint8_t *Input, uint32_t Ilen, uint8_t Output[16])
94 | {
95 | HASH_InitTypeDef MD5_HASH_InitStructure;
96 | HASH_MsgDigest MD5_MessageDigest;
97 | __IO uint16_t nbvalidbitsdata = 0;
98 | uint32_t i = 0;
99 | __IO uint32_t counter = 0;
100 | uint32_t busystatus = 0;
101 | ErrorStatus status = SUCCESS;
102 | uint32_t inputaddr = (uint32_t)Input;
103 | uint32_t outputaddr = (uint32_t)Output;
104 |
105 |
106 | /* Number of valid bits in last word of the Input data */
107 | nbvalidbitsdata = 8 * (Ilen % 4);
108 |
109 | /* HASH peripheral initialization */
110 | HASH_DeInit();
111 |
112 | /* HASH Configuration */
113 | MD5_HASH_InitStructure.HASH_AlgoSelection = HASH_AlgoSelection_MD5;
114 | MD5_HASH_InitStructure.HASH_AlgoMode = HASH_AlgoMode_HASH;
115 | MD5_HASH_InitStructure.HASH_DataType = HASH_DataType_8b;
116 | HASH_Init(&MD5_HASH_InitStructure);
117 |
118 | /* Configure the number of valid bits in last word of the data */
119 | HASH_SetLastWordValidBitsNbr(nbvalidbitsdata);
120 |
121 | /* Write the Input block in the IN FIFO */
122 | for(i = 0; i < Ilen; i += 4)
123 | {
124 | HASH_DataIn(*(uint32_t *)inputaddr);
125 | inputaddr += 4;
126 | }
127 |
128 | /* Start the HASH processor */
129 | HASH_StartDigest();
130 |
131 | /* wait until the Busy flag is RESET */
132 | do
133 | {
134 | busystatus = HASH_GetFlagStatus(HASH_FLAG_BUSY);
135 | counter++;
136 | }
137 | while ((counter != MD5BUSY_TIMEOUT) && (busystatus != RESET));
138 |
139 | if (busystatus != RESET)
140 | {
141 | status = ERROR;
142 | }
143 | else
144 | {
145 | /* Read the message digest */
146 | HASH_GetDigest(&MD5_MessageDigest);
147 | *(uint32_t *)(outputaddr) = __REV(MD5_MessageDigest.Data[0]);
148 | outputaddr += 4;
149 | *(uint32_t *)(outputaddr) = __REV(MD5_MessageDigest.Data[1]);
150 | outputaddr += 4;
151 | *(uint32_t *)(outputaddr) = __REV(MD5_MessageDigest.Data[2]);
152 | outputaddr += 4;
153 | *(uint32_t *)(outputaddr) = __REV(MD5_MessageDigest.Data[3]);
154 | }
155 | return status;
156 | }
157 |
158 | /**
159 | * @brief Compute the HMAC MD5 digest.
160 | * @param Key: pointer to the Key used for HMAC.
161 | * @param Keylen: length of the Key used for HMAC.
162 | * @param Input: pointer to the Input buffer to be treated.
163 | * @param Ilen: length of the Input buffer.
164 | * @param Output: the returned digest
165 | * @retval An ErrorStatus enumeration value:
166 | * - SUCCESS: digest computation done
167 | * - ERROR: digest computation failed
168 | */
169 | ErrorStatus HMAC_MD5(uint8_t *Key, uint32_t Keylen, uint8_t *Input,
170 | uint32_t Ilen, uint8_t Output[16])
171 | {
172 | HASH_InitTypeDef MD5_HASH_InitStructure;
173 | HASH_MsgDigest MD5_MessageDigest;
174 | __IO uint16_t nbvalidbitsdata = 0;
175 | __IO uint16_t nbvalidbitskey = 0;
176 | uint32_t i = 0;
177 | __IO uint32_t counter = 0;
178 | uint32_t busystatus = 0;
179 | ErrorStatus status = SUCCESS;
180 | uint32_t keyaddr = (uint32_t)Key;
181 | uint32_t inputaddr = (uint32_t)Input;
182 | uint32_t outputaddr = (uint32_t)Output;
183 |
184 | /* Number of valid bits in last word of the Input data */
185 | nbvalidbitsdata = 8 * (Ilen % 4);
186 |
187 | /* Number of valid bits in last word of the Key */
188 | nbvalidbitskey = 8 * (Keylen % 4);
189 |
190 | /* HASH peripheral initialization */
191 | HASH_DeInit();
192 |
193 | /* HASH Configuration */
194 | MD5_HASH_InitStructure.HASH_AlgoSelection = HASH_AlgoSelection_MD5;
195 | MD5_HASH_InitStructure.HASH_AlgoMode = HASH_AlgoMode_HMAC;
196 | MD5_HASH_InitStructure.HASH_DataType = HASH_DataType_8b;
197 | if(Keylen > 64)
198 | {
199 | /* HMAC long Key */
200 | MD5_HASH_InitStructure.HASH_HMACKeyType = HASH_HMACKeyType_LongKey;
201 | }
202 | else
203 | {
204 | /* HMAC short Key */
205 | MD5_HASH_InitStructure.HASH_HMACKeyType = HASH_HMACKeyType_ShortKey;
206 | }
207 | HASH_Init(&MD5_HASH_InitStructure);
208 |
209 | /* Configure the number of valid bits in last word of the Key */
210 | HASH_SetLastWordValidBitsNbr(nbvalidbitskey);
211 |
212 | /* Write the Key */
213 | for(i = 0; i < Keylen; i += 4)
214 | {
215 | HASH_DataIn(*(uint32_t *)keyaddr);
216 | keyaddr += 4;
217 | }
218 |
219 | /* Start the HASH processor */
220 | HASH_StartDigest();
221 |
222 | /* wait until the Busy flag is RESET */
223 | do
224 | {
225 | busystatus = HASH_GetFlagStatus(HASH_FLAG_BUSY);
226 | counter++;
227 | }
228 | while ((counter != MD5BUSY_TIMEOUT) && (busystatus != RESET));
229 |
230 | if (busystatus != RESET)
231 | {
232 | status = ERROR;
233 | }
234 | else
235 | {
236 | /* Configure the number of valid bits in last word of the Input data */
237 | HASH_SetLastWordValidBitsNbr(nbvalidbitsdata);
238 |
239 | /* Write the Input block in the IN FIFO */
240 | for(i = 0; i < Ilen; i += 4)
241 | {
242 | HASH_DataIn(*(uint32_t *)inputaddr);
243 | inputaddr += 4;
244 | }
245 |
246 | /* Start the HASH processor */
247 | HASH_StartDigest();
248 |
249 | /* wait until the Busy flag is RESET */
250 | counter = 0;
251 | do
252 | {
253 | busystatus = HASH_GetFlagStatus(HASH_FLAG_BUSY);
254 | counter++;
255 | }
256 | while ((counter != MD5BUSY_TIMEOUT) && (busystatus != RESET));
257 |
258 | if (busystatus != RESET)
259 | {
260 | status = ERROR;
261 | }
262 | else
263 | {
264 | /* Configure the number of valid bits in last word of the Key */
265 | HASH_SetLastWordValidBitsNbr(nbvalidbitskey);
266 |
267 | /* Write the Key */
268 | keyaddr = (uint32_t)Key;
269 | for(i = 0; i < Keylen; i += 4)
270 | {
271 | HASH_DataIn(*(uint32_t *)keyaddr);
272 | keyaddr += 4;
273 | }
274 |
275 | /* Start the HASH processor */
276 | HASH_StartDigest();
277 |
278 | /* wait until the Busy flag is RESET */
279 | counter = 0;
280 | do
281 | {
282 | busystatus = HASH_GetFlagStatus(HASH_FLAG_BUSY);
283 | counter++;
284 | }
285 | while ((counter != MD5BUSY_TIMEOUT) && (busystatus != RESET));
286 |
287 | if (busystatus != RESET)
288 | {
289 | status = ERROR;
290 | }
291 | else
292 | {
293 | /* Read the message digest */
294 | HASH_GetDigest(&MD5_MessageDigest);
295 | *(uint32_t *)(outputaddr) = __REV(MD5_MessageDigest.Data[0]);
296 | outputaddr += 4;
297 | *(uint32_t *)(outputaddr) = __REV(MD5_MessageDigest.Data[1]);
298 | outputaddr += 4;
299 | *(uint32_t *)(outputaddr) = __REV(MD5_MessageDigest.Data[2]);
300 | outputaddr += 4;
301 | *(uint32_t *)(outputaddr) = __REV(MD5_MessageDigest.Data[3]);
302 | }
303 | }
304 | }
305 | return status;
306 | }
307 | /**
308 | * @}
309 | */
310 |
311 | /**
312 | * @}
313 | */
314 |
315 | /**
316 | * @}
317 | */
318 |
319 | /**
320 | * @}
321 | */
322 |
323 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
324 |
325 |
--------------------------------------------------------------------------------
/FWLIB/src/stm32f4xx_hash_sha1.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_hash_sha1.c
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file provides high level functions to compute the HASH SHA1 and
8 | * HMAC SHA1 Digest of an input message.
9 | * It uses the stm32f4xx_hash.c/.h drivers to access the STM32F4xx HASH
10 | * peripheral.
11 | *
12 | @verbatim
13 | ===================================================================
14 | ##### How to use this driver #####
15 | ===================================================================
16 | [..]
17 | (#) Enable The HASH controller clock using
18 | RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_HASH, ENABLE); function.
19 |
20 | (#) Calculate the HASH SHA1 Digest using HASH_SHA1() function.
21 |
22 | (#) Calculate the HMAC SHA1 Digest using HMAC_SHA1() function.
23 |
24 | @endverbatim
25 | *
26 | ******************************************************************************
27 | * @attention
28 | *
29 | * © COPYRIGHT 2014 STMicroelectronics
30 | *
31 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
32 | * You may not use this file except in compliance with the License.
33 | * You may obtain a copy of the License at:
34 | *
35 | * http://www.st.com/software_license_agreement_liberty_v2
36 | *
37 | * Unless required by applicable law or agreed to in writing, software
38 | * distributed under the License is distributed on an "AS IS" BASIS,
39 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
40 | * See the License for the specific language governing permissions and
41 | * limitations under the License.
42 | *
43 | ******************************************************************************
44 | */
45 |
46 | /* Includes ------------------------------------------------------------------*/
47 | #include "stm32f4xx_hash.h"
48 |
49 | /** @addtogroup STM32F4xx_StdPeriph_Driver
50 | * @{
51 | */
52 |
53 | /** @defgroup HASH
54 | * @brief HASH driver modules
55 | * @{
56 | */
57 |
58 | /* Private typedef -----------------------------------------------------------*/
59 | /* Private define ------------------------------------------------------------*/
60 | #define SHA1BUSY_TIMEOUT ((uint32_t) 0x00010000)
61 |
62 | /* Private macro -------------------------------------------------------------*/
63 | /* Private variables ---------------------------------------------------------*/
64 | /* Private function prototypes -----------------------------------------------*/
65 | /* Private functions ---------------------------------------------------------*/
66 |
67 | /** @defgroup HASH_Private_Functions
68 | * @{
69 | */
70 |
71 | /** @defgroup HASH_Group6 High Level SHA1 functions
72 | * @brief High Level SHA1 Hash and HMAC functions
73 | *
74 | @verbatim
75 | ===============================================================================
76 | ##### High Level SHA1 Hash and HMAC functions #####
77 | ===============================================================================
78 |
79 |
80 | @endverbatim
81 | * @{
82 | */
83 |
84 | /**
85 | * @brief Compute the HASH SHA1 digest.
86 | * @param Input: pointer to the Input buffer to be treated.
87 | * @param Ilen: length of the Input buffer.
88 | * @param Output: the returned digest
89 | * @retval An ErrorStatus enumeration value:
90 | * - SUCCESS: digest computation done
91 | * - ERROR: digest computation failed
92 | */
93 | ErrorStatus HASH_SHA1(uint8_t *Input, uint32_t Ilen, uint8_t Output[20])
94 | {
95 | HASH_InitTypeDef SHA1_HASH_InitStructure;
96 | HASH_MsgDigest SHA1_MessageDigest;
97 | __IO uint16_t nbvalidbitsdata = 0;
98 | uint32_t i = 0;
99 | __IO uint32_t counter = 0;
100 | uint32_t busystatus = 0;
101 | ErrorStatus status = SUCCESS;
102 | uint32_t inputaddr = (uint32_t)Input;
103 | uint32_t outputaddr = (uint32_t)Output;
104 |
105 | /* Number of valid bits in last word of the Input data */
106 | nbvalidbitsdata = 8 * (Ilen % 4);
107 |
108 | /* HASH peripheral initialization */
109 | HASH_DeInit();
110 |
111 | /* HASH Configuration */
112 | SHA1_HASH_InitStructure.HASH_AlgoSelection = HASH_AlgoSelection_SHA1;
113 | SHA1_HASH_InitStructure.HASH_AlgoMode = HASH_AlgoMode_HASH;
114 | SHA1_HASH_InitStructure.HASH_DataType = HASH_DataType_8b;
115 | HASH_Init(&SHA1_HASH_InitStructure);
116 |
117 | /* Configure the number of valid bits in last word of the data */
118 | HASH_SetLastWordValidBitsNbr(nbvalidbitsdata);
119 |
120 | /* Write the Input block in the IN FIFO */
121 | for(i = 0; i < Ilen; i += 4)
122 | {
123 | HASH_DataIn(*(uint32_t *)inputaddr);
124 | inputaddr += 4;
125 | }
126 |
127 | /* Start the HASH processor */
128 | HASH_StartDigest();
129 |
130 | /* wait until the Busy flag is RESET */
131 | do
132 | {
133 | busystatus = HASH_GetFlagStatus(HASH_FLAG_BUSY);
134 | counter++;
135 | }
136 | while ((counter != SHA1BUSY_TIMEOUT) && (busystatus != RESET));
137 |
138 | if (busystatus != RESET)
139 | {
140 | status = ERROR;
141 | }
142 | else
143 | {
144 | /* Read the message digest */
145 | HASH_GetDigest(&SHA1_MessageDigest);
146 | *(uint32_t *)(outputaddr) = __REV(SHA1_MessageDigest.Data[0]);
147 | outputaddr += 4;
148 | *(uint32_t *)(outputaddr) = __REV(SHA1_MessageDigest.Data[1]);
149 | outputaddr += 4;
150 | *(uint32_t *)(outputaddr) = __REV(SHA1_MessageDigest.Data[2]);
151 | outputaddr += 4;
152 | *(uint32_t *)(outputaddr) = __REV(SHA1_MessageDigest.Data[3]);
153 | outputaddr += 4;
154 | *(uint32_t *)(outputaddr) = __REV(SHA1_MessageDigest.Data[4]);
155 | }
156 | return status;
157 | }
158 |
159 | /**
160 | * @brief Compute the HMAC SHA1 digest.
161 | * @param Key: pointer to the Key used for HMAC.
162 | * @param Keylen: length of the Key used for HMAC.
163 | * @param Input: pointer to the Input buffer to be treated.
164 | * @param Ilen: length of the Input buffer.
165 | * @param Output: the returned digest
166 | * @retval An ErrorStatus enumeration value:
167 | * - SUCCESS: digest computation done
168 | * - ERROR: digest computation failed
169 | */
170 | ErrorStatus HMAC_SHA1(uint8_t *Key, uint32_t Keylen, uint8_t *Input,
171 | uint32_t Ilen, uint8_t Output[20])
172 | {
173 | HASH_InitTypeDef SHA1_HASH_InitStructure;
174 | HASH_MsgDigest SHA1_MessageDigest;
175 | __IO uint16_t nbvalidbitsdata = 0;
176 | __IO uint16_t nbvalidbitskey = 0;
177 | uint32_t i = 0;
178 | __IO uint32_t counter = 0;
179 | uint32_t busystatus = 0;
180 | ErrorStatus status = SUCCESS;
181 | uint32_t keyaddr = (uint32_t)Key;
182 | uint32_t inputaddr = (uint32_t)Input;
183 | uint32_t outputaddr = (uint32_t)Output;
184 |
185 | /* Number of valid bits in last word of the Input data */
186 | nbvalidbitsdata = 8 * (Ilen % 4);
187 |
188 | /* Number of valid bits in last word of the Key */
189 | nbvalidbitskey = 8 * (Keylen % 4);
190 |
191 | /* HASH peripheral initialization */
192 | HASH_DeInit();
193 |
194 | /* HASH Configuration */
195 | SHA1_HASH_InitStructure.HASH_AlgoSelection = HASH_AlgoSelection_SHA1;
196 | SHA1_HASH_InitStructure.HASH_AlgoMode = HASH_AlgoMode_HMAC;
197 | SHA1_HASH_InitStructure.HASH_DataType = HASH_DataType_8b;
198 | if(Keylen > 64)
199 | {
200 | /* HMAC long Key */
201 | SHA1_HASH_InitStructure.HASH_HMACKeyType = HASH_HMACKeyType_LongKey;
202 | }
203 | else
204 | {
205 | /* HMAC short Key */
206 | SHA1_HASH_InitStructure.HASH_HMACKeyType = HASH_HMACKeyType_ShortKey;
207 | }
208 | HASH_Init(&SHA1_HASH_InitStructure);
209 |
210 | /* Configure the number of valid bits in last word of the Key */
211 | HASH_SetLastWordValidBitsNbr(nbvalidbitskey);
212 |
213 | /* Write the Key */
214 | for(i = 0; i < Keylen; i += 4)
215 | {
216 | HASH_DataIn(*(uint32_t *)keyaddr);
217 | keyaddr += 4;
218 | }
219 |
220 | /* Start the HASH processor */
221 | HASH_StartDigest();
222 |
223 | /* wait until the Busy flag is RESET */
224 | do
225 | {
226 | busystatus = HASH_GetFlagStatus(HASH_FLAG_BUSY);
227 | counter++;
228 | }
229 | while ((counter != SHA1BUSY_TIMEOUT) && (busystatus != RESET));
230 |
231 | if (busystatus != RESET)
232 | {
233 | status = ERROR;
234 | }
235 | else
236 | {
237 | /* Configure the number of valid bits in last word of the Input data */
238 | HASH_SetLastWordValidBitsNbr(nbvalidbitsdata);
239 |
240 | /* Write the Input block in the IN FIFO */
241 | for(i = 0; i < Ilen; i += 4)
242 | {
243 | HASH_DataIn(*(uint32_t *)inputaddr);
244 | inputaddr += 4;
245 | }
246 |
247 | /* Start the HASH processor */
248 | HASH_StartDigest();
249 |
250 |
251 | /* wait until the Busy flag is RESET */
252 | counter = 0;
253 | do
254 | {
255 | busystatus = HASH_GetFlagStatus(HASH_FLAG_BUSY);
256 | counter++;
257 | }
258 | while ((counter != SHA1BUSY_TIMEOUT) && (busystatus != RESET));
259 |
260 | if (busystatus != RESET)
261 | {
262 | status = ERROR;
263 | }
264 | else
265 | {
266 | /* Configure the number of valid bits in last word of the Key */
267 | HASH_SetLastWordValidBitsNbr(nbvalidbitskey);
268 |
269 | /* Write the Key */
270 | keyaddr = (uint32_t)Key;
271 | for(i = 0; i < Keylen; i += 4)
272 | {
273 | HASH_DataIn(*(uint32_t *)keyaddr);
274 | keyaddr += 4;
275 | }
276 |
277 | /* Start the HASH processor */
278 | HASH_StartDigest();
279 |
280 | /* wait until the Busy flag is RESET */
281 | counter = 0;
282 | do
283 | {
284 | busystatus = HASH_GetFlagStatus(HASH_FLAG_BUSY);
285 | counter++;
286 | }
287 | while ((counter != SHA1BUSY_TIMEOUT) && (busystatus != RESET));
288 |
289 | if (busystatus != RESET)
290 | {
291 | status = ERROR;
292 | }
293 | else
294 | {
295 | /* Read the message digest */
296 | HASH_GetDigest(&SHA1_MessageDigest);
297 | *(uint32_t *)(outputaddr) = __REV(SHA1_MessageDigest.Data[0]);
298 | outputaddr += 4;
299 | *(uint32_t *)(outputaddr) = __REV(SHA1_MessageDigest.Data[1]);
300 | outputaddr += 4;
301 | *(uint32_t *)(outputaddr) = __REV(SHA1_MessageDigest.Data[2]);
302 | outputaddr += 4;
303 | *(uint32_t *)(outputaddr) = __REV(SHA1_MessageDigest.Data[3]);
304 | outputaddr += 4;
305 | *(uint32_t *)(outputaddr) = __REV(SHA1_MessageDigest.Data[4]);
306 | }
307 | }
308 | }
309 | return status;
310 | }
311 | /**
312 | * @}
313 | */
314 |
315 | /**
316 | * @}
317 | */
318 |
319 | /**
320 | * @}
321 | */
322 |
323 | /**
324 | * @}
325 | */
326 |
327 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
328 |
--------------------------------------------------------------------------------
/FWLIB/src/stm32f4xx_iwdg.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_iwdg.c
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file provides firmware functions to manage the following
8 | * functionalities of the Independent watchdog (IWDG) peripheral:
9 | * + Prescaler and Counter configuration
10 | * + IWDG activation
11 | * + Flag management
12 | *
13 | @verbatim
14 | ===============================================================================
15 | ##### IWDG features #####
16 | ===============================================================================
17 | [..]
18 | The IWDG can be started by either software or hardware (configurable
19 | through option byte).
20 |
21 | The IWDG is clocked by its own dedicated low-speed clock (LSI) and
22 | thus stays active even if the main clock fails.
23 | Once the IWDG is started, the LSI is forced ON and cannot be disabled
24 | (LSI cannot be disabled too), and the counter starts counting down from
25 | the reset value of 0xFFF. When it reaches the end of count value (0x000)
26 | a system reset is generated.
27 | The IWDG counter should be reloaded at regular intervals to prevent
28 | an MCU reset.
29 |
30 | The IWDG is implemented in the VDD voltage domain that is still functional
31 | in STOP and STANDBY mode (IWDG reset can wake-up from STANDBY).
32 |
33 | IWDGRST flag in RCC_CSR register can be used to inform when a IWDG
34 | reset occurs.
35 |
36 | Min-max timeout value @32KHz (LSI): ~125us / ~32.7s
37 | The IWDG timeout may vary due to LSI frequency dispersion. STM32F4xx
38 | devices provide the capability to measure the LSI frequency (LSI clock
39 | connected internally to TIM5 CH4 input capture). The measured value
40 | can be used to have an IWDG timeout with an acceptable accuracy.
41 | For more information, please refer to the STM32F4xx Reference manual
42 |
43 | ##### How to use this driver #####
44 | ===============================================================================
45 | [..]
46 | (#) Enable write access to IWDG_PR and IWDG_RLR registers using
47 | IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable) function
48 |
49 | (#) Configure the IWDG prescaler using IWDG_SetPrescaler() function
50 |
51 | (#) Configure the IWDG counter value using IWDG_SetReload() function.
52 | This value will be loaded in the IWDG counter each time the counter
53 | is reloaded, then the IWDG will start counting down from this value.
54 |
55 | (#) Start the IWDG using IWDG_Enable() function, when the IWDG is used
56 | in software mode (no need to enable the LSI, it will be enabled
57 | by hardware)
58 |
59 | (#) Then the application program must reload the IWDG counter at regular
60 | intervals during normal operation to prevent an MCU reset, using
61 | IWDG_ReloadCounter() function.
62 |
63 | @endverbatim
64 | ******************************************************************************
65 | * @attention
66 | *
67 | * © COPYRIGHT 2014 STMicroelectronics
68 | *
69 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
70 | * You may not use this file except in compliance with the License.
71 | * You may obtain a copy of the License at:
72 | *
73 | * http://www.st.com/software_license_agreement_liberty_v2
74 | *
75 | * Unless required by applicable law or agreed to in writing, software
76 | * distributed under the License is distributed on an "AS IS" BASIS,
77 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
78 | * See the License for the specific language governing permissions and
79 | * limitations under the License.
80 | *
81 | ******************************************************************************
82 | */
83 |
84 | /* Includes ------------------------------------------------------------------*/
85 | #include "stm32f4xx_iwdg.h"
86 |
87 | /** @addtogroup STM32F4xx_StdPeriph_Driver
88 | * @{
89 | */
90 |
91 | /** @defgroup IWDG
92 | * @brief IWDG driver modules
93 | * @{
94 | */
95 |
96 | /* Private typedef -----------------------------------------------------------*/
97 | /* Private define ------------------------------------------------------------*/
98 |
99 | /* KR register bit mask */
100 | #define KR_KEY_RELOAD ((uint16_t)0xAAAA)
101 | #define KR_KEY_ENABLE ((uint16_t)0xCCCC)
102 |
103 | /* Private macro -------------------------------------------------------------*/
104 | /* Private variables ---------------------------------------------------------*/
105 | /* Private function prototypes -----------------------------------------------*/
106 | /* Private functions ---------------------------------------------------------*/
107 |
108 | /** @defgroup IWDG_Private_Functions
109 | * @{
110 | */
111 |
112 | /** @defgroup IWDG_Group1 Prescaler and Counter configuration functions
113 | * @brief Prescaler and Counter configuration functions
114 | *
115 | @verbatim
116 | ===============================================================================
117 | ##### Prescaler and Counter configuration functions #####
118 | ===============================================================================
119 |
120 | @endverbatim
121 | * @{
122 | */
123 |
124 | /**
125 | * @brief Enables or disables write access to IWDG_PR and IWDG_RLR registers.
126 | * @param IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers.
127 | * This parameter can be one of the following values:
128 | * @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers
129 | * @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers
130 | * @retval None
131 | */
132 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess)
133 | {
134 | /* Check the parameters */
135 | assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess));
136 | IWDG->KR = IWDG_WriteAccess;
137 | }
138 |
139 | /**
140 | * @brief Sets IWDG Prescaler value.
141 | * @param IWDG_Prescaler: specifies the IWDG Prescaler value.
142 | * This parameter can be one of the following values:
143 | * @arg IWDG_Prescaler_4: IWDG prescaler set to 4
144 | * @arg IWDG_Prescaler_8: IWDG prescaler set to 8
145 | * @arg IWDG_Prescaler_16: IWDG prescaler set to 16
146 | * @arg IWDG_Prescaler_32: IWDG prescaler set to 32
147 | * @arg IWDG_Prescaler_64: IWDG prescaler set to 64
148 | * @arg IWDG_Prescaler_128: IWDG prescaler set to 128
149 | * @arg IWDG_Prescaler_256: IWDG prescaler set to 256
150 | * @retval None
151 | */
152 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler)
153 | {
154 | /* Check the parameters */
155 | assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler));
156 | IWDG->PR = IWDG_Prescaler;
157 | }
158 |
159 | /**
160 | * @brief Sets IWDG Reload value.
161 | * @param Reload: specifies the IWDG Reload value.
162 | * This parameter must be a number between 0 and 0x0FFF.
163 | * @retval None
164 | */
165 | void IWDG_SetReload(uint16_t Reload)
166 | {
167 | /* Check the parameters */
168 | assert_param(IS_IWDG_RELOAD(Reload));
169 | IWDG->RLR = Reload;
170 | }
171 |
172 | /**
173 | * @brief Reloads IWDG counter with value defined in the reload register
174 | * (write access to IWDG_PR and IWDG_RLR registers disabled).
175 | * @param None
176 | * @retval None
177 | */
178 | void IWDG_ReloadCounter(void)
179 | {
180 | IWDG->KR = KR_KEY_RELOAD;
181 | }
182 |
183 | /**
184 | * @}
185 | */
186 |
187 | /** @defgroup IWDG_Group2 IWDG activation function
188 | * @brief IWDG activation function
189 | *
190 | @verbatim
191 | ===============================================================================
192 | ##### IWDG activation function #####
193 | ===============================================================================
194 |
195 | @endverbatim
196 | * @{
197 | */
198 |
199 | /**
200 | * @brief Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled).
201 | * @param None
202 | * @retval None
203 | */
204 | void IWDG_Enable(void)
205 | {
206 | IWDG->KR = KR_KEY_ENABLE;
207 | }
208 |
209 | /**
210 | * @}
211 | */
212 |
213 | /** @defgroup IWDG_Group3 Flag management function
214 | * @brief Flag management function
215 | *
216 | @verbatim
217 | ===============================================================================
218 | ##### Flag management function #####
219 | ===============================================================================
220 |
221 | @endverbatim
222 | * @{
223 | */
224 |
225 | /**
226 | * @brief Checks whether the specified IWDG flag is set or not.
227 | * @param IWDG_FLAG: specifies the flag to check.
228 | * This parameter can be one of the following values:
229 | * @arg IWDG_FLAG_PVU: Prescaler Value Update on going
230 | * @arg IWDG_FLAG_RVU: Reload Value Update on going
231 | * @retval The new state of IWDG_FLAG (SET or RESET).
232 | */
233 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG)
234 | {
235 | FlagStatus bitstatus = RESET;
236 | /* Check the parameters */
237 | assert_param(IS_IWDG_FLAG(IWDG_FLAG));
238 | if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET)
239 | {
240 | bitstatus = SET;
241 | }
242 | else
243 | {
244 | bitstatus = RESET;
245 | }
246 | /* Return the flag status */
247 | return bitstatus;
248 | }
249 |
250 | /**
251 | * @}
252 | */
253 |
254 | /**
255 | * @}
256 | */
257 |
258 | /**
259 | * @}
260 | */
261 |
262 | /**
263 | * @}
264 | */
265 |
266 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
267 |
--------------------------------------------------------------------------------
/FWLIB/src/stm32f4xx_syscfg.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_syscfg.c
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file provides firmware functions to manage the SYSCFG peripheral.
8 | *
9 | @verbatim
10 |
11 | ===============================================================================
12 | ##### How to use this driver #####
13 | ===============================================================================
14 | [..] This driver provides functions for:
15 |
16 | (#) Remapping the memory accessible in the code area using SYSCFG_MemoryRemapConfig()
17 |
18 | (#) Swapping the internal flash Bank1 and Bank2 this features is only visible for
19 | STM32F42xxx/43xxx devices Devices.
20 |
21 | (#) Manage the EXTI lines connection to the GPIOs using SYSCFG_EXTILineConfig()
22 |
23 | (#) Select the ETHERNET media interface (RMII/RII) using SYSCFG_ETH_MediaInterfaceConfig()
24 |
25 | -@- SYSCFG APB clock must be enabled to get write access to SYSCFG registers,
26 | using RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
27 |
28 | @endverbatim
29 | ******************************************************************************
30 | * @attention
31 | *
32 | * © COPYRIGHT 2014 STMicroelectronics
33 | *
34 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
35 | * You may not use this file except in compliance with the License.
36 | * You may obtain a copy of the License at:
37 | *
38 | * http://www.st.com/software_license_agreement_liberty_v2
39 | *
40 | * Unless required by applicable law or agreed to in writing, software
41 | * distributed under the License is distributed on an "AS IS" BASIS,
42 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
43 | * See the License for the specific language governing permissions and
44 | * limitations under the License.
45 | *
46 | ******************************************************************************
47 | */
48 |
49 | /* Includes ------------------------------------------------------------------*/
50 | #include "stm32f4xx_syscfg.h"
51 | #include "stm32f4xx_rcc.h"
52 |
53 | /** @addtogroup STM32F4xx_StdPeriph_Driver
54 | * @{
55 | */
56 |
57 | /** @defgroup SYSCFG
58 | * @brief SYSCFG driver modules
59 | * @{
60 | */
61 |
62 | /* Private typedef -----------------------------------------------------------*/
63 | /* Private define ------------------------------------------------------------*/
64 | /* ------------ RCC registers bit address in the alias region ----------- */
65 | #define SYSCFG_OFFSET (SYSCFG_BASE - PERIPH_BASE)
66 | /* --- MEMRMP Register ---*/
67 | /* Alias word address of UFB_MODE bit */
68 | #define MEMRMP_OFFSET SYSCFG_OFFSET
69 | #define UFB_MODE_BitNumber ((uint8_t)0x8)
70 | #define UFB_MODE_BB (PERIPH_BB_BASE + (MEMRMP_OFFSET * 32) + (UFB_MODE_BitNumber * 4))
71 |
72 |
73 | /* --- PMC Register ---*/
74 | /* Alias word address of MII_RMII_SEL bit */
75 | #define PMC_OFFSET (SYSCFG_OFFSET + 0x04)
76 | #define MII_RMII_SEL_BitNumber ((uint8_t)0x17)
77 | #define PMC_MII_RMII_SEL_BB (PERIPH_BB_BASE + (PMC_OFFSET * 32) + (MII_RMII_SEL_BitNumber * 4))
78 |
79 | /* --- CMPCR Register ---*/
80 | /* Alias word address of CMP_PD bit */
81 | #define CMPCR_OFFSET (SYSCFG_OFFSET + 0x20)
82 | #define CMP_PD_BitNumber ((uint8_t)0x00)
83 | #define CMPCR_CMP_PD_BB (PERIPH_BB_BASE + (CMPCR_OFFSET * 32) + (CMP_PD_BitNumber * 4))
84 |
85 | /* Private macro -------------------------------------------------------------*/
86 | /* Private variables ---------------------------------------------------------*/
87 | /* Private function prototypes -----------------------------------------------*/
88 | /* Private functions ---------------------------------------------------------*/
89 |
90 | /** @defgroup SYSCFG_Private_Functions
91 | * @{
92 | */
93 |
94 | /**
95 | * @brief Deinitializes the Alternate Functions (remap and EXTI configuration)
96 | * registers to their default reset values.
97 | * @param None
98 | * @retval None
99 | */
100 | void SYSCFG_DeInit(void)
101 | {
102 | RCC_APB2PeriphResetCmd(RCC_APB2Periph_SYSCFG, ENABLE);
103 | RCC_APB2PeriphResetCmd(RCC_APB2Periph_SYSCFG, DISABLE);
104 | }
105 |
106 | /**
107 | * @brief Changes the mapping of the specified pin.
108 | * @param SYSCFG_Memory: selects the memory remapping.
109 | * This parameter can be one of the following values:
110 | * @arg SYSCFG_MemoryRemap_Flash: Main Flash memory mapped at 0x00000000
111 | * @arg SYSCFG_MemoryRemap_SystemFlash: System Flash memory mapped at 0x00000000
112 | * @arg SYSCFG_MemoryRemap_FSMC: FSMC (Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000 for STM32F405xx/407xx and STM32F415xx/417xx devices.
113 | * @arg SYSCFG_MemoryRemap_FMC: FMC (Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000 for STM32F42xxx/43xxx devices.
114 | * @arg SYSCFG_MemoryRemap_SRAM: Embedded SRAM (112kB) mapped at 0x00000000
115 | * @arg SYSCFG_MemoryRemap_SDRAM: FMC (External SDRAM) mapped at 0x00000000 for STM32F42xxx/43xxx devices.
116 | * @retval None
117 | */
118 | void SYSCFG_MemoryRemapConfig(uint8_t SYSCFG_MemoryRemap)
119 | {
120 | /* Check the parameters */
121 | assert_param(IS_SYSCFG_MEMORY_REMAP_CONFING(SYSCFG_MemoryRemap));
122 |
123 | SYSCFG->MEMRMP = SYSCFG_MemoryRemap;
124 | }
125 |
126 | /**
127 | * @brief Enables or disables the Interal FLASH Bank Swapping.
128 | *
129 | * @note This function can be used only for STM32F42xxx/43xxx devices.
130 | *
131 | * @param NewState: new state of Interal FLASH Bank swapping.
132 | * This parameter can be one of the following values:
133 | * @arg ENABLE: Flash Bank2 mapped at 0x08000000 (and aliased @0x00000000)
134 | * and Flash Bank1 mapped at 0x08100000 (and aliased at 0x00100000)
135 | * @arg DISABLE:(the default state) Flash Bank1 mapped at 0x08000000 (and aliased @0x0000 0000)
136 | and Flash Bank2 mapped at 0x08100000 (and aliased at 0x00100000)
137 | * @retval None
138 | */
139 | void SYSCFG_MemorySwappingBank(FunctionalState NewState)
140 | {
141 | /* Check the parameters */
142 | assert_param(IS_FUNCTIONAL_STATE(NewState));
143 |
144 | *(__IO uint32_t *) UFB_MODE_BB = (uint32_t)NewState;
145 | }
146 |
147 | /**
148 | * @brief Selects the GPIO pin used as EXTI Line.
149 | * @param EXTI_PortSourceGPIOx : selects the GPIO port to be used as source for
150 | * EXTI lines where x can be (A..K) for STM32F42xxx/43xxx devices, (A..I)
151 | * for STM32F405xx/407xx and STM32F415xx/417xx devices or (A, B, C, D and H)
152 | * for STM32401xx devices.
153 | *
154 | * @param EXTI_PinSourcex: specifies the EXTI line to be configured.
155 | * This parameter can be EXTI_PinSourcex where x can be (0..15, except
156 | * for EXTI_PortSourceGPIOI x can be (0..11) for STM32F405xx/407xx
157 | * and STM32F405xx/407xx devices and for EXTI_PortSourceGPIOK x can
158 | * be (0..7) for STM32F42xxx/43xxx devices.
159 | *
160 | * @retval None
161 | */
162 | void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex)
163 | {
164 | uint32_t tmp = 0x00;
165 |
166 | /* Check the parameters */
167 | assert_param(IS_EXTI_PORT_SOURCE(EXTI_PortSourceGPIOx));
168 | assert_param(IS_EXTI_PIN_SOURCE(EXTI_PinSourcex));
169 |
170 | tmp = ((uint32_t)0x0F) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03));
171 | SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] &= ~tmp;
172 | SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] |= (((uint32_t)EXTI_PortSourceGPIOx) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03)));
173 | }
174 |
175 | /**
176 | * @brief Selects the ETHERNET media interface
177 | * @param SYSCFG_ETH_MediaInterface: specifies the Media Interface mode.
178 | * This parameter can be one of the following values:
179 | * @arg SYSCFG_ETH_MediaInterface_MII: MII mode selected
180 | * @arg SYSCFG_ETH_MediaInterface_RMII: RMII mode selected
181 | * @retval None
182 | */
183 | void SYSCFG_ETH_MediaInterfaceConfig(uint32_t SYSCFG_ETH_MediaInterface)
184 | {
185 | assert_param(IS_SYSCFG_ETH_MEDIA_INTERFACE(SYSCFG_ETH_MediaInterface));
186 | /* Configure MII_RMII selection bit */
187 | *(__IO uint32_t *) PMC_MII_RMII_SEL_BB = SYSCFG_ETH_MediaInterface;
188 | }
189 |
190 | /**
191 | * @brief Enables or disables the I/O Compensation Cell.
192 | * @note The I/O compensation cell can be used only when the device supply
193 | * voltage ranges from 2.4 to 3.6 V.
194 | * @param NewState: new state of the I/O Compensation Cell.
195 | * This parameter can be one of the following values:
196 | * @arg ENABLE: I/O compensation cell enabled
197 | * @arg DISABLE: I/O compensation cell power-down mode
198 | * @retval None
199 | */
200 | void SYSCFG_CompensationCellCmd(FunctionalState NewState)
201 | {
202 | /* Check the parameters */
203 | assert_param(IS_FUNCTIONAL_STATE(NewState));
204 |
205 | *(__IO uint32_t *) CMPCR_CMP_PD_BB = (uint32_t)NewState;
206 | }
207 |
208 | /**
209 | * @brief Checks whether the I/O Compensation Cell ready flag is set or not.
210 | * @param None
211 | * @retval The new state of the I/O Compensation Cell ready flag (SET or RESET)
212 | */
213 | FlagStatus SYSCFG_GetCompensationCellStatus(void)
214 | {
215 | FlagStatus bitstatus = RESET;
216 |
217 | if ((SYSCFG->CMPCR & SYSCFG_CMPCR_READY ) != (uint32_t)RESET)
218 | {
219 | bitstatus = SET;
220 | }
221 | else
222 | {
223 | bitstatus = RESET;
224 | }
225 | return bitstatus;
226 | }
227 |
228 | /**
229 | * @}
230 | */
231 |
232 | /**
233 | * @}
234 | */
235 |
236 | /**
237 | * @}
238 | */
239 |
240 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
241 |
--------------------------------------------------------------------------------
/FWLIB/src/stm32f4xx_wwdg.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_wwdg.c
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file provides firmware functions to manage the following
8 | * functionalities of the Window watchdog (WWDG) peripheral:
9 | * + Prescaler, Refresh window and Counter configuration
10 | * + WWDG activation
11 | * + Interrupts and flags management
12 | *
13 | @verbatim
14 | ===============================================================================
15 | ##### WWDG features #####
16 | ===============================================================================
17 | [..]
18 | Once enabled the WWDG generates a system reset on expiry of a programmed
19 | time period, unless the program refreshes the counter (downcounter)
20 | before to reach 0x3F value (i.e. a reset is generated when the counter
21 | value rolls over from 0x40 to 0x3F).
22 | An MCU reset is also generated if the counter value is refreshed
23 | before the counter has reached the refresh window value. This
24 | implies that the counter must be refreshed in a limited window.
25 |
26 | Once enabled the WWDG cannot be disabled except by a system reset.
27 |
28 | WWDGRST flag in RCC_CSR register can be used to inform when a WWDG
29 | reset occurs.
30 |
31 | The WWDG counter input clock is derived from the APB clock divided
32 | by a programmable prescaler.
33 |
34 | WWDG counter clock = PCLK1 / Prescaler
35 | WWDG timeout = (WWDG counter clock) * (counter value)
36 |
37 | Min-max timeout value @42 MHz(PCLK1): ~97.5 us / ~49.9 ms
38 |
39 | ##### How to use this driver #####
40 | ===============================================================================
41 | [..]
42 | (#) Enable WWDG clock using RCC_APB1PeriphClockCmd(RCC_APB1Periph_WWDG, ENABLE) function
43 |
44 | (#) Configure the WWDG prescaler using WWDG_SetPrescaler() function
45 |
46 | (#) Configure the WWDG refresh window using WWDG_SetWindowValue() function
47 |
48 | (#) Set the WWDG counter value and start it using WWDG_Enable() function.
49 | When the WWDG is enabled the counter value should be configured to
50 | a value greater than 0x40 to prevent generating an immediate reset.
51 |
52 | (#) Optionally you can enable the Early wakeup interrupt which is
53 | generated when the counter reach 0x40.
54 | Once enabled this interrupt cannot be disabled except by a system reset.
55 |
56 | (#) Then the application program must refresh the WWDG counter at regular
57 | intervals during normal operation to prevent an MCU reset, using
58 | WWDG_SetCounter() function. This operation must occur only when
59 | the counter value is lower than the refresh window value,
60 | programmed using WWDG_SetWindowValue().
61 |
62 | @endverbatim
63 | ******************************************************************************
64 | * @attention
65 | *
66 | * © COPYRIGHT 2014 STMicroelectronics
67 | *
68 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
69 | * You may not use this file except in compliance with the License.
70 | * You may obtain a copy of the License at:
71 | *
72 | * http://www.st.com/software_license_agreement_liberty_v2
73 | *
74 | * Unless required by applicable law or agreed to in writing, software
75 | * distributed under the License is distributed on an "AS IS" BASIS,
76 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
77 | * See the License for the specific language governing permissions and
78 | * limitations under the License.
79 | *
80 | ******************************************************************************
81 | */
82 |
83 | /* Includes ------------------------------------------------------------------*/
84 | #include "stm32f4xx_wwdg.h"
85 | #include "stm32f4xx_rcc.h"
86 |
87 | /** @addtogroup STM32F4xx_StdPeriph_Driver
88 | * @{
89 | */
90 |
91 | /** @defgroup WWDG
92 | * @brief WWDG driver modules
93 | * @{
94 | */
95 |
96 | /* Private typedef -----------------------------------------------------------*/
97 | /* Private define ------------------------------------------------------------*/
98 |
99 | /* ----------- WWDG registers bit address in the alias region ----------- */
100 | #define WWDG_OFFSET (WWDG_BASE - PERIPH_BASE)
101 | /* Alias word address of EWI bit */
102 | #define CFR_OFFSET (WWDG_OFFSET + 0x04)
103 | #define EWI_BitNumber 0x09
104 | #define CFR_EWI_BB (PERIPH_BB_BASE + (CFR_OFFSET * 32) + (EWI_BitNumber * 4))
105 |
106 | /* --------------------- WWDG registers bit mask ------------------------ */
107 | /* CFR register bit mask */
108 | #define CFR_WDGTB_MASK ((uint32_t)0xFFFFFE7F)
109 | #define CFR_W_MASK ((uint32_t)0xFFFFFF80)
110 | #define BIT_MASK ((uint8_t)0x7F)
111 |
112 | /* Private macro -------------------------------------------------------------*/
113 | /* Private variables ---------------------------------------------------------*/
114 | /* Private function prototypes -----------------------------------------------*/
115 | /* Private functions ---------------------------------------------------------*/
116 |
117 | /** @defgroup WWDG_Private_Functions
118 | * @{
119 | */
120 |
121 | /** @defgroup WWDG_Group1 Prescaler, Refresh window and Counter configuration functions
122 | * @brief Prescaler, Refresh window and Counter configuration functions
123 | *
124 | @verbatim
125 | ===============================================================================
126 | ##### Prescaler, Refresh window and Counter configuration functions #####
127 | ===============================================================================
128 |
129 | @endverbatim
130 | * @{
131 | */
132 |
133 | /**
134 | * @brief Deinitializes the WWDG peripheral registers to their default reset values.
135 | * @param None
136 | * @retval None
137 | */
138 | void WWDG_DeInit(void)
139 | {
140 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE);
141 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE);
142 | }
143 |
144 | /**
145 | * @brief Sets the WWDG Prescaler.
146 | * @param WWDG_Prescaler: specifies the WWDG Prescaler.
147 | * This parameter can be one of the following values:
148 | * @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1
149 | * @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2
150 | * @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4
151 | * @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8
152 | * @retval None
153 | */
154 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler)
155 | {
156 | uint32_t tmpreg = 0;
157 | /* Check the parameters */
158 | assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler));
159 | /* Clear WDGTB[1:0] bits */
160 | tmpreg = WWDG->CFR & CFR_WDGTB_MASK;
161 | /* Set WDGTB[1:0] bits according to WWDG_Prescaler value */
162 | tmpreg |= WWDG_Prescaler;
163 | /* Store the new value */
164 | WWDG->CFR = tmpreg;
165 | }
166 |
167 | /**
168 | * @brief Sets the WWDG window value.
169 | * @param WindowValue: specifies the window value to be compared to the downcounter.
170 | * This parameter value must be lower than 0x80.
171 | * @retval None
172 | */
173 | void WWDG_SetWindowValue(uint8_t WindowValue)
174 | {
175 | __IO uint32_t tmpreg = 0;
176 |
177 | /* Check the parameters */
178 | assert_param(IS_WWDG_WINDOW_VALUE(WindowValue));
179 | /* Clear W[6:0] bits */
180 |
181 | tmpreg = WWDG->CFR & CFR_W_MASK;
182 |
183 | /* Set W[6:0] bits according to WindowValue value */
184 | tmpreg |= WindowValue & (uint32_t) BIT_MASK;
185 |
186 | /* Store the new value */
187 | WWDG->CFR = tmpreg;
188 | }
189 |
190 | /**
191 | * @brief Enables the WWDG Early Wakeup interrupt(EWI).
192 | * @note Once enabled this interrupt cannot be disabled except by a system reset.
193 | * @param None
194 | * @retval None
195 | */
196 | void WWDG_EnableIT(void)
197 | {
198 | *(__IO uint32_t *) CFR_EWI_BB = (uint32_t)ENABLE;
199 | }
200 |
201 | /**
202 | * @brief Sets the WWDG counter value.
203 | * @param Counter: specifies the watchdog counter value.
204 | * This parameter must be a number between 0x40 and 0x7F (to prevent generating
205 | * an immediate reset)
206 | * @retval None
207 | */
208 | void WWDG_SetCounter(uint8_t Counter)
209 | {
210 | /* Check the parameters */
211 | assert_param(IS_WWDG_COUNTER(Counter));
212 | /* Write to T[6:0] bits to configure the counter value, no need to do
213 | a read-modify-write; writing a 0 to WDGA bit does nothing */
214 | WWDG->CR = Counter & BIT_MASK;
215 | }
216 | /**
217 | * @}
218 | */
219 |
220 | /** @defgroup WWDG_Group2 WWDG activation functions
221 | * @brief WWDG activation functions
222 | *
223 | @verbatim
224 | ===============================================================================
225 | ##### WWDG activation function #####
226 | ===============================================================================
227 |
228 | @endverbatim
229 | * @{
230 | */
231 |
232 | /**
233 | * @brief Enables WWDG and load the counter value.
234 | * @param Counter: specifies the watchdog counter value.
235 | * This parameter must be a number between 0x40 and 0x7F (to prevent generating
236 | * an immediate reset)
237 | * @retval None
238 | */
239 | void WWDG_Enable(uint8_t Counter)
240 | {
241 | /* Check the parameters */
242 | assert_param(IS_WWDG_COUNTER(Counter));
243 | WWDG->CR = WWDG_CR_WDGA | Counter;
244 | }
245 | /**
246 | * @}
247 | */
248 |
249 | /** @defgroup WWDG_Group3 Interrupts and flags management functions
250 | * @brief Interrupts and flags management functions
251 | *
252 | @verbatim
253 | ===============================================================================
254 | ##### Interrupts and flags management functions #####
255 | ===============================================================================
256 |
257 | @endverbatim
258 | * @{
259 | */
260 |
261 | /**
262 | * @brief Checks whether the Early Wakeup interrupt flag is set or not.
263 | * @param None
264 | * @retval The new state of the Early Wakeup interrupt flag (SET or RESET)
265 | */
266 | FlagStatus WWDG_GetFlagStatus(void)
267 | {
268 | FlagStatus bitstatus = RESET;
269 |
270 | if ((WWDG->SR) != (uint32_t)RESET)
271 | {
272 | bitstatus = SET;
273 | }
274 | else
275 | {
276 | bitstatus = RESET;
277 | }
278 | return bitstatus;
279 | }
280 |
281 | /**
282 | * @brief Clears Early Wakeup interrupt flag.
283 | * @param None
284 | * @retval None
285 | */
286 | void WWDG_ClearFlag(void)
287 | {
288 | WWDG->SR = (uint32_t)RESET;
289 | }
290 |
291 | /**
292 | * @}
293 | */
294 |
295 | /**
296 | * @}
297 | */
298 |
299 | /**
300 | * @}
301 | */
302 |
303 | /**
304 | * @}
305 | */
306 |
307 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
308 |
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/LICENSE:
--------------------------------------------------------------------------------
1 | MIT License
2 |
3 | Copyright (c) 2017 胡文博
4 |
5 | Permission is hereby granted, free of charge, to any person obtaining a copy
6 | of this software and associated documentation files (the "Software"), to deal
7 | in the Software without restriction, including without limitation the rights
8 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9 | copies of the Software, and to permit persons to whom the Software is
10 | furnished to do so, subject to the following conditions:
11 |
12 | The above copyright notice and this permission notice shall be included in all
13 | copies or substantial portions of the Software.
14 |
15 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
18 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 | SOFTWARE.
22 |
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/OBJ/.gitignore:
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1 | # Object files
2 | *.o
3 | *.ko
4 | *.obj
5 | *.elf
6 | *.hex
7 |
8 | # Precompiled Headers
9 | *.gch
10 | *.pch
11 |
12 | # Libraries
13 | *.lib
14 | *.a
15 | *.la
16 | *.lo
17 |
18 | # Shared objects (inc. Windows DLLs)
19 | *.dll
20 | *.so
21 | *.so.*
22 | *.dylib
23 |
24 | # Executables
25 | *.exe
26 | *.out
27 | *.app
28 | *.i*86
29 | *.x86_64
30 | *.hex
31 |
32 | # Debug files
33 | *.dSYM/
34 | *.su
35 |
36 | /List/*
37 | /Output/*
38 | JLink*
39 | *.bak
40 | *.dep
41 | *.cris
42 | *.uvopt
43 | !.gitignore
44 | *.htm
45 | OBJ/*
46 | OBJ/*.htm
47 |
48 |
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/README.md:
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1 | # ATTITUDE [](https://opensource.org/licenses/mit-license.php)
2 |
3 | This is an AHRS for UAV, the algorithm is mainly come from the following papers:
4 | >[Euston M, Coote P, Mahony R, et al. A complementary filter for attitude estimation of a fixed-wing UAV[C]. Intelligent Robots and Systems, 2008. IROS 2008. IEEE/RSJ International Conference on. IEEE, 2008: 340-345.][link1]
5 |
6 | >[Mahony R, Hamel T, Pflimlin J M. Nonlinear complementary filters on the special orthogonal group[J]. IEEE Transactions on automatic control, 2008, 53(5): 1203-1218.][link2]
7 |
8 | [link1]: http://users.cecs.anu.edu.au/~Jonghyuk.Kim/pdf/2008_Euston_iros_v1.04.pdf
9 | [link2]: https://hal-univ-tlse3.archives-ouvertes.fr/hal-00488376/document
10 |
11 | ## Environment:
12 | ```
13 | 1. STM32F407
14 | 2. Keil uVersion 5
15 | 3. Windows 7/8/10
16 | ```
17 | ## Demo Video:
18 |
19 | [](https://www.youtube.com/embed/lu3YBzcjbMQ "Play")
20 |
21 | Note: This source code is only a part of the demo video source code!
22 | ## Schematic Diagram:
23 | The Schematic diagram could be found at [schem](./SchematicDiagram/schematicDiagram.pdf).
24 |
25 | 
26 | 
27 |
28 | ## Another Project:
29 | Based on our quadrotor aircraft's control system and Pixhawk project, we design a control system for flying skateboard.
30 |
31 | [](https://www.youtube.com/embed/OMiPqYcYU0A "Play")
32 |
33 | ## Credits
34 |
35 | - Tong Yuanyang: This code is based on his code.
36 | - Yu Xinglin: The schematic diagram was made by him.
37 | - Huang Feifei: He is our perfect UAV flyer.
38 | - Hao Xingxing: The video is made by him.
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/USER/.gitignore:
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1 | # Object files
2 | *.o
3 | *.ko
4 | *.obj
5 | *.elf
6 |
7 | # Precompiled Headers
8 | *.gch
9 | *.pch
10 |
11 | # Libraries
12 | *.lib
13 | *.a
14 | *.la
15 | *.lo
16 |
17 | # Shared objects (inc. Windows DLLs)
18 | *.dll
19 | *.so
20 | *.so.*
21 | *.dylib
22 |
23 | # Executables
24 | *.exe
25 | *.out
26 | *.app
27 | *.i*86
28 | *.x86_64
29 | *.hex
30 |
31 | # Debug files
32 | *.dSYM/
33 | *.su
34 |
35 | /List/*
36 | /Output/*
37 | JLink*
38 | *.bak
39 | *.dep
40 | *.cris
41 | *.uvopt
42 | !.gitignore
43 | *.htm
44 | OBJ/*
45 | OBJ/*.htm
46 |
47 |
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1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 0
21 | Device="UNSPECIFIED"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 |
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1 | /**
2 | ******************************************************************************
3 | * @file Project/STM32F4xx_StdPeriph_Templates/stm32f4xx_conf.h
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief Library configuration file.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2014 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /* Define to prevent recursive inclusion -------------------------------------*/
29 | #ifndef __STM32F4xx_CONF_H
30 | #define __STM32F4xx_CONF_H
31 |
32 | /* Includes ------------------------------------------------------------------*/
33 | /* Uncomment the line below to enable peripheral header file inclusion */
34 | #include "stm32f4xx_adc.h"
35 | #include "stm32f4xx_crc.h"
36 | #include "stm32f4xx_dbgmcu.h"
37 | #include "stm32f4xx_dma.h"
38 | #include "stm32f4xx_exti.h"
39 | #include "stm32f4xx_flash.h"
40 | #include "stm32f4xx_gpio.h"
41 | #include "stm32f4xx_i2c.h"
42 | #include "stm32f4xx_iwdg.h"
43 | #include "stm32f4xx_pwr.h"
44 | #include "stm32f4xx_rcc.h"
45 | #include "stm32f4xx_rtc.h"
46 | #include "stm32f4xx_sdio.h"
47 | #include "stm32f4xx_spi.h"
48 | #include "stm32f4xx_syscfg.h"
49 | #include "stm32f4xx_tim.h"
50 | #include "stm32f4xx_usart.h"
51 | #include "stm32f4xx_wwdg.h"
52 | #include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
53 |
54 | #if defined (STM32F429_439xx)
55 | #include "stm32f4xx_cryp.h"
56 | #include "stm32f4xx_hash.h"
57 | #include "stm32f4xx_rng.h"
58 | #include "stm32f4xx_can.h"
59 | #include "stm32f4xx_dac.h"
60 | #include "stm32f4xx_dcmi.h"
61 | #include "stm32f4xx_dma2d.h"
62 | #include "stm32f4xx_fmc.h"
63 | #include "stm32f4xx_ltdc.h"
64 | #include "stm32f4xx_sai.h"
65 | #endif /* STM32F429_439xx */
66 |
67 | #if defined (STM32F427_437xx)
68 | #include "stm32f4xx_cryp.h"
69 | #include "stm32f4xx_hash.h"
70 | #include "stm32f4xx_rng.h"
71 | #include "stm32f4xx_can.h"
72 | #include "stm32f4xx_dac.h"
73 | #include "stm32f4xx_dcmi.h"
74 | #include "stm32f4xx_dma2d.h"
75 | #include "stm32f4xx_fmc.h"
76 | #include "stm32f4xx_sai.h"
77 | #endif /* STM32F427_437xx */
78 |
79 | #if defined (STM32F40_41xxx)
80 | #include "stm32f4xx_cryp.h"
81 | #include "stm32f4xx_hash.h"
82 | #include "stm32f4xx_rng.h"
83 | #include "stm32f4xx_can.h"
84 | #include "stm32f4xx_dac.h"
85 | #include "stm32f4xx_dcmi.h"
86 | #include "stm32f4xx_fsmc.h"
87 | #endif /* STM32F40_41xxx */
88 |
89 | #if defined (STM32F411xE)
90 | #include "stm32f4xx_flash_ramfunc.h"
91 | #endif /* STM32F411xE */
92 | /* Exported types ------------------------------------------------------------*/
93 | /* Exported constants --------------------------------------------------------*/
94 |
95 | /* If an external clock source is used, then the value of the following define
96 | should be set to the value of the external clock source, else, if no external
97 | clock is used, keep this define commented */
98 | /*#define I2S_EXTERNAL_CLOCK_VAL 12288000 */ /* Value of the external clock in Hz */
99 |
100 |
101 | /* Uncomment the line below to expanse the "assert_param" macro in the
102 | Standard Peripheral Library drivers code */
103 | /* #define USE_FULL_ASSERT 1 */
104 |
105 | /* Exported macro ------------------------------------------------------------*/
106 | #ifdef USE_FULL_ASSERT
107 |
108 | /**
109 | * @brief The assert_param macro is used for function's parameters check.
110 | * @param expr: If expr is false, it calls assert_failed function
111 | * which reports the name of the source file and the source
112 | * line number of the call that failed.
113 | * If expr is true, it returns no value.
114 | * @retval None
115 | */
116 | #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
117 | /* Exported functions ------------------------------------------------------- */
118 | void assert_failed(uint8_t *file, uint32_t line);
119 | #else
120 | #define assert_param(expr) ((void)0)
121 | #endif /* USE_FULL_ASSERT */
122 |
123 | #endif /* __STM32F4xx_CONF_H */
124 |
125 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
126 |
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/USER/stm32f4xx_it.c:
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1 | /**
2 | ******************************************************************************
3 | * @file Project/STM32F4xx_StdPeriph_Templates/stm32f4xx_it.c
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief Main Interrupt Service Routines.
8 | * This file provides template for all exceptions handler and
9 | * peripherals interrupt service routine.
10 | ******************************************************************************
11 | * @attention
12 | *
13 | * © COPYRIGHT 2014 STMicroelectronics
14 | *
15 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
16 | * You may not use this file except in compliance with the License.
17 | * You may obtain a copy of the License at:
18 | *
19 | * http://www.st.com/software_license_agreement_liberty_v2
20 | *
21 | * Unless required by applicable law or agreed to in writing, software
22 | * distributed under the License is distributed on an "AS IS" BASIS,
23 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
24 | * See the License for the specific language governing permissions and
25 | * limitations under the License.
26 | *
27 | ******************************************************************************
28 | */
29 |
30 | /* Includes ------------------------------------------------------------------*/
31 | #include "stm32f4xx_it.h"
32 |
33 |
34 | /** @addtogroup Template_Project
35 | * @{
36 | */
37 |
38 | /* Private typedef -----------------------------------------------------------*/
39 | /* Private define ------------------------------------------------------------*/
40 | /* Private macro -------------------------------------------------------------*/
41 | /* Private variables ---------------------------------------------------------*/
42 | /* Private function prototypes -----------------------------------------------*/
43 | /* Private functions ---------------------------------------------------------*/
44 |
45 | /******************************************************************************/
46 | /* Cortex-M4 Processor Exceptions Handlers */
47 | /******************************************************************************/
48 |
49 | /**
50 | * @brief This function handles NMI exception.
51 | * @param None
52 | * @retval None
53 | */
54 | void NMI_Handler(void)
55 | {
56 | }
57 |
58 | /**
59 | * @brief This function handles Hard Fault exception.
60 | * @param None
61 | * @retval None
62 | */
63 | void HardFault_Handler(void)
64 | {
65 | /* Go to infinite loop when Hard Fault exception occurs */
66 | while (1)
67 | {
68 | }
69 | }
70 |
71 | /**
72 | * @brief This function handles Memory Manage exception.
73 | * @param None
74 | * @retval None
75 | */
76 | void MemManage_Handler(void)
77 | {
78 | /* Go to infinite loop when Memory Manage exception occurs */
79 | while (1)
80 | {
81 | }
82 | }
83 |
84 | /**
85 | * @brief This function handles Bus Fault exception.
86 | * @param None
87 | * @retval None
88 | */
89 | void BusFault_Handler(void)
90 | {
91 | /* Go to infinite loop when Bus Fault exception occurs */
92 | while (1)
93 | {
94 | }
95 | }
96 |
97 | /**
98 | * @brief This function handles Usage Fault exception.
99 | * @param None
100 | * @retval None
101 | */
102 | void UsageFault_Handler(void)
103 | {
104 | /* Go to infinite loop when Usage Fault exception occurs */
105 | while (1)
106 | {
107 | }
108 | }
109 |
110 | /**
111 | * @brief This function handles SVCall exception.
112 | * @param None
113 | * @retval None
114 | */
115 | void SVC_Handler(void)
116 | {
117 | }
118 |
119 | /**
120 | * @brief This function handles Debug Monitor exception.
121 | * @param None
122 | * @retval None
123 | */
124 | void DebugMon_Handler(void)
125 | {
126 | }
127 |
128 | /**
129 | * @brief This function handles PendSVC exception.
130 | * @param None
131 | * @retval None
132 | */
133 | void PendSV_Handler(void)
134 | {
135 | }
136 |
137 | /**
138 | * @brief This function handles SysTick Handler.
139 | * @param None
140 | * @retval None
141 | */
142 | void SysTick_Handler(void)
143 | {
144 |
145 | }
146 |
147 | /******************************************************************************/
148 | /* STM32F4xx Peripherals Interrupt Handlers */
149 | /* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
150 | /* available peripheral interrupt handler's name please refer to the startup */
151 | /* file (startup_stm32f4xx.s). */
152 | /******************************************************************************/
153 |
154 | /**
155 | * @brief This function handles PPP interrupt request.
156 | * @param None
157 | * @retval None
158 | */
159 | /*void PPP_IRQHandler(void)
160 | {
161 | }*/
162 |
163 | /**
164 | * @}
165 | */
166 |
167 |
168 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
169 |
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/USER/stm32f4xx_it.h:
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1 | /**
2 | ******************************************************************************
3 | * @file Project/STM32F4xx_StdPeriph_Templates/stm32f4xx_it.h
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file contains the headers of the interrupt handlers.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2014 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /* Define to prevent recursive inclusion -------------------------------------*/
29 | #ifndef __STM32F4xx_IT_H
30 | #define __STM32F4xx_IT_H
31 |
32 | #ifdef __cplusplus
33 | extern "C" {
34 | #endif
35 |
36 | /* Includes ------------------------------------------------------------------*/
37 | #include "stm32f4xx.h"
38 |
39 | /* Exported types ------------------------------------------------------------*/
40 | /* Exported constants --------------------------------------------------------*/
41 | /* Exported macro ------------------------------------------------------------*/
42 | /* Exported functions ------------------------------------------------------- */
43 |
44 | void NMI_Handler(void);
45 | void HardFault_Handler(void);
46 | void MemManage_Handler(void);
47 | void BusFault_Handler(void);
48 | void UsageFault_Handler(void);
49 | void SVC_Handler(void);
50 | void DebugMon_Handler(void);
51 | void PendSV_Handler(void);
52 | void SysTick_Handler(void);
53 |
54 | #ifdef __cplusplus
55 | }
56 | #endif
57 |
58 | #endif /* __STM32F4xx_IT_H */
59 |
60 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
61 |
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/USER/system_stm32f4xx.h:
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1 | /**
2 | ******************************************************************************
3 | * @file system_stm32f4xx.h
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief CMSIS Cortex-M4 Device System Source File for STM32F4xx devices.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2014 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /** @addtogroup CMSIS
29 | * @{
30 | */
31 |
32 | /** @addtogroup stm32f4xx_system
33 | * @{
34 | */
35 |
36 | /**
37 | * @brief Define to prevent recursive inclusion
38 | */
39 | #ifndef __SYSTEM_STM32F4XX_H
40 | #define __SYSTEM_STM32F4XX_H
41 |
42 | #ifdef __cplusplus
43 | extern "C" {
44 | #endif
45 |
46 | /** @addtogroup STM32F4xx_System_Includes
47 | * @{
48 | */
49 |
50 | /**
51 | * @}
52 | */
53 |
54 |
55 | /** @addtogroup STM32F4xx_System_Exported_types
56 | * @{
57 | */
58 |
59 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
60 |
61 |
62 | /**
63 | * @}
64 | */
65 |
66 | /** @addtogroup STM32F4xx_System_Exported_Constants
67 | * @{
68 | */
69 |
70 | /**
71 | * @}
72 | */
73 |
74 | /** @addtogroup STM32F4xx_System_Exported_Macros
75 | * @{
76 | */
77 |
78 | /**
79 | * @}
80 | */
81 |
82 | /** @addtogroup STM32F4xx_System_Exported_Functions
83 | * @{
84 | */
85 |
86 | extern void SystemInit(void);
87 | extern void SystemCoreClockUpdate(void);
88 | /**
89 | * @}
90 | */
91 |
92 | #ifdef __cplusplus
93 | }
94 | #endif
95 |
96 | #endif /*__SYSTEM_STM32F4XX_H */
97 |
98 | /**
99 | * @}
100 | */
101 |
102 | /**
103 | * @}
104 | */
105 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
106 |
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