├── LICENSE ├── README.md ├── hardware ├── constraints │ └── nexys.xdc ├── design_top │ └── swerv_eh1_reference_design.v ├── peripherals │ └── bd │ │ ├── axi_intc │ │ ├── axi_intc.bd │ │ └── hdl │ │ │ └── axi_intc_wrapper.v │ │ └── clk_and_rst │ │ ├── clk_and_rst.bd │ │ └── hdl │ │ └── clk_and_rst_wrapper.v └── project │ └── script │ └── nexys4ddr_refprj.tcl └── software ├── apps ├── hello │ ├── Makefile │ └── hello.c └── sum │ ├── Makefile │ └── sum.c ├── bsp ├── link.ld ├── startup.S └── swerv_openocd.cfg └── common ├── mem_map.h ├── printf.c └── printf.h /LICENSE: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/westerndigitalcorporation/swerv_eh1_fpga/HEAD/LICENSE -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 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