├── NOTICE ├── README.rst ├── Ports ├── AVR32 │ ├── AP7000 │ │ └── IAR │ │ │ └── lib_mem_a.asm │ └── UC3 │ │ └── GNU │ │ └── lib_mem_a.asm ├── ARM │ ├── GNU │ │ └── lib_mem_a.s │ ├── IAR │ │ └── lib_mem_a.asm │ └── RealView │ │ └── lib_mem_a.asm ├── ARM-Cortex-M3 │ ├── IAR │ │ └── lib_mem_a.asm │ ├── GNU │ │ └── lib_mem_a.s │ └── RealView │ │ └── lib_mem_a.asm ├── ARM-Cortex-M4 │ ├── IAR │ │ └── lib_mem_a.asm │ ├── GNU │ │ └── lib_mem_a.s │ └── RealView │ │ └── lib_mem_a.asm └── ARM-Cortex-M1 │ └── RealView │ └── lib_mem_a.asm ├── Cfg └── Template │ └── lib_cfg.h ├── LICENSE ├── lib_math.c ├── lib_math.h └── lib_str.h /NOTICE: -------------------------------------------------------------------------------- 1 | ATTENTION ALL USERS OF THIS REPOSITORY: 2 | 3 | The original work found in this repository is provided by Silicon Labs under the 4 | Apache License, Version 2.0. 5 | 6 | Any third party may contribute derivative works to the original work in which 7 | modifications are clearly identified as being licensed under: 8 | 9 | (1) the Apache License, Version 2.0 or a compatible open source license; or 10 | (2) under a proprietary license with a copy of such license deposited. 11 | 12 | All posted derivative works must clearly identify which license choice has been 13 | elected. 14 | 15 | No such posted derivative works will be considered to be a “Contribution” under 16 | the Apache License, Version 2.0. 17 | 18 | SILICON LABS MAKES NO WARRANTY WITH RESPECT TO ALL POSTED THIRD PARTY CONTENT 19 | AND DISCLAIMS ALL OTHER WARRANTIES OR LIABILITIES, INCLUDING ALL WARRANTIES OF 20 | MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, OWNERSHIP, 21 | NON-INFRINGEMENT, AND NON-MISAPPROPRIATION. 22 | 23 | In the event a derivative work is desired to be submitted to Silicon Labs as a 24 | “Contribution” under the Apache License, Version 2.0, a “Contributor” must give 25 | written email notice to micrium@weston-embedded.com. Unless an email response in 26 | the affirmative to accept the derivative work as a “Contribution”, such email 27 | submission should be considered to have not been incorporated into the original 28 | work. 29 | -------------------------------------------------------------------------------- /README.rst: -------------------------------------------------------------------------------- 1 | .. raw:: html 2 | 3 | 4 |

5 | 6 |

7 | 8 | 9 | µC/OS is a full-featured embedded operating system originally developed by Micriµm™. In addition to the two highly popular kernels, µC/OS features support for TCP/IP, USB-Device, USB-Host, and Modbus, as well as a robust File System. 10 | 11 | Since its founding in 1999 as a private company, Micriµm and its team of engineers have offered world-class embedded software components for the most critical and demanding real-time applications. Recognized as having some of the cleanest code in the industry, with easy-to-understand documentation, the Micrium real-time kernels, and software components have successfully been deployed in thousands of products worldwide across a broad range of industries. Micrium’s µC/OS-II™ kernel has been certified for use in safety-critical applications and remains a respected favorite in the medical, aerospace, and industrial markets. µC/OS continues to be the RTOS of choice for engineers requiring the most reliable and trusted solution for their mission-critical applications. 12 | 13 | ---------- 14 | 15 | .. raw:: HTML 16 | 17 | 18 |

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21 | 22 | 23 | Founded by a team of former Micrium employees, Weston Embedded Solutions is the official custodian for the µC/OS RTOS and Stacks software repository to ensure it remains the trusted choice for embedded engineers around the world. 24 | 25 | ---------- 26 | 27 | Product Documentation and Release Notes 28 | *************** 29 | https://micrium.atlassian.net/ 30 | 31 | Technical Support 32 | ***************** 33 | https://weston-embedded.com/micrium-support 34 | 35 | Example Projects 36 | ********* 37 | https://weston-embedded.com/micrium-examples 38 | 39 | Commercial Licensing Option 40 | ********* 41 | https://weston-embedded.com/products/cesium 42 | 43 | Who to Contact 44 | ********* 45 | https://weston-embedded.com/company/contact 46 | -------------------------------------------------------------------------------- /Ports/AVR32/AP7000/IAR/lib_mem_a.asm: -------------------------------------------------------------------------------- 1 | /* 2 | ********************************************************************************************************* 3 | * uC/LIB 4 | * Custom Library Modules 5 | * 6 | * Copyright 2004-2021 Silicon Laboratories Inc. www.silabs.com 7 | * 8 | * SPDX-License-Identifier: APACHE-2.0 9 | * 10 | * This software is subject to an open source license and is distributed by 11 | * Silicon Laboratories Inc. pursuant to the terms of the Apache License, 12 | * Version 2.0 available at www.apache.org/licenses/LICENSE-2.0. 13 | * 14 | ********************************************************************************************************* 15 | */ 16 | 17 | /* 18 | ********************************************************************************************************* 19 | * 20 | * STANDARD MEMORY OPERATIONS 21 | * 22 | * AVR32 AP7000 23 | * IAR Compiler 24 | * 25 | * Filename : lib_mem_a.asm 26 | * Version : V1.39.01 27 | ********************************************************************************************************* 28 | * Note(s) : (1) NO compiler-supplied standard library functions are used in library or product software. 29 | * 30 | * (a) ALL standard library functions are implemented in the custom library modules : 31 | * 32 | * (1) \\lib*.* 33 | * 34 | * (2) \\Ports\\\lib*_a.* 35 | * 36 | * where 37 | * directory path for custom library software 38 | * directory name for specific processor (CPU) 39 | * directory name for specific compiler 40 | * 41 | * (b) Product-specific library functions are implemented in individual products. 42 | * 43 | * (2) Assumes AVR32 CPU mode configured for Big Endian. 44 | ********************************************************************************************************* 45 | */ 46 | 47 | /* 48 | ********************************************************************************************************* 49 | * PUBLIC FUNCTIONS 50 | ********************************************************************************************************* 51 | */ 52 | 53 | MODULE LIB_MEM 54 | PUBLIC Mem_Copy 55 | 56 | 57 | /* 58 | ********************************************************************************************************* 59 | * CODE GENERATION DIRECTIVES 60 | ********************************************************************************************************* 61 | */ 62 | 63 | RSEG CODE32:CODE:NOROOT(2) 64 | 65 | 66 | /* 67 | ********************************************************************************************************* 68 | * Mem_Copy() 69 | * 70 | * Description : Copy data octets from one buffer to another buffer. 71 | * 72 | * Argument(s) : pdest Pointer to destination memory buffer. 73 | * 74 | * psrc Pointer to source memory buffer. 75 | * 76 | * size Number of data buffer octets to copy. 77 | * 78 | * Return(s) : none. 79 | * 80 | * Caller(s) : Application. 81 | * 82 | * Note(s) : (1) Null copies allowed (i.e. 0-octet size). 83 | * 84 | * (2) Memory buffers NOT checked for overlapping. 85 | * 86 | * (3) Modulo arithmetic is used to determine whether a memory buffer starts on a 'CPU_ALIGN' 87 | * address boundary. 88 | ********************************************************************************************************* 89 | */ 90 | 91 | /* 92 | void Mem_Copy (void *pdest, ; ==> R12 93 | void *psrc, ; ==> R11 94 | CPU_SIZE_T size) ; ==> R10 95 | */ 96 | 97 | #define pdest R12 98 | #define psrc R11 99 | #define size R10 100 | 101 | Mem_Copy: 102 | CP.W pdest, 0 103 | BRNE Mem_Copy_1 /* return if pdest == NULL. */ 104 | MOV PC, LR /* Restore Program Counter (return) */ 105 | 106 | Mem_Copy_1: 107 | CP.W psrc, 0 108 | BRNE Mem_Copy_2 /* return if psrc == NULL. */ 109 | MOV PC, LR /* Restore Program Counter (return) */ 110 | 111 | Mem_Copy_2: 112 | CP.W size, 0 113 | BRNE Mem_Copy_3 /* return if size == 0. */ 114 | MOV PC, LR /* Restore Program Counter (return) */ 115 | 116 | Mem_Copy_3: 117 | PREF psrc[0] 118 | MOV pdest, R12 119 | 120 | Mem_Copy_Chk_32: /* If less than 32 bytes, copy byte-by-byte. */ 121 | CP.W size, 32 122 | BRGE Mem_Copy_More_31 123 | 124 | SUB size, 1 125 | RETLT R12 126 | Mem_Copy_01_1: 127 | LD.UB R8, psrc++ 128 | ST.B pdest++, R8 129 | SUB size, 1 130 | BRGE Mem_Copy_01_1 131 | RETAL R12 132 | 133 | Mem_Copy_More_31: 134 | PUSHM R0-R7, LR 135 | 136 | Chk_Align_32: /* Check if both dest & src 32-bit aligned. */ 137 | MOV R8, psrc 138 | ANDL R8, 31, COH 139 | BRNE Mem_Copy_Unaligned_src 140 | MOV R8, pdest 141 | ANDL R8, 3, COH 142 | BRNE Mem_Copy_Unaligned_dest 143 | 144 | Mem_Copy_Aligned: 145 | SUB size, 32 146 | BRLT Mem_Copy_Chk_16 147 | Mem_Copy_32_1: /* Copy 32 bytes at a time */ 148 | LDM psrc, R0-R7 149 | SUB psrc, -32 150 | STM pdest, R0-R7 151 | SUB pdest, -32 152 | SUB size, 32 153 | BRGE Mem_Copy_32_1 154 | 155 | Mem_Copy_Chk_16: 156 | SUB size, -16 157 | BRLT Mem_Copy_01_2 158 | Mem_Copy_16_1: /* Copy 16 more bytes if possible */ 159 | LDM psrc, r0-r3 160 | SUB psrc, -16 161 | SUB size, 16 162 | STM pdest, r0-r3 163 | SUB pdest, -16 164 | 165 | Mem_Copy_01_2: /* Copy remaining byte-by-byte. */ 166 | NEG size 167 | ADD PC, PC, size << 2 /* Jump to remaining copies position. */ 168 | REPT 15 169 | LD.UB R0, psrc++ 170 | ST.B pdest++, R0 171 | ENDR 172 | 173 | POPM R0-R7, PC 174 | 175 | 176 | Mem_Copy_Unaligned_src: 177 | RSUB R8, R8, 32 /* Make src cacheline-aligned. R8 = (psrc & 31) */ 178 | SUB size, R8 179 | Mem_Copy_01_3: 180 | LD.UB R0, psrc++ 181 | ST.B pdest++, R0 182 | SUB R8, 1 183 | BRNE Mem_Copy_01_3 184 | 185 | Chk_Align_dest: /* Check if dest 32-bit aligned. */ 186 | PREF psrc[0] 187 | MOV R8, 3 188 | TST pdest, R8 189 | BREQ Mem_Copy_Aligned 190 | 191 | Mem_Copy_Unaligned_dest: /* Bad performance, src is aligned but dest is not. */ 192 | SUB size, 4 193 | BRLT Mem_Copy_01_4 194 | Mem_Copy_04_1: 195 | LD.W R0, psrc++ 196 | ST.W pdest++, R0 197 | SUB size, 4 198 | BRGE Mem_Copy_04_1 199 | 200 | Mem_Copy_01_4: 201 | NEG size 202 | ADD PC, PC, size << 2 203 | REPT 3 204 | LD.UB R0, psrc++ 205 | ST.B pdest++, R0 206 | ENDR 207 | 208 | POPM R0-R7, PC 209 | 210 | ENDMOD 211 | 212 | 213 | END 214 | -------------------------------------------------------------------------------- /Ports/AVR32/UC3/GNU/lib_mem_a.asm: -------------------------------------------------------------------------------- 1 | /* 2 | ********************************************************************************************************* 3 | * uC/LIB 4 | * Custom Library Modules 5 | * 6 | * Copyright 2004-2021 Silicon Laboratories Inc. www.silabs.com 7 | * 8 | * SPDX-License-Identifier: APACHE-2.0 9 | * 10 | * This software is subject to an open source license and is distributed by 11 | * Silicon Laboratories Inc. pursuant to the terms of the Apache License, 12 | * Version 2.0 available at www.apache.org/licenses/LICENSE-2.0. 13 | * 14 | ********************************************************************************************************* 15 | */ 16 | 17 | /* 18 | ********************************************************************************************************* 19 | * 20 | * STANDARD MEMORY OPERATIONS 21 | * 22 | * AVR32 UC3 23 | * GNU Compiler 24 | * 25 | * Filename : lib_mem_a.asm 26 | * Version : V1.39.01 27 | ********************************************************************************************************* 28 | * Note(s) : (1) NO compiler-supplied standard library functions are used in library or product software. 29 | * 30 | * (a) ALL standard library functions are implemented in the custom library modules : 31 | * 32 | * (1) \\lib*.* 33 | * 34 | * (2) \\Ports\\\lib*_a.* 35 | * 36 | * where 37 | * directory path for custom library software 38 | * directory name for specific processor (CPU) 39 | * directory name for specific compiler 40 | * 41 | * (b) Product-specific library functions are implemented in individual products. 42 | * 43 | * (2) Assumes AVR32 CPU mode configured for Big Endian. 44 | ********************************************************************************************************* 45 | */ 46 | 47 | /* 48 | ********************************************************************************************************* 49 | * PUBLIC FUNCTIONS 50 | ********************************************************************************************************* 51 | */ 52 | 53 | .file "LIB_MEM" 54 | .global Mem_Copy 55 | 56 | 57 | /* 58 | ********************************************************************************************************* 59 | * CODE GENERATION DIRECTIVES 60 | ********************************************************************************************************* 61 | */ 62 | 63 | .section .text, "ax" 64 | 65 | 66 | /* 67 | ********************************************************************************************************* 68 | * Mem_Copy() 69 | * 70 | * Description : Copy data octets from one buffer to another buffer. 71 | * 72 | * Argument(s) : pdest Pointer to destination memory buffer. 73 | * 74 | * psrc Pointer to source memory buffer. 75 | * 76 | * size Number of data buffer octets to copy. 77 | * 78 | * Return(s) : none. 79 | * 80 | * Caller(s) : Application. 81 | * 82 | * Note(s) : (1) Null copies allowed (i.e. 0-octet size). 83 | * 84 | * (2) Memory buffers NOT checked for overlapping. 85 | * 86 | * (3) Modulo arithmetic is used to determine whether a memory buffer starts on a 'CPU_ALIGN' 87 | * address boundary. 88 | ********************************************************************************************************* 89 | */ 90 | 91 | /* 92 | void Mem_Copy (void *pdest, ; ==> R12 93 | void *psrc, ; ==> R11 94 | CPU_SIZE_T size) ; ==> R10 95 | */ 96 | 97 | 98 | Mem_Copy: 99 | Mem_Copy_Arg_Chk: 100 | CP.W R12, 0 101 | RETEQ R12 /* return if pdest == NULL. */ 102 | CP.W R11, 0 103 | RETEQ R12 /* return if psrc == NULL. */ 104 | 105 | Mem_Copy_Start: 106 | MOV R9, R12 107 | 108 | Mem_Copy_Chk_32: /* If less than 32 bytes, copy byte-by-byte. */ 109 | CP.W R10, 32 110 | BRGE Mem_Copy_Chk_Align 111 | 112 | Mem_Copy_Unaligned: /* Copy byte-by-byte. */ 113 | SUB R10, 16 114 | BRLT Mem_Copy_01_1 115 | 116 | Mem_Copy_16_1: /* Copy 16-bytes at a time. */ 117 | .rept 16 118 | LD.UB R8, R11++ 119 | ST.B R9++, R8 120 | .endr 121 | SUB R10, 16 122 | BRGE Mem_Copy_16_1 123 | 124 | Mem_Copy_01_1: /* Copy remaining bytes. */ 125 | NEG R10 126 | ADD PC, PC, R10 << 2 /* Jump to remaining copy position. */ 127 | .rept 15 128 | LD.UB R8, R11++ 129 | ST.B R9++, R8 130 | .endr 131 | 132 | RETAL R12 133 | 134 | Mem_Copy_Chk_Align: 135 | PUSHM R0-R7 136 | /* Check if both dest & src are 32-bit aligned. */ 137 | MOV R5, R9 138 | ANDL R5, 3, COH 139 | MOV R6, R11 140 | ANDL R6, 3, COH 141 | CP.W R5, R6 142 | BREQ Mem_Copy_Aligned_32 143 | /* Check if both dest & src are 16-bit aligned. */ 144 | ANDL R5, 1 145 | ANDL R6, 1 146 | EOR R6, R5 147 | BREQ Mem_Copy_Aligned_16 148 | /* dest & src are not aligned. */ 149 | POPM R0-R7 150 | BRAL Mem_Copy_Unaligned 151 | 152 | Mem_Copy_Aligned_32: 153 | CP.W R5, 0 154 | BREQ Mem_Copy_Chk_128_1 155 | /* Align dest & src to next 32-bit boundary. */ 156 | RSUB R6, R5, 4 157 | SUB R10, R6 158 | ADD PC, PC, R5 << 2 159 | .rept 3 160 | LD.UB R8, R11++ 161 | ST.B R9++, R8 162 | .endr 163 | 164 | Mem_Copy_Chk_128_1: 165 | SUB R10, 4*4*8 166 | BRLT Mem_Copy_Chk_16_1 167 | Mem_Copy_128_1: /* Copy 128-bytes at a time. */ 168 | .rept 4 169 | LDM R11++, R0-R7 170 | STM R9, R0-R7 171 | SUB R9, -4*8 172 | .endr 173 | SUB R10, 4*4*8 174 | BRGE Mem_Copy_128_1 175 | 176 | Mem_Copy_Chk_16_1: 177 | SUB R10, -(4*4*8 - 16) 178 | BRLT Mem_Copy_01_2 179 | Mem_Copy_16_2: /* Copy 16-bytes at a time. */ 180 | LDM R11++, R0-R3 181 | STM R9, R0-R3 182 | SUB R9, -16 183 | SUB R10, 16 184 | BRGE Mem_Copy_16_2 185 | 186 | Mem_Copy_01_2: /* Copy remaining bytes. */ 187 | NEG R10 188 | ADD PC, PC, R10 << 2 /* Jump to remaining copy position. */ 189 | .rept 15 190 | LD.UB R8, R11++ 191 | ST.B R9++, R8 192 | .endr 193 | 194 | POPM R0-R7 195 | RETAL R12 196 | 197 | 198 | Mem_Copy_Aligned_16: 199 | CP.W R5, 1 200 | BRNE Mem_Copy_Chk_64_2 201 | /* Align dest & src to next 16-bit boundary. */ 202 | LD.UB R0, R11++ 203 | ST.B R9++, R0 204 | SUB R10, 1 205 | 206 | Mem_Copy_Chk_64_2: 207 | SUB R10, 64*2 208 | BRLT Mem_Copy_Chk_16_2 209 | Mem_Copy_128_2: /* Copy 128-bytes at a time. */ 210 | .rept 64 211 | LD.UH R0, R11++ 212 | ST.H R9++, R0 213 | .endr 214 | SUB R10, 64*2 215 | BRGE Mem_Copy_128_2 216 | 217 | Mem_Copy_Chk_16_2: 218 | SUB R10, -(64*2 - 16) 219 | BRLT Mem_Copy_01_2 220 | Mem_Copy_16_3: /* Copy 16-bytes at a time. */ 221 | .rept 8 222 | LD.UH R0, R11++ 223 | ST.H R9++, R0 224 | .endr 225 | SUB R10, 8*2 226 | BRGE Mem_Copy_16_3 227 | BRAL Mem_Copy_01_2 /* Copy remaining bytes. */ 228 | 229 | .end 230 | -------------------------------------------------------------------------------- /Cfg/Template/lib_cfg.h: -------------------------------------------------------------------------------- 1 | /* 2 | ********************************************************************************************************* 3 | * EXAMPLE CODE 4 | * 5 | * This file is provided as an example on how to use Micrium products. 6 | * 7 | * Please feel free to use any application code labeled as 'EXAMPLE CODE' in 8 | * your application products. Example code may be used as is, in whole or in 9 | * part, or may be used as a reference only. This file can be modified as 10 | * required to meet the end-product requirements. 11 | * 12 | ********************************************************************************************************* 13 | */ 14 | 15 | /* 16 | ********************************************************************************************************* 17 | * 18 | * CUSTOM LIBRARY CONFIGURATION FILE 19 | * 20 | * TEMPLATE 21 | * 22 | * Filename : lib_cfg.h 23 | * Version : V1.39.01 24 | ********************************************************************************************************* 25 | */ 26 | 27 | /* 28 | ********************************************************************************************************* 29 | * MODULE 30 | ********************************************************************************************************* 31 | */ 32 | 33 | #ifndef LIB_CFG_MODULE_PRESENT 34 | #define LIB_CFG_MODULE_PRESENT 35 | 36 | 37 | /* 38 | ********************************************************************************************************* 39 | ********************************************************************************************************* 40 | * MEMORY LIBRARY CONFIGURATION 41 | ********************************************************************************************************* 42 | ********************************************************************************************************* 43 | */ 44 | 45 | /* 46 | ********************************************************************************************************* 47 | * MEMORY LIBRARY ARGUMENT CHECK CONFIGURATION 48 | * 49 | * Note(s) : (1) Configure LIB_MEM_CFG_ARG_CHK_EXT_EN to enable/disable the memory library suite external 50 | * argument check feature : 51 | * 52 | * (a) When ENABLED, arguments received from any port interface provided by the developer 53 | * or application are checked/validated. 54 | * 55 | * (b) When DISABLED, NO arguments received from any port interface provided by the developer 56 | * or application are checked/validated. 57 | ********************************************************************************************************* 58 | */ 59 | 60 | /* External argument check. */ 61 | /* Indicates if arguments received from any port ... */ 62 | /* ... interface provided by the developer or ... */ 63 | /* ... application are checked/validated. */ 64 | #define LIB_MEM_CFG_ARG_CHK_EXT_EN DEF_DISABLED 65 | 66 | 67 | /* 68 | ********************************************************************************************************* 69 | * MEMORY LIBRARY ASSEMBLY OPTIMIZATION CONFIGURATION 70 | * 71 | * Note(s) : (1) Configure LIB_MEM_CFG_OPTIMIZE_ASM_EN to enable/disable assembly-optimized memory function(s). 72 | ********************************************************************************************************* 73 | */ 74 | 75 | /* Assembly-optimized function(s). */ 76 | /* Enable/disable assembly-optimized memory ... */ 77 | /* ... function(s). [see Note #1] */ 78 | #define LIB_MEM_CFG_OPTIMIZE_ASM_EN DEF_DISABLED 79 | 80 | 81 | /* 82 | ********************************************************************************************************* 83 | * MEMORY ALLOCATION CONFIGURATION 84 | * 85 | * Note(s) : (1) Configure LIB_MEM_CFG_DBG_INFO_EN to enable/disable memory allocation usage tracking 86 | * that associates a name with each segment or dynamic pool allocated. 87 | * 88 | * (2) (a) Configure LIB_MEM_CFG_HEAP_SIZE with the desired size of heap memory (in octets). 89 | * 90 | * (b) Configure LIB_MEM_CFG_HEAP_BASE_ADDR to specify a base address for heap memory : 91 | * 92 | * (1) Heap initialized to specified application memory, if LIB_MEM_CFG_HEAP_BASE_ADDR 93 | * #define'd in 'lib_cfg.h'; 94 | * CANNOT #define to address 0x0 95 | * 96 | * (2) Heap declared to Mem_Heap[] in 'lib_mem.c', if LIB_MEM_CFG_HEAP_BASE_ADDR 97 | * NOT #define'd in 'lib_cfg.h' 98 | ********************************************************************************************************* 99 | */ 100 | 101 | /* Allocation debugging information. */ 102 | /* Enable/disable allocation of debug information ... */ 103 | /* ... associated to each memory allocation. */ 104 | #define LIB_MEM_CFG_DBG_INFO_EN DEF_DISABLED 105 | 106 | 107 | /* Heap memory size (in bytes). */ 108 | /* Configure the desired size of the heap memory. ... */ 109 | /* ... Set to 0 to disable heap allocation features. */ 110 | #define LIB_MEM_CFG_HEAP_SIZE 1024u 111 | 112 | 113 | /* Heap memory padding alignment (in bytes). */ 114 | /* Configure the desired size of padding alignment ... */ 115 | /* ... of each buffer allocated from the heap. */ 116 | #define LIB_MEM_CFG_HEAP_PADDING_ALIGN LIB_MEM_PADDING_ALIGN_NONE 117 | 118 | #if 0 /* Remove this to have heap alloc at specified addr. */ 119 | #define LIB_MEM_CFG_HEAP_BASE_ADDR 0x00000000 /* Configure heap memory base address (see Note #2b). */ 120 | #endif 121 | 122 | 123 | /* 124 | ********************************************************************************************************* 125 | ********************************************************************************************************* 126 | * STRING LIBRARY CONFIGURATION 127 | ********************************************************************************************************* 128 | ********************************************************************************************************* 129 | */ 130 | 131 | /* 132 | ********************************************************************************************************* 133 | * STRING FLOATING POINT CONFIGURATION 134 | * 135 | * Note(s) : (1) Configure LIB_STR_CFG_FP_EN to enable/disable floating point string function(s). 136 | * 137 | * (2) Configure LIB_STR_CFG_FP_MAX_NBR_DIG_SIG to configure the maximum number of significant 138 | * digits to calculate &/or display for floating point string function(s). 139 | * 140 | * See also 'lib_str.h STRING FLOATING POINT DEFINES Note #1'. 141 | ********************************************************************************************************* 142 | */ 143 | 144 | /* Floating point feature(s). */ 145 | /* Enable/disable floating point to string functions. */ 146 | #define LIB_STR_CFG_FP_EN DEF_DISABLED 147 | 148 | 149 | /* Floating point number of significant digits. */ 150 | /* Configure the maximum number of significant ... */ 151 | /* ... digits to calculate &/or display for ... */ 152 | /* ... floating point string function(s). */ 153 | #define LIB_STR_CFG_FP_MAX_NBR_DIG_SIG LIB_STR_FP_MAX_NBR_DIG_SIG_DFLT 154 | 155 | 156 | /* 157 | ********************************************************************************************************* 158 | * MODULE END 159 | ********************************************************************************************************* 160 | */ 161 | 162 | #endif /* End of lib cfg module include. */ 163 | -------------------------------------------------------------------------------- /Ports/ARM/GNU/lib_mem_a.s: -------------------------------------------------------------------------------- 1 | @******************************************************************************************************** 2 | @ uC/LIB 3 | @ Custom Library Modules 4 | @ 5 | @ Copyright 2004-2021 Silicon Laboratories Inc. www.silabs.com 6 | @ 7 | @ SPDX-License-Identifier: APACHE-2.0 8 | @ 9 | @ This software is subject to an open source license and is distributed by 10 | @ Silicon Laboratories Inc. pursuant to the terms of the Apache License, 11 | @ Version 2.0 available at www.apache.org/licenses/LICENSE-2.0. 12 | @ 13 | @******************************************************************************************************** 14 | 15 | 16 | @******************************************************************************************************** 17 | @ 18 | @ STANDARD MEMORY OPERATIONS 19 | @ 20 | @ ARM 21 | @ GNU Compiler 22 | @ 23 | @ Filename : lib_mem_a.s 24 | @ Version : V1.39.01 25 | @******************************************************************************************************** 26 | @ Note(s) : (1) NO compiler-supplied standard library functions are used in library or product software. 27 | @ 28 | @ (a) ALL standard library functions are implemented in the custom library modules : 29 | @ 30 | @ (1) \\lib*.* 31 | @ 32 | @ (2) \\Ports\\\lib*_a.* 33 | @ 34 | @ where 35 | @ directory path for custom library software 36 | @ directory name for specific processor (CPU) 37 | @ directory name for specific compiler 38 | @ 39 | @ (b) Product-specific library functions are implemented in individual products. 40 | @ 41 | @ (2) Assumes ARM CPU mode configured for Little Endian. 42 | @******************************************************************************************************** 43 | 44 | 45 | @******************************************************************************************************** 46 | @ PUBLIC FUNCTIONS 47 | @******************************************************************************************************** 48 | 49 | .global Mem_Copy 50 | 51 | 52 | @******************************************************************************************************** 53 | @ CODE GENERATION DIRECTIVES 54 | @******************************************************************************************************** 55 | 56 | .code 32 57 | 58 | 59 | @******************************************************************************************************** 60 | @ Mem_Copy() 61 | @ 62 | @ Description : Copy data octets from one buffer to another buffer. 63 | @ 64 | @ Argument(s) : pdest Pointer to destination memory buffer. 65 | @ 66 | @ psrc Pointer to source memory buffer. 67 | @ 68 | @ size Number of data buffer octets to copy. 69 | @ 70 | @ Return(s) : none. 71 | @ 72 | @ Caller(s) : Application. 73 | @ 74 | @ Note(s) : (1) Null copies allowed (i.e. 0-octet size). 75 | @ 76 | @ (2) Memory buffers NOT checked for overlapping. 77 | @ 78 | @ (3) Modulo arithmetic is used to determine whether a memory buffer starts on a 'CPU_ALIGN' 79 | @ address boundary. 80 | @******************************************************************************************************** 81 | 82 | @ void Mem_Copy (void *pdest, @ ==> R0 83 | @ void *psrc, @ ==> R1 84 | @ CPU_SIZE_T size) @ ==> R2 85 | 86 | Mem_Copy: 87 | CMP R0, #0 88 | BNE Mem_Copy_1 89 | BX LR @ return if pdest == NULL 90 | 91 | Mem_Copy_1: 92 | CMP R1, #0 93 | BNE Mem_Copy_2 94 | BX LR @ return if psrc == NULL 95 | 96 | Mem_Copy_2: 97 | CMP R2, #0 98 | BNE Mem_Copy_3 99 | BX LR @ return if size == 0 100 | 101 | Mem_Copy_3: 102 | STMFD SP!, {R3-R12} @ save registers on stack 103 | 104 | 105 | Chk_Align_32: @ check if both dest & src 32-bit aligned 106 | AND R3, R0, #0x03 107 | AND R4, R1, #0x03 108 | CMP R3, R4 109 | BNE Chk_Align_16 @ not 32-bit aligned, check for 16-bit alignment 110 | 111 | RSB R3, R3, #0x04 @ compute 1-2-3 pre-copy bytes (to align to the next 32-bit boundary) 112 | AND R3, R3, #0x03 113 | 114 | Pre_Copy_1: 115 | CMP R3, #1 @ copy 1-2-3 bytes (to align to the next 32-bit boundary) 116 | BCC Copy_32_1 @ start real 32-bit copy 117 | CMP R2, #1 @ check if any more data to copy 118 | BCC Mem_Copy_END @ no more data to copy 119 | 120 | LDRB R4, [R1], #1 121 | STRB R4, [R0], #1 122 | SUB R3, R3, #1 123 | SUB R2, R2, #1 124 | B Pre_Copy_1 125 | 126 | 127 | Chk_Align_16: @ check if both dest & src 16-bit aligned 128 | AND R3, R0, #0x01 129 | AND R4, R1, #0x01 130 | CMP R3, R4 131 | BNE Copy_08_1 @ not 16-bit aligned, start 8-bit copy 132 | 133 | Pre_Copy_2: 134 | CMP R3, #1 @ copy 1 byte (to align to the next 16-bit boundary) 135 | BCC Copy_16_1 @ start real 16-bit copy 136 | LDRB R4, [R1], #1 137 | STRB R4, [R0], #1 138 | SUB R3, R3, #1 139 | SUB R2, R2, #1 140 | B Pre_Copy_2 141 | 142 | 143 | Copy_32_1: 144 | CMP R2, #360 @ Copy 9 chunks of 10 32-bit words (360 octets per loop) 145 | BCC Copy_32_2 146 | LDMIA R1!, {R3-R12} 147 | STMIA R0!, {R3-R12} 148 | LDMIA R1!, {R3-R12} 149 | STMIA R0!, {R3-R12} 150 | LDMIA R1!, {R3-R12} 151 | STMIA R0!, {R3-R12} 152 | LDMIA R1!, {R3-R12} 153 | STMIA R0!, {R3-R12} 154 | LDMIA R1!, {R3-R12} 155 | STMIA R0!, {R3-R12} 156 | LDMIA R1!, {R3-R12} 157 | STMIA R0!, {R3-R12} 158 | LDMIA R1!, {R3-R12} 159 | STMIA R0!, {R3-R12} 160 | LDMIA R1!, {R3-R12} 161 | STMIA R0!, {R3-R12} 162 | LDMIA R1!, {R3-R12} 163 | STMIA R0!, {R3-R12} 164 | SUB R2, R2, #360 165 | B Copy_32_1 166 | 167 | Copy_32_2: 168 | CMP R2, #(04*10*01) @ Copy chunks of 10 32-bit words (40 octets per loop) 169 | BCC Copy_32_3 170 | LDMIA R1!, {R3-R12} 171 | STMIA R0!, {R3-R12} 172 | SUB R2, R2, #(04*10*01) 173 | B Copy_32_2 174 | 175 | Copy_32_3: 176 | CMP R2, #(04*01*01) @ Copy remaining 32-bit words 177 | BCC Copy_16_1 178 | LDR R3, [R1], #4 179 | STR R3, [R0], #4 180 | SUB R2, R2, #(04*01*01) 181 | B Copy_32_3 182 | 183 | Copy_16_1: 184 | CMP R2, #(02*01*16) @ Copy chunks of 16 16-bit words (32 bytes per loop) 185 | BCC Copy_16_2 186 | LDRH R3, [R1], #2 187 | STRH R3, [R0], #2 188 | LDRH R3, [R1], #2 189 | STRH R3, [R0], #2 190 | LDRH R3, [R1], #2 191 | STRH R3, [R0], #2 192 | LDRH R3, [R1], #2 193 | STRH R3, [R0], #2 194 | LDRH R3, [R1], #2 195 | STRH R3, [R0], #2 196 | LDRH R3, [R1], #2 197 | STRH R3, [R0], #2 198 | LDRH R3, [R1], #2 199 | STRH R3, [R0], #2 200 | LDRH R3, [R1], #2 201 | STRH R3, [R0], #2 202 | LDRH R3, [R1], #2 203 | STRH R3, [R0], #2 204 | LDRH R3, [R1], #2 205 | STRH R3, [R0], #2 206 | LDRH R3, [R1], #2 207 | STRH R3, [R0], #2 208 | LDRH R3, [R1], #2 209 | STRH R3, [R0], #2 210 | LDRH R3, [R1], #2 211 | STRH R3, [R0], #2 212 | LDRH R3, [R1], #2 213 | STRH R3, [R0], #2 214 | LDRH R3, [R1], #2 215 | STRH R3, [R0], #2 216 | LDRH R3, [R1], #2 217 | STRH R3, [R0], #2 218 | SUB R2, R2, #(02*01*16) 219 | B Copy_16_1 220 | 221 | Copy_16_2: 222 | CMP R2, #(02*01*01) @ Copy remaining 16-bit words 223 | BCC Copy_08_1 224 | LDRH R3, [R1], #2 225 | STRH R3, [R0], #2 226 | SUB R2, R2, #(02*01*01) 227 | B Copy_16_2 228 | 229 | Copy_08_1: 230 | CMP R2, #(01*01*16) @ Copy chunks of 16 8-bit words (16 bytes per loop) 231 | BCC Copy_08_2 232 | LDRB R3, [R1], #1 233 | STRB R3, [R0], #1 234 | LDRB R3, [R1], #1 235 | STRB R3, [R0], #1 236 | LDRB R3, [R1], #1 237 | STRB R3, [R0], #1 238 | LDRB R3, [R1], #1 239 | STRB R3, [R0], #1 240 | LDRB R3, [R1], #1 241 | STRB R3, [R0], #1 242 | LDRB R3, [R1], #1 243 | STRB R3, [R0], #1 244 | LDRB R3, [R1], #1 245 | STRB R3, [R0], #1 246 | LDRB R3, [R1], #1 247 | STRB R3, [R0], #1 248 | LDRB R3, [R1], #1 249 | STRB R3, [R0], #1 250 | LDRB R3, [R1], #1 251 | STRB R3, [R0], #1 252 | LDRB R3, [R1], #1 253 | STRB R3, [R0], #1 254 | LDRB R3, [R1], #1 255 | STRB R3, [R0], #1 256 | LDRB R3, [R1], #1 257 | STRB R3, [R0], #1 258 | LDRB R3, [R1], #1 259 | STRB R3, [R0], #1 260 | LDRB R3, [R1], #1 261 | STRB R3, [R0], #1 262 | LDRB R3, [R1], #1 263 | STRB R3, [R0], #1 264 | SUB R2, R2, #(01*01*16) 265 | B Copy_08_1 266 | 267 | Copy_08_2: 268 | CMP R2, #(01*01*01) @ Copy remaining 8-bit words 269 | BCC Mem_Copy_END 270 | LDRB R3, [R1], #1 271 | STRB R3, [R0], #1 272 | SUB R2, R2, #(01*01*01) 273 | B Copy_08_2 274 | 275 | 276 | Mem_Copy_END: 277 | LDMFD SP!, {R3-R12} @ restore registers from stack 278 | BX LR @ return 279 | 280 | 281 | .ltorg 282 | -------------------------------------------------------------------------------- /Ports/ARM/IAR/lib_mem_a.asm: -------------------------------------------------------------------------------- 1 | ;******************************************************************************************************** 2 | ; uC/LIB 3 | ; Custom Library Modules 4 | ; 5 | ; Copyright 2004-2021 Silicon Laboratories Inc. www.silabs.com 6 | ; 7 | ; SPDX-License-Identifier: APACHE-2.0 8 | ; 9 | ; This software is subject to an open source license and is distributed by 10 | ; Silicon Laboratories Inc. pursuant to the terms of the Apache License, 11 | ; Version 2.0 available at www.apache.org/licenses/LICENSE-2.0. 12 | ; 13 | ;******************************************************************************************************** 14 | 15 | 16 | ;******************************************************************************************************** 17 | ; 18 | ; STANDARD MEMORY OPERATIONS 19 | ; 20 | ; ARM 21 | ; IAR Compiler 22 | ; 23 | ; Filename : lib_mem_a.asm 24 | ; Version : V1.39.01 25 | ;******************************************************************************************************** 26 | ; Note(s) : (1) NO compiler-supplied standard library functions are used in library or product software. 27 | ; 28 | ; (a) ALL standard library functions are implemented in the custom library modules : 29 | ; 30 | ; (1) \\lib*.* 31 | ; 32 | ; (2) \\Ports\\\lib*_a.* 33 | ; 34 | ; where 35 | ; directory path for custom library software 36 | ; directory name for specific processor (CPU) 37 | ; directory name for specific compiler 38 | ; 39 | ; (b) Product-specific library functions are implemented in individual products. 40 | ; 41 | ; (2) Assumes ARM CPU mode configured for Little Endian. 42 | ;******************************************************************************************************** 43 | 44 | 45 | ;******************************************************************************************************** 46 | ; PUBLIC FUNCTIONS 47 | ;******************************************************************************************************** 48 | 49 | PUBLIC Mem_Copy 50 | 51 | 52 | ;******************************************************************************************************** 53 | ; CODE GENERATION DIRECTIVES 54 | ;******************************************************************************************************** 55 | 56 | RSEG CODE:CODE:NOROOT(2) 57 | CODE32 58 | 59 | 60 | ;******************************************************************************************************** 61 | ; Mem_Copy() 62 | ; 63 | ; Description : Copy data octets from one buffer to another buffer. 64 | ; 65 | ; Argument(s) : pdest Pointer to destination memory buffer. 66 | ; 67 | ; psrc Pointer to source memory buffer. 68 | ; 69 | ; size Number of data buffer octets to copy. 70 | ; 71 | ; Return(s) : none. 72 | ; 73 | ; Caller(s) : Application. 74 | ; 75 | ; Note(s) : (1) Null copies allowed (i.e. 0-octet size). 76 | ; 77 | ; (2) Memory buffers NOT checked for overlapping. 78 | ; 79 | ; (3) Modulo arithmetic is used to determine whether a memory buffer starts on a 'CPU_ALIGN' 80 | ; address boundary. 81 | ;******************************************************************************************************** 82 | 83 | ; void Mem_Copy (void *pdest, ; ==> R0 84 | ; void *psrc, ; ==> R1 85 | ; CPU_SIZE_T size) ; ==> R2 86 | 87 | Mem_Copy: 88 | CMP R0, #0 89 | BNE Mem_Copy_1 90 | BX LR ; return if pdest == NULL 91 | 92 | Mem_Copy_1: 93 | CMP R1, #0 94 | BNE Mem_Copy_2 95 | BX LR ; return if psrc == NULL 96 | 97 | Mem_Copy_2: 98 | CMP R2, #0 99 | BNE Mem_Copy_3 100 | BX LR ; return if size == 0 101 | 102 | Mem_Copy_3: 103 | STMFD SP!, {R3-R12} ; save registers on stack 104 | 105 | 106 | Chk_Align_32: ; check if both dest & src 32-bit aligned 107 | AND R3, R0, #0x03 108 | AND R4, R1, #0x03 109 | CMP R3, R4 110 | BNE Chk_Align_16 ; not 32-bit aligned, check for 16-bit alignment 111 | 112 | RSB R3, R3, #0x04 ; compute 1-2-3 pre-copy bytes (to align to the next 32-bit boundary) 113 | AND R3, R3, #0x03 114 | 115 | Pre_Copy_1: 116 | CMP R3, #1 ; copy 1-2-3 bytes (to align to the next 32-bit boundary) 117 | BCC Copy_32_1 ; start real 32-bit copy 118 | CMP R2, #1 ; check if any more data to copy 119 | BCC Mem_Copy_END ; no more data to copy 120 | 121 | LDRB R4, [R1], #1 122 | STRB R4, [R0], #1 123 | SUB R3, R3, #1 124 | SUB R2, R2, #1 125 | B Pre_Copy_1 126 | 127 | 128 | Chk_Align_16: ; check if both dest & src 16-bit aligned 129 | AND R3, R0, #0x01 130 | AND R4, R1, #0x01 131 | CMP R3, R4 132 | BNE Copy_08_1 ; not 16-bit aligned, start 8-bit copy 133 | 134 | Pre_Copy_2: 135 | CMP R3, #1 ; copy 1 byte (to align to the next 16-bit boundary) 136 | BCC Copy_16_1 ; start real 16-bit copy 137 | 138 | LDRB R4, [R1], #1 139 | STRB R4, [R0], #1 140 | SUB R3, R3, #1 141 | SUB R2, R2, #1 142 | B Pre_Copy_2 143 | 144 | 145 | Copy_32_1: 146 | CMP R2, #(04*10*09) ; Copy 9 chunks of 10 32-bit words (360 octets per loop) 147 | BCC Copy_32_2 148 | LDMIA R1!, {R3-R12} 149 | STMIA R0!, {R3-R12} 150 | LDMIA R1!, {R3-R12} 151 | STMIA R0!, {R3-R12} 152 | LDMIA R1!, {R3-R12} 153 | STMIA R0!, {R3-R12} 154 | LDMIA R1!, {R3-R12} 155 | STMIA R0!, {R3-R12} 156 | LDMIA R1!, {R3-R12} 157 | STMIA R0!, {R3-R12} 158 | LDMIA R1!, {R3-R12} 159 | STMIA R0!, {R3-R12} 160 | LDMIA R1!, {R3-R12} 161 | STMIA R0!, {R3-R12} 162 | LDMIA R1!, {R3-R12} 163 | STMIA R0!, {R3-R12} 164 | LDMIA R1!, {R3-R12} 165 | STMIA R0!, {R3-R12} 166 | SUB R2, R2, #(04*10*09) 167 | B Copy_32_1 168 | 169 | Copy_32_2: 170 | CMP R2, #(04*10*01) ; Copy chunks of 10 32-bit words (40 octets per loop) 171 | BCC Copy_32_3 172 | LDMIA R1!, {R3-R12} 173 | STMIA R0!, {R3-R12} 174 | SUB R2, R2, #(04*10*01) 175 | B Copy_32_2 176 | 177 | Copy_32_3: 178 | CMP R2, #(04*01*01) ; Copy remaining 32-bit words 179 | BCC Copy_16_1 180 | LDR R3, [R1], #4 181 | STR R3, [R0], #4 182 | SUB R2, R2, #(04*01*01) 183 | B Copy_32_3 184 | 185 | Copy_16_1: 186 | CMP R2, #(02*01*16) ; Copy chunks of 16 16-bit words (32 bytes per loop) 187 | BCC Copy_16_2 188 | LDRH R3, [R1], #2 189 | STRH R3, [R0], #2 190 | LDRH R3, [R1], #2 191 | STRH R3, [R0], #2 192 | LDRH R3, [R1], #2 193 | STRH R3, [R0], #2 194 | LDRH R3, [R1], #2 195 | STRH R3, [R0], #2 196 | LDRH R3, [R1], #2 197 | STRH R3, [R0], #2 198 | LDRH R3, [R1], #2 199 | STRH R3, [R0], #2 200 | LDRH R3, [R1], #2 201 | STRH R3, [R0], #2 202 | LDRH R3, [R1], #2 203 | STRH R3, [R0], #2 204 | LDRH R3, [R1], #2 205 | STRH R3, [R0], #2 206 | LDRH R3, [R1], #2 207 | STRH R3, [R0], #2 208 | LDRH R3, [R1], #2 209 | STRH R3, [R0], #2 210 | LDRH R3, [R1], #2 211 | STRH R3, [R0], #2 212 | LDRH R3, [R1], #2 213 | STRH R3, [R0], #2 214 | LDRH R3, [R1], #2 215 | STRH R3, [R0], #2 216 | LDRH R3, [R1], #2 217 | STRH R3, [R0], #2 218 | LDRH R3, [R1], #2 219 | STRH R3, [R0], #2 220 | SUB R2, R2, #(02*01*16) 221 | B Copy_16_1 222 | 223 | Copy_16_2: 224 | CMP R2, #(02*01*01) ; Copy remaining 16-bit words 225 | BCC Copy_08_1 226 | LDRH R3, [R1], #2 227 | STRH R3, [R0], #2 228 | SUB R2, R2, #(02*01*01) 229 | B Copy_16_2 230 | 231 | Copy_08_1: 232 | CMP R2, #(01*01*16) ; Copy chunks of 16 8-bit words (16 bytes per loop) 233 | BCC Copy_08_2 234 | LDRB R3, [R1], #1 235 | STRB R3, [R0], #1 236 | LDRB R3, [R1], #1 237 | STRB R3, [R0], #1 238 | LDRB R3, [R1], #1 239 | STRB R3, [R0], #1 240 | LDRB R3, [R1], #1 241 | STRB R3, [R0], #1 242 | LDRB R3, [R1], #1 243 | STRB R3, [R0], #1 244 | LDRB R3, [R1], #1 245 | STRB R3, [R0], #1 246 | LDRB R3, [R1], #1 247 | STRB R3, [R0], #1 248 | LDRB R3, [R1], #1 249 | STRB R3, [R0], #1 250 | LDRB R3, [R1], #1 251 | STRB R3, [R0], #1 252 | LDRB R3, [R1], #1 253 | STRB R3, [R0], #1 254 | LDRB R3, [R1], #1 255 | STRB R3, [R0], #1 256 | LDRB R3, [R1], #1 257 | STRB R3, [R0], #1 258 | LDRB R3, [R1], #1 259 | STRB R3, [R0], #1 260 | LDRB R3, [R1], #1 261 | STRB R3, [R0], #1 262 | LDRB R3, [R1], #1 263 | STRB R3, [R0], #1 264 | LDRB R3, [R1], #1 265 | STRB R3, [R0], #1 266 | SUB R2, R2, #(01*01*16) 267 | B Copy_08_1 268 | 269 | Copy_08_2: 270 | CMP R2, #(01*01*01) ; Copy remaining 8-bit words 271 | BCC Mem_Copy_END 272 | LDRB R3, [R1], #1 273 | STRB R3, [R0], #1 274 | SUB R2, R2, #(01*01*01) 275 | B Copy_08_2 276 | 277 | 278 | Mem_Copy_END: 279 | LDMFD SP!, {R3-R12} ; restore registers from stack 280 | BX LR ; return 281 | 282 | 283 | END 284 | -------------------------------------------------------------------------------- /Ports/ARM/RealView/lib_mem_a.asm: -------------------------------------------------------------------------------- 1 | ;******************************************************************************************************** 2 | ; uC/LIB 3 | ; Custom Library Modules 4 | ; 5 | ; Copyright 2004-2021 Silicon Laboratories Inc. www.silabs.com 6 | ; 7 | ; SPDX-License-Identifier: APACHE-2.0 8 | ; 9 | ; This software is subject to an open source license and is distributed by 10 | ; Silicon Laboratories Inc. pursuant to the terms of the Apache License, 11 | ; Version 2.0 available at www.apache.org/licenses/LICENSE-2.0. 12 | ; 13 | ;******************************************************************************************************** 14 | 15 | 16 | ;******************************************************************************************************** 17 | ; 18 | ; STANDARD MEMORY OPERATIONS 19 | ; 20 | ; ARM 21 | ; RealView Development Suite 22 | ; RealView Microcontroller Development Kit (MDK) 23 | ; ARM Developer Suite (ADS) 24 | ; Keil uVision 25 | ; 26 | ; Filename : lib_mem_a.asm 27 | ; Version : V1.39.01 28 | ;******************************************************************************************************** 29 | ; Note(s) : (1) NO compiler-supplied standard library functions are used in library or product software. 30 | ; 31 | ; (a) ALL standard library functions are implemented in the custom library modules : 32 | ; 33 | ; (1) \\lib*.* 34 | ; 35 | ; (2) \\Ports\\\lib*_a.* 36 | ; 37 | ; where 38 | ; directory path for custom library software 39 | ; directory name for specific processor (CPU) 40 | ; directory name for specific compiler 41 | ; 42 | ; (b) Product-specific library functions are implemented in individual products. 43 | ; 44 | ; (2) Assumes ARM CPU mode configured for Little Endian. 45 | ;******************************************************************************************************** 46 | 47 | 48 | ;******************************************************************************************************** 49 | ; PUBLIC FUNCTIONS 50 | ;******************************************************************************************************** 51 | 52 | EXPORT Mem_Copy 53 | 54 | 55 | ;******************************************************************************************************** 56 | ; CODE GENERATION DIRECTIVES 57 | ;******************************************************************************************************** 58 | 59 | AREA |.text|, CODE, READONLY, ALIGN=2 60 | ARM 61 | REQUIRE8 62 | PRESERVE8 63 | 64 | 65 | ;******************************************************************************************************** 66 | ; Mem_Copy() 67 | ; 68 | ; Description : Copy data octets from one buffer to another buffer. 69 | ; 70 | ; Argument(s) : pdest Pointer to destination memory buffer. 71 | ; 72 | ; psrc Pointer to source memory buffer. 73 | ; 74 | ; size Number of data buffer octets to copy. 75 | ; 76 | ; Return(s) : none. 77 | ; 78 | ; Caller(s) : Application. 79 | ; 80 | ; Note(s) : (1) Null copies allowed (i.e. 0-octet size). 81 | ; 82 | ; (2) Memory buffers NOT checked for overlapping. 83 | ; 84 | ; (3) Modulo arithmetic is used to determine whether a memory buffer starts on a 'CPU_ALIGN' 85 | ; address boundary. 86 | ;******************************************************************************************************** 87 | 88 | ; void Mem_Copy (void *pdest, ; ==> R0 89 | ; void *psrc, ; ==> R1 90 | ; CPU_SIZE_T size) ; ==> R2 91 | 92 | Mem_Copy 93 | CMP R0, #0 94 | BNE Mem_Copy_1 95 | BX LR ; return if pdest == NULL 96 | 97 | Mem_Copy_1 98 | CMP R1, #0 99 | BNE Mem_Copy_2 100 | BX LR ; return if psrc == NULL 101 | 102 | Mem_Copy_2 103 | CMP R2, #0 104 | BNE Mem_Copy_3 105 | BX LR ; return if size == 0 106 | 107 | Mem_Copy_3 108 | STMFD SP!, {R3-R12} ; save registers on stack 109 | 110 | 111 | Chk_Align_32 ; check if both dest & src 32-bit aligned 112 | AND R3, R0, #0x03 113 | AND R4, R1, #0x03 114 | CMP R3, R4 115 | BNE Chk_Align_16 ; not 32-bit aligned, check for 16-bit alignment 116 | 117 | RSB R3, R3, #0x04 ; compute 1-2-3 pre-copy bytes (to align to the next 32-bit boundary) 118 | AND R3, R3, #0x03 119 | 120 | Pre_Copy_1 121 | CMP R3, #1 ; copy 1-2-3 bytes (to align to the next 32-bit boundary) 122 | BCC Copy_32_1 ; start real 32-bit copy 123 | CMP R2, #1 ; check if any more data to copy 124 | BCC Mem_Copy_END ; no more data to copy 125 | 126 | LDRB R4, [R1], #1 127 | STRB R4, [R0], #1 128 | SUB R3, R3, #1 129 | SUB R2, R2, #1 130 | B Pre_Copy_1 131 | 132 | 133 | Chk_Align_16 ; check if both dest & src 16-bit aligned 134 | AND R3, R0, #0x01 135 | AND R4, R1, #0x01 136 | CMP R3, R4 137 | BNE Copy_08_1 ; not 16-bit aligned, start 8-bit copy 138 | 139 | Pre_Copy_2 140 | CMP R3, #1 ; copy 1 byte (to align to the next 16-bit boundary) 141 | BCC Copy_16_1 ; start real 16-bit copy 142 | 143 | LDRB R4, [R1], #1 144 | STRB R4, [R0], #1 145 | SUB R3, R3, #1 146 | SUB R2, R2, #1 147 | B Pre_Copy_2 148 | 149 | 150 | Copy_32_1 151 | CMP R2, #(04*10*09) ; Copy 9 chunks of 10 32-bit words (360 octets per loop) 152 | BCC Copy_32_2 153 | LDMIA R1!, {R3-R12} 154 | STMIA R0!, {R3-R12} 155 | LDMIA R1!, {R3-R12} 156 | STMIA R0!, {R3-R12} 157 | LDMIA R1!, {R3-R12} 158 | STMIA R0!, {R3-R12} 159 | LDMIA R1!, {R3-R12} 160 | STMIA R0!, {R3-R12} 161 | LDMIA R1!, {R3-R12} 162 | STMIA R0!, {R3-R12} 163 | LDMIA R1!, {R3-R12} 164 | STMIA R0!, {R3-R12} 165 | LDMIA R1!, {R3-R12} 166 | STMIA R0!, {R3-R12} 167 | LDMIA R1!, {R3-R12} 168 | STMIA R0!, {R3-R12} 169 | LDMIA R1!, {R3-R12} 170 | STMIA R0!, {R3-R12} 171 | SUB R2, R2, #(04*10*09) 172 | B Copy_32_1 173 | 174 | Copy_32_2 175 | CMP R2, #(04*10*01) ; Copy chunks of 10 32-bit words (40 octets per loop) 176 | BCC Copy_32_3 177 | LDMIA R1!, {R3-R12} 178 | STMIA R0!, {R3-R12} 179 | SUB R2, R2, #(04*10*01) 180 | B Copy_32_2 181 | 182 | Copy_32_3 183 | CMP R2, #(04*01*01) ; Copy remaining 32-bit words 184 | BCC Copy_16_1 185 | LDR R3, [R1], #4 186 | STR R3, [R0], #4 187 | SUB R2, R2, #(04*01*01) 188 | B Copy_32_3 189 | 190 | Copy_16_1 191 | CMP R2, #(02*01*16) ; Copy chunks of 16 16-bit words (32 bytes per loop) 192 | BCC Copy_16_2 193 | LDRH R3, [R1], #2 194 | STRH R3, [R0], #2 195 | LDRH R3, [R1], #2 196 | STRH R3, [R0], #2 197 | LDRH R3, [R1], #2 198 | STRH R3, [R0], #2 199 | LDRH R3, [R1], #2 200 | STRH R3, [R0], #2 201 | LDRH R3, [R1], #2 202 | STRH R3, [R0], #2 203 | LDRH R3, [R1], #2 204 | STRH R3, [R0], #2 205 | LDRH R3, [R1], #2 206 | STRH R3, [R0], #2 207 | LDRH R3, [R1], #2 208 | STRH R3, [R0], #2 209 | LDRH R3, [R1], #2 210 | STRH R3, [R0], #2 211 | LDRH R3, [R1], #2 212 | STRH R3, [R0], #2 213 | LDRH R3, [R1], #2 214 | STRH R3, [R0], #2 215 | LDRH R3, [R1], #2 216 | STRH R3, [R0], #2 217 | LDRH R3, [R1], #2 218 | STRH R3, [R0], #2 219 | LDRH R3, [R1], #2 220 | STRH R3, [R0], #2 221 | LDRH R3, [R1], #2 222 | STRH R3, [R0], #2 223 | LDRH R3, [R1], #2 224 | STRH R3, [R0], #2 225 | SUB R2, R2, #(02*01*16) 226 | B Copy_16_1 227 | 228 | Copy_16_2 229 | CMP R2, #(02*01*01) ; Copy remaining 16-bit words 230 | BCC Copy_08_1 231 | LDRH R3, [R1], #2 232 | STRH R3, [R0], #2 233 | SUB R2, R2, #(02*01*01) 234 | B Copy_16_2 235 | 236 | Copy_08_1 237 | CMP R2, #(01*01*16) ; Copy chunks of 16 8-bit words (16 bytes per loop) 238 | BCC Copy_08_2 239 | LDRB R3, [R1], #1 240 | STRB R3, [R0], #1 241 | LDRB R3, [R1], #1 242 | STRB R3, [R0], #1 243 | LDRB R3, [R1], #1 244 | STRB R3, [R0], #1 245 | LDRB R3, [R1], #1 246 | STRB R3, [R0], #1 247 | LDRB R3, [R1], #1 248 | STRB R3, [R0], #1 249 | LDRB R3, [R1], #1 250 | STRB R3, [R0], #1 251 | LDRB R3, [R1], #1 252 | STRB R3, [R0], #1 253 | LDRB R3, [R1], #1 254 | STRB R3, [R0], #1 255 | LDRB R3, [R1], #1 256 | STRB R3, [R0], #1 257 | LDRB R3, [R1], #1 258 | STRB R3, [R0], #1 259 | LDRB R3, [R1], #1 260 | STRB R3, [R0], #1 261 | LDRB R3, [R1], #1 262 | STRB R3, [R0], #1 263 | LDRB R3, [R1], #1 264 | STRB R3, [R0], #1 265 | LDRB R3, [R1], #1 266 | STRB R3, [R0], #1 267 | LDRB R3, [R1], #1 268 | STRB R3, [R0], #1 269 | LDRB R3, [R1], #1 270 | STRB R3, [R0], #1 271 | SUB R2, R2, #(01*01*16) 272 | B Copy_08_1 273 | 274 | Copy_08_2 275 | CMP R2, #(01*01*01) ; Copy remaining 8-bit words 276 | BCC Mem_Copy_END 277 | LDRB R3, [R1], #1 278 | STRB R3, [R0], #1 279 | SUB R2, R2, #(01*01*01) 280 | B Copy_08_2 281 | 282 | 283 | Mem_Copy_END 284 | LDMFD SP!, {R3-R12} ; restore registers from stack 285 | BX LR ; return 286 | 287 | 288 | END 289 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | 2 | Apache License 3 | Version 2.0, January 2004 4 | http://www.apache.org/licenses/ 5 | 6 | TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION 7 | 8 | 1. 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-------------------------------------------------------------------------------- 1 | ;******************************************************************************************************** 2 | ; uC/LIB 3 | ; Custom Library Modules 4 | ; 5 | ; Copyright 2004-2021 Silicon Laboratories Inc. www.silabs.com 6 | ; 7 | ; SPDX-License-Identifier: APACHE-2.0 8 | ; 9 | ; This software is subject to an open source license and is distributed by 10 | ; Silicon Laboratories Inc. pursuant to the terms of the Apache License, 11 | ; Version 2.0 available at www.apache.org/licenses/LICENSE-2.0. 12 | ; 13 | ;******************************************************************************************************** 14 | 15 | 16 | ;******************************************************************************************************** 17 | ; 18 | ; STANDARD MEMORY OPERATIONS 19 | ; 20 | ; ARM-Cortex-M3 21 | ; IAR Compiler 22 | ; 23 | ; Filename : lib_mem_a.asm 24 | ; Version : V1.39.01 25 | ;******************************************************************************************************** 26 | ; Note(s) : (1) NO compiler-supplied standard library functions are used in library or product software. 27 | ; 28 | ; (a) ALL standard library functions are implemented in the custom library modules : 29 | ; 30 | ; (1) \\lib*.* 31 | ; 32 | ; (2) \\Ports\\\lib*_a.* 33 | ; 34 | ; where 35 | ; directory path for custom library software 36 | ; directory name for specific processor (CPU) 37 | ; directory name for specific compiler 38 | ; 39 | ; (b) Product-specific library functions are implemented in individual products. 40 | ; 41 | ; (2) Assumes ARM CPU mode configured for Little Endian. 42 | ;******************************************************************************************************** 43 | 44 | 45 | ;******************************************************************************************************** 46 | ; PUBLIC FUNCTIONS 47 | ;******************************************************************************************************** 48 | 49 | PUBLIC Mem_Copy 50 | 51 | 52 | ;******************************************************************************************************** 53 | ; CODE GENERATION DIRECTIVES 54 | ;******************************************************************************************************** 55 | 56 | RSEG CODE:CODE:NOROOT(2) 57 | 58 | 59 | ;******************************************************************************************************** 60 | ; Mem_Copy() 61 | ; 62 | ; Description : Copy data octets from one buffer to another buffer. 63 | ; 64 | ; Argument(s) : pdest Pointer to destination memory buffer. 65 | ; 66 | ; psrc Pointer to source memory buffer. 67 | ; 68 | ; size Number of data buffer octets to copy. 69 | ; 70 | ; Return(s) : none. 71 | ; 72 | ; Caller(s) : Application. 73 | ; 74 | ; Note(s) : (1) Null copies allowed (i.e. 0-octet size). 75 | ; 76 | ; (2) Memory buffers NOT checked for overlapping. 77 | ; 78 | ; (3) Modulo arithmetic is used to determine whether a memory buffer starts on a 'CPU_ALIGN' 79 | ; address boundary. 80 | ; 81 | ; (4) ARM Cortex-M3 processors use a subset of the ARM Thumb-2 instruction set which does 82 | ; NOT support 16-bit conditional branch instructions but ONLY supports 8-bit conditional 83 | ; branch instructions. 84 | ; 85 | ; Therefore, branches exceeding 8-bit, signed, relative offsets : 86 | ; 87 | ; (a) CANNOT be implemented with conditional branches; but ... 88 | ; (b) MUST be implemented with non-conditional branches. 89 | ;******************************************************************************************************** 90 | 91 | ; void Mem_Copy (void *pdest, ; ==> R0 92 | ; void *psrc, ; ==> R1 93 | ; CPU_SIZE_T size) ; ==> R2 94 | 95 | Mem_Copy: 96 | CMP R0, #0 97 | BNE Mem_Copy_1 98 | BX LR ; return if pdest == NULL 99 | 100 | Mem_Copy_1: 101 | CMP R1, #0 102 | BNE Mem_Copy_2 103 | BX LR ; return if psrc == NULL 104 | 105 | Mem_Copy_2: 106 | CMP R2, #0 107 | BNE Mem_Copy_3 108 | BX LR ; return if size == 0 109 | 110 | Mem_Copy_3: 111 | STMFD SP!, {R3-R12} ; save registers on stack 112 | 113 | 114 | Chk_Align_32: ; check if both dest & src 32-bit aligned 115 | AND R3, R0, #0x03 116 | AND R4, R1, #0x03 117 | CMP R3, R4 118 | BNE Chk_Align_16 ; not 32-bit aligned, check for 16-bit alignment 119 | 120 | RSB R3, R3, #0x04 ; compute 1-2-3 pre-copy bytes (to align to the next 32-bit boundary) 121 | AND R3, R3, #0x03 122 | 123 | Pre_Copy_1: 124 | CMP R3, #1 ; copy 1-2-3 bytes (to align to the next 32-bit boundary) 125 | BCC Copy_32_1 ; start real 32-bit copy 126 | CMP R2, #1 ; check if any more data to copy 127 | BCS Pre_Copy_1_Cont 128 | B Mem_Copy_END ; no more data to copy (see Note #4b) 129 | 130 | Pre_Copy_1_Cont: 131 | LDRB R4, [R1], #1 132 | STRB R4, [R0], #1 133 | SUB R3, R3, #1 134 | SUB R2, R2, #1 135 | B Pre_Copy_1 136 | 137 | 138 | Chk_Align_16: ; check if both dest & src 16-bit aligned 139 | AND R3, R0, #0x01 140 | AND R4, R1, #0x01 141 | CMP R3, R4 142 | BEQ Pre_Copy_2 143 | B Copy_08_1 ; not 16-bit aligned, start 8-bit copy (see Note #4b) 144 | 145 | Pre_Copy_2: 146 | CMP R3, #1 ; copy 1 byte (to align to the next 16-bit boundary) 147 | BCC Copy_16_1 ; start real 16-bit copy 148 | 149 | LDRB R4, [R1], #1 150 | STRB R4, [R0], #1 151 | SUB R3, R3, #1 152 | SUB R2, R2, #1 153 | B Pre_Copy_2 154 | 155 | 156 | Copy_32_1: 157 | CMP R2, #(04*10*09) ; Copy 9 chunks of 10 32-bit words (360 octets per loop) 158 | BCC Copy_32_2 159 | LDMIA R1!, {R3-R12} 160 | STMIA R0!, {R3-R12} 161 | LDMIA R1!, {R3-R12} 162 | STMIA R0!, {R3-R12} 163 | LDMIA R1!, {R3-R12} 164 | STMIA R0!, {R3-R12} 165 | LDMIA R1!, {R3-R12} 166 | STMIA R0!, {R3-R12} 167 | LDMIA R1!, {R3-R12} 168 | STMIA R0!, {R3-R12} 169 | LDMIA R1!, {R3-R12} 170 | STMIA R0!, {R3-R12} 171 | LDMIA R1!, {R3-R12} 172 | STMIA R0!, {R3-R12} 173 | LDMIA R1!, {R3-R12} 174 | STMIA R0!, {R3-R12} 175 | LDMIA R1!, {R3-R12} 176 | STMIA R0!, {R3-R12} 177 | SUB R2, R2, #(04*10*09) 178 | B Copy_32_1 179 | 180 | Copy_32_2: 181 | CMP R2, #(04*10*01) ; Copy chunks of 10 32-bit words (40 octets per loop) 182 | BCC Copy_32_3 183 | LDMIA R1!, {R3-R12} 184 | STMIA R0!, {R3-R12} 185 | SUB R2, R2, #(04*10*01) 186 | B Copy_32_2 187 | 188 | Copy_32_3: 189 | CMP R2, #(04*01*01) ; Copy remaining 32-bit words 190 | BCC Copy_16_1 191 | LDR R3, [R1], #4 192 | STR R3, [R0], #4 193 | SUB R2, R2, #(04*01*01) 194 | B Copy_32_3 195 | 196 | Copy_16_1: 197 | CMP R2, #(02*01*16) ; Copy chunks of 16 16-bit words (32 bytes per loop) 198 | BCC Copy_16_2 199 | LDRH R3, [R1], #2 200 | STRH R3, [R0], #2 201 | LDRH R3, [R1], #2 202 | STRH R3, [R0], #2 203 | LDRH R3, [R1], #2 204 | STRH R3, [R0], #2 205 | LDRH R3, [R1], #2 206 | STRH R3, [R0], #2 207 | LDRH R3, [R1], #2 208 | STRH R3, [R0], #2 209 | LDRH R3, [R1], #2 210 | STRH R3, [R0], #2 211 | LDRH R3, [R1], #2 212 | STRH R3, [R0], #2 213 | LDRH R3, [R1], #2 214 | STRH R3, [R0], #2 215 | LDRH R3, [R1], #2 216 | STRH R3, [R0], #2 217 | LDRH R3, [R1], #2 218 | STRH R3, [R0], #2 219 | LDRH R3, [R1], #2 220 | STRH R3, [R0], #2 221 | LDRH R3, [R1], #2 222 | STRH R3, [R0], #2 223 | LDRH R3, [R1], #2 224 | STRH R3, [R0], #2 225 | LDRH R3, [R1], #2 226 | STRH R3, [R0], #2 227 | LDRH R3, [R1], #2 228 | STRH R3, [R0], #2 229 | LDRH R3, [R1], #2 230 | STRH R3, [R0], #2 231 | SUB R2, R2, #(02*01*16) 232 | B Copy_16_1 233 | 234 | Copy_16_2: 235 | CMP R2, #(02*01*01) ; Copy remaining 16-bit words 236 | BCC Copy_08_1 237 | LDRH R3, [R1], #2 238 | STRH R3, [R0], #2 239 | SUB R2, R2, #(02*01*01) 240 | B Copy_16_2 241 | 242 | Copy_08_1: 243 | CMP R2, #(01*01*16) ; Copy chunks of 16 8-bit words (16 bytes per loop) 244 | BCC Copy_08_2 245 | LDRB R3, [R1], #1 246 | STRB R3, [R0], #1 247 | LDRB R3, [R1], #1 248 | STRB R3, [R0], #1 249 | LDRB R3, [R1], #1 250 | STRB R3, [R0], #1 251 | LDRB R3, [R1], #1 252 | STRB R3, [R0], #1 253 | LDRB R3, [R1], #1 254 | STRB R3, [R0], #1 255 | LDRB R3, [R1], #1 256 | STRB R3, [R0], #1 257 | LDRB R3, [R1], #1 258 | STRB R3, [R0], #1 259 | LDRB R3, [R1], #1 260 | STRB R3, [R0], #1 261 | LDRB R3, [R1], #1 262 | STRB R3, [R0], #1 263 | LDRB R3, [R1], #1 264 | STRB R3, [R0], #1 265 | LDRB R3, [R1], #1 266 | STRB R3, [R0], #1 267 | LDRB R3, [R1], #1 268 | STRB R3, [R0], #1 269 | LDRB R3, [R1], #1 270 | STRB R3, [R0], #1 271 | LDRB R3, [R1], #1 272 | STRB R3, [R0], #1 273 | LDRB R3, [R1], #1 274 | STRB R3, [R0], #1 275 | LDRB R3, [R1], #1 276 | STRB R3, [R0], #1 277 | SUB R2, R2, #(01*01*16) 278 | B Copy_08_1 279 | 280 | Copy_08_2: 281 | CMP R2, #(01*01*01) ; Copy remaining 8-bit words 282 | BCC Mem_Copy_END 283 | LDRB R3, [R1], #1 284 | STRB R3, [R0], #1 285 | SUB R2, R2, #(01*01*01) 286 | B Copy_08_2 287 | 288 | 289 | Mem_Copy_END: 290 | LDMFD SP!, {R3-R12} ; restore registers from stack 291 | BX LR ; return 292 | 293 | 294 | END 295 | -------------------------------------------------------------------------------- /Ports/ARM-Cortex-M4/IAR/lib_mem_a.asm: -------------------------------------------------------------------------------- 1 | ;******************************************************************************************************** 2 | ; uC/LIB 3 | ; Custom Library Modules 4 | ; 5 | ; Copyright 2004-2021 Silicon Laboratories Inc. www.silabs.com 6 | ; 7 | ; SPDX-License-Identifier: APACHE-2.0 8 | ; 9 | ; This software is subject to an open source license and is distributed by 10 | ; Silicon Laboratories Inc. pursuant to the terms of the Apache License, 11 | ; Version 2.0 available at www.apache.org/licenses/LICENSE-2.0. 12 | ; 13 | ;******************************************************************************************************** 14 | 15 | 16 | ;******************************************************************************************************** 17 | ; 18 | ; STANDARD MEMORY OPERATIONS 19 | ; 20 | ; ARM-Cortex-M4 21 | ; IAR Compiler 22 | ; 23 | ; Filename : lib_mem_a.asm 24 | ; Version : V1.39.01 25 | ;******************************************************************************************************** 26 | ; Note(s) : (1) NO compiler-supplied standard library functions are used in library or product software. 27 | ; 28 | ; (a) ALL standard library functions are implemented in the custom library modules : 29 | ; 30 | ; (1) \\lib*.* 31 | ; 32 | ; (2) \\Ports\\\lib*_a.* 33 | ; 34 | ; where 35 | ; directory path for custom library software 36 | ; directory name for specific processor (CPU) 37 | ; directory name for specific compiler 38 | ; 39 | ; (b) Product-specific library functions are implemented in individual products. 40 | ; 41 | ; (2) Assumes ARM CPU mode configured for Little Endian. 42 | ;******************************************************************************************************** 43 | 44 | 45 | ;******************************************************************************************************** 46 | ; PUBLIC FUNCTIONS 47 | ;******************************************************************************************************** 48 | 49 | PUBLIC Mem_Copy 50 | 51 | 52 | ;******************************************************************************************************** 53 | ; CODE GENERATION DIRECTIVES 54 | ;******************************************************************************************************** 55 | 56 | RSEG CODE:CODE:NOROOT(2) 57 | 58 | 59 | ;******************************************************************************************************** 60 | ; Mem_Copy() 61 | ; 62 | ; Description : Copy data octets from one buffer to another buffer. 63 | ; 64 | ; Argument(s) : pdest Pointer to destination memory buffer. 65 | ; 66 | ; psrc Pointer to source memory buffer. 67 | ; 68 | ; size Number of data buffer octets to copy. 69 | ; 70 | ; Return(s) : none. 71 | ; 72 | ; Caller(s) : Application. 73 | ; 74 | ; Note(s) : (1) Null copies allowed (i.e. 0-octet size). 75 | ; 76 | ; (2) Memory buffers NOT checked for overlapping. 77 | ; 78 | ; (3) Modulo arithmetic is used to determine whether a memory buffer starts on a 'CPU_ALIGN' 79 | ; address boundary. 80 | ; 81 | ; (4) ARM Cortex-M3 processors use a subset of the ARM Thumb-2 instruction set which does 82 | ; NOT support 16-bit conditional branch instructions but ONLY supports 8-bit conditional 83 | ; branch instructions. 84 | ; 85 | ; Therefore, branches exceeding 8-bit, signed, relative offsets : 86 | ; 87 | ; (a) CANNOT be implemented with conditional branches; but ... 88 | ; (b) MUST be implemented with non-conditional branches. 89 | ;******************************************************************************************************** 90 | 91 | ; void Mem_Copy (void *pdest, ; ==> R0 92 | ; void *psrc, ; ==> R1 93 | ; CPU_SIZE_T size) ; ==> R2 94 | 95 | Mem_Copy: 96 | CMP R0, #0 97 | BNE Mem_Copy_1 98 | BX LR ; return if pdest == NULL 99 | 100 | Mem_Copy_1: 101 | CMP R1, #0 102 | BNE Mem_Copy_2 103 | BX LR ; return if psrc == NULL 104 | 105 | Mem_Copy_2: 106 | CMP R2, #0 107 | BNE Mem_Copy_3 108 | BX LR ; return if size == 0 109 | 110 | Mem_Copy_3: 111 | STMFD SP!, {R3-R12} ; save registers on stack 112 | 113 | 114 | Chk_Align_32: ; check if both dest & src 32-bit aligned 115 | AND R3, R0, #0x03 116 | AND R4, R1, #0x03 117 | CMP R3, R4 118 | BNE Chk_Align_16 ; not 32-bit aligned, check for 16-bit alignment 119 | 120 | RSB R3, R3, #0x04 ; compute 1-2-3 pre-copy bytes (to align to the next 32-bit boundary) 121 | AND R3, R3, #0x03 122 | 123 | Pre_Copy_1: 124 | CMP R3, #1 ; copy 1-2-3 bytes (to align to the next 32-bit boundary) 125 | BCC Copy_32_1 ; start real 32-bit copy 126 | CMP R2, #1 ; check if any more data to copy 127 | BCS Pre_Copy_1_Cont 128 | B Mem_Copy_END ; no more data to copy (see Note #4b) 129 | 130 | Pre_Copy_1_Cont: 131 | LDRB R4, [R1], #1 132 | STRB R4, [R0], #1 133 | SUB R3, R3, #1 134 | SUB R2, R2, #1 135 | B Pre_Copy_1 136 | 137 | 138 | Chk_Align_16: ; check if both dest & src 16-bit aligned 139 | AND R3, R0, #0x01 140 | AND R4, R1, #0x01 141 | CMP R3, R4 142 | BEQ Pre_Copy_2 143 | B Copy_08_1 ; not 16-bit aligned, start 8-bit copy (see Note #4b) 144 | 145 | Pre_Copy_2: 146 | CMP R3, #1 ; copy 1 byte (to align to the next 16-bit boundary) 147 | BCC Copy_16_1 ; start real 16-bit copy 148 | 149 | LDRB R4, [R1], #1 150 | STRB R4, [R0], #1 151 | SUB R3, R3, #1 152 | SUB R2, R2, #1 153 | B Pre_Copy_2 154 | 155 | 156 | Copy_32_1: 157 | CMP R2, #(04*10*09) ; Copy 9 chunks of 10 32-bit words (360 octets per loop) 158 | BCC Copy_32_2 159 | LDMIA R1!, {R3-R12} 160 | STMIA R0!, {R3-R12} 161 | LDMIA R1!, {R3-R12} 162 | STMIA R0!, {R3-R12} 163 | LDMIA R1!, {R3-R12} 164 | STMIA R0!, {R3-R12} 165 | LDMIA R1!, {R3-R12} 166 | STMIA R0!, {R3-R12} 167 | LDMIA R1!, {R3-R12} 168 | STMIA R0!, {R3-R12} 169 | LDMIA R1!, {R3-R12} 170 | STMIA R0!, {R3-R12} 171 | LDMIA R1!, {R3-R12} 172 | STMIA R0!, {R3-R12} 173 | LDMIA R1!, {R3-R12} 174 | STMIA R0!, {R3-R12} 175 | LDMIA R1!, {R3-R12} 176 | STMIA R0!, {R3-R12} 177 | SUB R2, R2, #(04*10*09) 178 | B Copy_32_1 179 | 180 | Copy_32_2: 181 | CMP R2, #(04*10*01) ; Copy chunks of 10 32-bit words (40 octets per loop) 182 | BCC Copy_32_3 183 | LDMIA R1!, {R3-R12} 184 | STMIA R0!, {R3-R12} 185 | SUB R2, R2, #(04*10*01) 186 | B Copy_32_2 187 | 188 | Copy_32_3: 189 | CMP R2, #(04*01*01) ; Copy remaining 32-bit words 190 | BCC Copy_16_1 191 | LDR R3, [R1], #4 192 | STR R3, [R0], #4 193 | SUB R2, R2, #(04*01*01) 194 | B Copy_32_3 195 | 196 | Copy_16_1: 197 | CMP R2, #(02*01*16) ; Copy chunks of 16 16-bit words (32 bytes per loop) 198 | BCC Copy_16_2 199 | LDRH R3, [R1], #2 200 | STRH R3, [R0], #2 201 | LDRH R3, [R1], #2 202 | STRH R3, [R0], #2 203 | LDRH R3, [R1], #2 204 | STRH R3, [R0], #2 205 | LDRH R3, [R1], #2 206 | STRH R3, [R0], #2 207 | LDRH R3, [R1], #2 208 | STRH R3, [R0], #2 209 | LDRH R3, [R1], #2 210 | STRH R3, [R0], #2 211 | LDRH R3, [R1], #2 212 | STRH R3, [R0], #2 213 | LDRH R3, [R1], #2 214 | STRH R3, [R0], #2 215 | LDRH R3, [R1], #2 216 | STRH R3, [R0], #2 217 | LDRH R3, [R1], #2 218 | STRH R3, [R0], #2 219 | LDRH R3, [R1], #2 220 | STRH R3, [R0], #2 221 | LDRH R3, [R1], #2 222 | STRH R3, [R0], #2 223 | LDRH R3, [R1], #2 224 | STRH R3, [R0], #2 225 | LDRH R3, [R1], #2 226 | STRH R3, [R0], #2 227 | LDRH R3, [R1], #2 228 | STRH R3, [R0], #2 229 | LDRH R3, [R1], #2 230 | STRH R3, [R0], #2 231 | SUB R2, R2, #(02*01*16) 232 | B Copy_16_1 233 | 234 | Copy_16_2: 235 | CMP R2, #(02*01*01) ; Copy remaining 16-bit words 236 | BCC Copy_08_1 237 | LDRH R3, [R1], #2 238 | STRH R3, [R0], #2 239 | SUB R2, R2, #(02*01*01) 240 | B Copy_16_2 241 | 242 | Copy_08_1: 243 | CMP R2, #(01*01*16) ; Copy chunks of 16 8-bit words (16 bytes per loop) 244 | BCC Copy_08_2 245 | LDRB R3, [R1], #1 246 | STRB R3, [R0], #1 247 | LDRB R3, [R1], #1 248 | STRB R3, [R0], #1 249 | LDRB R3, [R1], #1 250 | STRB R3, [R0], #1 251 | LDRB R3, [R1], #1 252 | STRB R3, [R0], #1 253 | LDRB R3, [R1], #1 254 | STRB R3, [R0], #1 255 | LDRB R3, [R1], #1 256 | STRB R3, [R0], #1 257 | LDRB R3, [R1], #1 258 | STRB R3, [R0], #1 259 | LDRB R3, [R1], #1 260 | STRB R3, [R0], #1 261 | LDRB R3, [R1], #1 262 | STRB R3, [R0], #1 263 | LDRB R3, [R1], #1 264 | STRB R3, [R0], #1 265 | LDRB R3, [R1], #1 266 | STRB R3, [R0], #1 267 | LDRB R3, [R1], #1 268 | STRB R3, [R0], #1 269 | LDRB R3, [R1], #1 270 | STRB R3, [R0], #1 271 | LDRB R3, [R1], #1 272 | STRB R3, [R0], #1 273 | LDRB R3, [R1], #1 274 | STRB R3, [R0], #1 275 | LDRB R3, [R1], #1 276 | STRB R3, [R0], #1 277 | SUB R2, R2, #(01*01*16) 278 | B Copy_08_1 279 | 280 | Copy_08_2: 281 | CMP R2, #(01*01*01) ; Copy remaining 8-bit words 282 | BCC Mem_Copy_END 283 | LDRB R3, [R1], #1 284 | STRB R3, [R0], #1 285 | SUB R2, R2, #(01*01*01) 286 | B Copy_08_2 287 | 288 | 289 | Mem_Copy_END: 290 | LDMFD SP!, {R3-R12} ; restore registers from stack 291 | BX LR ; return 292 | 293 | 294 | END 295 | -------------------------------------------------------------------------------- /Ports/ARM-Cortex-M3/GNU/lib_mem_a.s: -------------------------------------------------------------------------------- 1 | @******************************************************************************************************** 2 | @ uC/LIB 3 | @ Custom Library Modules 4 | @ 5 | @ Copyright 2004-2021 Silicon Laboratories Inc. www.silabs.com 6 | @ 7 | @ SPDX-License-Identifier: APACHE-2.0 8 | @ 9 | @ This software is subject to an open source license and is distributed by 10 | @ Silicon Laboratories Inc. pursuant to the terms of the Apache License, 11 | @ Version 2.0 available at www.apache.org/licenses/LICENSE-2.0. 12 | @ 13 | @******************************************************************************************************** 14 | 15 | 16 | @******************************************************************************************************** 17 | @ 18 | @ STANDARD MEMORY OPERATIONS 19 | @ 20 | @ ARM-Cortex-M3 21 | @ GNU Compiler 22 | @ 23 | @ Filename : lib_mem_a.s 24 | @ Version : V1.39.01 25 | @******************************************************************************************************** 26 | @ Note(s) : (1) NO compiler-supplied standard library functions are used in library or product software. 27 | @ 28 | @ (a) ALL standard library functions are implemented in the custom library modules : 29 | @ 30 | @ (1) \\lib*.* 31 | @ 32 | @ (2) \\Ports\\\lib*_a.* 33 | @ 34 | @ where 35 | @ directory path for custom library software 36 | @ directory name for specific processor (CPU) 37 | @ directory name for specific compiler 38 | @ 39 | @ (b) Product-specific library functions are implemented in individual products. 40 | @ 41 | @ (2) Assumes ARM CPU mode configured for Little Endian. 42 | @******************************************************************************************************** 43 | 44 | 45 | @******************************************************************************************************** 46 | @ PUBLIC FUNCTIONS 47 | @******************************************************************************************************** 48 | 49 | .global Mem_Copy 50 | 51 | 52 | @******************************************************************************************************** 53 | @ CODE GENERATION DIRECTIVES 54 | @******************************************************************************************************** 55 | 56 | .text 57 | .align 2 58 | .thumb 59 | .syntax unified 60 | 61 | @******************************************************************************************************** 62 | @ Mem_Copy() 63 | @ 64 | @ Description : Copy data octets from one buffer to another buffer. 65 | @ 66 | @ Argument(s) : pdest Pointer to destination memory buffer. 67 | @ 68 | @ psrc Pointer to source memory buffer. 69 | @ 70 | @ size Number of data buffer octets to copy. 71 | @ 72 | @ Return(s) : none. 73 | @ 74 | @ Caller(s) : Application. 75 | @ 76 | @ Note(s) : (1) Null copies allowed (i.e. 0-octet size). 77 | @ 78 | @ (2) Memory buffers NOT checked for overlapping. 79 | @ 80 | @ (3) Modulo arithmetic is used to determine whether a memory buffer starts on a 'CPU_ALIGN' 81 | @ address boundary. 82 | @ 83 | @ (4) ARM Cortex-M3 processors use a subset of the ARM Thumb-2 instruction set which does 84 | @ NOT support 16-bit conditional branch instructions but ONLY supports 8-bit conditional 85 | @ branch instructions. 86 | @ 87 | @ Therefore, branches exceeding 8-bit, signed, relative offsets : 88 | @ 89 | @ (a) CANNOT be implemented with conditional branches@ but ... 90 | @ (b) MUST be implemented with non-conditional branches. 91 | @******************************************************************************************************** 92 | 93 | @ void Mem_Copy (void *pdest, @ ==> R0 94 | @ void *psrc, @ ==> R1 95 | @ CPU_SIZE_T size) @ ==> R2 96 | 97 | .thumb_func 98 | Mem_Copy: 99 | CMP R0, #0 100 | BNE Mem_Copy_1 101 | BX LR @ return if pdest == NULL 102 | 103 | Mem_Copy_1: 104 | CMP R1, #0 105 | BNE Mem_Copy_2 106 | BX LR @ return if psrc == NULL 107 | 108 | Mem_Copy_2: 109 | CMP R2, #0 110 | BNE Mem_Copy_3 111 | BX LR @ return if size == 0 112 | 113 | Mem_Copy_3: 114 | STMFD SP!, {R3-R12} @ save registers on stack 115 | 116 | 117 | Chk_Align_32: @ check if both dest & src 32-bit aligned 118 | AND R3, R0, #0x03 119 | AND R4, R1, #0x03 120 | CMP R3, R4 121 | BNE Chk_Align_16 @ not 32-bit aligned, check for 16-bit alignment 122 | 123 | RSB R3, R3, #0x04 @ compute 1-2-3 pre-copy bytes (to align to the next 32-bit boundary) 124 | AND R3, R3, #0x03 125 | 126 | Pre_Copy_1: 127 | CMP R3, #1 @ copy 1-2-3 bytes (to align to the next 32-bit boundary) 128 | BCC Copy_32_1 @ start real 32-bit copy 129 | CMP R2, #1 @ check if any more data to copy 130 | BCS Pre_Copy_1_Cont 131 | B Mem_Copy_END @ no more data to copy (see Note #4b) 132 | 133 | Pre_Copy_1_Cont: 134 | LDRB R4, [R1], #1 135 | STRB R4, [R0], #1 136 | SUB R3, R3, #1 137 | SUB R2, R2, #1 138 | B Pre_Copy_1 139 | 140 | 141 | Chk_Align_16: @ check if both dest & src 16-bit aligned 142 | AND R3, R0, #0x01 143 | AND R4, R1, #0x01 144 | CMP R3, R4 145 | BEQ Pre_Copy_2 146 | B Copy_08_1 @ not 16-bit aligned, start 8-bit copy (see Note #4b) 147 | 148 | Pre_Copy_2: 149 | CMP R3, #1 @ copy 1 byte (to align to the next 16-bit boundary) 150 | BCC Copy_16_1 @ start real 16-bit copy 151 | 152 | LDRB R4, [R1], #1 153 | STRB R4, [R0], #1 154 | SUB R3, R3, #1 155 | SUB R2, R2, #1 156 | B Pre_Copy_2 157 | 158 | 159 | Copy_32_1: 160 | CMP R2, #360 @ Copy 9 chunks of 10 32-bit words (360 octets per loop) 161 | BCC Copy_32_2 162 | LDMIA R1!, {R3-R12} 163 | STMIA R0!, {R3-R12} 164 | LDMIA R1!, {R3-R12} 165 | STMIA R0!, {R3-R12} 166 | LDMIA R1!, {R3-R12} 167 | STMIA R0!, {R3-R12} 168 | LDMIA R1!, {R3-R12} 169 | STMIA R0!, {R3-R12} 170 | LDMIA R1!, {R3-R12} 171 | STMIA R0!, {R3-R12} 172 | LDMIA R1!, {R3-R12} 173 | STMIA R0!, {R3-R12} 174 | LDMIA R1!, {R3-R12} 175 | STMIA R0!, {R3-R12} 176 | LDMIA R1!, {R3-R12} 177 | STMIA R0!, {R3-R12} 178 | LDMIA R1!, {R3-R12} 179 | STMIA R0!, {R3-R12} 180 | SUB R2, R2, #360 181 | B Copy_32_1 182 | 183 | Copy_32_2: 184 | CMP R2, #(04*10*01) @ Copy chunks of 10 32-bit words (40 octets per loop) 185 | BCC Copy_32_3 186 | LDMIA R1!, {R3-R12} 187 | STMIA R0!, {R3-R12} 188 | SUB R2, R2, #(04*10*01) 189 | B Copy_32_2 190 | 191 | Copy_32_3: 192 | CMP R2, #(04*01*01) @ Copy remaining 32-bit words 193 | BCC Copy_16_1 194 | LDR R3, [R1], #4 195 | STR R3, [R0], #4 196 | SUB R2, R2, #(04*01*01) 197 | B Copy_32_3 198 | 199 | Copy_16_1: 200 | CMP R2, #(02*01*16) @ Copy chunks of 16 16-bit words (32 bytes per loop) 201 | BCC Copy_16_2 202 | LDRH R3, [R1], #2 203 | STRH R3, [R0], #2 204 | LDRH R3, [R1], #2 205 | STRH R3, [R0], #2 206 | LDRH R3, [R1], #2 207 | STRH R3, [R0], #2 208 | LDRH R3, [R1], #2 209 | STRH R3, [R0], #2 210 | LDRH R3, [R1], #2 211 | STRH R3, [R0], #2 212 | LDRH R3, [R1], #2 213 | STRH R3, [R0], #2 214 | LDRH R3, [R1], #2 215 | STRH R3, [R0], #2 216 | LDRH R3, [R1], #2 217 | STRH R3, [R0], #2 218 | LDRH R3, [R1], #2 219 | STRH R3, [R0], #2 220 | LDRH R3, [R1], #2 221 | STRH R3, [R0], #2 222 | LDRH R3, [R1], #2 223 | STRH R3, [R0], #2 224 | LDRH R3, [R1], #2 225 | STRH R3, [R0], #2 226 | LDRH R3, [R1], #2 227 | STRH R3, [R0], #2 228 | LDRH R3, [R1], #2 229 | STRH R3, [R0], #2 230 | LDRH R3, [R1], #2 231 | STRH R3, [R0], #2 232 | LDRH R3, [R1], #2 233 | STRH R3, [R0], #2 234 | SUB R2, R2, #(02*01*16) 235 | B Copy_16_1 236 | 237 | Copy_16_2: 238 | CMP R2, #(02*01*01) @ Copy remaining 16-bit words 239 | BCC Copy_08_1 240 | LDRH R3, [R1], #2 241 | STRH R3, [R0], #2 242 | SUB R2, R2, #(02*01*01) 243 | B Copy_16_2 244 | 245 | Copy_08_1: 246 | CMP R2, #(01*01*16) @ Copy chunks of 16 8-bit words (16 bytes per loop) 247 | BCC Copy_08_2 248 | LDRB R3, [R1], #1 249 | STRB R3, [R0], #1 250 | LDRB R3, [R1], #1 251 | STRB R3, [R0], #1 252 | LDRB R3, [R1], #1 253 | STRB R3, [R0], #1 254 | LDRB R3, [R1], #1 255 | STRB R3, [R0], #1 256 | LDRB R3, [R1], #1 257 | STRB R3, [R0], #1 258 | LDRB R3, [R1], #1 259 | STRB R3, [R0], #1 260 | LDRB R3, [R1], #1 261 | STRB R3, [R0], #1 262 | LDRB R3, [R1], #1 263 | STRB R3, [R0], #1 264 | LDRB R3, [R1], #1 265 | STRB R3, [R0], #1 266 | LDRB R3, [R1], #1 267 | STRB R3, [R0], #1 268 | LDRB R3, [R1], #1 269 | STRB R3, [R0], #1 270 | LDRB R3, [R1], #1 271 | STRB R3, [R0], #1 272 | LDRB R3, [R1], #1 273 | STRB R3, [R0], #1 274 | LDRB R3, [R1], #1 275 | STRB R3, [R0], #1 276 | LDRB R3, [R1], #1 277 | STRB R3, [R0], #1 278 | LDRB R3, [R1], #1 279 | STRB R3, [R0], #1 280 | SUB R2, R2, #(01*01*16) 281 | B Copy_08_1 282 | 283 | Copy_08_2: 284 | CMP R2, #(01*01*01) @ Copy remaining 8-bit words 285 | BCC Mem_Copy_END 286 | LDRB R3, [R1], #1 287 | STRB R3, [R0], #1 288 | SUB R2, R2, #(01*01*01) 289 | B Copy_08_2 290 | 291 | 292 | Mem_Copy_END: 293 | LDMFD SP!, {R3-R12} @ restore registers from stack 294 | BX LR @ return 295 | 296 | 297 | .end 298 | -------------------------------------------------------------------------------- /Ports/ARM-Cortex-M4/GNU/lib_mem_a.s: -------------------------------------------------------------------------------- 1 | @******************************************************************************************************** 2 | @ uC/LIB 3 | @ Custom Library Modules 4 | @ 5 | @ Copyright 2004-2021 Silicon Laboratories Inc. www.silabs.com 6 | @ 7 | @ SPDX-License-Identifier: APACHE-2.0 8 | @ 9 | @ This software is subject to an open source license and is distributed by 10 | @ Silicon Laboratories Inc. pursuant to the terms of the Apache License, 11 | @ Version 2.0 available at www.apache.org/licenses/LICENSE-2.0. 12 | @ 13 | @******************************************************************************************************** 14 | 15 | 16 | @******************************************************************************************************** 17 | @ 18 | @ STANDARD MEMORY OPERATIONS 19 | @ 20 | @ ARM-Cortex-M4 21 | @ GNU Compiler 22 | @ 23 | @ Filename : lib_mem_a.s 24 | @ Version : V1.39.01 25 | @******************************************************************************************************** 26 | @ Note(s) : (1) NO compiler-supplied standard library functions are used in library or product software. 27 | @ 28 | @ (a) ALL standard library functions are implemented in the custom library modules : 29 | @ 30 | @ (1) \\lib*.* 31 | @ 32 | @ (2) \\Ports\\\lib*_a.* 33 | @ 34 | @ where 35 | @ directory path for custom library software 36 | @ directory name for specific processor (CPU) 37 | @ directory name for specific compiler 38 | @ 39 | @ (b) Product-specific library functions are implemented in individual products. 40 | @ 41 | @ (2) Assumes ARM CPU mode configured for Little Endian. 42 | @******************************************************************************************************** 43 | 44 | 45 | @******************************************************************************************************** 46 | @ PUBLIC FUNCTIONS 47 | @******************************************************************************************************** 48 | 49 | .global Mem_Copy 50 | 51 | 52 | @******************************************************************************************************** 53 | @ CODE GENERATION DIRECTIVES 54 | @******************************************************************************************************** 55 | 56 | .text 57 | .align 2 58 | .thumb 59 | .syntax unified 60 | 61 | @******************************************************************************************************** 62 | @ Mem_Copy() 63 | @ 64 | @ Description : Copy data octets from one buffer to another buffer. 65 | @ 66 | @ Argument(s) : pdest Pointer to destination memory buffer. 67 | @ 68 | @ psrc Pointer to source memory buffer. 69 | @ 70 | @ size Number of data buffer octets to copy. 71 | @ 72 | @ Return(s) : none. 73 | @ 74 | @ Caller(s) : Application. 75 | @ 76 | @ Note(s) : (1) Null copies allowed (i.e. 0-octet size). 77 | @ 78 | @ (2) Memory buffers NOT checked for overlapping. 79 | @ 80 | @ (3) Modulo arithmetic is used to determine whether a memory buffer starts on a 'CPU_ALIGN' 81 | @ address boundary. 82 | @ 83 | @ (4) ARM Cortex-M3 processors use a subset of the ARM Thumb-2 instruction set which does 84 | @ NOT support 16-bit conditional branch instructions but ONLY supports 8-bit conditional 85 | @ branch instructions. 86 | @ 87 | @ Therefore, branches exceeding 8-bit, signed, relative offsets : 88 | @ 89 | @ (a) CANNOT be implemented with conditional branches@ but ... 90 | @ (b) MUST be implemented with non-conditional branches. 91 | @******************************************************************************************************** 92 | 93 | @ void Mem_Copy (void *pdest, @ ==> R0 94 | @ void *psrc, @ ==> R1 95 | @ CPU_SIZE_T size) @ ==> R2 96 | 97 | .thumb_func 98 | Mem_Copy: 99 | CMP R0, #0 100 | BNE Mem_Copy_1 101 | BX LR @ return if pdest == NULL 102 | 103 | Mem_Copy_1: 104 | CMP R1, #0 105 | BNE Mem_Copy_2 106 | BX LR @ return if psrc == NULL 107 | 108 | Mem_Copy_2: 109 | CMP R2, #0 110 | BNE Mem_Copy_3 111 | BX LR @ return if size == 0 112 | 113 | Mem_Copy_3: 114 | STMFD SP!, {R3-R12} @ save registers on stack 115 | 116 | 117 | Chk_Align_32: @ check if both dest & src 32-bit aligned 118 | AND R3, R0, #0x03 119 | AND R4, R1, #0x03 120 | CMP R3, R4 121 | BNE Chk_Align_16 @ not 32-bit aligned, check for 16-bit alignment 122 | 123 | RSB R3, R3, #0x04 @ compute 1-2-3 pre-copy bytes (to align to the next 32-bit boundary) 124 | AND R3, R3, #0x03 125 | 126 | Pre_Copy_1: 127 | CMP R3, #1 @ copy 1-2-3 bytes (to align to the next 32-bit boundary) 128 | BCC Copy_32_1 @ start real 32-bit copy 129 | CMP R2, #1 @ check if any more data to copy 130 | BCS Pre_Copy_1_Cont 131 | B Mem_Copy_END @ no more data to copy (see Note #4b) 132 | 133 | Pre_Copy_1_Cont: 134 | LDRB R4, [R1], #1 135 | STRB R4, [R0], #1 136 | SUB R3, R3, #1 137 | SUB R2, R2, #1 138 | B Pre_Copy_1 139 | 140 | 141 | Chk_Align_16: @ check if both dest & src 16-bit aligned 142 | AND R3, R0, #0x01 143 | AND R4, R1, #0x01 144 | CMP R3, R4 145 | BEQ Pre_Copy_2 146 | B Copy_08_1 @ not 16-bit aligned, start 8-bit copy (see Note #4b) 147 | 148 | Pre_Copy_2: 149 | CMP R3, #1 @ copy 1 byte (to align to the next 16-bit boundary) 150 | BCC Copy_16_1 @ start real 16-bit copy 151 | 152 | LDRB R4, [R1], #1 153 | STRB R4, [R0], #1 154 | SUB R3, R3, #1 155 | SUB R2, R2, #1 156 | B Pre_Copy_2 157 | 158 | 159 | Copy_32_1: 160 | CMP R2, #360 @ Copy 9 chunks of 10 32-bit words (360 octets per loop) 161 | BCC Copy_32_2 162 | LDMIA R1!, {R3-R12} 163 | STMIA R0!, {R3-R12} 164 | LDMIA R1!, {R3-R12} 165 | STMIA R0!, {R3-R12} 166 | LDMIA R1!, {R3-R12} 167 | STMIA R0!, {R3-R12} 168 | LDMIA R1!, {R3-R12} 169 | STMIA R0!, {R3-R12} 170 | LDMIA R1!, {R3-R12} 171 | STMIA R0!, {R3-R12} 172 | LDMIA R1!, {R3-R12} 173 | STMIA R0!, {R3-R12} 174 | LDMIA R1!, {R3-R12} 175 | STMIA R0!, {R3-R12} 176 | LDMIA R1!, {R3-R12} 177 | STMIA R0!, {R3-R12} 178 | LDMIA R1!, {R3-R12} 179 | STMIA R0!, {R3-R12} 180 | SUB R2, R2, #360 181 | B Copy_32_1 182 | 183 | Copy_32_2: 184 | CMP R2, #(04*10*01) @ Copy chunks of 10 32-bit words (40 octets per loop) 185 | BCC Copy_32_3 186 | LDMIA R1!, {R3-R12} 187 | STMIA R0!, {R3-R12} 188 | SUB R2, R2, #(04*10*01) 189 | B Copy_32_2 190 | 191 | Copy_32_3: 192 | CMP R2, #(04*01*01) @ Copy remaining 32-bit words 193 | BCC Copy_16_1 194 | LDR R3, [R1], #4 195 | STR R3, [R0], #4 196 | SUB R2, R2, #(04*01*01) 197 | B Copy_32_3 198 | 199 | Copy_16_1: 200 | CMP R2, #(02*01*16) @ Copy chunks of 16 16-bit words (32 bytes per loop) 201 | BCC Copy_16_2 202 | LDRH R3, [R1], #2 203 | STRH R3, [R0], #2 204 | LDRH R3, [R1], #2 205 | STRH R3, [R0], #2 206 | LDRH R3, [R1], #2 207 | STRH R3, [R0], #2 208 | LDRH R3, [R1], #2 209 | STRH R3, [R0], #2 210 | LDRH R3, [R1], #2 211 | STRH R3, [R0], #2 212 | LDRH R3, [R1], #2 213 | STRH R3, [R0], #2 214 | LDRH R3, [R1], #2 215 | STRH R3, [R0], #2 216 | LDRH R3, [R1], #2 217 | STRH R3, [R0], #2 218 | LDRH R3, [R1], #2 219 | STRH R3, [R0], #2 220 | LDRH R3, [R1], #2 221 | STRH R3, [R0], #2 222 | LDRH R3, [R1], #2 223 | STRH R3, [R0], #2 224 | LDRH R3, [R1], #2 225 | STRH R3, [R0], #2 226 | LDRH R3, [R1], #2 227 | STRH R3, [R0], #2 228 | LDRH R3, [R1], #2 229 | STRH R3, [R0], #2 230 | LDRH R3, [R1], #2 231 | STRH R3, [R0], #2 232 | LDRH R3, [R1], #2 233 | STRH R3, [R0], #2 234 | SUB R2, R2, #(02*01*16) 235 | B Copy_16_1 236 | 237 | Copy_16_2: 238 | CMP R2, #(02*01*01) @ Copy remaining 16-bit words 239 | BCC Copy_08_1 240 | LDRH R3, [R1], #2 241 | STRH R3, [R0], #2 242 | SUB R2, R2, #(02*01*01) 243 | B Copy_16_2 244 | 245 | Copy_08_1: 246 | CMP R2, #(01*01*16) @ Copy chunks of 16 8-bit words (16 bytes per loop) 247 | BCC Copy_08_2 248 | LDRB R3, [R1], #1 249 | STRB R3, [R0], #1 250 | LDRB R3, [R1], #1 251 | STRB R3, [R0], #1 252 | LDRB R3, [R1], #1 253 | STRB R3, [R0], #1 254 | LDRB R3, [R1], #1 255 | STRB R3, [R0], #1 256 | LDRB R3, [R1], #1 257 | STRB R3, [R0], #1 258 | LDRB R3, [R1], #1 259 | STRB R3, [R0], #1 260 | LDRB R3, [R1], #1 261 | STRB R3, [R0], #1 262 | LDRB R3, [R1], #1 263 | STRB R3, [R0], #1 264 | LDRB R3, [R1], #1 265 | STRB R3, [R0], #1 266 | LDRB R3, [R1], #1 267 | STRB R3, [R0], #1 268 | LDRB R3, [R1], #1 269 | STRB R3, [R0], #1 270 | LDRB R3, [R1], #1 271 | STRB R3, [R0], #1 272 | LDRB R3, [R1], #1 273 | STRB R3, [R0], #1 274 | LDRB R3, [R1], #1 275 | STRB R3, [R0], #1 276 | LDRB R3, [R1], #1 277 | STRB R3, [R0], #1 278 | LDRB R3, [R1], #1 279 | STRB R3, [R0], #1 280 | SUB R2, R2, #(01*01*16) 281 | B Copy_08_1 282 | 283 | Copy_08_2: 284 | CMP R2, #(01*01*01) @ Copy remaining 8-bit words 285 | BCC Mem_Copy_END 286 | LDRB R3, [R1], #1 287 | STRB R3, [R0], #1 288 | SUB R2, R2, #(01*01*01) 289 | B Copy_08_2 290 | 291 | 292 | Mem_Copy_END: 293 | LDMFD SP!, {R3-R12} @ restore registers from stack 294 | BX LR @ return 295 | 296 | 297 | .end 298 | -------------------------------------------------------------------------------- /lib_math.c: -------------------------------------------------------------------------------- 1 | /* 2 | ********************************************************************************************************* 3 | * uC/LIB 4 | * Custom Library Modules 5 | * 6 | * Copyright 2004-2021 Silicon Laboratories Inc. www.silabs.com 7 | * 8 | * SPDX-License-Identifier: APACHE-2.0 9 | * 10 | * This software is subject to an open source license and is distributed by 11 | * Silicon Laboratories Inc. pursuant to the terms of the Apache License, 12 | * Version 2.0 available at www.apache.org/licenses/LICENSE-2.0. 13 | * 14 | ********************************************************************************************************* 15 | */ 16 | 17 | /* 18 | ********************************************************************************************************* 19 | * 20 | * MATHEMATIC OPERATIONS 21 | * 22 | * Filename : lib_math.c 23 | * Version : V1.39.01 24 | ********************************************************************************************************* 25 | * Note(s) : (1) NO compiler-supplied standard library functions are used in library or product software. 26 | * 27 | * (a) ALL standard library functions are implemented in the custom library modules : 28 | * 29 | * (1) \\lib_*.* 30 | * 31 | * (2) \\Ports\\\lib*_a.* 32 | * 33 | * where 34 | * directory path for custom library software 35 | * directory name for specific processor (CPU) 36 | * directory name for specific compiler 37 | * 38 | * (b) Product-specific library functions are implemented in individual products. 39 | * 40 | ********************************************************************************************************* 41 | * Notice(s) : (1) The Institute of Electrical and Electronics Engineers and The Open Group, have given 42 | * us permission to reprint portions of their documentation. Portions of this text are 43 | * reprinted and reproduced in electronic form from the IEEE Std 1003.1, 2004 Edition, 44 | * Standard for Information Technology -- Portable Operating System Interface (POSIX), 45 | * The Open Group Base Specifications Issue 6, Copyright (C) 2001-2004 by the Institute 46 | * of Electrical and Electronics Engineers, Inc and The Open Group. In the event of any 47 | * discrepancy between these versions and the original IEEE and The Open Group Standard, 48 | * the original IEEE and The Open Group Standard is the referee document. The original 49 | * Standard can be obtained online at http://www.opengroup.org/unix/online.html. 50 | ********************************************************************************************************* 51 | */ 52 | 53 | /* 54 | ********************************************************************************************************* 55 | * INCLUDE FILES 56 | ********************************************************************************************************* 57 | */ 58 | 59 | #define MICRIUM_SOURCE 60 | #define LIB_MATH_MODULE 61 | #include 62 | 63 | 64 | /* 65 | ********************************************************************************************************* 66 | * LOCAL DEFINES 67 | ********************************************************************************************************* 68 | */ 69 | 70 | 71 | /* 72 | ********************************************************************************************************* 73 | * LOCAL CONSTANTS 74 | ********************************************************************************************************* 75 | */ 76 | 77 | 78 | /* 79 | ********************************************************************************************************* 80 | * LOCAL DATA TYPES 81 | ********************************************************************************************************* 82 | */ 83 | 84 | 85 | /* 86 | ********************************************************************************************************* 87 | * LOCAL TABLES 88 | ********************************************************************************************************* 89 | */ 90 | 91 | 92 | /* 93 | ********************************************************************************************************* 94 | * LOCAL GLOBAL VARIABLES 95 | ********************************************************************************************************* 96 | */ 97 | 98 | RAND_NBR Math_RandSeedCur; /* Cur rand nbr seed. */ 99 | 100 | 101 | /* 102 | ********************************************************************************************************* 103 | * LOCAL FUNCTION PROTOTYPES 104 | ********************************************************************************************************* 105 | */ 106 | 107 | 108 | /* 109 | ********************************************************************************************************* 110 | * LOCAL CONFIGURATION ERRORS 111 | ********************************************************************************************************* 112 | */ 113 | 114 | 115 | /* 116 | ********************************************************************************************************* 117 | * Math_Init() 118 | * 119 | * Description : (1) Initialize Mathematic Module : 120 | * 121 | * (a) Initialize random number seed value 122 | * 123 | * 124 | * Argument(s) : none. 125 | * 126 | * Return(s) : none. 127 | * 128 | * Caller(s) : Application. 129 | * 130 | * Note(s) : (2) IEEE Std 1003.1, 2004 Edition, Section 'rand() : DESCRIPTION' states that "if rand() 131 | * is called before any calls to srand() are made, the same sequence shall be generated 132 | * as when srand() is first called with a seed value of 1". 133 | ********************************************************************************************************* 134 | */ 135 | 136 | void Math_Init (void) 137 | { 138 | Math_RandSetSeed((RAND_NBR)RAND_SEED_INIT_VAL); /* See Note #2. */ 139 | } 140 | 141 | 142 | /* 143 | ********************************************************************************************************* 144 | * Math_RandSetSeed() 145 | * 146 | * Description : Set the current pseudo-random number generator seed. 147 | * 148 | * Argument(s) : seed Initial (or current) value to set for the pseudo-random number sequence. 149 | * 150 | * Return(s) : none. 151 | * 152 | * Caller(s) : Application. 153 | * 154 | * Note(s) : (1) IEEE Std 1003.1, 2004 Edition, Section 'rand() : DESCRIPTION' states that "srand() 155 | * ... uses the argument as a seed for a new sequence of pseudo-random numbers to be 156 | * returned by subsequent calls to rand()". 157 | * 158 | * (2) 'Math_RandSeedCur' MUST always be accessed exclusively in critical sections. 159 | * 160 | * See also 'Math_Rand() Note #1b'. 161 | ********************************************************************************************************* 162 | */ 163 | 164 | void Math_RandSetSeed (RAND_NBR seed) 165 | { 166 | CPU_SR_ALLOC(); 167 | 168 | 169 | CPU_CRITICAL_ENTER(); 170 | Math_RandSeedCur = seed; 171 | CPU_CRITICAL_EXIT(); 172 | } 173 | 174 | 175 | /* 176 | ********************************************************************************************************* 177 | * Math_Rand() 178 | * 179 | * Description : Calculate the next pseudo-random number. 180 | * 181 | * Argument(s) : none. 182 | * 183 | * Return(s) : Next pseudo-random number in the sequence after 'Math_RandSeedCur'. 184 | * 185 | * Caller(s) : Application. 186 | * 187 | * Note(s) : (1) (a) The pseudo-random number generator is implemented as a Linear Congruential 188 | * Generator (LCG). 189 | * 190 | * (b) The pseudo-random number generated is in the range [0, RAND_LCG_PARAM_M]. 191 | * 192 | * See also 'Math_RandSeed() Note #1'. 193 | * 194 | * (2) (a) IEEE Std 1003.1, 2004 Edition, Section 'rand() : DESCRIPTION' states that "rand() 195 | * ... need not be reentrant ... [and] is not required to be thread-safe". 196 | * 197 | * (b) However, in order to implement Math_Rand() as re-entrant; 'Math_RandSeedCur' MUST 198 | * always be accessed & updated exclusively in critical sections. 199 | * 200 | * See also 'Math_RandSeed() Note #2'. 201 | ********************************************************************************************************* 202 | */ 203 | 204 | RAND_NBR Math_Rand (void) 205 | { 206 | RAND_NBR seed; 207 | RAND_NBR rand_nbr; 208 | CPU_SR_ALLOC(); 209 | 210 | 211 | CPU_CRITICAL_ENTER(); 212 | seed = Math_RandSeedCur; 213 | rand_nbr = Math_RandSeed(seed); 214 | Math_RandSeedCur = rand_nbr; 215 | CPU_CRITICAL_EXIT(); 216 | 217 | return (rand_nbr); 218 | } 219 | 220 | 221 | /* 222 | ********************************************************************************************************* 223 | * Math_RandSeed() 224 | * 225 | * Description : Calculate the next pseudo-random number. 226 | * 227 | * Argument(s) : seed Initial (or current) value for the pseudo-random number sequence. 228 | * 229 | * Return(s) : Next pseudo-random number in the sequence after 'seed'. 230 | * 231 | * Caller(s) : Math_Rand(), 232 | * Application. 233 | * 234 | * Note(s) : (1) (a) BSD/ANSI-C implements rand() as a Linear Congruential Generator (LCG) : 235 | * 236 | * (A) random_number = [(a * random_number ) + b] modulo m 237 | * n + 1 n 238 | * 239 | * where 240 | * (1) (a) random_number Next random number to generate 241 | * n+1 242 | * (b) random_number Previous random number generated 243 | * n 244 | * 245 | * (2) a = RAND_LCG_PARAM_A LCG multiplier 246 | * (3) b = RAND_LCG_PARAM_B LCG incrementor 247 | * (4) m = RAND_LCG_PARAM_M + 1 LCG modulus 248 | * 249 | * (b) The pseudo-random number generated is in the range [0, RAND_LCG_PARAM_M]. 250 | * 251 | See also 'lib_math.h RANDOM NUMBER DEFINES Note #1b'. 252 | * 253 | * (2) (a) IEEE Std 1003.1, 2004 Edition, Section 'rand() : DESCRIPTION' states that "rand() 254 | * ... need not be reentrant ... [and] is not required to be thread-safe". 255 | * 256 | * (b) However, Math_RandSeed() is re-entrant since it calculates the next random number 257 | * using ONLY local variables. 258 | ********************************************************************************************************* 259 | */ 260 | 261 | RAND_NBR Math_RandSeed (RAND_NBR seed) 262 | { 263 | RAND_NBR rand_nbr; 264 | 265 | 266 | rand_nbr = (((RAND_NBR)RAND_LCG_PARAM_A * seed) + (RAND_NBR)RAND_LCG_PARAM_B) % ((RAND_NBR)RAND_LCG_PARAM_M + 1u); 267 | 268 | return (rand_nbr); 269 | } 270 | -------------------------------------------------------------------------------- /Ports/ARM-Cortex-M3/RealView/lib_mem_a.asm: -------------------------------------------------------------------------------- 1 | ;******************************************************************************************************** 2 | ; uC/LIB 3 | ; Custom Library Modules 4 | ; 5 | ; Copyright 2004-2021 Silicon Laboratories Inc. www.silabs.com 6 | ; 7 | ; SPDX-License-Identifier: APACHE-2.0 8 | ; 9 | ; This software is subject to an open source license and is distributed by 10 | ; Silicon Laboratories Inc. pursuant to the terms of the Apache License, 11 | ; Version 2.0 available at www.apache.org/licenses/LICENSE-2.0. 12 | ; 13 | ;******************************************************************************************************** 14 | 15 | 16 | ;******************************************************************************************************** 17 | ; 18 | ; STANDARD MEMORY OPERATIONS 19 | ; 20 | ; ARM-Cortex-M3 21 | ; RealView Development Suite 22 | ; RealView Microcontroller Development Kit (MDK) 23 | ; ARM Developer Suite (ADS) 24 | ; Keil uVision 25 | ; 26 | ; Filename : lib_mem_a.asm 27 | ; Version : V1.39.01 28 | ;******************************************************************************************************** 29 | ; Note(s) : (1) NO compiler-supplied standard library functions are used in library or product software. 30 | ; 31 | ; (a) ALL standard library functions are implemented in the custom library modules : 32 | ; 33 | ; (1) \\lib*.* 34 | ; 35 | ; (2) \\Ports\\\lib*_a.* 36 | ; 37 | ; where 38 | ; directory path for custom library software 39 | ; directory name for specific processor (CPU) 40 | ; directory name for specific compiler 41 | ; 42 | ; (b) Product-specific library functions are implemented in individual products. 43 | ; 44 | ; (2) Assumes ARM CPU mode configured for Little Endian. 45 | ;******************************************************************************************************** 46 | 47 | 48 | ;******************************************************************************************************** 49 | ; PUBLIC FUNCTIONS 50 | ;******************************************************************************************************** 51 | 52 | EXPORT Mem_Copy 53 | 54 | 55 | ;******************************************************************************************************** 56 | ; CODE GENERATION DIRECTIVES 57 | ;******************************************************************************************************** 58 | 59 | AREA |.text|, CODE, READONLY, ALIGN=2 60 | THUMB 61 | REQUIRE8 62 | PRESERVE8 63 | 64 | 65 | ;******************************************************************************************************** 66 | ; Mem_Copy() 67 | ; 68 | ; Description : Copy data octets from one buffer to another buffer. 69 | ; 70 | ; Argument(s) : pdest Pointer to destination memory buffer. 71 | ; 72 | ; psrc Pointer to source memory buffer. 73 | ; 74 | ; size Number of data buffer octets to copy. 75 | ; 76 | ; Return(s) : none. 77 | ; 78 | ; Caller(s) : Application. 79 | ; 80 | ; Note(s) : (1) Null copies allowed (i.e. 0-octet size). 81 | ; 82 | ; (2) Memory buffers NOT checked for overlapping. 83 | ; 84 | ; (3) Modulo arithmetic is used to determine whether a memory buffer starts on a 'CPU_ALIGN' 85 | ; address boundary. 86 | ; 87 | ; (4) ARM Cortex-M3 processors use a subset of the ARM Thumb-2 instruction set which does 88 | ; NOT support 16-bit conditional branch instructions but ONLY supports 8-bit conditional 89 | ; branch instructions. 90 | ; 91 | ; Therefore, branches exceeding 8-bit, signed, relative offsets : 92 | ; 93 | ; (a) CANNOT be implemented with conditional branches; but ... 94 | ; (b) MUST be implemented with non-conditional branches. 95 | ;******************************************************************************************************** 96 | 97 | ; void Mem_Copy (void *pdest, ; ==> R0 98 | ; void *psrc, ; ==> R1 99 | ; CPU_SIZE_T size) ; ==> R2 100 | 101 | Mem_Copy 102 | CMP R0, #0 103 | BNE Mem_Copy_1 104 | BX LR ; return if pdest == NULL 105 | 106 | Mem_Copy_1 107 | CMP R1, #0 108 | BNE Mem_Copy_2 109 | BX LR ; return if psrc == NULL 110 | 111 | Mem_Copy_2 112 | CMP R2, #0 113 | BNE Mem_Copy_3 114 | BX LR ; return if size == 0 115 | 116 | Mem_Copy_3 117 | STMFD SP!, {R3-R12} ; save registers on stack 118 | 119 | 120 | Chk_Align_32 ; check if both dest & src 32-bit aligned 121 | AND R3, R0, #0x03 122 | AND R4, R1, #0x03 123 | CMP R3, R4 124 | BNE Chk_Align_16 ; not 32-bit aligned, check for 16-bit alignment 125 | 126 | RSB R3, R3, #0x04 ; compute 1-2-3 pre-copy bytes (to align to the next 32-bit boundary) 127 | AND R3, R3, #0x03 128 | 129 | Pre_Copy_1 130 | CMP R3, #1 ; copy 1-2-3 bytes (to align to the next 32-bit boundary) 131 | BCC Copy_32_1 ; start real 32-bit copy 132 | CMP R2, #1 ; check if any more data to copy 133 | BCS Pre_Copy_1_Cont 134 | B Mem_Copy_END ; no more data to copy (see Note #4b) 135 | 136 | Pre_Copy_1_Cont 137 | LDRB R4, [R1], #1 138 | STRB R4, [R0], #1 139 | SUB R3, R3, #1 140 | SUB R2, R2, #1 141 | B Pre_Copy_1 142 | 143 | 144 | Chk_Align_16 ; check if both dest & src 16-bit aligned 145 | AND R3, R0, #0x01 146 | AND R4, R1, #0x01 147 | CMP R3, R4 148 | BEQ Pre_Copy_2 149 | B Copy_08_1 ; not 16-bit aligned, start 8-bit copy (see Note #4b) 150 | 151 | Pre_Copy_2 152 | CMP R3, #1 ; copy 1 byte (to align to the next 16-bit boundary) 153 | BCC Copy_16_1 ; start real 16-bit copy 154 | 155 | LDRB R4, [R1], #1 156 | STRB R4, [R0], #1 157 | SUB R3, R3, #1 158 | SUB R2, R2, #1 159 | B Pre_Copy_2 160 | 161 | 162 | Copy_32_1 163 | CMP R2, #(04*10*09) ; Copy 9 chunks of 10 32-bit words (360 octets per loop) 164 | BCC Copy_32_2 165 | LDMIA R1!, {R3-R12} 166 | STMIA R0!, {R3-R12} 167 | LDMIA R1!, {R3-R12} 168 | STMIA R0!, {R3-R12} 169 | LDMIA R1!, {R3-R12} 170 | STMIA R0!, {R3-R12} 171 | LDMIA R1!, {R3-R12} 172 | STMIA R0!, {R3-R12} 173 | LDMIA R1!, {R3-R12} 174 | STMIA R0!, {R3-R12} 175 | LDMIA R1!, {R3-R12} 176 | STMIA R0!, {R3-R12} 177 | LDMIA R1!, {R3-R12} 178 | STMIA R0!, {R3-R12} 179 | LDMIA R1!, {R3-R12} 180 | STMIA R0!, {R3-R12} 181 | LDMIA R1!, {R3-R12} 182 | STMIA R0!, {R3-R12} 183 | SUB R2, R2, #(04*10*09) 184 | B Copy_32_1 185 | 186 | Copy_32_2 187 | CMP R2, #(04*10*01) ; Copy chunks of 10 32-bit words (40 octets per loop) 188 | BCC Copy_32_3 189 | LDMIA R1!, {R3-R12} 190 | STMIA R0!, {R3-R12} 191 | SUB R2, R2, #(04*10*01) 192 | B Copy_32_2 193 | 194 | Copy_32_3 195 | CMP R2, #(04*01*01) ; Copy remaining 32-bit words 196 | BCC Copy_16_1 197 | LDR R3, [R1], #4 198 | STR R3, [R0], #4 199 | SUB R2, R2, #(04*01*01) 200 | B Copy_32_3 201 | 202 | Copy_16_1 203 | CMP R2, #(02*01*16) ; Copy chunks of 16 16-bit words (32 bytes per loop) 204 | BCC Copy_16_2 205 | LDRH R3, [R1], #2 206 | STRH R3, [R0], #2 207 | LDRH R3, [R1], #2 208 | STRH R3, [R0], #2 209 | LDRH R3, [R1], #2 210 | STRH R3, [R0], #2 211 | LDRH R3, [R1], #2 212 | STRH R3, [R0], #2 213 | LDRH R3, [R1], #2 214 | STRH R3, [R0], #2 215 | LDRH R3, [R1], #2 216 | STRH R3, [R0], #2 217 | LDRH R3, [R1], #2 218 | STRH R3, [R0], #2 219 | LDRH R3, [R1], #2 220 | STRH R3, [R0], #2 221 | LDRH R3, [R1], #2 222 | STRH R3, [R0], #2 223 | LDRH R3, [R1], #2 224 | STRH R3, [R0], #2 225 | LDRH R3, [R1], #2 226 | STRH R3, [R0], #2 227 | LDRH R3, [R1], #2 228 | STRH R3, [R0], #2 229 | LDRH R3, [R1], #2 230 | STRH R3, [R0], #2 231 | LDRH R3, [R1], #2 232 | STRH R3, [R0], #2 233 | LDRH R3, [R1], #2 234 | STRH R3, [R0], #2 235 | LDRH R3, [R1], #2 236 | STRH R3, [R0], #2 237 | SUB R2, R2, #(02*01*16) 238 | B Copy_16_1 239 | 240 | Copy_16_2 241 | CMP R2, #(02*01*01) ; Copy remaining 16-bit words 242 | BCC Copy_08_1 243 | LDRH R3, [R1], #2 244 | STRH R3, [R0], #2 245 | SUB R2, R2, #(02*01*01) 246 | B Copy_16_2 247 | 248 | Copy_08_1 249 | CMP R2, #(01*01*16) ; Copy chunks of 16 8-bit words (16 bytes per loop) 250 | BCC Copy_08_2 251 | LDRB R3, [R1], #1 252 | STRB R3, [R0], #1 253 | LDRB R3, [R1], #1 254 | STRB R3, [R0], #1 255 | LDRB R3, [R1], #1 256 | STRB R3, [R0], #1 257 | LDRB R3, [R1], #1 258 | STRB R3, [R0], #1 259 | LDRB R3, [R1], #1 260 | STRB R3, [R0], #1 261 | LDRB R3, [R1], #1 262 | STRB R3, [R0], #1 263 | LDRB R3, [R1], #1 264 | STRB R3, [R0], #1 265 | LDRB R3, [R1], #1 266 | STRB R3, [R0], #1 267 | LDRB R3, [R1], #1 268 | STRB R3, [R0], #1 269 | LDRB R3, [R1], #1 270 | STRB R3, [R0], #1 271 | LDRB R3, [R1], #1 272 | STRB R3, [R0], #1 273 | LDRB R3, [R1], #1 274 | STRB R3, [R0], #1 275 | LDRB R3, [R1], #1 276 | STRB R3, [R0], #1 277 | LDRB R3, [R1], #1 278 | STRB R3, [R0], #1 279 | LDRB R3, [R1], #1 280 | STRB R3, [R0], #1 281 | LDRB R3, [R1], #1 282 | STRB R3, [R0], #1 283 | SUB R2, R2, #(01*01*16) 284 | B Copy_08_1 285 | 286 | Copy_08_2 287 | CMP R2, #(01*01*01) ; Copy remaining 8-bit words 288 | BCC Mem_Copy_END 289 | LDRB R3, [R1], #1 290 | STRB R3, [R0], #1 291 | SUB R2, R2, #(01*01*01) 292 | B Copy_08_2 293 | 294 | 295 | Mem_Copy_END 296 | LDMFD SP!, {R3-R12} ; restore registers from stack 297 | BX LR ; return 298 | 299 | 300 | END 301 | -------------------------------------------------------------------------------- /Ports/ARM-Cortex-M4/RealView/lib_mem_a.asm: -------------------------------------------------------------------------------- 1 | ;******************************************************************************************************** 2 | ; uC/LIB 3 | ; Custom Library Modules 4 | ; 5 | ; Copyright 2004-2021 Silicon Laboratories Inc. www.silabs.com 6 | ; 7 | ; SPDX-License-Identifier: APACHE-2.0 8 | ; 9 | ; This software is subject to an open source license and is distributed by 10 | ; Silicon Laboratories Inc. pursuant to the terms of the Apache License, 11 | ; Version 2.0 available at www.apache.org/licenses/LICENSE-2.0. 12 | ; 13 | ;******************************************************************************************************** 14 | 15 | 16 | ;******************************************************************************************************** 17 | ; 18 | ; STANDARD MEMORY OPERATIONS 19 | ; 20 | ; ARM-Cortex-M4 21 | ; RealView Development Suite 22 | ; RealView Microcontroller Development Kit (MDK) 23 | ; ARM Developer Suite (ADS) 24 | ; Keil uVision 25 | ; 26 | ; Filename : lib_mem_a.asm 27 | ; Version : V1.39.01 28 | ;******************************************************************************************************** 29 | ; Note(s) : (1) NO compiler-supplied standard library functions are used in library or product software. 30 | ; 31 | ; (a) ALL standard library functions are implemented in the custom library modules : 32 | ; 33 | ; (1) \\lib*.* 34 | ; 35 | ; (2) \\Ports\\\lib*_a.* 36 | ; 37 | ; where 38 | ; directory path for custom library software 39 | ; directory name for specific processor (CPU) 40 | ; directory name for specific compiler 41 | ; 42 | ; (b) Product-specific library functions are implemented in individual products. 43 | ; 44 | ; (2) Assumes ARM CPU mode configured for Little Endian. 45 | ;******************************************************************************************************** 46 | 47 | 48 | ;******************************************************************************************************** 49 | ; PUBLIC FUNCTIONS 50 | ;******************************************************************************************************** 51 | 52 | EXPORT Mem_Copy 53 | 54 | 55 | ;******************************************************************************************************** 56 | ; CODE GENERATION DIRECTIVES 57 | ;******************************************************************************************************** 58 | 59 | AREA |.text|, CODE, READONLY, ALIGN=2 60 | THUMB 61 | REQUIRE8 62 | PRESERVE8 63 | 64 | 65 | ;******************************************************************************************************** 66 | ; Mem_Copy() 67 | ; 68 | ; Description : Copy data octets from one buffer to another buffer. 69 | ; 70 | ; Argument(s) : pdest Pointer to destination memory buffer. 71 | ; 72 | ; psrc Pointer to source memory buffer. 73 | ; 74 | ; size Number of data buffer octets to copy. 75 | ; 76 | ; Return(s) : none. 77 | ; 78 | ; Caller(s) : Application. 79 | ; 80 | ; Note(s) : (1) Null copies allowed (i.e. 0-octet size). 81 | ; 82 | ; (2) Memory buffers NOT checked for overlapping. 83 | ; 84 | ; (3) Modulo arithmetic is used to determine whether a memory buffer starts on a 'CPU_ALIGN' 85 | ; address boundary. 86 | ; 87 | ; (4) ARM Cortex-M3 processors use a subset of the ARM Thumb-2 instruction set which does 88 | ; NOT support 16-bit conditional branch instructions but ONLY supports 8-bit conditional 89 | ; branch instructions. 90 | ; 91 | ; Therefore, branches exceeding 8-bit, signed, relative offsets : 92 | ; 93 | ; (a) CANNOT be implemented with conditional branches; but ... 94 | ; (b) MUST be implemented with non-conditional branches. 95 | ;******************************************************************************************************** 96 | 97 | ; void Mem_Copy (void *pdest, ; ==> R0 98 | ; void *psrc, ; ==> R1 99 | ; CPU_SIZE_T size) ; ==> R2 100 | 101 | Mem_Copy 102 | CMP R0, #0 103 | BNE Mem_Copy_1 104 | BX LR ; return if pdest == NULL 105 | 106 | Mem_Copy_1 107 | CMP R1, #0 108 | BNE Mem_Copy_2 109 | BX LR ; return if psrc == NULL 110 | 111 | Mem_Copy_2 112 | CMP R2, #0 113 | BNE Mem_Copy_3 114 | BX LR ; return if size == 0 115 | 116 | Mem_Copy_3 117 | STMFD SP!, {R3-R12} ; save registers on stack 118 | 119 | 120 | Chk_Align_32 ; check if both dest & src 32-bit aligned 121 | AND R3, R0, #0x03 122 | AND R4, R1, #0x03 123 | CMP R3, R4 124 | BNE Chk_Align_16 ; not 32-bit aligned, check for 16-bit alignment 125 | 126 | RSB R3, R3, #0x04 ; compute 1-2-3 pre-copy bytes (to align to the next 32-bit boundary) 127 | AND R3, R3, #0x03 128 | 129 | Pre_Copy_1 130 | CMP R3, #1 ; copy 1-2-3 bytes (to align to the next 32-bit boundary) 131 | BCC Copy_32_1 ; start real 32-bit copy 132 | CMP R2, #1 ; check if any more data to copy 133 | BCS Pre_Copy_1_Cont 134 | B Mem_Copy_END ; no more data to copy (see Note #4b) 135 | 136 | Pre_Copy_1_Cont 137 | LDRB R4, [R1], #1 138 | STRB R4, [R0], #1 139 | SUB R3, R3, #1 140 | SUB R2, R2, #1 141 | B Pre_Copy_1 142 | 143 | 144 | Chk_Align_16 ; check if both dest & src 16-bit aligned 145 | AND R3, R0, #0x01 146 | AND R4, R1, #0x01 147 | CMP R3, R4 148 | BEQ Pre_Copy_2 149 | B Copy_08_1 ; not 16-bit aligned, start 8-bit copy (see Note #4b) 150 | 151 | Pre_Copy_2 152 | CMP R3, #1 ; copy 1 byte (to align to the next 16-bit boundary) 153 | BCC Copy_16_1 ; start real 16-bit copy 154 | 155 | LDRB R4, [R1], #1 156 | STRB R4, [R0], #1 157 | SUB R3, R3, #1 158 | SUB R2, R2, #1 159 | B Pre_Copy_2 160 | 161 | 162 | Copy_32_1 163 | CMP R2, #(04*10*09) ; Copy 9 chunks of 10 32-bit words (360 octets per loop) 164 | BCC Copy_32_2 165 | LDMIA R1!, {R3-R12} 166 | STMIA R0!, {R3-R12} 167 | LDMIA R1!, {R3-R12} 168 | STMIA R0!, {R3-R12} 169 | LDMIA R1!, {R3-R12} 170 | STMIA R0!, {R3-R12} 171 | LDMIA R1!, {R3-R12} 172 | STMIA R0!, {R3-R12} 173 | LDMIA R1!, {R3-R12} 174 | STMIA R0!, {R3-R12} 175 | LDMIA R1!, {R3-R12} 176 | STMIA R0!, {R3-R12} 177 | LDMIA R1!, {R3-R12} 178 | STMIA R0!, {R3-R12} 179 | LDMIA R1!, {R3-R12} 180 | STMIA R0!, {R3-R12} 181 | LDMIA R1!, {R3-R12} 182 | STMIA R0!, {R3-R12} 183 | SUB R2, R2, #(04*10*09) 184 | B Copy_32_1 185 | 186 | Copy_32_2 187 | CMP R2, #(04*10*01) ; Copy chunks of 10 32-bit words (40 octets per loop) 188 | BCC Copy_32_3 189 | LDMIA R1!, {R3-R12} 190 | STMIA R0!, {R3-R12} 191 | SUB R2, R2, #(04*10*01) 192 | B Copy_32_2 193 | 194 | Copy_32_3 195 | CMP R2, #(04*01*01) ; Copy remaining 32-bit words 196 | BCC Copy_16_1 197 | LDR R3, [R1], #4 198 | STR R3, [R0], #4 199 | SUB R2, R2, #(04*01*01) 200 | B Copy_32_3 201 | 202 | Copy_16_1 203 | CMP R2, #(02*01*16) ; Copy chunks of 16 16-bit words (32 bytes per loop) 204 | BCC Copy_16_2 205 | LDRH R3, [R1], #2 206 | STRH R3, [R0], #2 207 | LDRH R3, [R1], #2 208 | STRH R3, [R0], #2 209 | LDRH R3, [R1], #2 210 | STRH R3, [R0], #2 211 | LDRH R3, [R1], #2 212 | STRH R3, [R0], #2 213 | LDRH R3, [R1], #2 214 | STRH R3, [R0], #2 215 | LDRH R3, [R1], #2 216 | STRH R3, [R0], #2 217 | LDRH R3, [R1], #2 218 | STRH R3, [R0], #2 219 | LDRH R3, [R1], #2 220 | STRH R3, [R0], #2 221 | LDRH R3, [R1], #2 222 | STRH R3, [R0], #2 223 | LDRH R3, [R1], #2 224 | STRH R3, [R0], #2 225 | LDRH R3, [R1], #2 226 | STRH R3, [R0], #2 227 | LDRH R3, [R1], #2 228 | STRH R3, [R0], #2 229 | LDRH R3, [R1], #2 230 | STRH R3, [R0], #2 231 | LDRH R3, [R1], #2 232 | STRH R3, [R0], #2 233 | LDRH R3, [R1], #2 234 | STRH R3, [R0], #2 235 | LDRH R3, [R1], #2 236 | STRH R3, [R0], #2 237 | SUB R2, R2, #(02*01*16) 238 | B Copy_16_1 239 | 240 | Copy_16_2 241 | CMP R2, #(02*01*01) ; Copy remaining 16-bit words 242 | BCC Copy_08_1 243 | LDRH R3, [R1], #2 244 | STRH R3, [R0], #2 245 | SUB R2, R2, #(02*01*01) 246 | B Copy_16_2 247 | 248 | Copy_08_1 249 | CMP R2, #(01*01*16) ; Copy chunks of 16 8-bit words (16 bytes per loop) 250 | BCC Copy_08_2 251 | LDRB R3, [R1], #1 252 | STRB R3, [R0], #1 253 | LDRB R3, [R1], #1 254 | STRB R3, [R0], #1 255 | LDRB R3, [R1], #1 256 | STRB R3, [R0], #1 257 | LDRB R3, [R1], #1 258 | STRB R3, [R0], #1 259 | LDRB R3, [R1], #1 260 | STRB R3, [R0], #1 261 | LDRB R3, [R1], #1 262 | STRB R3, [R0], #1 263 | LDRB R3, [R1], #1 264 | STRB R3, [R0], #1 265 | LDRB R3, [R1], #1 266 | STRB R3, [R0], #1 267 | LDRB R3, [R1], #1 268 | STRB R3, [R0], #1 269 | LDRB R3, [R1], #1 270 | STRB R3, [R0], #1 271 | LDRB R3, [R1], #1 272 | STRB R3, [R0], #1 273 | LDRB R3, [R1], #1 274 | STRB R3, [R0], #1 275 | LDRB R3, [R1], #1 276 | STRB R3, [R0], #1 277 | LDRB R3, [R1], #1 278 | STRB R3, [R0], #1 279 | LDRB R3, [R1], #1 280 | STRB R3, [R0], #1 281 | LDRB R3, [R1], #1 282 | STRB R3, [R0], #1 283 | SUB R2, R2, #(01*01*16) 284 | B Copy_08_1 285 | 286 | Copy_08_2 287 | CMP R2, #(01*01*01) ; Copy remaining 8-bit words 288 | BCC Mem_Copy_END 289 | LDRB R3, [R1], #1 290 | STRB R3, [R0], #1 291 | SUB R2, R2, #(01*01*01) 292 | B Copy_08_2 293 | 294 | 295 | Mem_Copy_END 296 | LDMFD SP!, {R3-R12} ; restore registers from stack 297 | BX LR ; return 298 | 299 | 300 | END 301 | -------------------------------------------------------------------------------- /Ports/ARM-Cortex-M1/RealView/lib_mem_a.asm: -------------------------------------------------------------------------------- 1 | ;******************************************************************************************************** 2 | ; uC/LIB 3 | ; Custom Library Modules 4 | ; 5 | ; Copyright 2004-2021 Silicon Laboratories Inc. www.silabs.com 6 | ; 7 | ; SPDX-License-Identifier: APACHE-2.0 8 | ; 9 | ; This software is subject to an open source license and is distributed by 10 | ; Silicon Laboratories Inc. pursuant to the terms of the Apache License, 11 | ; Version 2.0 available at www.apache.org/licenses/LICENSE-2.0. 12 | ; 13 | ;******************************************************************************************************** 14 | 15 | 16 | ;******************************************************************************************************** 17 | ; 18 | ; STANDARD MEMORY OPERATIONS 19 | ; 20 | ; ARM-Cortex-M1 21 | ; RealView Development Suite 22 | ; RealView Microcontroller Development Kit (MDK) 23 | ; ARM Developer Suite (ADS) 24 | ; Keil uVision 25 | ; 26 | ; Filename : lib_mem_a.asm 27 | ; Version : V1.39.01 28 | ;******************************************************************************************************** 29 | ; Note(s) : (1) NO compiler-supplied standard library functions are used in library or product software. 30 | ; 31 | ; (a) ALL standard library functions are implemented in the custom library modules : 32 | ; 33 | ; (1) \\lib*.* 34 | ; 35 | ; (2) \\Ports\\\lib*_a.* 36 | ; 37 | ; where 38 | ; directory path for custom library software 39 | ; directory name for specific processor (CPU) 40 | ; directory name for specific compiler 41 | ; 42 | ; (b) Product-specific library functions are implemented in individual products. 43 | ; 44 | ; (2) Assumes ARM CPU mode configured for Little Endian. 45 | ;******************************************************************************************************** 46 | 47 | 48 | ;******************************************************************************************************** 49 | ; PUBLIC FUNCTIONS 50 | ;******************************************************************************************************** 51 | 52 | EXPORT Mem_Copy 53 | 54 | 55 | ;******************************************************************************************************** 56 | ; CODE GENERATION DIRECTIVES 57 | ;******************************************************************************************************** 58 | 59 | AREA |.text|, CODE, READONLY, ALIGN=2 60 | THUMB 61 | REQUIRE8 62 | PRESERVE8 63 | 64 | 65 | ;******************************************************************************************************** 66 | ; Mem_Copy() 67 | ; 68 | ; Description : Copy data octets from one buffer to another buffer. 69 | ; 70 | ; Argument(s) : pdest Pointer to destination memory buffer. 71 | ; 72 | ; psrc Pointer to source memory buffer. 73 | ; 74 | ; size Number of data buffer octets to copy. 75 | ; 76 | ; Return(s) : none. 77 | ; 78 | ; Caller(s) : Application. 79 | ; 80 | ; Note(s) : (1) Null copies allowed (i.e. 0-octet size). 81 | ; 82 | ; (2) Memory buffers NOT checked for overlapping. 83 | ; 84 | ; (3) Modulo arithmetic is used to determine whether a memory buffer starts on a 'CPU_ALIGN' 85 | ; address boundary. 86 | ; 87 | ; (4) ARM Cortex-M3 processors use a subset of the ARM Thumb-2 instruction set which does 88 | ; NOT support 16-bit conditional branch instructions but ONLY supports 8-bit conditional 89 | ; branch instructions. 90 | ; 91 | ; Therefore, branches exceeding 8-bit, signed, relative offsets : 92 | ; 93 | ; (a) CANNOT be implemented with conditional branches; but ... 94 | ; (b) MUST be implemented with non-conditional branches. 95 | ;******************************************************************************************************** 96 | 97 | ; void Mem_Copy (void *pdest, ; ==> R0 98 | ; void *psrc, ; ==> R1 99 | ; CPU_SIZE_T size) ; ==> R2 100 | 101 | Mem_Copy 102 | CMP R0, #0 103 | BNE Mem_Copy_1 104 | BX LR ; return if pdest == NULL 105 | 106 | Mem_Copy_1 107 | CMP R1, #0 108 | BNE Mem_Copy_2 109 | BX LR ; return if psrc == NULL 110 | 111 | Mem_Copy_2 112 | CMP R2, #0 113 | BNE Mem_Copy_3 114 | BX LR ; return if size == 0 115 | 116 | Mem_Copy_3 117 | STMFD SP!, {R3-R7} ; save registers on stack 118 | 119 | Chk_Align_32 ; check if both dest & src 32-bit aligned 120 | 121 | LSLS R3, R0, #30 122 | LSRS R3, R3, #30 123 | 124 | LSLS R4, R1, #30 125 | LSRS R4, R4, #30 126 | 127 | CMP R3, R4 128 | BNE Chk_Align_16 ; not 32-bit aligned, check for 16-bit alignment 129 | 130 | CMP R3, #0 131 | BEQ Copy_32_1 132 | 133 | Pre_Copy_1 134 | CMP R3, #4 ; copy 1-2-3 bytes (to align to the next 32-bit boundary) 135 | BCS Copy_32_1 ; start real 32-bit copy 136 | CMP R2, #1 ; check if any more data to copy 137 | BCS Pre_Copy_1_Cont 138 | B Mem_Copy_END ; no more data to copy (see Note #4b) 139 | 140 | Pre_Copy_1_Cont 141 | LDRB R4, [R1] 142 | STRB R4, [R0] 143 | ADDS R1, #1 144 | ADDS R0, #1 145 | ADDS R3, #1 146 | SUBS R2, #1 147 | B Pre_Copy_1 148 | 149 | 150 | Chk_Align_16 ; check if both dest & src 16-bit aligned 151 | LSLS R3, R0, #31 152 | LSRS R3, R3, #31 153 | 154 | LSLS R4, R1, #31 155 | LSRS R4, R4, #31 156 | 157 | CMP R3, R4 158 | BEQ Pre_Copy_2 159 | B Copy_08_1 ; not 16-bit aligned, start 8-bit copy (see Note #4b) 160 | 161 | Pre_Copy_2 162 | CMP R3, #1 ; copy 1 byte (to align to the next 16-bit boundary) 163 | BCC Copy_16_1 ; start real 16-bit copy 164 | 165 | LDRB R4, [R1] 166 | STRB R4, [R0] 167 | ADDS R1, #1 168 | ADDS R0, #1 169 | SUBS R3, #1 170 | SUBS R2, #1 171 | B Pre_Copy_2 172 | 173 | 174 | Copy_32_1 175 | CMP R2, #(04*05*09) ; Copy 9 chunks of 5 32-bit words (180 octets per loop) 176 | BCC Copy_32_2 177 | LDM R1!, {R3-R7} 178 | STM R0!, {R3-R7} 179 | LDM R1!, {R3-R7} 180 | STM R0!, {R3-R7} 181 | LDM R1!, {R3-R7} 182 | STM R0!, {R3-R7} 183 | LDM R1!, {R3-R7} 184 | STM R0!, {R3-R7} 185 | LDM R1!, {R3-R7} 186 | STM R0!, {R3-R7} 187 | LDM R1!, {R3-R7} 188 | STM R0!, {R3-R7} 189 | LDM R1!, {R3-R7} 190 | STM R0!, {R3-R7} 191 | LDM R1!, {R3-R7} 192 | STM R0!, {R3-R7} 193 | LDM R1!, {R3-R7} 194 | STM R0!, {R3-R7} 195 | SUBS R2, #(04*05*09) 196 | B Copy_32_1 197 | 198 | Copy_32_2 199 | CMP R2, #(04*05*01) ; Copy chunks of 5 32-bit words (20 octets per loop) 200 | BCC Copy_32_3 201 | LDM R1!, {R3-R7} 202 | STM R0!, {R3-R7} 203 | SUBS R2, #(04*05*01) 204 | B Copy_32_2 205 | 206 | Copy_32_3 207 | CMP R2, #(04*01*01) ; Copy remaining 32-bit words 208 | BCC Copy_16_1 209 | LDM R1!, {R3} 210 | STM R0!, {R3} 211 | SUBS R2, #(04*01*01) 212 | B Copy_32_3 213 | 214 | Copy_16_1 215 | CMP R2, #(02*01*16) ; Copy chunks of 16 16-bit words (32 octets per loop) 216 | BCC Copy_16_2 217 | LDRH R3, [R1, #0] 218 | STRH R3, [R0, #0] 219 | LDRH R3, [R1, #2] 220 | STRH R3, [R0, #2] 221 | LDRH R3, [R1, #4] 222 | STRH R3, [R0, #4] 223 | LDRH R3, [R1, #6] 224 | STRH R3, [R0, #6] 225 | LDRH R3, [R1, #8] 226 | STRH R3, [R0, #8] 227 | LDRH R3, [R1, #10] 228 | STRH R3, [R0, #10] 229 | LDRH R3, [R1, #12] 230 | STRH R3, [R0, #12] 231 | LDRH R3, [R1, #14] 232 | STRH R3, [R0, #14] 233 | LDRH R3, [R1, #16] 234 | STRH R3, [R0, #16] 235 | LDRH R3, [R1, #18] 236 | STRH R3, [R0, #18] 237 | LDRH R3, [R1, #20] 238 | STRH R3, [R0, #20] 239 | LDRH R3, [R1, #22] 240 | STRH R3, [R0, #22] 241 | LDRH R3, [R1, #24] 242 | STRH R3, [R0, #24] 243 | LDRH R3, [R1, #26] 244 | STRH R3, [R0, #26] 245 | LDRH R3, [R1, #28] 246 | STRH R3, [R0, #28] 247 | LDRH R3, [R1, #30] 248 | STRH R3, [R0, #30] 249 | ADDS R1, #32 250 | ADDS R0, #32 251 | SUBS R2, #(02*01*16) 252 | B Copy_16_1 253 | 254 | Copy_16_2 255 | CMP R2, #(02*01*01) ; Copy remaining 16-bit words 256 | BCC Copy_08_1 257 | LDRH R3, [R1] 258 | STRH R3, [R0] 259 | ADDS R1, #2 260 | ADDS R0, #2 261 | SUBS R2, #(02*01*01) 262 | B Copy_16_2 263 | 264 | Copy_08_1 265 | CMP R2, #(01*01*16) ; Copy chunks of 16 8-bit words (16 octets per loop) 266 | BCC Copy_08_2 267 | LDRB R3, [R1, #0] 268 | STRB R3, [R0, #0] 269 | LDRB R3, [R1, #1] 270 | STRB R3, [R0, #1] 271 | LDRB R3, [R1, #2] 272 | STRB R3, [R0, #2] 273 | LDRB R3, [R1, #3] 274 | STRB R3, [R0, #3] 275 | LDRB R3, [R1, #4] 276 | STRB R3, [R0, #4] 277 | LDRB R3, [R1, #5] 278 | STRB R3, [R0, #5] 279 | LDRB R3, [R1, #6] 280 | STRB R3, [R0, #6] 281 | LDRB R3, [R1, #7] 282 | STRB R3, [R0, #7] 283 | LDRB R3, [R1, #8] 284 | STRB R3, [R0, #8] 285 | LDRB R3, [R1, #9] 286 | STRB R3, [R0, #9] 287 | LDRB R3, [R1, #10] 288 | STRB R3, [R0, #10] 289 | LDRB R3, [R1, #11] 290 | STRB R3, [R0, #11] 291 | LDRB R3, [R1, #12] 292 | STRB R3, [R0, #12] 293 | LDRB R3, [R1, #13] 294 | STRB R3, [R0, #13] 295 | LDRB R3, [R1, #14] 296 | STRB R3, [R0, #14] 297 | LDRB R3, [R1, #15] 298 | STRB R3, [R0, #15] 299 | ADDS R1, #16 300 | ADDS R0, #16 301 | SUBS R2, R2, #(01*01*16) 302 | B Copy_08_1 303 | 304 | Copy_08_2 305 | CMP R2, #(01*01*01) ; Copy remaining 8-bit words 306 | BCC Mem_Copy_END 307 | LDRB R3, [R1] 308 | STRB R3, [R0] 309 | ADDS R1, #1 310 | ADDS R0, #1 311 | SUBS R2, #(01*01*01) 312 | B Copy_08_2 313 | 314 | 315 | Mem_Copy_END 316 | LDMFD SP!, {R3-R7} ; restore registers from stack 317 | BX LR ; return 318 | 319 | 320 | END 321 | -------------------------------------------------------------------------------- /lib_math.h: -------------------------------------------------------------------------------- 1 | /* 2 | ********************************************************************************************************* 3 | * uC/LIB 4 | * Custom Library Modules 5 | * 6 | * Copyright 2004-2021 Silicon Laboratories Inc. www.silabs.com 7 | * 8 | * SPDX-License-Identifier: APACHE-2.0 9 | * 10 | * This software is subject to an open source license and is distributed by 11 | * Silicon Laboratories Inc. pursuant to the terms of the Apache License, 12 | * Version 2.0 available at www.apache.org/licenses/LICENSE-2.0. 13 | * 14 | ********************************************************************************************************* 15 | */ 16 | 17 | /* 18 | ********************************************************************************************************* 19 | * 20 | * MATHEMATIC OPERATIONS 21 | * 22 | * Filename : lib_math.h 23 | * Version : V1.39.01 24 | ********************************************************************************************************* 25 | * Note(s) : (1) NO compiler-supplied standard library functions are used in library or product software. 26 | * 27 | * (a) ALL standard library functions are implemented in the custom library modules : 28 | * 29 | * (1) \\lib_*.* 30 | * 31 | * (2) \\Ports\\\lib*_a.* 32 | * 33 | * where 34 | * directory path for custom library software 35 | * directory name for specific processor (CPU) 36 | * directory name for specific compiler 37 | * 38 | * (b) Product-specific library functions are implemented in individual products. 39 | * 40 | ********************************************************************************************************* 41 | * Notice(s) : (1) The Institute of Electrical and Electronics Engineers and The Open Group, have given 42 | * us permission to reprint portions of their documentation. Portions of this text are 43 | * reprinted and reproduced in electronic form from the IEEE Std 1003.1, 2004 Edition, 44 | * Standard for Information Technology -- Portable Operating System Interface (POSIX), 45 | * The Open Group Base Specifications Issue 6, Copyright (C) 2001-2004 by the Institute 46 | * of Electrical and Electronics Engineers, Inc and The Open Group. In the event of any 47 | * discrepancy between these versions and the original IEEE and The Open Group Standard, 48 | * the original IEEE and The Open Group Standard is the referee document. The original 49 | * Standard can be obtained online at http://www.opengroup.org/unix/online.html. 50 | ********************************************************************************************************* 51 | */ 52 | 53 | /* 54 | ********************************************************************************************************* 55 | * MODULE 56 | * 57 | * Note(s) : (1) This mathematics library header file is protected from multiple pre-processor inclusion 58 | * through use of the mathematics library module present pre-processor macro definition. 59 | ********************************************************************************************************* 60 | */ 61 | 62 | #ifndef LIB_MATH_MODULE_PRESENT /* See Note #1. */ 63 | #define LIB_MATH_MODULE_PRESENT 64 | 65 | 66 | /* 67 | ********************************************************************************************************* 68 | * INCLUDE FILES 69 | * 70 | * Note(s) : (1) The custom library software files are located in the following directories : 71 | * 72 | * (a) \\lib_*.* 73 | * 74 | * where 75 | * directory path for custom library software 76 | * 77 | * (2) CPU-configuration software files are located in the following directories : 78 | * 79 | * (a) \\cpu_*.* 80 | * (b) \\\\cpu*.* 81 | * 82 | * where 83 | * directory path for common CPU-compiler software 84 | * directory name for specific processor (CPU) 85 | * directory name for specific compiler 86 | * 87 | * (3) Compiler MUST be configured to include as additional include path directories : 88 | * 89 | * (a) '\\' directory See Note #1a 90 | * 91 | * (b) (1) '\\' directory See Note #2a 92 | * (2) '\\\\' directory See Note #2b 93 | * 94 | * (4) NO compiler-supplied standard library functions SHOULD be used. 95 | ********************************************************************************************************* 96 | */ 97 | 98 | #include 99 | #include 100 | 101 | #include 102 | 103 | 104 | /* 105 | ********************************************************************************************************* 106 | * EXTERNS 107 | ********************************************************************************************************* 108 | */ 109 | 110 | #ifdef LIB_MATH_MODULE 111 | #define LIB_MATH_EXT 112 | #else 113 | #define LIB_MATH_EXT extern 114 | #endif 115 | 116 | 117 | /* 118 | ********************************************************************************************************* 119 | * DEFINES 120 | ********************************************************************************************************* 121 | */ 122 | 123 | /* 124 | ********************************************************************************************************* 125 | * RANDOM NUMBER DEFINES 126 | * 127 | * Note(s) : (1) (a) IEEE Std 1003.1, 2004 Edition, Section 'rand() : DESCRIPTION' states that "if rand() 128 | * is called before any calls to srand() are made, the same sequence shall be generated 129 | * as when srand() is first called with a seed value of 1". 130 | * 131 | * (b) (1) BSD/ANSI-C implements rand() as a Linear Congruential Generator (LCG) : 132 | * 133 | * (A) random_number = [(a * random_number ) + b] modulo m 134 | * n + 1 n 135 | * 136 | * where 137 | * (1) (a) random_number Next random number to generate 138 | * n+1 139 | * (b) random_number Previous random number generated 140 | * n 141 | * (c) random_number Initial random number seed 142 | * 0 See also Note #1a 143 | * 144 | * (2) a = 1103515245 LCG multiplier 145 | * (3) b = 12345 LCG incrementor 146 | * (4) m = RAND_MAX + 1 LCG modulus See also Note #1b2 147 | * 148 | * (2) (A) IEEE Std 1003.1, 2004 Edition, Section 'rand() : DESCRIPTION' states that 149 | * "rand() ... shall compute a sequence of pseudo-random integers in the range 150 | * [0, {RAND_MAX}] with a period of at least 2^32". 151 | * 152 | * (B) However, BSD/ANSI-C 'stdlib.h' defines "RAND_MAX" as "0x7fffffff", or 2^31; 153 | * which therefore limits the range AND period to no more than 2^31. 154 | ********************************************************************************************************* 155 | */ 156 | 157 | #define RAND_SEED_INIT_VAL 1u /* See Note #1a. */ 158 | 159 | #define RAND_LCG_PARAM_M 0x7FFFFFFFu /* See Note #1b2B. */ 160 | #define RAND_LCG_PARAM_A 1103515245u /* See Note #1b1A2. */ 161 | #define RAND_LCG_PARAM_B 12345u /* See Note #1b1A3. */ 162 | 163 | 164 | /* 165 | ********************************************************************************************************* 166 | * DATA TYPES 167 | ********************************************************************************************************* 168 | */ 169 | 170 | /* 171 | ********************************************************************************************************* 172 | * RANDOM NUMBER DATA TYPE 173 | ********************************************************************************************************* 174 | */ 175 | 176 | typedef CPU_INT32U RAND_NBR; 177 | 178 | 179 | /* 180 | ********************************************************************************************************* 181 | * GLOBAL VARIABLES 182 | ********************************************************************************************************* 183 | */ 184 | 185 | 186 | /* 187 | ********************************************************************************************************* 188 | * MACROS 189 | ********************************************************************************************************* 190 | */ 191 | 192 | /* 193 | ********************************************************************************************************* 194 | * MATH_IS_PWR2() 195 | * 196 | * Description : Determine if a value is a power of 2. 197 | * 198 | * Argument(s) : nbr Value. 199 | * 200 | * Return(s) : DEF_YES, 'nbr' is a power of 2. 201 | * 202 | * DEF_NO, 'nbr' is not a power of 2. 203 | * 204 | * Caller(s) : Application. 205 | * 206 | * Note(s) : none. 207 | ********************************************************************************************************* 208 | */ 209 | 210 | #define MATH_IS_PWR2(nbr) ((((nbr) != 0u) && (((nbr) & ((nbr) - 1u)) == 0u)) ? DEF_YES : DEF_NO) 211 | 212 | 213 | /* 214 | ********************************************************************************************************* 215 | * MATH_ROUND_INC_UP_PWR2() 216 | * 217 | * Description : Round value up to the next (power of 2) increment. 218 | * 219 | * Argument(s) : nbr Value to round. 220 | * 221 | * inc Increment to use. MUST be a power of 2. 222 | * 223 | * Return(s) : Rounded up value. 224 | * 225 | * Caller(s) : Application. 226 | * 227 | * Note(s) : none. 228 | ********************************************************************************************************* 229 | */ 230 | 231 | #define MATH_ROUND_INC_UP_PWR2(nbr, inc) (((nbr) & ~((inc) - 1)) + (((nbr) & ((inc) - 1)) == 0 ? 0 : (inc))) 232 | 233 | 234 | /* 235 | ********************************************************************************************************* 236 | * MATH_ROUND_INC_UP() 237 | * 238 | * Description : Round value up to the next increment. 239 | * 240 | * Argument(s) : nbr Value to round. 241 | * 242 | * inc Increment to use. 243 | * 244 | * Return(s) : Rounded up value. 245 | * 246 | * Caller(s) : Application. 247 | * 248 | * Note(s) : none. 249 | ********************************************************************************************************* 250 | */ 251 | 252 | #define MATH_ROUND_INC_UP(nbr, inc) (((nbr) + ((inc) - 1)) / (inc) * (inc)) 253 | 254 | 255 | /* 256 | ********************************************************************************************************* 257 | * FUNCTION PROTOTYPES 258 | ********************************************************************************************************* 259 | */ 260 | 261 | void Math_Init (void); 262 | 263 | /* ------------------ RAND NBR FNCTS ------------------ */ 264 | void Math_RandSetSeed(RAND_NBR seed); 265 | 266 | RAND_NBR Math_Rand (void); 267 | 268 | RAND_NBR Math_RandSeed (RAND_NBR seed); 269 | 270 | 271 | /* 272 | ********************************************************************************************************* 273 | * CONFIGURATION ERRORS 274 | ********************************************************************************************************* 275 | */ 276 | 277 | 278 | /* 279 | ********************************************************************************************************* 280 | * MODULE END 281 | * 282 | * Note(s) : (1) See 'lib_math.h MODULE'. 283 | ********************************************************************************************************* 284 | */ 285 | 286 | #endif /* End of lib math module include. */ 287 | -------------------------------------------------------------------------------- /lib_str.h: -------------------------------------------------------------------------------- 1 | /* 2 | ********************************************************************************************************* 3 | * uC/LIB 4 | * Custom Library Modules 5 | * 6 | * Copyright 2004-2021 Silicon Laboratories Inc. www.silabs.com 7 | * 8 | * SPDX-License-Identifier: APACHE-2.0 9 | * 10 | * This software is subject to an open source license and is distributed by 11 | * Silicon Laboratories Inc. pursuant to the terms of the Apache License, 12 | * Version 2.0 available at www.apache.org/licenses/LICENSE-2.0. 13 | * 14 | ********************************************************************************************************* 15 | */ 16 | 17 | /* 18 | ********************************************************************************************************* 19 | * 20 | * ASCII STRING MANAGEMENT 21 | * 22 | * Filename : lib_str.h 23 | * Version : V1.39.01 24 | ********************************************************************************************************* 25 | * Note(s) : (1) NO compiler-supplied standard library functions are used in library or product software. 26 | * 27 | * (a) ALL standard library functions are implemented in the custom library modules : 28 | * 29 | * (1) \\lib_*.* 30 | * 31 | * (2) \\Ports\\\lib*_a.* 32 | * 33 | * where 34 | * directory path for custom library software 35 | * directory name for specific processor (CPU) 36 | * directory name for specific compiler 37 | * 38 | * (b) Product-specific library functions are implemented in individual products. 39 | ********************************************************************************************************* 40 | */ 41 | 42 | /* 43 | ********************************************************************************************************* 44 | * MODULE 45 | * 46 | * Note(s) : (1) This string library header file is protected from multiple pre-processor inclusion through 47 | * use of the string library module present pre-processor macro definition. 48 | ********************************************************************************************************* 49 | */ 50 | 51 | #ifndef LIB_STR_MODULE_PRESENT /* See Note #1. */ 52 | #define LIB_STR_MODULE_PRESENT 53 | 54 | 55 | /* 56 | ********************************************************************************************************* 57 | * ASCII STRING CONFIGURATION DEFINES 58 | * 59 | * Note(s) : (1) Some ASCII string configuration #define's MUST be available PRIOR to including any 60 | * application configuration (see 'INCLUDE FILES Note #1a'). 61 | ********************************************************************************************************* 62 | */ 63 | 64 | /* 65 | ********************************************************************************************************* 66 | * STRING FLOATING POINT DEFINES 67 | * 68 | * Note(s) : (1) (a) (1) The maximum accuracy for 32-bit floating-point numbers : 69 | * 70 | * 71 | * Maximum Accuracy log [Internal-Base ^ (Number-Internal-Base-Digits)] 72 | * 32-bit Floating-point Number = ----------------------------------------------------- 73 | * log [External-Base] 74 | * 75 | * log [2 ^ 24] 76 | * = -------------- 77 | * log [10] 78 | * 79 | * < 7.225 Base-10 Digits 80 | * 81 | * where 82 | * Internal-Base Internal number base of floating- 83 | * point numbers (i.e. 2) 84 | * External-Base External number base of floating- 85 | * point numbers (i.e. 10) 86 | * Number-Internal-Base-Digits Number of internal number base 87 | * significant digits (i.e. 24) 88 | * 89 | * (2) Also, since some 32-bit floating-point calculations are converted to 32-bit 90 | * unsigned numbers, the maximum accuracy is limited to the maximum accuracy 91 | * for 32-bit unsigned numbers of 9 digits. 92 | * 93 | * (b) Some CPUs' &/or compilers' floating-point implementations MAY further reduce the 94 | * maximum accuracy. 95 | ********************************************************************************************************* 96 | */ 97 | 98 | #define LIB_STR_FP_MAX_NBR_DIG_SIG_MIN 1u 99 | #define LIB_STR_FP_MAX_NBR_DIG_SIG_MAX 9u /* See Note #1a2. */ 100 | #define LIB_STR_FP_MAX_NBR_DIG_SIG_DFLT 7u /* See Note #1a1. */ 101 | 102 | 103 | /* 104 | ********************************************************************************************************* 105 | * INCLUDE FILES 106 | * 107 | * Note(s) : (1) The custom library software files are located in the following directories : 108 | * 109 | * (a) \\lib_cfg.h 110 | * 111 | * (b) \\lib_*.* 112 | * 113 | * where 114 | * directory path for Your Product's Application 115 | * directory path for custom library software 116 | * 117 | * (2) CPU-configuration software files are located in the following directories : 118 | * 119 | * (a) \\cpu_*.* 120 | * (b) \\\\cpu*.* 121 | * 122 | * where 123 | * directory path for common CPU-compiler software 124 | * directory name for specific processor (CPU) 125 | * directory name for specific compiler 126 | * 127 | * (3) Compiler MUST be configured to include as additional include path directories : 128 | * 129 | * (a) '\\' directory See Note #1a 130 | * 131 | * (b) '\\' directory See Note #1b 132 | * 133 | * (c) (1) '\\' directory See Note #2a 134 | * (2) '\\\\' directory See Note #2b 135 | * 136 | * (4) NO compiler-supplied standard library functions SHOULD be used. 137 | * 138 | * #### The reference to standard library header files SHOULD be removed once all custom 139 | * library functions are implemented WITHOUT reference to ANY standard library function(s). 140 | * 141 | * See also 'STANDARD LIBRARY MACRO'S Note #1'. 142 | ********************************************************************************************************* 143 | */ 144 | 145 | #include 146 | 147 | #include 148 | #include 149 | 150 | #include 151 | 152 | #if 0 /* See Note #4. */ 153 | #include 154 | #endif 155 | 156 | 157 | /* 158 | ********************************************************************************************************* 159 | * EXTERNS 160 | ********************************************************************************************************* 161 | */ 162 | 163 | #ifdef LIB_STR_MODULE 164 | #define LIB_STR_EXT 165 | #else 166 | #define LIB_STR_EXT extern 167 | #endif 168 | 169 | 170 | /* 171 | ********************************************************************************************************* 172 | * DEFAULT CONFIGURATION 173 | ********************************************************************************************************* 174 | */ 175 | 176 | /* 177 | ********************************************************************************************************* 178 | * STRING FLOATING POINT CONFIGURATION 179 | * 180 | * Note(s) : (1) Configure LIB_STR_CFG_FP_EN to enable/disable floating point string function(s). 181 | * 182 | * (2) Configure LIB_STR_CFG_FP_MAX_NBR_DIG_SIG to configure the maximum number of significant 183 | * digits to calculate &/or display for floating point string function(s). 184 | * 185 | * See also 'STRING FLOATING POINT DEFINES Note #1'. 186 | ********************************************************************************************************* 187 | */ 188 | 189 | /* Configure floating point feature(s) [see Note #1] : */ 190 | #ifndef LIB_STR_CFG_FP_EN 191 | #define LIB_STR_CFG_FP_EN DEF_DISABLED 192 | /* DEF_DISABLED Floating point functions DISABLED */ 193 | /* DEF_ENABLED Floating point functions ENABLED */ 194 | #endif 195 | 196 | /* Configure floating point feature(s)' number of ... */ 197 | /* ... significant digits (see Note #2). */ 198 | #ifndef LIB_STR_CFG_FP_MAX_NBR_DIG_SIG 199 | #define LIB_STR_CFG_FP_MAX_NBR_DIG_SIG LIB_STR_FP_MAX_NBR_DIG_SIG_DFLT 200 | #endif 201 | 202 | 203 | /* 204 | ********************************************************************************************************* 205 | * DEFINES 206 | ********************************************************************************************************* 207 | */ 208 | 209 | #define STR_CR_LF "\r\n" 210 | #define STR_LF_CR "\n\r" 211 | #define STR_NEW_LINE STR_CR_LF 212 | #define STR_PARENT_PATH ".." 213 | 214 | #define STR_CR_LF_LEN (sizeof(STR_CR_LF) - 1) 215 | #define STR_LF_CR_LEN (sizeof(STR_LF_CR) - 1) 216 | #define STR_NEW_LINE_LEN (sizeof(STR_NEW_LINE) - 1) 217 | #define STR_PARENT_PATH_LEN (sizeof(STR_PARENT_PATH) - 1) 218 | 219 | 220 | /* 221 | ********************************************************************************************************* 222 | * DATA TYPES 223 | ********************************************************************************************************* 224 | */ 225 | 226 | 227 | /* 228 | ********************************************************************************************************* 229 | * GLOBAL VARIABLES 230 | ********************************************************************************************************* 231 | */ 232 | 233 | 234 | /* 235 | ********************************************************************************************************* 236 | * MACRO'S 237 | ********************************************************************************************************* 238 | */ 239 | 240 | /* 241 | ********************************************************************************************************* 242 | * STANDARD LIBRARY MACRO'S 243 | * 244 | * Note(s) : (1) NO compiler-supplied standard library functions SHOULD be used. 245 | * 246 | * #### The reference to standard memory functions SHOULD be removed once all custom library 247 | * functions are implemented WITHOUT reference to ANY standard library function(s). 248 | * 249 | * See also 'INCLUDE FILES Note #3'. 250 | ********************************************************************************************************* 251 | */ 252 | 253 | /* See Note #1. */ 254 | #define Str_FmtPrint snprintf 255 | #define Str_FmtScan sscanf 256 | 257 | 258 | /* 259 | ********************************************************************************************************* 260 | * FUNCTION PROTOTYPES 261 | ********************************************************************************************************* 262 | */ 263 | 264 | /* ------------------ STR LEN FNCTS ------------------ */ 265 | CPU_SIZE_T Str_Len (const CPU_CHAR *pstr); 266 | 267 | CPU_SIZE_T Str_Len_N (const CPU_CHAR *pstr, 268 | CPU_SIZE_T len_max); 269 | 270 | 271 | /* ------------------ STR COPY FNCTS ------------------ */ 272 | CPU_CHAR *Str_Copy ( CPU_CHAR *pstr_dest, 273 | const CPU_CHAR *pstr_src); 274 | 275 | CPU_CHAR *Str_Copy_N ( CPU_CHAR *pstr_dest, 276 | const CPU_CHAR *pstr_src, 277 | CPU_SIZE_T len_max); 278 | 279 | 280 | CPU_CHAR *Str_Cat ( CPU_CHAR *pstr_dest, 281 | const CPU_CHAR *pstr_cat); 282 | 283 | CPU_CHAR *Str_Cat_N ( CPU_CHAR *pstr_dest, 284 | const CPU_CHAR *pstr_cat, 285 | CPU_SIZE_T len_max); 286 | 287 | 288 | /* ------------------ STR CMP FNCTS ------------------ */ 289 | CPU_INT16S Str_Cmp (const CPU_CHAR *p1_str, 290 | const CPU_CHAR *p2_str); 291 | 292 | CPU_INT16S Str_Cmp_N (const CPU_CHAR *p1_str, 293 | const CPU_CHAR *p2_str, 294 | CPU_SIZE_T len_max); 295 | 296 | CPU_INT16S Str_CmpIgnoreCase (const CPU_CHAR *p1_str, 297 | const CPU_CHAR *p2_str); 298 | 299 | CPU_INT16S Str_CmpIgnoreCase_N(const CPU_CHAR *p1_str, 300 | const CPU_CHAR *p2_str, 301 | CPU_SIZE_T len_max); 302 | 303 | 304 | /* ------------------ STR SRCH FNCTS ------------------ */ 305 | CPU_CHAR *Str_Char (const CPU_CHAR *pstr, 306 | CPU_CHAR srch_char); 307 | 308 | CPU_CHAR *Str_Char_N (const CPU_CHAR *pstr, 309 | CPU_SIZE_T len_max, 310 | CPU_CHAR srch_char); 311 | 312 | CPU_CHAR *Str_Char_Last (const CPU_CHAR *pstr, 313 | CPU_CHAR srch_char); 314 | 315 | CPU_CHAR *Str_Char_Last_N (const CPU_CHAR *pstr, 316 | CPU_SIZE_T len_max, 317 | CPU_CHAR srch_char); 318 | 319 | CPU_CHAR *Str_Char_Replace ( CPU_CHAR *pstr, 320 | CPU_CHAR char_srch, 321 | CPU_CHAR char_replace); 322 | 323 | CPU_CHAR *Str_Char_Replace_N ( CPU_CHAR *pstr, 324 | CPU_CHAR char_srch, 325 | CPU_CHAR char_replace, 326 | CPU_SIZE_T len_max); 327 | 328 | CPU_CHAR *Str_Str (const CPU_CHAR *pstr, 329 | const CPU_CHAR *pstr_srch); 330 | 331 | CPU_CHAR *Str_Str_N (const CPU_CHAR *pstr, 332 | const CPU_CHAR *pstr_srch, 333 | CPU_SIZE_T len_max); 334 | 335 | 336 | /* ------------------ STR FMT FNCTS ------------------ */ 337 | CPU_CHAR *Str_FmtNbr_Int32U ( CPU_INT32U nbr, 338 | CPU_INT08U nbr_dig, 339 | CPU_INT08U nbr_base, 340 | CPU_CHAR lead_char, 341 | CPU_BOOLEAN lower_case, 342 | CPU_BOOLEAN nul, 343 | CPU_CHAR *pstr); 344 | 345 | CPU_CHAR *Str_FmtNbr_Int32S ( CPU_INT32S nbr, 346 | CPU_INT08U nbr_dig, 347 | CPU_INT08U nbr_base, 348 | CPU_CHAR lead_char, 349 | CPU_BOOLEAN lower_case, 350 | CPU_BOOLEAN nul, 351 | CPU_CHAR *pstr); 352 | 353 | #if (LIB_STR_CFG_FP_EN == DEF_ENABLED) 354 | CPU_CHAR *Str_FmtNbr_32 ( CPU_FP32 nbr, 355 | CPU_INT08U nbr_dig, 356 | CPU_INT08U nbr_dp, 357 | CPU_CHAR lead_char, 358 | CPU_BOOLEAN nul, 359 | CPU_CHAR *pstr); 360 | #endif 361 | 362 | 363 | /* ----------------- STR PARSE FNCTS ------------------ */ 364 | CPU_INT32U Str_ParseNbr_Int32U(const CPU_CHAR *pstr, 365 | CPU_CHAR **pstr_next, 366 | CPU_INT08U nbr_base); 367 | 368 | CPU_INT32S Str_ParseNbr_Int32S(const CPU_CHAR *pstr, 369 | CPU_CHAR **pstr_next, 370 | CPU_INT08U nbr_base); 371 | 372 | 373 | /* 374 | ********************************************************************************************************* 375 | * CONFIGURATION ERRORS 376 | ********************************************************************************************************* 377 | */ 378 | 379 | #ifndef LIB_STR_CFG_FP_EN 380 | #error "LIB_STR_CFG_FP_EN not #define'd in 'lib_cfg.h'" 381 | #error " [MUST be DEF_DISABLED] " 382 | #error " [ || DEF_ENABLED ] " 383 | 384 | #elif ((LIB_STR_CFG_FP_EN != DEF_DISABLED) && \ 385 | (LIB_STR_CFG_FP_EN != DEF_ENABLED )) 386 | #error "LIB_STR_CFG_FP_EN illegally #define'd in 'lib_cfg.h'" 387 | #error " [MUST be DEF_DISABLED] " 388 | #error " [ || DEF_ENABLED ] " 389 | 390 | 391 | #elif (LIB_STR_CFG_FP_EN == DEF_ENABLED) 392 | 393 | #ifndef LIB_STR_CFG_FP_MAX_NBR_DIG_SIG 394 | #error "LIB_STR_CFG_FP_MAX_NBR_DIG_SIG not #define'd in 'lib_cfg.h' " 395 | #error " [MUST be >= LIB_STR_FP_MAX_NBR_DIG_SIG_MIN]" 396 | #error " [ && <= LIB_STR_FP_MAX_NBR_DIG_SIG_MAX]" 397 | 398 | #elif (DEF_CHK_VAL(LIB_STR_CFG_FP_MAX_NBR_DIG_SIG, \ 399 | LIB_STR_FP_MAX_NBR_DIG_SIG_MIN, \ 400 | LIB_STR_FP_MAX_NBR_DIG_SIG_MAX) != DEF_OK) 401 | #error "LIB_STR_CFG_FP_MAX_NBR_DIG_SIG illegally #define'd in 'lib_cfg.h' " 402 | #error " [MUST be >= LIB_STR_FP_MAX_NBR_DIG_SIG_MIN]" 403 | #error " [ && <= LIB_STR_FP_MAX_NBR_DIG_SIG_MAX]" 404 | #endif 405 | 406 | #endif 407 | 408 | 409 | /* 410 | ********************************************************************************************************* 411 | * MODULE END 412 | * 413 | * Note(s) : (1) See 'lib_str.h MODULE'. 414 | ********************************************************************************************************* 415 | */ 416 | 417 | #endif /* End of lib str module include. */ 418 | --------------------------------------------------------------------------------