├── .gitignore ├── CCS.zip ├── CCS ├── .gitignore ├── accelDemo │ ├── .ccsproject │ ├── .cproject │ ├── .gitignore │ ├── .project │ ├── .settings │ │ ├── org.eclipse.cdt.codan.core.prefs │ │ ├── org.eclipse.cdt.debug.core.prefs │ │ └── org.eclipse.core.resources.prefs │ ├── catchall.c │ ├── isr-link.asm │ ├── lnk_msp430fr5969.cmd │ ├── main.c │ └── targetConfigs │ │ ├── MSP430FR5969.ccxml │ │ └── readme.txt ├── run-once │ ├── .ccsproject │ ├── .cproject │ ├── .gitignore │ ├── .launches │ │ └── WISPCal_5.0.launch │ ├── .project │ ├── .settings │ │ ├── .svn │ │ │ ├── entries │ │ │ └── text-base │ │ │ │ ├── org.eclipse.cdt.codan.core.prefs.svn-base │ │ │ │ ├── org.eclipse.cdt.debug.core.prefs.svn-base │ │ │ │ └── org.eclipse.core.resources.prefs.svn-base │ │ ├── org.eclipse.cdt.codan.core.prefs │ │ ├── org.eclipse.cdt.debug.core.prefs │ │ └── org.eclipse.core.resources.prefs │ ├── MSP430FR5969.ccxml │ ├── catchall.c │ ├── lnk_msp430fr5969.cmd │ └── main.c ├── simpleADCDemo │ ├── .ccsproject │ ├── .cproject │ ├── .gitignore │ ├── .project │ ├── .settings │ │ ├── org.eclipse.cdt.codan.core.prefs │ │ ├── org.eclipse.cdt.debug.core.prefs │ │ └── org.eclipse.core.resources.prefs │ ├── catchall.c │ ├── isr-link.asm │ ├── lnk_msp430fr5969.cmd │ ├── main.c │ └── targetConfigs │ │ ├── MSP430FR5969.ccxml │ │ └── readme.txt ├── simpleAckDemo │ ├── .ccsproject │ ├── .cproject │ ├── .gitignore │ ├── .project │ ├── .settings │ │ ├── org.eclipse.cdt.codan.core.prefs │ │ ├── org.eclipse.cdt.debug.core.prefs │ │ └── org.eclipse.core.resources.prefs │ ├── catchall.c │ ├── isr-link.asm │ ├── lnk_msp430fr5969.cmd │ ├── main.c │ └── targetConfigs │ │ ├── MSP430FR5969.ccxml │ │ └── readme.txt ├── uartRxTest │ ├── .ccsproject │ ├── .cproject │ ├── .gitignore │ ├── .project │ ├── .settings │ │ ├── org.eclipse.cdt.codan.core.prefs │ │ ├── org.eclipse.cdt.debug.core.prefs │ │ └── org.eclipse.core.resources.prefs │ ├── catchall.c │ ├── isr-link.asm │ ├── lnk_msp430fr5969.cmd │ ├── main.c │ └── targetConfigs │ │ ├── MSP430FR5969.ccxml │ │ └── readme.txt └── wisp-base │ ├── .ccsproject │ ├── .cproject │ ├── .gitignore │ ├── .project │ ├── .settings │ ├── org.eclipse.cdt.codan.core.prefs │ ├── org.eclipse.cdt.core.prefs │ ├── org.eclipse.cdt.debug.core.prefs │ └── org.eclipse.core.resources.prefs │ ├── Makefile │ ├── Math │ ├── crc16.h │ └── crc16_ccitt.asm │ ├── RFID │ ├── Clocking.asm │ ├── RX_ISR.asm │ ├── Timer0A0_ISR.asm │ ├── Timer0A1_ISR.asm │ ├── Timer1A0_ISR.asm │ ├── TxFM0.asm │ ├── WISP_doRFID.asm │ ├── interface.c │ ├── rfid.h │ ├── rfid_BlockWriteHandle.asm │ ├── rfid_Handles.asm │ ├── rfid_ReadHandle.asm │ └── rfid_WriteHandle.asm │ ├── Sensors │ ├── accel.c │ ├── accel.h │ ├── accel_registers.h │ ├── adc.c │ └── adc.h │ ├── Timing │ ├── timer.c │ └── timer.h │ ├── ccs2mspgcc.pl │ ├── config │ ├── mem-map.h │ ├── pin-assign.h │ └── wispGuts.h │ ├── globals.h │ ├── internals │ ├── NOPdefs.asm │ ├── NOPdefs.h │ ├── NOPdefs_CCS.h │ └── wisp-init.c │ ├── nvm │ ├── fram.c │ └── fram.h │ ├── rand │ ├── rand.c │ └── rand.h │ ├── wired │ ├── spi.c │ ├── spi.h │ ├── uart.c │ └── uart.h │ └── wisp-base.h ├── README.md └── license.txt /.gitignore: -------------------------------------------------------------------------------- 1 | *~ # backup/temp files/folders 2 | .dvt/ # TI EnergyTrace folders 3 | -------------------------------------------------------------------------------- /CCS.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/wisp/wisp5/604eee2dffaeba3a270de61cf3dae887a33309c2/CCS.zip -------------------------------------------------------------------------------- /CCS/.gitignore: -------------------------------------------------------------------------------- 1 | .metadata 2 | dvt 3 | RemoteSystemsTempFiles 4 | -------------------------------------------------------------------------------- /CCS/accelDemo/.ccsproject: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | -------------------------------------------------------------------------------- /CCS/accelDemo/.gitignore: -------------------------------------------------------------------------------- 1 | TAGS 2 | Debug 3 | Release 4 | .launches 5 | -------------------------------------------------------------------------------- /CCS/accelDemo/.project: -------------------------------------------------------------------------------- 1 | 2 | 3 | accelDemo 4 | 5 | 6 | wisp-base 7 | 8 | 9 | 10 | org.eclipse.cdt.managedbuilder.core.genmakebuilder 11 | 12 | 13 | 14 | 15 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder 16 | full,incremental, 17 | 18 | 19 | 20 | 21 | 22 | com.ti.ccstudio.core.ccsNature 23 | org.eclipse.cdt.core.cnature 24 | org.eclipse.cdt.managedbuilder.core.managedBuildNature 25 | org.eclipse.cdt.core.ccnature 26 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature 27 | 28 | 29 | -------------------------------------------------------------------------------- /CCS/accelDemo/.settings/org.eclipse.cdt.codan.core.prefs: -------------------------------------------------------------------------------- 1 | eclipse.preferences.version=1 2 | inEditor=false 3 | onBuild=false 4 | -------------------------------------------------------------------------------- /CCS/accelDemo/.settings/org.eclipse.cdt.debug.core.prefs: -------------------------------------------------------------------------------- 1 | eclipse.preferences.version=1 2 | org.eclipse.cdt.debug.core.toggleBreakpointModel=com.ti.ccstudio.debug.CCSBreakpointMarker 3 | -------------------------------------------------------------------------------- /CCS/accelDemo/.settings/org.eclipse.core.resources.prefs: -------------------------------------------------------------------------------- 1 | eclipse.preferences.version=1 2 | encoding//Debug/makefile=UTF-8 3 | encoding//Debug/objects.mk=UTF-8 4 | encoding//Debug/sources.mk=UTF-8 5 | encoding//Debug/subdir_rules.mk=UTF-8 6 | encoding//Debug/subdir_vars.mk=UTF-8 7 | -------------------------------------------------------------------------------- /CCS/accelDemo/catchall.c: -------------------------------------------------------------------------------- 1 | /* 2 | * @file catchall.c 3 | * 4 | * @author Aaron Parks 5 | */ 6 | 7 | 8 | #include 9 | 10 | 11 | /** 12 | * If interrupt vectors are left unassigned and are called, the CPU will reset. 13 | * 14 | * This function catches un-handled interrupts to reduce confusing resets 15 | * during debugging. If your application handles certain interrupts, comment 16 | * them out here to solve linker placement errors. 17 | */ 18 | #pragma vector=AES256_VECTOR // ".int30" 0xFFCC AES256 19 | #pragma vector=RTC_VECTOR // ".int31" 0xFFCE RTC 20 | #pragma vector=PORT4_VECTOR // ".int32" 0xFFD0 Port 4 21 | #pragma vector=PORT3_VECTOR // ".int33" 0xFFD2 Port 3 22 | #pragma vector=TIMER3_A1_VECTOR // ".int34" 0xFFD4 Timer3_A2 CC1, TA 23 | #pragma vector=TIMER3_A0_VECTOR // ".int35" 0xFFD6 Timer3_A2 CC0 24 | //#pragma vector=PORT2_VECTOR // ".int36" 0xFFD8 Port 2 25 | #pragma vector=TIMER2_A1_VECTOR // ".int37" 0xFFDA Timer2_A2 CC1, TA 26 | //#pragma vector=TIMER2_A0_VECTOR // ".int38" 0xFFDC Timer2_A2 CC0 27 | #pragma vector=PORT1_VECTOR // ".int39" 0xFFDE Port 1 28 | #pragma vector=TIMER1_A1_VECTOR // ".int40" 0xFFE0 Timer1_A3 CC1-2, TA 29 | //#pragma vector=TIMER1_A0_VECTOR // ".int41" 0xFFE2 Timer1_A3 CC0 30 | #pragma vector=DMA_VECTOR // ".int42" 0xFFE4 DMA 31 | #pragma vector=USCI_A1_VECTOR // ".int43" 0xFFE6 USCI A1 Receive/Transmit 32 | //#pragma vector=TIMER0_A1_VECTOR // ".int44" 0xFFE8 Timer0_A3 CC1-2, TA 33 | //#pragma vector=TIMER0_A0_VECTOR // ".int45" 0xFFEA Timer0_A3 CC0 34 | #pragma vector=ADC12_VECTOR // ".int46" 0xFFEC ADC 35 | #pragma vector=USCI_B0_VECTOR // ".int47" 0xFFEE USCI B0 Receive/Transmit 36 | #pragma vector=USCI_A0_VECTOR // ".int48" 0xFFF0 USCI A0 Receive/Transmit 37 | #pragma vector=WDT_VECTOR // ".int49" 0xFFF2 Watchdog Timer 38 | #pragma vector=TIMER0_B1_VECTOR // ".int50" 0xFFF4 Timer0_B7 CC1-6, TB 39 | #pragma vector=TIMER0_B0_VECTOR // ".int51" 0xFFF6 Timer0_B7 CC0 40 | #pragma vector=COMP_E_VECTOR // ".int52" 0xFFF8 Comparator E 41 | #pragma vector=UNMI_VECTOR // ".int53" 0xFFFA User Non-maskable 42 | #pragma vector=SYSNMI_VECTOR // ".int54" 0xFFFC System Non-maskable 43 | __interrupt void unRegistered_ISR (void) { 44 | return; 45 | } 46 | -------------------------------------------------------------------------------- /CCS/accelDemo/isr-link.asm: -------------------------------------------------------------------------------- 1 | ; This file assigns ISR vector targets. This must be done in the client 2 | ; application so linker will observe these assignments, otherwise ISRs 3 | ; will not be linked. 4 | 5 | .cdecls C,LIST, "wisp-base.h" 6 | 7 | .sect ".int45" ; Timer0_A0 Vector 8 | .short Timer0A0_ISR ; int53 = Timer0A0_ISR addr. 9 | 10 | .sect ".int44" ; Timer0_A1 Vector 11 | .short Timer0A1_ISR ; int52 = Timer0A1_ISR addr. 12 | 13 | .sect ".int41" ; Timer1_A0 Vector 14 | .short Timer1A0_ISR ; int41 = Timer1A0_ISR addr. 15 | 16 | .sect ".int36" ; Port 2 Vector 17 | .short RX_ISR ; int02 = RX_ISR addr. 18 | -------------------------------------------------------------------------------- /CCS/accelDemo/main.c: -------------------------------------------------------------------------------- 1 | /** 2 | * @file main.c 3 | * 4 | * An example of a WISP application. Takes an accelerometer measurement and 5 | * modulates EPC to transfer the measurement in response to a reader ACK. 6 | * 7 | * @author Aaron Parks, UW Sensor Systems Lab 8 | * 9 | */ 10 | 11 | #include "wisp-base.h" 12 | 13 | // A pointer to the data struct owned by the WISP library which contains EPC 14 | // memory, read and write buffers. 15 | WISP_dataStructInterface_t wispData; 16 | threeAxis_t_8 accelOut; 17 | 18 | uint8_t counter = 5; 19 | 20 | /** 21 | * To be called from within WISP_doRFID() after an ACK reply (EPC) has been sent. 22 | * 23 | */ 24 | void my_ackCallback (void) { 25 | asm(" NOP"); 26 | } 27 | 28 | /** 29 | * To be called by WISP FW after a successful READ response has been sent. 30 | * 31 | */ 32 | void my_readCallback (void) { 33 | asm(" NOP"); 34 | } 35 | 36 | /** 37 | * To be called from within WISP_doRFID() when a successful WRITE has occurred. 38 | * 39 | */ 40 | void my_writeCallback (void) { 41 | asm(" NOP"); 42 | } 43 | 44 | /** 45 | * To be called from within WISP_doRFID() when a successful BLOCKWRITE has occurred. 46 | */ 47 | void my_blockWriteCallback (void) { 48 | asm(" NOP"); 49 | } 50 | 51 | 52 | 53 | /** @fcn void main(void) 54 | * @brief This implements the user application and should never return 55 | * 56 | * Must call WISP_init() in the first line of main() 57 | * Must call WISP_doRFID() at some point to start interacting with a reader 58 | */ 59 | void main(void) { 60 | 61 | WISP_init(); 62 | BITSET(PDIR_ACCEL_EN , PIN_ACCEL_EN); 63 | // Accelerometer power up sequence 64 | BITCLR(POUT_ACCEL_EN , PIN_ACCEL_EN); 65 | CSCTL0_H = 0xA5; 66 | CSCTL1 = DCOFSEL_0; //1MHz 67 | CSCTL2 = SELA__VLOCLK + SELS_3 + SELM_3; 68 | CSCTL3 = DIVA_0 + DIVS_0 + DIVM_0; 69 | BITCLR(CSCTL6 , (MODCLKREQEN|SMCLKREQEN|MCLKREQEN)); 70 | BITSET(CSCTL6 , ACLKREQEN); 71 | 72 | 73 | __delay_cycles(100); 74 | 75 | BITSET(POUT_ACCEL_EN , PIN_ACCEL_EN); 76 | 77 | // Register callback functions with WISP base routines 78 | WISP_registerCallback_ACK(&my_ackCallback); 79 | WISP_registerCallback_READ(&my_readCallback); 80 | WISP_registerCallback_WRITE(&my_writeCallback); 81 | WISP_registerCallback_BLOCKWRITE(&my_blockWriteCallback); 82 | 83 | // Get access to EPC, READ, and WRITE data buffers 84 | WISP_getDataBuffers(&wispData); 85 | 86 | // Set up operating parameters for WISP comm routines 87 | // Set mode: Tag responds to R/W and obeys the sel cmd 88 | WISP_setMode(MODE_READ | MODE_WRITE | MODE_USES_SEL); 89 | 90 | // Set abort conditions: Exits WISP_doRFID() when the following events happen: 91 | WISP_setAbortConditions(CMD_ID_READ | CMD_ID_WRITE | CMD_ID_ACK); 92 | 93 | accelOut.x = 1; 94 | accelOut.y = 1; 95 | accelOut.z = 1; 96 | BITSET(P2SEL1 , PIN_ACCEL_SCLK | PIN_ACCEL_MISO | PIN_ACCEL_MOSI); 97 | BITCLR(P2SEL0 , PIN_ACCEL_SCLK | PIN_ACCEL_MISO | PIN_ACCEL_MOSI); 98 | __delay_cycles(5); 99 | SPI_initialize(); 100 | __delay_cycles(5); 101 | // ACCEL_reset(); 102 | // __delay_cycles(50); 103 | ACCEL_range(); 104 | __delay_cycles(5); 105 | ACCEL_initialize(); 106 | __delay_cycles(5); 107 | 108 | __delay_cycles(5); 109 | 110 | // Set up EPC, copy in sensor data 111 | wispData.epcBuf[0] = 0x0B; // Tag type: Accelerometer 112 | // wispData.epcBuf[1] = 0; // Y value MSB 113 | // wispData.epcBuf[2] = ((uint8_t)accelOut.y);// Y value LSB 114 | // wispData.epcBuf[3] = 0; // X value MSB 115 | // wispData.epcBuf[4] = ((uint8_t)accelOut.x);// X value LSB 116 | // wispData.epcBuf[5] = 0; // Z value MSB 117 | // wispData.epcBuf[6] = ((uint8_t)accelOut.z);// Z value LSB 118 | wispData.epcBuf[7] = 0x00; // Unused data field 119 | wispData.epcBuf[8] = 0x00; // Unused data field 120 | wispData.epcBuf[9] = 0x51; // Tag hardware revision (5.1) 121 | wispData.epcBuf[10] = *((uint8_t*)INFO_WISP_TAGID+1); // WISP ID MSB: Pull from INFO seg 122 | wispData.epcBuf[11] = *((uint8_t*)INFO_WISP_TAGID); // WISP ID LSB: Pull from INFO seg 123 | 124 | ACCEL_singleSample(&accelOut); 125 | 126 | BITSET(TA2CCTL0 , CCIE); 127 | TA2CCR0 = 1000; 128 | BITSET(TA2CTL , (TASSEL_1 | MC_1 | TACLR)); 129 | __bis_SR_register(LPM4_bits | GIE); // Enter LPM4 w/ interrupt 130 | __delay_cycles(1); 131 | BITCLR(TA2CCTL0 , CCIE); 132 | BITCLR(TA2CCR0 , 1000); 133 | BITCLR(TA2CTL , (TASSEL_1 | MC_1 | TACLR)); 134 | ACCEL_readStat(&accelOut); 135 | while((((uint8_t)accelOut.x) & 193) != 0x41){ 136 | ACCEL_readStat(&accelOut); 137 | __delay_cycles(10); 138 | } 139 | 140 | // ACCEL_singleSample(&accelOut); 141 | __delay_cycles(10); 142 | ACCEL_singleSample(&accelOut); 143 | wispData.epcBuf[1] = 0; // Y value MSB 144 | wispData.epcBuf[2] = (accelOut.y+128);// Y value LSB 145 | wispData.epcBuf[3] = 0; // X value MSB 146 | wispData.epcBuf[4] = (accelOut.x+128);// X value LSB 147 | wispData.epcBuf[5] = 0; // Z value MSB 148 | wispData.epcBuf[6] = (accelOut.z+128);// Z value LSB 149 | 150 | while (FOREVER) { 151 | 152 | WISP_doRFID(); 153 | 154 | CSCTL0_H = 0xA5; 155 | CSCTL1 = DCOFSEL_0; //1MHz 156 | CSCTL2 = SELA__VLOCLK + SELS_3 + SELM_3; 157 | CSCTL3 = DIVA_0 + DIVS_0 + DIVM_0; 158 | BITCLR(CSCTL6 , (MODCLKREQEN|SMCLKREQEN|MCLKREQEN)); 159 | BITSET(CSCTL6 , ACLKREQEN); 160 | 161 | ACCEL_readStat(&accelOut); 162 | if((((uint8_t)accelOut.x) & 193) == 0x41){ 163 | __delay_cycles(20); 164 | ACCEL_singleSample(&accelOut); 165 | wispData.epcBuf[1] = 0; // Y value MSB 166 | wispData.epcBuf[2] = (accelOut.y+128);// Y value LSB 167 | wispData.epcBuf[3] = 0; // X value MSB 168 | wispData.epcBuf[4] = (accelOut.x+128);// X value LSB 169 | wispData.epcBuf[5] = 0; // Z value MSB 170 | wispData.epcBuf[6] = (accelOut.z+128);// Z value LSB 171 | } 172 | 173 | BITSET(TA2CCTL0 , CCIE); 174 | TA2CCR0 = 20; 175 | BITSET(TA2CTL , (TASSEL_1 | MC_1 | TACLR)); 176 | __bis_SR_register(LPM4_bits | GIE); // Enter LPM4 w/ interrupt 177 | __delay_cycles(1); 178 | BITCLR(TA2CCTL0 , CCIE); 179 | BITCLR(TA2CTL , (TASSEL_1 | MC_1 | TACLR)); 180 | } 181 | } 182 | 183 | // Timer A2 interrupt service routine 184 | #pragma vector = TIMER2_A0_VECTOR 185 | __interrupt void Timer2_A0_ISR(void) 186 | { 187 | BITCLR(TA2CTL , TAIFG); 188 | __bic_SR_register_on_exit(LPM4_bits|GIE); 189 | } 190 | -------------------------------------------------------------------------------- /CCS/accelDemo/targetConfigs/MSP430FR5969.ccxml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | -------------------------------------------------------------------------------- /CCS/accelDemo/targetConfigs/readme.txt: -------------------------------------------------------------------------------- 1 | The 'targetConfigs' folder contains target-configuration (.ccxml) files, automatically generated based 2 | on the device and connection settings specified in your project on the Properties > General page. 3 | 4 | Please note that in automatic target-configuration management, changes to the project's device and/or 5 | connection settings will either modify an existing or generate a new target-configuration file. Thus, 6 | if you manually edit these auto-generated files, you may need to re-apply your changes. Alternatively, 7 | you may create your own target-configuration file for this project and manage it manually. You can 8 | always switch back to automatic target-configuration management by checking the "Manage the project's 9 | target-configuration automatically" checkbox on the project's Properties > General page. -------------------------------------------------------------------------------- /CCS/run-once/.ccsproject: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | -------------------------------------------------------------------------------- /CCS/run-once/.gitignore: -------------------------------------------------------------------------------- 1 | TAGS 2 | Debug 3 | .launches 4 | -------------------------------------------------------------------------------- /CCS/run-once/.launches/WISPCal_5.0.launch: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | -------------------------------------------------------------------------------- /CCS/run-once/.project: -------------------------------------------------------------------------------- 1 | 2 | 3 | run-once 4 | 5 | 6 | wisp-base 7 | 8 | 9 | 10 | org.eclipse.cdt.managedbuilder.core.genmakebuilder 11 | 12 | 13 | ?name? 14 | 15 | 16 | 17 | org.eclipse.cdt.make.core.append_environment 18 | true 19 | 20 | 21 | org.eclipse.cdt.make.core.autoBuildTarget 22 | all 23 | 24 | 25 | org.eclipse.cdt.make.core.buildArguments 26 | -k 27 | 28 | 29 | org.eclipse.cdt.make.core.buildCommand 30 | ${CCS_UTILS_DIR}/bin/gmake 31 | 32 | 33 | org.eclipse.cdt.make.core.buildLocation 34 | ${BuildDirectory} 35 | 36 | 37 | org.eclipse.cdt.make.core.cleanBuildTarget 38 | clean 39 | 40 | 41 | org.eclipse.cdt.make.core.contents 42 | org.eclipse.cdt.make.core.activeConfigSettings 43 | 44 | 45 | org.eclipse.cdt.make.core.enableAutoBuild 46 | true 47 | 48 | 49 | org.eclipse.cdt.make.core.enableCleanBuild 50 | true 51 | 52 | 53 | org.eclipse.cdt.make.core.enableFullBuild 54 | true 55 | 56 | 57 | org.eclipse.cdt.make.core.fullBuildTarget 58 | all 59 | 60 | 61 | org.eclipse.cdt.make.core.stopOnError 62 | false 63 | 64 | 65 | org.eclipse.cdt.make.core.useDefaultBuildCmd 66 | true 67 | 68 | 69 | 70 | 71 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder 72 | full,incremental, 73 | 74 | 75 | 76 | 77 | 78 | com.ti.ccstudio.core.ccsNature 79 | org.eclipse.cdt.core.cnature 80 | org.eclipse.cdt.managedbuilder.core.managedBuildNature 81 | org.eclipse.cdt.core.ccnature 82 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature 83 | 84 | 85 | -------------------------------------------------------------------------------- /CCS/run-once/.settings/.svn/entries: -------------------------------------------------------------------------------- 1 | 10 2 | 3 | dir 4 | 4 5 | file:///C:/svn/WISP_firmware/trunk/5.0_cal/.settings 6 | file:///C:/svn/WISP_firmware/trunk/5.0_cal 7 | 8 | 9 | 10 | 2012-04-23T05:27:47.155739Z 11 | 4 12 | jmreina 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 37f3cdd3-fdf9-e542-a106-a900758e1ff7 28 | 29 | org.eclipse.core.resources.prefs 30 | file 31 | 6 32 | 33 | 34 | 35 | 2012-05-17T18:49:34.398165Z 36 | 209cf0b2640b562510fc66901b3819ca 37 | 2012-06-15T16:10:44.425450Z 38 | 6 39 | jmreina 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | 54 | 55 | 56 | 57 | 58 | 59 | 60 | 61 | 427 62 | 63 | org.eclipse.cdt.codan.core.prefs 64 | file 65 | 66 | 67 | 68 | 69 | 2012-05-15T16:47:42.400034Z 70 | 1c408cb6b1fb21fcafccc6b3bea3dc36 71 | 2012-04-20T03:52:24.607343Z 72 | 1 73 | jmreina 74 | 75 | 76 | 77 | 78 | 79 | 80 | 81 | 82 | 83 | 84 | 85 | 86 | 87 | 88 | 89 | 90 | 91 | 92 | 93 | 94 | 95 | 93 96 | 97 | org.eclipse.cdt.debug.core.prefs 98 | file 99 | 100 | 101 | 102 | 103 | 2012-05-15T16:47:42.415658Z 104 | 8c8aa9aa45719f3588329b259466d0df 105 | 2012-04-20T03:52:24.607343Z 106 | 1 107 | jmreina 108 | 109 | 110 | 111 | 112 | 113 | 114 | 115 | 116 | 117 | 118 | 119 | 120 | 121 | 122 | 123 | 124 | 125 | 126 | 127 | 128 | 129 | 154 130 | 131 | -------------------------------------------------------------------------------- /CCS/run-once/.settings/.svn/text-base/org.eclipse.cdt.codan.core.prefs.svn-base: -------------------------------------------------------------------------------- 1 | #Thu Apr 19 19:19:38 PDT 2012 2 | eclipse.preferences.version=1 3 | inEditor=false 4 | onBuild=false 5 | -------------------------------------------------------------------------------- /CCS/run-once/.settings/.svn/text-base/org.eclipse.cdt.debug.core.prefs.svn-base: -------------------------------------------------------------------------------- 1 | #Thu Apr 19 19:19:40 PDT 2012 2 | eclipse.preferences.version=1 3 | org.eclipse.cdt.debug.core.toggleBreakpointModel=com.ti.ccstudio.debug.CCSBreakpointMarker 4 | -------------------------------------------------------------------------------- /CCS/run-once/.settings/.svn/text-base/org.eclipse.core.resources.prefs.svn-base: -------------------------------------------------------------------------------- 1 | #Thu May 17 11:49:34 PDT 2012 2 | eclipse.preferences.version=1 3 | encoding//Debug/WISPGuts/subdir_rules.mk=UTF-8 4 | encoding//Debug/WISPGuts/subdir_vars.mk=UTF-8 5 | encoding//Debug/makefile=UTF-8 6 | encoding//Debug/objects.mk=UTF-8 7 | encoding//Debug/periphs/subdir_rules.mk=UTF-8 8 | encoding//Debug/periphs/subdir_vars.mk=UTF-8 9 | encoding//Debug/sources.mk=UTF-8 10 | encoding//Debug/subdir_rules.mk=UTF-8 11 | encoding//Debug/subdir_vars.mk=UTF-8 12 | -------------------------------------------------------------------------------- /CCS/run-once/.settings/org.eclipse.cdt.codan.core.prefs: -------------------------------------------------------------------------------- 1 | #Thu Apr 19 19:19:38 PDT 2012 2 | eclipse.preferences.version=1 3 | inEditor=false 4 | onBuild=false 5 | -------------------------------------------------------------------------------- /CCS/run-once/.settings/org.eclipse.cdt.debug.core.prefs: -------------------------------------------------------------------------------- 1 | #Thu Apr 19 19:19:40 PDT 2012 2 | eclipse.preferences.version=1 3 | org.eclipse.cdt.debug.core.toggleBreakpointModel=com.ti.ccstudio.debug.CCSBreakpointMarker 4 | -------------------------------------------------------------------------------- /CCS/run-once/.settings/org.eclipse.core.resources.prefs: -------------------------------------------------------------------------------- 1 | eclipse.preferences.version=1 2 | encoding//Debug/makefile=UTF-8 3 | encoding//Debug/objects.mk=UTF-8 4 | encoding//Debug/periphs/subdir_rules.mk=UTF-8 5 | encoding//Debug/periphs/subdir_vars.mk=UTF-8 6 | encoding//Debug/sources.mk=UTF-8 7 | encoding//Debug/subdir_rules.mk=UTF-8 8 | encoding//Debug/subdir_vars.mk=UTF-8 9 | -------------------------------------------------------------------------------- /CCS/run-once/MSP430FR5969.ccxml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | -------------------------------------------------------------------------------- /CCS/run-once/catchall.c: -------------------------------------------------------------------------------- 1 | /** 2 | * @file catchall.c 3 | * 4 | * @author Aaron Parks 5 | */ 6 | 7 | 8 | #include 9 | 10 | 11 | /** 12 | * This interrupt handler catches otherwise unhandled interrupts, preventing 13 | * a system reset. 14 | * 15 | * Your application may collide with some of these ISRs. Comment out 16 | * those which you are using elsewhere, and uncomment those which are not used 17 | * elsewhere 18 | */ 19 | #pragma vector=AES256_VECTOR // ".int30" 0xFFCC AES256 20 | #pragma vector=RTC_VECTOR // ".int31" 0xFFCE RTC 21 | #pragma vector=PORT4_VECTOR // ".int32" 0xFFD0 Port 4 22 | #pragma vector=PORT3_VECTOR // ".int33" 0xFFD2 Port 3 23 | #pragma vector=TIMER3_A1_VECTOR // ".int34" 0xFFD4 Timer3_A2 CC1, TA 24 | #pragma vector=TIMER3_A0_VECTOR // ".int35" 0xFFD6 Timer3_A2 CC0 25 | #pragma vector=PORT2_VECTOR // ".int36" 0xFFD8 Port 2 26 | #pragma vector=TIMER2_A1_VECTOR // ".int37" 0xFFDA Timer2_A2 CC1, TA 27 | //#pragma vector=TIMER2_A0_VECTOR // ".int38" 0xFFDC Timer2_A2 CC0 28 | #pragma vector=PORT1_VECTOR // ".int39" 0xFFDE Port 1 29 | #pragma vector=TIMER1_A1_VECTOR // ".int40" 0xFFE0 Timer1_A3 CC1-2, TA 30 | #pragma vector=TIMER1_A0_VECTOR // ".int41" 0xFFE2 Timer1_A3 CC0 31 | #pragma vector=DMA_VECTOR // ".int42" 0xFFE4 DMA 32 | #pragma vector=USCI_A1_VECTOR // ".int43" 0xFFE6 USCI A1 Receive/Transmit 33 | #pragma vector=TIMER0_A1_VECTOR // ".int44" 0xFFE8 Timer0_A3 CC1-2, TA 34 | #pragma vector=TIMER0_A0_VECTOR // ".int45" 0xFFEA Timer0_A3 CC0 35 | #pragma vector=ADC12_VECTOR // ".int46" 0xFFEC ADC 36 | #pragma vector=USCI_B0_VECTOR // ".int47" 0xFFEE USCI B0 Receive/Transmit 37 | #pragma vector=USCI_A0_VECTOR // ".int48" 0xFFF0 USCI A0 Receive/Transmit 38 | #pragma vector=WDT_VECTOR // ".int49" 0xFFF2 Watchdog Timer 39 | #pragma vector=TIMER0_B1_VECTOR // ".int50" 0xFFF4 Timer0_B7 CC1-6, TB 40 | #pragma vector=TIMER0_B0_VECTOR // ".int51" 0xFFF6 Timer0_B7 CC0 41 | #pragma vector=COMP_E_VECTOR // ".int52" 0xFFF8 Comparator E 42 | #pragma vector=UNMI_VECTOR // ".int53" 0xFFFA User Non-maskable 43 | #pragma vector=SYSNMI_VECTOR // ".int54" 0xFFFC System Non-maskable 44 | __interrupt void unRegistered_ISR (void) { 45 | return; 46 | } 47 | -------------------------------------------------------------------------------- /CCS/run-once/main.c: -------------------------------------------------------------------------------- 1 | 2 | /** @file main.c 3 | * @brief Run this routine once for each new WISP. Generates and stores 4 | * a table of random values to use in quickly producing RN16, and 5 | * also generates a unique ID for each WISP. 6 | * 7 | * @author Aaron Parks, Justin Reina, Sensor Systems Lab, University of Washington 8 | */ 9 | 10 | #include "wisp-base.h" 11 | 12 | 13 | /** 14 | * Generate a number of random 16 bit integers 15 | * @param RN16Vals pointer to buffer for random output vals 16 | * @param len number of 16 bit words to generate 17 | */ 18 | uint8_t genRN16Vals(uint16_t* RN16Vals, int len){ 19 | uint8_t i; 20 | 21 | for(i=0; i 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | -------------------------------------------------------------------------------- /CCS/simpleADCDemo/.gitignore: -------------------------------------------------------------------------------- 1 | TAGS 2 | Debug 3 | Release 4 | .launches 5 | -------------------------------------------------------------------------------- /CCS/simpleADCDemo/.project: -------------------------------------------------------------------------------- 1 | 2 | 3 | simpleADCDemo 4 | 5 | 6 | wisp-base 7 | 8 | 9 | 10 | org.eclipse.cdt.managedbuilder.core.genmakebuilder 11 | 12 | 13 | 14 | 15 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder 16 | full,incremental, 17 | 18 | 19 | 20 | 21 | 22 | com.ti.ccstudio.core.ccsNature 23 | org.eclipse.cdt.core.cnature 24 | org.eclipse.cdt.managedbuilder.core.managedBuildNature 25 | org.eclipse.cdt.core.ccnature 26 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature 27 | 28 | 29 | -------------------------------------------------------------------------------- /CCS/simpleADCDemo/.settings/org.eclipse.cdt.codan.core.prefs: -------------------------------------------------------------------------------- 1 | eclipse.preferences.version=1 2 | inEditor=false 3 | onBuild=false 4 | -------------------------------------------------------------------------------- /CCS/simpleADCDemo/.settings/org.eclipse.cdt.debug.core.prefs: -------------------------------------------------------------------------------- 1 | eclipse.preferences.version=1 2 | org.eclipse.cdt.debug.core.toggleBreakpointModel=com.ti.ccstudio.debug.CCSBreakpointMarker 3 | -------------------------------------------------------------------------------- /CCS/simpleADCDemo/.settings/org.eclipse.core.resources.prefs: -------------------------------------------------------------------------------- 1 | eclipse.preferences.version=1 2 | encoding//Debug/makefile=UTF-8 3 | encoding//Debug/objects.mk=UTF-8 4 | encoding//Debug/sources.mk=UTF-8 5 | encoding//Debug/subdir_rules.mk=UTF-8 6 | encoding//Debug/subdir_vars.mk=UTF-8 7 | -------------------------------------------------------------------------------- /CCS/simpleADCDemo/catchall.c: -------------------------------------------------------------------------------- 1 | /* 2 | * @file catchall.c 3 | * 4 | * @author Aaron Parks 5 | */ 6 | 7 | 8 | #include 9 | 10 | 11 | /** 12 | * If interrupt vectors are left unassigned and are called, the CPU will reset. 13 | * 14 | * This function catches un-handled interrupts to reduce confusing resets 15 | * during debugging. If your application handles certain interrupts, comment 16 | * them out here to solve linker placement errors. 17 | */ 18 | #pragma vector=AES256_VECTOR // ".int30" 0xFFCC AES256 19 | #pragma vector=RTC_VECTOR // ".int31" 0xFFCE RTC 20 | #pragma vector=PORT4_VECTOR // ".int32" 0xFFD0 Port 4 21 | #pragma vector=PORT3_VECTOR // ".int33" 0xFFD2 Port 3 22 | #pragma vector=TIMER3_A1_VECTOR // ".int34" 0xFFD4 Timer3_A2 CC1, TA 23 | #pragma vector=TIMER3_A0_VECTOR // ".int35" 0xFFD6 Timer3_A2 CC0 24 | //#pragma vector=PORT2_VECTOR // ".int36" 0xFFD8 Port 2 25 | #pragma vector=TIMER2_A1_VECTOR // ".int37" 0xFFDA Timer2_A2 CC1, TA 26 | #pragma vector=TIMER2_A0_VECTOR // ".int38" 0xFFDC Timer2_A2 CC0 27 | #pragma vector=PORT1_VECTOR // ".int39" 0xFFDE Port 1 28 | #pragma vector=TIMER1_A1_VECTOR // ".int40" 0xFFE0 Timer1_A3 CC1-2, TA 29 | #pragma vector=TIMER1_A0_VECTOR // ".int41" 0xFFE2 Timer1_A3 CC0 30 | #pragma vector=DMA_VECTOR // ".int42" 0xFFE4 DMA 31 | #pragma vector=USCI_A1_VECTOR // ".int43" 0xFFE6 USCI A1 Receive/Transmit 32 | //#pragma vector=TIMER0_A1_VECTOR // ".int44" 0xFFE8 Timer0_A3 CC1-2, TA 33 | //#pragma vector=TIMER0_A0_VECTOR // ".int45" 0xFFEA Timer0_A3 CC0 34 | //#pragma vector=ADC12_VECTOR // ".int46" 0xFFEC ADC 35 | #pragma vector=USCI_B0_VECTOR // ".int47" 0xFFEE USCI B0 Receive/Transmit 36 | #pragma vector=USCI_A0_VECTOR // ".int48" 0xFFF0 USCI A0 Receive/Transmit 37 | #pragma vector=WDT_VECTOR // ".int49" 0xFFF2 Watchdog Timer 38 | #pragma vector=TIMER0_B1_VECTOR // ".int50" 0xFFF4 Timer0_B7 CC1-6, TB 39 | #pragma vector=TIMER0_B0_VECTOR // ".int51" 0xFFF6 Timer0_B7 CC0 40 | #pragma vector=COMP_E_VECTOR // ".int52" 0xFFF8 Comparator E 41 | #pragma vector=UNMI_VECTOR // ".int53" 0xFFFA User Non-maskable 42 | #pragma vector=SYSNMI_VECTOR // ".int54" 0xFFFC System Non-maskable 43 | __interrupt void unRegistered_ISR (void) { 44 | return; 45 | } 46 | -------------------------------------------------------------------------------- /CCS/simpleADCDemo/isr-link.asm: -------------------------------------------------------------------------------- 1 | ; This file assigns ISR vector targets. This must be done in the client 2 | ; application so linker will observe these assignments, otherwise ISRs 3 | ; will not be linked. 4 | 5 | .cdecls C,LIST, "wisp-base.h" 6 | 7 | .sect ".int45" ; Timer0_A0 Vector 8 | .short Timer0A0_ISR ; int53 = Timer0A0_ISR addr. 9 | 10 | .sect ".int44" ; Timer0_A1 Vector 11 | .short Timer0A1_ISR ; int52 = Timer0A1_ISR addr. 12 | 13 | .sect ".int36" ; Port 2 Vector 14 | .short RX_ISR ; int02 = RX_ISR addr. 15 | -------------------------------------------------------------------------------- /CCS/simpleADCDemo/main.c: -------------------------------------------------------------------------------- 1 | /** 2 | * @file main.c 3 | * @brief WISP application-specific code set 4 | * @details The WISP application developer's implementation goes here. 5 | * 6 | * @author Aaron Parks, UW Sensor Systems Lab 7 | * @author Ivar in 't Veen, TU Delft Embedded Software Group 8 | * 9 | */ 10 | 11 | #include "wisp-base.h" 12 | 13 | WISP_dataStructInterface_t wispData; 14 | 15 | /** 16 | * This function is called by WISP FW after a successful ACK reply 17 | * 18 | */ 19 | void my_ackCallback(void) { 20 | asm(" NOP"); 21 | } 22 | 23 | /** 24 | * This function is called by WISP FW after a successful read command 25 | * reception 26 | * 27 | */ 28 | void my_readCallback(void) { 29 | asm(" NOP"); 30 | } 31 | 32 | /** 33 | * This function is called by WISP FW after a successful write command 34 | * reception 35 | * 36 | */ 37 | void my_writeCallback(void) { 38 | asm(" NOP"); 39 | } 40 | 41 | /** 42 | * This function is called by WISP FW after a successful BlockWrite 43 | * command decode 44 | 45 | */ 46 | void my_blockWriteCallback(void) { 47 | asm(" NOP"); 48 | } 49 | 50 | /** 51 | * This implements the user application and should never return 52 | * 53 | * Must call WISP_init() in the first line of main() 54 | * Must call WISP_doRFID() at some point to start interacting with a reader 55 | */ 56 | void main(void) { 57 | 58 | WISP_init(); 59 | 60 | // Register callback functions with WISP comm routines 61 | WISP_registerCallback_ACK(&my_ackCallback); 62 | WISP_registerCallback_READ(&my_readCallback); 63 | WISP_registerCallback_WRITE(&my_writeCallback); 64 | WISP_registerCallback_BLOCKWRITE(&my_blockWriteCallback); 65 | BITSET(PMEAS_ENDIR, PIN_MEAS_EN); // SET direction of MEAS_EN pin to output! 66 | 67 | // Get access to EPC, READ, and WRITE data buffers 68 | WISP_getDataBuffers(&wispData); 69 | 70 | // Set up operating parameters for WISP comm routines 71 | WISP_setMode( MODE_READ | MODE_WRITE | MODE_USES_SEL); 72 | WISP_setAbortConditions(CMD_ID_READ | CMD_ID_WRITE /*| CMD_ID_ACK*/); 73 | 74 | // Set up EPC 75 | wispData.epcBuf[0] = 0x00; // Tag type 76 | wispData.epcBuf[1] = 0; // HIGH ADC value field 77 | wispData.epcBuf[2] = 0; // LOW ADC value field 78 | wispData.epcBuf[3] = 0; // Unused data field 79 | wispData.epcBuf[4] = 0; // Unused data field 80 | wispData.epcBuf[5] = 0; // Unused data field 81 | wispData.epcBuf[6] = 0; // Unused data field 82 | wispData.epcBuf[7] = 0x00; // Unused data field 83 | wispData.epcBuf[8] = 0x00; // Unused data field 84 | wispData.epcBuf[9] = 0x51; // Tag hardware revision (5.1) 85 | wispData.epcBuf[10] = *((uint8_t*) INFO_WISP_TAGID + 1); // WISP ID MSB: Pull from INFO seg 86 | wispData.epcBuf[11] = *((uint8_t*) INFO_WISP_TAGID); // WISP ID LSB: Pull from INFO seg 87 | 88 | #define UseTemperatureSensor 89 | 90 | #ifndef UseTemperatureSensor 91 | ADC_init(); 92 | BITSET(PMEAS_ENDIR, PIN_MEAS_EN); // SET direction of MEAS_EN pin to output 93 | #else 94 | ADC_initCustom(ADC_reference_2_0V, ADC_precision_10bit, 95 | ADC_input_temperature); 96 | #endif 97 | 98 | // Talk to the RFID reader. 99 | while (FOREVER) { 100 | 101 | #ifndef UseTemperatureSensor 102 | BITSET(PMEAS_ENOUT, PIN_MEAS_EN); 103 | uint16_t adc_value = ADC_read(); 104 | int16_t adc_voltage = ADC_rawToVoltage(adc_value); 105 | BITCLR(PMEAS_ENOUT, PIN_MEAS_EN); 106 | 107 | wispData.epcBuf[1] = (adc_voltage >> 8) & 0xFF; 108 | wispData.epcBuf[2] = (adc_voltage >> 0) & 0xFF; 109 | #else 110 | uint16_t adc_value = ADC_read(); 111 | int16_t adc_temperature = ADC_rawToTemperature(adc_value); 112 | 113 | wispData.epcBuf[1] = (adc_temperature >> 8) & 0xFF; 114 | wispData.epcBuf[2] = (adc_temperature >> 0) & 0xFF; 115 | #endif 116 | 117 | WISP_doRFID(); 118 | } 119 | } 120 | -------------------------------------------------------------------------------- /CCS/simpleADCDemo/targetConfigs/MSP430FR5969.ccxml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | -------------------------------------------------------------------------------- /CCS/simpleADCDemo/targetConfigs/readme.txt: -------------------------------------------------------------------------------- 1 | The 'targetConfigs' folder contains target-configuration (.ccxml) files, automatically generated based 2 | on the device and connection settings specified in your project on the Properties > General page. 3 | 4 | Please note that in automatic target-configuration management, changes to the project's device and/or 5 | connection settings will either modify an existing or generate a new target-configuration file. Thus, 6 | if you manually edit these auto-generated files, you may need to re-apply your changes. Alternatively, 7 | you may create your own target-configuration file for this project and manage it manually. You can 8 | always switch back to automatic target-configuration management by checking the "Manage the project's 9 | target-configuration automatically" checkbox on the project's Properties > General page. -------------------------------------------------------------------------------- /CCS/simpleAckDemo/.ccsproject: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | -------------------------------------------------------------------------------- /CCS/simpleAckDemo/.gitignore: -------------------------------------------------------------------------------- 1 | TAGS 2 | Debug 3 | Release 4 | .launches 5 | -------------------------------------------------------------------------------- /CCS/simpleAckDemo/.project: -------------------------------------------------------------------------------- 1 | 2 | 3 | simpleAckDemo 4 | 5 | 6 | wisp-base 7 | 8 | 9 | 10 | org.eclipse.cdt.managedbuilder.core.genmakebuilder 11 | 12 | 13 | 14 | 15 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder 16 | full,incremental, 17 | 18 | 19 | 20 | 21 | 22 | com.ti.ccstudio.core.ccsNature 23 | org.eclipse.cdt.core.cnature 24 | org.eclipse.cdt.managedbuilder.core.managedBuildNature 25 | org.eclipse.cdt.core.ccnature 26 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature 27 | 28 | 29 | -------------------------------------------------------------------------------- /CCS/simpleAckDemo/.settings/org.eclipse.cdt.codan.core.prefs: -------------------------------------------------------------------------------- 1 | eclipse.preferences.version=1 2 | inEditor=false 3 | onBuild=false 4 | -------------------------------------------------------------------------------- /CCS/simpleAckDemo/.settings/org.eclipse.cdt.debug.core.prefs: -------------------------------------------------------------------------------- 1 | eclipse.preferences.version=1 2 | org.eclipse.cdt.debug.core.toggleBreakpointModel=com.ti.ccstudio.debug.CCSBreakpointMarker 3 | -------------------------------------------------------------------------------- /CCS/simpleAckDemo/.settings/org.eclipse.core.resources.prefs: -------------------------------------------------------------------------------- 1 | eclipse.preferences.version=1 2 | encoding//Debug/makefile=UTF-8 3 | encoding//Debug/objects.mk=UTF-8 4 | encoding//Debug/sources.mk=UTF-8 5 | encoding//Debug/subdir_rules.mk=UTF-8 6 | encoding//Debug/subdir_vars.mk=UTF-8 7 | -------------------------------------------------------------------------------- /CCS/simpleAckDemo/catchall.c: -------------------------------------------------------------------------------- 1 | /* 2 | * @file catchall.c 3 | * 4 | * @author Aaron Parks 5 | */ 6 | 7 | 8 | #include 9 | 10 | 11 | /** 12 | * If interrupt vectors are left unassigned and are called, the CPU will reset. 13 | * 14 | * This function catches un-handled interrupts to reduce confusing resets 15 | * during debugging. If your application handles certain interrupts, comment 16 | * them out here to solve linker placement errors. 17 | */ 18 | #pragma vector=AES256_VECTOR // ".int30" 0xFFCC AES256 19 | #pragma vector=RTC_VECTOR // ".int31" 0xFFCE RTC 20 | #pragma vector=PORT4_VECTOR // ".int32" 0xFFD0 Port 4 21 | #pragma vector=PORT3_VECTOR // ".int33" 0xFFD2 Port 3 22 | #pragma vector=TIMER3_A1_VECTOR // ".int34" 0xFFD4 Timer3_A2 CC1, TA 23 | #pragma vector=TIMER3_A0_VECTOR // ".int35" 0xFFD6 Timer3_A2 CC0 24 | //#pragma vector=PORT2_VECTOR // ".int36" 0xFFD8 Port 2 25 | #pragma vector=TIMER2_A1_VECTOR // ".int37" 0xFFDA Timer2_A2 CC1, TA 26 | #pragma vector=TIMER2_A0_VECTOR // ".int38" 0xFFDC Timer2_A2 CC0 27 | #pragma vector=PORT1_VECTOR // ".int39" 0xFFDE Port 1 28 | #pragma vector=TIMER1_A1_VECTOR // ".int40" 0xFFE0 Timer1_A3 CC1-2, TA 29 | //#pragma vector=TIMER1_A0_VECTOR // ".int41" 0xFFE2 Timer1_A3 CC0 30 | #pragma vector=DMA_VECTOR // ".int42" 0xFFE4 DMA 31 | #pragma vector=USCI_A1_VECTOR // ".int43" 0xFFE6 USCI A1 Receive/Transmit 32 | //#pragma vector=TIMER0_A1_VECTOR // ".int44" 0xFFE8 Timer0_A3 CC1-2, TA 33 | //#pragma vector=TIMER0_A0_VECTOR // ".int45" 0xFFEA Timer0_A3 CC0 34 | #pragma vector=ADC12_VECTOR // ".int46" 0xFFEC ADC 35 | #pragma vector=USCI_B0_VECTOR // ".int47" 0xFFEE USCI B0 Receive/Transmit 36 | #pragma vector=USCI_A0_VECTOR // ".int48" 0xFFF0 USCI A0 Receive/Transmit 37 | #pragma vector=WDT_VECTOR // ".int49" 0xFFF2 Watchdog Timer 38 | #pragma vector=TIMER0_B1_VECTOR // ".int50" 0xFFF4 Timer0_B7 CC1-6, TB 39 | #pragma vector=TIMER0_B0_VECTOR // ".int51" 0xFFF6 Timer0_B7 CC0 40 | #pragma vector=COMP_E_VECTOR // ".int52" 0xFFF8 Comparator E 41 | #pragma vector=UNMI_VECTOR // ".int53" 0xFFFA User Non-maskable 42 | #pragma vector=SYSNMI_VECTOR // ".int54" 0xFFFC System Non-maskable 43 | __interrupt void unRegistered_ISR (void) { 44 | return; 45 | } 46 | -------------------------------------------------------------------------------- /CCS/simpleAckDemo/isr-link.asm: -------------------------------------------------------------------------------- 1 | ; This file assigns ISR vector targets. This must be done in the client 2 | ; application so linker will observe these assignments, otherwise ISRs 3 | ; will not be linked. 4 | 5 | .cdecls C,LIST, "wisp-base.h" 6 | 7 | .sect ".int45" ; Timer0_A0 Vector 8 | .short Timer0A0_ISR ; int53 = Timer0A0_ISR addr. 9 | 10 | .sect ".int44" ; Timer0_A1 Vector 11 | .short Timer0A1_ISR ; int52 = Timer0A1_ISR addr. 12 | 13 | .sect ".int41" ; Timer1_A0 Vector 14 | .short Timer1A0_ISR ; int41 = Timer1A0_ISR addr. 15 | 16 | .sect ".int36" ; Port 2 Vector 17 | .short RX_ISR ; int02 = RX_ISR addr. 18 | -------------------------------------------------------------------------------- /CCS/simpleAckDemo/main.c: -------------------------------------------------------------------------------- 1 | /** 2 | * @file usr.c 3 | * @brief WISP application-specific code set 4 | * @details The WISP application developer's implementation goes here. 5 | * 6 | * @author Aaron Parks, UW Sensor Systems Lab 7 | * 8 | */ 9 | 10 | #include "wisp-base.h" 11 | 12 | WISP_dataStructInterface_t wispData; 13 | 14 | /** 15 | * This function is called by WISP FW after a successful ACK reply 16 | * 17 | */ 18 | void my_ackCallback (void) { 19 | asm(" NOP"); 20 | } 21 | 22 | /** 23 | * This function is called by WISP FW after a successful read command 24 | * reception 25 | * 26 | */ 27 | void my_readCallback (void) { 28 | asm(" NOP"); 29 | } 30 | 31 | /** 32 | * This function is called by WISP FW after a successful write command 33 | * reception 34 | * 35 | */ 36 | void my_writeCallback (void) { 37 | asm(" NOP"); 38 | } 39 | 40 | /** 41 | * This function is called by WISP FW after a successful BlockWrite 42 | * command decode 43 | 44 | */ 45 | void my_blockWriteCallback (void) { 46 | asm(" NOP"); 47 | } 48 | 49 | 50 | /** 51 | * This implements the user application and should never return 52 | * 53 | * Must call WISP_init() in the first line of main() 54 | * Must call WISP_doRFID() at some point to start interacting with a reader 55 | */ 56 | void main(void) { 57 | 58 | WISP_init(); 59 | 60 | // Register callback functions with WISP comm routines 61 | WISP_registerCallback_ACK(&my_ackCallback); 62 | WISP_registerCallback_READ(&my_readCallback); 63 | WISP_registerCallback_WRITE(&my_writeCallback); 64 | WISP_registerCallback_BLOCKWRITE(&my_blockWriteCallback); 65 | 66 | // Initialize BlockWrite data buffer. 67 | uint16_t bwr_array[6] = {0}; 68 | RWData.bwrBufPtr = bwr_array; 69 | 70 | // Get access to EPC, READ, and WRITE data buffers 71 | WISP_getDataBuffers(&wispData); 72 | 73 | // Set up operating parameters for WISP comm routines 74 | WISP_setMode( MODE_READ | MODE_WRITE | MODE_USES_SEL); 75 | WISP_setAbortConditions(CMD_ID_READ | CMD_ID_WRITE | CMD_ID_ACK); 76 | 77 | // Set up EPC 78 | wispData.epcBuf[0] = 0x0B; // Tag type 79 | wispData.epcBuf[1] = 0; // Unused data field 80 | wispData.epcBuf[2] = 0; // Unused data field 81 | wispData.epcBuf[3] = 0; // Unused data field 82 | wispData.epcBuf[4] = 0; // Unused data field 83 | wispData.epcBuf[5] = 0; // Unused data field 84 | wispData.epcBuf[6] = 0; // Unused data field 85 | wispData.epcBuf[7] = 0x00; // Unused data field 86 | wispData.epcBuf[8] = 0x00; // Unused data field 87 | wispData.epcBuf[9] = 0x51; // Tag hardware revision (5.1) 88 | wispData.epcBuf[10] = *((uint8_t*)INFO_WISP_TAGID+1); // WISP ID MSB: Pull from INFO seg 89 | wispData.epcBuf[11] = *((uint8_t*)INFO_WISP_TAGID); // WISP ID LSB: Pull from INFO seg 90 | 91 | // Talk to the RFID reader. 92 | while (FOREVER) { 93 | WISP_doRFID(); 94 | } 95 | } 96 | -------------------------------------------------------------------------------- /CCS/simpleAckDemo/targetConfigs/MSP430FR5969.ccxml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | -------------------------------------------------------------------------------- /CCS/simpleAckDemo/targetConfigs/readme.txt: -------------------------------------------------------------------------------- 1 | The 'targetConfigs' folder contains target-configuration (.ccxml) files, automatically generated based 2 | on the device and connection settings specified in your project on the Properties > General page. 3 | 4 | Please note that in automatic target-configuration management, changes to the project's device and/or 5 | connection settings will either modify an existing or generate a new target-configuration file. Thus, 6 | if you manually edit these auto-generated files, you may need to re-apply your changes. Alternatively, 7 | you may create your own target-configuration file for this project and manage it manually. You can 8 | always switch back to automatic target-configuration management by checking the "Manage the project's 9 | target-configuration automatically" checkbox on the project's Properties > General page. -------------------------------------------------------------------------------- /CCS/uartRxTest/.ccsproject: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | -------------------------------------------------------------------------------- /CCS/uartRxTest/.gitignore: -------------------------------------------------------------------------------- 1 | TAGS 2 | Debug 3 | Release 4 | .launches 5 | -------------------------------------------------------------------------------- /CCS/uartRxTest/.project: -------------------------------------------------------------------------------- 1 | 2 | 3 | uartRxTest 4 | 5 | 6 | wisp-base 7 | 8 | 9 | 10 | org.eclipse.cdt.managedbuilder.core.genmakebuilder 11 | 12 | 13 | 14 | 15 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder 16 | full,incremental, 17 | 18 | 19 | 20 | 21 | 22 | com.ti.ccstudio.core.ccsNature 23 | org.eclipse.cdt.core.cnature 24 | org.eclipse.cdt.managedbuilder.core.managedBuildNature 25 | org.eclipse.cdt.core.ccnature 26 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature 27 | 28 | 29 | -------------------------------------------------------------------------------- /CCS/uartRxTest/.settings/org.eclipse.cdt.codan.core.prefs: -------------------------------------------------------------------------------- 1 | eclipse.preferences.version=1 2 | inEditor=false 3 | onBuild=false 4 | -------------------------------------------------------------------------------- /CCS/uartRxTest/.settings/org.eclipse.cdt.debug.core.prefs: -------------------------------------------------------------------------------- 1 | eclipse.preferences.version=1 2 | org.eclipse.cdt.debug.core.toggleBreakpointModel=com.ti.ccstudio.debug.CCSBreakpointMarker 3 | -------------------------------------------------------------------------------- /CCS/uartRxTest/.settings/org.eclipse.core.resources.prefs: -------------------------------------------------------------------------------- 1 | eclipse.preferences.version=1 2 | encoding//Debug/makefile=UTF-8 3 | encoding//Debug/objects.mk=UTF-8 4 | encoding//Debug/sources.mk=UTF-8 5 | encoding//Debug/subdir_rules.mk=UTF-8 6 | encoding//Debug/subdir_vars.mk=UTF-8 7 | -------------------------------------------------------------------------------- /CCS/uartRxTest/catchall.c: -------------------------------------------------------------------------------- 1 | /* 2 | * @file catchall.c 3 | * 4 | * @author Aaron Parks 5 | */ 6 | 7 | 8 | #include 9 | 10 | 11 | /** 12 | * If interrupt vectors are left unassigned and are called, the CPU will reset. 13 | * 14 | * This function catches un-handled interrupts to reduce confusing resets 15 | * during debugging. If your application handles certain interrupts, comment 16 | * them out here to solve linker placement errors. 17 | */ 18 | #pragma vector=AES256_VECTOR // ".int30" 0xFFCC AES256 19 | #pragma vector=RTC_VECTOR // ".int31" 0xFFCE RTC 20 | #pragma vector=PORT4_VECTOR // ".int32" 0xFFD0 Port 4 21 | #pragma vector=PORT3_VECTOR // ".int33" 0xFFD2 Port 3 22 | #pragma vector=TIMER3_A1_VECTOR // ".int34" 0xFFD4 Timer3_A2 CC1, TA 23 | #pragma vector=TIMER3_A0_VECTOR // ".int35" 0xFFD6 Timer3_A2 CC0 24 | //#pragma vector=PORT2_VECTOR // ".int36" 0xFFD8 Port 2 25 | #pragma vector=TIMER2_A1_VECTOR // ".int37" 0xFFDA Timer2_A2 CC1, TA 26 | //#pragma vector=TIMER2_A0_VECTOR // ".int38" 0xFFDC Timer2_A2 CC0 27 | #pragma vector=PORT1_VECTOR // ".int39" 0xFFDE Port 1 28 | #pragma vector=TIMER1_A1_VECTOR // ".int40" 0xFFE0 Timer1_A3 CC1-2, TA 29 | //#pragma vector=TIMER1_A0_VECTOR // ".int41" 0xFFE2 Timer1_A3 CC0 30 | #pragma vector=DMA_VECTOR // ".int42" 0xFFE4 DMA 31 | #pragma vector=USCI_A1_VECTOR // ".int43" 0xFFE6 USCI A1 Receive/Transmit 32 | //#pragma vector=TIMER0_A1_VECTOR // ".int44" 0xFFE8 Timer0_A3 CC1-2, TA 33 | //#pragma vector=TIMER0_A0_VECTOR // ".int45" 0xFFEA Timer0_A3 CC0 34 | #pragma vector=ADC12_VECTOR // ".int46" 0xFFEC ADC 35 | #pragma vector=USCI_B0_VECTOR // ".int47" 0xFFEE USCI B0 Receive/Transmit 36 | //#pragma vector=USCI_A0_VECTOR // ".int48" 0xFFF0 USCI A0 Receive/Transmit 37 | #pragma vector=WDT_VECTOR // ".int49" 0xFFF2 Watchdog Timer 38 | #pragma vector=TIMER0_B1_VECTOR // ".int50" 0xFFF4 Timer0_B7 CC1-6, TB 39 | #pragma vector=TIMER0_B0_VECTOR // ".int51" 0xFFF6 Timer0_B7 CC0 40 | #pragma vector=COMP_E_VECTOR // ".int52" 0xFFF8 Comparator E 41 | #pragma vector=UNMI_VECTOR // ".int53" 0xFFFA User Non-maskable 42 | #pragma vector=SYSNMI_VECTOR // ".int54" 0xFFFC System Non-maskable 43 | __interrupt void unRegistered_ISR (void) { 44 | return; 45 | } 46 | -------------------------------------------------------------------------------- /CCS/uartRxTest/isr-link.asm: -------------------------------------------------------------------------------- 1 | ; This file assigns ISR vector targets. This must be done in the client 2 | ; application so linker will observe these assignments, otherwise ISRs 3 | ; will not be linked. 4 | 5 | .cdecls C,LIST, "wisp-base.h" 6 | 7 | .sect ".int45" ; Timer0_A0 Vector 8 | .short Timer0A0_ISR ; int53 = Timer0A0_ISR addr. 9 | 10 | .sect ".int44" ; Timer0_A1 Vector 11 | .short Timer0A1_ISR ; int52 = Timer0A1_ISR addr. 12 | 13 | .sect ".int41" ; Timer1_A0 Vector 14 | .short Timer1A0_ISR ; int41 = Timer1A0_ISR addr. 15 | 16 | .sect ".int36" ; Port 2 Vector 17 | .short RX_ISR ; int02 = RX_ISR addr. 18 | -------------------------------------------------------------------------------- /CCS/uartRxTest/main.c: -------------------------------------------------------------------------------- 1 | /** 2 | * @file usr.c 3 | * @brief WISP application-specific code set 4 | * @details The WISP application developer's implementation goes here. 5 | * 6 | * @author Aaron Parks, UW Sensor Systems Lab 7 | * @author Ivar in 't Veen, TUD Embedded Software Group 8 | * 9 | */ 10 | 11 | #include "wisp-base.h" 12 | 13 | WISP_dataStructInterface_t wispData; 14 | 15 | /** 16 | * This function is called by WISP FW after a successful ACK reply 17 | * 18 | */ 19 | void my_ackCallback (void) { 20 | asm(" NOP"); 21 | } 22 | 23 | /** 24 | * This function is called by WISP FW after a successful read command 25 | * reception 26 | * 27 | */ 28 | void my_readCallback (void) { 29 | asm(" NOP"); 30 | } 31 | 32 | /** 33 | * This function is called by WISP FW after a successful write command 34 | * reception 35 | * 36 | */ 37 | void my_writeCallback (void) { 38 | asm(" NOP"); 39 | } 40 | 41 | /** 42 | * This function is called by WISP FW after a successful BlockWrite 43 | * command decode 44 | 45 | */ 46 | void my_blockWriteCallback (void) { 47 | asm(" NOP"); 48 | } 49 | 50 | 51 | /** 52 | * This implements the user application and should never return 53 | * 54 | * Must call WISP_init() in the first line of main() 55 | * Must call WISP_doRFID() at some point to start interacting with a reader 56 | */ 57 | void main(void) { 58 | 59 | WISP_init(); 60 | 61 | // Register callback functions with WISP comm routines 62 | WISP_registerCallback_ACK(&my_ackCallback); 63 | WISP_registerCallback_READ(&my_readCallback); 64 | WISP_registerCallback_WRITE(&my_writeCallback); 65 | WISP_registerCallback_BLOCKWRITE(&my_blockWriteCallback); 66 | 67 | // Get access to EPC, READ, and WRITE data buffers 68 | WISP_getDataBuffers(&wispData); 69 | 70 | // Set up operating parameters for WISP comm routines 71 | WISP_setMode( MODE_READ | MODE_WRITE | MODE_USES_SEL); 72 | WISP_setAbortConditions(CMD_ID_READ | CMD_ID_WRITE /*| CMD_ID_ACK*/); 73 | 74 | // Set up EPC 75 | wispData.epcBuf[0] = 0x05; // WISP version 76 | wispData.epcBuf[1] = *((uint8_t*)INFO_WISP_TAGID+1); // WISP ID MSB 77 | wispData.epcBuf[2] = *((uint8_t*)INFO_WISP_TAGID); // WISP ID LSB 78 | wispData.epcBuf[3] = 0x33; 79 | wispData.epcBuf[4] = 0x44; 80 | wispData.epcBuf[5] = 0x55; 81 | wispData.epcBuf[6] = 0x66; 82 | wispData.epcBuf[7] = 0x77; 83 | wispData.epcBuf[8] = 0x88; 84 | wispData.epcBuf[9] = 0x99; 85 | wispData.epcBuf[10]= 0xAA; 86 | wispData.epcBuf[11]= 0xBB; 87 | 88 | 89 | // Send and/or Receive 90 | #define SEND 91 | #define RECEIVE 92 | 93 | // Choose Receive mode: 94 | //#define NORMAL 95 | #define ASYNC 96 | //#define CRITICAL 97 | 98 | #if (defined(NORMAL) && defined(ASYNC)) || (defined(NORMAL) && defined(CRITICAL)) || (defined(ASYNC) && defined(CRITICAL)) 99 | #error "Please enable only ONE receive mode!" 100 | #endif 101 | 102 | #if defined(SEND) || defined(RECEIVE) 103 | UART_init(); // Init UART 104 | __bis_SR_register(GIE); // Enable global interrupts 105 | #endif 106 | 107 | #if defined(SEND) 108 | uint8_t s[10] = {1,2,3,4,5,0,7,8,9,10}; 109 | #endif 110 | 111 | #if defined(RECEIVE) 112 | uint8_t r[10] = {0}; 113 | #endif 114 | 115 | while (FOREVER) { 116 | 117 | #if defined(RECEIVE) && defined(ASYNC) 118 | // Tell UART module to async receive 119 | UART_asyncReceive(r, 10, '\0'); 120 | #endif 121 | 122 | #if defined(SEND) 123 | //UART_critSend(&s, 1); 124 | //UART_send(&s, 1); 125 | UART_asyncSend(s, 10); 126 | Timer_LooseDelay(40000); 127 | #endif 128 | 129 | #if defined(RECEIVE) && defined(NORMAL) 130 | // Receive, block 131 | UART_receive(r, 10, '\0'); 132 | #elif defined(RECEIVE) && defined(ASYNC) 133 | // Wait until async is done, block 134 | while(!UART_isRxDone()); 135 | #elif defined(RECEIVE) && defined(CRITICAL) 136 | // Receive without interrupt use, block 137 | UART_critReceive(r, 10, '\0'); 138 | #endif 139 | 140 | #if defined(RECEIVE) 141 | 142 | if( r[0]==1 143 | && r[1]==2 144 | && r[2]==3 145 | && r[3]==4 146 | && r[4]==5 147 | && r[5]==0 148 | && r[6]==0 149 | && r[7]==0 150 | && r[8]==0 151 | && r[9]==0) 152 | BITTOG(PLED1OUT, PIN_LED1); 153 | 154 | #endif 155 | } 156 | } 157 | -------------------------------------------------------------------------------- /CCS/uartRxTest/targetConfigs/MSP430FR5969.ccxml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | -------------------------------------------------------------------------------- /CCS/uartRxTest/targetConfigs/readme.txt: -------------------------------------------------------------------------------- 1 | The 'targetConfigs' folder contains target-configuration (.ccxml) files, automatically generated based 2 | on the device and connection settings specified in your project on the Properties > General page. 3 | 4 | Please note that in automatic target-configuration management, changes to the project's device and/or 5 | connection settings will either modify an existing or generate a new target-configuration file. Thus, 6 | if you manually edit these auto-generated files, you may need to re-apply your changes. Alternatively, 7 | you may create your own target-configuration file for this project and manage it manually. You can 8 | always switch back to automatic target-configuration management by checking the "Manage the project's 9 | target-configuration automatically" checkbox on the project's Properties > General page. -------------------------------------------------------------------------------- /CCS/wisp-base/.ccsproject: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | -------------------------------------------------------------------------------- /CCS/wisp-base/.cproject: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 26 | 62 | 63 | 64 | 65 | 66 | 67 | 68 | 69 | 70 | 71 | 72 | 73 | 74 | 75 | 76 | 77 | 78 | 79 | 80 | 81 | 82 | 83 | 84 | 85 | -------------------------------------------------------------------------------- /CCS/wisp-base/.gitignore: -------------------------------------------------------------------------------- 1 | TAGS 2 | build 3 | .launches 4 | targetConfigs 5 | -------------------------------------------------------------------------------- /CCS/wisp-base/.project: -------------------------------------------------------------------------------- 1 | 2 | 3 | wisp-base 4 | 5 | 6 | 7 | 8 | 9 | org.eclipse.cdt.managedbuilder.core.genmakebuilder 10 | 11 | 12 | 13 | 14 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder 15 | full,incremental, 16 | 17 | 18 | 19 | 20 | 21 | com.ti.ccstudio.core.ccsNature 22 | org.eclipse.cdt.core.cnature 23 | org.eclipse.cdt.managedbuilder.core.managedBuildNature 24 | org.eclipse.cdt.core.ccnature 25 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature 26 | 27 | 28 | -------------------------------------------------------------------------------- /CCS/wisp-base/.settings/org.eclipse.cdt.codan.core.prefs: -------------------------------------------------------------------------------- 1 | eclipse.preferences.version=1 2 | inEditor=false 3 | onBuild=false 4 | -------------------------------------------------------------------------------- /CCS/wisp-base/.settings/org.eclipse.cdt.core.prefs: -------------------------------------------------------------------------------- 1 | eclipse.preferences.version=1 2 | environment/project/com.ti.ccstudio.buildDefinitions.MSP430.Debug.109023729/append=true 3 | environment/project/com.ti.ccstudio.buildDefinitions.MSP430.Debug.109023729/appendContributed=true 4 | environment/project/com.ti.ccstudio.buildDefinitions.MSP430.Debug.1663611324/append=true 5 | environment/project/com.ti.ccstudio.buildDefinitions.MSP430.Debug.1663611324/appendContributed=true 6 | -------------------------------------------------------------------------------- /CCS/wisp-base/.settings/org.eclipse.cdt.debug.core.prefs: -------------------------------------------------------------------------------- 1 | eclipse.preferences.version=1 2 | org.eclipse.cdt.debug.core.toggleBreakpointModel=com.ti.ccstudio.debug.CCSBreakpointMarker 3 | -------------------------------------------------------------------------------- /CCS/wisp-base/.settings/org.eclipse.core.resources.prefs: -------------------------------------------------------------------------------- 1 | eclipse.preferences.version=1 2 | encoding//build/Debug/Math/subdir_rules.mk=UTF-8 3 | encoding//build/Debug/Math/subdir_vars.mk=UTF-8 4 | encoding//build/Debug/RFID/subdir_rules.mk=UTF-8 5 | encoding//build/Debug/RFID/subdir_vars.mk=UTF-8 6 | encoding//build/Debug/Sensors/subdir_rules.mk=UTF-8 7 | encoding//build/Debug/Sensors/subdir_vars.mk=UTF-8 8 | encoding//build/Debug/Timing/subdir_rules.mk=UTF-8 9 | encoding//build/Debug/Timing/subdir_vars.mk=UTF-8 10 | encoding//build/Debug/internals/subdir_rules.mk=UTF-8 11 | encoding//build/Debug/internals/subdir_vars.mk=UTF-8 12 | encoding//build/Debug/nvm/subdir_rules.mk=UTF-8 13 | encoding//build/Debug/nvm/subdir_vars.mk=UTF-8 14 | encoding//build/Debug/rand/subdir_rules.mk=UTF-8 15 | encoding//build/Debug/rand/subdir_vars.mk=UTF-8 16 | encoding//build/Debug/subdir_rules.mk=UTF-8 17 | encoding//build/Debug/subdir_vars.mk=UTF-8 18 | encoding//build/Debug/wired/subdir_rules.mk=UTF-8 19 | encoding//build/Debug/wired/subdir_vars.mk=UTF-8 20 | encoding//build/Math/subdir_rules.mk=UTF-8 21 | encoding//build/Math/subdir_vars.mk=UTF-8 22 | encoding//build/RFID/subdir_rules.mk=UTF-8 23 | encoding//build/RFID/subdir_vars.mk=UTF-8 24 | encoding//build/Sensors/subdir_rules.mk=UTF-8 25 | encoding//build/Sensors/subdir_vars.mk=UTF-8 26 | encoding//build/Timing/subdir_rules.mk=UTF-8 27 | encoding//build/Timing/subdir_vars.mk=UTF-8 28 | encoding//build/internals/subdir_rules.mk=UTF-8 29 | encoding//build/internals/subdir_vars.mk=UTF-8 30 | encoding//build/makefile=UTF-8 31 | encoding//build/math/subdir_rules.mk=UTF-8 32 | encoding//build/math/subdir_vars.mk=UTF-8 33 | encoding//build/nvm/subdir_rules.mk=UTF-8 34 | encoding//build/nvm/subdir_vars.mk=UTF-8 35 | encoding//build/objects.mk=UTF-8 36 | encoding//build/rand/subdir_rules.mk=UTF-8 37 | encoding//build/rand/subdir_vars.mk=UTF-8 38 | encoding//build/sources.mk=UTF-8 39 | encoding//build/subdir_rules.mk=UTF-8 40 | encoding//build/subdir_vars.mk=UTF-8 41 | encoding//build/wired/subdir_rules.mk=UTF-8 42 | encoding//build/wired/subdir_vars.mk=UTF-8 43 | -------------------------------------------------------------------------------- /CCS/wisp-base/Makefile: -------------------------------------------------------------------------------- 1 | CC=msp430-gcc 2 | CFLAGS=-mmcu=msp430fr5969 -Iinclude 3 | 4 | CFILES = $(wildcard *.c) 5 | CFILES += $(wildcard comm/*.c) 6 | CFILES += $(wildcard math/*.c) 7 | CFILES += $(wildcard sensors/*.c) 8 | CFILES += $(wildcard timing/*.c) 9 | CFILES += $(wildcard internals/*.c) 10 | OBJS = $(CFILES:.c=.o) 11 | ASMFILES += $(wildcard math/*.asm) 12 | ASMFILES = $(wildcard rfid/*.asm) 13 | OBJS += $(ASMFILES:.asm=.o) 14 | DEPS = $(CFILES:.c=.d) 15 | 16 | PERL = perl 17 | 18 | all: wisp5.elf 19 | 20 | -include $(DEPS) 21 | 22 | wisp5.elf: $(DEPS) $(OBJS) 23 | $(CC) $(CFLAGS) $(LDFLAGS) $(OBJS) -o $@ 24 | 25 | %.d: %.c 26 | @set -e; rm -f $@; \ 27 | $(CC) $(CFLAGS) -MM -MP $< > $@.$$$$; \ 28 | sed 's,\($*\)\.o[ :]*,\1.o $@ : ,g' < $@.$$$$ > $@; \ 29 | rm -f $@.$$$$ 30 | 31 | %.o: %.c %.d 32 | $(CC) $(CFLAGS) -c -o $@ $< 33 | 34 | %.S: %.asm ccs2mspgcc.pl 35 | $(PERL) ccs2mspgcc.pl $< > $@ 36 | 37 | %.o: %.S 38 | $(CC) $(CFLAGS) -c -o $@ $< 39 | 40 | .PHONY: clean 41 | clean: 42 | $(RM) wisp5.elf $(OBJS) $(DEPS) 43 | -------------------------------------------------------------------------------- /CCS/wisp-base/Math/crc16.h: -------------------------------------------------------------------------------- 1 | /** 2 | * @file crc16.h 3 | * 4 | * Interface to the Cyclic Redundancy Check module 5 | * 6 | * @author Ivar in 't Veen, Aaron Parks 7 | */ 8 | 9 | #ifndef CRC16_H_ 10 | #define CRC16_H_ 11 | 12 | // DEFINES 13 | #define ZERO_BIT_CRC (0x1020) /* state of the CRC16 calculation after running a '0' */ 14 | #define ONE_BIT_CRC (0x0001) /* state of the CRC16 calculation after running a '1' */ 15 | #define CRC_NO_PRELOAD (0x0000) /* don't preload it, start with 0! */ 16 | #define CCITT_POLY (0x1021) 17 | 18 | #ifndef __ASSEMBLER__ 19 | #include /* use xintx_t good var defs (e.g. uint8_t) */ 20 | 21 | // CRC calculation 22 | extern uint16_t crc16_ccitt (uint16_t preload,uint8_t *dataPtr, uint16_t numBytes); 23 | extern uint16_t crc16Bits_ccitt (uint16_t preload,uint8_t *dataPtr, uint16_t numBytes,uint16_t numBits); 24 | 25 | #endif /* __ASSEMBLER__ */ 26 | 27 | #endif /* CRC16_H_ */ 28 | -------------------------------------------------------------------------------- /CCS/wisp-base/Math/crc16_ccitt.asm: -------------------------------------------------------------------------------- 1 | ;/***********************************************************************************************************************************/ 2 | ;/**@file crc16_ccitt.asm 3 | ;* @brief Cyclic Redundancy Check calculations 4 | ;* @details 5 | ;* 6 | ;* @author Aaron Parks, UW Sensor Systems Lab 7 | ;* @author Ivar in 't Veen, TU Delft Embedded Software Group 8 | ;* @created 9 | ;* @last rev 10 | ;* 11 | ;* @notes R0:R2, system registers 12 | ;* R3, constant generator 13 | ;* R4:R5, reserved for ROM monitor mode, else GP 14 | ;* R6:R11, 6 general purpose registers 15 | ;* R12:R15, reserved for passing args 16 | ;*/ 17 | ;/***********************************************************************************************************************************/ 18 | 19 | ;/INCLUDES---------------------------------------------------------------------------------------------------------------------------- 20 | .cdecls C,LIST, "../globals.h" 21 | .cdecls C,LIST, "crc16.h" 22 | 23 | .def crc16_ccitt, crc16Bits_ccitt 24 | .ref crc16_LUT 25 | 26 | r_index .set R11 ;[] the register used to first hold &VAL, then VAL. (see PDRD descr) 27 | r_crc .set R12 ;[] working register where the CRC is stored. 28 | r_dataPtr .set R13 ;[] address of the data to calculate CRC on 29 | r_numBytes .set R14 ;[] num of bytes to calculate the CRC on 30 | r_numBits .set R15 ;[] num of bits to calculate CRC on 31 | 32 | ;************************************************************************************************************************************* 33 | ; unsigned int crc16_ccitt(unsigned short preload,unsigned char *dataPtr, unsigned int numBytes) * 34 | ; TODO: List Steps Here: * 35 | ; Assumption: numBits > 0 * 36 | ;************************************************************************************************************************************* 37 | crc16_ccitt: ;[11] (2+2+2+5)entry into function and setup with vals 38 | INV r_crc ;[2] #1. bring CRC preload into working form (inverted) before operation 39 | MOV r_crc, &CRCINIRES ;[1] #2. move CRC preload to correct register 40 | 41 | crc16_a_byte: 42 | MOV.B @r_dataPtr+,&CRCDIRB_L ;[1] #3. add item to CRC checksum 43 | 44 | DEC r_numBytes ;[1] #4. continue calculating bytes until all are proc'd 45 | JNZ crc16_a_byte ;[2] "" 46 | 47 | crc16_a_exit: 48 | MOV &CRCINIRES, r_crc ;[1] #5. move result back from register 49 | INV r_crc ;[2] #6. restore CRC to working form (invert it) 50 | 51 | ;r_crc is in proper return register on exit. 52 | RETA ;[8] 4 for return, 4 for moving data out to RAM (from R12) 53 | 54 | 55 | ;************************************************************************************************************************************* 56 | ; unsigned int crc16Bits_ccitt(unsigned short preload,unsigned char *dataPtr, unsigned int numBytes,unsigned int numBits) * 57 | ; TODO: List Steps Here: * 58 | ; ASSUMPTION: numBytes & numBits >0 * 59 | ;************************************************************************************************************************************* 60 | crc16Bits_ccitt: 61 | INV r_crc ;[2] #1. bring CRC preload into working form (inverted) before operation 62 | MOV r_crc, &CRCINIRES ;[1] #2. move CRC preload to correct register 63 | 64 | crc16Bits_a_byte: 65 | MOV.B @r_dataPtr+,&CRCDIRB_L ;[1] #3. add item to CRC checksum 66 | 67 | DEC r_numBytes ;[1] #4. continue calculating bytes until all are proc'd 68 | JNZ crc16Bits_a_byte ;[2] "" 69 | 70 | ;Get CRC data back in register for next steps 71 | MOV &CRCINIRES, r_crc ;[1] #5. move result back from register 72 | 73 | ;Load the last byte in prep to shift bits! 74 | MOV.B @r_dataPtr, r_index ;[2] load the last message byte, which is where bits get grabbed from (MSB side) 75 | 76 | ;MSP430 hardware CRC can only handle complete bytes/words, process next bits manually 77 | crc16Bits_Bits: 78 | CLR r_dataPtr ;[1] use dataPtr as the register to store the inbound dataBit into (b15) 79 | RLC.B r_index ;[1] shift out b7 of data 80 | RRC r_dataPtr ;[1] shift it into b15 or workingRef 81 | XOR r_dataPtr, r_crc ;[1] XOR in that dataBit into the CRC 82 | RLA r_crc ;[1] Shift CRC left 83 | 84 | JNC crc16Bits_skipXOR ;[2] if bit shifted out was set, XOR in the poly 85 | XOR #CCITT_POLY, r_crc ;[2] b15 was set, so XOR in CRC16-CCITT poly 86 | 87 | crc16Bits_skipXOR: 88 | DEC r_numBits ;[1] continue until all bits are proc'd 89 | JNZ crc16Bits_Bits ;[2] "" 90 | 91 | crc16Bits_a_exit: 92 | INV r_crc ;[2] #7. restore CRC to working form (invert it) 93 | 94 | ;r_crc is in proper return register on exit. 95 | RETA ;[8] 4 for return, 4 for moving data out to RAM (from R12) 96 | 97 | .end 98 | -------------------------------------------------------------------------------- /CCS/wisp-base/RFID/Clocking.asm: -------------------------------------------------------------------------------- 1 | ;/**@file Clocking.asm 2 | ;* @brief Sets the proper clocks for Tx and Rx 3 | ;* 4 | ;* @author Saman Naderiparizi, UW Sensor Systems Lab 5 | ;* @created 3-10-14 6 | ;* 7 | ;* 8 | ;* @section Command Handles 9 | ;* -#TxClock , RxClock 10 | ;*/ 11 | 12 | ;/INCLUDES---------------------------------------------------------------------------------------------------------------------------- 13 | .cdecls C,LIST, "../globals.h" 14 | .cdecls C,LIST, "rfid.h" 15 | .def TxClock, RxClock 16 | 17 | TxClock: 18 | MOV.B #(0xA5), &CSCTL0_H ;[] Switch to corr Tx frequency 12MHz 19 | MOV.W #(DCORSEL|DCOFSEL_6), &CSCTL1 ; 20 | MOV.W #(SELA_1|SELM_3), &CSCTL2 ; 21 | BIS.W #(SELS_3), &CSCTL2 22 | MOV.W #(DIVA_0|DIVS_1|DIVM_1), &CSCTL3 ; 23 | BIC.W #(MODCLKREQEN|SMCLKREQEN|MCLKREQEN), &CSCTL6 24 | BIS.W #(ACLKREQEN), &CSCTL6 25 | 26 | RETA 27 | 28 | 29 | RxClock: 30 | MOV.B #(0xA5), &CSCTL0_H ;[] Switch to corr Rx frequency 16MHz 31 | MOV.W #(DCORSEL|DCOFSEL_4), &CSCTL1 ; 32 | MOV.W #(SELA_1|SELM_3), &CSCTL2 ; 33 | BIS.W #(SELS_3), &CSCTL2 34 | MOV.W #(DIVA_0|DIVS_0|DIVM_0), &CSCTL3 ; 35 | BIC.W #(MODCLKREQEN|SMCLKREQEN|MCLKREQEN), &CSCTL6 36 | BIS.W #(ACLKREQEN), &CSCTL6 37 | 38 | RETA 39 | 40 | .end 41 | -------------------------------------------------------------------------------- /CCS/wisp-base/RFID/RX_ISR.asm: -------------------------------------------------------------------------------- 1 | ;/************************************************************************************************************************************ 2 | ;* PORT 1 ISR (Starting a Command Receive) 3 | ;* Here starts the hard real time stuff. 4 | ;* MCLK is 16 MHz (See Clocking.asm) -> 0.0625 us per cycle 5 | ;* Entering ISR takes 6 cycles (4.5.1.5.1) + Time needed to wake up from LPM1 (~4 us) 6 | ;* Each BIT.B takes 5-1 cycles (4.5.1.5.4) 7 | ;* Each JNZ or JZ takes 2 cycles regardless whether it is taken or not (4.5.1.5.3) 8 | ;* Start this ISR at t = 0.375 us + wake up time (~1.5 us?) TODO: Find out this exact wakeup time or why we have this gap. 9 | ;* Listed instruction cycles are taken from MSP430FR5969 User Guide (SLAU367F). 10 | ;* 11 | ;* Purpose: 12 | ;* This ISR kicks in on a falling edge and tries to find the rising edge marking the end of the delimiter of a PREAMBLE/FRAME-SYNC. 13 | ;* After that, we disable PORT1 interrupts and setup Timer0A0. 14 | ;* In the worst case (readers with 6.25 Tari), we only have 0.475*6.25 us = 47 clock cycles) before the falling edge of data-0. 15 | ;* Then we quickly return from this interrupt and wait for Timer0A0 to wake us up on the data-0 falling edge. 16 | ;* An ASCII drawing of the situation can be found below: 17 | ;* 18 | ;* | data-0 | RTCAL | 19 | ;* /-----\_____/------------------------\____/ - Wave form 20 | ;* 21 | ;************************************************************************************************************************************* 22 | 23 | .cdecls C, LIST, "../globals.h" 24 | .retain 25 | .retainrefs 26 | 27 | RX_ISR: 28 | ; XOR.B #PIN_AUX3, &PIN_AUX3_OUT 29 | BIT.B #PIN_RX, &PRXIN ;[4] 30 | JNZ badDelim ;[2] 31 | BIT.B #PIN_RX, &PRXIN ;[4] 32 | JNZ badDelim ;[2] 33 | BIT.B #PIN_RX, &PRXIN ;[4] 34 | JNZ badDelim ;[2] 35 | 36 | ;;;Around 2.7us 37 | BIT.B #PIN_RX, &PRXIN ;[4] 38 | JNZ badDelim ;[2] 39 | BIT.B #PIN_RX, &PRXIN ;[4] 40 | JNZ badDelim ;[2] 41 | BIT.B #PIN_RX, &PRXIN ;[4] 42 | JNZ badDelim ;[2] 43 | 44 | BIT.B #PIN_RX, &PRXIN ;[4] 45 | JNZ badDelim ;[2] 46 | BIT.B #PIN_RX, &PRXIN ;[4] 47 | JNZ badDelim ;[2] 48 | BIT.B #PIN_RX, &PRXIN ;[4] 49 | JNZ badDelim 50 | 51 | BIT.B #PIN_RX, &PRXIN ;[4] 52 | JNZ badDelim ;[2] 53 | BIT.B #PIN_RX, &PRXIN ;[4] 54 | JNZ badDelim ;[2] 55 | BIT.B #PIN_RX, &PRXIN ;[4] 56 | JNZ badDelim ;[2] 57 | 58 | BIT.B #PIN_RX, &PRXIN ;[4] 59 | JNZ badDelim ;[2] 60 | BIT.B #PIN_RX, &PRXIN ;[4] 61 | JNZ badDelim ;[2] 62 | BIT.B #PIN_RX, &PRXIN ;[4] 63 | JNZ badDelim ;[2] 64 | 65 | ; BIT.B #PIN_RX, &PRXIN ;[4] 66 | ; JNZ badDelim ;[2] 67 | ; BIT.B #PIN_RX, &PRXIN ;[3] 68 | ; JNZ badDelim ;[2] 69 | ; BIT.B #PIN_RX, &PRXIN ;[3] 70 | ; JNZ badDelim ;[2] 71 | 72 | ;;;Around 8.5us 73 | 74 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 75 | ;********************************************************************************************************************************* 76 | ; JUST RIGHT (8us < DELIM <16us @ 16MHz) 77 | ;********************************************************************************************************************************* 78 | BIT.B #PIN_RX, &PRXIN ;[4] 79 | JNZ goodDelim ;[2] 80 | BIT.B #PIN_RX, &PRXIN ;[4] 81 | JNZ goodDelim ;[2] 82 | BIT.B #PIN_RX, &PRXIN ;[4] 83 | JNZ goodDelim ;[2] 84 | BIT.B #PIN_RX, &PRXIN ;[4] 85 | JNZ goodDelim ;[2] 86 | BIT.B #PIN_RX, &PRXIN ;[4] 87 | JNZ goodDelim 88 | BIT.B #PIN_RX, &PRXIN ;[4] 89 | JNZ goodDelim 90 | BIT.B #PIN_RX, &PRXIN ;[4] 91 | JNZ goodDelim 92 | BIT.B #PIN_RX, &PRXIN ;[4] 93 | JNZ goodDelim 94 | BIT.B #PIN_RX, &PRXIN ;[4] 95 | JNZ goodDelim 96 | BIT.B #PIN_RX, &PRXIN ;[4] 97 | JNZ goodDelim 98 | 99 | BIT.B #PIN_RX, &PRXIN ;[4] 100 | JNZ goodDelim ;[2] 101 | BIT.B #PIN_RX, &PRXIN ;[4] 102 | JNZ goodDelim ;[2] 103 | BIT.B #PIN_RX, &PRXIN ;[4] 104 | JNZ goodDelim ;[2] 105 | BIT.B #PIN_RX, &PRXIN ;[4] 106 | JNZ goodDelim ;[2] 107 | BIT.B #PIN_RX, &PRXIN ;[4] 108 | JNZ goodDelim ;[2] 109 | BIT.B #PIN_RX, &PRXIN ;[4] 110 | JNZ goodDelim ;[2] 111 | BIT.B #PIN_RX, &PRXIN ;[4] 112 | JNZ goodDelim ;[2] 113 | BIT.B #PIN_RX, &PRXIN ;[4] 114 | JNZ goodDelim 115 | BIT.B #PIN_RX, &PRXIN ;[4] 116 | JNZ goodDelim 117 | ; XOR.B #PIN_AUX3, &PIN_AUX3_OUT 118 | ; BIT.B #PIN_RX, &PRXIN ;[4] 119 | ; JNZ goodDelim 120 | ; BIT.B #PIN_RX, &PRXIN ;[4] 121 | ; JNZ goodDelim 122 | ; BIT.B #PIN_RX, &PRXIN ;[4] 123 | ; JNZ goodDelim 124 | ; BIT.B #PIN_RX, &PRXIN ;[4] 125 | ; JNZ goodDelim 126 | ;;;Around 16us 127 | 128 | ; Delim is too short so go back to sleep. 129 | badDelim: 130 | ; XOR.B #PIN_AUX3, &PIN_AUX3_OUT 131 | BIC.W #(CCIE),&TA0CCTL0 ; Disable timer interrupt to avoid entering lpm1 instead of lpm4. 132 | CLR &TA0CTL ;[] Disable TimerA since we should again look for the next delim and stay in lpm4 133 | BIT.B R15, R14 ;[] 134 | BIC #CCIFG, &TA0CCTL0 ;[] Clear the interrupt flag for Timer0A0 Compare (safety). 135 | CLR &TA0R ;[] Reset TAR value 136 | CLR &(rfid.edge_capture_prev_ccr) ;[] Clear previous value of CCR capture. 137 | CLR.B &PRXIFG ;[] Clear the Port 1 flag. 138 | RETI 139 | 140 | ; We found a delim ~12.5 us, now turn off PORT1 and prepare Timer0A0. 141 | goodDelim: ;[24] 142 | BIS.B #PIN_RX, &PRXSEL0 ;[5] Enable Timer0A0 143 | BIC.B #PIN_RX, &PRXSEL1 ;[5] Enable Timer0A0 144 | CLR.B &PRXIE ;[4] Disable the Port 1 Interrupt 145 | BIC #(SCG1), 0(SP) ;[5] Enable the DCO to start counting 146 | BIS.W #(CM_2+CCIE), &TA0CCTL0 ;[5] Wake up so we can make use of Timer0A0 control registers? 147 | MOV #(TASSEL__SMCLK+MC__CONTINOUS) , &TA0CTL ;[] SMCLK and continuous mode. (TASSEL1 + MC1), now timer0A0 can be started 148 | 149 | startupT0A0_ISR: ;[22] 150 | BIC #CCIFG, &TA0CCTL0 ;[5] Clear the interrupt flag for Timer0A0 Compare 151 | CLR &TA0R ;[4] ***Reset clock!*** 152 | CLR &(rfid.edge_capture_prev_ccr) ;[4] Clear previous value of CCR capture 153 | CLR.B &PRXIFG ;[4] Clear the Port 1 flag. 154 | 155 | RETI ;[5] Return from interrupt (46 cycles total). 156 | 157 | ;************************************************************************************************************************************* 158 | ; DEFINE THE INTERRUPT VECTOR ASSIGNMENT 159 | ;************************************************************************************************************************************* 160 | ;.sect ".int36" ; Port 1 Vector 161 | ;.short RX_ISR ; This sect/short pair sets int02 = RX_ISR addr. 162 | .end 163 | -------------------------------------------------------------------------------- /CCS/wisp-base/RFID/Timer0A1_ISR.asm: -------------------------------------------------------------------------------- 1 | ;/***********************************************************************************************************************************/ 2 | ;/**@file Timer0A1_ISR.asm 3 | ;* @brief Receive chain decoding routines. 4 | ;* @details 5 | ;* 6 | ;* @author Justin Reina, UW Sensor Systems Lab 7 | ;* @created 8 | ;* @last rev 9 | ;* 10 | ;* @notes 11 | ;* 12 | ;* @todo Document the purpose(s) of this ISR better 13 | ;*/ 14 | ;/***********************************************************************************************************************************/ 15 | 16 | .cdecls C, LIST, "../globals.h", "../config/wispGuts.h", "rfid.h" 17 | .define "4", SR_SP_OFF 18 | .retain 19 | .retainrefs 20 | 21 | ;************************************************************************************************************************************* 22 | ; Timer0A1 ISR: 23 | ; Modes: #CPU_OFF: still in latch mode. shut down TA0_SM and restart RX State Machine * 24 | ; #CPU_ON: in parse mode. abort & send false message to EPC_SM so it doesn't hang. this state should never happen though.. * 25 | ; * 26 | ; Interrupt Sources: T0A1CCR0 * 27 | ;************************************************************************************************************************************* 28 | Timer0A1_ISR: ;[6] entry cycles into an interrupt (well, 5-6) 29 | PUSHM.A #1, R15 ;[] save R15 30 | 31 | ;---------------------------------------Check What State the Receive Chain is in------------------------------------------------- 32 | MOV SR_SP_OFF(SP), R15 ;[]Grab previous SR (last item that was shoved 4 bytes beforehand "PUSHM.A") 33 | BIT #CPUOFF, R15 ;[]Check to see if the CPU was off. 34 | JZ CPU_is_on ;[] 35 | 36 | ;---------------------------------------------------(CPU IS OFF)----------------------------------------------------------------- 37 | CPU_is_off: ;[]i.e. we're still in latch mode. restart the RX State Machine. Two entries here: either from RX State Machine or TA1_SM. 38 | ; or... lowPowerSleep() is using it 39 | CMP.B #TRUE, &isDoingLowPwrSleep;[] is the lowPowerSleep() call using it!? 40 | JEQ Wakeup_Proc 41 | MOV.B &isDoingLowPwrSleep, R15 ;/** @todo This line seems unnecessary... */ 42 | 43 | ;we're gonna be careful on the TA1_SM for now because that should never happen. so just for now we'll add on clr R6 & rst R4. 44 | MOV &(cmd), R4 ;[] shouldn't need, just for safety (make sure TA1 starts up ok) 45 | CLR R5 ;[1] reset R5 for rentry into RX State Machine 46 | BIC.B #(PIN_RX), &PRXIES ;[4] wait again for #1 to fire on rising edge(inverted) //@us_change, enable 47 | BIS.B #(PIN_RX), &PRXIE ;[]Enable the interrupt 48 | CLR.B PRXIFG ;[]clr any pending flasgs (safety) 49 | ; TODO The following shouldn't overwrite other bits in PRXSEL!? 50 | BIC.B #PIN_RX, &PRXSEL0 ;[]disable TimerA1 51 | BIC.B #PIN_RX, &PRXSEL1 ;[]disable TimerA1 52 | 53 | BIC.B #(CM_2+CCIE), &TA0CCTL0 ;[] disable capture and interrupts by capture-compare unit 54 | BIC #(CCIFG), TA0CCTL0 ;[] clear the interrupt flag 55 | BIS #(SCG1+OSCOFF+CPUOFF+GIE), SR_SP_OFF(SP);[] put tag back into LPM4 56 | 57 | POPM.A #1, R15 58 | RETI ;[5] return from interrupt 59 | 60 | Wakeup_Proc: 61 | 62 | BIC #(CCIFG), TA0CCTL0 ;[] clear the interrupt flag 63 | ;@us change:clear TA0CTL and TA0CCTL1, because lowpowermode is controlled by TA0CCTL1 64 | CLR TA0CTL 65 | CLR TA0CCTL0 ;[]clear TA0CCTL0, no need to clear out of ISR 66 | CLR TA0CCTL1 ;[]clear TA0CCTL1, no need to clear out of ISR 67 | 68 | MOV #(FALSE), &isDoingLowPwrSleep ;[] clear that flag! 69 | 70 | BIC #(SCG1+OSCOFF+CPUOFF+GIE), SR_SP_OFF(SP);[] take tag out of LPM4 71 | POPM.A #1, R15 72 | RETI ;[5] return from interrupt 73 | 74 | ;----------------------------------------------------(CPU IS ON)----------------------------------------------------------------- 75 | CPU_is_on: ;i.e. we're now in parse mode 76 | ;uh-oh. chances are that the EPC_SM is already to while(bits int41 28 | ;.short Timer1A0_ISR ; 29 | .end 30 | -------------------------------------------------------------------------------- /CCS/wisp-base/RFID/WISP_doRFID.asm: -------------------------------------------------------------------------------- 1 | ;/***********************************************************************************************************************************/ 2 | ;/**@file WISP_doRFID.asm 3 | ;* @brief This is the main RFID loop that executes an RFID transaction 4 | ;* @details 5 | ;* 6 | ;* @author Justin Reina, UW Sensor Systems Lab 7 | ;* @created 6.14.11 8 | ;* @last rev 9 | ;* 10 | ;* @notes 11 | ;* 12 | ;* @todo Maybe doRFID() should 1) take arguments which set RFID response mode, and 2) return last cmd to which it responded 13 | ;* @todo doRFID() should sleep_till_full_power() after a transaction when it's in a mode where it doesn't always return... 14 | ;*/ 15 | ;/***********************************************************************************************************************************/ 16 | 17 | ;/INCLUDES---------------------------------------------------------------------------------------------------------------------------- 18 | .cdecls C,LIST, "../globals.h" 19 | .cdecls C,LIST, "../Math/crc16.h" 20 | .cdecls C,LIST, "rfid.h" 21 | .def WISP_doRFID 22 | .global handleAck, handleQR, handleReqRN, handleRead, handleWrite, handleSelect, WISP_doRFID, TxClock, RxClock 23 | 24 | ;/PRESERVED REGISTERS----------------------------------------------------------------------------------------------------------------- 25 | R_bitCt .set R6 26 | R_bits .set R5 27 | R_dest .set R4 28 | 29 | R_wakeupBits .set R10 30 | 31 | R_scratch0 .set R15 32 | 33 | 34 | 35 | WISP_doRFID: 36 | ;/************************************************************************************************************************************ 37 | ;/ PREP THE DATABUF W/STOREDPC AND A CRC16 (225 cycles, 55us) * 38 | ;/************************************************************************************************************************************ 39 | ;Load the Stored Protocol Control (PC) values 40 | MOV.B #(STORED_PC1), &(dataBuf) ;[5] 41 | MOV.B #(STORED_PC0), &(dataBuf+1) ;[5] 42 | 43 | ;Data was already loaded by user into B2..B13, so we don't need to load it. 44 | ;[0]! cool... 45 | 46 | ;Calc CRC16! (careful, it will clobber R11-R15) 47 | ;uint16_t crc16_ccitt(uint16_t preload,uint8_t *dataPtr, uint16_t numBytes); 48 | MOV #(dataBuf), R13 ;[2] load &dataBuf[0] as dataPtr 49 | MOV #(DATABUFF_SIZE-2), R14 ;[2] load num of bytes in ACK 50 | 51 | MOV #CRC_NO_PRELOAD, R12 ;[1] don't use a preload! 52 | 53 | CALLA #crc16_ccitt ;[5+196] 54 | ;onReturn: R12 holds the CRC16 value. 55 | 56 | ;STORE CRC16 57 | MOV.B R12, &(dataBuf+(DATABUFF_SIZE-1)) ;[4] store lower CRC byte first 58 | SWPB R12 ;[1] move upper byte into lower byte 59 | MOV.B R12, &(dataBuf+(DATABUFF_SIZE-2)) ;[4] store upper CRC byte 60 | 61 | 62 | ;Initial Config of RFID Transaction 63 | MOV.B #FALSE, &(rfid.abortFlag);[] Initialize abort flag 64 | ;BIS.B #(PIN_RX_EN), &PRXEOUT ;[] enable the receive comparator for a new round 65 | 66 | keepDoingRFID: 67 | ;/************************************************************************************************************************************ 68 | ;/ SET TO FASTER CLOCK * 69 | ;/************************************************************************************************************************************ 70 | DINT ;[] safety 71 | NOP 72 | 73 | ;MOV &(INFO_ADDR_RXUCS0), &UCSCTL0 ;[] switch to corr Rx Frequency 74 | ;MOV &(INFO_ADDR_RXUCS1), &UCSCTL1 ;[] "" 75 | 76 | CALLA #RxClock ;Switch to Rx Clock 77 | 78 | ;/************************************************************************************************************************************ 79 | ;/ CONFIG, ENABLE The RX State Machine * 80 | ;/************************************************************************************************************************************ 81 | ;Configure Hardware (Port, Rx Comp) 82 | BIC.B #PIN_RX, &PRXSEL0 ;[] make sure TimerA is disabled (safety) 83 | BIC.B #PIN_RX, &PRXSEL1 ;[] make sure TimerA is disabled (safety) 84 | 85 | ;TIMER A CONFIG (pre before RX ISR) 86 | CLR &TA0CTL ;[] Disable TimerA before config (required) 87 | CLR &TA0R ;[] Clear Ctr 88 | CLR &(rfid.edge_capture_prev_ccr) ;[] Clear previous value of CCR capture 89 | MOV #0xFFFF,&TA0CCR1 ;[] Don't let timer0A1 overflow! 90 | CLR &TA0CCTL1 ;[] Don't do the overflow, yet on T0A1 91 | 92 | ;@us change:clear TA0 93 | CLR &TA0CCTL0 94 | 95 | MOV #(SCS+CAP+CCIS_1),&TA0CCTL0 ;[] Sync on Cap Src and Cap Mode on Rising Edge(Inverted). don't set all bits until in RX ISR though. 96 | ; @Saman: commenting the below line and adding that inside RX_ISR 97 | ; MOV #(TASSEL__SMCLK+MC__CONTINOUS) , &TA0CTL ;[] SMCLK and continuous mode. (TASSEL1 + MC1) 98 | 99 | ;Setup rfid_rxSM vars 100 | MOV #RESET_BITS_VAL, R_bits ;[]MOD 101 | CLR R_bitCt ;[] 102 | MOV #(cmd), R_dest ;[]load the R_dest to the reg! 103 | 104 | ;RX State Machine Config (setup PRX for falling edge interrupt on PRX.PIN_RX) 105 | BIS.B #(PIN_RX_EN), &PDIR_RX_EN ;[]@us_change: config I/O here and quit after use 106 | BIS.B #PIN_RX_EN, &PRXEOUT ;[] Enable the Receive Comparator 107 | ;BIC.B #PIN_RX, &PDIR_RX ;[]@us_change: config I/O here and quit after use 108 | ;@Saman 109 | ;BIS.B #(PIN_NRX_EN), &PDIR_NRX_EN ;[]@us_change: config I/O here and quit after use 110 | ;BIC.B #PIN_NRX_EN, &PNRXEOUT ;[] Enable the Receive Comparator (Enable the Negative Supply) 111 | 112 | 113 | 114 | BIS.B #PIN_RX, &PRXIES ;[] Make falling edge for port interrupt to detect start of delimiter 115 | 116 | CLR.B &PRXIFG ;[] Clear interrupt flag 117 | MOV.B #PIN_RX, &PRXIE ;[] Enable Port1 interrupt 118 | 119 | 120 | ; Set up timeout timer 121 | ; @Saman: I am not sure if we actually need that in expense of avoiding from going to lpm4. 122 | MOV #CCIE, TA1CCTL0 ; CCR0 interrupt enabled 123 | MOV #QUERY_TIMEOUT_PERIOD, TA1CCR0 ; Timeout period 124 | MOV #(TASSEL_1 | MC_1 | TACLR), TA1CTL ; ACLK, upmode, divide by 8, clear TAR 125 | 126 | 127 | ; @todo Shouldn't we sleep_till_full_power here? Where else could that happen? 128 | BIS #LPM4+GIE, SR ;[] sleep! (LPM4 | GIE) 129 | NOP 130 | 131 | ;"it won't wakeup until either 8bits came in, or QR occurs, or timeout occurs. 132 | 133 | ; Check to see if timeout was what (probably) woke us 134 | TST.B (rfid.abortFlag) 135 | JNZ endDoRFID 136 | 137 | 138 | ;/************************************************************************************************************************************ 139 | ;/ DECODE COMMAND * 140 | ;/ level1 = cmd[0] | 0xC0 (just examine the first two bits) * 141 | ;/ every command except for select will be skipped if !rfid.isSelected * 142 | ;/***********************************************************************************************************************************/ 143 | decodeCmd_lvl1: 144 | MOV.B (cmd), R_scratch0 ;[] bring in cmd[0] to parse 145 | AND.B #0xC0, R_scratch0 ;[] just compare the first two bits 146 | 147 | CMP.B #0xC0, R_scratch0 148 | JEQ decodeCmd_lvl2_11 149 | CMP.B #0x80, R_scratch0 150 | JEQ decodeCmd_lvl2_10 151 | 152 | CMP.B #0, &(rfid.isSelected) 153 | JZ tagNotSelected 154 | 155 | CMP.B #0x40, R_scratch0 156 | JEQ callAckHandler 157 | 158 | CMP.B #0x00, R_scratch0 159 | JEQ callQRHandler 160 | 161 | 162 | 163 | JMP endDoRFID 164 | 165 | ;either Req_RN/Read/Write. 166 | decodeCmd_lvl2_11: 167 | CMP.B #0, &(rfid.isSelected) 168 | JZ tagNotSelected 169 | 170 | MOV.B (cmd), R_scratch0 ;[] bring in cmd[0] to parse 171 | CMP.B #0xC0, R_scratch0 ;[] is it NAK? 172 | JEQ callNAKHandler ;[] 173 | CMP.B #0xC1, R_scratch0 ;[] is it reqRN? 174 | JEQ callReqRNHandler ;[] 175 | CMP.B #0xC2, R_scratch0 ;[] is it read? 176 | JEQ callReadHandler ;[] 177 | CMP.B #0xC3, R_scratch0 ;[] is it write? 178 | JEQ callWriteHandler ;[] 179 | CMP.B #0xC7, R_scratch0 ;[] is it BlockWrite? 180 | JEQ callBlockWriteHandler;[] 181 | JMP endDoRFID ;[] come back and handle after query is working. 182 | 183 | 184 | ; either Select/QA/Query 185 | ; level2 = cmd[0] | 0x30 186 | decodeCmd_lvl2_10: 187 | 188 | MOV.B (cmd), R_scratch0 ;[] bring in cmd[0] to parse 189 | AND.B #0x30, R_scratch0 ;[] just compare the second two bits 190 | 191 | CMP.B #0x20, R_scratch0 ;[] is it select? 192 | JEQ callSelectHandler ;[] 193 | 194 | CMP.B #0, &(rfid.isSelected) 195 | JZ tagNotSelected 196 | 197 | CMP.B #0x10, R_scratch0 ;[] is it queryAdjust? 198 | JEQ callQAHandler ;[] 199 | CMP.B #0x00, R_scratch0 ;[] is it query? 200 | JEQ callQueryHandler ;[] 201 | JMP endDoRFID ;[] come back and handle after query is working. 202 | 203 | ;/************************************************************************************************************************************ 204 | ;/ CALL APPROPRIATE COMMAND HANDLER * 205 | ;/************************************************************************************************************************************/ 206 | 207 | callSelectHandler: 208 | CALLA #handleSelect 209 | JMP endDoRFID 210 | 211 | callQueryHandler: 212 | CALLA #handleQuery 213 | JMP endDoRFID 214 | 215 | callQRHandler: 216 | CALLA #handleQR 217 | JMP endDoRFID 218 | 219 | callQAHandler: 220 | CALLA #handleQA 221 | JMP endDoRFID 222 | 223 | callAckHandler: 224 | CALLA #handleAck 225 | JMP endDoRFID 226 | 227 | callNAKHandler: 228 | NOP 229 | NOP 230 | NOP 231 | JMP endDoRFID 232 | 233 | callReqRNHandler: 234 | CALLA #handleReqRN 235 | JMP endDoRFID 236 | 237 | callReadHandler: 238 | BIT.B #MODE_READ, &(rfid.mode) 239 | JNC endDoRFID 240 | CALLA #handleRead 241 | JMP endDoRFID 242 | 243 | callWriteHandler: 244 | BIT.B #MODE_WRITE, &(rfid.mode) 245 | JNC endDoRFID 246 | CALLA #handleWrite 247 | JMP endDoRFID 248 | 249 | callBlockWriteHandler: 250 | BIT.B #MODE_WRITE, &(rfid.mode) 251 | JNC endDoRFID 252 | CALLA #handleBlockWrite 253 | JMP WISP_doRFID 254 | 255 | 256 | ;/************************************************************************************************************************************/ 257 | ;/ DECIDE IF STAYING IN RFID LOOP * 258 | ;/ * 259 | ;/ If the abort flag has been set during the RFID transaction, return! Otherwise, keep doing RFID. * 260 | ;/************************************************************************************************************************************/ 261 | endDoRFID: 262 | ; Disable timeout timer 263 | MOV #0, TA1CCTL0; 264 | MOV #0, TA1CTL; 265 | 266 | TST.B (rfid.abortFlag) 267 | JZ keepDoingRFID 268 | MOV #(0), &(TA0CCTL0) 269 | RETA 270 | 271 | tagNotSelected: 272 | BIC #GIE, 0(SR) 273 | CLR &TA0CTL 274 | RETA 275 | 276 | .end 277 | -------------------------------------------------------------------------------- /CCS/wisp-base/RFID/interface.c: -------------------------------------------------------------------------------- 1 | /** 2 | * @file interface.c 3 | * 4 | * Provides some client interfacing functions for the RFID module 5 | * 6 | * @author Aaron Parks 7 | */ 8 | 9 | #include "../globals.h" 10 | #include "rfid.h" 11 | 12 | uint8_t usrBank[USRBANK_SIZE]; 13 | 14 | // Client access to RFID data buffers. 15 | void WISP_getDataBuffers(WISP_dataStructInterface_t* clientStruct) { 16 | clientStruct->epcBuf=&dataBuf[2]; 17 | clientStruct->writeBufPtr=&(RWData.wrData); 18 | clientStruct->blockWriteBufPtr=RWData.bwrBufPtr; 19 | clientStruct->blockWriteSizePtr=&(RWData.bwrByteCount); 20 | clientStruct->readBufPtr=&usrBank[0]; 21 | } 22 | 23 | /** 24 | * Registers a callback for ACK event 25 | */ 26 | void WISP_registerCallback_ACK(void(*fnPtr)(void)){ 27 | RWData.akHook = ((void*)(fnPtr)); 28 | } 29 | 30 | /** 31 | * Registers a callback for READ event 32 | */ 33 | void WISP_registerCallback_READ(void(*fnPtr)(void)){ 34 | RWData.rdHook = ((void*)(fnPtr)); 35 | } 36 | 37 | /** 38 | * Registers a callback for a WRITE event 39 | */ 40 | void WISP_registerCallback_WRITE(void(*fnPtr)(void)){ 41 | RWData.wrHook = ((void*)(fnPtr)); 42 | } 43 | 44 | /** 45 | * Registers a callback for a BLOCKWRITE event 46 | */ 47 | void WISP_registerCallback_BLOCKWRITE(void(*fnPtr)(void)){ 48 | RWData.bwrHook =((void*)(fnPtr)); 49 | } 50 | 51 | 52 | /** 53 | * Sets mode parameters for the RFID state machine 54 | */ 55 | void WISP_setMode(uint8_t mode) { 56 | rfid.mode = mode; 57 | } 58 | 59 | /** 60 | * Sets abort conditions for the RFID state machine. This dictates when 61 | * WISP comm code will abort and return control to client code. 62 | */ 63 | void WISP_setAbortConditions(uint8_t abortOn) { 64 | rfid.abortOn = abortOn; 65 | } 66 | -------------------------------------------------------------------------------- /CCS/wisp-base/RFID/rfid.h: -------------------------------------------------------------------------------- 1 | /** 2 | * @file rfid.h 3 | * 4 | * Defines the public interface for the RFID module 5 | * 6 | * @author Aaron Parks 7 | */ 8 | 9 | #ifndef RFID_H_ 10 | #define RFID_H_ 11 | 12 | #include 13 | 14 | //RFID MODE DEFS 15 | #define MODE_STD (0) /* tag only responds up to ACKs (even ignores ReqRNs) */ 16 | #define MODE_READ (BIT0) /* tag responds to read commands */ 17 | #define MODE_WRITE (BIT1) /* tag responds to write commands */ 18 | #define MODE_USES_SEL (BIT2) /* tags only use select when they want to play nice (they don't have to) */ 19 | 20 | // RFID command IDs 21 | #define CMD_ID_ACK (BIT0) 22 | #define CMD_ID_READ (BIT1) 23 | #define CMD_ID_WRITE (BIT2) 24 | #define CMD_ID_BLOCKWRITE (BIT3) 25 | 26 | // Client interface to read, write, and EPC memory buffers 27 | typedef struct { 28 | uint8_t* epcBuf; 29 | uint16_t* writeBufPtr; 30 | uint16_t* blockWriteBufPtr; 31 | uint16_t* blockWriteSizePtr; 32 | uint8_t* readBufPtr; 33 | } WISP_dataStructInterface_t; 34 | 35 | extern void WISP_doRFID(void); 36 | 37 | // Callback registration 38 | void WISP_registerCallback_ACK(void(*fnPtr)(void)); 39 | void WISP_registerCallback_READ(void(*fnPtr)(void)); 40 | void WISP_registerCallback_WRITE(void(*fnPtr)(void)); 41 | void WISP_registerCallback_BLOCKWRITE(void(*fnPtr)(void)); 42 | 43 | // Access functions for RFID mode parameters 44 | void WISP_setMode(uint8_t newMode); 45 | void WISP_setAbortConditions(uint8_t newAbortConditions); 46 | 47 | 48 | // Linker hack: We need to reference assembly ISRs directly somewhere to force linker to include them in binary. 49 | extern void RX_ISR(void); 50 | extern void Timer0A0_ISR(void); 51 | extern void Timer0A1_ISR(void); 52 | 53 | 54 | 55 | 56 | 57 | #endif /* RFID_H_ */ 58 | -------------------------------------------------------------------------------- /CCS/wisp-base/RFID/rfid_WriteHandle.asm: -------------------------------------------------------------------------------- 1 | ;/***********************************************************************************************************************************/ 2 | ;/**@file rfid_WriteHandle.asm 3 | ;* @brief 4 | ;* @details 5 | ;* 6 | ;* @author Justin Reina, UW Sensor Systems Lab 7 | ;* @created 8 | ;* @last rev 9 | ;* 10 | ;* @notes 11 | ;* 12 | ;* @section 13 | ;* 14 | ;* @todo Show the write command bitfields here 15 | ;*/ 16 | ;/***********************************************************************************************************************************/ 17 | 18 | .cdecls C,LIST, "../globals.h" 19 | .cdecls C,LIST, "../Math/crc16.h" 20 | .cdecls C,LIST, "rfid.h" 21 | 22 | R_writePtr .set R13 ;[0] ptr to which membank at which offset will be reading from 23 | R_handle .set R12 ;[0] store inbound handle for Tx here. 24 | R_scratch1 .set R14 25 | R_scratch0 .set R15 26 | 27 | .ref cmd,memBank_RES ;[0] declare TACCR1 28 | .def handleWrite 29 | .global RxClock, TxClock 30 | .sect ".text" 31 | 32 | ; extern void handleWrite (uint8_t handle); 33 | handleWrite: 34 | 35 | ;Wait for Enough Bits to Come in(8+8) (first two bytes come in, then memBank is in cmd[1].b7b6) 36 | waitOnBits_0: 37 | MOV.W R5, R15 ;[1] 38 | CMP.W #16, R15 ;[3] while(bits<18) 39 | JLO waitOnBits_0 ;[2] 40 | 41 | ;Put Proper memBankPtr into WritePtr. Switch on Membank 42 | calc_memBank: 43 | MOV.B (cmd+1),R15 ;[3] load cmd byte into R15. memBank is in b7b6 (0xC0) 44 | AND.B #0xC0, R15 ;[2] mask of non-memBank bits, then switch on it to load corr memBankPtr 45 | RRA R15 ;[1] move b7b6 down to b1b0 46 | RRA R15 ;[1] "" 47 | RRA R15 ;[1] "" 48 | RRA R15 ;[1] "" 49 | RRA R15 ;[1] "" 50 | RRA R15 ;[1] "" 51 | MOV.B R15, &(RWData.memBank);[] store the memBank 52 | 53 | ;Now wait for wordPtr to come in, and off R_readPtr by it. R15 is unused, R14 is held. 54 | ;Wait for Enough Bits to Come in(2+8+8+8) (first three bytes come in, then wordPtr is in cmd[1].b5-b0 | cmd[2].b7b6 55 | waitOnBits_1: 56 | MOV.W R5, R15 ;[1] 57 | CMP.W #24, R15 ;[2] while(bits<26) 58 | JLO waitOnBits_1 ;[2] 59 | 60 | calc_wordPtr: 61 | MOV.B (cmd+1), R15 ;[3] bring in top 6 bits into b5-b0 of R15 (wordCt.b7-b2) 62 | MOV.B (cmd+2), R14 ;[3] bring in bot 2 bits into b7b6 of R14 (wordCt.b1-b0) 63 | RLC.B R14 ;[1] pull out b7 from R14 (wordCt.b1) 64 | RLC.B R15 ;[1] shove it into R15 at bottom (wordCt.b1) 65 | RLC.B R14 ;[1] pull out b7 from R14 (wordCt.b0) 66 | RLC.B R15 ;[1] shove it into R15 at bottom (wordCt.b0) 67 | MOV.B R15, R15 ;[1] mask wordPtr to just lower 8 bits 68 | MOV.B R15, &(RWData.wordPtr) ;[] store the wordPtr 69 | 70 | 71 | ;Now wait for Data to come in. 72 | ;Wait for Enough Bits to Come in(5*8) (first five bytes come in, then data&RN16 is in cmd[2].b5-b0|cmd[3]|cmd[4].b7b6 73 | waitOnBits_2: 74 | MOV.W R5, R15 ;[1] 75 | CMP.W #40, R15 ;[2] while(bits<26) 76 | JLO waitOnBits_2 ;[2] 77 | 78 | ;Pull out Data and stuff into R14 (safe, R14 isn't used by RX_SM) 79 | MOV.B (cmd+2), R14 ;[3] bring in top 6 bits into b5-b0 of R14 (data.b15-b10) 80 | MOV.B (cmd+3), R13 ;[3] bring in mid 8 bits into b7-b0 of R13 (data.b9-b2) 81 | MOV.B (cmd+4), R12 ;[3] bring in bot 2 bits into b7b6 of R12 (data.b1b0) 82 | 83 | RLC.B R13 ;[1] 84 | RLC.B R14 ;[1] 85 | RLC.B R13 ;[1] 86 | RLC.B R14 ;[1] 87 | RRC.B R13 ;[1] 88 | RRC.B R13 ;[1] 89 | 90 | RLC.B R12 ;[1] 91 | RLC.B R13 ;[1] 92 | RLC.B R12 ;[1] 93 | RLC.B R13 ;[1] 94 | 95 | SWPB R14 ;[1] 96 | BIS R13, R14 ;[] merge b15-b8(R14) and b7-b(R13) together into R14 as Data^RN16 97 | PUSHM.A #1, R14 ;[] save the value to the stack for safekeeping 98 | 99 | ;exit: data^RN16 is on stack @ 0(SP) 100 | 101 | ;Now wait for RN16 to come in. 102 | ;Wait for Enough Bits to Come in(7*8) (first seven bytes come in, then RN16 is in cmd[4].b5-b0|cmd[5]|cmd[6].b7b6 103 | waitOnBits_3: 104 | MOV.W R5, R15 ;[1] 105 | CMP.W #56, R15 ;[2] while(bits<26) 106 | JLO waitOnBits_3 ;[2] /** @todo Timeout needed here? */ 107 | 108 | 109 | ;************************************************************************************************************************************* 110 | ; [7a/8] Check if handle matched. 111 | ;************************************************************************************************************************************* 112 | MOV.B (cmd+4), R_scratch0 113 | SWPB R_scratch0 114 | MOV.B (cmd+5), R_scratch1 115 | BIS.W R_scratch1, R_scratch0 ;cmd[4] into MSByte, cmd[5] into LSByte of Rs0 116 | MOV.B (cmd+6), R_scratch1 117 | ;Shove bottom 2 bits from Rs1 INTO Rs0 118 | RLC.B R_scratch1 119 | RLC R_scratch0 120 | RLC.B R_scratch1 121 | RLC R_scratch0 122 | 123 | ;/** @todo Clean up the slop */ 124 | 125 | ;Check if Handle Matched 126 | CMP R_scratch0, &rfid.handle 127 | JNE writeHandle_Ignore 128 | 129 | ;Pull out Data and stuff into R14 (safe, R14 isn't used by RX_SM) 130 | MOV.B (cmd+4), R14 ;[3] bring in top 6 bits into b5-b0 of R14 (RN16.b15-b10) 131 | MOV.B (cmd+5), R13 ;[3] bring in mid 8 bits into b7-b0 of R13 (RN16.b9-b2) 132 | MOV.B (cmd+6), R12 ;[3] bring in bot 2 bits into b7b6 of R12 (RN16.b1b0) 133 | 134 | RLC.B R13 ;[1] /** @todo Document what this is doing, exactly... ? */ 135 | RLC.B R14 ;[1] 136 | RLC.B R13 ;[1] 137 | RLC.B R14 ;[1] 138 | RRC.B R13 ;[1] 139 | RRC.B R13 ;[1] 140 | 141 | RLC.B R12 ;[1] 142 | RLC.B R13 ;[1] 143 | RLC.B R12 ;[1] 144 | RLC.B R13 ;[1] 145 | 146 | SWPB R14 ;[1] 147 | BIS R13, R14 ;[] merge b15-b8(R14) and b7-b(R13) together into R14 as RN16 148 | 149 | POPM.A #1, R13 ;[] now data^RN16 is in R13 150 | XOR R14, R13 ;[] unXOR data & RN16 to reveal actual data value 151 | MOV R13, &(RWData.wrData);[] move the data out 152 | 153 | ;Load the Reply Buffer (rfidBuf) 154 | ;Load up function call, the transmit! bam! 155 | MOV (rfid.handle), R_scratch0;[3] bring in the RN16 156 | SWPB R_scratch0 ;[1] swap bytes so we can shove full word out in one call (MSByte into dataBuf[0],...) 157 | MOV R_scratch0, &(rfidBuf) ;[4] load the MSByte 158 | 159 | ;Calc CRC16! (careful, it will clobber R11-R15) 160 | ;uint16_t crc16_ccitt(uint16_t preload,uint8_t *dataPtr, uint16_t numBytes); 161 | MOV #(rfidBuf), R13 ;[2] load &dataBuf[0] as dataPtr 162 | MOV #(2), R14 ;[2] load num of bytes in ACK 163 | 164 | MOV #ZERO_BIT_CRC, R12 ;[1] 165 | 166 | CALLA #crc16_ccitt ;[5+196] 167 | ;onReturn: R12 holds the CRC16 value. 168 | 169 | ;STORE CRC16 170 | MOV.B R12, &(rfidBuf+3) ;[4] store lower CRC byte first 171 | SWPB R12 ;[1] move upper byte into lower byte 172 | MOV.B R12, &(rfidBuf+2) ;[4] store upper CRC byte 173 | 174 | CLRC 175 | RRC.B (rfidBuf) 176 | RRC.B (rfidBuf+1) 177 | RRC.B (rfidBuf+2) 178 | RRC.B (rfidBuf+3) 179 | RRC.B (rfidBuf+4) 180 | 181 | ;------------WAIT FOR FINAL BITS, THEN TRANSMIT----------------------------------------------------------------------------------- 182 | waitOnBits_4: 183 | MOV.W R5, R15 ;[1] 184 | CMP.W #NUM_WRITE_BITS, R15 ;[2] while(bits<66) 185 | JLO waitOnBits_4 ;[2] 186 | 187 | haltRxSM_inWriteHandle: 188 | ;this should be the equivalent of the RxSM call in C Code. WARNING: if RxSM() ever changes, change it here too!!!! 189 | DINT ;[2] 190 | NOP 191 | 192 | CLR &TA0CTL ;[4] 193 | 194 | ;TRANSMIT DELAY FOR TIMING 195 | MOV #TX_TIMING_WRITE, R15 ;[1] 196 | 197 | timing_delay_for_Write: 198 | DEC R15 ;[1] while((X--)>0); 199 | CMP #0XFFFF, R15 ;[1] 'when X underflows' 200 | JNE timing_delay_for_Write ;[2] 201 | 202 | ;TRANSMIT (16pre,38tillTxinTxFM0 -> 54cycles) 203 | MOV #rfidBuf, R12 ;[2] load the &rfidBuf[0] 204 | MOV #(4), R13 ;[1] load into corr reg (numBytes) 205 | MOV #1, R14 ;[1] load numBits=1 206 | MOV.B #TREXT_ON, R15 ;[3] load TRext (write always uses trext=1. wtf) 207 | 208 | CALLA #TxFM0 ;[5] call the routine 209 | ;TxFM0(volatile uint8_t *data,uint8_t numBytes,uint8_t numBits,uint8_t TRext); 210 | ;exit: state stays as Open! 211 | 212 | ;/** @todo Should we do this now, or at the top of keepDoingRFID? */ 213 | ;MOV &(INFO_ADDR_RXUCS0), &UCSCTL0;[] switch to corr Rx Frequency 214 | ;MOV &(INFO_ADDR_RXUCS1), &UCSCTL1;[] "" 215 | 216 | CALLA #RxClock ;Switch to RxClock 217 | 218 | ;/** @todo When exactly should we enable/disable rx comparator? */ 219 | ;BIC.B #PIN_RX_EN, &PRXEOUT ;[] disable the receive comparator now that we're done! 220 | 221 | BIC #(GIE), SR ;[1] don't need anymore bits, so turn off Rx_SM 222 | NOP 223 | CLR &TA0CTL 224 | 225 | ;Call user hook function if it's configured (if it's non-NULL) 226 | CMP.B #(0), &(RWData.wrHook);[] 227 | JEQ writeHandle_SkipHookCall ;[] 228 | MOV &(RWData.wrHook), R_scratch0 ;[] 229 | CALLA R_scratch0 ;[] 230 | 231 | writeHandle_SkipHookCall: 232 | 233 | ;Modify Abort Flag if necessary (i.e. if in std_mode 234 | BIT.B #(CMD_ID_WRITE), (rfid.abortOn);[] Should we abort on WRITE? 235 | JNZ writeHandle_BreakOutofRFID ;[] 236 | RETA ;[] else return w/o setting flag 237 | 238 | ; If configured to abort on successful WRITE, set abort flag cause it just happened! 239 | writeHandle_BreakOutofRFID: 240 | 241 | BIS.B #1, (rfid.abortFlag);[] by setting this bit we'll abort correctly! 242 | RETA 243 | 244 | writeHandle_Ignore: 245 | DINT ;[2] 246 | NOP 247 | s 248 | CLR &TA0CTL ;[4] 249 | POPM.A #1, R_scratch0 ;[] Need to pop this off stack to avoid returning to address (RN16) !! 250 | ;MOV &(INFO_ADDR_RXUCS0), &UCSCTL0;[] switch to corr Rx Frequency 251 | ;MOV &(INFO_ADDR_RXUCS1), &UCSCTL1;[] "" 252 | 253 | CALLA #RxClock ;Switch to RxClock 254 | 255 | RETA 256 | 257 | 258 | .end 259 | -------------------------------------------------------------------------------- /CCS/wisp-base/Sensors/accel.c: -------------------------------------------------------------------------------- 1 | /** 2 | * Driver for the ADXL362 accelerometer 3 | * 4 | * @author Aaron Parks 5 | * @date Aug 2013 6 | */ 7 | #include "accel.h" 8 | #include "accel_registers.h" 9 | #include "../globals.h" 10 | #include "../Timing/timer.h" 11 | #include "../wired/spi.h" 12 | 13 | /////////////////////////////////////////////////////////////////////////////// 14 | 15 | // TODO Translate these to a better format once SPI driver is fleshed out. Make them CONST. 16 | uint8_t const ADXL_READ_PARTID[] = {ADXL_CMD_READ_REG,ADXL_REG_PARTID,0x00}; 17 | uint8_t const ADXL_READ_DEVID[] = {ADXL_CMD_READ_REG,ADXL_REG_DEVID_AD,0x00}; 18 | uint8_t const ADXL_REAsxD_STATUS[] = {ADXL_CMD_READ_REG,ADXL_REG_STATUS,0x00}; 19 | uint8_t const ADXL_READ_XYZ_8BIT[] = {ADXL_CMD_READ_REG,ADXL_REG_XDATA,0x00,0x00,0x00}; 20 | uint8_t const ADXL_READ_XYZ_16BIT[] = {ADXL_CMD_READ_REG,ADXL_REG_XDATA_L,0x00,0x00,0x00,0x00,0x00,0x00}; 21 | uint8_t const ADXL_READ_XYZ_16BIT_FIFO[] = {ADXL_CMD_READ_FIFO,0x00,0x00,0x00,0x00,0x00,0x00}; 22 | uint8_t const ADXL_CONFIG_MEAS[] = {ADXL_CMD_WRITE_REG,ADXL_REG_POWER_CTL,0x22}; // Put the ADXL into measurement mode 23 | uint8_t const ADXL_CONFIG_STBY[] = {ADXL_CMD_WRITE_REG,ADXL_REG_POWER_CTL,0x00}; // Put the ADXL into standby mode 24 | uint8_t const ADXL_CONFIG_RESET[] = {ADXL_CMD_WRITE_REG,ADXL_REG_SOFT_RESET,0x52}; 25 | uint8_t const ADXL_CONFIG_FILTER[] = {ADXL_CMD_WRITE_REG,ADXL_REG_FILTER_CTL,0x14}; // 100Hz ODR +-8g 26 | uint8_t const ADXL_CONFIG_INTERRUPT[] = {ADXL_CMD_WRITE_REG,ADXL_REG_INTMAP1,0X01}; // Data ready interrupt, map to INT1 27 | 28 | uint8_t const ADXL_CONFIG_FIFO_CTL[] = {ADXL_CMD_WRITE_REG,ADXL_REG_FIFO_CONTROL,0X0A}; // FIFO in stream mode 29 | uint8_t const ADXL_CONFIG_FIFO_SAMPLE[] = {ADXL_CMD_WRITE_REG,ADXL_REG_FIFO_SAMPLES,6}; // 1*6 data to be stored in FIFO 30 | /////////////////////////////////////////////////////////////////////////////// 31 | 32 | /** 33 | * Turn on and start up the ADXL362 accelerometer. This leaves the ADXL running. 34 | */ 35 | 36 | BOOL ACCEL_reset() { 37 | 38 | // TODO Figure out optimal ADXL configuration for single measurement 39 | while(!SPI_acquirePort()); 40 | //BITSET(POUT_ACCEL_EN, PIN_ACCEL_EN); 41 | //BITSET(POUT_ACCEL_CS, PIN_ACCEL_CS); 42 | 43 | //TODO find the proper length of delay 44 | 45 | BITCLR(POUT_ACCEL_CS, PIN_ACCEL_CS); 46 | SPI_transaction(gpRxBuf, (uint8_t*)ADXL_CONFIG_RESET, sizeof(ADXL_CONFIG_RESET)); 47 | BITSET(POUT_ACCEL_CS, PIN_ACCEL_CS); 48 | 49 | SPI_releasePort(); 50 | 51 | //__delay_cycles(5000); 52 | 53 | //Timer_LooseDelay(LP_LSDLY_200MS);// To let ADXL start measuring? How much time is actually required here, if any? 54 | 55 | // TODO Use a pin interrupt to let us know when first measurement is ready 56 | return SUCCESS; 57 | } 58 | 59 | BOOL ACCEL_range() { 60 | 61 | // TODO Figure out optimal ADXL configuration for single measurement 62 | while(!SPI_acquirePort()); 63 | //BITSET(POUT_ACCEL_EN, PIN_ACCEL_EN); 64 | //BITSET(POUT_ACCEL_CS, PIN_ACCEL_CS); 65 | 66 | //TODO find the proper length of delay 67 | 68 | BITCLR(POUT_ACCEL_CS, PIN_ACCEL_CS); 69 | SPI_transaction(gpRxBuf, (uint8_t*)ADXL_CONFIG_FILTER, sizeof(ADXL_CONFIG_FILTER)); 70 | BITSET(POUT_ACCEL_CS, PIN_ACCEL_CS); 71 | 72 | SPI_releasePort(); 73 | 74 | //__delay_cycles(5000); 75 | 76 | //Timer_LooseDelay(LP_LSDLY_200MS);// To let ADXL start measuring? How much time is actually required here, if any? 77 | 78 | // TODO Use a pin interrupt to let us know when first measurement is ready 79 | return SUCCESS; 80 | } 81 | 82 | 83 | BOOL ACCEL_initialize() { 84 | 85 | // TODO Figure out optimal ADXL configuration for single measurement 86 | while(!SPI_acquirePort()); 87 | //BITSET(POUT_ACCEL_EN, PIN_ACCEL_EN); 88 | //BITSET(POUT_ACCEL_CS, PIN_ACCEL_CS); 89 | 90 | //TODO find the proper length of delay 91 | 92 | BITCLR(POUT_ACCEL_CS, PIN_ACCEL_CS); 93 | SPI_transaction(gpRxBuf, (uint8_t*)ADXL_CONFIG_MEAS, sizeof(ADXL_CONFIG_MEAS)); 94 | BITSET(POUT_ACCEL_CS, PIN_ACCEL_CS); 95 | // __delay_cycles(10); 96 | // BITCLR(POUT_ACCEL_CS, PIN_ACCEL_CS); 97 | // SPI_transaction(gpRxBuf, (uint8_t*)ADXL_CONFIG_INTERRUPT, sizeof(ADXL_CONFIG_INTERRUPT)); 98 | // BITSET(POUT_ACCEL_CS, PIN_ACCEL_CS); 99 | // __delay_cycles(10); 100 | // BITCLR(POUT_ACCEL_CS, PIN_ACCEL_CS); 101 | // SPI_transaction(gpRxBuf, (uint8_t*)ADXL_CONFIG_FIFO_CTL, sizeof(ADXL_CONFIG_FIFO_CTL)); 102 | // BITSET(POUT_ACCEL_CS, PIN_ACCEL_CS); 103 | // __delay_cycles(10); 104 | // BITCLR(POUT_ACCEL_CS, PIN_ACCEL_CS); 105 | // SPI_transaction(gpRxBuf, (uint8_t*)ADXL_CONFIG_FIFO_SAMPLE, sizeof(ADXL_CONFIG_FIFO_SAMPLE)); 106 | // BITSET(POUT_ACCEL_CS, PIN_ACCEL_CS); 107 | 108 | SPI_releasePort(); 109 | 110 | //__delay_cycles(5000); 111 | 112 | //Timer_LooseDelay(LP_LSDLY_200MS);// To let ADXL start measuring? How much time is actually required here, if any? 113 | 114 | // TODO Use a pin interrupt to let us know when first measurement is ready 115 | return SUCCESS; 116 | } 117 | 118 | BOOL ACCEL_initialize_withoutWait() { 119 | 120 | // TODO Figure out optimal ADXL configuration for single measurement 121 | while(!SPI_acquirePort()); 122 | //BITSET(POUT_ACCEL_EN, PIN_ACCEL_EN); 123 | BITSET(POUT_ACCEL_CS, PIN_ACCEL_CS); 124 | BITCLR(POUT_ACCEL_CS, PIN_ACCEL_CS); 125 | 126 | SPI_transaction(gpRxBuf, (uint8_t*)ADXL_CONFIG_MEAS, sizeof(ADXL_CONFIG_MEAS)); 127 | BITSET(POUT_ACCEL_CS, PIN_ACCEL_CS); 128 | 129 | SPI_releasePort(); 130 | 131 | //Timer_LooseDelay(LP_LSDLY_200MS);// To let ADXL start measuring? How much time is actually required here, if any? 132 | 133 | // TODO Use a pin interrupt to let us know when first measurement is ready 134 | return SUCCESS; 135 | } 136 | 137 | /** 138 | * Put the ADXL362 into a lower power standby state without gating power 139 | * 140 | * @todo Implement this function 141 | */ 142 | void ACCEL_standby() { 143 | 144 | 145 | } 146 | 147 | /** 148 | * Grab one sample from the ADXL362 accelerometer 149 | */ 150 | 151 | BOOL ACCEL_singleSample_FIFO(threeAxis_t_8* result) { 152 | 153 | while(!SPI_acquirePort()); 154 | 155 | BITCLR(POUT_ACCEL_CS, PIN_ACCEL_CS); 156 | SPI_transaction(gpRxBuf, (uint8_t*)ADXL_READ_XYZ_16BIT_FIFO, sizeof(ADXL_READ_XYZ_16BIT_FIFO)); 157 | BITSET(POUT_ACCEL_CS, PIN_ACCEL_CS); 158 | 159 | SPI_releasePort(); 160 | 161 | result->x = ((gpRxBuf[2] & 0x0F) << 4)|((gpRxBuf[1] & 0xF0) >> 4); 162 | result->y = ((gpRxBuf[4] & 0x0F) << 4)|((gpRxBuf[3] & 0xF0) >> 4); 163 | result->z = ((gpRxBuf[6] & 0x0F) << 4)|((gpRxBuf[5] & 0xF0) >> 4); 164 | 165 | return SUCCESS; 166 | } 167 | 168 | BOOL ACCEL_singleSample(threeAxis_t_8* result) { 169 | 170 | while(!SPI_acquirePort()); 171 | 172 | BITCLR(POUT_ACCEL_CS, PIN_ACCEL_CS); 173 | SPI_transaction(gpRxBuf, (uint8_t*)ADXL_READ_XYZ_8BIT, sizeof(ADXL_READ_XYZ_8BIT)); 174 | BITSET(POUT_ACCEL_CS, PIN_ACCEL_CS); 175 | 176 | SPI_releasePort(); 177 | 178 | result->x = gpRxBuf[2]; 179 | result->y = gpRxBuf[3]; 180 | result->z = gpRxBuf[4]; 181 | 182 | return SUCCESS; 183 | } 184 | 185 | BOOL ACCEL_readStat(threeAxis_t_8* result) { 186 | 187 | while(!SPI_acquirePort()); 188 | 189 | BITCLR(POUT_ACCEL_CS, PIN_ACCEL_CS); 190 | SPI_transaction(gpRxBuf, (uint8_t*)ADXL_REAsxD_STATUS, sizeof(ADXL_REAsxD_STATUS)); 191 | BITSET(POUT_ACCEL_CS, PIN_ACCEL_CS); 192 | 193 | SPI_releasePort(); 194 | 195 | result->x = gpRxBuf[2]; 196 | 197 | return SUCCESS; 198 | } 199 | 200 | BOOL ACCEL_readID(threeAxis_t_8* result) { 201 | 202 | while(!SPI_acquirePort()); 203 | 204 | BITCLR(POUT_ACCEL_CS, PIN_ACCEL_CS); 205 | SPI_transaction(gpRxBuf, (uint8_t*)ADXL_READ_DEVID, sizeof(ADXL_READ_DEVID)); 206 | BITSET(POUT_ACCEL_CS, PIN_ACCEL_CS); 207 | 208 | SPI_releasePort(); 209 | 210 | result->x = gpRxBuf[2]; 211 | 212 | return SUCCESS; 213 | } 214 | -------------------------------------------------------------------------------- /CCS/wisp-base/Sensors/accel.h: -------------------------------------------------------------------------------- 1 | /** 2 | * accel.h 3 | * 4 | * @date Aug 2013 5 | * @author Aaron Parks 6 | */ 7 | 8 | #ifndef ACCEL_H_ 9 | #define ACCEL_H_ 10 | 11 | #include "../globals.h" 12 | 13 | typedef struct { 14 | uint16_t x; 15 | uint16_t y; 16 | uint16_t z; 17 | } threeAxis_t; 18 | 19 | typedef struct { 20 | int8_t x; 21 | int8_t y; 22 | int8_t z; 23 | } threeAxis_t_8; 24 | 25 | BOOL ACCEL_initialize(); 26 | BOOL ACCEL_singleSample(threeAxis_t_8* result); 27 | BOOL ACCEL_readStat(threeAxis_t_8* result); 28 | BOOL ACCEL_readID(threeAxis_t_8* result); 29 | BOOL ACCEL_reset(); 30 | BOOL ACCEL_range(); 31 | BOOL ACCEL_singleSample_FIFO(threeAxis_t_8* result); 32 | 33 | 34 | #endif /* ACCEL_H_ */ 35 | -------------------------------------------------------------------------------- /CCS/wisp-base/Sensors/accel_registers.h: -------------------------------------------------------------------------------- 1 | /** 2 | * accel_registers.h 3 | * 4 | * Register map for the ADXL362 digital accelerometer 5 | * 6 | * @date Aug 2013 7 | * @author Aaron Parks 8 | */ 9 | 10 | #ifndef ACCEL_REGISTERS_H_ 11 | #define ACCEL_REGISTERS_H_ 12 | 13 | // 14 | // Commands used for ADXL362 read/write access. Commands are sent prior to data/adx. 15 | // 16 | #define ADXL_CMD_WRITE_REG 0x0A 17 | #define ADXL_CMD_READ_REG 0x0B 18 | #define ADXL_CMD_READ_FIFO 0x0D 19 | 20 | // 21 | // Registers in the ADXL362. Created from the register map given in Table 11 of the datasheet. 22 | // 23 | #define ADXL_REG_DEVID_AD 0x00 24 | #define ADXL_REG_DEVID_MST 0x01 25 | #define ADXL_REG_PARTID 0x02 26 | #define ADXL_REG_REVID 0x03 27 | #define ADXL_REG_XDATA 0x08 28 | #define ADXL_REG_YDATA 0x09 29 | #define ADXL_REG_ZDATA 0x0A 30 | #define ADXL_REG_STATUS 0x0B 31 | #define ADXL_REG_FIFO_ENTRIES_L 0x0C 32 | #define ADXL_REG_FIFO_ENTRIES_H 0x0D 33 | #define ADXL_REG_XDATA_L 0x0E 34 | #define ADXL_REG_XDATA_H 0x0F 35 | #define ADXL_REG_YDATA_L 0x10 36 | #define ADXL_REG_YDATA_H 0x11 37 | #define ADXL_REG_ZDATA_L 0x12 38 | #define ADXL_REG_ZDATA_H 0x13 39 | #define ADXL_REG_TEMP_L 0x14 40 | #define ADXL_REG_TEMP_H 0x15 41 | #define ADXL_REG_Reserved0 0x16 42 | #define ADXL_REG_Reserved1 0x17 43 | #define ADXL_REG_SOFT_RESET 0x1F 44 | #define ADXL_REG_THRESH_ACT_L 0x20 45 | #define ADXL_REG_THRESH_ACT_H 0x21 46 | #define ADXL_REG_TIME_ACT 0x22 47 | #define ADXL_REG_THRESH_INACT_L 0x23 48 | #define ADXL_REG_THRESH_INACT_H 0x24 49 | #define ADXL_REG_TIME_INACT_L 0x25 50 | #define ADXL_REG_TIME_INACT_H 0x26 51 | #define ADXL_REG_ACT_INACT_CTL 0x27 52 | #define ADXL_REG_FIFO_CONTROL 0x28 53 | #define ADXL_REG_FIFO_SAMPLES 0x29 54 | #define ADXL_REG_INTMAP1 0x2A 55 | #define ADXL_REG_INTMAP2 0x2B 56 | #define ADXL_REG_FILTER_CTL 0x2C 57 | #define ADXL_REG_POWER_CTL 0x2D 58 | #define ADXL_REG_SELF_TEST 0x2E 59 | 60 | 61 | #endif /* ACCEL_REGISTERS_H_ */ 62 | -------------------------------------------------------------------------------- /CCS/wisp-base/Sensors/adc.h: -------------------------------------------------------------------------------- 1 | /* 2 | * @file adc.h 3 | * @brief Provides an interface to the ADC module 4 | * 5 | * @author Ivar in 't Veen 6 | */ 7 | 8 | #ifndef ADC_H_ 9 | #define ADC_H_ 10 | 11 | #include 12 | #include 13 | 14 | /** 15 | * ADC reference voltage selection (see user guide 24.2.2.2 and 25.2.3) 16 | */ 17 | typedef enum { 18 | ADC_reference_1_2V = REFVSEL_0, 19 | ADC_reference_2_0V = REFVSEL_1, 20 | ADC_reference_2_5V = REFVSEL_2, 21 | } ADC_referenceSelect; 22 | 23 | /** 24 | * ADC precision (see user guide 25.3.3) 25 | */ 26 | typedef enum { 27 | ADC_precision_8bit = ADC12RES__8BIT, 28 | ADC_precision_10bit = ADC12RES__10BIT, 29 | ADC_precision_12bit = ADC12RES__12BIT, 30 | } ADC_precisionSelect; 31 | 32 | /** 33 | * ADC input channel, for now only external analog inputs 34 | */ 35 | typedef enum { 36 | ADC_input_temperature, 37 | ADC_input_A0 = ADC12INCH_0, 38 | ADC_input_A1 = ADC12INCH_1, 39 | ADC_input_A2 = ADC12INCH_2, 40 | ADC_input_A3 = ADC12INCH_3, 41 | ADC_input_A4 = ADC12INCH_4, 42 | ADC_input_A5 = ADC12INCH_5, 43 | ADC_input_A6 = ADC12INCH_6, 44 | ADC_input_A7 = ADC12INCH_7, 45 | ADC_input_A8 = ADC12INCH_8, 46 | ADC_input_A9 = ADC12INCH_9, 47 | ADC_input_A10 = ADC12INCH_10, 48 | ADC_input_A11 = ADC12INCH_11, 49 | ADC_input_A12 = ADC12INCH_12, 50 | ADC_input_A13 = ADC12INCH_13, 51 | ADC_input_A14 = ADC12INCH_14, 52 | ADC_input_A15 = ADC12INCH_15, 53 | ADC_input_A16 = ADC12INCH_16, 54 | ADC_input_A17 = ADC12INCH_17, 55 | ADC_input_A18 = ADC12INCH_18, 56 | ADC_input_A19 = ADC12INCH_19, 57 | ADC_input_A20 = ADC12INCH_20, 58 | ADC_input_A21 = ADC12INCH_21, 59 | ADC_input_A22 = ADC12INCH_22, 60 | ADC_input_A23 = ADC12INCH_23, 61 | ADC_input_A24 = ADC12INCH_24, 62 | ADC_input_A25 = ADC12INCH_25, 63 | ADC_input_A26 = ADC12INCH_26, 64 | ADC_input_A27 = ADC12INCH_27, 65 | ADC_input_A28 = ADC12INCH_28, 66 | ADC_input_A29 = ADC12INCH_29, 67 | ADC_input_A30 = ADC12INCH_30, 68 | ADC_input_A31 = ADC12INCH_31, 69 | } ADC_inputSelect; 70 | 71 | // Initialization functions 72 | void ADC_init(void); 73 | void ADC_initCustom(ADC_referenceSelect, ADC_precisionSelect, ADC_inputSelect); 74 | 75 | // Read functions 76 | uint16_t ADC_read(void); 77 | void ADC_asyncRead(void (*)(uint16_t)); 78 | uint16_t ADC_critRead(void); 79 | 80 | // Conversion functions 81 | uint16_t ADC_rawCorrection(uint16_t); 82 | uint16_t ADC_rawToVoltage(uint16_t); 83 | int16_t ADC_rawToTemperature(uint16_t); 84 | 85 | // Get ADC status 86 | uint8_t ADC_isBusy(void); 87 | uint8_t ADC_isReady(void); 88 | 89 | // Enable/Disable functions 90 | void ADC_enable(void); 91 | void ADC_disable(void); 92 | void ADC_enableConversion(void); 93 | void ADC_disableConversion(void); 94 | void ADC_enableInterrupts(void); 95 | void ADC_disableInterrupts(void); 96 | 97 | // Internal ADC settings functions, should not be needed for normal use (use ADC_initCustom() instead). 98 | void ADC_setReference(ADC_referenceSelect); 99 | ADC_referenceSelect ADC_getReference(void); 100 | void ADC_setPrecision(ADC_precisionSelect); 101 | ADC_precisionSelect ADC_getPrecision(void); 102 | void ADC_setInputChannel(ADC_inputSelect); 103 | ADC_inputSelect ADC_getInputChannel(void); 104 | void ADC_setSampleHold(void); 105 | 106 | #endif /* ADC_H_ */ 107 | -------------------------------------------------------------------------------- /CCS/wisp-base/Timing/timer.c: -------------------------------------------------------------------------------- 1 | /** 2 | * @file timer.c 3 | * 4 | * Provides hardware and software delay and alarm/scheduling functions 5 | * 6 | * @author Aaron Parks 7 | */ 8 | 9 | #include "timer.h" 10 | #include "../globals.h" 11 | 12 | static BOOL wakeOnDelayTimer; // A flag indicating we are waiting for a delay timer to expire 13 | 14 | //---------------------------------------------------------------------------- 15 | 16 | ///////////////////////////////////////////////////////////////////////////// 17 | /// Timer_LooseDelay 18 | /// 19 | /// This function uses the timer to generate delays that are at least as long as 20 | /// the specified duration 21 | /// 22 | /// \param usTime32kHz - The minimum amount of time to delay in ~30.5us units (1/32768Hz) 23 | /// @todo Move config register and value definitions to config.h 24 | ///////////////////////////////////////////////////////////////////////////// 25 | void Timer_LooseDelay(uint16_t usTime32kHz) 26 | { 27 | TA2CCTL0 = CCIE; // CCR0 interrupt enabled 28 | TA2CCR0 = usTime32kHz; 29 | TA2CTL = TASSEL_1 | MC_1 | TACLR; // ACLK(=REFO), upmode, clear TAR 30 | 31 | wakeOnDelayTimer = TRUE; 32 | 33 | while(wakeOnDelayTimer) { 34 | __bis_SR_register(LPM3_bits | GIE); 35 | } 36 | 37 | TA2CCTL0 = 0x00; 38 | TA2CTL = 0; 39 | 40 | } 41 | 42 | //---------------------------------------------------------------------------- 43 | 44 | //////////////////////////////////////////////////////////////////////////// 45 | // INT_TimerA1 46 | // 47 | // Interrupt 0 for timer A2 (CCR0). Used in low power ACLK delay routine. 48 | // 49 | //////////////////////////////////////////////////////////////////////////// 50 | #pragma vector=TIMER2_A0_VECTOR //TCCR0 Interrupt Vector for TIMER A1 51 | __interrupt void INT_Timer2A0(void) 52 | { 53 | if(wakeOnDelayTimer) { 54 | __bic_SR_register_on_exit(LPM3_bits); 55 | wakeOnDelayTimer = FALSE; 56 | } 57 | 58 | } 59 | 60 | //---------------------------------------------------------------------------- 61 | 62 | 63 | 64 | 65 | -------------------------------------------------------------------------------- /CCS/wisp-base/Timing/timer.h: -------------------------------------------------------------------------------- 1 | /** 2 | * @file timer.h 3 | * 4 | * An interface to low-level hardware and software timing and alarm/scheduling features 5 | * 6 | * @author Aaron Park 7 | */ 8 | 9 | #ifndef TIMER_H_ 10 | #define TIMER_H_ 11 | 12 | #include "../globals.h" 13 | 14 | /* 15 | * Timing macros based on LFXT clock frequency 16 | */ 17 | #define LP_LSDLY_2S 65535 // ~2s at 32.768kHz 18 | #define LP_LSDLY_1S 32768 // ~1s at 32.768kHz 19 | #define LP_LSDLY_500MS 16383 // ~500ms at 32.768kHz 20 | #define LP_LSDLY_200MS 6554 // ~200ms at 32.768kHz 21 | #define LP_LSDLY_100MS 3277 // ~100ms at 32.768kHz 22 | #define LP_LSDLY_50MS 1638 // ~50ms at 32.768kHz 23 | #define LP_LSDLY_20MS 655 // ~20ms at 32.768kHz 24 | #define LP_LSDLY_10MS 328 // ~10ms at 32.768kHz 25 | #define LP_LSDLY_5MS 164 // ~5ms at 32.768kHz 26 | #define LP_LSDLY_2MS 66 // ~2ms at 32.768kHz 27 | #define LP_LSDLY_1MS 33 // ~1ms at 32.768kHz 28 | 29 | 30 | /* 31 | * Function prototypes 32 | */ 33 | 34 | void Timer_LooseDelay(uint16_t usTime32kHz); 35 | 36 | 37 | #endif /*TIMER_H_*/ 38 | -------------------------------------------------------------------------------- /CCS/wisp-base/ccs2mspgcc.pl: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env perl 2 | # 3 | # Convert a CCS assembly source file to mspgcc assembly, line by line. 4 | # 5 | # TODO: Improve readability of terrifying inscrutable regular expressions. 6 | # 7 | 8 | sub main () { 9 | my %defines; 10 | 11 | # filter the source program line-by-line 12 | while (<>) { 13 | $suppress_print = 0; 14 | 15 | # .cdecls C,LIST, "foo.h" -> #include "foo.h" 16 | # .cdecls C,LIST, "foo.h", "bar.h" -> #include "foo.h"\n#include "bar.h" 17 | if (/^\s*\.cdecls\s+C,\s*LIST,\s*(("([^"]+)"(,\s*)?)+)(.*)$/) { 18 | $suppress_print = 1; 19 | my @includes = split /,\s*/, $1; 20 | foreach my $include (@includes) { 21 | print "#include $include\n"; 22 | } 23 | } 24 | 25 | # .define "bar", FOO 26 | if (s/^\s*\.define\s+"([^"]+)",\s*(\w+).*$/#define $2 $1/) { 27 | $defines{$2} = $1; 28 | } 29 | 30 | # .include "bar" 31 | s/^\s*\.include\s+"([^"]+)".*$/#include "$1"/; 32 | 33 | # hack: remove _CCS from included header filenames to get non-CCS 34 | # versions (which may or may not exist) 35 | if (/^\s*#include/) { 36 | s/_CCS\.h\b/\.h/; 37 | } 38 | 39 | # foo .set R5 -> .set foo, R5 40 | # (and capture the definition in %defines for later substitutions) 41 | if (s/^\s*(\w+)\s+\.set\s+(R\d+)(\s*.*)/.set $1, $2$3\n/) { 42 | $defines{$1} = $2; 43 | } 44 | 45 | # .def foo, bar -> (nothing) 46 | s/^\s*\.def\s+.*$//; 47 | 48 | # .ref foo -> (nothing) 49 | s/^\s*\.ref\s+.*$//; 50 | 51 | # .retain[refs] -> (nothing) 52 | s/^\s*\.retain(refs)?\s+.*$//; 53 | 54 | # #NNNNh -> #0xNNNN 55 | s/#([[:xdigit:]]+)h/#0x$1/; 56 | 57 | # OP SRC, N(foo) -> OP SRC, N(Rn) 58 | # OP SRC, bar(foo) -> OP SRC, bar(Rn) 59 | s/^(\s+)([A-Z\.]+)\s+([^,]+),\s*(([\w-]+)\((\w+)\))(\s*.*)/"$1$2 $3, " . ($defines{$5} ne '' ? $defines{$5} : $5) . "(" . ($defines{$6} || $6) . ")$7"/e; 60 | 61 | # OP N(foo), DEST -> OP N(Rn), DEST 62 | # OP bar(foo), DEST -> OP bar(Rn), DEST 63 | s/^(\s+)([A-Z\.]+)\s+(([\w-]+)\((\w+)\)),\s*([^,]+)(\s*.*)/"$1$2 " . ($defines{$4} ne '' ? $defines{$4} : $4) . "(" . ($defines{$5} || $5) . "), $6$7"/e; 64 | 65 | # OP SRC, N(SP) -> OP SRC, N(R1) 66 | # OP SRC, N(SR) -> OP SRC, N(R2) 67 | s/^(\s+)([A-Z\.]+)\s+([^,]+),\s*(([\d-]+)\(SP\))(\s*.*)/$1$2 $3, $5(R1)$6/; 68 | s/^(\s+)([A-Z\.]+)\s+([^,]+),\s*(([\d-]+)\(SR\))(\s*.*)/$1$2 $3, $5(R2)$6/; 69 | 70 | # OP N(SP), DEST -> OP N(R1), DEST 71 | # OP N(SR), DEST -> OP N(R2), DEST 72 | s/^(\s+)([A-Z\.]+)\s+(([\d-]+)\(SP\)),\s*([^,]+)(\s*.*)/$1$2 $4(R1), $5$6/; 73 | s/^(\s+)([A-Z\.]+)\s+(([\d-]+)\(SR\)),\s*([^,]+)(\s*.*)/$1$2 $4(R2), $5$6/; 74 | 75 | # OP #(X+Y), DEST -> OP X+Y, DEST 76 | # (generate a temporary symbol so the preprocessor can do the arithmetic 77 | # in the X+Y expression, and include that instead of the expression) 78 | if (/^(\s+)([A-Z\.]+)\s+#\(([^\)]+\s*[~\+\-|&]\s*[^\)]+)\)\s*,\s*([^\s]+)(\s*.*)/) { 79 | $suppress_print = 1; 80 | print "#define __TMPSYM $3\n"; 81 | print "$1$2 #__TMPSYM, $4$5\n"; 82 | print "#undef __TMPSYM\n"; 83 | } 84 | 85 | # NOPxN -> NOP NOP ... NOP 86 | if (/^(\s+)NOPx(\d+)(\s*.*)/) { 87 | $suppress_print = 1; 88 | for (my $i = 0; $i < int($2); $i++) { 89 | print "$1NOP\n"; 90 | } 91 | } 92 | 93 | print unless $suppress_print; 94 | } 95 | 96 | return 0; 97 | } 98 | 99 | exit(&main()); 100 | -------------------------------------------------------------------------------- /CCS/wisp-base/config/mem-map.h: -------------------------------------------------------------------------------- 1 | /** 2 | * @file mem-map.h 3 | * 4 | * This file defines macros for some key addresses in NVM 5 | * 6 | * @date Oct 15 2013 7 | * @author Aaron & Saman 8 | * 9 | */ 10 | 11 | #ifndef MEM_MAP_H_ 12 | #define MEM_MAP_H_ 13 | 14 | #define MEM_MAP_INFOD_START (0x1800) 15 | #define MEM_MAP_INFOD_END (0x187F) 16 | #define MEM_MAP_INFOD_SIZE (128) 17 | 18 | #define MEM_MAP_INFOC_START (0x1880) 19 | #define MEM_MAP_INFOC_END (0x18FF) 20 | #define MEM_MAP_INFOC_SIZE (128) 21 | 22 | #define MEM_MAP_INFOB_START (0x1900) 23 | #define MEM_MAP_INFOB_END (0x197F) 24 | #define MEM_MAP_INFOB_SIZE (128) 25 | 26 | #define MEM_MAP_INFOA_START (0x1980) /* DO NOT USE InfoA! contains factory programmed config */ 27 | #define MEM_MAP_INFOA_END (0x19FF) 28 | #define MEM_MAP_INFOA_SIZE (128) 29 | 30 | #define MEM_MAP_WISP_START (MEM_MAP_INFOD_START) 31 | #define MEM_MAP_WISP_END (MEM_MAP_INFOB_END) 32 | #define MEM_MAP_WISP_SIZE (128*3) 33 | // #define MEM_MAP_WISPCFG_SIZE (202) // Needed? 34 | 35 | #define BYTES_IN_INFO_SEG (128) /* number of bytes in a info mem segment from MSP430FR5969*/ 36 | 37 | // #define BANK_B (0) // Needed? 38 | // #define BANK_C (1) // Needed? 39 | // #define BANK_D (2) // Needed? 40 | 41 | // #define NUM_CLKS (33) // Not needed with FR5969 42 | 43 | 44 | 45 | /////////////////////////////////////////////////////////////////////////////// 46 | // START of WISP MEMORY MAP 47 | /////////////////////////////////////////////////////////////////////////////// 48 | // The WISP's "unique" tag ID. Two bytes. 49 | #define INFO_WISP_TAGID (MEM_MAP_WISP_START) 50 | 51 | // A table of some random 16 bit numbers, so the WISP doesn't need to 52 | // generate the whole thing on the fly. 2 bytes each. 53 | #define INFO_WISP_RAND_TBL (INFO_WISP_TAGID + 2) 54 | 55 | // A checksum. 56 | // TODO Is it for the entirety of WISP-specific info segments? 57 | // TODO Use this in WISP protocol firmware 58 | #define INFO_WISP_CHECKSUM (INFO_WISP_RAND_TBL + (NUM_RN16_2_STORE*2)) 59 | 60 | // Beginning of application memory section 61 | #define INFO_WISP_USR (INFO_WISP_CHECKSUM + 2) 62 | /////////////////////////////////////////////////////////////////////////////// 63 | // END of WISP MEMORY MAP 64 | /////////////////////////////////////////////////////////////////////////////// 65 | 66 | // Compute length of the application memory section 67 | #define LENGTH_USR_INFO (MEM_MAP_WISP_END - INFO_WISP_USR) 68 | 69 | 70 | 71 | #endif /* MEM_MAP_H_ */ 72 | -------------------------------------------------------------------------------- /CCS/wisp-base/config/pin-assign.h: -------------------------------------------------------------------------------- 1 | /** 2 | * @file pin-assign.h 3 | * 4 | * This file specifies pin assignments for the particular hardware platform used. 5 | * currently this file targets the WISP5-LRG platform. 6 | * 7 | * @author Aaron Parks, Justin Reina, UW Sensor Systems Lab 8 | * 9 | * @todo The pin definitions in this file are incomplete! Use script to autogenerate these. 10 | * 11 | */ 12 | 13 | #ifndef PIN_ASSIGN_H_ 14 | #define PIN_ASSIGN_H_ 15 | #include "wispGuts.h" 16 | 17 | /** @section IO CONFIGURATION 18 | * @brief This represents the default IO configuration for the WISP 5.0 rev 0.1 hardware 19 | * @details Pay very close attention to your IO direction and connections if you are modifying any of this! 20 | * 21 | * @note PIN_TX Must be BIT7 of a port register, as the register is used as a mini-FIFO in the transmit operation. BIT0 may also be 22 | * used with some modification of the transmit routine. Do NOT attempt to use other pins on PTXOUT as outputs. 23 | */ 24 | /************************************************************************************************************************************/ 25 | 26 | /* 27 | * Port 1 28 | */ 29 | 30 | // P1.0 - RX_BITLINE INPUT 31 | #define PIN_RX_BITLINE (BIT0) 32 | #define PRX_BITLINEOUT (P1OUT) 33 | 34 | // P1.4 - AUX3 - INPUT/OUTPUT 35 | #define PIN_AUX3 (BIT4) 36 | #define PIN_AUX3_OUT (P1OUT) 37 | #define PAUX3IN (P1IN) 38 | #define PDIR_AUX3 (P1DIR) 39 | #define PAUX3SEL0 (P1SEL0) 40 | #define PAUX3SEL1 (P1SEL1) 41 | 42 | // P1.6 - I2C_SDA - INPUT/OUTPUT 43 | #define PIN_I2C_SDA (BIT6) 44 | #define PI2C_SDAIN (P1IN) 45 | #define PDIR_I2C_SDA (P1DIR) 46 | #define PI2C_SDASEL0 (P1SEL0) 47 | #define PI2C_SDASEL1 (P1SEL1) 48 | 49 | // P1.7 - I2C_SCL - INPUT/OUTPUT 50 | #define PIN_I2C_SCL (BIT7) 51 | #define PDIR_I2C_SCL (P1DIR) 52 | #define PI2C_SCLSEL0 (P1SEL0) 53 | #define PI2C_SCLSEL1 (P1SEL1) 54 | 55 | /* 56 | * Port 2 57 | */ 58 | 59 | // P2.0 - UART TX - OUTPUT 60 | #define PIN_UART_TX (BIT0) 61 | #define PUART_TXSEL0 (P2SEL0) 62 | #define PUART_TXSEL1 (P2SEL1) 63 | 64 | // P2.1 - UART RX - INPUT 65 | #define PIN_UART_RX (BIT1) 66 | #define PUART_RXSEL0 (P2SEL0) 67 | #define PUART_RXSEL1 (P2SEL1) 68 | 69 | // P2.3 - RECEIVE - INPUT 70 | #define PIN_RX (BIT3) 71 | #define PRXIN (P2IN) 72 | #define PDIR_RX (P2DIR) 73 | #define PRXIES (P2IES) 74 | #define PRXIE (P2IE) 75 | #define PRXIFG (P2IFG) 76 | #define PRXSEL0 (P2SEL0) 77 | #define PRXSEL1 (P2SEL1) 78 | #define PRX_VECTOR_DEF (PORT2_VECTOR) 79 | 80 | // P2.4 - ACCEL_SCLK - OUTPUT 81 | #define PIN_ACCEL_SCLK (BIT4) 82 | #define PDIR_ACCEL_SCLK (P2DIR) 83 | #define PACCEL_SCLKSEL0 (P2SEL0) 84 | #define PACCEL_SCLKSEL1 (P2SEL1) 85 | 86 | // P2.5 - ACCEL_MOSI - OUTPUT 87 | #define PIN_ACCEL_MOSI (BIT5) 88 | #define PDIR_ACCEL_MOSI (P2DIR) 89 | #define PACCEL_MOSISEL0 (P2SEL0) 90 | #define PACCEL_MOSISEL1 (P2SEL1) 91 | 92 | 93 | // P2.6 - ACCEL_MISO - INPUT 94 | #define PIN_ACCEL_MISO (BIT6) 95 | #define PDIR_ACCEL_MISO (P2DIR) 96 | #define PACCEL_MISOSEL0 (P2SEL0) 97 | #define PACCEL_MISOSEL1 (P2SEL1) 98 | 99 | 100 | // P2.7 - TRANSMIT - OUTPUT 101 | #define PIN_TX (BIT7) 102 | #define PTXOUT (P2OUT) 103 | #define PTXDIR (P2DIR) 104 | 105 | /* 106 | * Port 3 107 | */ 108 | 109 | // P3.4 - AUX1 - INPUT/OUTPUT 110 | #define PIN_AUX1 (BIT4) 111 | #define PAUX1IN (P3IN) 112 | #define PDIR_AUX1 (P3DIR) 113 | #define PAUX1SEL0 (P3SEL0) 114 | #define PAUX1SEL1 (P3SEL1) 115 | 116 | // P3.5 - AUX2 - INPUT/OUTPUT 117 | #define PIN_AUX2 (BIT5) 118 | #define PAUX2IN (P3IN) 119 | #define PDIR_AUX2 (P3DIR) 120 | #define PAUX2SEL0 (P3SEL0) 121 | #define PAUX2SEL1 (P3SEL1) 122 | 123 | // P3.6 - ACCEL_INT2 - INPUT 124 | #define PIN_ACCEL_INT2 (BIT6) 125 | #define PDIR_ACCEL_INT2 (P3DIR) 126 | #define PACCEL_INT2SEL0 (P3SEL0) 127 | #define PACCEL_INT2SEL1 (P3SEL1) 128 | 129 | // P3.7 - ACCEL_INT1 - INPUT 130 | #define PIN_ACCEL_INT1 (BIT7) 131 | #define PDIR_ACCEL_INT1 (P3DIR) 132 | #define PACCEL_INT1SEL0 (P3SEL0) 133 | #define PACCEL_INT1SEL1 (P3SEL1) 134 | 135 | /* 136 | * Port 4 137 | */ 138 | 139 | // P4.0 - LED1 OUTPUT 140 | #define PLED1OUT (P4OUT) 141 | #define PIN_LED1 (BIT0) 142 | #define PDIR_LED1 (P4DIR) 143 | 144 | // P4.1 MEAS INPUT 145 | #define PIN_MEAS (BIT1) 146 | #define PMEASOUT (P4OUT) 147 | #define PMEASDIR (P4DIR) 148 | #define PMEASSEL0 (P4SEL0) 149 | #define PMEASSEL1 (P4SEL1) 150 | 151 | // P4.2 - ACCEL_EN - OUTPUT 152 | #define PIN_ACCEL_EN BIT2 153 | #define POUT_ACCEL_EN P4OUT 154 | #define PDIR_ACCEL_EN P4DIR 155 | 156 | // P4.3 - ACCEL_CS - OUTPUT 157 | #define PIN_ACCEL_CS BIT3 158 | #define POUT_ACCEL_CS P4OUT 159 | #define PDIR_ACCEL_CS P4DIR 160 | 161 | // P4.5 - RECEIVE ENABLE - OUTPUT 162 | #define PIN_RX_EN (BIT5) 163 | #define PRXEOUT (P4OUT) 164 | #define PDIR_RX_EN (P4DIR) 165 | 166 | 167 | // P4.6 - DEBUG LINE - OUTPUT 168 | #define PIN_DBG0 (BIT6) 169 | #define PDBGOUT (P4OUT) 170 | 171 | /* 172 | * Port 5 173 | */ 174 | 175 | /* 176 | * Port 6 177 | */ 178 | 179 | /* 180 | * Port J 181 | */ 182 | 183 | // PJ.1 MEAS_EN (OUTPUT) 184 | #define PMEAS_ENOUT (PJOUT) 185 | #define PMEAS_ENDIR (PJDIR) 186 | #define PIN_MEAS_EN (BIT1) 187 | 188 | 189 | // PJ.6 - LED2 190 | #define PDIR_LED2 (PJDIR) 191 | #define PLED2OUT (PJOUT) 192 | #define PIN_LED2 (BIT6) 193 | 194 | /* 195 | * ADC Channel definitions 196 | */ 197 | 198 | /** 199 | * Default IO setup 200 | */ 201 | /** @todo: Default for unused pins should be output, not tristate. */ 202 | /** @todo: Make sure the Tx port pin should be tristate not output and unused pin to be output*/ 203 | // Set as many as possible pins to output and drive them low 204 | #ifndef __ASSEMBLER__ 205 | #define setupDflt_IO() \ 206 | P1OUT = 0x00;\ 207 | P2OUT = 0x00;\ 208 | P3OUT = 0x00;\ 209 | P4OUT = 0x00;\ 210 | PJOUT = 0x00;\ 211 | P1DIR = ~PIN_RX_BITLINE;\ 212 | PJDIR = 0xFF;\ 213 | P2DIR = ~PIN_RX;\ 214 | P3DIR = 0xFF;\ 215 | P4DIR = (~PIN_MEAS & ~PIN_ACCEL_EN);\ 216 | 217 | #endif /* ~__ASSEMBLER__ */ 218 | 219 | #endif /* PIN_ASSIGN_H */ 220 | -------------------------------------------------------------------------------- /CCS/wisp-base/config/wispGuts.h: -------------------------------------------------------------------------------- 1 | /** @file wispGuts/wispGuts_5310.h 2 | * @brief Common container for device-specific includes and macros 3 | * @details 4 | * 5 | * @author Justin Reina, UW Sensor Systems Lab 6 | * @created 4.15.12 7 | * @last rev 8 | * 9 | * @notes 10 | */ 11 | 12 | #ifndef WISPGUTS_H_ 13 | #define WISPGUTS_H_ 14 | 15 | #include 16 | #include "mem-map.h" 17 | 18 | #define NUM_RN16_2_STORE 32 19 | 20 | #endif /* WISPGUTS_H_ */ 21 | -------------------------------------------------------------------------------- /CCS/wisp-base/globals.h: -------------------------------------------------------------------------------- 1 | /** @file globals.h 2 | * @brief Global definitions, typedefs, variables 3 | * @details 4 | * 5 | * @author Justin Reina, UW Sensor Systems Lab 6 | * @created 4.14.12 7 | * @last rev 8 | * 9 | * @notes 10 | */ 11 | 12 | #ifndef GLOBALS_H_ 13 | #define GLOBALS_H_ 14 | 15 | #include 16 | #include "config/pin-assign.h" /* low level pinDefs, IDs, etc. */ 17 | 18 | /* Global constants */ 19 | #define FOREVER (1) 20 | #define NEVER (0) 21 | 22 | #define TRUE (1) 23 | #define FALSE (0) 24 | 25 | #define HIGH (1) 26 | #define LOW (0) 27 | 28 | #define FAIL (0) 29 | #define SUCCESS (1) 30 | 31 | /** @todo write the comments for 4 below so I can actually read them... */ 32 | #define EPC_WORDS (6) /* length of EPC value in words, 0 <= n <= 31 */ 33 | 34 | #define CMDBUFF_SIZE (30) /* ? */ 35 | #define DATABUFF_SIZE (2+(EPC_WORDS<<1)+2) /* first2/last2 are reserved. put data into B2..B13 */ 36 | /* format: [storedPC|EPC|CRC16] */ 37 | #define RFIDBUFF_SIZE (1+16+2+2+50) /* longest command handled is the read command for 8 wds*/ 38 | 39 | #define USRBANK_SIZE (32) /* ? */ 40 | 41 | #define RFID_SEED (0x1234) //change this to change the RN16 selection behavior. if using multiple tags make sure to put a 42 | //different value on each one!! /** @todo: maybe have this generated in INFO Mems during cal*/ 43 | 44 | #define CMD_PARSE_AS_QUERY_REP (0x00) /** @todo describe these myst vals! */ 45 | #define CMD_PARSE_AS_OVF (0xFF) 46 | #define ENOUGH_BITS_TO_FORCE_EXECUTION (200) 47 | 48 | #define RESET_BITS_VAL (-2) /* this is the value which will reset the TA1_SM if found in 'bits (R5)' by rfid_sm */ 49 | 50 | // RFID TIMINGS (Taken a bit more liberately to support both R420 and R1000). 51 | #define RTCAL_MIN (200) // strictly calculated it should be 2.5*TARI = 2.5*6.25 = 15.625 us = 250 cycles 52 | #define RTCAL_MAX (300) // 3*TARI = 3*6.25 = 18.75 us = 300 cycles 53 | #define TRCAL_MIN (220) // We don't have time to do a MUL instruction, so we do 1.1*RTCAL_MIN instead of 1.1*RTCAL. 54 | #define TRCAL_MAX (900) // We don't have time to do a MUL instruction, so we do 3*RTCAL_MAX instead of 3*RTCAL. 55 | 56 | //TIMING----------------------------------------------------------------------------------------------------------------------------// 57 | //Goal is 56.125/62.500/68.875us. Trying to shoot for the lower to save (a little) power. 58 | //Note: 1 is minVal here due to the way decrement timing loop works. 0 will act like (0xFFFF+1)! 59 | #define TX_TIMING_QUERY (24)/*53.5-60us (depends on which Q value is loaded). */ 60 | #define TX_TIMING_ACK (20)/*60.0us*/ //(14,58.6us) 61 | 62 | #define TX_TIMING_QR (52)//58.8us 63 | #define TX_TIMING_QA (48)//60.0us 64 | #define TX_TIMING_REQRN (33)//60.4us 65 | #define TX_TIMING_READ (29)//58.0us 66 | #define TX_TIMING_WRITE (31)//60.4us 67 | 68 | #define QUERY_TIMEOUT_PERIOD (65535) 69 | 70 | //PROTOCOL DEFS---------------------------------------------------------------------------------------------------------------------// 71 | //(if # is rounded to 8 that is so cmd[n] was finished being shifted in) 72 | #define NUM_SEL_BITS (48) /* only need to parse through mask: (4+3+3+2+8+8+16 = 44 -> round to 48) */ 73 | #define NUM_QUERY_BITS (22) 74 | #define NUM_ACK_BITS (18) 75 | #define NUM_REQRN_BITS (40) 76 | #define NUM_WRITE_BITS (66) 77 | 78 | #define EPC_LENGTH (EPC_WORDS) /* 10h..14h EPC Length in Words. (6 is 96bit std) */ 79 | #define UMI (0x01) /* 15h User-Memory Indicator. '1' means the tag has user memory available. */ 80 | #define XI (0x00) /* 16h XPC_W1 indicator. '0' means the tag does not support this feature. */ 81 | #define NSI (0x00) /* 17h..1Fh Numbering System Identifier. */ 82 | /* all zeros means it isn't supported and is recommended default */ 83 | 84 | #define TREXT_ON (1) /* Tag should use TRext format for backscatter */ 85 | #define TREXT_OFF (0) /* Tag shouldn't use TRext format for backscatter */ 86 | #define WRITE_DATA_BLINK_LED (0x00) 87 | #define WRITE_DATA_NEW_ID (0x01) 88 | 89 | #ifndef __ASSEMBLER__ 90 | #include /* use xintx_t good var defs (e.g. uint8_t) */ 91 | #include "config/wispGuts.h" 92 | 93 | //TYPEDEFS------------------------------------------------------------------------------------------------------------------------ 94 | //THE RFID STRUCT FOR INVENTORY STATE VARS 95 | typedef struct { 96 | uint8_t TRext; /** @todo What is this member? */ 97 | uint16_t handle; /** @todo What is this member? */ 98 | uint16_t slotCount; /** @todo What is this member? */ 99 | uint8_t Q; /** @todo What is this member? */ 100 | 101 | uint8_t mode; /** @todo What is this member? */ 102 | uint8_t abortOn; /* List of command responses which cause the main RFID loop to return */ 103 | uint8_t abortFlag; /** @todo What is this member? */ 104 | uint8_t isSelected; /* state of being selected via the select command. Zero if not selected */ 105 | 106 | uint8_t rn8_ind; /* using our RN values in INFO_MEM, this points to the current one to use next */ 107 | 108 | uint16_t edge_capture_prev_ccr; /* Previous value of CCR register, used to compute delta in edge capture ISRs */ 109 | 110 | /** @todo Add the following: CMD_enum latestCmd; */ 111 | 112 | }RFIDstruct; /* in MODE_USES_SEL!! */ 113 | 114 | extern RFIDstruct rfid; 115 | 116 | //THE RW STRUCT FOR ACCESS STATE VARS 117 | typedef struct { 118 | //Parsed Cmd Fields 119 | uint8_t memBank; /* for Rd/Wr, this will hold memBank parsed from cmd when hook is called */ 120 | uint8_t wordPtr; /* for Rd/Wr, this will hold wordPtr parsed from cmd when hook is called */ 121 | uint16_t wrData; /* for Write this will hold the 16-bit Write Data value when hook is called */ 122 | uint16_t bwrByteCount; /* for BlockWrite this will hold the number of BYTES received */ 123 | uint16_t* bwrBufPtr; /* for BlockWrite this will hold a pointer to the data buffer containing write data */ 124 | 125 | //Function Hooks 126 | void* *akHook; /* this function is called with no params or return after an ack command response */ 127 | void* *wrHook; /* this function is called with no params or return after a write command response */ 128 | void* *bwrHook; /* this function is called with no params or return after a write command response */ 129 | void* *rdHook; /* this function is called with no params or return after a read command response */ 130 | 131 | //Memory Map Bank Ptrs 132 | uint8_t* RESBankPtr; /* for read command, this is a pointer to the virtual, mapped Reserved Bank */ 133 | uint8_t* EPCBankPtr; /* "" mapped EPC Bank */ 134 | uint8_t* TIDBankPtr; /* "" mapped TID Bank */ 135 | uint8_t* USRBankPtr; /* "" mapped USR Bank */ 136 | }RWstruct; 137 | 138 | // Boolean type 139 | typedef uint8_t BOOL; 140 | 141 | extern RWstruct RWData; 142 | 143 | //Memory Banks 144 | extern uint8_t cmd [CMDBUFF_SIZE]; 145 | extern uint8_t dataBuf [DATABUFF_SIZE]; 146 | extern uint8_t rfidBuf [RFIDBUFF_SIZE]; 147 | 148 | 149 | extern uint8_t usrBank [USRBANK_SIZE]; 150 | extern uint16_t wisp_ID; 151 | extern volatile uint8_t isDoingLowPwrSleep; 152 | 153 | //Register Macros 154 | #define bits _get_R5_register() 155 | #define dest _get_R4_register() 156 | #define setBits(x) _set_R5_register(x) 157 | #define setDest(x) _set_R4_register(x) 158 | 159 | //FUNCTION PROTOTYPES---------------------------------------------------------------------------------------------------------------// 160 | extern void WISP_doRFID(void); 161 | extern void TxFM0(volatile uint8_t *data, uint8_t numBytes, uint8_t numBits, uint8_t TRext); //sends out MSB first... 162 | 163 | // Linker hack: We need to reference assembly ISRs directly somewhere to force linker to include them in binary. 164 | extern void RX_ISR(void); 165 | extern void Timer0A0_ISR(void); 166 | extern void Timer0A1_ISR(void); 167 | extern void Timer1A0_ISR(void); 168 | 169 | extern void handleQuery (void); 170 | extern void handleAck (void); 171 | extern void handleQR (void); 172 | extern void handleQA (void); 173 | extern void handleReq_RN (void); 174 | extern void handleRead (void); 175 | extern void handleWrite (void); 176 | extern void handleBlockWrite(void); 177 | 178 | //MACROS----------------------------------------------------------------------------------------------------------------------------// 179 | #define BITSET(port,pin) port |= (pin) 180 | #define BITCLR(port,pin) port &= ~(pin) 181 | #define BITTOG(port,pin) port ^= (pin) 182 | 183 | //RFID DEFINITIONS------------------------------------------------------------------------------------------------------------------// 184 | 185 | #define STORED_PC ( ((EPC_LENGTH&0x001F)<<11) | ((UMI&0x0001)<<10) | ((XI&0x0001)<<9) | (NSI&0x01FF)<<01 ) 186 | //**per EPC Spec would be: 187 | //#define STORED_PC_GRR (uint16_t) ( ((NSI&0x01FF)<<7) | ((XI&0x01)<<6) | ((UMI&0x01)<<5) | (EPC_LENGTH&0x1F) ) 188 | 189 | //This is the ugliest, non-portable code ever BUT it allows the compiler to setup the memory at compile time. 190 | #define STORED_PC1 ( (STORED_PC&0xFF00)>>8 ) 191 | #define STORED_PC0 ( (STORED_PC&0x00FF)>>0 ) 192 | 193 | #endif /* __ASSEMBLER__ */ 194 | #endif /* GLOBALS_H_ */ 195 | -------------------------------------------------------------------------------- /CCS/wisp-base/internals/NOPdefs.asm: -------------------------------------------------------------------------------- 1 | .if $defined(__MSPGCC__) 2 | 3 | .macro twoNOPs 4 | NOP 5 | NOP 6 | .endm 7 | 8 | .macro NOPx2 9 | NOP; 10 | NOP; 11 | .endm 12 | 13 | .macro NOPx3 14 | NOP; 15 | NOP; 16 | NOP; 17 | .endm 18 | 19 | .macro NOPx4 20 | NOPx2 21 | NOPx2 22 | .endm 23 | 24 | .macro NOPx5 25 | NOPx4 26 | NOP 27 | .endm 28 | 29 | .macro NOPx6 30 | NOPx5 31 | NOP; 32 | .endm 33 | 34 | .macro NOPx7 35 | NOPx5 36 | NOPx2; 37 | .endm 38 | 39 | .macro NOPx9 40 | NOPx5 41 | NOPx4; 42 | .endm 43 | 44 | .macro NOPx10 45 | NOPx5; 46 | NOPx5; 47 | .endm 48 | 49 | .macro NOPx11 50 | NOPx10; 51 | NOP; 52 | .endm 53 | 54 | .macro NOPx13 55 | NOPx10; 56 | NOPx3; 57 | .endm 58 | 59 | .macro NOPx14 60 | NOPx10; 61 | NOPx3; 62 | .endm 63 | 64 | .macro NOPx15 65 | NOPx10; 66 | NOPx5; 67 | .endm 68 | 69 | .macro NOPx18 70 | NOPx15; 71 | NOPx3; 72 | .endm 73 | 74 | .macro NOPx20 75 | NOPx10; 76 | NOPx10; 77 | .endm 78 | 79 | .macro NOPx22 80 | NOPx20; 81 | NOPx2; 82 | .endm 83 | 84 | .macro NOPx23 85 | NOPx22; 86 | NOP; 87 | .endm 88 | 89 | .macro NOPx25 90 | NOPx15; 91 | NOPx10; 92 | .endm 93 | 94 | .macro NOPx29 95 | NOPx25; 96 | NOPx4; 97 | .endm 98 | 99 | 100 | .macro NOPx30 101 | NOPx15; 102 | NOPx10; 103 | .endm 104 | 105 | .macro NOPx35 106 | NOPx20; 107 | NOPx15; 108 | .endm 109 | 110 | .macro NOPx36 111 | NOPx35; 112 | NOP 113 | .endm 114 | 115 | .macro NOPx40 116 | NOPx20; 117 | NOPx20; 118 | .endm 119 | 120 | .else 121 | 122 | ; For Code Composer Studio: 123 | 124 | twoNOPs .macro 125 | NOP 126 | NOP 127 | .endm 128 | 129 | NOPx2 .macro 130 | NOP; 131 | NOP; 132 | .endm 133 | 134 | NOPx3 .macro 135 | NOP; 136 | NOP; 137 | NOP; 138 | .endm 139 | 140 | NOPx4 .macro 141 | NOPx2 142 | NOPx2 143 | .endm 144 | 145 | NOPx5 .macro 146 | NOPx4 147 | NOP 148 | .endm 149 | 150 | NOPx6 .macro 151 | NOPx5 152 | NOP; 153 | .endm 154 | 155 | NOPx7 .macro 156 | NOPx5 157 | NOPx2; 158 | .endm 159 | 160 | NOPx9 .macro 161 | NOPx5 162 | NOPx4; 163 | .endm 164 | 165 | NOPx10 .macro 166 | NOPx5; 167 | NOPx5; 168 | .endm 169 | 170 | NOPx11 .macro 171 | NOPx10; 172 | NOP; 173 | .endm 174 | 175 | NOPx13 .macro 176 | NOPx10; 177 | NOPx3; 178 | .endm 179 | 180 | NOPx14 .macro 181 | NOPx10; 182 | NOPx3; 183 | .endm 184 | 185 | NOPx15 .macro 186 | NOPx10; 187 | NOPx5; 188 | .endm 189 | 190 | NOPx18 .macro 191 | NOPx15; 192 | NOPx3; 193 | .endm 194 | 195 | NOPx20 .macro 196 | NOPx10; 197 | NOPx10; 198 | .endm 199 | 200 | NOPx22 .macro 201 | NOPx20; 202 | NOPx2; 203 | .endm 204 | 205 | NOPx23 .macro 206 | NOPx22; 207 | NOP; 208 | .endm 209 | 210 | NOPx25 .macro 211 | NOPx15; 212 | NOPx10; 213 | .endm 214 | 215 | NOPx29 .macro 216 | NOPx25; 217 | NOPx4; 218 | .endm 219 | 220 | 221 | NOPx30 .macro 222 | NOPx15; 223 | NOPx10; 224 | .endm 225 | 226 | NOPx35 .macro 227 | NOPx20; 228 | NOPx15; 229 | .endm 230 | 231 | NOPx36 .macro 232 | NOPx35; 233 | NOP 234 | .endm 235 | 236 | NOPx40 .macro 237 | NOPx20; 238 | NOPx20; 239 | .endm 240 | 241 | .endif 242 | -------------------------------------------------------------------------------- /CCS/wisp-base/internals/NOPdefs.h: -------------------------------------------------------------------------------- 1 | #ifndef __MSPGCC__ 2 | 3 | #define twoNOPs\ 4 | NOP;\ 5 | NOP; 6 | 7 | #define NOPx2\ 8 | NOP;\ 9 | NOP; 10 | 11 | #define NOPx3\ 12 | NOP;\ 13 | NOP;\ 14 | NOP; 15 | 16 | #define NOPx4\ 17 | NOPx2;\ 18 | NOPx2; 19 | 20 | #define NOPx5\ 21 | NOPx4;\ 22 | NOP; 23 | 24 | #define NOPx6\ 25 | NOPx5;\ 26 | NOP; 27 | 28 | #define NOPx7\ 29 | NOPx5;\ 30 | NOPx2; 31 | 32 | #define NOPx9\ 33 | NOPx5;\ 34 | NOPx4; 35 | 36 | #define NOPx10\ 37 | NOPx5;\ 38 | NOPx5; 39 | 40 | #define NOPx11\ 41 | NOPx10;\ 42 | NOP; 43 | 44 | #define NOPx13\ 45 | NOPx10;\ 46 | NOPx3; 47 | 48 | #define NOPx14\ 49 | NOPx10;\ 50 | NOPx3; 51 | 52 | #define NOPx15\ 53 | NOPx10;\ 54 | NOPx5; 55 | 56 | #define NOPx18\ 57 | NOPx15;\ 58 | NOPx3; 59 | 60 | #define NOPx20\ 61 | NOPx10;\ 62 | NOPx10; 63 | 64 | #define NOPx22\ 65 | NOPx20;\ 66 | NOPx2; 67 | 68 | #define NOPx23\ 69 | NOPx22;\ 70 | NOP; 71 | 72 | #define NOPx25\ 73 | NOPx15;\ 74 | NOPx10; 75 | 76 | #define NOPx29\ 77 | NOPx25;\ 78 | NOPx4; 79 | 80 | #define NOPx30\ 81 | NOPx15;\ 82 | NOPx10; 83 | 84 | #define NOPx35\ 85 | NOPx20;\ 86 | NOPx15; 87 | 88 | #define NOPx36\ 89 | NOPx35;\ 90 | NOP; 91 | 92 | #define NOPx40\ 93 | NOPx20;\ 94 | NOPx20; 95 | 96 | 97 | #else 98 | #define MACRO(x) .macro x 99 | 100 | MACRO(twoNOPs) 101 | NOP; 102 | NOP; 103 | .endm 104 | 105 | MACRO(NOPx2) 106 | NOP; 107 | NOP; 108 | .endm 109 | 110 | MACRO(NOPx3) 111 | NOP; 112 | NOP; 113 | NOP; 114 | .endm 115 | 116 | MACRO(NOPx4) 117 | NOPx2; 118 | NOPx2; 119 | .endm 120 | 121 | MACRO(NOPx5) 122 | NOPx4 123 | NOP 124 | .endm 125 | 126 | MACRO(NOPx6) 127 | NOPx5 128 | NOP; 129 | .endm 130 | 131 | MACRO(NOPx7) 132 | NOPx5 133 | NOPx2; 134 | .endm 135 | 136 | MACRO(NOPx9) 137 | NOPx5 138 | NOPx4; 139 | .endm 140 | 141 | MACRO(NOPx10) 142 | NOPx5; 143 | NOPx5; 144 | .endm 145 | 146 | MACRO(NOPx11) 147 | NOPx10; 148 | NOP; 149 | .endm 150 | 151 | MACRO(NOPx13) 152 | NOPx10; 153 | NOPx3; 154 | .endm 155 | 156 | MACRO(NOPx14) 157 | NOPx10; 158 | NOPx3; 159 | .endm 160 | 161 | MACRO(NOPx15) 162 | NOPx10; 163 | NOPx5; 164 | .endm 165 | 166 | MACRO(NOPx18) 167 | NOPx15; 168 | NOPx3; 169 | .endm 170 | 171 | MACRO(NOPx20) 172 | NOPx10; 173 | NOPx10; 174 | .endm 175 | 176 | MACRO(NOPx22) 177 | NOPx20; 178 | NOPx2; 179 | .endm 180 | 181 | MACRO(NOPx23) 182 | NOPx22; 183 | NOP; 184 | .endm 185 | 186 | MACRO(NOPx25) 187 | NOPx15; 188 | NOPx10; 189 | .endm 190 | 191 | MACRO(NOPx29) 192 | NOPx25; 193 | NOPx4; 194 | .endm 195 | 196 | 197 | MACRO(NOPx30) 198 | NOPx15; 199 | NOPx10; 200 | .endm 201 | 202 | MACRO(NOPx35) 203 | NOPx20; 204 | NOPx15; 205 | .endm 206 | 207 | MACRO(NOPx36) 208 | NOPx35; 209 | NOP 210 | .endm 211 | 212 | MACRO(NOPx40) 213 | NOPx20; 214 | NOPx20; 215 | .endm 216 | 217 | 218 | #endif 219 | -------------------------------------------------------------------------------- /CCS/wisp-base/internals/NOPdefs_CCS.h: -------------------------------------------------------------------------------- 1 | twoNOPs .macro 2 | NOP 3 | NOP 4 | .endm 5 | 6 | NOPx2 .macro 7 | NOP; 8 | NOP; 9 | .endm 10 | 11 | NOPx3 .macro 12 | NOP; 13 | NOP; 14 | NOP; 15 | .endm 16 | 17 | NOPx4 .macro 18 | NOPx2 19 | NOPx2 20 | .endm 21 | 22 | NOPx5 .macro 23 | NOPx4 24 | NOP 25 | .endm 26 | 27 | NOPx6 .macro 28 | NOPx5 29 | NOP; 30 | .endm 31 | 32 | NOPx7 .macro 33 | NOPx5 34 | NOPx2; 35 | .endm 36 | 37 | NOPx9 .macro 38 | NOPx5 39 | NOPx4; 40 | .endm 41 | 42 | NOPx10 .macro 43 | NOPx5; 44 | NOPx5; 45 | .endm 46 | 47 | NOPx11 .macro 48 | NOPx10; 49 | NOP; 50 | .endm 51 | 52 | NOPx13 .macro 53 | NOPx10; 54 | NOPx3; 55 | .endm 56 | 57 | NOPx14 .macro 58 | NOPx10; 59 | NOPx3; 60 | .endm 61 | 62 | NOPx15 .macro 63 | NOPx10; 64 | NOPx5; 65 | .endm 66 | 67 | NOPx18 .macro 68 | NOPx15; 69 | NOPx3; 70 | .endm 71 | 72 | NOPx20 .macro 73 | NOPx10; 74 | NOPx10; 75 | .endm 76 | 77 | NOPx22 .macro 78 | NOPx20; 79 | NOPx2; 80 | .endm 81 | 82 | NOPx23 .macro 83 | NOPx22; 84 | NOP; 85 | .endm 86 | 87 | NOPx25 .macro 88 | NOPx15; 89 | NOPx10; 90 | .endm 91 | 92 | NOPx29 .macro 93 | NOPx25; 94 | NOPx4; 95 | .endm 96 | 97 | 98 | NOPx30 .macro 99 | NOPx15; 100 | NOPx10; 101 | .endm 102 | 103 | NOPx35 .macro 104 | NOPx20; 105 | NOPx15; 106 | .endm 107 | 108 | NOPx36 .macro 109 | NOPx35; 110 | NOP 111 | .endm 112 | 113 | NOPx40 .macro 114 | NOPx20; 115 | NOPx20; 116 | .endm 117 | 118 | -------------------------------------------------------------------------------- /CCS/wisp-base/internals/wisp-init.c: -------------------------------------------------------------------------------- 1 | /** 2 | * @file wisp-init.c 3 | * 4 | * Provides the initialization routines for the WISP. 5 | * 6 | * @author Aaron Parks, Justin Reina 7 | */ 8 | 9 | #include "../globals.h" 10 | 11 | // Gen2 state variables 12 | RFIDstruct rfid; // inventory state 13 | RWstruct RWData; // tag-access state 14 | 15 | // Buffers for Gen2 protocol data 16 | uint8_t cmd[CMDBUFF_SIZE]; // command from reader 17 | uint8_t dataBuf[DATABUFF_SIZE]; // tag's response to reader 18 | uint8_t rfidBuf[RFIDBUFF_SIZE]; // internal buffer used by RFID handles 19 | 20 | /* 21 | * Globals 22 | */ 23 | 24 | volatile uint8_t isDoingLowPwrSleep; 25 | 26 | 27 | /** @fcn void WISP_init (void) 28 | * @brief Called by client code as a first step after PUC 29 | * 30 | * @section Purpose 31 | * 32 | * @post the RAM, clock and peripherals are initialized for use 33 | * 34 | * @section Timing 35 | * -# The routine is entered X cycles into the CPU's operation. 36 | * -# The routine tries to sleep Y cycles into the CPU's operation. 37 | * -# From a cold-boot, the CPU is configured for fCPU = Z MHz. (i.e. ...?) 38 | * 39 | * @section Considerations 40 | * -# If preforming a 'sleep_till_full_power' operation, 41 | */ 42 | void WISP_init(void) { 43 | 44 | WDTCTL = WDTPW | WDTHOLD; // Stop watchdog timer 45 | 46 | // Disable the GPIO power-on default high-impedance mode to activate previously configured port settings. 47 | PM5CTL0 &= ~LOCKLPM5; // Lock LPM5. 48 | 49 | // Disable FRAM wait cycles to allow clock operation over 8MHz 50 | FRCTL0 = 0xA500 | ((1) << 4); //FRCTLPW | NWAITS_1; 51 | 52 | // Setup default IO 53 | setupDflt_IO(); 54 | 55 | PRXEOUT |= PIN_RX_EN; /** TODO: enable PIN_RX_EN only when needed in the future */ 56 | 57 | CSCTL0_H = 0xA5; 58 | CSCTL1 = DCOFSEL_0; //1MHz 59 | CSCTL2 = SELA__VLOCLK + SELS_3 + SELM_3; 60 | CSCTL3 = DIVA_0 + DIVS_0 + DIVM_0; 61 | BITCLR(CSCTL6 , (MODCLKREQEN|SMCLKREQEN|MCLKREQEN)); 62 | BITSET(CSCTL6 , ACLKREQEN); 63 | 64 | 65 | // Initialize Gen2 standard memory banks 66 | RWData.EPCBankPtr = &dataBuf[0]; // volatile 67 | RWData.RESBankPtr = (uint8_t*) MEM_MAP_INFOC_START; // nonvolatile 68 | RWData.TIDBankPtr = (uint8_t*) MEM_MAP_INFOB_START; // nonvolatile 69 | RWData.USRBankPtr = (uint8_t*) &usrBank[0]; // volatile 70 | 71 | // Initialize rfid transaction mode 72 | rfid.isSelected = TRUE; 73 | rfid.abortOn = 0x00; 74 | 75 | isDoingLowPwrSleep = FALSE; 76 | 77 | // Initialize callbacks to null in case user doesn't configure them 78 | RWData.akHook =0; 79 | RWData.rdHook= 0; 80 | RWData.wrHook =0; 81 | RWData.bwrHook=0; 82 | 83 | return; 84 | } 85 | 86 | -------------------------------------------------------------------------------- /CCS/wisp-base/nvm/fram.c: -------------------------------------------------------------------------------- 1 | /** 2 | * @file fram.c 3 | * 4 | * Provides access routines for FRAM non-volatile memory in the MSP430FR5xxx 5 | * 6 | * @author Saman Naderiparizi, Aaron Parks 7 | */ 8 | 9 | #include 10 | #include "fram.h" 11 | 12 | /** 13 | * Call before writing anything to FRAM 14 | */ 15 | void FRAM_init(void){ 16 | 17 | FRCTL0_H |= (FWPW) >> 8; 18 | __delay_cycles(3); 19 | } 20 | 21 | ////// Write functions with the physical address 22 | 23 | void FRAM_write_long_array(uint32_t *address, uint16_t numberOfLongs , uint32_t *writeData){ 24 | 25 | int i; 26 | 27 | for(i = 0 ; i < numberOfLongs ; i++){ 28 | *address = *writeData; 29 | writeData++; 30 | address++; 31 | } 32 | 33 | } 34 | 35 | void FRAM_write_int_array(uint16_t *address, uint16_t numberOfInts , uint16_t *writeData){ 36 | 37 | int i; 38 | 39 | for(i = 0 ; i < numberOfInts ; i++){ 40 | *address = *writeData; 41 | writeData++; 42 | address++; 43 | } 44 | 45 | } 46 | 47 | void FRAM_write_char_array(uint8_t *address, uint16_t numberOfChars , uint8_t *writeData){ 48 | 49 | int i; 50 | 51 | for(i = 0 ; i < numberOfChars ; i++){ 52 | *address = *writeData; 53 | writeData++; 54 | address++; 55 | } 56 | } 57 | 58 | ///// Write to the offset address according to the specified segment. 59 | ///// info segment A 60 | 61 | void FRAM_write_infoA_long(int addressOffset , uint16_t numberOfLongs , uint32_t *writeData){ 62 | 63 | unsigned long *address; 64 | address = ((unsigned long *)FRAM_INFOA_START_ADX) + addressOffset; 65 | 66 | FRAM_write_long_array(address , numberOfLongs , writeData); 67 | 68 | } 69 | 70 | void FRAM_write_infoA_int(int addressOffset , uint16_t numberOfInts , uint16_t *writeData){ 71 | 72 | unsigned int *address; 73 | address = ((unsigned int *)FRAM_INFOA_START_ADX) + addressOffset; 74 | 75 | FRAM_write_int_array(address , numberOfInts , writeData); 76 | 77 | } 78 | 79 | void FRAM_write_infoA_char(int addressOffset , uint16_t numberOfChars , uint8_t *writeData){ 80 | 81 | unsigned char *address; 82 | address = ((unsigned char *) FRAM_INFOA_START_ADX) + addressOffset; 83 | 84 | FRAM_write_char_array(address , numberOfChars , writeData); 85 | } 86 | 87 | ///////////// info segment B 88 | 89 | void FRAM_write_infoB_long(int addressOffset , uint16_t numberOfLongs , uint32_t *writeData){ 90 | 91 | unsigned long *address; 92 | address = ((unsigned long *)FRAM_INFOB_START_ADX) + addressOffset; 93 | 94 | FRAM_write_long_array(address , numberOfLongs , writeData); 95 | 96 | } 97 | 98 | void FRAM_write_infoB_int(int addressOffset , uint16_t numberOfInts , uint16_t *writeData){ 99 | 100 | unsigned int *address; 101 | address = ((unsigned int *)FRAM_INFOB_START_ADX) + addressOffset; 102 | 103 | FRAM_write_int_array(address , numberOfInts , writeData); 104 | 105 | } 106 | 107 | void FRAM_write_infoB_char(int addressOffset , uint16_t numberOfChars , uint8_t *writeData){ 108 | 109 | unsigned char *address; 110 | address = ((unsigned char *) FRAM_INFOB_START_ADX) + addressOffset; 111 | 112 | FRAM_write_char_array(address , numberOfChars , writeData); 113 | } 114 | 115 | ///////////// info segment C 116 | 117 | void FRAM_write_infoC_long(int addressOffset , uint16_t numberOfLongs , uint32_t *writeData){ 118 | 119 | unsigned long *address; 120 | address = ((unsigned long *)FRAM_INFOC_START_ADX) + addressOffset; 121 | 122 | FRAM_write_long_array(address , numberOfLongs , writeData); 123 | 124 | } 125 | 126 | void FRAM_write_infoC_int(int addressOffset , uint16_t numberOfInts , uint16_t *writeData){ 127 | 128 | unsigned int *address; 129 | address = ((unsigned int *)FRAM_INFOC_START_ADX) + addressOffset; 130 | 131 | FRAM_write_int_array(address , numberOfInts , writeData); 132 | 133 | } 134 | 135 | void FRAM_write_infoC_char(int addressOffset , uint16_t numberOfChars , uint8_t *writeData){ 136 | 137 | unsigned char *address; 138 | address = ((unsigned char *) FRAM_INFOC_START_ADX) + addressOffset; 139 | 140 | FRAM_write_char_array(address , numberOfChars , writeData); 141 | } 142 | 143 | ///////////// info segment D 144 | 145 | void FRAM_write_infoD_long(int addressOffset , uint16_t numberOfLongs , uint32_t *writeData){ 146 | 147 | unsigned long *address; 148 | address = ((unsigned long *)FRAM_INFOD_START_ADX) + addressOffset; 149 | 150 | FRAM_write_long_array(address , numberOfLongs , writeData); 151 | 152 | } 153 | 154 | void FRAM_write_infoD_int(int addressOffset , uint16_t numberOfInts , uint16_t *writeData){ 155 | 156 | unsigned int *address; 157 | address = ((unsigned int *)FRAM_INFOD_START_ADX) + addressOffset; 158 | 159 | FRAM_write_int_array(address , numberOfInts , writeData); 160 | 161 | } 162 | 163 | void FRAM_write_infoD_char(int addressOffset , uint16_t numberOfChars , uint8_t *writeData){ 164 | 165 | unsigned char *address; 166 | address = ((unsigned char *) FRAM_INFOD_START_ADX) + addressOffset; 167 | 168 | FRAM_write_char_array(address , numberOfChars , writeData); 169 | } 170 | 171 | 172 | ///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// 173 | ///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// 174 | ///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// 175 | ///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// 176 | 177 | ////// Read functions with the physical address 178 | 179 | uint32_t FRAM_read_long(uint32_t *address){ 180 | 181 | return *address; 182 | 183 | } 184 | 185 | uint16_t FRAM_read_int(uint16_t *address){ 186 | 187 | return *address; 188 | 189 | } 190 | 191 | uint8_t FRAM_read_char(uint8_t *address){ 192 | 193 | return *address; 194 | } 195 | 196 | ///// Write to the offset address according to the specified segment. 197 | ///// info segment A 198 | 199 | uint32_t FRAM_read_infoA_long(int addressOffset){ 200 | 201 | unsigned long *address; 202 | address = ((unsigned long *)FRAM_INFOA_START_ADX) + addressOffset; 203 | 204 | return *address; 205 | } 206 | 207 | uint16_t FRAM_read_infoA_int(int addressOffset){ 208 | 209 | unsigned int *address; 210 | address = ((unsigned int *)FRAM_INFOA_START_ADX) + addressOffset; 211 | 212 | return *address; 213 | } 214 | 215 | uint8_t FRAM_read_infoA_char(int addressOffset){ 216 | 217 | unsigned char *address; 218 | address = ((unsigned char *) FRAM_INFOA_START_ADX) + addressOffset; 219 | 220 | return *address; 221 | } 222 | 223 | ///////////// info segment B 224 | 225 | uint32_t FRAM_read_infoB_long(int addressOffset){ 226 | 227 | unsigned long *address; 228 | address = ((unsigned long *)FRAM_INFOB_START_ADX) + addressOffset; 229 | 230 | return *address; 231 | 232 | } 233 | 234 | uint16_t FRAM_read_infoB_int(int addressOffset){ 235 | 236 | unsigned int *address; 237 | address = ((unsigned int *)FRAM_INFOB_START_ADX) + addressOffset; 238 | 239 | return *address; 240 | 241 | } 242 | 243 | uint8_t FRAM_read_infoB_char(int addressOffset){ 244 | 245 | unsigned char *address; 246 | address = ((unsigned char *) FRAM_INFOB_START_ADX) + addressOffset; 247 | 248 | return *address; 249 | 250 | } 251 | 252 | ///////////// info segment C 253 | 254 | uint32_t FRAM_read_infoC_long(int addressOffset){ 255 | 256 | unsigned long *address; 257 | address = ((unsigned long *)FRAM_INFOC_START_ADX) + addressOffset; 258 | 259 | return *address; 260 | 261 | } 262 | 263 | uint16_t FRAM_read_infoC_int(int addressOffset){ 264 | 265 | unsigned int *address; 266 | address = ((unsigned int *)FRAM_INFOC_START_ADX) + addressOffset; 267 | 268 | return *address; 269 | 270 | } 271 | 272 | uint8_t FRAM_read_infoC_char(int addressOffset){ 273 | 274 | unsigned char *address; 275 | address = ((unsigned char *) FRAM_INFOC_START_ADX) + addressOffset; 276 | 277 | return *address; 278 | 279 | } 280 | 281 | ///////////// info segment D 282 | 283 | uint32_t FRAM_read_infoD_long(int addressOffset){ 284 | 285 | unsigned long *address; 286 | address = ((unsigned long *)FRAM_INFOD_START_ADX) + addressOffset; 287 | 288 | return *address; 289 | 290 | } 291 | 292 | uint16_t FRAM_read_infoD_int(int addressOffset){ 293 | 294 | unsigned int *address; 295 | address = ((unsigned int *)FRAM_INFOD_START_ADX) + addressOffset; 296 | 297 | return *address; 298 | 299 | } 300 | 301 | uint8_t FRAM_read_infoD_char(int addressOffset){ 302 | 303 | unsigned char *address; 304 | address = ((unsigned char *)FRAM_INFOD_START_ADX) + addressOffset; 305 | 306 | return *address; 307 | 308 | } 309 | 310 | 311 | 312 | 313 | 314 | -------------------------------------------------------------------------------- /CCS/wisp-base/nvm/fram.h: -------------------------------------------------------------------------------- 1 | /** 2 | * @file fram.h 3 | * 4 | * Provides an interface to the FRAM access routines for the MSP430FR5xxx 5 | * 6 | * @author Saman Naderiparizi, Aaron Parks 7 | */ 8 | 9 | #ifndef FRAM_H_ 10 | #define FRAM_H_ 11 | 12 | #include 13 | 14 | #define FRAM_INFOA_START_ADX 0x1980 15 | #define FRAM_INFOB_START_ADX 0x1900 16 | #define FRAM_INFOC_START_ADX 0x1880 17 | #define FRAM_INFOD_START_ADX 0x1800 18 | 19 | #define FRAM_write(address, writeData) (*(address))=(writeData) 20 | 21 | void FRAM_init(void); 22 | 23 | void FRAM_write_long_array(uint32_t *address , uint16_t numberOfLongs , uint32_t *writeData); 24 | void FRAM_write_int_array(uint16_t *address , uint16_t numberOfInts , uint16_t *writeData); 25 | void FRAM_write_char_array(uint8_t *address , uint16_t numberOfChars , uint8_t *writeData); 26 | 27 | void FRAM_write_infoA_long(int addressOffset , uint16_t numberOfLongs , uint32_t *writeData); 28 | void FRAM_write_infoA_int(int addressOffset , uint16_t numberOfInts , uint16_t *writeData); 29 | void FRAM_write_infoA_char(int addressOffset , uint16_t numberOfChars , uint8_t *writeData); 30 | 31 | void FRAM_write_infoB_long(int addressOffset , uint16_t numberOfLongs , uint32_t *writeData); 32 | void FRAM_write_infoB_int(int addressOffset , uint16_t numberOfInts , uint16_t *writeData); 33 | void FRAM_write_infoB_char(int addressOffset , uint16_t numberOfChars , uint8_t *writeData); 34 | 35 | void FRAM_write_infoC_long(int addressOffset , uint16_t numberOfLongs , uint32_t *writeData); 36 | void FRAM_write_infoC_int(int addressOffset , uint16_t numberOfInts , uint16_t *writeData); 37 | void FRAM_write_infoC_char(int addressOffset , uint16_t numberOfChars , uint8_t *writeData); 38 | 39 | void FRAM_write_infoD_long(int addressOffset , uint16_t numberOfLongs , uint32_t *writeData); 40 | void FRAM_write_infoD_int(int addressOffset , uint16_t numberOfInts , uint16_t *writeData); 41 | void FRAM_write_infoD_char(int addressOffset , uint16_t numberOfChars , uint8_t *writeData); 42 | 43 | 44 | uint32_t FRAM_read_long(uint32_t *address); 45 | uint16_t FRAM_read_int(uint16_t *address); 46 | uint8_t FRAM_read_char(uint8_t *address); 47 | 48 | uint32_t FRAM_read_infoA_long(int addressOffset); 49 | uint16_t FRAM_read_infoA_int(int addressOffset); 50 | uint8_t FRAM_read_infoA_char(int addressOffset); 51 | 52 | uint32_t FRAM_read_infoB_long(int addressOffset); 53 | uint16_t FRAM_read_infoB_int(int addressOffset); 54 | uint8_t FRAM_read_infoB_char(int addressOffset); 55 | 56 | uint32_t FRAM_read_infoC_long(int addressOffset); 57 | uint16_t FRAM_read_infoC_int(int addressOffset); 58 | uint8_t FRAM_read_infoC_char(int addressOffset); 59 | 60 | uint32_t FRAM_read_infoD_long(int addressOffset); 61 | uint16_t FRAM_read_infoD_int(int addressOffset); 62 | uint8_t FRAM_read_infoD_char(int addressOffset); 63 | 64 | #endif /* FRAM_H_ */ 65 | -------------------------------------------------------------------------------- /CCS/wisp-base/rand/rand.c: -------------------------------------------------------------------------------- 1 | /** 2 | * rand.c 3 | * 4 | * Random number generator using noisy LSb from the ADC12 5 | * 6 | * @author Aaron Parks, Justin Reina 7 | */ 8 | 9 | #include "../globals.h" 10 | 11 | /** @fcn adc12_genRN16 (void) 12 | * @brief generate a random 16-bit value by sampling b0 of the temperature sensor. 13 | * 14 | * Use the 10-bit ADC in repeat-single-sample mode to read the ADC 16 times, keeping each samples' b0 and assembling a full word 15 | * from them at the end. Use the WISPs recently acquired ADC_clk setting, just cause its available. 16 | * 17 | * @return (int16_t) a random 16 bit value. 18 | * 19 | */ 20 | uint16_t RAND_adcRand16 (void) { 21 | uint8_t i; 22 | uint16_t returnVal; /* the final RN16 value to return */ 23 | 24 | //------------------------------Turn on reference module's VREF and Temp Sense--------------------------------------------------// 25 | REFCTL0 = REFVSEL_1 + REFON; /* turn module on @ 2V with temp sense active */ 26 | 27 | // @todo Replace with low power delay 28 | __delay_cycles(75*16); /* do an ~75us delay for ref to stabilize */ 29 | 30 | //-----------------------------------Initalize the ADC to known state-----------------------------------------------------------// 31 | ADC12CTL0 = 0; 32 | ADC12CTL1 = 0; 33 | ADC12CTL2 = 0; 34 | ADC12MCTL0 = 0; 35 | ADC12IER0 = 0; 36 | 37 | //----------------------------Setup the ADC for Repeat Single-Sample on Temp Sensor---------------------------------------------// 38 | 39 | //--------Clocking Stuff------------// 40 | // ADC12CTL1 |= ADC12SSEL_2; /* ADC Clk src is SMCLK */ 41 | ADC12CTL1 |= ADC12DIV_0; /* ADC Clk is /1 off source */ 42 | 43 | //---------S&H Config---------------// 44 | //ADC12CTL0 |= ADC12MSC; /* setup for repeated samples off first SHI pulse */ 45 | // ADC12CTL1 |= ADC12SHS0; /* S&H source comes directly from ADC12SC */ 46 | ADC12CTL1 |= ADC12SHP; /* enable using the S&H Sampling Timer (longer sample time (SHT00) */ 47 | ADC12CTL0 |= ADC12SHT0_2; /* 16 S&H Cycle cause we need min 13 for the 12-bit res sample */ 48 | 49 | //--------Msrmnt Source-------------// 50 | ADC12CTL2 |= ADC12RES_2; /* 10 bit sample res to max noise res in msr */ 51 | ADC12MCTL0|= ADC12VRSEL_1; /* reference is VREF and AVSS */ 52 | ADC12MCTL0|= ADC12INCH_10; /* setup to A10 */ 53 | 54 | //-----Conversion Sequence----------// 55 | ADC12CTL1 |= ADC12CONSEQ_0; /* mode is single-sample on single-channel */ 56 | 57 | //-----Turn On the ADC--------------// 58 | ADC12CTL0 |= ADC12ON; /* turn that sucker on! */ 59 | while (ADC12CTL1 & ADC12BUSY); /* Wait if ADC12 core is active (i.e. wait until its inactive, safety) */ 60 | 61 | //-------------------------------------Acquire 16 measurements!-----------------------------------------------------------------// 62 | ADC12CTL0 |= ADC12ENC+ADC12SC; /* start that conversion! */ 63 | while (ADC12CTL1 & ADC12BUSY); /* Wait for it to complete all 16 samples into MEM0-15 */ 64 | 65 | returnVal = 0; 66 | 67 | for(i=0;i<15;i++) { 68 | 69 | returnVal = (returnVal<<1) | (ADC12MEM0 & BIT0); 70 | 71 | ADC12CTL0 |= ADC12SC; 72 | while (ADC12CTL1 & ADC12BUSY); /* Wait for it to complete all 16 samples into MEM0-15 */ 73 | } 74 | 75 | //--------------------------------------Turn off the ADC------------------------------------------------------------------------// 76 | ADC12CTL0 = 0; 77 | ADC12CTL1 = 0; 78 | ADC12CTL2 = 0; 79 | ADC12MCTL0 = 0; 80 | ADC12IER0 = 0; 81 | 82 | //--------------------------------------Turn off the REF------------------------------------------------------------------------// 83 | REFCTL0 = 0; 84 | 85 | return returnVal; 86 | } 87 | -------------------------------------------------------------------------------- /CCS/wisp-base/rand/rand.h: -------------------------------------------------------------------------------- 1 | /** 2 | * @file rand.h 3 | * 4 | * Interface to the random number generation module 5 | * 6 | * @author Aaron Parks, Justin Reina 7 | */ 8 | 9 | #ifndef RAND_H_ 10 | #define RAND_H_ 11 | 12 | 13 | uint16_t RAND_adcRand16 (void); 14 | 15 | 16 | #endif /* RAND_H_ */ 17 | -------------------------------------------------------------------------------- /CCS/wisp-base/wired/spi.c: -------------------------------------------------------------------------------- 1 | /** 2 | * sensor_spi.c 3 | * 4 | * @author Aaron Parks 5 | * @date Aug 2013 6 | * 7 | */ 8 | 9 | 10 | #include 11 | #include "../globals.h" 12 | #include "spi.h" 13 | 14 | uint8_t gpRxBuf[SPI_GP_RXBUF_SIZE]; 15 | 16 | /** 17 | * Description of state of the SPI module. 18 | */ 19 | static struct { 20 | BOOL bPortInUse; 21 | BOOL bNewDataReceived; 22 | unsigned int uiCurRx; 23 | unsigned int uiCurTx; 24 | unsigned int uiBytesToSend; 25 | uint8_t *pcRxBuffer; 26 | uint8_t *pcTxBuffer; 27 | } spiSM; 28 | 29 | 30 | /** 31 | * 32 | * @return success or failure 33 | * 34 | * @todo Implement this function 35 | */ 36 | BOOL SPI_initialize() { 37 | 38 | 39 | // Hardware peripheral initialization 40 | BITSET(UCA1CTL1, UCSWRST); 41 | 42 | // UCA1CTL0 = UCMST | UCSYNC | UCCKPH | UCMSB; // This instruction seem to work wrong since UA1CTL0 is an 8-bit register. 43 | UCA1CTL0 = (UCMST>>8) | (UCSYNC>>8) | (UCCKPH>>8) | (UCMSB>>8); 44 | UCA1CTL1 = UCSSEL_3 | UCSWRST; 45 | UCA1BR0 = 0; // 1MHz for 1MHz clock 46 | UCA1BR1 = 0; 47 | UCA1IFG = 0; 48 | UCA0MCTLW = 0; // No modulation, I don't think it is vital to write this command since the default should be like that. 49 | // BITSET(P2SEL1 , PIN_ACCEL_SCLK | PIN_ACCEL_MISO | PIN_ACCEL_MOSI); 50 | // BITCLR(P2SEL0 , PIN_ACCEL_SCLK | PIN_ACCEL_MISO | PIN_ACCEL_MOSI); 51 | BITCLR(UCA1CTL1, UCSWRST); 52 | 53 | // State variable initialization 54 | spiSM.bPortInUse = FALSE; 55 | spiSM.bNewDataReceived = FALSE; 56 | spiSM.uiCurRx = 0; 57 | spiSM.uiCurTx = 0; 58 | spiSM.uiBytesToSend = 0; 59 | 60 | 61 | return SUCCESS; 62 | } 63 | 64 | /** 65 | * 66 | * @return Success - you were able to get the port. Fail - you don't have the port, so don't use it. 67 | */ 68 | BOOL SPI_acquirePort() { 69 | 70 | if(spiSM.bPortInUse) { 71 | return FAIL; 72 | } else { 73 | spiSM.bPortInUse=TRUE; 74 | return SUCCESS; 75 | } 76 | 77 | } 78 | 79 | /** 80 | * 81 | * @return success or fail 82 | * @todo Make this more robust (don't allow release of port if we don't have it) 83 | */ 84 | BOOL SPI_releasePort() { 85 | if(spiSM.bPortInUse) { 86 | spiSM.bPortInUse = FALSE; 87 | return SUCCESS; 88 | } 89 | return FAIL; 90 | } 91 | 92 | 93 | /** 94 | * Engage in a synchronous serial transaction of the specified length. 95 | * This function blocks until transaction is complete. 96 | * 97 | * @param txBuf 98 | * @param size 99 | * @return success or fail 100 | */ 101 | BOOL SPI_transaction(uint8_t* rxBuf, uint8_t* txBuf, uint16_t size) { 102 | 103 | if(!spiSM.bPortInUse) 104 | return FAIL; // If the port is not acquired, fail! 105 | 106 | if(size==0) 107 | return FAIL; // If we aren't sending anything, fail! 108 | 109 | spiSM.bNewDataReceived = FALSE; 110 | spiSM.uiCurRx = 0; 111 | spiSM.uiCurTx = 0; 112 | spiSM.uiBytesToSend = size; 113 | 114 | spiSM.pcRxBuffer = rxBuf; 115 | spiSM.pcTxBuffer = txBuf; 116 | 117 | //BITSET(UCA1IE, UCTXIE | UCRXIE); 118 | 119 | do { 120 | // Reset receive flag 121 | spiSM.bNewDataReceived = FALSE; 122 | 123 | // Start transmission 124 | UCA1TXBUF = spiSM.pcTxBuffer[spiSM.uiCurTx]; 125 | 126 | // Sleep until receive occurs 127 | while(!(UCA1IFG & UCRXIFG)); 128 | spiSM.pcRxBuffer[spiSM.uiCurRx] = UCA1RXBUF; 129 | UCA1IFG &= ~UCRXIFG; 130 | UCA1IFG &= ~UCTXIFG; 131 | // Move to next TX and RX index 132 | spiSM.uiCurTx++; 133 | spiSM.uiCurRx++; 134 | spiSM.uiBytesToSend--; 135 | 136 | } while(spiSM.uiBytesToSend); 137 | 138 | 139 | return SUCCESS; 140 | } 141 | 142 | 143 | /// Be careful that FR5969 has 16 bits UCA1RXBUF and UCA1TXBUF other than F5310 that had 8 bits. 144 | //#pragma vector=USCI_A1_VECTOR 145 | //__interrupt void SPI_ISR(void) { 146 | // 147 | // if(UCRXIFG){ 148 | // spiSM.pcRxBuffer[spiSM.uiCurRx] = UCA1RXBUF; 149 | // spiSM.bNewDataReceived = TRUE; 150 | // UCA1IFG &= ~UCRXIFG; // Not sure it is vital to write this command or not but just as being punctilious 151 | // __bic_SR_register_on_exit(LPM4_bits); 152 | // } 153 | // 154 | // if(UCTXIFG){ 155 | // UCA1IFG &= ~UCTXIFG; 156 | // } 157 | 158 | 159 | 160 | /// another way to handle the interrupt. 161 | // if((UCA1IFG & UCRXIFG) == 1){ 162 | // spiSM.pcRxBuffer[spiSM.uiCurRx] = UCA1RXBUF; 163 | // spiSM.bNewDataReceived = TRUE; 164 | // UCA1IFG &= ~UCRXIFG; 165 | // __bic_SR_register_on_exit(LPM4_bits); 166 | // 167 | // } 168 | // 169 | // else if((UCA1IFG & UCTXIFG) == 2){ 170 | // UCA1IFG &= ~UCTXIFG; 171 | // __bic_SR_register_on_exit(LPM4_bits); 172 | // 173 | // } 174 | 175 | //} 176 | -------------------------------------------------------------------------------- /CCS/wisp-base/wired/spi.h: -------------------------------------------------------------------------------- 1 | /** 2 | * sensor_spi.h 3 | * 4 | * @author Aaron Parks 5 | * @date Aug 2013 6 | */ 7 | 8 | #ifndef SPI_H_ 9 | #define SPI_H_ 10 | 11 | #define SPI_GP_RXBUF_SIZE 20 12 | extern uint8_t gpRxBuf[SPI_GP_RXBUF_SIZE]; 13 | 14 | BOOL SPI_initialize(); 15 | BOOL SPI_acquirePort(); 16 | BOOL SPI_releasePort(); 17 | BOOL SPI_transaction(uint8_t* rxBuf, uint8_t* txBuf, uint16_t size); 18 | 19 | #ifdef __MSPGCC__ 20 | #define USCI_UCRXIFG UCRXIFG 21 | #define USCI_UCTXIFG UCTXIFG 22 | #endif /* __MSPGCC__ */ 23 | 24 | #endif /* SPI_H_ */ 25 | -------------------------------------------------------------------------------- /CCS/wisp-base/wired/uart.c: -------------------------------------------------------------------------------- 1 | /** 2 | * @file uart.c 3 | * @author Aaron Parks -- Framework + TX logic 4 | * @author Ivar in 't Veen -- RX logic + Baudrate calculations 5 | * @brief UART module for transmitting/receiving data using the USCI_A0 peripheral 6 | */ 7 | 8 | #include "uart.h" 9 | #include "../globals.h" 10 | 11 | /** 12 | * State variables for the UART module 13 | */ 14 | struct { 15 | uint8_t isTxBusy; // Is the module currently in the middle of a transmit operation? 16 | uint8_t* txPtr; // Pointer to the next byte to be transmitted 17 | uint16_t txBytesRemaining; // Number of bytes left to send 18 | 19 | uint8_t isRxBusy; // Is the module currently in the middle of a receive operation? 20 | uint8_t* rxPtr; // Pointer to the next byte to be received 21 | uint16_t rxBytesRemaining; // Maximum number of bytes left to receive 22 | uint8_t rxTermChar; // Stop receiving on this char. 23 | } UART_SM; 24 | 25 | /** 26 | * Configure the eUSCI_A0 module in UART mode and prepare for UART transmission. 27 | * 28 | * @todo Currently assumes an 8MHz SMCLK. Make robust to clock frequency changes by using 32k ACLK. 29 | */ 30 | void UART_init(void) { 31 | UART_initCustom(8000000, 9600); 32 | } 33 | 34 | /** 35 | * Configure the eUSCI_A0 module in UART mode and prepare for UART transmission. 36 | * 37 | * @param fsmclk SMCLK frequency 38 | * @param baudrate UART baudrate to be set 39 | * 40 | * @todo Currently assumes SMCLK. Make robust to clock frequency changes by using ACLK. 41 | */ 42 | void UART_initCustom(uint32_t fsmclk, uint32_t baudrate) { 43 | 44 | // Configure USCI_A0 for UART mode 45 | UCA0CTLW0 = UCSWRST; // Put eUSCI in reset 46 | UCA0CTLW0 |= UCSSEL__SMCLK; // CLK = SMCLK 47 | 48 | // Baud Rate calculation -- see section 21.3.10 of MSP430 User's Guide 49 | uint16_t n = fsmclk / baudrate; 50 | uint16_t nfrac = ((fsmclk * 100) / baudrate) - (n * 100); 51 | 52 | UCA0MCTLW &= ~(0xFFF0); // Clear modulation stage bits 53 | UCA0MCTLW |= ((nfrac * 3) - 20) << 8; // Set second modulation stage (no LUT, approximated) 54 | 55 | if (n > 3) { 56 | UCA0MCTLW |= UCOS16; // Enable oversampling 57 | UCA0BRW = n >> 4; // Set clock prescaler 58 | UCA0MCTLW |= (n - (n & 0xFFF0)) << 4; // Set first modulation stage 59 | } else { 60 | UCA0MCTLW &= ~UCOS16; // Disable oversampling 61 | UCA0BRW = n; // Set clock prescaler 62 | } 63 | 64 | // RX/TX Pin selection 65 | PUART_TXSEL0 &= ~PIN_UART_TX; // TX pin to UART module 66 | PUART_TXSEL1 |= PIN_UART_TX; 67 | 68 | PUART_RXSEL0 &= ~PIN_UART_RX; // RX pin to UART module 69 | PUART_RXSEL1 |= PIN_UART_RX; 70 | 71 | // Initialize eUSCI 72 | UCA0CTLW0 &= ~UCSWRST; 73 | 74 | // Initialize module state 75 | UART_SM.isTxBusy = FALSE; 76 | UART_SM.txBytesRemaining = 0; 77 | UART_SM.isRxBusy = FALSE; 78 | UART_SM.rxBytesRemaining = 0; 79 | UART_SM.rxTermChar = '\0'; 80 | 81 | } 82 | 83 | /** 84 | * Transmit the contents of the given character buffer. Do not block. 85 | * 86 | * @param txBuf the character buffer to be transmitted 87 | * @param size the number of bytes to send 88 | */ 89 | void UART_asyncSend(uint8_t* txBuf, uint16_t size) { 90 | 91 | // Block until prior transmission has completed 92 | while (UART_SM.isTxBusy) 93 | ; 94 | 95 | // Set up for start of transmission 96 | UART_SM.isTxBusy = TRUE; 97 | UART_SM.txPtr = txBuf; 98 | UART_SM.txBytesRemaining = size - 1; 99 | 100 | UCA0IFG &= ~(USCI_UART_UCTXIFG); // Clear byte completion flag 101 | 102 | UCA0IE |= UCTXIE; // Enable USCI_A0 TX interrupt 103 | UCA0TXBUF = *(UART_SM.txPtr++); // Load in first byte 104 | 105 | // The rest of the transmission will be completed by the TX ISR (which 106 | // will wake after each byte has been transmitted), and the isBusy flag 107 | // will be cleared when done. 108 | } 109 | 110 | /** 111 | * Transmit the contents of the given character buffer. Block until complete. 112 | * 113 | * @param txBuf the character buffer to be transmitted 114 | * @param size the number of bytes to send 115 | * 116 | */ 117 | void UART_send(uint8_t* txBuf, uint16_t size) { 118 | 119 | UART_asyncSend(txBuf, size); 120 | 121 | // Block until complete 122 | while (UART_SM.isTxBusy) 123 | ; 124 | } 125 | 126 | /** 127 | * Transmit the contents of the given character buffer. Block until complete, 128 | * and use UART status register polling instead of interrupts. 129 | */ 130 | void UART_critSend(uint8_t* txBuf, uint16_t size) { 131 | 132 | // Block until prior transmission has completed 133 | while (UART_SM.isTxBusy) 134 | ; 135 | 136 | // Set up for start of transmission 137 | UART_SM.isTxBusy = TRUE; 138 | UART_SM.txPtr = txBuf; 139 | UART_SM.txBytesRemaining = size; 140 | 141 | UCA0IV &= ~(USCI_UART_UCTXIFG); // Clear byte completion flag 142 | 143 | while (UART_SM.txBytesRemaining--) { 144 | UCA0TXBUF = *(UART_SM.txPtr++); // Load in next byte 145 | while (!(UCA0IFG & UCTXIFG)) 146 | ; // Wait for byte transmission to complete 147 | UCA0IFG &= ~(UCTXIFG); // Clear byte completion flag 148 | } 149 | 150 | UART_SM.isTxBusy = FALSE; 151 | } 152 | 153 | /** 154 | * Return true if UART TX module is in the middle of an operation, false if not. 155 | */ 156 | uint8_t UART_isTxBusy() { 157 | return UART_SM.isTxBusy; 158 | } 159 | 160 | /** 161 | * Receive character buffer. Do not block. 162 | * 163 | * @param rxBuf the character buffer to be received to 164 | * @param size the number of bytes to receive 165 | */ 166 | void UART_asyncReceive(uint8_t* rxBuf, uint16_t size, uint8_t terminate) { 167 | 168 | // Block until prior reception has completed 169 | while (UART_SM.isRxBusy) 170 | ; 171 | 172 | // Set up for start of reception 173 | UART_SM.isRxBusy = TRUE; 174 | UART_SM.rxPtr = rxBuf; 175 | UART_SM.rxBytesRemaining = size; 176 | UART_SM.rxTermChar = terminate; 177 | 178 | UCA0IFG &= ~(UCRXIFG); // Clear byte completion flag 179 | 180 | UCA0IE |= UCRXIE; // Enable USCI_A0 RX interrupt 181 | 182 | // The rest of the reception will be completed by the RX ISR (which 183 | // will wake after each byte has been received), and the isBusy flag 184 | // will be cleared when done. 185 | } 186 | 187 | /** 188 | * Receive character buffer. Block until complete. 189 | * 190 | * @param rxBuf the character buffer to be received to 191 | * @param size the number of bytes to receive 192 | * 193 | */ 194 | void UART_receive(uint8_t* rxBuf, uint16_t size, uint8_t terminate) { 195 | 196 | UART_asyncReceive(rxBuf, size, terminate); 197 | 198 | // Block until complete 199 | while (UART_SM.isRxBusy) 200 | ; 201 | } 202 | 203 | /** 204 | * Receive to the given character buffer. Block until complete, 205 | * and use UART status register polling instead of interrupts. 206 | */ 207 | void UART_critReceive(uint8_t* rxBuf, uint16_t size, uint8_t terminate) { 208 | 209 | // Block until prior reception has completed 210 | while (UART_SM.isRxBusy) 211 | ; 212 | 213 | // Set up for start of reception 214 | UART_SM.isRxBusy = TRUE; 215 | UART_SM.rxPtr = rxBuf; 216 | UART_SM.rxBytesRemaining = size; 217 | UART_SM.rxTermChar = terminate; 218 | 219 | UCA0IFG &= ~(UCRXIFG); // Clear byte completion flag 220 | 221 | while (UART_SM.rxBytesRemaining--) { 222 | while (!(UCA0IFG & UCRXIFG)) 223 | ; // Wait for byte reception to complete 224 | UCA0IFG &= ~(UCRXIFG); // Clear byte completion flag 225 | 226 | uint8_t rec = UCA0RXBUF; // Read next byte 227 | *(UART_SM.rxPtr++) = rec; // Store byte 228 | 229 | if (rec == UART_SM.rxTermChar) 230 | break; // Stop receiving when the termination charactor is received 231 | } 232 | 233 | UART_SM.isRxBusy = FALSE; 234 | } 235 | 236 | /** 237 | * Return true if UART RX module is in the middle of an operation, false if not. 238 | */ 239 | uint8_t UART_isRxBusy() { 240 | return UART_SM.isRxBusy; 241 | } 242 | 243 | /** 244 | * Return true if UART RX module is not in the middle of an operation (e.g. done), false if not. 245 | * 246 | * Could be used in combination with UART_asyncReceive. 247 | */ 248 | uint8_t UART_isRxDone() { 249 | return !(UART_SM.isRxBusy); 250 | } 251 | 252 | /** 253 | * Handles transmit and receive interrupts for the UART module. 254 | * Interrupts typically occur once after each byte transmitted/received. 255 | */ 256 | #pragma vector=USCI_A0_VECTOR 257 | __interrupt void USCI_A0_ISR(void) { 258 | BITTOG(PLED2OUT, PIN_LED2); 259 | uint8_t rec; 260 | 261 | switch (__even_in_range(UCA0IV, USCI_UART_UCTXCPTIFG)) { 262 | case USCI_NONE: 263 | break; 264 | case USCI_UART_UCRXIFG: 265 | if (UART_SM.rxBytesRemaining--) { 266 | rec = UCA0RXBUF; // Read next byte 267 | *(UART_SM.rxPtr++) = rec; // Store byte 268 | } else { 269 | rec = ~UART_SM.rxTermChar; 270 | } 271 | 272 | if ((0 == UART_SM.rxBytesRemaining) || (rec == UART_SM.rxTermChar)) { 273 | UCA0IE &= ~(UCRXIE); // Disable USCI_A0 RX interrupt 274 | UART_SM.isRxBusy = FALSE; 275 | } 276 | 277 | break; 278 | case USCI_UART_UCTXIFG: 279 | if (UART_SM.txBytesRemaining--) { 280 | UCA0TXBUF = *(UART_SM.txPtr++); 281 | } else { 282 | UCA0IE &= ~(UCTXIE); // Disable USCI_A0 TX interrupt 283 | UART_SM.isTxBusy = FALSE; 284 | } 285 | break; 286 | case USCI_UART_UCSTTIFG: 287 | break; 288 | case USCI_UART_UCTXCPTIFG: 289 | break; 290 | } 291 | } 292 | 293 | -------------------------------------------------------------------------------- /CCS/wisp-base/wired/uart.h: -------------------------------------------------------------------------------- 1 | /* 2 | * @file uart.h 3 | * @brief Provides an interface to the UART module 4 | * 5 | * @author Aaron Parks 6 | * @author Ivar in 't Veen 7 | */ 8 | 9 | #ifndef UART_H_ 10 | #define UART_H_ 11 | 12 | #include 13 | 14 | void UART_init(void); 15 | void UART_initCustom(uint32_t fsmclk, uint32_t baudrate); 16 | 17 | void UART_asyncSend(uint8_t* txBuf, uint16_t size); 18 | void UART_send(uint8_t* txBuf, uint16_t size); 19 | void UART_critSend(uint8_t* txBuf, uint16_t size); 20 | uint8_t UART_isTxBusy(); 21 | 22 | void UART_asyncReceive(uint8_t* rxBuf, uint16_t size, uint8_t terminate); 23 | void UART_receive(uint8_t* rxBuf, uint16_t size, uint8_t terminate); 24 | void UART_critReceive(uint8_t* rxBuf, uint16_t size, uint8_t terminate); 25 | uint8_t UART_isRxBusy(); 26 | uint8_t UART_isRxDone(); 27 | 28 | #endif /* UART_H_ */ 29 | -------------------------------------------------------------------------------- /CCS/wisp-base/wisp-base.h: -------------------------------------------------------------------------------- 1 | /** 2 | * @file wisp-base.h 3 | * 4 | * The interface for the standard WISP library, including all definitions 5 | * required to communicate with an RFID reader and use onboard peripherals. 6 | * 7 | * @author Aaron Parks, Saman Naderiparizi 8 | */ 9 | 10 | #ifndef WISP_BASE_H_ 11 | #define WISP_BASE_H_ 12 | 13 | //#include 14 | #include "globals.h" // Get these outta here (breaks encapsulation barrier) 15 | #include "wired/spi.h" 16 | #include "wired/uart.h" 17 | #include "Sensors/accel.h" 18 | #include "Sensors/adc.h" 19 | #include "nvm/fram.h" 20 | #include "RFID/rfid.h" 21 | #include "config/wispGuts.h" 22 | #include "Timing/timer.h" 23 | #include "rand/rand.h" 24 | 25 | void WISP_init(void); 26 | void WISP_getDataBuffers(WISP_dataStructInterface_t* clientStruct); 27 | 28 | #endif /* WISP_BASE_H_ */ 29 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | WISP 5 2 | ==== 3 | 4 | Welcome to the WISP5 firmware repository! 5 | 6 | Got questions? Check out the tutorials and discussion board at: http://wisp5.wikispaces.com 7 | 8 | Schematics for the WISP5 prototype are available here: http://wisp5.wikispaces.com/WISP+Hardware 9 | 10 | Interested in building a host-side application to talk with WISPs? Look no further than the SLLURP library for configuring LLRP-based RFID readers: 11 | https://github.com/ransford/sllurp 12 | 13 | Important Notices 14 | ---- 15 | Please note that the MSP430FR5969 included on the WISP 5 is not compatible with TI Code Composer Studio versions prior to version 6. Please use CCS v6 or above. 16 | 17 | The WISP 5 is intended to be compatible with Impinj Speedway and Impinj Speedway Revolution series FCC-compliant readers. For updates about compatibility with other readers, please contact the developers. 18 | 19 | Configuration 20 | ---- 21 | 1. Set your Code Composer Studio v6x workspace to wisp5/ccs and import the following projects: 22 | 23 | * **wisp-base** The standard library for the WISP5. Compiled as a static library. 24 | * **run-once** An application which generates a table of random numbers and stores them to non-volatile memory on the WISP, for use in slotting protocol and unique identification. 25 | 26 | * **simpleAckDemo** An application which references wisp-base and demonstrates basic communication with an RFID reader. 27 | 28 | * **accelDemo** An application which references wisp-base and demonstrates sampling of the accelerometer and returning acceleration data to the reader through fields of the EPC. 29 | 30 | 2. Build wisp-base and then the two applications. 31 | 32 | 3. Program and run your WISP5 with run-once, and wait for LED to pulse to indicate completion. 33 | 34 | 4. Program and run your WISP5 with simpleAckDemo and ensure that it can communicate with the reader. Use an Impinj Speedway series reader with Tari = 6.25us or 7.14us, link frequency = 640kHz, and reverse modulation type = FM0. 35 | 36 | A summary of protocol details is given below. 37 | 38 | Protocol summary 39 | ---- 40 | 41 | Delimiter = 12.5us 42 | 43 | Tari = 6.25us 44 | 45 | Link Frequency (T=>R) = 640kHz 46 | 47 | Divide Ratio (DR) = 64/3 48 | 49 | Reverse modulation type = FM0 50 | 51 | RTCal (R=>T) = Nominally 15.625us (2.5*Data-0), Appears to accept 12.5us to 18.75us 52 | 53 | TRCal (R=>T) = Appears to accept 13.75us to 56.25us, reader usage of this field may vary. 54 | 55 | Data-0 (R=>T) = 6.25us 56 | 57 | PW (R=>T) = 3.125us (0.5*(Data-0)) 58 | 59 | Enjoy the WISP5, and please contribute your comments and bugfixes here! 60 | 61 | 62 | -------------------------------------------------------------------------------- /license.txt: -------------------------------------------------------------------------------- 1 | Copyright (c) 2014, University of Washington 2 | All rights reserved. 3 | 4 | Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: 5 | 6 | 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. 7 | 8 | 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. 9 | 10 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --------------------------------------------------------------------------------