├── LICENSE ├── README.md ├── README_en.md ├── doc ├── Atmel-6430-32-bit-Cortex-M3-Microcontroller-SAM3U4-SAM3U2-SAM3U1_Datasheet.pdf ├── debug_select.jpg ├── flash_algorithm.jpg ├── nanoDAP-HS-1.jpg ├── nanoDAP-HS-2.jpg ├── nanoDAP-HS-3.jpg ├── nanoDAP-HS-TYPE-C-1.jpg ├── nanoDAP-HS-TYPE-C-2.jpg ├── nanoDAP-HS-TYPE-C-3.jpg ├── rddi_dap_error.jpg ├── reset_select.png ├── target_id.png ├── target_id1.png ├── target_id2.png ├── target_id3.png └── usb_device.png ├── driver └── windows7_serial_driver │ └── mbedWinSerial_16466.exe ├── firmware ├── README.md ├── sam3u2c_bl.hex ├── sam3u2c_if_20191102.hex ├── sam3u2c_if_20191122.hex └── sam3u2c_if_20210514.hex └── test ├── stm32f103c8t6 └── led_test │ ├── .gitignore │ ├── JLinkLog.txt │ ├── JLinkSettings.ini │ ├── Libraries │ ├── CMSIS │ │ ├── core_cm3.c │ │ ├── core_cm3.h │ │ ├── startup │ │ │ ├── startup_stm32f10x_cl.s │ │ │ ├── startup_stm32f10x_hd.s │ │ │ ├── startup_stm32f10x_hd_vl.s │ │ │ ├── startup_stm32f10x_ld.s │ │ │ ├── startup_stm32f10x_ld_vl.s │ │ │ ├── startup_stm32f10x_md.s │ │ │ ├── startup_stm32f10x_md_vl.s │ │ │ └── startup_stm32f10x_xl.s │ │ ├── stm32f10x.h │ │ ├── system_stm32f10x.c │ │ └── system_stm32f10x.h │ └── FWlib │ │ ├── inc │ │ ├── misc.h │ │ ├── stm32f10x_adc.h │ │ ├── stm32f10x_bkp.h │ │ ├── stm32f10x_can.h │ │ ├── stm32f10x_cec.h │ │ ├── stm32f10x_crc.h │ │ ├── stm32f10x_dac.h │ │ ├── stm32f10x_dbgmcu.h │ │ ├── stm32f10x_dma.h │ │ ├── stm32f10x_exti.h │ │ ├── stm32f10x_flash.h │ │ ├── stm32f10x_fsmc.h │ │ ├── stm32f10x_gpio.h │ │ ├── stm32f10x_i2c.h │ │ ├── stm32f10x_iwdg.h │ │ ├── stm32f10x_pwr.h │ │ ├── stm32f10x_rcc.h │ │ ├── stm32f10x_rtc.h │ │ ├── stm32f10x_sdio.h │ │ ├── stm32f10x_spi.h │ │ ├── stm32f10x_tim.h │ │ ├── stm32f10x_usart.h │ │ └── stm32f10x_wwdg.h │ │ └── src │ │ ├── misc.c │ │ ├── stm32f10x_adc.c │ │ ├── stm32f10x_bkp.c │ │ ├── stm32f10x_can.c │ │ ├── stm32f10x_cec.c │ │ ├── stm32f10x_crc.c │ │ ├── stm32f10x_dac.c │ │ ├── stm32f10x_dbgmcu.c │ │ ├── stm32f10x_dma.c │ │ ├── stm32f10x_exti.c │ │ ├── stm32f10x_flash.c │ │ ├── stm32f10x_fsmc.c │ │ ├── stm32f10x_gpio.c │ │ ├── stm32f10x_i2c.c │ │ ├── stm32f10x_iwdg.c │ │ ├── stm32f10x_pwr.c │ │ ├── stm32f10x_rcc.c │ │ ├── stm32f10x_rtc.c │ │ ├── stm32f10x_sdio.c │ │ ├── stm32f10x_spi.c │ │ ├── stm32f10x_tim.c │ │ ├── stm32f10x_usart.c │ │ └── stm32f10x_wwdg.c │ ├── User │ ├── main.c │ └── stm32f10x_conf.h │ ├── led_test.uvguix.44783 │ ├── led_test.uvoptx │ └── led_test.uvprojx └── stm32f405rgt6 └── led_test ├── .gitignore ├── CORE ├── core_cm4.h ├── core_cm4_simd.h └── startup_stm32f40_41xxx.s ├── FWLIB ├── inc │ ├── misc.h │ ├── stm32f4xx_adc.h │ ├── stm32f4xx_can.h │ ├── stm32f4xx_crc.h │ ├── stm32f4xx_cryp.h │ ├── stm32f4xx_dac.h │ ├── stm32f4xx_dbgmcu.h │ ├── stm32f4xx_dcmi.h │ ├── stm32f4xx_dma.h │ ├── stm32f4xx_dma2d.h │ ├── stm32f4xx_exti.h │ ├── stm32f4xx_flash.h │ ├── stm32f4xx_flash_ramfunc.h │ ├── stm32f4xx_fmc.h │ ├── stm32f4xx_fsmc.h │ ├── stm32f4xx_gpio.h │ ├── stm32f4xx_hash.h │ ├── stm32f4xx_i2c.h │ ├── stm32f4xx_iwdg.h │ ├── stm32f4xx_ltdc.h │ ├── stm32f4xx_pwr.h │ ├── stm32f4xx_rcc.h │ ├── stm32f4xx_rng.h │ ├── stm32f4xx_rtc.h │ ├── stm32f4xx_sai.h │ ├── stm32f4xx_sdio.h │ ├── stm32f4xx_spi.h │ ├── stm32f4xx_syscfg.h │ ├── stm32f4xx_tim.h │ ├── stm32f4xx_usart.h │ └── stm32f4xx_wwdg.h └── src │ ├── misc.c │ ├── stm32f4xx_adc.c │ ├── stm32f4xx_can.c │ ├── stm32f4xx_crc.c │ ├── stm32f4xx_cryp.c │ ├── stm32f4xx_cryp_aes.c │ ├── stm32f4xx_cryp_des.c │ ├── stm32f4xx_cryp_tdes.c │ ├── stm32f4xx_dac.c │ ├── stm32f4xx_dbgmcu.c │ ├── stm32f4xx_dcmi.c │ ├── stm32f4xx_dma.c │ ├── stm32f4xx_dma2d.c │ ├── stm32f4xx_exti.c │ ├── stm32f4xx_flash.c │ ├── stm32f4xx_flash_ramfunc.c │ ├── stm32f4xx_fmc.c │ ├── stm32f4xx_fsmc.c │ ├── stm32f4xx_gpio.c │ ├── stm32f4xx_hash.c │ ├── stm32f4xx_hash_md5.c │ ├── stm32f4xx_hash_sha1.c │ ├── stm32f4xx_i2c.c │ ├── stm32f4xx_iwdg.c │ ├── stm32f4xx_ltdc.c │ ├── stm32f4xx_pwr.c │ ├── stm32f4xx_rcc.c │ ├── stm32f4xx_rng.c │ ├── stm32f4xx_rtc.c │ ├── stm32f4xx_sai.c │ ├── stm32f4xx_sdio.c │ ├── stm32f4xx_spi.c │ ├── stm32f4xx_syscfg.c │ ├── stm32f4xx_tim.c │ ├── stm32f4xx_usart.c │ └── stm32f4xx_wwdg.c ├── HARDWARE ├── 1.44TFT │ ├── Font.h │ ├── GUI.c │ ├── GUI.h │ ├── LCD_Config.h │ ├── Lcd_Driver.c │ └── Lcd_Driver.h └── LED │ ├── led.c │ └── led.h ├── SYSTEM ├── delay │ ├── delay.c │ └── delay.h ├── sys │ ├── sys.c │ └── sys.h └── usart │ ├── usart.c │ └── usart.h ├── USER ├── JLinkLog.txt ├── JLinkSettings.ini ├── LED.BAT ├── LED.uvgui.44783 ├── LED.uvgui.Administrator ├── LED.uvgui.Ping ├── LED.uvgui_Ping.bak ├── LED.uvopt ├── LED.uvproj ├── LED_LED.dep ├── main.__i ├── main.c ├── main.crf ├── main.d ├── main.o ├── stm32f4xx.h ├── stm32f4xx.h~RF8f6d17.TMP ├── stm32f4xx_conf.h ├── stm32f4xx_it.__i ├── stm32f4xx_it.c ├── stm32f4xx_it.crf ├── stm32f4xx_it.d ├── stm32f4xx_it.h ├── stm32f4xx_it.o ├── system_stm32f4xx.__i ├── system_stm32f4xx.c ├── system_stm32f4xx.crf ├── system_stm32f4xx.d ├── system_stm32f4xx.h └── system_stm32f4xx.o └── keilkilll.bat /README.md: -------------------------------------------------------------------------------- 1 | [中文](./README.md) [English](./README_en.md) 2 | # DAPLink-HS 用户手册 3 | * [产品介绍](#产品介绍) 4 | * [产品特点](#产品特点) 5 | * [MDK配置说明](#mdk配置说明) 6 | * [仿真器选择](#仿真器选择) 7 | * [目标检测](#目标检测) 8 | * [烧写算法](#烧写算法) 9 | * [复位设置](#复位设置) 10 | * [DAPLink使用](#DAPLink使用) 11 | * [拖拽烧录](#拖拽烧录) 12 | * [固件升级](#固件升级) 13 | * [产品链接](#产品链接) 14 | * [FAQ](#faq) 15 | * [在win7系统下会提示无串口驱动,应该如何安装?](#q-在win7系统下会提示无串口驱动应该如何安装) 16 | * [烧录失败,提示 RDDI-DAP ERROR,应该如何解决?](#q-烧录失败提示-rddi-dap-error应该如何解决) 17 | * [无法检测到目标,提示communication failure,应该如何解决?](#q-无法检测到目标提示communication-failure应该如何解决) 18 | * [CMSIS-DAP/DAPLink目前支持哪些芯片的调试烧录?](#q-cmsis-dapdaplink目前支持哪些芯片的调试烧录) 19 | * [DAPLink目前支持哪些芯片的U盘拖拽烧录?](#q-daplink目前支持哪些芯片的u盘拖拽烧录) 20 | * [在Linux下能否使用dap仿真器进行调试?](#q-在linux下可以使用dap仿真器进行调试吗) 21 | 22 | # 产品介绍 23 | DAPLink-HS仿真器是缪斯实验室推出的高速DAP仿真器,使用USB 2.0 High Speed传输数据,基于开源DAPLink实现,支持U盘固件升级,拖拽烧录以及WebUSB烧录。相比当前市面上流行的jlink/st-link,烧录速度快,不丢固件,无版权风险,功能丰富,外观简洁精致,能较好的满足电子工程师进行日常的开发调试下载需求。 24 |
25 | 26 | 27 | 28 | 29 |
30 | 31 | 32 | 33 | # 产品特点 34 | - 软件开源,无版权风险。当前市面上的jlink/stlink均为盗版,使用上存在一些法律问题,部分jlink和IDE如MDK配合使用时,会提示盗版而无法正常使用,且部分jlink版本存在使用一段时间后丢固件的问题,一旦固件丢失,需要手动操作软件恢复固件,操作极其繁琐。同时 jlink售价亦较为昂贵。 35 | - 引出5V、3.3V电源,不需要外接额外的电源到您的单板上,使用上更方便。 36 | - 引出SWD接口,支持主流上位机调试软件,包括keil、IAR、openocd,均支持使用SWD进行下载、单步调试。 37 | - 引出JTAG接口,配合openocd可支持全球范围内几乎所有SoC芯片的调试,如ARM Cortex-A系列、DSP、FPGA、MIPS等,因为SWD协议只是ARM自己定义的私有协议,而JTAG则是国际IEEE 1149标准。通常的仿真器目标芯片一般为ARM Cortex-M系列,均未引出JTAG接口,而本产品引出JTAG接口,适合您在其他平台下进行开发调试工作。 38 | - 支持虚拟串口(也就是既可以用来当仿真器,又可以作为串口工具使用,替代ch340、cp2102,pl2303)。 39 | - DAPLink是CMSIS-DAP仿真器的升级版,也是ARM官方在开源社区力推的仿真器,最大的特点是支持U盘拖拽烧录。插入DAPLink之后,PC上会出来一个U盘,只需将hex或者bin文件拖入到U盘中,即可完成烧录。 40 | - DAPLink支持U盘固件升级,只需将nRST接地,插入DAPLink,PC上即会出来一个U盘,只需将新的固件(hex或者bin文件)拖入到U盘中,即可完成固件升级。因为DAPLink实现了一个带U盘功能的bootloader,可以方便的完成固件升级。若您有基于STM32的产品正在量产,而且产品后续可能需要升级,则DAPLink中的bootloader代码非常值得您参考,客户端不需要安装复杂的IDE或者烧写工具才能完成升级,只需拖动到U盘即可方便的完成您的产品升级。 41 | 42 | 43 | # MDK配置说明 44 | 将DAPLink 插入到PC的USB口中,若一切正常,则在设备管理器中会出现一个虚拟串口和USB-HID设备,如图所示 45 | ![usb_device](https://github.com/wuxx/nanoDAP-HS/blob/master/doc/usb_device.png) 46 | ## 仿真器选择 47 | 在 Option -> Debug 一栏中选择CMSIS-DAP Debugger 48 | ![debug_select](https://github.com/wuxx/nanoDAP-HS/blob/master/doc/debug_select.jpg) 49 | ## 目标检测 50 | 在 Option -> Debug 菜单中点击Settings 进入配置菜单,如图所示,假若仿真器已经正常连接,则在左侧窗口会识别出仿真器的相关信息,假若使用SWD接口进行调试烧录,则请将接口配置成和左侧红框处一致。假若此时目标单板已经正常连接,则在右侧红框出会识别出目标单板的相关信息。 51 | ![target_id1](https://github.com/wuxx/nanoDAP-HS/blob/master/doc/target_id1.png) 52 | 53 | ## 烧写算法 54 | 对于特定的目标芯片,您需要为其配置特定的烧写算法,以stm32f10x系列为例,如图所示: 55 | ![flash_algorithm](https://github.com/wuxx/nanoDAP-HS/blob/master/doc/flash_algorithm.jpg) 56 | 57 | 58 | ## 复位设置 59 | 一般情况下,您或许希望烧写完芯片之后立即开始运行,我们的DAPLink经过软件定制,支持复位后立即开始运行,您需要在Debug 选项中进行配置,如图所示: 60 | ![reset_select](https://github.com/wuxx/nanoDAP-HS/blob/master/doc/reset_select.png) 61 | 62 | # DAPLink使用 63 | ## 拖拽烧录 64 | 将DAPLink插入到PC中,正常情况下,会出现一个新的U盘,如图所示。 65 | DAPLink支持U盘拖拽烧录,只需将hex或者bin文件拖拽到U盘中,即可完成芯片的烧录。 66 | 注意:每一种固件只支持一种芯片的拖拽烧录,具体支持拖拽烧录的芯片请查看firmware目录,您可根据自己的需求选择升级不同的固件。 67 | 68 | ## 固件升级 69 | DAPLink 实现了一个bootloader并且提供了U盘功能,这使得固件升级极为方便。具体固件升级的操作过程如下: 70 | 1. 使用杜邦线将nRST和GND短接。 71 | 2. 将DAP插入到PC中,预期应该会出现一个名为MAINTAIN的U盘。 72 | 3. 此时可以将nRST和GND断开。 73 | 4. 将新的固件拖动到MAINTAIN U盘中,即可自动完成固件升级。 74 | 75 | ## OpenOCD使用 76 | 请查阅[此处](https://github.com/wuxx/openocd-toolbox),已经将常用的操作封装成脚本,只需双击脚本,便可完成目标芯片的读、写、擦除,由于目标芯片的平台众多,demo中目标为STM32F1系列的芯片,您可参考修改成支持您的平台。 77 | 78 | # 产品链接 79 | [nanoDAP-HS高速DAP](https://item.taobao.com/item.htm?spm=2013.1.w4004-21293878323.6.193e34a8mowUvw&id=605653531236) 80 | 81 | # FAQ 82 | ### Q: 在win7系统下会提示无串口驱动,应该如何安装? 83 | 请取此目录下的可执行文件 (https://github.com/wuxx/nanoDAP-HS/tree/master/driver/windows7_serial_driver) 直接安装即可。 84 | ### Q: 烧录失败,提示 RDDI-DAP ERROR,应该如何解决? 85 | 由于仿真器烧录速度较快,杜邦线之间的信号会产生串扰,请尝试换短一些的杜邦线,或者把紧密连在一起的杜邦线拉开,也可以尝试降低烧录速度,一般即可正常解决。 86 | ### Q: 无法检测到目标,提示communication failure,应该如何解决? 87 | 请首先排查硬件接线是否正确(GND, CLK, IO, 3V3),然后检查目标板电源是否正常,若目标板由仿真器供电,由于USB最大输出电流只有500mA,请排查是否可能目标板供电不足。 88 | ### Q: CMSIS-DAP/DAPLink目前支持哪些芯片的调试烧录? 89 | 典型的使用场景为对单片机进行编程调试,理论上Cortex-M系列的内核均可以使用DAP进行烧录调试,典型的芯片如STM32全系列的芯片,GD32全系列,nRF51/52系列等。 90 | ### Q: DAPLink目前支持哪些芯片的U盘拖拽烧录? 91 | 目前DAPLink支持拖拽烧录的芯片并不算特别多,将来随着ARM社区支持力度将会增加更多芯片支持,假若您有自己的芯片平台需要支持拖拽烧录,可以参考目前已有的的代码作修改。 92 | ### Q: 在linux下可以使用DAP仿真器进行调试吗? 93 | linux下可以使用openocd配合DAP仿真器进行调试,openocd是目前全世界最流行,最强大的开源调试器上位机,由于openocd是跨平台的,你也可以在windows下使用openocd,通过编写适当的配置脚本,可以实现对芯片的调试、烧录等操作。由于涉及内容较多,更多说明请读者自行搜索,或者留言咨询。 94 | 95 | 96 | 有任何问题或者建议,请在本仓库的[Issues](https://github.com/wuxx/nanoDAP-HS/issues)页面中提出,我们会持续跟进解决。 97 | -------------------------------------------------------------------------------- /README_en.md: -------------------------------------------------------------------------------- 1 | DAPLink-HS User Manual 2 | * [Introduction](#introduction) 3 | * [Feature](#feature) 4 | * [MDK Config](#mdk-config) 5 | * [Debugger Select](#debugger-select) 6 | * [Target Detect](#target-detect) 7 | * [Flash Algorithm](#flash-algorithm) 8 | * [Reset Setting](#reset-setting) 9 | * [DAPLink Usage](#DAPLink-Usage) 10 | * [Drag-and-Drop](#drag-and-drop) 11 | * [Firmware Upgrade](#firmware-upgrade) 12 | * [Product Link](#product-link) 13 | 14 | # Introduction 15 | DAPLink-HS is a cmsis-dap high-speed debugger made by MuseLab which support SWD/JTAG and a USB CDC serial port. feature with Atmel ATSAM3U2C with USB High-Speed, it has a good performance of program and debug. currently there are two version with same function (USB-A version & TYPE-C version) 16 |
17 | 18 | 19 | 20 | 21 |
22 | 23 | 24 | # Feature 25 | - SWD interface 26 | - JTAG interface 27 | - 5V/3.3V power supply to target board 28 | - USB CDC serial port 29 | - drag-n-drop program 30 | - drag-n-drop firmware upgrade 31 | 32 | # MDK config 33 | plug the debugger into PC USB, if everything is ok, there will appear a CDC port and a USB HID device 34 | ![usb_device](https://github.com/wuxx/nanoDAP-HS/blob/master/doc/usb_device.png) 35 | ## Debugger Select 36 | select CMSIS-DAP Debugger in Option -> Debug 37 | ![debug_select](https://github.com/wuxx/nanoDAP-HS/blob/master/doc/debug_select.jpg) 38 | ## Target Detect 39 | click Settings in Option -> Debug, recommend to select the swd port, and config the frequence to 10MHz 40 | ![target_id1](https://github.com/wuxx/nanoDAP-HS/blob/master/doc/target_id1.png) 41 | 42 | ## Flash Algorithm 43 | you need to config the flash algorithm for your target mcu, here is a example with stm32f1x 44 | Note: select the Reset and Run for target auto reset after program done. 45 | ![flash_algorithm](https://github.com/wuxx/nanoDAP/blob/master/doc/flash_algorithm.jpg) 46 | 47 | ## Reset Setting 48 | Generally, you may need to start the mcu when program done, config the Reset type to `SYSRESETREQ` here and select `Reset and Run` in the Flash Download Page above. 49 | ![reset_select](https://github.com/wuxx/nanoDAP-HS/blob/master/doc/reset_select.png) 50 | 51 | # DAPLink Usage 52 | ## Drag and Drop 53 | plug the DAPLink into PC USB, there will be a USB DISK appear called DAPLink, 54 | ![daplink_msd](https://github.com/wuxx/nanoDAP/blob/master/doc/DAPLink_MSD.png) 55 | DAPLink support drag and drop program, just drag the binary with suffix `hex` or `bin` into the DAPLink, the DAPLink will do all the program work. 56 | Tips: one firmware can only support one type of MCU drag-n-drop program, for different type of MCU, you may need to compile the source yourself. please check [here](https://github.com/ARMmbed/DAPLink/blob/master/docs/DEVELOPERS-GUIDE.md) 57 | 58 | ## Firmware Upgrade 59 | DAPLink implement a bootloader with USB MSD, which made it very easy for the firmware upgrade. 60 | 1. short the nRST and GND. 61 | 2. plug the DAPLink into PC USB, a USB DISK named `MAINTAINENCE` will appear. 62 | 3. disconnect the nRST and GND. 63 | 4. drag the new firmware into the `MAINTAINENCE`, wait for a few moment, then upgrade done, a new USB DISK `DAPLINK` will appear with replace of `MAINTAINENCE` 64 | 65 | # Product Link 66 | you can buy the DAPLink-HS from our offcial aliexpress shop [Muse Lab Factory Store](https://miusecntech-muselab.aliexpress.com/) or click [DAP-HS](https://www.aliexpress.com/item/1005001407779138.html?spm=a2g0o.store_pc_groupList.8148356.10.10649b43L2kzkd&pdp_npi=2%40dis%21USD%21US%20%2416.80%21US%20%2416.80%21%21%21%21%21%402132a25b16594870862517910e3a68%2112000015965144514%21sh&gatewayAdapt=4itemAdapt) and [Mini DAP-HS](https://www.aliexpress.com/item/1005002603229431.html?spm=a2g0o.store_pc_groupList.8148356.6.10649b43M9DGj6&pdp_npi=2%40dis%21USD%21US%20%2416.80%21US%20%2416.80%21%21%21%21%21%402132a25b16594870862517910e3a68%2112000021352187038%21sh&gatewayAdapt=4itemAdapt) 67 | -------------------------------------------------------------------------------- /doc/Atmel-6430-32-bit-Cortex-M3-Microcontroller-SAM3U4-SAM3U2-SAM3U1_Datasheet.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/wuxx/nanoDAP-HS/b629d2acf5910341de32ab4a8dbe2478d3efaec3/doc/Atmel-6430-32-bit-Cortex-M3-Microcontroller-SAM3U4-SAM3U2-SAM3U1_Datasheet.pdf -------------------------------------------------------------------------------- /doc/debug_select.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/wuxx/nanoDAP-HS/b629d2acf5910341de32ab4a8dbe2478d3efaec3/doc/debug_select.jpg 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-------------------------------------------------------------------------------- /doc/usb_device.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/wuxx/nanoDAP-HS/b629d2acf5910341de32ab4a8dbe2478d3efaec3/doc/usb_device.png -------------------------------------------------------------------------------- /driver/windows7_serial_driver/mbedWinSerial_16466.exe: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/wuxx/nanoDAP-HS/b629d2acf5910341de32ab4a8dbe2478d3efaec3/driver/windows7_serial_driver/mbedWinSerial_16466.exe -------------------------------------------------------------------------------- /firmware/README.md: -------------------------------------------------------------------------------- 1 | # 固件说明 2 | 3 | **sam3u2c_bl.hex** 4 | bootloader 5 | 6 | **sam3u2c_if.hex** 7 | firmware固件,支持JTAG/SWD/虚拟串口,请取日期最新的固件即可 8 | 9 | # 升级说明 # 10 | DAPLink自带一个带U盘的bootloader,可以方便的 11 | 进行拖拽升级,升级步骤如下: 12 | 1. 使用杜邦线将nRST和GND短接 13 | 2. 将DAP插入到PC中,预期应该会出现一个名为MAINTENANCE的U盘 14 | 3. 此时可以将nRST和GND断开 15 | 4. 将新的固件拖动到MAINTENANCE U盘中,即可自动完成固件升级 16 | 17 | -------------------------------------------------------------------------------- /test/stm32f103c8t6/led_test/.gitignore: -------------------------------------------------------------------------------- 1 | Objects/ 2 | Listings/ 3 | -------------------------------------------------------------------------------- /test/stm32f103c8t6/led_test/JLinkLog.txt: -------------------------------------------------------------------------------- 1 | T4BD8 107:261 SEGGER J-Link V6.30h Log File (0002ms, 7158ms total) 2 | T4BD8 107:261 DLL Compiled: Mar 16 2018 18:02:51 (0002ms, 7158ms total) 3 | T4BD8 107:261 Logging started @ 2019-09-28 11:48 (0002ms, 7158ms total) 4 | T4BD8 107:263 JLINK_SetWarnOutHandler(...) (0000ms, 7158ms total) 5 | T4BD8 107:263 JLINK_OpenEx(...) 6 | Firmware: J-Link J-Link V21 compiled Jun 26 2017 10:35:16 7 | Hardware: V1.00 8 | S/N: 775931665 9 | TELNET listener socket opened on port 19021WEBSRV 10 | Starting webserver (0204ms, 7362ms total) 11 | T4BD8 107:263 WEBSRV Webserver running on local port 19080 (0204ms, 7362ms total) 12 | T4BD8 107:263 returns O.K. (0204ms, 7362ms total) 13 | T4BD8 107:467 JLINK_GetEmuCaps() returns 0x98EA5A33 (0000ms, 7362ms total) 14 | T4BD8 107:468 JLINK_TIF_GetAvailable(...) (0000ms, 7362ms total) 15 | T4BD8 107:468 JLINK_SetErrorOutHandler(...) (0000ms, 7362ms total) 16 | T4BD8 107:468 JLINK_ExecCommand("ProjectFile = "G:\oss\nanoSTM32\software\led_test\JLinkSettings.ini"", ...). returns 0x00 (0006ms, 7368ms total) 17 | T4BD8 107:474 JLINK_ExecCommand("Device = STM32F103C8", ...). Device "STM32F103C8" selected. returns 0x00 (0003ms, 7372ms total) 18 | T4BD8 107:478 JLINK_ExecCommand("DisableConnectionTimeout", ...). returns 0x01 (0000ms, 7373ms total) 19 | T4BD8 107:479 JLINK_GetHardwareVersion() returns 0x2710 (0000ms, 7373ms total) 20 | T4BD8 107:479 JLINK_GetDLLVersion() returns 63008 (0000ms, 7373ms total) 21 | T4BD8 107:479 JLINK_GetFirmwareString(...) (0000ms, 7373ms total) 22 | T4BD8 107:479 JLINK_GetDLLVersion() returns 63008 (0000ms, 7373ms total) 23 | T4BD8 107:479 JLINK_GetCompileDateTime() (0000ms, 7373ms total) 24 | T4BD8 107:479 JLINK_GetFirmwareString(...) (0000ms, 7373ms total) 25 | T4BD8 107:479 JLINK_GetHardwareVersion() returns 0x2710 (0001ms, 7374ms total) 26 | T4BD8 107:480 JLINK_TIF_Select(JLINKARM_TIF_SWD) returns 0x00 (0001ms, 7375ms total) 27 | T4BD8 107:481 JLINK_SetSpeed(50000) (0000ms, 7375ms total) 28 | T4BD8 107:481 JLINK_SetResetType(JLINKARM_RESET_TYPE_NORMAL) returns JLINKARM_RESET_TYPE_NORMAL (0000ms, 7375ms total) 29 | T4BD8 107:481 JLINK_Reset() >0x10B TIF>Found SW-DP with ID 0x1BA01477 >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x28 TIF> 30 | >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x21 TIF> >0x10B TIF>Found SW-DP with ID 0x1BA01477 >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x28 TIF>Scanning AP map to find all available APs >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x21 TIF> 31 | >0x0D TIF> >0x21 TIF>AP[1]: Stopped AP scan as end of AP map has been reachedAP[0]: AHB-AP (IDR: 0x14770011)Iterating through AP map to find AHB-AP to use >0x42 TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x21 TIF> >0x42 TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x21 TIF>AP[0]: Core foundAP[0]: AHB-AP ROM base: 0xE00FF000 >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> 32 | >0x21 TIF>CPUID register: 0x411FC231. Implementer code: 0x41 (ARM)Found Cortex-M3 r1p1, Little endian. -- CPU_ReadMem(4 bytes @ 0xE000EDF0) -- CPU_WriteMem(4 bytes @ 0xE000EDF0) -- CPU_ReadMem(4 bytes @ 0xE0002000)FPUnit: 6 code (BP) slots and 2 literal slots -- CPU_ReadMem(4 bytes @ 0xE000EDFC) -- CPU_WriteMem(4 bytes @ 0xE000EDFC) -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) -- CPU_ReadMem(4 bytes @ 0xE000ED88) -- CPU_WriteMem(4 bytes @ 0xE000ED88) 33 | -- CPU_ReadMem(4 bytes @ 0xE000ED88) -- CPU_WriteMem(4 bytes @ 0xE000ED88)CoreSight components:ROMTbl[0] @ E00FF000 -- CPU_ReadMem(16 bytes @ 0xE00FF000) -- CPU_ReadMem(16 bytes @ 0xE000EFF0) -- CPU_ReadMem(16 bytes @ 0xE000EFE0)ROMTbl[0][0]: E000E000, CID: B105E00D, PID: 001BB000 SCS -- CPU_ReadMem(16 bytes @ 0xE0001FF0) -- CPU_ReadMem(16 bytes @ 0xE0001FE0)ROMTbl[0][1]: E0001000, CID: B105E00D, PID: 001BB002 DWT -- CPU_ReadMem(16 bytes @ 0xE0002FF0) -- CPU_ReadMem(16 bytes @ 0xE0002FE0) 34 | ROMTbl[0][2]: E0002000, CID: B105E00D, PID: 000BB003 FPB -- CPU_ReadMem(16 bytes @ 0xE0000FF0) -- CPU_ReadMem(16 bytes @ 0xE0000FE0)ROMTbl[0][3]: E0000000, CID: B105E00D, PID: 001BB001 ITM -- CPU_ReadMem(16 bytes @ 0xE00FF010) -- CPU_ReadMem(16 bytes @ 0xE0040FF0) -- CPU_ReadMem(16 bytes @ 0xE0040FE0)ROMTbl[0][4]: E0040000, CID: B105900D, PID: 001BB923 TPIU-Lite -- CPU is running -- CPU_WriteMem(4 bytes @ 0xE000EDF0) -- CPU is running -- CPU_WriteMem(4 bytes @ 0xE000EDFC) 35 | Reset: Halt core after reset via DEMCR.VC_CORERESET. >0x35 TIF>Reset: Reset device via AIRCR.SYSRESETREQ. -- CPU is running -- CPU_WriteMem(4 bytes @ 0xE000ED0C) >0x0D TIF> >0x28 TIF> -- CPU_ReadMem(4 bytes @ 0xE000EDF0) -- CPU_ReadMem(4 bytes @ 0xE000EDF0) -- CPU is running -- CPU_WriteMem(4 bytes @ 0xE000EDF0) -- CPU is running -- CPU_WriteMem(4 bytes @ 0xE000EDFC) -- CPU_ReadMem(4 bytes @ 0xE000EDF0) -- CPU_WriteMem(4 bytes @ 0xE0002000) -- CPU_ReadMem(4 bytes @ 0xE000EDFC) 36 | -- CPU_ReadMem(4 bytes @ 0xE0001000) (0343ms, 7718ms total) 37 | T4BD8 107:824 JLINK_GetId() >0x0D TIF> >0x21 TIF> returns 0x1BA01477 (0001ms, 7719ms total) 38 | T4BD8 107:831 JLINK_GetFirmwareString(...) (0001ms, 7720ms total) 39 | T4BD8 118:924 JLINK_SWO_Control(JLINKARM_SWO_CMD_GET_SPEED_INFO, ...) returns 0x00 (0001ms, 7721ms total) 40 | T4BD8 118:925 JLINK_SWO_Control(JLINKARM_SWO_CMD_GET_SPEED_INFO, ...) returns 0x00 (0000ms, 7721ms total) 41 | T4BD8 118:925 JLINK_SWO_Control(JLINKARM_SWO_CMD_GET_SPEED_INFO, ...) returns 0x00 (0001ms, 7722ms total) 42 | T4BD8 118:926 JLINK_SWO_Control(JLINKARM_SWO_CMD_GET_SPEED_INFO, ...) returns 0x00 (0000ms, 7722ms total) 43 | T4BD8 118:926 JLINK_SWO_Control(JLINKARM_SWO_CMD_GET_SPEED_INFO, ...) returns 0x00 (0000ms, 7722ms total) 44 | T4BD8 118:926 JLINK_SWO_Control(JLINKARM_SWO_CMD_GET_SPEED_INFO, ...) returns 0x00 (0001ms, 7723ms total) 45 | T4BD8 118:927 JLINK_SWO_Control(JLINKARM_SWO_CMD_GET_SPEED_INFO, ...) returns 0x00 (0000ms, 7723ms total) 46 | T4BD8 118:927 JLINK_SWO_Control(JLINKARM_SWO_CMD_GET_SPEED_INFO, ...) returns 0x00 (0001ms, 7724ms total) 47 | T4BD8 118:928 JLINK_SWO_Control(JLINKARM_SWO_CMD_GET_SPEED_INFO, ...) returns 0x00 (0000ms, 7724ms total) 48 | T4BD8 118:928 JLINK_SWO_Control(JLINKARM_SWO_CMD_GET_SPEED_INFO, ...) returns 0x00 (0001ms, 7725ms total) 49 | T4BD8 130:949 JLINK_Close() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001004) >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x28 TIF> (0023ms, 7748ms total) 50 | T4BD8 130:949 (0023ms, 7748ms total) 51 | T4BD8 130:949 Closed (0023ms, 7748ms total) 52 | -------------------------------------------------------------------------------- /test/stm32f103c8t6/led_test/JLinkSettings.ini: -------------------------------------------------------------------------------- 1 | [BREAKPOINTS] 2 | ForceImpTypeAny = 0 3 | ShowInfoWin = 1 4 | EnableFlashBP = 2 5 | BPDuringExecution = 0 6 | [CFI] 7 | CFISize = 0x00 8 | CFIAddr = 0x00 9 | [CPU] 10 | MonModeVTableAddr = 0xFFFFFFFF 11 | MonModeDebug = 0 12 | MaxNumAPs = 0 13 | LowPowerHandlingMode = 0 14 | OverrideMemMap = 0 15 | AllowSimulation = 1 16 | ScriptFile="" 17 | [FLASH] 18 | CacheExcludeSize = 0x00 19 | CacheExcludeAddr = 0x00 20 | MinNumBytesFlashDL = 0 21 | SkipProgOnCRCMatch = 1 22 | VerifyDownload = 1 23 | AllowCaching = 1 24 | EnableFlashDL = 2 25 | Override = 0 26 | Device="ARM7" 27 | [GENERAL] 28 | WorkRAMSize = 0x00 29 | WorkRAMAddr = 0x00 30 | RAMUsageLimit = 0x00 31 | [SWO] 32 | SWOLogFile="" 33 | [MEM] 34 | RdOverrideOrMask = 0x00 35 | RdOverrideAndMask = 0xFFFFFFFF 36 | RdOverrideAddr = 0xFFFFFFFF 37 | WrOverrideOrMask = 0x00 38 | WrOverrideAndMask = 0xFFFFFFFF 39 | WrOverrideAddr = 0xFFFFFFFF 40 | -------------------------------------------------------------------------------- /test/stm32f103c8t6/led_test/Libraries/CMSIS/stm32f10x.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/wuxx/nanoDAP-HS/b629d2acf5910341de32ab4a8dbe2478d3efaec3/test/stm32f103c8t6/led_test/Libraries/CMSIS/stm32f10x.h -------------------------------------------------------------------------------- /test/stm32f103c8t6/led_test/Libraries/CMSIS/system_stm32f10x.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file system_stm32f10x.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 | * 18 | *

© COPYRIGHT 2011 STMicroelectronics

19 | ****************************************************************************** 20 | */ 21 | 22 | /** @addtogroup CMSIS 23 | * @{ 24 | */ 25 | 26 | /** @addtogroup stm32f10x_system 27 | * @{ 28 | */ 29 | 30 | /** 31 | * @brief Define to prevent recursive inclusion 32 | */ 33 | #ifndef __SYSTEM_STM32F10X_H 34 | #define __SYSTEM_STM32F10X_H 35 | 36 | #ifdef __cplusplus 37 | extern "C" { 38 | #endif 39 | 40 | /** @addtogroup STM32F10x_System_Includes 41 | * @{ 42 | */ 43 | 44 | /** 45 | * @} 46 | */ 47 | 48 | 49 | /** @addtogroup STM32F10x_System_Exported_types 50 | * @{ 51 | */ 52 | 53 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ 54 | 55 | /** 56 | * @} 57 | */ 58 | 59 | /** @addtogroup STM32F10x_System_Exported_Constants 60 | * @{ 61 | */ 62 | 63 | /** 64 | * @} 65 | */ 66 | 67 | /** @addtogroup STM32F10x_System_Exported_Macros 68 | * @{ 69 | */ 70 | 71 | /** 72 | * @} 73 | */ 74 | 75 | /** @addtogroup STM32F10x_System_Exported_Functions 76 | * @{ 77 | */ 78 | 79 | extern void SystemInit(void); 80 | extern void SystemCoreClockUpdate(void); 81 | /** 82 | * @} 83 | */ 84 | 85 | #ifdef __cplusplus 86 | } 87 | #endif 88 | 89 | #endif /*__SYSTEM_STM32F10X_H */ 90 | 91 | /** 92 | * @} 93 | */ 94 | 95 | /** 96 | * @} 97 | */ 98 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 99 | -------------------------------------------------------------------------------- /test/stm32f103c8t6/led_test/Libraries/FWlib/inc/stm32f10x_bkp.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_bkp.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file contains all the functions prototypes for the BKP firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ 24 | #ifndef __STM32F10x_BKP_H 25 | #define __STM32F10x_BKP_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f10x.h" 33 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup BKP 39 | * @{ 40 | */ 41 | 42 | /** @defgroup BKP_Exported_Types 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @} 48 | */ 49 | 50 | /** @defgroup BKP_Exported_Constants 51 | * @{ 52 | */ 53 | 54 | /** @defgroup Tamper_Pin_active_level 55 | * @{ 56 | */ 57 | 58 | #define BKP_TamperPinLevel_High ((uint16_t)0x0000) 59 | #define BKP_TamperPinLevel_Low ((uint16_t)0x0001) 60 | #define IS_BKP_TAMPER_PIN_LEVEL(LEVEL) (((LEVEL) == BKP_TamperPinLevel_High) || \ 61 | ((LEVEL) == BKP_TamperPinLevel_Low)) 62 | /** 63 | * @} 64 | */ 65 | 66 | /** @defgroup RTC_output_source_to_output_on_the_Tamper_pin 67 | * @{ 68 | */ 69 | 70 | #define BKP_RTCOutputSource_None ((uint16_t)0x0000) 71 | #define BKP_RTCOutputSource_CalibClock ((uint16_t)0x0080) 72 | #define BKP_RTCOutputSource_Alarm ((uint16_t)0x0100) 73 | #define BKP_RTCOutputSource_Second ((uint16_t)0x0300) 74 | #define IS_BKP_RTC_OUTPUT_SOURCE(SOURCE) (((SOURCE) == BKP_RTCOutputSource_None) || \ 75 | ((SOURCE) == BKP_RTCOutputSource_CalibClock) || \ 76 | ((SOURCE) == BKP_RTCOutputSource_Alarm) || \ 77 | ((SOURCE) == BKP_RTCOutputSource_Second)) 78 | /** 79 | * @} 80 | */ 81 | 82 | /** @defgroup Data_Backup_Register 83 | * @{ 84 | */ 85 | 86 | #define BKP_DR1 ((uint16_t)0x0004) 87 | #define BKP_DR2 ((uint16_t)0x0008) 88 | #define BKP_DR3 ((uint16_t)0x000C) 89 | #define BKP_DR4 ((uint16_t)0x0010) 90 | #define BKP_DR5 ((uint16_t)0x0014) 91 | #define BKP_DR6 ((uint16_t)0x0018) 92 | #define BKP_DR7 ((uint16_t)0x001C) 93 | #define BKP_DR8 ((uint16_t)0x0020) 94 | #define BKP_DR9 ((uint16_t)0x0024) 95 | #define BKP_DR10 ((uint16_t)0x0028) 96 | #define BKP_DR11 ((uint16_t)0x0040) 97 | #define BKP_DR12 ((uint16_t)0x0044) 98 | #define BKP_DR13 ((uint16_t)0x0048) 99 | #define BKP_DR14 ((uint16_t)0x004C) 100 | #define BKP_DR15 ((uint16_t)0x0050) 101 | #define BKP_DR16 ((uint16_t)0x0054) 102 | #define BKP_DR17 ((uint16_t)0x0058) 103 | #define BKP_DR18 ((uint16_t)0x005C) 104 | #define BKP_DR19 ((uint16_t)0x0060) 105 | #define BKP_DR20 ((uint16_t)0x0064) 106 | #define BKP_DR21 ((uint16_t)0x0068) 107 | #define BKP_DR22 ((uint16_t)0x006C) 108 | #define BKP_DR23 ((uint16_t)0x0070) 109 | #define BKP_DR24 ((uint16_t)0x0074) 110 | #define BKP_DR25 ((uint16_t)0x0078) 111 | #define BKP_DR26 ((uint16_t)0x007C) 112 | #define BKP_DR27 ((uint16_t)0x0080) 113 | #define BKP_DR28 ((uint16_t)0x0084) 114 | #define BKP_DR29 ((uint16_t)0x0088) 115 | #define BKP_DR30 ((uint16_t)0x008C) 116 | #define BKP_DR31 ((uint16_t)0x0090) 117 | #define BKP_DR32 ((uint16_t)0x0094) 118 | #define BKP_DR33 ((uint16_t)0x0098) 119 | #define BKP_DR34 ((uint16_t)0x009C) 120 | #define BKP_DR35 ((uint16_t)0x00A0) 121 | #define BKP_DR36 ((uint16_t)0x00A4) 122 | #define BKP_DR37 ((uint16_t)0x00A8) 123 | #define BKP_DR38 ((uint16_t)0x00AC) 124 | #define BKP_DR39 ((uint16_t)0x00B0) 125 | #define BKP_DR40 ((uint16_t)0x00B4) 126 | #define BKP_DR41 ((uint16_t)0x00B8) 127 | #define BKP_DR42 ((uint16_t)0x00BC) 128 | 129 | #define IS_BKP_DR(DR) (((DR) == BKP_DR1) || ((DR) == BKP_DR2) || ((DR) == BKP_DR3) || \ 130 | ((DR) == BKP_DR4) || ((DR) == BKP_DR5) || ((DR) == BKP_DR6) || \ 131 | ((DR) == BKP_DR7) || ((DR) == BKP_DR8) || ((DR) == BKP_DR9) || \ 132 | ((DR) == BKP_DR10) || ((DR) == BKP_DR11) || ((DR) == BKP_DR12) || \ 133 | ((DR) == BKP_DR13) || ((DR) == BKP_DR14) || ((DR) == BKP_DR15) || \ 134 | ((DR) == BKP_DR16) || ((DR) == BKP_DR17) || ((DR) == BKP_DR18) || \ 135 | ((DR) == BKP_DR19) || ((DR) == BKP_DR20) || ((DR) == BKP_DR21) || \ 136 | ((DR) == BKP_DR22) || ((DR) == BKP_DR23) || ((DR) == BKP_DR24) || \ 137 | ((DR) == BKP_DR25) || ((DR) == BKP_DR26) || ((DR) == BKP_DR27) || \ 138 | ((DR) == BKP_DR28) || ((DR) == BKP_DR29) || ((DR) == BKP_DR30) || \ 139 | ((DR) == BKP_DR31) || ((DR) == BKP_DR32) || ((DR) == BKP_DR33) || \ 140 | ((DR) == BKP_DR34) || ((DR) == BKP_DR35) || ((DR) == BKP_DR36) || \ 141 | ((DR) == BKP_DR37) || ((DR) == BKP_DR38) || ((DR) == BKP_DR39) || \ 142 | ((DR) == BKP_DR40) || ((DR) == BKP_DR41) || ((DR) == BKP_DR42)) 143 | 144 | #define IS_BKP_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x7F) 145 | /** 146 | * @} 147 | */ 148 | 149 | /** 150 | * @} 151 | */ 152 | 153 | /** @defgroup BKP_Exported_Macros 154 | * @{ 155 | */ 156 | 157 | /** 158 | * @} 159 | */ 160 | 161 | /** @defgroup BKP_Exported_Functions 162 | * @{ 163 | */ 164 | 165 | void BKP_DeInit(void); 166 | void BKP_TamperPinLevelConfig(uint16_t BKP_TamperPinLevel); 167 | void BKP_TamperPinCmd(FunctionalState NewState); 168 | void BKP_ITConfig(FunctionalState NewState); 169 | void BKP_RTCOutputConfig(uint16_t BKP_RTCOutputSource); 170 | void BKP_SetRTCCalibrationValue(uint8_t CalibrationValue); 171 | void BKP_WriteBackupRegister(uint16_t BKP_DR, uint16_t Data); 172 | uint16_t BKP_ReadBackupRegister(uint16_t BKP_DR); 173 | FlagStatus BKP_GetFlagStatus(void); 174 | void BKP_ClearFlag(void); 175 | ITStatus BKP_GetITStatus(void); 176 | void BKP_ClearITPendingBit(void); 177 | 178 | #ifdef __cplusplus 179 | } 180 | #endif 181 | 182 | #endif /* __STM32F10x_BKP_H */ 183 | /** 184 | * @} 185 | */ 186 | 187 | /** 188 | * @} 189 | */ 190 | 191 | /** 192 | * @} 193 | */ 194 | 195 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 196 | -------------------------------------------------------------------------------- /test/stm32f103c8t6/led_test/Libraries/FWlib/inc/stm32f10x_cec.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_cec.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file contains all the functions prototypes for the CEC firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ 24 | #ifndef __STM32F10x_CEC_H 25 | #define __STM32F10x_CEC_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f10x.h" 33 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup CEC 39 | * @{ 40 | */ 41 | 42 | 43 | /** @defgroup CEC_Exported_Types 44 | * @{ 45 | */ 46 | 47 | /** 48 | * @brief CEC Init structure definition 49 | */ 50 | typedef struct 51 | { 52 | uint16_t CEC_BitTimingMode; /*!< Configures the CEC Bit Timing Error Mode. 53 | This parameter can be a value of @ref CEC_BitTiming_Mode */ 54 | uint16_t CEC_BitPeriodMode; /*!< Configures the CEC Bit Period Error Mode. 55 | This parameter can be a value of @ref CEC_BitPeriod_Mode */ 56 | }CEC_InitTypeDef; 57 | 58 | /** 59 | * @} 60 | */ 61 | 62 | /** @defgroup CEC_Exported_Constants 63 | * @{ 64 | */ 65 | 66 | /** @defgroup CEC_BitTiming_Mode 67 | * @{ 68 | */ 69 | #define CEC_BitTimingStdMode ((uint16_t)0x00) /*!< Bit timing error Standard Mode */ 70 | #define CEC_BitTimingErrFreeMode CEC_CFGR_BTEM /*!< Bit timing error Free Mode */ 71 | 72 | #define IS_CEC_BIT_TIMING_ERROR_MODE(MODE) (((MODE) == CEC_BitTimingStdMode) || \ 73 | ((MODE) == CEC_BitTimingErrFreeMode)) 74 | /** 75 | * @} 76 | */ 77 | 78 | /** @defgroup CEC_BitPeriod_Mode 79 | * @{ 80 | */ 81 | #define CEC_BitPeriodStdMode ((uint16_t)0x00) /*!< Bit period error Standard Mode */ 82 | #define CEC_BitPeriodFlexibleMode CEC_CFGR_BPEM /*!< Bit period error Flexible Mode */ 83 | 84 | #define IS_CEC_BIT_PERIOD_ERROR_MODE(MODE) (((MODE) == CEC_BitPeriodStdMode) || \ 85 | ((MODE) == CEC_BitPeriodFlexibleMode)) 86 | /** 87 | * @} 88 | */ 89 | 90 | 91 | /** @defgroup CEC_interrupts_definition 92 | * @{ 93 | */ 94 | #define CEC_IT_TERR CEC_CSR_TERR 95 | #define CEC_IT_TBTRF CEC_CSR_TBTRF 96 | #define CEC_IT_RERR CEC_CSR_RERR 97 | #define CEC_IT_RBTF CEC_CSR_RBTF 98 | #define IS_CEC_GET_IT(IT) (((IT) == CEC_IT_TERR) || ((IT) == CEC_IT_TBTRF) || \ 99 | ((IT) == CEC_IT_RERR) || ((IT) == CEC_IT_RBTF)) 100 | /** 101 | * @} 102 | */ 103 | 104 | 105 | /** @defgroup CEC_Own_Address 106 | * @{ 107 | */ 108 | #define IS_CEC_ADDRESS(ADDRESS) ((ADDRESS) < 0x10) 109 | /** 110 | * @} 111 | */ 112 | 113 | /** @defgroup CEC_Prescaler 114 | * @{ 115 | */ 116 | #define IS_CEC_PRESCALER(PRESCALER) ((PRESCALER) <= 0x3FFF) 117 | 118 | /** 119 | * @} 120 | */ 121 | 122 | /** @defgroup CEC_flags_definition 123 | * @{ 124 | */ 125 | 126 | /** 127 | * @brief ESR register flags 128 | */ 129 | #define CEC_FLAG_BTE ((uint32_t)0x10010000) 130 | #define CEC_FLAG_BPE ((uint32_t)0x10020000) 131 | #define CEC_FLAG_RBTFE ((uint32_t)0x10040000) 132 | #define CEC_FLAG_SBE ((uint32_t)0x10080000) 133 | #define CEC_FLAG_ACKE ((uint32_t)0x10100000) 134 | #define CEC_FLAG_LINE ((uint32_t)0x10200000) 135 | #define CEC_FLAG_TBTFE ((uint32_t)0x10400000) 136 | 137 | /** 138 | * @brief CSR register flags 139 | */ 140 | #define CEC_FLAG_TEOM ((uint32_t)0x00000002) 141 | #define CEC_FLAG_TERR ((uint32_t)0x00000004) 142 | #define CEC_FLAG_TBTRF ((uint32_t)0x00000008) 143 | #define CEC_FLAG_RSOM ((uint32_t)0x00000010) 144 | #define CEC_FLAG_REOM ((uint32_t)0x00000020) 145 | #define CEC_FLAG_RERR ((uint32_t)0x00000040) 146 | #define CEC_FLAG_RBTF ((uint32_t)0x00000080) 147 | 148 | #define IS_CEC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFF03) == 0x00) && ((FLAG) != 0x00)) 149 | 150 | #define IS_CEC_GET_FLAG(FLAG) (((FLAG) == CEC_FLAG_BTE) || ((FLAG) == CEC_FLAG_BPE) || \ 151 | ((FLAG) == CEC_FLAG_RBTFE) || ((FLAG)== CEC_FLAG_SBE) || \ 152 | ((FLAG) == CEC_FLAG_ACKE) || ((FLAG) == CEC_FLAG_LINE) || \ 153 | ((FLAG) == CEC_FLAG_TBTFE) || ((FLAG) == CEC_FLAG_TEOM) || \ 154 | ((FLAG) == CEC_FLAG_TERR) || ((FLAG) == CEC_FLAG_TBTRF) || \ 155 | ((FLAG) == CEC_FLAG_RSOM) || ((FLAG) == CEC_FLAG_REOM) || \ 156 | ((FLAG) == CEC_FLAG_RERR) || ((FLAG) == CEC_FLAG_RBTF)) 157 | 158 | /** 159 | * @} 160 | */ 161 | 162 | /** 163 | * @} 164 | */ 165 | 166 | /** @defgroup CEC_Exported_Macros 167 | * @{ 168 | */ 169 | 170 | /** 171 | * @} 172 | */ 173 | 174 | /** @defgroup CEC_Exported_Functions 175 | * @{ 176 | */ 177 | void CEC_DeInit(void); 178 | void CEC_Init(CEC_InitTypeDef* CEC_InitStruct); 179 | void CEC_Cmd(FunctionalState NewState); 180 | void CEC_ITConfig(FunctionalState NewState); 181 | void CEC_OwnAddressConfig(uint8_t CEC_OwnAddress); 182 | void CEC_SetPrescaler(uint16_t CEC_Prescaler); 183 | void CEC_SendDataByte(uint8_t Data); 184 | uint8_t CEC_ReceiveDataByte(void); 185 | void CEC_StartOfMessage(void); 186 | void CEC_EndOfMessageCmd(FunctionalState NewState); 187 | FlagStatus CEC_GetFlagStatus(uint32_t CEC_FLAG); 188 | void CEC_ClearFlag(uint32_t CEC_FLAG); 189 | ITStatus CEC_GetITStatus(uint8_t CEC_IT); 190 | void CEC_ClearITPendingBit(uint16_t CEC_IT); 191 | 192 | #ifdef __cplusplus 193 | } 194 | #endif 195 | 196 | #endif /* __STM32F10x_CEC_H */ 197 | 198 | /** 199 | * @} 200 | */ 201 | 202 | /** 203 | * @} 204 | */ 205 | 206 | /** 207 | * @} 208 | */ 209 | 210 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 211 | -------------------------------------------------------------------------------- /test/stm32f103c8t6/led_test/Libraries/FWlib/inc/stm32f10x_crc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_crc.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file contains all the functions prototypes for the CRC firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ 24 | #ifndef __STM32F10x_CRC_H 25 | #define __STM32F10x_CRC_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f10x.h" 33 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup CRC 39 | * @{ 40 | */ 41 | 42 | /** @defgroup CRC_Exported_Types 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @} 48 | */ 49 | 50 | /** @defgroup CRC_Exported_Constants 51 | * @{ 52 | */ 53 | 54 | /** 55 | * @} 56 | */ 57 | 58 | /** @defgroup CRC_Exported_Macros 59 | * @{ 60 | */ 61 | 62 | /** 63 | * @} 64 | */ 65 | 66 | /** @defgroup CRC_Exported_Functions 67 | * @{ 68 | */ 69 | 70 | void CRC_ResetDR(void); 71 | uint32_t CRC_CalcCRC(uint32_t Data); 72 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength); 73 | uint32_t CRC_GetCRC(void); 74 | void CRC_SetIDRegister(uint8_t IDValue); 75 | uint8_t CRC_GetIDRegister(void); 76 | 77 | #ifdef __cplusplus 78 | } 79 | #endif 80 | 81 | #endif /* __STM32F10x_CRC_H */ 82 | /** 83 | * @} 84 | */ 85 | 86 | /** 87 | * @} 88 | */ 89 | 90 | /** 91 | * @} 92 | */ 93 | 94 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 95 | -------------------------------------------------------------------------------- /test/stm32f103c8t6/led_test/Libraries/FWlib/inc/stm32f10x_dbgmcu.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_dbgmcu.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file contains all the functions prototypes for the DBGMCU 8 | * firmware library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ 24 | #ifndef __STM32F10x_DBGMCU_H 25 | #define __STM32F10x_DBGMCU_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f10x.h" 33 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup DBGMCU 39 | * @{ 40 | */ 41 | 42 | /** @defgroup DBGMCU_Exported_Types 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @} 48 | */ 49 | 50 | /** @defgroup DBGMCU_Exported_Constants 51 | * @{ 52 | */ 53 | 54 | #define DBGMCU_SLEEP ((uint32_t)0x00000001) 55 | #define DBGMCU_STOP ((uint32_t)0x00000002) 56 | #define DBGMCU_STANDBY ((uint32_t)0x00000004) 57 | #define DBGMCU_IWDG_STOP ((uint32_t)0x00000100) 58 | #define DBGMCU_WWDG_STOP ((uint32_t)0x00000200) 59 | #define DBGMCU_TIM1_STOP ((uint32_t)0x00000400) 60 | #define DBGMCU_TIM2_STOP ((uint32_t)0x00000800) 61 | #define DBGMCU_TIM3_STOP ((uint32_t)0x00001000) 62 | #define DBGMCU_TIM4_STOP ((uint32_t)0x00002000) 63 | #define DBGMCU_CAN1_STOP ((uint32_t)0x00004000) 64 | #define DBGMCU_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00008000) 65 | #define DBGMCU_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00010000) 66 | #define DBGMCU_TIM8_STOP ((uint32_t)0x00020000) 67 | #define DBGMCU_TIM5_STOP ((uint32_t)0x00040000) 68 | #define DBGMCU_TIM6_STOP ((uint32_t)0x00080000) 69 | #define DBGMCU_TIM7_STOP ((uint32_t)0x00100000) 70 | #define DBGMCU_CAN2_STOP ((uint32_t)0x00200000) 71 | #define DBGMCU_TIM15_STOP ((uint32_t)0x00400000) 72 | #define DBGMCU_TIM16_STOP ((uint32_t)0x00800000) 73 | #define DBGMCU_TIM17_STOP ((uint32_t)0x01000000) 74 | #define DBGMCU_TIM12_STOP ((uint32_t)0x02000000) 75 | #define DBGMCU_TIM13_STOP ((uint32_t)0x04000000) 76 | #define DBGMCU_TIM14_STOP ((uint32_t)0x08000000) 77 | #define DBGMCU_TIM9_STOP ((uint32_t)0x10000000) 78 | #define DBGMCU_TIM10_STOP ((uint32_t)0x20000000) 79 | #define DBGMCU_TIM11_STOP ((uint32_t)0x40000000) 80 | 81 | #define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0x800000F8) == 0x00) && ((PERIPH) != 0x00)) 82 | /** 83 | * @} 84 | */ 85 | 86 | /** @defgroup DBGMCU_Exported_Macros 87 | * @{ 88 | */ 89 | 90 | /** 91 | * @} 92 | */ 93 | 94 | /** @defgroup DBGMCU_Exported_Functions 95 | * @{ 96 | */ 97 | 98 | uint32_t DBGMCU_GetREVID(void); 99 | uint32_t DBGMCU_GetDEVID(void); 100 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState); 101 | 102 | #ifdef __cplusplus 103 | } 104 | #endif 105 | 106 | #endif /* __STM32F10x_DBGMCU_H */ 107 | /** 108 | * @} 109 | */ 110 | 111 | /** 112 | * @} 113 | */ 114 | 115 | /** 116 | * @} 117 | */ 118 | 119 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 120 | -------------------------------------------------------------------------------- /test/stm32f103c8t6/led_test/Libraries/FWlib/inc/stm32f10x_exti.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_exti.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file contains all the functions prototypes for the EXTI firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ 24 | #ifndef __STM32F10x_EXTI_H 25 | #define __STM32F10x_EXTI_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f10x.h" 33 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup EXTI 39 | * @{ 40 | */ 41 | 42 | /** @defgroup EXTI_Exported_Types 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @brief EXTI mode enumeration 48 | */ 49 | 50 | typedef enum 51 | { 52 | EXTI_Mode_Interrupt = 0x00, 53 | EXTI_Mode_Event = 0x04 54 | }EXTIMode_TypeDef; 55 | 56 | #define IS_EXTI_MODE(MODE) (((MODE) == EXTI_Mode_Interrupt) || ((MODE) == EXTI_Mode_Event)) 57 | 58 | /** 59 | * @brief EXTI Trigger enumeration 60 | */ 61 | 62 | typedef enum 63 | { 64 | EXTI_Trigger_Rising = 0x08, 65 | EXTI_Trigger_Falling = 0x0C, 66 | EXTI_Trigger_Rising_Falling = 0x10 67 | }EXTITrigger_TypeDef; 68 | 69 | #define IS_EXTI_TRIGGER(TRIGGER) (((TRIGGER) == EXTI_Trigger_Rising) || \ 70 | ((TRIGGER) == EXTI_Trigger_Falling) || \ 71 | ((TRIGGER) == EXTI_Trigger_Rising_Falling)) 72 | /** 73 | * @brief EXTI Init Structure definition 74 | */ 75 | 76 | typedef struct 77 | { 78 | uint32_t EXTI_Line; /*!< Specifies the EXTI lines to be enabled or disabled. 79 | This parameter can be any combination of @ref EXTI_Lines */ 80 | 81 | EXTIMode_TypeDef EXTI_Mode; /*!< Specifies the mode for the EXTI lines. 82 | This parameter can be a value of @ref EXTIMode_TypeDef */ 83 | 84 | EXTITrigger_TypeDef EXTI_Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines. 85 | This parameter can be a value of @ref EXTIMode_TypeDef */ 86 | 87 | FunctionalState EXTI_LineCmd; /*!< Specifies the new state of the selected EXTI lines. 88 | This parameter can be set either to ENABLE or DISABLE */ 89 | }EXTI_InitTypeDef; 90 | 91 | /** 92 | * @} 93 | */ 94 | 95 | /** @defgroup EXTI_Exported_Constants 96 | * @{ 97 | */ 98 | 99 | /** @defgroup EXTI_Lines 100 | * @{ 101 | */ 102 | 103 | #define EXTI_Line0 ((uint32_t)0x00001) /*!< External interrupt line 0 */ 104 | #define EXTI_Line1 ((uint32_t)0x00002) /*!< External interrupt line 1 */ 105 | #define EXTI_Line2 ((uint32_t)0x00004) /*!< External interrupt line 2 */ 106 | #define EXTI_Line3 ((uint32_t)0x00008) /*!< External interrupt line 3 */ 107 | #define EXTI_Line4 ((uint32_t)0x00010) /*!< External interrupt line 4 */ 108 | #define EXTI_Line5 ((uint32_t)0x00020) /*!< External interrupt line 5 */ 109 | #define EXTI_Line6 ((uint32_t)0x00040) /*!< External interrupt line 6 */ 110 | #define EXTI_Line7 ((uint32_t)0x00080) /*!< External interrupt line 7 */ 111 | #define EXTI_Line8 ((uint32_t)0x00100) /*!< External interrupt line 8 */ 112 | #define EXTI_Line9 ((uint32_t)0x00200) /*!< External interrupt line 9 */ 113 | #define EXTI_Line10 ((uint32_t)0x00400) /*!< External interrupt line 10 */ 114 | #define EXTI_Line11 ((uint32_t)0x00800) /*!< External interrupt line 11 */ 115 | #define EXTI_Line12 ((uint32_t)0x01000) /*!< External interrupt line 12 */ 116 | #define EXTI_Line13 ((uint32_t)0x02000) /*!< External interrupt line 13 */ 117 | #define EXTI_Line14 ((uint32_t)0x04000) /*!< External interrupt line 14 */ 118 | #define EXTI_Line15 ((uint32_t)0x08000) /*!< External interrupt line 15 */ 119 | #define EXTI_Line16 ((uint32_t)0x10000) /*!< External interrupt line 16 Connected to the PVD Output */ 120 | #define EXTI_Line17 ((uint32_t)0x20000) /*!< External interrupt line 17 Connected to the RTC Alarm event */ 121 | #define EXTI_Line18 ((uint32_t)0x40000) /*!< External interrupt line 18 Connected to the USB Device/USB OTG FS 122 | Wakeup from suspend event */ 123 | #define EXTI_Line19 ((uint32_t)0x80000) /*!< External interrupt line 19 Connected to the Ethernet Wakeup event */ 124 | 125 | #define IS_EXTI_LINE(LINE) ((((LINE) & (uint32_t)0xFFF00000) == 0x00) && ((LINE) != (uint16_t)0x00)) 126 | #define IS_GET_EXTI_LINE(LINE) (((LINE) == EXTI_Line0) || ((LINE) == EXTI_Line1) || \ 127 | ((LINE) == EXTI_Line2) || ((LINE) == EXTI_Line3) || \ 128 | ((LINE) == EXTI_Line4) || ((LINE) == EXTI_Line5) || \ 129 | ((LINE) == EXTI_Line6) || ((LINE) == EXTI_Line7) || \ 130 | ((LINE) == EXTI_Line8) || ((LINE) == EXTI_Line9) || \ 131 | ((LINE) == EXTI_Line10) || ((LINE) == EXTI_Line11) || \ 132 | ((LINE) == EXTI_Line12) || ((LINE) == EXTI_Line13) || \ 133 | ((LINE) == EXTI_Line14) || ((LINE) == EXTI_Line15) || \ 134 | ((LINE) == EXTI_Line16) || ((LINE) == EXTI_Line17) || \ 135 | ((LINE) == EXTI_Line18) || ((LINE) == EXTI_Line19)) 136 | 137 | 138 | /** 139 | * @} 140 | */ 141 | 142 | /** 143 | * @} 144 | */ 145 | 146 | /** @defgroup EXTI_Exported_Macros 147 | * @{ 148 | */ 149 | 150 | /** 151 | * @} 152 | */ 153 | 154 | /** @defgroup EXTI_Exported_Functions 155 | * @{ 156 | */ 157 | 158 | void EXTI_DeInit(void); 159 | void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct); 160 | void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct); 161 | void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line); 162 | FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line); 163 | void EXTI_ClearFlag(uint32_t EXTI_Line); 164 | ITStatus EXTI_GetITStatus(uint32_t EXTI_Line); 165 | void EXTI_ClearITPendingBit(uint32_t EXTI_Line); 166 | 167 | #ifdef __cplusplus 168 | } 169 | #endif 170 | 171 | #endif /* __STM32F10x_EXTI_H */ 172 | /** 173 | * @} 174 | */ 175 | 176 | /** 177 | * @} 178 | */ 179 | 180 | /** 181 | * @} 182 | */ 183 | 184 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 185 | -------------------------------------------------------------------------------- /test/stm32f103c8t6/led_test/Libraries/FWlib/inc/stm32f10x_gpio.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/wuxx/nanoDAP-HS/b629d2acf5910341de32ab4a8dbe2478d3efaec3/test/stm32f103c8t6/led_test/Libraries/FWlib/inc/stm32f10x_gpio.h -------------------------------------------------------------------------------- /test/stm32f103c8t6/led_test/Libraries/FWlib/inc/stm32f10x_iwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_iwdg.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file contains all the functions prototypes for the IWDG 8 | * firmware library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ 24 | #ifndef __STM32F10x_IWDG_H 25 | #define __STM32F10x_IWDG_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f10x.h" 33 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup IWDG 39 | * @{ 40 | */ 41 | 42 | /** @defgroup IWDG_Exported_Types 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @} 48 | */ 49 | 50 | /** @defgroup IWDG_Exported_Constants 51 | * @{ 52 | */ 53 | 54 | /** @defgroup IWDG_WriteAccess 55 | * @{ 56 | */ 57 | 58 | #define IWDG_WriteAccess_Enable ((uint16_t)0x5555) 59 | #define IWDG_WriteAccess_Disable ((uint16_t)0x0000) 60 | #define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \ 61 | ((ACCESS) == IWDG_WriteAccess_Disable)) 62 | /** 63 | * @} 64 | */ 65 | 66 | /** @defgroup IWDG_prescaler 67 | * @{ 68 | */ 69 | 70 | #define IWDG_Prescaler_4 ((uint8_t)0x00) 71 | #define IWDG_Prescaler_8 ((uint8_t)0x01) 72 | #define IWDG_Prescaler_16 ((uint8_t)0x02) 73 | #define IWDG_Prescaler_32 ((uint8_t)0x03) 74 | #define IWDG_Prescaler_64 ((uint8_t)0x04) 75 | #define IWDG_Prescaler_128 ((uint8_t)0x05) 76 | #define IWDG_Prescaler_256 ((uint8_t)0x06) 77 | #define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4) || \ 78 | ((PRESCALER) == IWDG_Prescaler_8) || \ 79 | ((PRESCALER) == IWDG_Prescaler_16) || \ 80 | ((PRESCALER) == IWDG_Prescaler_32) || \ 81 | ((PRESCALER) == IWDG_Prescaler_64) || \ 82 | ((PRESCALER) == IWDG_Prescaler_128)|| \ 83 | ((PRESCALER) == IWDG_Prescaler_256)) 84 | /** 85 | * @} 86 | */ 87 | 88 | /** @defgroup IWDG_Flag 89 | * @{ 90 | */ 91 | 92 | #define IWDG_FLAG_PVU ((uint16_t)0x0001) 93 | #define IWDG_FLAG_RVU ((uint16_t)0x0002) 94 | #define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU)) 95 | #define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF) 96 | /** 97 | * @} 98 | */ 99 | 100 | /** 101 | * @} 102 | */ 103 | 104 | /** @defgroup IWDG_Exported_Macros 105 | * @{ 106 | */ 107 | 108 | /** 109 | * @} 110 | */ 111 | 112 | /** @defgroup IWDG_Exported_Functions 113 | * @{ 114 | */ 115 | 116 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess); 117 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler); 118 | void IWDG_SetReload(uint16_t Reload); 119 | void IWDG_ReloadCounter(void); 120 | void IWDG_Enable(void); 121 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG); 122 | 123 | #ifdef __cplusplus 124 | } 125 | #endif 126 | 127 | #endif /* __STM32F10x_IWDG_H */ 128 | /** 129 | * @} 130 | */ 131 | 132 | /** 133 | * @} 134 | */ 135 | 136 | /** 137 | * @} 138 | */ 139 | 140 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 141 | -------------------------------------------------------------------------------- /test/stm32f103c8t6/led_test/Libraries/FWlib/inc/stm32f10x_pwr.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_pwr.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file contains all the functions prototypes for the PWR firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ 24 | #ifndef __STM32F10x_PWR_H 25 | #define __STM32F10x_PWR_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f10x.h" 33 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup PWR 39 | * @{ 40 | */ 41 | 42 | /** @defgroup PWR_Exported_Types 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @} 48 | */ 49 | 50 | /** @defgroup PWR_Exported_Constants 51 | * @{ 52 | */ 53 | 54 | /** @defgroup PVD_detection_level 55 | * @{ 56 | */ 57 | 58 | #define PWR_PVDLevel_2V2 ((uint32_t)0x00000000) 59 | #define PWR_PVDLevel_2V3 ((uint32_t)0x00000020) 60 | #define PWR_PVDLevel_2V4 ((uint32_t)0x00000040) 61 | #define PWR_PVDLevel_2V5 ((uint32_t)0x00000060) 62 | #define PWR_PVDLevel_2V6 ((uint32_t)0x00000080) 63 | #define PWR_PVDLevel_2V7 ((uint32_t)0x000000A0) 64 | #define PWR_PVDLevel_2V8 ((uint32_t)0x000000C0) 65 | #define PWR_PVDLevel_2V9 ((uint32_t)0x000000E0) 66 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_2V2) || ((LEVEL) == PWR_PVDLevel_2V3)|| \ 67 | ((LEVEL) == PWR_PVDLevel_2V4) || ((LEVEL) == PWR_PVDLevel_2V5)|| \ 68 | ((LEVEL) == PWR_PVDLevel_2V6) || ((LEVEL) == PWR_PVDLevel_2V7)|| \ 69 | ((LEVEL) == PWR_PVDLevel_2V8) || ((LEVEL) == PWR_PVDLevel_2V9)) 70 | /** 71 | * @} 72 | */ 73 | 74 | /** @defgroup Regulator_state_is_STOP_mode 75 | * @{ 76 | */ 77 | 78 | #define PWR_Regulator_ON ((uint32_t)0x00000000) 79 | #define PWR_Regulator_LowPower ((uint32_t)0x00000001) 80 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_Regulator_ON) || \ 81 | ((REGULATOR) == PWR_Regulator_LowPower)) 82 | /** 83 | * @} 84 | */ 85 | 86 | /** @defgroup STOP_mode_entry 87 | * @{ 88 | */ 89 | 90 | #define PWR_STOPEntry_WFI ((uint8_t)0x01) 91 | #define PWR_STOPEntry_WFE ((uint8_t)0x02) 92 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE)) 93 | 94 | /** 95 | * @} 96 | */ 97 | 98 | /** @defgroup PWR_Flag 99 | * @{ 100 | */ 101 | 102 | #define PWR_FLAG_WU ((uint32_t)0x00000001) 103 | #define PWR_FLAG_SB ((uint32_t)0x00000002) 104 | #define PWR_FLAG_PVDO ((uint32_t)0x00000004) 105 | #define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \ 106 | ((FLAG) == PWR_FLAG_PVDO)) 107 | 108 | #define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB)) 109 | /** 110 | * @} 111 | */ 112 | 113 | /** 114 | * @} 115 | */ 116 | 117 | /** @defgroup PWR_Exported_Macros 118 | * @{ 119 | */ 120 | 121 | /** 122 | * @} 123 | */ 124 | 125 | /** @defgroup PWR_Exported_Functions 126 | * @{ 127 | */ 128 | 129 | void PWR_DeInit(void); 130 | void PWR_BackupAccessCmd(FunctionalState NewState); 131 | void PWR_PVDCmd(FunctionalState NewState); 132 | void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel); 133 | void PWR_WakeUpPinCmd(FunctionalState NewState); 134 | void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry); 135 | void PWR_EnterSTANDBYMode(void); 136 | FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG); 137 | void PWR_ClearFlag(uint32_t PWR_FLAG); 138 | 139 | #ifdef __cplusplus 140 | } 141 | #endif 142 | 143 | #endif /* __STM32F10x_PWR_H */ 144 | /** 145 | * @} 146 | */ 147 | 148 | /** 149 | * @} 150 | */ 151 | 152 | /** 153 | * @} 154 | */ 155 | 156 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 157 | -------------------------------------------------------------------------------- /test/stm32f103c8t6/led_test/Libraries/FWlib/inc/stm32f10x_rtc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_rtc.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file contains all the functions prototypes for the RTC firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ 24 | #ifndef __STM32F10x_RTC_H 25 | #define __STM32F10x_RTC_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f10x.h" 33 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup RTC 39 | * @{ 40 | */ 41 | 42 | /** @defgroup RTC_Exported_Types 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @} 48 | */ 49 | 50 | /** @defgroup RTC_Exported_Constants 51 | * @{ 52 | */ 53 | 54 | /** @defgroup RTC_interrupts_define 55 | * @{ 56 | */ 57 | 58 | #define RTC_IT_OW ((uint16_t)0x0004) /*!< Overflow interrupt */ 59 | #define RTC_IT_ALR ((uint16_t)0x0002) /*!< Alarm interrupt */ 60 | #define RTC_IT_SEC ((uint16_t)0x0001) /*!< Second interrupt */ 61 | #define IS_RTC_IT(IT) ((((IT) & (uint16_t)0xFFF8) == 0x00) && ((IT) != 0x00)) 62 | #define IS_RTC_GET_IT(IT) (((IT) == RTC_IT_OW) || ((IT) == RTC_IT_ALR) || \ 63 | ((IT) == RTC_IT_SEC)) 64 | /** 65 | * @} 66 | */ 67 | 68 | /** @defgroup RTC_interrupts_flags 69 | * @{ 70 | */ 71 | 72 | #define RTC_FLAG_RTOFF ((uint16_t)0x0020) /*!< RTC Operation OFF flag */ 73 | #define RTC_FLAG_RSF ((uint16_t)0x0008) /*!< Registers Synchronized flag */ 74 | #define RTC_FLAG_OW ((uint16_t)0x0004) /*!< Overflow flag */ 75 | #define RTC_FLAG_ALR ((uint16_t)0x0002) /*!< Alarm flag */ 76 | #define RTC_FLAG_SEC ((uint16_t)0x0001) /*!< Second flag */ 77 | #define IS_RTC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFFF0) == 0x00) && ((FLAG) != 0x00)) 78 | #define IS_RTC_GET_FLAG(FLAG) (((FLAG) == RTC_FLAG_RTOFF) || ((FLAG) == RTC_FLAG_RSF) || \ 79 | ((FLAG) == RTC_FLAG_OW) || ((FLAG) == RTC_FLAG_ALR) || \ 80 | ((FLAG) == RTC_FLAG_SEC)) 81 | #define IS_RTC_PRESCALER(PRESCALER) ((PRESCALER) <= 0xFFFFF) 82 | 83 | /** 84 | * @} 85 | */ 86 | 87 | /** 88 | * @} 89 | */ 90 | 91 | /** @defgroup RTC_Exported_Macros 92 | * @{ 93 | */ 94 | 95 | /** 96 | * @} 97 | */ 98 | 99 | /** @defgroup RTC_Exported_Functions 100 | * @{ 101 | */ 102 | 103 | void RTC_ITConfig(uint16_t RTC_IT, FunctionalState NewState); 104 | void RTC_EnterConfigMode(void); 105 | void RTC_ExitConfigMode(void); 106 | uint32_t RTC_GetCounter(void); 107 | void RTC_SetCounter(uint32_t CounterValue); 108 | void RTC_SetPrescaler(uint32_t PrescalerValue); 109 | void RTC_SetAlarm(uint32_t AlarmValue); 110 | uint32_t RTC_GetDivider(void); 111 | void RTC_WaitForLastTask(void); 112 | void RTC_WaitForSynchro(void); 113 | FlagStatus RTC_GetFlagStatus(uint16_t RTC_FLAG); 114 | void RTC_ClearFlag(uint16_t RTC_FLAG); 115 | ITStatus RTC_GetITStatus(uint16_t RTC_IT); 116 | void RTC_ClearITPendingBit(uint16_t RTC_IT); 117 | 118 | #ifdef __cplusplus 119 | } 120 | #endif 121 | 122 | #endif /* __STM32F10x_RTC_H */ 123 | /** 124 | * @} 125 | */ 126 | 127 | /** 128 | * @} 129 | */ 130 | 131 | /** 132 | * @} 133 | */ 134 | 135 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 136 | -------------------------------------------------------------------------------- /test/stm32f103c8t6/led_test/Libraries/FWlib/inc/stm32f10x_wwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_wwdg.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file contains all the functions prototypes for the WWDG firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ 24 | #ifndef __STM32F10x_WWDG_H 25 | #define __STM32F10x_WWDG_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f10x.h" 33 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup WWDG 39 | * @{ 40 | */ 41 | 42 | /** @defgroup WWDG_Exported_Types 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @} 48 | */ 49 | 50 | /** @defgroup WWDG_Exported_Constants 51 | * @{ 52 | */ 53 | 54 | /** @defgroup WWDG_Prescaler 55 | * @{ 56 | */ 57 | 58 | #define WWDG_Prescaler_1 ((uint32_t)0x00000000) 59 | #define WWDG_Prescaler_2 ((uint32_t)0x00000080) 60 | #define WWDG_Prescaler_4 ((uint32_t)0x00000100) 61 | #define WWDG_Prescaler_8 ((uint32_t)0x00000180) 62 | #define IS_WWDG_PRESCALER(PRESCALER) (((PRESCALER) == WWDG_Prescaler_1) || \ 63 | ((PRESCALER) == WWDG_Prescaler_2) || \ 64 | ((PRESCALER) == WWDG_Prescaler_4) || \ 65 | ((PRESCALER) == WWDG_Prescaler_8)) 66 | #define IS_WWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0x7F) 67 | #define IS_WWDG_COUNTER(COUNTER) (((COUNTER) >= 0x40) && ((COUNTER) <= 0x7F)) 68 | 69 | /** 70 | * @} 71 | */ 72 | 73 | /** 74 | * @} 75 | */ 76 | 77 | /** @defgroup WWDG_Exported_Macros 78 | * @{ 79 | */ 80 | /** 81 | * @} 82 | */ 83 | 84 | /** @defgroup WWDG_Exported_Functions 85 | * @{ 86 | */ 87 | 88 | void WWDG_DeInit(void); 89 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler); 90 | void WWDG_SetWindowValue(uint8_t WindowValue); 91 | void WWDG_EnableIT(void); 92 | void WWDG_SetCounter(uint8_t Counter); 93 | void WWDG_Enable(uint8_t Counter); 94 | FlagStatus WWDG_GetFlagStatus(void); 95 | void WWDG_ClearFlag(void); 96 | 97 | #ifdef __cplusplus 98 | } 99 | #endif 100 | 101 | #endif /* __STM32F10x_WWDG_H */ 102 | 103 | /** 104 | * @} 105 | */ 106 | 107 | /** 108 | * @} 109 | */ 110 | 111 | /** 112 | * @} 113 | */ 114 | 115 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 116 | -------------------------------------------------------------------------------- /test/stm32f103c8t6/led_test/Libraries/FWlib/src/misc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file misc.c 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file provides all the miscellaneous firmware functions (add-on 8 | * to CMSIS functions). 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Includes ------------------------------------------------------------------*/ 24 | #include "misc.h" 25 | 26 | /** @addtogroup STM32F10x_StdPeriph_Driver 27 | * @{ 28 | */ 29 | 30 | /** @defgroup MISC 31 | * @brief MISC driver modules 32 | * @{ 33 | */ 34 | 35 | /** @defgroup MISC_Private_TypesDefinitions 36 | * @{ 37 | */ 38 | 39 | /** 40 | * @} 41 | */ 42 | 43 | /** @defgroup MISC_Private_Defines 44 | * @{ 45 | */ 46 | 47 | #define AIRCR_VECTKEY_MASK ((uint32_t)0x05FA0000) 48 | /** 49 | * @} 50 | */ 51 | 52 | /** @defgroup MISC_Private_Macros 53 | * @{ 54 | */ 55 | 56 | /** 57 | * @} 58 | */ 59 | 60 | /** @defgroup MISC_Private_Variables 61 | * @{ 62 | */ 63 | 64 | /** 65 | * @} 66 | */ 67 | 68 | /** @defgroup MISC_Private_FunctionPrototypes 69 | * @{ 70 | */ 71 | 72 | /** 73 | * @} 74 | */ 75 | 76 | /** @defgroup MISC_Private_Functions 77 | * @{ 78 | */ 79 | 80 | /** 81 | * @brief Configures the priority grouping: pre-emption priority and subpriority. 82 | * @param NVIC_PriorityGroup: specifies the priority grouping bits length. 83 | * This parameter can be one of the following values: 84 | * @arg NVIC_PriorityGroup_0: 0 bits for pre-emption priority 85 | * 4 bits for subpriority 86 | * @arg NVIC_PriorityGroup_1: 1 bits for pre-emption priority 87 | * 3 bits for subpriority 88 | * @arg NVIC_PriorityGroup_2: 2 bits for pre-emption priority 89 | * 2 bits for subpriority 90 | * @arg NVIC_PriorityGroup_3: 3 bits for pre-emption priority 91 | * 1 bits for subpriority 92 | * @arg NVIC_PriorityGroup_4: 4 bits for pre-emption priority 93 | * 0 bits for subpriority 94 | * @retval None 95 | */ 96 | void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup) 97 | { 98 | /* Check the parameters */ 99 | assert_param(IS_NVIC_PRIORITY_GROUP(NVIC_PriorityGroup)); 100 | 101 | /* Set the PRIGROUP[10:8] bits according to NVIC_PriorityGroup value */ 102 | SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PriorityGroup; 103 | } 104 | 105 | /** 106 | * @brief Initializes the NVIC peripheral according to the specified 107 | * parameters in the NVIC_InitStruct. 108 | * @param NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains 109 | * the configuration information for the specified NVIC peripheral. 110 | * @retval None 111 | */ 112 | void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct) 113 | { 114 | uint32_t tmppriority = 0x00, tmppre = 0x00, tmpsub = 0x0F; 115 | 116 | /* Check the parameters */ 117 | assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd)); 118 | assert_param(IS_NVIC_PREEMPTION_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority)); 119 | assert_param(IS_NVIC_SUB_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelSubPriority)); 120 | 121 | if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE) 122 | { 123 | /* Compute the Corresponding IRQ Priority --------------------------------*/ 124 | tmppriority = (0x700 - ((SCB->AIRCR) & (uint32_t)0x700))>> 0x08; 125 | tmppre = (0x4 - tmppriority); 126 | tmpsub = tmpsub >> tmppriority; 127 | 128 | tmppriority = (uint32_t)NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority << tmppre; 129 | tmppriority |= NVIC_InitStruct->NVIC_IRQChannelSubPriority & tmpsub; 130 | tmppriority = tmppriority << 0x04; 131 | 132 | NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel] = tmppriority; 133 | 134 | /* Enable the Selected IRQ Channels --------------------------------------*/ 135 | NVIC->ISER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] = 136 | (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F); 137 | } 138 | else 139 | { 140 | /* Disable the Selected IRQ Channels -------------------------------------*/ 141 | NVIC->ICER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] = 142 | (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F); 143 | } 144 | } 145 | 146 | /** 147 | * @brief Sets the vector table location and Offset. 148 | * @param NVIC_VectTab: specifies if the vector table is in RAM or FLASH memory. 149 | * This parameter can be one of the following values: 150 | * @arg NVIC_VectTab_RAM 151 | * @arg NVIC_VectTab_FLASH 152 | * @param Offset: Vector Table base offset field. This value must be a multiple 153 | * of 0x200. 154 | * @retval None 155 | */ 156 | void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset) 157 | { 158 | /* Check the parameters */ 159 | assert_param(IS_NVIC_VECTTAB(NVIC_VectTab)); 160 | assert_param(IS_NVIC_OFFSET(Offset)); 161 | 162 | SCB->VTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80); 163 | } 164 | 165 | /** 166 | * @brief Selects the condition for the system to enter low power mode. 167 | * @param LowPowerMode: Specifies the new mode for the system to enter low power mode. 168 | * This parameter can be one of the following values: 169 | * @arg NVIC_LP_SEVONPEND 170 | * @arg NVIC_LP_SLEEPDEEP 171 | * @arg NVIC_LP_SLEEPONEXIT 172 | * @param NewState: new state of LP condition. This parameter can be: ENABLE or DISABLE. 173 | * @retval None 174 | */ 175 | void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState) 176 | { 177 | /* Check the parameters */ 178 | assert_param(IS_NVIC_LP(LowPowerMode)); 179 | assert_param(IS_FUNCTIONAL_STATE(NewState)); 180 | 181 | if (NewState != DISABLE) 182 | { 183 | SCB->SCR |= LowPowerMode; 184 | } 185 | else 186 | { 187 | SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode); 188 | } 189 | } 190 | 191 | /** 192 | * @brief Configures the SysTick clock source. 193 | * @param SysTick_CLKSource: specifies the SysTick clock source. 194 | * This parameter can be one of the following values: 195 | * @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source. 196 | * @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source. 197 | * @retval None 198 | */ 199 | void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource) 200 | { 201 | /* Check the parameters */ 202 | assert_param(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource)); 203 | if (SysTick_CLKSource == SysTick_CLKSource_HCLK) 204 | { 205 | SysTick->CTRL |= SysTick_CLKSource_HCLK; 206 | } 207 | else 208 | { 209 | SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8; 210 | } 211 | } 212 | 213 | /** 214 | * @} 215 | */ 216 | 217 | /** 218 | * @} 219 | */ 220 | 221 | /** 222 | * @} 223 | */ 224 | 225 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 226 | -------------------------------------------------------------------------------- /test/stm32f103c8t6/led_test/Libraries/FWlib/src/stm32f10x_bkp.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_bkp.c 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file provides all the BKP firmware functions. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 | * 18 | *

© COPYRIGHT 2011 STMicroelectronics

19 | ****************************************************************************** 20 | */ 21 | 22 | /* Includes ------------------------------------------------------------------*/ 23 | #include "stm32f10x_bkp.h" 24 | #include "stm32f10x_rcc.h" 25 | 26 | /** @addtogroup STM32F10x_StdPeriph_Driver 27 | * @{ 28 | */ 29 | 30 | /** @defgroup BKP 31 | * @brief BKP driver modules 32 | * @{ 33 | */ 34 | 35 | /** @defgroup BKP_Private_TypesDefinitions 36 | * @{ 37 | */ 38 | 39 | /** 40 | * @} 41 | */ 42 | 43 | /** @defgroup BKP_Private_Defines 44 | * @{ 45 | */ 46 | 47 | /* ------------ BKP registers bit address in the alias region --------------- */ 48 | #define BKP_OFFSET (BKP_BASE - PERIPH_BASE) 49 | 50 | /* --- CR Register ----*/ 51 | 52 | /* Alias word address of TPAL bit */ 53 | #define CR_OFFSET (BKP_OFFSET + 0x30) 54 | #define TPAL_BitNumber 0x01 55 | #define CR_TPAL_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (TPAL_BitNumber * 4)) 56 | 57 | /* Alias word address of TPE bit */ 58 | #define TPE_BitNumber 0x00 59 | #define CR_TPE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (TPE_BitNumber * 4)) 60 | 61 | /* --- CSR Register ---*/ 62 | 63 | /* Alias word address of TPIE bit */ 64 | #define CSR_OFFSET (BKP_OFFSET + 0x34) 65 | #define TPIE_BitNumber 0x02 66 | #define CSR_TPIE_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TPIE_BitNumber * 4)) 67 | 68 | /* Alias word address of TIF bit */ 69 | #define TIF_BitNumber 0x09 70 | #define CSR_TIF_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TIF_BitNumber * 4)) 71 | 72 | /* Alias word address of TEF bit */ 73 | #define TEF_BitNumber 0x08 74 | #define CSR_TEF_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TEF_BitNumber * 4)) 75 | 76 | /* ---------------------- BKP registers bit mask ------------------------ */ 77 | 78 | /* RTCCR register bit mask */ 79 | #define RTCCR_CAL_MASK ((uint16_t)0xFF80) 80 | #define RTCCR_MASK ((uint16_t)0xFC7F) 81 | 82 | /** 83 | * @} 84 | */ 85 | 86 | 87 | /** @defgroup BKP_Private_Macros 88 | * @{ 89 | */ 90 | 91 | /** 92 | * @} 93 | */ 94 | 95 | /** @defgroup BKP_Private_Variables 96 | * @{ 97 | */ 98 | 99 | /** 100 | * @} 101 | */ 102 | 103 | /** @defgroup BKP_Private_FunctionPrototypes 104 | * @{ 105 | */ 106 | 107 | /** 108 | * @} 109 | */ 110 | 111 | /** @defgroup BKP_Private_Functions 112 | * @{ 113 | */ 114 | 115 | /** 116 | * @brief Deinitializes the BKP peripheral registers to their default reset values. 117 | * @param None 118 | * @retval None 119 | */ 120 | void BKP_DeInit(void) 121 | { 122 | RCC_BackupResetCmd(ENABLE); 123 | RCC_BackupResetCmd(DISABLE); 124 | } 125 | 126 | /** 127 | * @brief Configures the Tamper Pin active level. 128 | * @param BKP_TamperPinLevel: specifies the Tamper Pin active level. 129 | * This parameter can be one of the following values: 130 | * @arg BKP_TamperPinLevel_High: Tamper pin active on high level 131 | * @arg BKP_TamperPinLevel_Low: Tamper pin active on low level 132 | * @retval None 133 | */ 134 | void BKP_TamperPinLevelConfig(uint16_t BKP_TamperPinLevel) 135 | { 136 | /* Check the parameters */ 137 | assert_param(IS_BKP_TAMPER_PIN_LEVEL(BKP_TamperPinLevel)); 138 | *(__IO uint32_t *) CR_TPAL_BB = BKP_TamperPinLevel; 139 | } 140 | 141 | /** 142 | * @brief Enables or disables the Tamper Pin activation. 143 | * @param NewState: new state of the Tamper Pin activation. 144 | * This parameter can be: ENABLE or DISABLE. 145 | * @retval None 146 | */ 147 | void BKP_TamperPinCmd(FunctionalState NewState) 148 | { 149 | /* Check the parameters */ 150 | assert_param(IS_FUNCTIONAL_STATE(NewState)); 151 | *(__IO uint32_t *) CR_TPE_BB = (uint32_t)NewState; 152 | } 153 | 154 | /** 155 | * @brief Enables or disables the Tamper Pin Interrupt. 156 | * @param NewState: new state of the Tamper Pin Interrupt. 157 | * This parameter can be: ENABLE or DISABLE. 158 | * @retval None 159 | */ 160 | void BKP_ITConfig(FunctionalState NewState) 161 | { 162 | /* Check the parameters */ 163 | assert_param(IS_FUNCTIONAL_STATE(NewState)); 164 | *(__IO uint32_t *) CSR_TPIE_BB = (uint32_t)NewState; 165 | } 166 | 167 | /** 168 | * @brief Select the RTC output source to output on the Tamper pin. 169 | * @param BKP_RTCOutputSource: specifies the RTC output source. 170 | * This parameter can be one of the following values: 171 | * @arg BKP_RTCOutputSource_None: no RTC output on the Tamper pin. 172 | * @arg BKP_RTCOutputSource_CalibClock: output the RTC clock with frequency 173 | * divided by 64 on the Tamper pin. 174 | * @arg BKP_RTCOutputSource_Alarm: output the RTC Alarm pulse signal on 175 | * the Tamper pin. 176 | * @arg BKP_RTCOutputSource_Second: output the RTC Second pulse signal on 177 | * the Tamper pin. 178 | * @retval None 179 | */ 180 | void BKP_RTCOutputConfig(uint16_t BKP_RTCOutputSource) 181 | { 182 | uint16_t tmpreg = 0; 183 | /* Check the parameters */ 184 | assert_param(IS_BKP_RTC_OUTPUT_SOURCE(BKP_RTCOutputSource)); 185 | tmpreg = BKP->RTCCR; 186 | /* Clear CCO, ASOE and ASOS bits */ 187 | tmpreg &= RTCCR_MASK; 188 | 189 | /* Set CCO, ASOE and ASOS bits according to BKP_RTCOutputSource value */ 190 | tmpreg |= BKP_RTCOutputSource; 191 | /* Store the new value */ 192 | BKP->RTCCR = tmpreg; 193 | } 194 | 195 | /** 196 | * @brief Sets RTC Clock Calibration value. 197 | * @param CalibrationValue: specifies the RTC Clock Calibration value. 198 | * This parameter must be a number between 0 and 0x7F. 199 | * @retval None 200 | */ 201 | void BKP_SetRTCCalibrationValue(uint8_t CalibrationValue) 202 | { 203 | uint16_t tmpreg = 0; 204 | /* Check the parameters */ 205 | assert_param(IS_BKP_CALIBRATION_VALUE(CalibrationValue)); 206 | tmpreg = BKP->RTCCR; 207 | /* Clear CAL[6:0] bits */ 208 | tmpreg &= RTCCR_CAL_MASK; 209 | /* Set CAL[6:0] bits according to CalibrationValue value */ 210 | tmpreg |= CalibrationValue; 211 | /* Store the new value */ 212 | BKP->RTCCR = tmpreg; 213 | } 214 | 215 | /** 216 | * @brief Writes user data to the specified Data Backup Register. 217 | * @param BKP_DR: specifies the Data Backup Register. 218 | * This parameter can be BKP_DRx where x:[1, 42] 219 | * @param Data: data to write 220 | * @retval None 221 | */ 222 | void BKP_WriteBackupRegister(uint16_t BKP_DR, uint16_t Data) 223 | { 224 | __IO uint32_t tmp = 0; 225 | 226 | /* Check the parameters */ 227 | assert_param(IS_BKP_DR(BKP_DR)); 228 | 229 | tmp = (uint32_t)BKP_BASE; 230 | tmp += BKP_DR; 231 | 232 | *(__IO uint32_t *) tmp = Data; 233 | } 234 | 235 | /** 236 | * @brief Reads data from the specified Data Backup Register. 237 | * @param BKP_DR: specifies the Data Backup Register. 238 | * This parameter can be BKP_DRx where x:[1, 42] 239 | * @retval The content of the specified Data Backup Register 240 | */ 241 | uint16_t BKP_ReadBackupRegister(uint16_t BKP_DR) 242 | { 243 | __IO uint32_t tmp = 0; 244 | 245 | /* Check the parameters */ 246 | assert_param(IS_BKP_DR(BKP_DR)); 247 | 248 | tmp = (uint32_t)BKP_BASE; 249 | tmp += BKP_DR; 250 | 251 | return (*(__IO uint16_t *) tmp); 252 | } 253 | 254 | /** 255 | * @brief Checks whether the Tamper Pin Event flag is set or not. 256 | * @param None 257 | * @retval The new state of the Tamper Pin Event flag (SET or RESET). 258 | */ 259 | FlagStatus BKP_GetFlagStatus(void) 260 | { 261 | return (FlagStatus)(*(__IO uint32_t *) CSR_TEF_BB); 262 | } 263 | 264 | /** 265 | * @brief Clears Tamper Pin Event pending flag. 266 | * @param None 267 | * @retval None 268 | */ 269 | void BKP_ClearFlag(void) 270 | { 271 | /* Set CTE bit to clear Tamper Pin Event flag */ 272 | BKP->CSR |= BKP_CSR_CTE; 273 | } 274 | 275 | /** 276 | * @brief Checks whether the Tamper Pin Interrupt has occurred or not. 277 | * @param None 278 | * @retval The new state of the Tamper Pin Interrupt (SET or RESET). 279 | */ 280 | ITStatus BKP_GetITStatus(void) 281 | { 282 | return (ITStatus)(*(__IO uint32_t *) CSR_TIF_BB); 283 | } 284 | 285 | /** 286 | * @brief Clears Tamper Pin Interrupt pending bit. 287 | * @param None 288 | * @retval None 289 | */ 290 | void BKP_ClearITPendingBit(void) 291 | { 292 | /* Set CTI bit to clear Tamper Pin Interrupt pending bit */ 293 | BKP->CSR |= BKP_CSR_CTI; 294 | } 295 | 296 | /** 297 | * @} 298 | */ 299 | 300 | /** 301 | * @} 302 | */ 303 | 304 | /** 305 | * @} 306 | */ 307 | 308 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 309 | -------------------------------------------------------------------------------- /test/stm32f103c8t6/led_test/Libraries/FWlib/src/stm32f10x_crc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_crc.c 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file provides all the CRC firmware functions. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 | * 18 | *

© COPYRIGHT 2011 STMicroelectronics

19 | ****************************************************************************** 20 | */ 21 | 22 | /* Includes ------------------------------------------------------------------*/ 23 | #include "stm32f10x_crc.h" 24 | 25 | /** @addtogroup STM32F10x_StdPeriph_Driver 26 | * @{ 27 | */ 28 | 29 | /** @defgroup CRC 30 | * @brief CRC driver modules 31 | * @{ 32 | */ 33 | 34 | /** @defgroup CRC_Private_TypesDefinitions 35 | * @{ 36 | */ 37 | 38 | /** 39 | * @} 40 | */ 41 | 42 | /** @defgroup CRC_Private_Defines 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @} 48 | */ 49 | 50 | /** @defgroup CRC_Private_Macros 51 | * @{ 52 | */ 53 | 54 | /** 55 | * @} 56 | */ 57 | 58 | /** @defgroup CRC_Private_Variables 59 | * @{ 60 | */ 61 | 62 | /** 63 | * @} 64 | */ 65 | 66 | /** @defgroup CRC_Private_FunctionPrototypes 67 | * @{ 68 | */ 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | /** @defgroup CRC_Private_Functions 75 | * @{ 76 | */ 77 | 78 | /** 79 | * @brief Resets the CRC Data register (DR). 80 | * @param None 81 | * @retval None 82 | */ 83 | void CRC_ResetDR(void) 84 | { 85 | /* Reset CRC generator */ 86 | CRC->CR = CRC_CR_RESET; 87 | } 88 | 89 | /** 90 | * @brief Computes the 32-bit CRC of a given data word(32-bit). 91 | * @param Data: data word(32-bit) to compute its CRC 92 | * @retval 32-bit CRC 93 | */ 94 | uint32_t CRC_CalcCRC(uint32_t Data) 95 | { 96 | CRC->DR = Data; 97 | 98 | return (CRC->DR); 99 | } 100 | 101 | /** 102 | * @brief Computes the 32-bit CRC of a given buffer of data word(32-bit). 103 | * @param pBuffer: pointer to the buffer containing the data to be computed 104 | * @param BufferLength: length of the buffer to be computed 105 | * @retval 32-bit CRC 106 | */ 107 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength) 108 | { 109 | uint32_t index = 0; 110 | 111 | for(index = 0; index < BufferLength; index++) 112 | { 113 | CRC->DR = pBuffer[index]; 114 | } 115 | return (CRC->DR); 116 | } 117 | 118 | /** 119 | * @brief Returns the current CRC value. 120 | * @param None 121 | * @retval 32-bit CRC 122 | */ 123 | uint32_t CRC_GetCRC(void) 124 | { 125 | return (CRC->DR); 126 | } 127 | 128 | /** 129 | * @brief Stores a 8-bit data in the Independent Data(ID) register. 130 | * @param IDValue: 8-bit value to be stored in the ID register 131 | * @retval None 132 | */ 133 | void CRC_SetIDRegister(uint8_t IDValue) 134 | { 135 | CRC->IDR = IDValue; 136 | } 137 | 138 | /** 139 | * @brief Returns the 8-bit data stored in the Independent Data(ID) register 140 | * @param None 141 | * @retval 8-bit value of the ID register 142 | */ 143 | uint8_t CRC_GetIDRegister(void) 144 | { 145 | return (CRC->IDR); 146 | } 147 | 148 | /** 149 | * @} 150 | */ 151 | 152 | /** 153 | * @} 154 | */ 155 | 156 | /** 157 | * @} 158 | */ 159 | 160 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 161 | -------------------------------------------------------------------------------- /test/stm32f103c8t6/led_test/Libraries/FWlib/src/stm32f10x_dbgmcu.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_dbgmcu.c 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file provides all the DBGMCU firmware functions. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 | * 18 | *

© COPYRIGHT 2011 STMicroelectronics

19 | ****************************************************************************** 20 | */ 21 | 22 | /* Includes ------------------------------------------------------------------*/ 23 | #include "stm32f10x_dbgmcu.h" 24 | 25 | /** @addtogroup STM32F10x_StdPeriph_Driver 26 | * @{ 27 | */ 28 | 29 | /** @defgroup DBGMCU 30 | * @brief DBGMCU driver modules 31 | * @{ 32 | */ 33 | 34 | /** @defgroup DBGMCU_Private_TypesDefinitions 35 | * @{ 36 | */ 37 | 38 | /** 39 | * @} 40 | */ 41 | 42 | /** @defgroup DBGMCU_Private_Defines 43 | * @{ 44 | */ 45 | 46 | #define IDCODE_DEVID_MASK ((uint32_t)0x00000FFF) 47 | /** 48 | * @} 49 | */ 50 | 51 | /** @defgroup DBGMCU_Private_Macros 52 | * @{ 53 | */ 54 | 55 | /** 56 | * @} 57 | */ 58 | 59 | /** @defgroup DBGMCU_Private_Variables 60 | * @{ 61 | */ 62 | 63 | /** 64 | * @} 65 | */ 66 | 67 | /** @defgroup DBGMCU_Private_FunctionPrototypes 68 | * @{ 69 | */ 70 | 71 | /** 72 | * @} 73 | */ 74 | 75 | /** @defgroup DBGMCU_Private_Functions 76 | * @{ 77 | */ 78 | 79 | /** 80 | * @brief Returns the device revision identifier. 81 | * @param None 82 | * @retval Device revision identifier 83 | */ 84 | uint32_t DBGMCU_GetREVID(void) 85 | { 86 | return(DBGMCU->IDCODE >> 16); 87 | } 88 | 89 | /** 90 | * @brief Returns the device identifier. 91 | * @param None 92 | * @retval Device identifier 93 | */ 94 | uint32_t DBGMCU_GetDEVID(void) 95 | { 96 | return(DBGMCU->IDCODE & IDCODE_DEVID_MASK); 97 | } 98 | 99 | /** 100 | * @brief Configures the specified peripheral and low power mode behavior 101 | * when the MCU under Debug mode. 102 | * @param DBGMCU_Periph: specifies the peripheral and low power mode. 103 | * This parameter can be any combination of the following values: 104 | * @arg DBGMCU_SLEEP: Keep debugger connection during SLEEP mode 105 | * @arg DBGMCU_STOP: Keep debugger connection during STOP mode 106 | * @arg DBGMCU_STANDBY: Keep debugger connection during STANDBY mode 107 | * @arg DBGMCU_IWDG_STOP: Debug IWDG stopped when Core is halted 108 | * @arg DBGMCU_WWDG_STOP: Debug WWDG stopped when Core is halted 109 | * @arg DBGMCU_TIM1_STOP: TIM1 counter stopped when Core is halted 110 | * @arg DBGMCU_TIM2_STOP: TIM2 counter stopped when Core is halted 111 | * @arg DBGMCU_TIM3_STOP: TIM3 counter stopped when Core is halted 112 | * @arg DBGMCU_TIM4_STOP: TIM4 counter stopped when Core is halted 113 | * @arg DBGMCU_CAN1_STOP: Debug CAN2 stopped when Core is halted 114 | * @arg DBGMCU_I2C1_SMBUS_TIMEOUT: I2C1 SMBUS timeout mode stopped when Core is halted 115 | * @arg DBGMCU_I2C2_SMBUS_TIMEOUT: I2C2 SMBUS timeout mode stopped when Core is halted 116 | * @arg DBGMCU_TIM5_STOP: TIM5 counter stopped when Core is halted 117 | * @arg DBGMCU_TIM6_STOP: TIM6 counter stopped when Core is halted 118 | * @arg DBGMCU_TIM7_STOP: TIM7 counter stopped when Core is halted 119 | * @arg DBGMCU_TIM8_STOP: TIM8 counter stopped when Core is halted 120 | * @arg DBGMCU_CAN2_STOP: Debug CAN2 stopped when Core is halted 121 | * @arg DBGMCU_TIM15_STOP: TIM15 counter stopped when Core is halted 122 | * @arg DBGMCU_TIM16_STOP: TIM16 counter stopped when Core is halted 123 | * @arg DBGMCU_TIM17_STOP: TIM17 counter stopped when Core is halted 124 | * @arg DBGMCU_TIM9_STOP: TIM9 counter stopped when Core is halted 125 | * @arg DBGMCU_TIM10_STOP: TIM10 counter stopped when Core is halted 126 | * @arg DBGMCU_TIM11_STOP: TIM11 counter stopped when Core is halted 127 | * @arg DBGMCU_TIM12_STOP: TIM12 counter stopped when Core is halted 128 | * @arg DBGMCU_TIM13_STOP: TIM13 counter stopped when Core is halted 129 | * @arg DBGMCU_TIM14_STOP: TIM14 counter stopped when Core is halted 130 | * @param NewState: new state of the specified peripheral in Debug mode. 131 | * This parameter can be: ENABLE or DISABLE. 132 | * @retval None 133 | */ 134 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState) 135 | { 136 | /* Check the parameters */ 137 | assert_param(IS_DBGMCU_PERIPH(DBGMCU_Periph)); 138 | assert_param(IS_FUNCTIONAL_STATE(NewState)); 139 | 140 | if (NewState != DISABLE) 141 | { 142 | DBGMCU->CR |= DBGMCU_Periph; 143 | } 144 | else 145 | { 146 | DBGMCU->CR &= ~DBGMCU_Periph; 147 | } 148 | } 149 | 150 | /** 151 | * @} 152 | */ 153 | 154 | /** 155 | * @} 156 | */ 157 | 158 | /** 159 | * @} 160 | */ 161 | 162 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 163 | -------------------------------------------------------------------------------- /test/stm32f103c8t6/led_test/Libraries/FWlib/src/stm32f10x_exti.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_exti.c 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file provides all the EXTI firmware functions. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 | * 18 | *

© COPYRIGHT 2011 STMicroelectronics

19 | ****************************************************************************** 20 | */ 21 | 22 | /* Includes ------------------------------------------------------------------*/ 23 | #include "stm32f10x_exti.h" 24 | 25 | /** @addtogroup STM32F10x_StdPeriph_Driver 26 | * @{ 27 | */ 28 | 29 | /** @defgroup EXTI 30 | * @brief EXTI driver modules 31 | * @{ 32 | */ 33 | 34 | /** @defgroup EXTI_Private_TypesDefinitions 35 | * @{ 36 | */ 37 | 38 | /** 39 | * @} 40 | */ 41 | 42 | /** @defgroup EXTI_Private_Defines 43 | * @{ 44 | */ 45 | 46 | #define EXTI_LINENONE ((uint32_t)0x00000) /* No interrupt selected */ 47 | 48 | /** 49 | * @} 50 | */ 51 | 52 | /** @defgroup EXTI_Private_Macros 53 | * @{ 54 | */ 55 | 56 | /** 57 | * @} 58 | */ 59 | 60 | /** @defgroup EXTI_Private_Variables 61 | * @{ 62 | */ 63 | 64 | /** 65 | * @} 66 | */ 67 | 68 | /** @defgroup EXTI_Private_FunctionPrototypes 69 | * @{ 70 | */ 71 | 72 | /** 73 | * @} 74 | */ 75 | 76 | /** @defgroup EXTI_Private_Functions 77 | * @{ 78 | */ 79 | 80 | /** 81 | * @brief Deinitializes the EXTI peripheral registers to their default reset values. 82 | * @param None 83 | * @retval None 84 | */ 85 | void EXTI_DeInit(void) 86 | { 87 | EXTI->IMR = 0x00000000; 88 | EXTI->EMR = 0x00000000; 89 | EXTI->RTSR = 0x00000000; 90 | EXTI->FTSR = 0x00000000; 91 | EXTI->PR = 0x000FFFFF; 92 | } 93 | 94 | /** 95 | * @brief Initializes the EXTI peripheral according to the specified 96 | * parameters in the EXTI_InitStruct. 97 | * @param EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure 98 | * that contains the configuration information for the EXTI peripheral. 99 | * @retval None 100 | */ 101 | void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct) 102 | { 103 | uint32_t tmp = 0; 104 | 105 | /* Check the parameters */ 106 | assert_param(IS_EXTI_MODE(EXTI_InitStruct->EXTI_Mode)); 107 | assert_param(IS_EXTI_TRIGGER(EXTI_InitStruct->EXTI_Trigger)); 108 | assert_param(IS_EXTI_LINE(EXTI_InitStruct->EXTI_Line)); 109 | assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->EXTI_LineCmd)); 110 | 111 | tmp = (uint32_t)EXTI_BASE; 112 | 113 | if (EXTI_InitStruct->EXTI_LineCmd != DISABLE) 114 | { 115 | /* Clear EXTI line configuration */ 116 | EXTI->IMR &= ~EXTI_InitStruct->EXTI_Line; 117 | EXTI->EMR &= ~EXTI_InitStruct->EXTI_Line; 118 | 119 | tmp += EXTI_InitStruct->EXTI_Mode; 120 | 121 | *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line; 122 | 123 | /* Clear Rising Falling edge configuration */ 124 | EXTI->RTSR &= ~EXTI_InitStruct->EXTI_Line; 125 | EXTI->FTSR &= ~EXTI_InitStruct->EXTI_Line; 126 | 127 | /* Select the trigger for the selected external interrupts */ 128 | if (EXTI_InitStruct->EXTI_Trigger == EXTI_Trigger_Rising_Falling) 129 | { 130 | /* Rising Falling edge */ 131 | EXTI->RTSR |= EXTI_InitStruct->EXTI_Line; 132 | EXTI->FTSR |= EXTI_InitStruct->EXTI_Line; 133 | } 134 | else 135 | { 136 | tmp = (uint32_t)EXTI_BASE; 137 | tmp += EXTI_InitStruct->EXTI_Trigger; 138 | 139 | *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line; 140 | } 141 | } 142 | else 143 | { 144 | tmp += EXTI_InitStruct->EXTI_Mode; 145 | 146 | /* Disable the selected external lines */ 147 | *(__IO uint32_t *) tmp &= ~EXTI_InitStruct->EXTI_Line; 148 | } 149 | } 150 | 151 | /** 152 | * @brief Fills each EXTI_InitStruct member with its reset value. 153 | * @param EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure which will 154 | * be initialized. 155 | * @retval None 156 | */ 157 | void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct) 158 | { 159 | EXTI_InitStruct->EXTI_Line = EXTI_LINENONE; 160 | EXTI_InitStruct->EXTI_Mode = EXTI_Mode_Interrupt; 161 | EXTI_InitStruct->EXTI_Trigger = EXTI_Trigger_Falling; 162 | EXTI_InitStruct->EXTI_LineCmd = DISABLE; 163 | } 164 | 165 | /** 166 | * @brief Generates a Software interrupt. 167 | * @param EXTI_Line: specifies the EXTI lines to be enabled or disabled. 168 | * This parameter can be any combination of EXTI_Linex where x can be (0..19). 169 | * @retval None 170 | */ 171 | void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line) 172 | { 173 | /* Check the parameters */ 174 | assert_param(IS_EXTI_LINE(EXTI_Line)); 175 | 176 | EXTI->SWIER |= EXTI_Line; 177 | } 178 | 179 | /** 180 | * @brief Checks whether the specified EXTI line flag is set or not. 181 | * @param EXTI_Line: specifies the EXTI line flag to check. 182 | * This parameter can be: 183 | * @arg EXTI_Linex: External interrupt line x where x(0..19) 184 | * @retval The new state of EXTI_Line (SET or RESET). 185 | */ 186 | FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line) 187 | { 188 | FlagStatus bitstatus = RESET; 189 | /* Check the parameters */ 190 | assert_param(IS_GET_EXTI_LINE(EXTI_Line)); 191 | 192 | if ((EXTI->PR & EXTI_Line) != (uint32_t)RESET) 193 | { 194 | bitstatus = SET; 195 | } 196 | else 197 | { 198 | bitstatus = RESET; 199 | } 200 | return bitstatus; 201 | } 202 | 203 | /** 204 | * @brief Clears the EXTI's line pending flags. 205 | * @param EXTI_Line: specifies the EXTI lines flags to clear. 206 | * This parameter can be any combination of EXTI_Linex where x can be (0..19). 207 | * @retval None 208 | */ 209 | void EXTI_ClearFlag(uint32_t EXTI_Line) 210 | { 211 | /* Check the parameters */ 212 | assert_param(IS_EXTI_LINE(EXTI_Line)); 213 | 214 | EXTI->PR = EXTI_Line; 215 | } 216 | 217 | /** 218 | * @brief Checks whether the specified EXTI line is asserted or not. 219 | * @param EXTI_Line: specifies the EXTI line to check. 220 | * This parameter can be: 221 | * @arg EXTI_Linex: External interrupt line x where x(0..19) 222 | * @retval The new state of EXTI_Line (SET or RESET). 223 | */ 224 | ITStatus EXTI_GetITStatus(uint32_t EXTI_Line) 225 | { 226 | ITStatus bitstatus = RESET; 227 | uint32_t enablestatus = 0; 228 | /* Check the parameters */ 229 | assert_param(IS_GET_EXTI_LINE(EXTI_Line)); 230 | 231 | enablestatus = EXTI->IMR & EXTI_Line; 232 | if (((EXTI->PR & EXTI_Line) != (uint32_t)RESET) && (enablestatus != (uint32_t)RESET)) 233 | { 234 | bitstatus = SET; 235 | } 236 | else 237 | { 238 | bitstatus = RESET; 239 | } 240 | return bitstatus; 241 | } 242 | 243 | /** 244 | * @brief Clears the EXTI's line pending bits. 245 | * @param EXTI_Line: specifies the EXTI lines to clear. 246 | * This parameter can be any combination of EXTI_Linex where x can be (0..19). 247 | * @retval None 248 | */ 249 | void EXTI_ClearITPendingBit(uint32_t EXTI_Line) 250 | { 251 | /* Check the parameters */ 252 | assert_param(IS_EXTI_LINE(EXTI_Line)); 253 | 254 | EXTI->PR = EXTI_Line; 255 | } 256 | 257 | /** 258 | * @} 259 | */ 260 | 261 | /** 262 | * @} 263 | */ 264 | 265 | /** 266 | * @} 267 | */ 268 | 269 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 270 | -------------------------------------------------------------------------------- /test/stm32f103c8t6/led_test/Libraries/FWlib/src/stm32f10x_flash.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/wuxx/nanoDAP-HS/b629d2acf5910341de32ab4a8dbe2478d3efaec3/test/stm32f103c8t6/led_test/Libraries/FWlib/src/stm32f10x_flash.c -------------------------------------------------------------------------------- /test/stm32f103c8t6/led_test/Libraries/FWlib/src/stm32f10x_i2c.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/wuxx/nanoDAP-HS/b629d2acf5910341de32ab4a8dbe2478d3efaec3/test/stm32f103c8t6/led_test/Libraries/FWlib/src/stm32f10x_i2c.c -------------------------------------------------------------------------------- /test/stm32f103c8t6/led_test/Libraries/FWlib/src/stm32f10x_iwdg.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_iwdg.c 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file provides all the IWDG firmware functions. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 | * 18 | *

© COPYRIGHT 2011 STMicroelectronics

19 | ****************************************************************************** 20 | */ 21 | 22 | /* Includes ------------------------------------------------------------------*/ 23 | #include "stm32f10x_iwdg.h" 24 | 25 | /** @addtogroup STM32F10x_StdPeriph_Driver 26 | * @{ 27 | */ 28 | 29 | /** @defgroup IWDG 30 | * @brief IWDG driver modules 31 | * @{ 32 | */ 33 | 34 | /** @defgroup IWDG_Private_TypesDefinitions 35 | * @{ 36 | */ 37 | 38 | /** 39 | * @} 40 | */ 41 | 42 | /** @defgroup IWDG_Private_Defines 43 | * @{ 44 | */ 45 | 46 | /* ---------------------- IWDG registers bit mask ----------------------------*/ 47 | 48 | /* KR register bit mask */ 49 | #define KR_KEY_Reload ((uint16_t)0xAAAA) 50 | #define KR_KEY_Enable ((uint16_t)0xCCCC) 51 | 52 | /** 53 | * @} 54 | */ 55 | 56 | /** @defgroup IWDG_Private_Macros 57 | * @{ 58 | */ 59 | 60 | /** 61 | * @} 62 | */ 63 | 64 | /** @defgroup IWDG_Private_Variables 65 | * @{ 66 | */ 67 | 68 | /** 69 | * @} 70 | */ 71 | 72 | /** @defgroup IWDG_Private_FunctionPrototypes 73 | * @{ 74 | */ 75 | 76 | /** 77 | * @} 78 | */ 79 | 80 | /** @defgroup IWDG_Private_Functions 81 | * @{ 82 | */ 83 | 84 | /** 85 | * @brief Enables or disables write access to IWDG_PR and IWDG_RLR registers. 86 | * @param IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers. 87 | * This parameter can be one of the following values: 88 | * @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers 89 | * @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers 90 | * @retval None 91 | */ 92 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess) 93 | { 94 | /* Check the parameters */ 95 | assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess)); 96 | IWDG->KR = IWDG_WriteAccess; 97 | } 98 | 99 | /** 100 | * @brief Sets IWDG Prescaler value. 101 | * @param IWDG_Prescaler: specifies the IWDG Prescaler value. 102 | * This parameter can be one of the following values: 103 | * @arg IWDG_Prescaler_4: IWDG prescaler set to 4 104 | * @arg IWDG_Prescaler_8: IWDG prescaler set to 8 105 | * @arg IWDG_Prescaler_16: IWDG prescaler set to 16 106 | * @arg IWDG_Prescaler_32: IWDG prescaler set to 32 107 | * @arg IWDG_Prescaler_64: IWDG prescaler set to 64 108 | * @arg IWDG_Prescaler_128: IWDG prescaler set to 128 109 | * @arg IWDG_Prescaler_256: IWDG prescaler set to 256 110 | * @retval None 111 | */ 112 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler) 113 | { 114 | /* Check the parameters */ 115 | assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler)); 116 | IWDG->PR = IWDG_Prescaler; 117 | } 118 | 119 | /** 120 | * @brief Sets IWDG Reload value. 121 | * @param Reload: specifies the IWDG Reload value. 122 | * This parameter must be a number between 0 and 0x0FFF. 123 | * @retval None 124 | */ 125 | void IWDG_SetReload(uint16_t Reload) 126 | { 127 | /* Check the parameters */ 128 | assert_param(IS_IWDG_RELOAD(Reload)); 129 | IWDG->RLR = Reload; 130 | } 131 | 132 | /** 133 | * @brief Reloads IWDG counter with value defined in the reload register 134 | * (write access to IWDG_PR and IWDG_RLR registers disabled). 135 | * @param None 136 | * @retval None 137 | */ 138 | void IWDG_ReloadCounter(void) 139 | { 140 | IWDG->KR = KR_KEY_Reload; 141 | } 142 | 143 | /** 144 | * @brief Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled). 145 | * @param None 146 | * @retval None 147 | */ 148 | void IWDG_Enable(void) 149 | { 150 | IWDG->KR = KR_KEY_Enable; 151 | } 152 | 153 | /** 154 | * @brief Checks whether the specified IWDG flag is set or not. 155 | * @param IWDG_FLAG: specifies the flag to check. 156 | * This parameter can be one of the following values: 157 | * @arg IWDG_FLAG_PVU: Prescaler Value Update on going 158 | * @arg IWDG_FLAG_RVU: Reload Value Update on going 159 | * @retval The new state of IWDG_FLAG (SET or RESET). 160 | */ 161 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG) 162 | { 163 | FlagStatus bitstatus = RESET; 164 | /* Check the parameters */ 165 | assert_param(IS_IWDG_FLAG(IWDG_FLAG)); 166 | if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET) 167 | { 168 | bitstatus = SET; 169 | } 170 | else 171 | { 172 | bitstatus = RESET; 173 | } 174 | /* Return the flag status */ 175 | return bitstatus; 176 | } 177 | 178 | /** 179 | * @} 180 | */ 181 | 182 | /** 183 | * @} 184 | */ 185 | 186 | /** 187 | * @} 188 | */ 189 | 190 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 191 | -------------------------------------------------------------------------------- /test/stm32f103c8t6/led_test/Libraries/FWlib/src/stm32f10x_usart.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/wuxx/nanoDAP-HS/b629d2acf5910341de32ab4a8dbe2478d3efaec3/test/stm32f103c8t6/led_test/Libraries/FWlib/src/stm32f10x_usart.c -------------------------------------------------------------------------------- /test/stm32f103c8t6/led_test/Libraries/FWlib/src/stm32f10x_wwdg.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_wwdg.c 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file provides all the WWDG firmware functions. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 | * 18 | *

© COPYRIGHT 2011 STMicroelectronics

19 | ****************************************************************************** 20 | */ 21 | 22 | /* Includes ------------------------------------------------------------------*/ 23 | #include "stm32f10x_wwdg.h" 24 | #include "stm32f10x_rcc.h" 25 | 26 | /** @addtogroup STM32F10x_StdPeriph_Driver 27 | * @{ 28 | */ 29 | 30 | /** @defgroup WWDG 31 | * @brief WWDG driver modules 32 | * @{ 33 | */ 34 | 35 | /** @defgroup WWDG_Private_TypesDefinitions 36 | * @{ 37 | */ 38 | 39 | /** 40 | * @} 41 | */ 42 | 43 | /** @defgroup WWDG_Private_Defines 44 | * @{ 45 | */ 46 | 47 | /* ----------- WWDG registers bit address in the alias region ----------- */ 48 | #define WWDG_OFFSET (WWDG_BASE - PERIPH_BASE) 49 | 50 | /* Alias word address of EWI bit */ 51 | #define CFR_OFFSET (WWDG_OFFSET + 0x04) 52 | #define EWI_BitNumber 0x09 53 | #define CFR_EWI_BB (PERIPH_BB_BASE + (CFR_OFFSET * 32) + (EWI_BitNumber * 4)) 54 | 55 | /* --------------------- WWDG registers bit mask ------------------------ */ 56 | 57 | /* CR register bit mask */ 58 | #define CR_WDGA_Set ((uint32_t)0x00000080) 59 | 60 | /* CFR register bit mask */ 61 | #define CFR_WDGTB_Mask ((uint32_t)0xFFFFFE7F) 62 | #define CFR_W_Mask ((uint32_t)0xFFFFFF80) 63 | #define BIT_Mask ((uint8_t)0x7F) 64 | 65 | /** 66 | * @} 67 | */ 68 | 69 | /** @defgroup WWDG_Private_Macros 70 | * @{ 71 | */ 72 | 73 | /** 74 | * @} 75 | */ 76 | 77 | /** @defgroup WWDG_Private_Variables 78 | * @{ 79 | */ 80 | 81 | /** 82 | * @} 83 | */ 84 | 85 | /** @defgroup WWDG_Private_FunctionPrototypes 86 | * @{ 87 | */ 88 | 89 | /** 90 | * @} 91 | */ 92 | 93 | /** @defgroup WWDG_Private_Functions 94 | * @{ 95 | */ 96 | 97 | /** 98 | * @brief Deinitializes the WWDG peripheral registers to their default reset values. 99 | * @param None 100 | * @retval None 101 | */ 102 | void WWDG_DeInit(void) 103 | { 104 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE); 105 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE); 106 | } 107 | 108 | /** 109 | * @brief Sets the WWDG Prescaler. 110 | * @param WWDG_Prescaler: specifies the WWDG Prescaler. 111 | * This parameter can be one of the following values: 112 | * @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1 113 | * @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2 114 | * @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4 115 | * @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8 116 | * @retval None 117 | */ 118 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler) 119 | { 120 | uint32_t tmpreg = 0; 121 | /* Check the parameters */ 122 | assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler)); 123 | /* Clear WDGTB[1:0] bits */ 124 | tmpreg = WWDG->CFR & CFR_WDGTB_Mask; 125 | /* Set WDGTB[1:0] bits according to WWDG_Prescaler value */ 126 | tmpreg |= WWDG_Prescaler; 127 | /* Store the new value */ 128 | WWDG->CFR = tmpreg; 129 | } 130 | 131 | /** 132 | * @brief Sets the WWDG window value. 133 | * @param WindowValue: specifies the window value to be compared to the downcounter. 134 | * This parameter value must be lower than 0x80. 135 | * @retval None 136 | */ 137 | void WWDG_SetWindowValue(uint8_t WindowValue) 138 | { 139 | __IO uint32_t tmpreg = 0; 140 | 141 | /* Check the parameters */ 142 | assert_param(IS_WWDG_WINDOW_VALUE(WindowValue)); 143 | /* Clear W[6:0] bits */ 144 | 145 | tmpreg = WWDG->CFR & CFR_W_Mask; 146 | 147 | /* Set W[6:0] bits according to WindowValue value */ 148 | tmpreg |= WindowValue & (uint32_t) BIT_Mask; 149 | 150 | /* Store the new value */ 151 | WWDG->CFR = tmpreg; 152 | } 153 | 154 | /** 155 | * @brief Enables the WWDG Early Wakeup interrupt(EWI). 156 | * @param None 157 | * @retval None 158 | */ 159 | void WWDG_EnableIT(void) 160 | { 161 | *(__IO uint32_t *) CFR_EWI_BB = (uint32_t)ENABLE; 162 | } 163 | 164 | /** 165 | * @brief Sets the WWDG counter value. 166 | * @param Counter: specifies the watchdog counter value. 167 | * This parameter must be a number between 0x40 and 0x7F. 168 | * @retval None 169 | */ 170 | void WWDG_SetCounter(uint8_t Counter) 171 | { 172 | /* Check the parameters */ 173 | assert_param(IS_WWDG_COUNTER(Counter)); 174 | /* Write to T[6:0] bits to configure the counter value, no need to do 175 | a read-modify-write; writing a 0 to WDGA bit does nothing */ 176 | WWDG->CR = Counter & BIT_Mask; 177 | } 178 | 179 | /** 180 | * @brief Enables WWDG and load the counter value. 181 | * @param Counter: specifies the watchdog counter value. 182 | * This parameter must be a number between 0x40 and 0x7F. 183 | * @retval None 184 | */ 185 | void WWDG_Enable(uint8_t Counter) 186 | { 187 | /* Check the parameters */ 188 | assert_param(IS_WWDG_COUNTER(Counter)); 189 | WWDG->CR = CR_WDGA_Set | Counter; 190 | } 191 | 192 | /** 193 | * @brief Checks whether the Early Wakeup interrupt flag is set or not. 194 | * @param None 195 | * @retval The new state of the Early Wakeup interrupt flag (SET or RESET) 196 | */ 197 | FlagStatus WWDG_GetFlagStatus(void) 198 | { 199 | return (FlagStatus)(WWDG->SR); 200 | } 201 | 202 | /** 203 | * @brief Clears Early Wakeup interrupt flag. 204 | * @param None 205 | * @retval None 206 | */ 207 | void WWDG_ClearFlag(void) 208 | { 209 | WWDG->SR = (uint32_t)RESET; 210 | } 211 | 212 | /** 213 | * @} 214 | */ 215 | 216 | /** 217 | * @} 218 | */ 219 | 220 | /** 221 | * @} 222 | */ 223 | 224 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 225 | -------------------------------------------------------------------------------- /test/stm32f103c8t6/led_test/User/main.c: -------------------------------------------------------------------------------- 1 | #include "stm32f10x.h" 2 | 3 | void delay_ms(uint32_t count) 4 | { 5 | uint32_t i, x; 6 | for(; count != 0; count--) { 7 | for(i = 1000; i != 0; i--) { 8 | for(x = 72; x != 0; x--) { 9 | } 10 | } 11 | } 12 | } 13 | 14 | void gpio_init() 15 | { 16 | GPIO_InitTypeDef gpio; 17 | 18 | RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); 19 | gpio.GPIO_Pin = GPIO_Pin_All; 20 | gpio.GPIO_Mode = GPIO_Mode_Out_PP; 21 | gpio.GPIO_Speed = GPIO_Speed_50MHz; 22 | GPIO_Init(GPIOA, &gpio); 23 | 24 | RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE); 25 | gpio.GPIO_Pin = GPIO_Pin_All; 26 | gpio.GPIO_Mode = GPIO_Mode_Out_PP; 27 | gpio.GPIO_Speed = GPIO_Speed_50MHz; 28 | GPIO_Init(GPIOB, &gpio); 29 | 30 | RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE); 31 | gpio.GPIO_Pin = GPIO_Pin_All; 32 | gpio.GPIO_Mode = GPIO_Mode_Out_PP; 33 | gpio.GPIO_Speed = GPIO_Speed_50MHz; 34 | GPIO_Init(GPIOC, &gpio); 35 | } 36 | 37 | void gpio_on() 38 | { 39 | GPIO_SetBits(GPIOA, GPIO_Pin_All); 40 | GPIO_SetBits(GPIOB, GPIO_Pin_All); 41 | GPIO_SetBits(GPIOC, GPIO_Pin_All); 42 | } 43 | 44 | void gpio_off() 45 | { 46 | GPIO_ResetBits(GPIOA, GPIO_Pin_All); 47 | GPIO_ResetBits(GPIOB, GPIO_Pin_All); 48 | GPIO_ResetBits(GPIOC, GPIO_Pin_All); 49 | } 50 | 51 | static uint8_t reserved0 = 12; 52 | 53 | static const uint8_t reserved[50 * 1024] = {0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 54 | 0x8, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 55 | 0x9, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 56 | 0xa, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 57 | 0xb, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 58 | 59 | }; 60 | static uint8_t reserved1 = 13; 61 | int main(void) 62 | { 63 | gpio_init(); 64 | //reserved[10] = 0xbb; 65 | while (1) { 66 | gpio_on(); 67 | delay_ms(10); 68 | 69 | gpio_off(); 70 | delay_ms(10); 71 | //delay_ms(reserved[10]); 72 | } 73 | 74 | return 0; 75 | } 76 | -------------------------------------------------------------------------------- /test/stm32f103c8t6/led_test/User/stm32f10x_conf.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_conf.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 08-April-2011 7 | * @brief Library configuration file. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 | * 18 | *

© COPYRIGHT 2011 STMicroelectronics

19 | ****************************************************************************** 20 | */ 21 | 22 | /* Define to prevent recursive inclusion -------------------------------------*/ 23 | #ifndef __STM32F10x_CONF_H 24 | #define __STM32F10x_CONF_H 25 | 26 | /* Includes ------------------------------------------------------------------*/ 27 | /* Uncomment/Comment the line below to enable/disable peripheral header file inclusion */ 28 | #include "stm32f10x_adc.h" 29 | #include "stm32f10x_bkp.h" 30 | #include "stm32f10x_can.h" 31 | #include "stm32f10x_cec.h" 32 | #include "stm32f10x_crc.h" 33 | #include "stm32f10x_dac.h" 34 | #include "stm32f10x_dbgmcu.h" 35 | #include "stm32f10x_dma.h" 36 | #include "stm32f10x_exti.h" 37 | #include "stm32f10x_flash.h" 38 | #include "stm32f10x_fsmc.h" 39 | #include "stm32f10x_gpio.h" 40 | #include "stm32f10x_i2c.h" 41 | #include "stm32f10x_iwdg.h" 42 | #include "stm32f10x_pwr.h" 43 | #include "stm32f10x_rcc.h" 44 | #include "stm32f10x_rtc.h" 45 | #include "stm32f10x_sdio.h" 46 | #include "stm32f10x_spi.h" 47 | #include "stm32f10x_tim.h" 48 | #include "stm32f10x_usart.h" 49 | #include "stm32f10x_wwdg.h" 50 | #include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */ 51 | 52 | /* Exported types ------------------------------------------------------------*/ 53 | /* Exported constants --------------------------------------------------------*/ 54 | /* Uncomment the line below to expanse the "assert_param" macro in the 55 | Standard Peripheral Library drivers code */ 56 | /* #define USE_FULL_ASSERT 1 */ 57 | 58 | /* Exported macro ------------------------------------------------------------*/ 59 | #ifdef USE_FULL_ASSERT 60 | 61 | /** 62 | * @brief The assert_param macro is used for function's parameters check. 63 | * @param expr: If expr is false, it calls assert_failed function which reports 64 | * the name of the source file and the source line number of the call 65 | * that failed. If expr is true, it returns no value. 66 | * @retval None 67 | */ 68 | #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) 69 | /* Exported functions ------------------------------------------------------- */ 70 | void assert_failed(uint8_t* file, uint32_t line); 71 | #else 72 | #define assert_param(expr) ((void)0) 73 | #endif /* USE_FULL_ASSERT */ 74 | 75 | #endif /* __STM32F10x_CONF_H */ 76 | 77 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 78 | -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/.gitignore: -------------------------------------------------------------------------------- 1 | OBJ/ 2 | -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/FWLIB/inc/misc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file misc.h 4 | * @author MCD Application Team 5 | * @version V1.4.0 6 | * @date 04-August-2014 7 | * @brief This file contains all the functions prototypes for the miscellaneous 8 | * firmware library functions (add-on to CMSIS functions). 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2014 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __MISC_H 31 | #define __MISC_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f4xx.h" 39 | 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup MISC 45 | * @{ 46 | */ 47 | 48 | /* Exported types ------------------------------------------------------------*/ 49 | 50 | /** 51 | * @brief NVIC Init Structure definition 52 | */ 53 | 54 | typedef struct 55 | { 56 | uint8_t NVIC_IRQChannel; /*!< Specifies the IRQ channel to be enabled or disabled. 57 | This parameter can be an enumerator of @ref IRQn_Type 58 | enumeration (For the complete STM32 Devices IRQ Channels 59 | list, please refer to stm32f4xx.h file) */ 60 | 61 | uint8_t NVIC_IRQChannelPreemptionPriority; /*!< Specifies the pre-emption priority for the IRQ channel 62 | specified in NVIC_IRQChannel. This parameter can be a value 63 | between 0 and 15 as described in the table @ref MISC_NVIC_Priority_Table 64 | A lower priority value indicates a higher priority */ 65 | 66 | uint8_t NVIC_IRQChannelSubPriority; /*!< Specifies the subpriority level for the IRQ channel specified 67 | in NVIC_IRQChannel. This parameter can be a value 68 | between 0 and 15 as described in the table @ref MISC_NVIC_Priority_Table 69 | A lower priority value indicates a higher priority */ 70 | 71 | FunctionalState NVIC_IRQChannelCmd; /*!< Specifies whether the IRQ channel defined in NVIC_IRQChannel 72 | will be enabled or disabled. 73 | This parameter can be set either to ENABLE or DISABLE */ 74 | } NVIC_InitTypeDef; 75 | 76 | /* Exported constants --------------------------------------------------------*/ 77 | 78 | /** @defgroup MISC_Exported_Constants 79 | * @{ 80 | */ 81 | 82 | /** @defgroup MISC_Vector_Table_Base 83 | * @{ 84 | */ 85 | 86 | #define NVIC_VectTab_RAM ((uint32_t)0x20000000) 87 | #define NVIC_VectTab_FLASH ((uint32_t)0x08000000) 88 | #define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == NVIC_VectTab_RAM) || \ 89 | ((VECTTAB) == NVIC_VectTab_FLASH)) 90 | /** 91 | * @} 92 | */ 93 | 94 | /** @defgroup MISC_System_Low_Power 95 | * @{ 96 | */ 97 | 98 | #define NVIC_LP_SEVONPEND ((uint8_t)0x10) 99 | #define NVIC_LP_SLEEPDEEP ((uint8_t)0x04) 100 | #define NVIC_LP_SLEEPONEXIT ((uint8_t)0x02) 101 | #define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \ 102 | ((LP) == NVIC_LP_SLEEPDEEP) || \ 103 | ((LP) == NVIC_LP_SLEEPONEXIT)) 104 | /** 105 | * @} 106 | */ 107 | 108 | /** @defgroup MISC_Preemption_Priority_Group 109 | * @{ 110 | */ 111 | 112 | #define NVIC_PriorityGroup_0 ((uint32_t)0x700) /*!< 0 bits for pre-emption priority 113 | 4 bits for subpriority */ 114 | #define NVIC_PriorityGroup_1 ((uint32_t)0x600) /*!< 1 bits for pre-emption priority 115 | 3 bits for subpriority */ 116 | #define NVIC_PriorityGroup_2 ((uint32_t)0x500) /*!< 2 bits for pre-emption priority 117 | 2 bits for subpriority */ 118 | #define NVIC_PriorityGroup_3 ((uint32_t)0x400) /*!< 3 bits for pre-emption priority 119 | 1 bits for subpriority */ 120 | #define NVIC_PriorityGroup_4 ((uint32_t)0x300) /*!< 4 bits for pre-emption priority 121 | 0 bits for subpriority */ 122 | 123 | #define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PriorityGroup_0) || \ 124 | ((GROUP) == NVIC_PriorityGroup_1) || \ 125 | ((GROUP) == NVIC_PriorityGroup_2) || \ 126 | ((GROUP) == NVIC_PriorityGroup_3) || \ 127 | ((GROUP) == NVIC_PriorityGroup_4)) 128 | 129 | #define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10) 130 | 131 | #define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10) 132 | 133 | #define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF) 134 | 135 | /** 136 | * @} 137 | */ 138 | 139 | /** @defgroup MISC_SysTick_clock_source 140 | * @{ 141 | */ 142 | 143 | #define SysTick_CLKSource_HCLK_Div8 ((uint32_t)0xFFFFFFFB) 144 | #define SysTick_CLKSource_HCLK ((uint32_t)0x00000004) 145 | #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \ 146 | ((SOURCE) == SysTick_CLKSource_HCLK_Div8)) 147 | /** 148 | * @} 149 | */ 150 | 151 | /** 152 | * @} 153 | */ 154 | 155 | /* Exported macro ------------------------------------------------------------*/ 156 | /* Exported functions --------------------------------------------------------*/ 157 | 158 | void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup); 159 | void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct); 160 | void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset); 161 | void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState); 162 | void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource); 163 | 164 | #ifdef __cplusplus 165 | } 166 | #endif 167 | 168 | #endif /* __MISC_H */ 169 | 170 | /** 171 | * @} 172 | */ 173 | 174 | /** 175 | * @} 176 | */ 177 | 178 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 179 | -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/FWLIB/inc/stm32f4xx_crc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_crc.h 4 | * @author MCD Application Team 5 | * @version V1.4.0 6 | * @date 04-August-2014 7 | * @brief This file contains all the functions prototypes for the CRC firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2014 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F4xx_CRC_H 31 | #define __STM32F4xx_CRC_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f4xx.h" 39 | 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup CRC 45 | * @{ 46 | */ 47 | 48 | /* Exported types ------------------------------------------------------------*/ 49 | /* Exported constants --------------------------------------------------------*/ 50 | 51 | /** @defgroup CRC_Exported_Constants 52 | * @{ 53 | */ 54 | 55 | /** 56 | * @} 57 | */ 58 | 59 | /* Exported macro ------------------------------------------------------------*/ 60 | /* Exported functions --------------------------------------------------------*/ 61 | 62 | void CRC_ResetDR(void); 63 | uint32_t CRC_CalcCRC(uint32_t Data); 64 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength); 65 | uint32_t CRC_GetCRC(void); 66 | void CRC_SetIDRegister(uint8_t IDValue); 67 | uint8_t CRC_GetIDRegister(void); 68 | 69 | #ifdef __cplusplus 70 | } 71 | #endif 72 | 73 | #endif /* __STM32F4xx_CRC_H */ 74 | 75 | /** 76 | * @} 77 | */ 78 | 79 | /** 80 | * @} 81 | */ 82 | 83 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 84 | -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/FWLIB/inc/stm32f4xx_dbgmcu.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_dbgmcu.h 4 | * @author MCD Application Team 5 | * @version V1.4.0 6 | * @date 04-August-2014 7 | * @brief This file contains all the functions prototypes for the DBGMCU firmware library. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2014 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __STM32F4xx_DBGMCU_H 30 | #define __STM32F4xx_DBGMCU_H 31 | 32 | #ifdef __cplusplus 33 | extern "C" { 34 | #endif 35 | 36 | /* Includes ------------------------------------------------------------------*/ 37 | #include "stm32f4xx.h" 38 | 39 | /** @addtogroup STM32F4xx_StdPeriph_Driver 40 | * @{ 41 | */ 42 | 43 | /** @addtogroup DBGMCU 44 | * @{ 45 | */ 46 | 47 | /* Exported types ------------------------------------------------------------*/ 48 | /* Exported constants --------------------------------------------------------*/ 49 | 50 | /** @defgroup DBGMCU_Exported_Constants 51 | * @{ 52 | */ 53 | #define DBGMCU_SLEEP ((uint32_t)0x00000001) 54 | #define DBGMCU_STOP ((uint32_t)0x00000002) 55 | #define DBGMCU_STANDBY ((uint32_t)0x00000004) 56 | #define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFFF8) == 0x00) && ((PERIPH) != 0x00)) 57 | 58 | #define DBGMCU_TIM2_STOP ((uint32_t)0x00000001) 59 | #define DBGMCU_TIM3_STOP ((uint32_t)0x00000002) 60 | #define DBGMCU_TIM4_STOP ((uint32_t)0x00000004) 61 | #define DBGMCU_TIM5_STOP ((uint32_t)0x00000008) 62 | #define DBGMCU_TIM6_STOP ((uint32_t)0x00000010) 63 | #define DBGMCU_TIM7_STOP ((uint32_t)0x00000020) 64 | #define DBGMCU_TIM12_STOP ((uint32_t)0x00000040) 65 | #define DBGMCU_TIM13_STOP ((uint32_t)0x00000080) 66 | #define DBGMCU_TIM14_STOP ((uint32_t)0x00000100) 67 | #define DBGMCU_RTC_STOP ((uint32_t)0x00000400) 68 | #define DBGMCU_WWDG_STOP ((uint32_t)0x00000800) 69 | #define DBGMCU_IWDG_STOP ((uint32_t)0x00001000) 70 | #define DBGMCU_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00200000) 71 | #define DBGMCU_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00400000) 72 | #define DBGMCU_I2C3_SMBUS_TIMEOUT ((uint32_t)0x00800000) 73 | #define DBGMCU_CAN1_STOP ((uint32_t)0x02000000) 74 | #define DBGMCU_CAN2_STOP ((uint32_t)0x04000000) 75 | #define IS_DBGMCU_APB1PERIPH(PERIPH) ((((PERIPH) & 0xF91FE200) == 0x00) && ((PERIPH) != 0x00)) 76 | 77 | #define DBGMCU_TIM1_STOP ((uint32_t)0x00000001) 78 | #define DBGMCU_TIM8_STOP ((uint32_t)0x00000002) 79 | #define DBGMCU_TIM9_STOP ((uint32_t)0x00010000) 80 | #define DBGMCU_TIM10_STOP ((uint32_t)0x00020000) 81 | #define DBGMCU_TIM11_STOP ((uint32_t)0x00040000) 82 | #define IS_DBGMCU_APB2PERIPH(PERIPH) ((((PERIPH) & 0xFFF8FFFC) == 0x00) && ((PERIPH) != 0x00)) 83 | /** 84 | * @} 85 | */ 86 | 87 | /* Exported macro ------------------------------------------------------------*/ 88 | /* Exported functions --------------------------------------------------------*/ 89 | uint32_t DBGMCU_GetREVID(void); 90 | uint32_t DBGMCU_GetDEVID(void); 91 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState); 92 | void DBGMCU_APB1PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState); 93 | void DBGMCU_APB2PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState); 94 | 95 | #ifdef __cplusplus 96 | } 97 | #endif 98 | 99 | #endif /* __STM32F4xx_DBGMCU_H */ 100 | 101 | /** 102 | * @} 103 | */ 104 | 105 | /** 106 | * @} 107 | */ 108 | 109 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 110 | -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/FWLIB/inc/stm32f4xx_exti.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_exti.h 4 | * @author MCD Application Team 5 | * @version V1.4.0 6 | * @date 04-August-2014 7 | * @brief This file contains all the functions prototypes for the EXTI firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2014 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F4xx_EXTI_H 31 | #define __STM32F4xx_EXTI_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f4xx.h" 39 | 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup EXTI 45 | * @{ 46 | */ 47 | 48 | /* Exported types ------------------------------------------------------------*/ 49 | 50 | /** 51 | * @brief EXTI mode enumeration 52 | */ 53 | 54 | typedef enum 55 | { 56 | EXTI_Mode_Interrupt = 0x00, 57 | EXTI_Mode_Event = 0x04 58 | }EXTIMode_TypeDef; 59 | 60 | #define IS_EXTI_MODE(MODE) (((MODE) == EXTI_Mode_Interrupt) || ((MODE) == EXTI_Mode_Event)) 61 | 62 | /** 63 | * @brief EXTI Trigger enumeration 64 | */ 65 | 66 | typedef enum 67 | { 68 | EXTI_Trigger_Rising = 0x08, 69 | EXTI_Trigger_Falling = 0x0C, 70 | EXTI_Trigger_Rising_Falling = 0x10 71 | }EXTITrigger_TypeDef; 72 | 73 | #define IS_EXTI_TRIGGER(TRIGGER) (((TRIGGER) == EXTI_Trigger_Rising) || \ 74 | ((TRIGGER) == EXTI_Trigger_Falling) || \ 75 | ((TRIGGER) == EXTI_Trigger_Rising_Falling)) 76 | /** 77 | * @brief EXTI Init Structure definition 78 | */ 79 | 80 | typedef struct 81 | { 82 | uint32_t EXTI_Line; /*!< Specifies the EXTI lines to be enabled or disabled. 83 | This parameter can be any combination value of @ref EXTI_Lines */ 84 | 85 | EXTIMode_TypeDef EXTI_Mode; /*!< Specifies the mode for the EXTI lines. 86 | This parameter can be a value of @ref EXTIMode_TypeDef */ 87 | 88 | EXTITrigger_TypeDef EXTI_Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines. 89 | This parameter can be a value of @ref EXTITrigger_TypeDef */ 90 | 91 | FunctionalState EXTI_LineCmd; /*!< Specifies the new state of the selected EXTI lines. 92 | This parameter can be set either to ENABLE or DISABLE */ 93 | }EXTI_InitTypeDef; 94 | 95 | /* Exported constants --------------------------------------------------------*/ 96 | 97 | /** @defgroup EXTI_Exported_Constants 98 | * @{ 99 | */ 100 | 101 | /** @defgroup EXTI_Lines 102 | * @{ 103 | */ 104 | 105 | #define EXTI_Line0 ((uint32_t)0x00001) /*!< External interrupt line 0 */ 106 | #define EXTI_Line1 ((uint32_t)0x00002) /*!< External interrupt line 1 */ 107 | #define EXTI_Line2 ((uint32_t)0x00004) /*!< External interrupt line 2 */ 108 | #define EXTI_Line3 ((uint32_t)0x00008) /*!< External interrupt line 3 */ 109 | #define EXTI_Line4 ((uint32_t)0x00010) /*!< External interrupt line 4 */ 110 | #define EXTI_Line5 ((uint32_t)0x00020) /*!< External interrupt line 5 */ 111 | #define EXTI_Line6 ((uint32_t)0x00040) /*!< External interrupt line 6 */ 112 | #define EXTI_Line7 ((uint32_t)0x00080) /*!< External interrupt line 7 */ 113 | #define EXTI_Line8 ((uint32_t)0x00100) /*!< External interrupt line 8 */ 114 | #define EXTI_Line9 ((uint32_t)0x00200) /*!< External interrupt line 9 */ 115 | #define EXTI_Line10 ((uint32_t)0x00400) /*!< External interrupt line 10 */ 116 | #define EXTI_Line11 ((uint32_t)0x00800) /*!< External interrupt line 11 */ 117 | #define EXTI_Line12 ((uint32_t)0x01000) /*!< External interrupt line 12 */ 118 | #define EXTI_Line13 ((uint32_t)0x02000) /*!< External interrupt line 13 */ 119 | #define EXTI_Line14 ((uint32_t)0x04000) /*!< External interrupt line 14 */ 120 | #define EXTI_Line15 ((uint32_t)0x08000) /*!< External interrupt line 15 */ 121 | #define EXTI_Line16 ((uint32_t)0x10000) /*!< External interrupt line 16 Connected to the PVD Output */ 122 | #define EXTI_Line17 ((uint32_t)0x20000) /*!< External interrupt line 17 Connected to the RTC Alarm event */ 123 | #define EXTI_Line18 ((uint32_t)0x40000) /*!< External interrupt line 18 Connected to the USB OTG FS Wakeup from suspend event */ 124 | #define EXTI_Line19 ((uint32_t)0x80000) /*!< External interrupt line 19 Connected to the Ethernet Wakeup event */ 125 | #define EXTI_Line20 ((uint32_t)0x00100000) /*!< External interrupt line 20 Connected to the USB OTG HS (configured in FS) Wakeup event */ 126 | #define EXTI_Line21 ((uint32_t)0x00200000) /*!< External interrupt line 21 Connected to the RTC Tamper and Time Stamp events */ 127 | #define EXTI_Line22 ((uint32_t)0x00400000) /*!< External interrupt line 22 Connected to the RTC Wakeup event */ 128 | 129 | #define IS_EXTI_LINE(LINE) ((((LINE) & (uint32_t)0xFF800000) == 0x00) && ((LINE) != (uint16_t)0x00)) 130 | 131 | #define IS_GET_EXTI_LINE(LINE) (((LINE) == EXTI_Line0) || ((LINE) == EXTI_Line1) || \ 132 | ((LINE) == EXTI_Line2) || ((LINE) == EXTI_Line3) || \ 133 | ((LINE) == EXTI_Line4) || ((LINE) == EXTI_Line5) || \ 134 | ((LINE) == EXTI_Line6) || ((LINE) == EXTI_Line7) || \ 135 | ((LINE) == EXTI_Line8) || ((LINE) == EXTI_Line9) || \ 136 | ((LINE) == EXTI_Line10) || ((LINE) == EXTI_Line11) || \ 137 | ((LINE) == EXTI_Line12) || ((LINE) == EXTI_Line13) || \ 138 | ((LINE) == EXTI_Line14) || ((LINE) == EXTI_Line15) || \ 139 | ((LINE) == EXTI_Line16) || ((LINE) == EXTI_Line17) || \ 140 | ((LINE) == EXTI_Line18) || ((LINE) == EXTI_Line19) || \ 141 | ((LINE) == EXTI_Line20) || ((LINE) == EXTI_Line21) ||\ 142 | ((LINE) == EXTI_Line22)) 143 | 144 | /** 145 | * @} 146 | */ 147 | 148 | /** 149 | * @} 150 | */ 151 | 152 | /* Exported macro ------------------------------------------------------------*/ 153 | /* Exported functions --------------------------------------------------------*/ 154 | 155 | /* Function used to set the EXTI configuration to the default reset state *****/ 156 | void EXTI_DeInit(void); 157 | 158 | /* Initialization and Configuration functions *********************************/ 159 | void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct); 160 | void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct); 161 | void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line); 162 | 163 | /* Interrupts and flags management functions **********************************/ 164 | FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line); 165 | void EXTI_ClearFlag(uint32_t EXTI_Line); 166 | ITStatus EXTI_GetITStatus(uint32_t EXTI_Line); 167 | void EXTI_ClearITPendingBit(uint32_t EXTI_Line); 168 | 169 | #ifdef __cplusplus 170 | } 171 | #endif 172 | 173 | #endif /* __STM32F4xx_EXTI_H */ 174 | 175 | /** 176 | * @} 177 | */ 178 | 179 | /** 180 | * @} 181 | */ 182 | 183 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 184 | -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/FWLIB/inc/stm32f4xx_flash_ramfunc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_flash_ramfunc.h 4 | * @author MCD Application Team 5 | * @version V1.4.0 6 | * @date 04-August-2014 7 | * @brief Header file of FLASH RAMFUNC driver. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2014 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F4xx_FLASH_RAMFUNC_H 31 | #define __STM32F4xx_FLASH_RAMFUNC_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f4xx.h" 39 | 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup FLASH RAMFUNC 45 | * @{ 46 | */ 47 | 48 | /* Exported types ------------------------------------------------------------*/ 49 | /* Private define ------------------------------------------------------------*/ 50 | /** 51 | * @brief __RAM_FUNC definition 52 | */ 53 | #if defined ( __CC_ARM ) 54 | /* ARM Compiler 55 | ------------ 56 | RAM functions are defined using the toolchain options. 57 | Functions that are executed in RAM should reside in a separate source module. 58 | Using the 'Options for File' dialog you can simply change the 'Code / Const' 59 | area of a module to a memory space in physical RAM. 60 | Available memory areas are declared in the 'Target' tab of the 'Options for Target' 61 | dialog. 62 | */ 63 | #define __RAM_FUNC void 64 | 65 | #elif defined ( __ICCARM__ ) 66 | /* ICCARM Compiler 67 | --------------- 68 | RAM functions are defined using a specific toolchain keyword "__ramfunc". 69 | */ 70 | #define __RAM_FUNC __ramfunc void 71 | 72 | #elif defined ( __GNUC__ ) 73 | /* GNU Compiler 74 | ------------ 75 | RAM functions are defined using a specific toolchain attribute 76 | "__attribute__((section(".RamFunc")))". 77 | */ 78 | #define __RAM_FUNC void __attribute__((section(".RamFunc"))) 79 | 80 | #endif 81 | /* Exported constants --------------------------------------------------------*/ 82 | /* Exported macro ------------------------------------------------------------*/ 83 | /* Exported functions --------------------------------------------------------*/ 84 | __RAM_FUNC FLASH_FlashInterfaceCmd(FunctionalState NewState); 85 | __RAM_FUNC FLASH_FlashSleepModeCmd(FunctionalState NewState); 86 | 87 | 88 | #ifdef __cplusplus 89 | } 90 | #endif 91 | 92 | #endif /* __STM32F4xx_FLASH_RAMFUNC_H */ 93 | 94 | /** 95 | * @} 96 | */ 97 | 98 | /** 99 | * @} 100 | */ 101 | 102 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 103 | 104 | -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/FWLIB/inc/stm32f4xx_iwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_iwdg.h 4 | * @author MCD Application Team 5 | * @version V1.4.0 6 | * @date 04-August-2014 7 | * @brief This file contains all the functions prototypes for the IWDG 8 | * firmware library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2014 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F4xx_IWDG_H 31 | #define __STM32F4xx_IWDG_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f4xx.h" 39 | 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup IWDG 45 | * @{ 46 | */ 47 | 48 | /* Exported types ------------------------------------------------------------*/ 49 | /* Exported constants --------------------------------------------------------*/ 50 | 51 | /** @defgroup IWDG_Exported_Constants 52 | * @{ 53 | */ 54 | 55 | /** @defgroup IWDG_WriteAccess 56 | * @{ 57 | */ 58 | #define IWDG_WriteAccess_Enable ((uint16_t)0x5555) 59 | #define IWDG_WriteAccess_Disable ((uint16_t)0x0000) 60 | #define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \ 61 | ((ACCESS) == IWDG_WriteAccess_Disable)) 62 | /** 63 | * @} 64 | */ 65 | 66 | /** @defgroup IWDG_prescaler 67 | * @{ 68 | */ 69 | #define IWDG_Prescaler_4 ((uint8_t)0x00) 70 | #define IWDG_Prescaler_8 ((uint8_t)0x01) 71 | #define IWDG_Prescaler_16 ((uint8_t)0x02) 72 | #define IWDG_Prescaler_32 ((uint8_t)0x03) 73 | #define IWDG_Prescaler_64 ((uint8_t)0x04) 74 | #define IWDG_Prescaler_128 ((uint8_t)0x05) 75 | #define IWDG_Prescaler_256 ((uint8_t)0x06) 76 | #define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4) || \ 77 | ((PRESCALER) == IWDG_Prescaler_8) || \ 78 | ((PRESCALER) == IWDG_Prescaler_16) || \ 79 | ((PRESCALER) == IWDG_Prescaler_32) || \ 80 | ((PRESCALER) == IWDG_Prescaler_64) || \ 81 | ((PRESCALER) == IWDG_Prescaler_128)|| \ 82 | ((PRESCALER) == IWDG_Prescaler_256)) 83 | /** 84 | * @} 85 | */ 86 | 87 | /** @defgroup IWDG_Flag 88 | * @{ 89 | */ 90 | #define IWDG_FLAG_PVU ((uint16_t)0x0001) 91 | #define IWDG_FLAG_RVU ((uint16_t)0x0002) 92 | #define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU)) 93 | #define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF) 94 | /** 95 | * @} 96 | */ 97 | 98 | /** 99 | * @} 100 | */ 101 | 102 | /* Exported macro ------------------------------------------------------------*/ 103 | /* Exported functions --------------------------------------------------------*/ 104 | 105 | /* Prescaler and Counter configuration functions ******************************/ 106 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess); 107 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler); 108 | void IWDG_SetReload(uint16_t Reload); 109 | void IWDG_ReloadCounter(void); 110 | 111 | /* IWDG activation function ***************************************************/ 112 | void IWDG_Enable(void); 113 | 114 | /* Flag management function ***************************************************/ 115 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG); 116 | 117 | #ifdef __cplusplus 118 | } 119 | #endif 120 | 121 | #endif /* __STM32F4xx_IWDG_H */ 122 | 123 | /** 124 | * @} 125 | */ 126 | 127 | /** 128 | * @} 129 | */ 130 | 131 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 132 | -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/FWLIB/inc/stm32f4xx_pwr.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_pwr.h 4 | * @author MCD Application Team 5 | * @version V1.4.0 6 | * @date 04-August-2014 7 | * @brief This file contains all the functions prototypes for the PWR firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2014 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F4xx_PWR_H 31 | #define __STM32F4xx_PWR_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f4xx.h" 39 | 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup PWR 45 | * @{ 46 | */ 47 | 48 | /* Exported types ------------------------------------------------------------*/ 49 | /* Exported constants --------------------------------------------------------*/ 50 | 51 | /** @defgroup PWR_Exported_Constants 52 | * @{ 53 | */ 54 | 55 | /** @defgroup PWR_PVD_detection_level 56 | * @{ 57 | */ 58 | #define PWR_PVDLevel_0 PWR_CR_PLS_LEV0 59 | #define PWR_PVDLevel_1 PWR_CR_PLS_LEV1 60 | #define PWR_PVDLevel_2 PWR_CR_PLS_LEV2 61 | #define PWR_PVDLevel_3 PWR_CR_PLS_LEV3 62 | #define PWR_PVDLevel_4 PWR_CR_PLS_LEV4 63 | #define PWR_PVDLevel_5 PWR_CR_PLS_LEV5 64 | #define PWR_PVDLevel_6 PWR_CR_PLS_LEV6 65 | #define PWR_PVDLevel_7 PWR_CR_PLS_LEV7 66 | 67 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_0) || ((LEVEL) == PWR_PVDLevel_1)|| \ 68 | ((LEVEL) == PWR_PVDLevel_2) || ((LEVEL) == PWR_PVDLevel_3)|| \ 69 | ((LEVEL) == PWR_PVDLevel_4) || ((LEVEL) == PWR_PVDLevel_5)|| \ 70 | ((LEVEL) == PWR_PVDLevel_6) || ((LEVEL) == PWR_PVDLevel_7)) 71 | /** 72 | * @} 73 | */ 74 | 75 | 76 | /** @defgroup PWR_Regulator_state_in_STOP_mode 77 | * @{ 78 | */ 79 | #define PWR_MainRegulator_ON ((uint32_t)0x00000000) 80 | #define PWR_LowPowerRegulator_ON PWR_CR_LPDS 81 | 82 | /* --- PWR_Legacy ---*/ 83 | #define PWR_Regulator_ON PWR_MainRegulator_ON 84 | #define PWR_Regulator_LowPower PWR_LowPowerRegulator_ON 85 | 86 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MainRegulator_ON) || \ 87 | ((REGULATOR) == PWR_LowPowerRegulator_ON)) 88 | 89 | /** 90 | * @} 91 | */ 92 | 93 | /** @defgroup PWR_Regulator_state_in_UnderDrive_mode 94 | * @{ 95 | */ 96 | #define PWR_MainRegulator_UnderDrive_ON PWR_CR_MRUDS 97 | #define PWR_LowPowerRegulator_UnderDrive_ON ((uint32_t)(PWR_CR_LPDS | PWR_CR_LPUDS)) 98 | 99 | #define IS_PWR_REGULATOR_UNDERDRIVE(REGULATOR) (((REGULATOR) == PWR_MainRegulator_UnderDrive_ON) || \ 100 | ((REGULATOR) == PWR_LowPowerRegulator_UnderDrive_ON)) 101 | 102 | /** 103 | * @} 104 | */ 105 | 106 | /** @defgroup PWR_STOP_mode_entry 107 | * @{ 108 | */ 109 | #define PWR_STOPEntry_WFI ((uint8_t)0x01) 110 | #define PWR_STOPEntry_WFE ((uint8_t)0x02) 111 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE)) 112 | /** 113 | * @} 114 | */ 115 | 116 | /** @defgroup PWR_Regulator_Voltage_Scale 117 | * @{ 118 | */ 119 | #define PWR_Regulator_Voltage_Scale1 ((uint32_t)0x0000C000) 120 | #define PWR_Regulator_Voltage_Scale2 ((uint32_t)0x00008000) 121 | #define PWR_Regulator_Voltage_Scale3 ((uint32_t)0x00004000) 122 | #define IS_PWR_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_Regulator_Voltage_Scale1) || \ 123 | ((VOLTAGE) == PWR_Regulator_Voltage_Scale2) || \ 124 | ((VOLTAGE) == PWR_Regulator_Voltage_Scale3)) 125 | /** 126 | * @} 127 | */ 128 | 129 | /** @defgroup PWR_Flag 130 | * @{ 131 | */ 132 | #define PWR_FLAG_WU PWR_CSR_WUF 133 | #define PWR_FLAG_SB PWR_CSR_SBF 134 | #define PWR_FLAG_PVDO PWR_CSR_PVDO 135 | #define PWR_FLAG_BRR PWR_CSR_BRR 136 | #define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY 137 | #define PWR_FLAG_ODRDY PWR_CSR_ODRDY 138 | #define PWR_FLAG_ODSWRDY PWR_CSR_ODSWRDY 139 | #define PWR_FLAG_UDRDY PWR_CSR_UDSWRDY 140 | 141 | /* --- FLAG Legacy ---*/ 142 | #define PWR_FLAG_REGRDY PWR_FLAG_VOSRDY 143 | 144 | #define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \ 145 | ((FLAG) == PWR_FLAG_PVDO) || ((FLAG) == PWR_FLAG_BRR) || \ 146 | ((FLAG) == PWR_FLAG_VOSRDY) || ((FLAG) == PWR_FLAG_ODRDY) || \ 147 | ((FLAG) == PWR_FLAG_ODSWRDY) || ((FLAG) == PWR_FLAG_UDRDY)) 148 | 149 | 150 | #define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \ 151 | ((FLAG) == PWR_FLAG_UDRDY)) 152 | 153 | /** 154 | * @} 155 | */ 156 | 157 | /** 158 | * @} 159 | */ 160 | 161 | /* Exported macro ------------------------------------------------------------*/ 162 | /* Exported functions --------------------------------------------------------*/ 163 | 164 | /* Function used to set the PWR configuration to the default reset state ******/ 165 | void PWR_DeInit(void); 166 | 167 | /* Backup Domain Access function **********************************************/ 168 | void PWR_BackupAccessCmd(FunctionalState NewState); 169 | 170 | /* PVD configuration functions ************************************************/ 171 | void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel); 172 | void PWR_PVDCmd(FunctionalState NewState); 173 | 174 | /* WakeUp pins configuration functions ****************************************/ 175 | void PWR_WakeUpPinCmd(FunctionalState NewState); 176 | 177 | /* Main and Backup Regulators configuration functions *************************/ 178 | void PWR_BackupRegulatorCmd(FunctionalState NewState); 179 | void PWR_MainRegulatorModeConfig(uint32_t PWR_Regulator_Voltage); 180 | void PWR_OverDriveCmd(FunctionalState NewState); 181 | void PWR_OverDriveSWCmd(FunctionalState NewState); 182 | void PWR_UnderDriveCmd(FunctionalState NewState); 183 | void PWR_MainRegulatorLowVoltageCmd(FunctionalState NewState); 184 | void PWR_LowRegulatorLowVoltageCmd(FunctionalState NewState); 185 | 186 | /* FLASH Power Down configuration functions ***********************************/ 187 | void PWR_FlashPowerDownCmd(FunctionalState NewState); 188 | 189 | /* Low Power modes configuration functions ************************************/ 190 | void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry); 191 | void PWR_EnterUnderDriveSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry); 192 | void PWR_EnterSTANDBYMode(void); 193 | 194 | /* Flags management functions *************************************************/ 195 | FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG); 196 | void PWR_ClearFlag(uint32_t PWR_FLAG); 197 | 198 | #ifdef __cplusplus 199 | } 200 | #endif 201 | 202 | #endif /* __STM32F4xx_PWR_H */ 203 | 204 | /** 205 | * @} 206 | */ 207 | 208 | /** 209 | * @} 210 | */ 211 | 212 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 213 | -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/FWLIB/inc/stm32f4xx_rng.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_rng.h 4 | * @author MCD Application Team 5 | * @version V1.4.0 6 | * @date 04-August-2014 7 | * @brief This file contains all the functions prototypes for the Random 8 | * Number Generator(RNG) firmware library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2014 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F4xx_RNG_H 31 | #define __STM32F4xx_RNG_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f4xx.h" 39 | 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup RNG 45 | * @{ 46 | */ 47 | 48 | /* Exported types ------------------------------------------------------------*/ 49 | /* Exported constants --------------------------------------------------------*/ 50 | 51 | /** @defgroup RNG_Exported_Constants 52 | * @{ 53 | */ 54 | 55 | /** @defgroup RNG_flags_definition 56 | * @{ 57 | */ 58 | #define RNG_FLAG_DRDY ((uint8_t)0x0001) /*!< Data ready */ 59 | #define RNG_FLAG_CECS ((uint8_t)0x0002) /*!< Clock error current status */ 60 | #define RNG_FLAG_SECS ((uint8_t)0x0004) /*!< Seed error current status */ 61 | 62 | #define IS_RNG_GET_FLAG(RNG_FLAG) (((RNG_FLAG) == RNG_FLAG_DRDY) || \ 63 | ((RNG_FLAG) == RNG_FLAG_CECS) || \ 64 | ((RNG_FLAG) == RNG_FLAG_SECS)) 65 | #define IS_RNG_CLEAR_FLAG(RNG_FLAG) (((RNG_FLAG) == RNG_FLAG_CECS) || \ 66 | ((RNG_FLAG) == RNG_FLAG_SECS)) 67 | /** 68 | * @} 69 | */ 70 | 71 | /** @defgroup RNG_interrupts_definition 72 | * @{ 73 | */ 74 | #define RNG_IT_CEI ((uint8_t)0x20) /*!< Clock error interrupt */ 75 | #define RNG_IT_SEI ((uint8_t)0x40) /*!< Seed error interrupt */ 76 | 77 | #define IS_RNG_IT(IT) ((((IT) & (uint8_t)0x9F) == 0x00) && ((IT) != 0x00)) 78 | #define IS_RNG_GET_IT(RNG_IT) (((RNG_IT) == RNG_IT_CEI) || ((RNG_IT) == RNG_IT_SEI)) 79 | /** 80 | * @} 81 | */ 82 | 83 | /** 84 | * @} 85 | */ 86 | 87 | /* Exported macro ------------------------------------------------------------*/ 88 | /* Exported functions --------------------------------------------------------*/ 89 | 90 | /* Function used to set the RNG configuration to the default reset state *****/ 91 | void RNG_DeInit(void); 92 | 93 | /* Configuration function *****************************************************/ 94 | void RNG_Cmd(FunctionalState NewState); 95 | 96 | /* Get 32 bit Random number function ******************************************/ 97 | uint32_t RNG_GetRandomNumber(void); 98 | 99 | /* Interrupts and flags management functions **********************************/ 100 | void RNG_ITConfig(FunctionalState NewState); 101 | FlagStatus RNG_GetFlagStatus(uint8_t RNG_FLAG); 102 | void RNG_ClearFlag(uint8_t RNG_FLAG); 103 | ITStatus RNG_GetITStatus(uint8_t RNG_IT); 104 | void RNG_ClearITPendingBit(uint8_t RNG_IT); 105 | 106 | #ifdef __cplusplus 107 | } 108 | #endif 109 | 110 | #endif /*__STM32F4xx_RNG_H */ 111 | 112 | /** 113 | * @} 114 | */ 115 | 116 | /** 117 | * @} 118 | */ 119 | 120 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 121 | -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/FWLIB/inc/stm32f4xx_wwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_wwdg.h 4 | * @author MCD Application Team 5 | * @version V1.4.0 6 | * @date 04-August-2014 7 | * @brief This file contains all the functions prototypes for the WWDG firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2014 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F4xx_WWDG_H 31 | #define __STM32F4xx_WWDG_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f4xx.h" 39 | 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup WWDG 45 | * @{ 46 | */ 47 | 48 | /* Exported types ------------------------------------------------------------*/ 49 | /* Exported constants --------------------------------------------------------*/ 50 | 51 | /** @defgroup WWDG_Exported_Constants 52 | * @{ 53 | */ 54 | 55 | /** @defgroup WWDG_Prescaler 56 | * @{ 57 | */ 58 | 59 | #define WWDG_Prescaler_1 ((uint32_t)0x00000000) 60 | #define WWDG_Prescaler_2 ((uint32_t)0x00000080) 61 | #define WWDG_Prescaler_4 ((uint32_t)0x00000100) 62 | #define WWDG_Prescaler_8 ((uint32_t)0x00000180) 63 | #define IS_WWDG_PRESCALER(PRESCALER) (((PRESCALER) == WWDG_Prescaler_1) || \ 64 | ((PRESCALER) == WWDG_Prescaler_2) || \ 65 | ((PRESCALER) == WWDG_Prescaler_4) || \ 66 | ((PRESCALER) == WWDG_Prescaler_8)) 67 | #define IS_WWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0x7F) 68 | #define IS_WWDG_COUNTER(COUNTER) (((COUNTER) >= 0x40) && ((COUNTER) <= 0x7F)) 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | /** 75 | * @} 76 | */ 77 | 78 | /* Exported macro ------------------------------------------------------------*/ 79 | /* Exported functions --------------------------------------------------------*/ 80 | 81 | /* Function used to set the WWDG configuration to the default reset state ****/ 82 | void WWDG_DeInit(void); 83 | 84 | /* Prescaler, Refresh window and Counter configuration functions **************/ 85 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler); 86 | void WWDG_SetWindowValue(uint8_t WindowValue); 87 | void WWDG_EnableIT(void); 88 | void WWDG_SetCounter(uint8_t Counter); 89 | 90 | /* WWDG activation function ***************************************************/ 91 | void WWDG_Enable(uint8_t Counter); 92 | 93 | /* Interrupts and flags management functions **********************************/ 94 | FlagStatus WWDG_GetFlagStatus(void); 95 | void WWDG_ClearFlag(void); 96 | 97 | #ifdef __cplusplus 98 | } 99 | #endif 100 | 101 | #endif /* __STM32F4xx_WWDG_H */ 102 | 103 | /** 104 | * @} 105 | */ 106 | 107 | /** 108 | * @} 109 | */ 110 | 111 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 112 | -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/FWLIB/src/stm32f4xx_crc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_crc.c 4 | * @author MCD Application Team 5 | * @version V1.4.0 6 | * @date 04-August-2014 7 | * @brief This file provides all the CRC firmware functions. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2014 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm32f4xx_crc.h" 30 | 31 | /** @addtogroup STM32F4xx_StdPeriph_Driver 32 | * @{ 33 | */ 34 | 35 | /** @defgroup CRC 36 | * @brief CRC driver modules 37 | * @{ 38 | */ 39 | 40 | /* Private typedef -----------------------------------------------------------*/ 41 | /* Private define ------------------------------------------------------------*/ 42 | /* Private macro -------------------------------------------------------------*/ 43 | /* Private variables ---------------------------------------------------------*/ 44 | /* Private function prototypes -----------------------------------------------*/ 45 | /* Private functions ---------------------------------------------------------*/ 46 | 47 | /** @defgroup CRC_Private_Functions 48 | * @{ 49 | */ 50 | 51 | /** 52 | * @brief Resets the CRC Data register (DR). 53 | * @param None 54 | * @retval None 55 | */ 56 | void CRC_ResetDR(void) 57 | { 58 | /* Reset CRC generator */ 59 | CRC->CR = CRC_CR_RESET; 60 | } 61 | 62 | /** 63 | * @brief Computes the 32-bit CRC of a given data word(32-bit). 64 | * @param Data: data word(32-bit) to compute its CRC 65 | * @retval 32-bit CRC 66 | */ 67 | uint32_t CRC_CalcCRC(uint32_t Data) 68 | { 69 | CRC->DR = Data; 70 | 71 | return (CRC->DR); 72 | } 73 | 74 | /** 75 | * @brief Computes the 32-bit CRC of a given buffer of data word(32-bit). 76 | * @param pBuffer: pointer to the buffer containing the data to be computed 77 | * @param BufferLength: length of the buffer to be computed 78 | * @retval 32-bit CRC 79 | */ 80 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength) 81 | { 82 | uint32_t index = 0; 83 | 84 | for(index = 0; index < BufferLength; index++) 85 | { 86 | CRC->DR = pBuffer[index]; 87 | } 88 | return (CRC->DR); 89 | } 90 | 91 | /** 92 | * @brief Returns the current CRC value. 93 | * @param None 94 | * @retval 32-bit CRC 95 | */ 96 | uint32_t CRC_GetCRC(void) 97 | { 98 | return (CRC->DR); 99 | } 100 | 101 | /** 102 | * @brief Stores a 8-bit data in the Independent Data(ID) register. 103 | * @param IDValue: 8-bit value to be stored in the ID register 104 | * @retval None 105 | */ 106 | void CRC_SetIDRegister(uint8_t IDValue) 107 | { 108 | CRC->IDR = IDValue; 109 | } 110 | 111 | /** 112 | * @brief Returns the 8-bit data stored in the Independent Data(ID) register 113 | * @param None 114 | * @retval 8-bit value of the ID register 115 | */ 116 | uint8_t CRC_GetIDRegister(void) 117 | { 118 | return (CRC->IDR); 119 | } 120 | 121 | /** 122 | * @} 123 | */ 124 | 125 | /** 126 | * @} 127 | */ 128 | 129 | /** 130 | * @} 131 | */ 132 | 133 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 134 | -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/FWLIB/src/stm32f4xx_dbgmcu.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_dbgmcu.c 4 | * @author MCD Application Team 5 | * @version V1.4.0 6 | * @date 04-August-2014 7 | * @brief This file provides all the DBGMCU firmware functions. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2014 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm32f4xx_dbgmcu.h" 30 | 31 | /** @addtogroup STM32F4xx_StdPeriph_Driver 32 | * @{ 33 | */ 34 | 35 | /** @defgroup DBGMCU 36 | * @brief DBGMCU driver modules 37 | * @{ 38 | */ 39 | 40 | /* Private typedef -----------------------------------------------------------*/ 41 | /* Private define ------------------------------------------------------------*/ 42 | #define IDCODE_DEVID_MASK ((uint32_t)0x00000FFF) 43 | 44 | /* Private macro -------------------------------------------------------------*/ 45 | /* Private variables ---------------------------------------------------------*/ 46 | /* Private function prototypes -----------------------------------------------*/ 47 | /* Private functions ---------------------------------------------------------*/ 48 | 49 | /** @defgroup DBGMCU_Private_Functions 50 | * @{ 51 | */ 52 | 53 | /** 54 | * @brief Returns the device revision identifier. 55 | * @param None 56 | * @retval Device revision identifier 57 | */ 58 | uint32_t DBGMCU_GetREVID(void) 59 | { 60 | return(DBGMCU->IDCODE >> 16); 61 | } 62 | 63 | /** 64 | * @brief Returns the device identifier. 65 | * @param None 66 | * @retval Device identifier 67 | */ 68 | uint32_t DBGMCU_GetDEVID(void) 69 | { 70 | return(DBGMCU->IDCODE & IDCODE_DEVID_MASK); 71 | } 72 | 73 | /** 74 | * @brief Configures low power mode behavior when the MCU is in Debug mode. 75 | * @param DBGMCU_Periph: specifies the low power mode. 76 | * This parameter can be any combination of the following values: 77 | * @arg DBGMCU_SLEEP: Keep debugger connection during SLEEP mode 78 | * @arg DBGMCU_STOP: Keep debugger connection during STOP mode 79 | * @arg DBGMCU_STANDBY: Keep debugger connection during STANDBY mode 80 | * @param NewState: new state of the specified low power mode in Debug mode. 81 | * This parameter can be: ENABLE or DISABLE. 82 | * @retval None 83 | */ 84 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState) 85 | { 86 | /* Check the parameters */ 87 | assert_param(IS_DBGMCU_PERIPH(DBGMCU_Periph)); 88 | assert_param(IS_FUNCTIONAL_STATE(NewState)); 89 | if (NewState != DISABLE) 90 | { 91 | DBGMCU->CR |= DBGMCU_Periph; 92 | } 93 | else 94 | { 95 | DBGMCU->CR &= ~DBGMCU_Periph; 96 | } 97 | } 98 | 99 | /** 100 | * @brief Configures APB1 peripheral behavior when the MCU is in Debug mode. 101 | * @param DBGMCU_Periph: specifies the APB1 peripheral. 102 | * This parameter can be any combination of the following values: 103 | * @arg DBGMCU_TIM2_STOP: TIM2 counter stopped when Core is halted 104 | * @arg DBGMCU_TIM3_STOP: TIM3 counter stopped when Core is halted 105 | * @arg DBGMCU_TIM4_STOP: TIM4 counter stopped when Core is halted 106 | * @arg DBGMCU_TIM5_STOP: TIM5 counter stopped when Core is halted 107 | * @arg DBGMCU_TIM6_STOP: TIM6 counter stopped when Core is halted 108 | * @arg DBGMCU_TIM7_STOP: TIM7 counter stopped when Core is halted 109 | * @arg DBGMCU_TIM12_STOP: TIM12 counter stopped when Core is halted 110 | * @arg DBGMCU_TIM13_STOP: TIM13 counter stopped when Core is halted 111 | * @arg DBGMCU_TIM14_STOP: TIM14 counter stopped when Core is halted 112 | * @arg DBGMCU_RTC_STOP: RTC Calendar and Wakeup counter stopped when Core is halted. 113 | * @arg DBGMCU_WWDG_STOP: Debug WWDG stopped when Core is halted 114 | * @arg DBGMCU_IWDG_STOP: Debug IWDG stopped when Core is halted 115 | * @arg DBGMCU_I2C1_SMBUS_TIMEOUT: I2C1 SMBUS timeout mode stopped when Core is halted 116 | * @arg DBGMCU_I2C2_SMBUS_TIMEOUT: I2C2 SMBUS timeout mode stopped when Core is halted 117 | * @arg DBGMCU_I2C3_SMBUS_TIMEOUT: I2C3 SMBUS timeout mode stopped when Core is halted 118 | * @arg DBGMCU_CAN2_STOP: Debug CAN1 stopped when Core is halted 119 | * @arg DBGMCU_CAN1_STOP: Debug CAN2 stopped when Core is halted 120 | * This parameter can be: ENABLE or DISABLE. 121 | * @retval None 122 | */ 123 | void DBGMCU_APB1PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState) 124 | { 125 | /* Check the parameters */ 126 | assert_param(IS_DBGMCU_APB1PERIPH(DBGMCU_Periph)); 127 | assert_param(IS_FUNCTIONAL_STATE(NewState)); 128 | 129 | if (NewState != DISABLE) 130 | { 131 | DBGMCU->APB1FZ |= DBGMCU_Periph; 132 | } 133 | else 134 | { 135 | DBGMCU->APB1FZ &= ~DBGMCU_Periph; 136 | } 137 | } 138 | 139 | /** 140 | * @brief Configures APB2 peripheral behavior when the MCU is in Debug mode. 141 | * @param DBGMCU_Periph: specifies the APB2 peripheral. 142 | * This parameter can be any combination of the following values: 143 | * @arg DBGMCU_TIM1_STOP: TIM1 counter stopped when Core is halted 144 | * @arg DBGMCU_TIM8_STOP: TIM8 counter stopped when Core is halted 145 | * @arg DBGMCU_TIM9_STOP: TIM9 counter stopped when Core is halted 146 | * @arg DBGMCU_TIM10_STOP: TIM10 counter stopped when Core is halted 147 | * @arg DBGMCU_TIM11_STOP: TIM11 counter stopped when Core is halted 148 | * @param NewState: new state of the specified peripheral in Debug mode. 149 | * This parameter can be: ENABLE or DISABLE. 150 | * @retval None 151 | */ 152 | void DBGMCU_APB2PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState) 153 | { 154 | /* Check the parameters */ 155 | assert_param(IS_DBGMCU_APB2PERIPH(DBGMCU_Periph)); 156 | assert_param(IS_FUNCTIONAL_STATE(NewState)); 157 | 158 | if (NewState != DISABLE) 159 | { 160 | DBGMCU->APB2FZ |= DBGMCU_Periph; 161 | } 162 | else 163 | { 164 | DBGMCU->APB2FZ &= ~DBGMCU_Periph; 165 | } 166 | } 167 | 168 | /** 169 | * @} 170 | */ 171 | 172 | /** 173 | * @} 174 | */ 175 | 176 | /** 177 | * @} 178 | */ 179 | 180 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 181 | -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/FWLIB/src/stm32f4xx_flash_ramfunc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_flash_ramfunc.c 4 | * @author MCD Application Team 5 | * @version V1.4.0 6 | * @date 04-August-2014 7 | * @brief FLASH RAMFUNC module driver. 8 | * This file provides a FLASH firmware functions which should be 9 | * executed from internal SRAM 10 | * + Stop/Start the flash interface while System Run 11 | * + Enable/Disable the flash sleep while System Run 12 | * 13 | @verbatim 14 | ============================================================================== 15 | ##### APIs executed from Internal RAM ##### 16 | ============================================================================== 17 | [..] 18 | *** ARM Compiler *** 19 | -------------------- 20 | [..] RAM functions are defined using the toolchain options. 21 | Functions that are be executed in RAM should reside in a separate 22 | source module. Using the 'Options for File' dialog you can simply change 23 | the 'Code / Const' area of a module to a memory space in physical RAM. 24 | Available memory areas are declared in the 'Target' tab of the 25 | Options for Target' dialog. 26 | 27 | *** ICCARM Compiler *** 28 | ----------------------- 29 | [..] RAM functions are defined using a specific toolchain keyword "__ramfunc". 30 | 31 | *** GNU Compiler *** 32 | -------------------- 33 | [..] RAM functions are defined using a specific toolchain attribute 34 | "__attribute__((section(".RamFunc")))". 35 | 36 | @endverbatim 37 | ****************************************************************************** 38 | * @attention 39 | * 40 | *

© COPYRIGHT 2014 STMicroelectronics

41 | * 42 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 43 | * You may not use this file except in compliance with the License. 44 | * You may obtain a copy of the License at: 45 | * 46 | * http://www.st.com/software_license_agreement_liberty_v2 47 | * 48 | * Unless required by applicable law or agreed to in writing, software 49 | * distributed under the License is distributed on an "AS IS" BASIS, 50 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 51 | * See the License for the specific language governing permissions and 52 | * limitations under the License. 53 | * 54 | ****************************************************************************** 55 | */ 56 | 57 | /* Includes ------------------------------------------------------------------*/ 58 | #include "stm32f4xx_flash_ramfunc.h" 59 | 60 | /** @addtogroup STM32F4xx_StdPeriph_Driver 61 | * @{ 62 | */ 63 | 64 | /** @defgroup FLASH RAMFUNC 65 | * @brief FLASH RAMFUNC driver modules 66 | * @{ 67 | */ 68 | 69 | /* Private typedef -----------------------------------------------------------*/ 70 | /* Private define ------------------------------------------------------------*/ 71 | /* Private macro -------------------------------------------------------------*/ 72 | /* Private variables ---------------------------------------------------------*/ 73 | /* Private function prototypes -----------------------------------------------*/ 74 | /* Private functions ---------------------------------------------------------*/ 75 | 76 | /** @defgroup FLASH_RAMFUNC_Private_Functions 77 | * @{ 78 | */ 79 | 80 | /** @defgroup FLASH_RAMFUNC_Group1 Peripheral features functions executed from internal RAM 81 | * @brief Peripheral Extended features functions 82 | * 83 | @verbatim 84 | 85 | =============================================================================== 86 | ##### ramfunc functions ##### 87 | =============================================================================== 88 | [..] 89 | This subsection provides a set of functions that should be executed from RAM 90 | transfers. 91 | 92 | @endverbatim 93 | * @{ 94 | */ 95 | 96 | /** 97 | * @brief Start/Stop the flash interface while System Run 98 | * @note This mode is only available for STM32F411xx devices. 99 | * @note This mode could n't be set while executing with the flash itself. 100 | * It should be done with specific routine executed from RAM. 101 | * @param NewState: new state of the Smart Card mode. 102 | * This parameter can be: ENABLE or DISABLE. 103 | * @retval None 104 | */ 105 | __RAM_FUNC FLASH_FlashInterfaceCmd(FunctionalState NewState) 106 | { 107 | if (NewState != DISABLE) 108 | { 109 | /* Start the flash interface while System Run */ 110 | CLEAR_BIT(PWR->CR, PWR_CR_FISSR); 111 | } 112 | else 113 | { 114 | /* Stop the flash interface while System Run */ 115 | SET_BIT(PWR->CR, PWR_CR_FISSR); 116 | } 117 | } 118 | 119 | /** 120 | * @brief Enable/Disable the flash sleep while System Run 121 | * @note This mode is only available for STM32F411xx devices. 122 | * @note This mode could n't be set while executing with the flash itself. 123 | * It should be done with specific routine executed from RAM. 124 | * @param NewState: new state of the Smart Card mode. 125 | * This parameter can be: ENABLE or DISABLE. 126 | * @retval None 127 | */ 128 | __RAM_FUNC FLASH_FlashSleepModeCmd(FunctionalState NewState) 129 | { 130 | if (NewState != DISABLE) 131 | { 132 | /* Enable the flash sleep while System Run */ 133 | SET_BIT(PWR->CR, PWR_CR_FMSSR); 134 | } 135 | else 136 | { 137 | /* Disable the flash sleep while System Run */ 138 | CLEAR_BIT(PWR->CR, PWR_CR_FMSSR); 139 | } 140 | } 141 | 142 | /** 143 | * @} 144 | */ 145 | 146 | /** 147 | * @} 148 | */ 149 | 150 | /** 151 | * @} 152 | */ 153 | 154 | /** 155 | * @} 156 | */ 157 | 158 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 159 | -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/HARDWARE/1.44TFT/Font.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/wuxx/nanoDAP-HS/b629d2acf5910341de32ab4a8dbe2478d3efaec3/test/stm32f405rgt6/led_test/HARDWARE/1.44TFT/Font.h -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/HARDWARE/1.44TFT/GUI.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/wuxx/nanoDAP-HS/b629d2acf5910341de32ab4a8dbe2478d3efaec3/test/stm32f405rgt6/led_test/HARDWARE/1.44TFT/GUI.c -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/HARDWARE/1.44TFT/GUI.h: -------------------------------------------------------------------------------- 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SWOLogFile="" 28 | [MEM] 29 | RdOverrideOrMask = 0x00 30 | RdOverrideAndMask = 0xFFFFFFFF 31 | RdOverrideAddr = 0xFFFFFFFF 32 | WrOverrideOrMask = 0x00 33 | WrOverrideAndMask = 0xFFFFFFFF 34 | WrOverrideAddr = 0xFFFFFFFF 35 | -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/USER/LED.BAT: -------------------------------------------------------------------------------- 1 | SET PATH=C:\Keil_v5\ARM\ARMCC\Bin;C:\Program Files (x86)\Intel\iCLS Client\;C:\Program Files\Intel\iCLS Client\;C:\Windows\system32;C:\Windows;C:\Windows\System32\Wbem;C:\Windows\System32\WindowsPowerShell\v1.0\;C:\Program Files\Intel\Intel(R) Management Engine Components\DAL;C:\Program Files\Intel\Intel(R) Management Engine Components\IPT;C:\Program Files (x86)\Intel\Intel(R) Management Engine Components\DAL;C:\Program Files (x86)\Intel\Intel(R) Management Engine Components\IPT;C:\Program Files (x86)\Altium Designer Summer 09\System;C:\Program Files (x86)\IDM Computer Solutions\UltraEdit\ 2 | SET CPU_TYPE=STM32F407VE 3 | SET CPU_VENDOR=STMicroelectronics 4 | SET UV2_TARGET=LED 5 | SET CPU_CLOCK=0x007A1200 6 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via "..\obj\main.__i" 7 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via "..\obj\stm32f4xx_it.__i" 8 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via "..\obj\system_stm32f4xx.__i" 9 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via "..\obj\led.__i" 10 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via "..\obj\delay.__i" 11 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via "..\obj\sys.__i" 12 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via "..\obj\usart.__i" 13 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmAsm" --Via "..\obj\startup_stm32f40_41xxx._ia" 14 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via "..\obj\misc.__i" 15 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via "..\obj\stm32f4xx_gpio.__i" 16 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via "..\obj\stm32f4xx_rcc.__i" 17 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via "..\obj\stm32f4xx_syscfg.__i" 18 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via "..\obj\stm32f4xx_usart.__i" 19 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmLink" --Via "..\OBJ\LED.lnp" 20 | "C:\Keil_v5\ARM\ARMCC\Bin\fromelf.exe" "..\OBJ\LED.axf" --i32combined --output "..\OBJ\LED.hex" 21 | -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/USER/LED_LED.dep: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/wuxx/nanoDAP-HS/b629d2acf5910341de32ab4a8dbe2478d3efaec3/test/stm32f405rgt6/led_test/USER/LED_LED.dep -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/USER/main.__i: -------------------------------------------------------------------------------- 1 | -c --cpu Cortex-M4.fp -g -O0 --apcs=interwork -I..\CORE -I..\SYSTEM\delay -I..\SYSTEM\sys -I..\SYSTEM\usart -I..\USER -I..\HARDWARE\LED -I..\FWLIB\inc 2 | -I C:\Keil\ARM\RV31\INC 3 | -I C:\Keil\ARM\CMSIS\Include 4 | -I C:\Keil\ARM\Inc\ST\STM32F4xx 5 | -DSTM32F40_41xxx -DUSE_STDPERIPH_DRIVER -DSTM32F40XX 6 | -o main.o --omf_browse main.crf --depend main.d "main.c" -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/USER/main.c: -------------------------------------------------------------------------------- 1 | #include "sys.h" 2 | #include "delay.h" 3 | #include "usart.h" 4 | #include "led.h" 5 | 6 | #include "GUI.h" 7 | #include "Lcd_Driver.h" 8 | 9 | const char array[900 * 1024] = {0x1, 0x2, 0x3, 0x4}; 10 | 11 | int main(void) 12 | { 13 | int i; 14 | delay_init(168); 15 | LED_Init(); 16 | 17 | 18 | Lcd_Init(); 19 | Lcd_Clear(GRAY0); 20 | Gui_DrawFont_GBK16(0,16,RED,GRAY0," Test STM32 LED "); 21 | 22 | 23 | while(1) 24 | { 25 | GPIO_ResetBits(GPIOA,GPIO_Pin_8); 26 | 27 | delay_ms(500); 28 | 29 | GPIO_SetBits(GPIOA,GPIO_Pin_8); 30 | 31 | delay_ms(500); 32 | 33 | #if 1 34 | delay_ms(array[i++]); 35 | 36 | if (i == sizeof(array)) { 37 | i = 0; 38 | } 39 | #endif 40 | 41 | } 42 | } 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/USER/main.crf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/wuxx/nanoDAP-HS/b629d2acf5910341de32ab4a8dbe2478d3efaec3/test/stm32f405rgt6/led_test/USER/main.crf -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/USER/main.d: -------------------------------------------------------------------------------- 1 | main.o: main.c 2 | main.o: ..\SYSTEM\sys\sys.h 3 | main.o: ..\USER\stm32f4xx.h 4 | main.o: ..\CORE\core_cm4.h 5 | main.o: C:\Keil\ARM\ARMCC\bin\..\include\stdint.h 6 | main.o: C:\Keil\ARM\CMSIS\Include\core_cmInstr.h 7 | main.o: C:\Keil\ARM\CMSIS\Include\core_cmFunc.h 8 | main.o: ..\CORE\core_cm4_simd.h 9 | main.o: ..\USER\system_stm32f4xx.h 10 | main.o: ..\USER\stm32f4xx_conf.h 11 | main.o: ..\FWLIB\inc\stm32f4xx_adc.h 12 | main.o: ..\USER\stm32f4xx.h 13 | main.o: ..\FWLIB\inc\stm32f4xx_crc.h 14 | main.o: ..\FWLIB\inc\stm32f4xx_dbgmcu.h 15 | main.o: ..\FWLIB\inc\stm32f4xx_dma.h 16 | main.o: ..\FWLIB\inc\stm32f4xx_exti.h 17 | main.o: ..\FWLIB\inc\stm32f4xx_flash.h 18 | main.o: ..\FWLIB\inc\stm32f4xx_gpio.h 19 | main.o: ..\FWLIB\inc\stm32f4xx_i2c.h 20 | main.o: ..\FWLIB\inc\stm32f4xx_iwdg.h 21 | main.o: ..\FWLIB\inc\stm32f4xx_pwr.h 22 | main.o: ..\FWLIB\inc\stm32f4xx_rcc.h 23 | main.o: ..\FWLIB\inc\stm32f4xx_rtc.h 24 | main.o: ..\FWLIB\inc\stm32f4xx_sdio.h 25 | main.o: ..\FWLIB\inc\stm32f4xx_spi.h 26 | main.o: ..\FWLIB\inc\stm32f4xx_syscfg.h 27 | main.o: ..\FWLIB\inc\stm32f4xx_tim.h 28 | main.o: ..\FWLIB\inc\stm32f4xx_usart.h 29 | main.o: ..\FWLIB\inc\stm32f4xx_wwdg.h 30 | main.o: ..\FWLIB\inc\misc.h 31 | main.o: ..\FWLIB\inc\stm32f4xx_cryp.h 32 | main.o: ..\FWLIB\inc\stm32f4xx_hash.h 33 | main.o: ..\FWLIB\inc\stm32f4xx_rng.h 34 | main.o: ..\FWLIB\inc\stm32f4xx_can.h 35 | main.o: ..\FWLIB\inc\stm32f4xx_dac.h 36 | main.o: ..\FWLIB\inc\stm32f4xx_dcmi.h 37 | main.o: ..\FWLIB\inc\stm32f4xx_fsmc.h 38 | main.o: ..\SYSTEM\delay\delay.h 39 | main.o: ..\SYSTEM\usart\usart.h 40 | main.o: C:\Keil\ARM\ARMCC\bin\..\include\stdio.h 41 | main.o: ..\HARDWARE\LED\led.h 42 | -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/USER/main.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/wuxx/nanoDAP-HS/b629d2acf5910341de32ab4a8dbe2478d3efaec3/test/stm32f405rgt6/led_test/USER/main.o -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/USER/stm32f4xx.h: -------------------------------------------------------------------------------- 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file. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2014 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __STM32F4xx_CONF_H 30 | #define __STM32F4xx_CONF_H 31 | 32 | /* Includes ------------------------------------------------------------------*/ 33 | /* Uncomment the line below to enable peripheral header file inclusion */ 34 | #include "stm32f4xx_adc.h" 35 | #include "stm32f4xx_crc.h" 36 | #include "stm32f4xx_dbgmcu.h" 37 | #include "stm32f4xx_dma.h" 38 | #include "stm32f4xx_exti.h" 39 | #include "stm32f4xx_flash.h" 40 | #include "stm32f4xx_gpio.h" 41 | #include "stm32f4xx_i2c.h" 42 | #include "stm32f4xx_iwdg.h" 43 | #include "stm32f4xx_pwr.h" 44 | #include "stm32f4xx_rcc.h" 45 | #include "stm32f4xx_rtc.h" 46 | #include "stm32f4xx_sdio.h" 47 | #include "stm32f4xx_spi.h" 48 | #include "stm32f4xx_syscfg.h" 49 | #include "stm32f4xx_tim.h" 50 | #include "stm32f4xx_usart.h" 51 | #include "stm32f4xx_wwdg.h" 52 | #include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */ 53 | 54 | #if defined (STM32F429_439xx) 55 | #include "stm32f4xx_cryp.h" 56 | #include "stm32f4xx_hash.h" 57 | #include "stm32f4xx_rng.h" 58 | #include "stm32f4xx_can.h" 59 | #include "stm32f4xx_dac.h" 60 | #include "stm32f4xx_dcmi.h" 61 | #include "stm32f4xx_dma2d.h" 62 | #include "stm32f4xx_fmc.h" 63 | #include "stm32f4xx_ltdc.h" 64 | #include "stm32f4xx_sai.h" 65 | #endif /* STM32F429_439xx */ 66 | 67 | #if defined (STM32F427_437xx) 68 | #include "stm32f4xx_cryp.h" 69 | #include "stm32f4xx_hash.h" 70 | #include "stm32f4xx_rng.h" 71 | #include "stm32f4xx_can.h" 72 | #include "stm32f4xx_dac.h" 73 | #include "stm32f4xx_dcmi.h" 74 | #include "stm32f4xx_dma2d.h" 75 | #include "stm32f4xx_fmc.h" 76 | #include "stm32f4xx_sai.h" 77 | #endif /* STM32F427_437xx */ 78 | 79 | #if defined (STM32F40_41xxx) 80 | #include "stm32f4xx_cryp.h" 81 | #include "stm32f4xx_hash.h" 82 | #include "stm32f4xx_rng.h" 83 | #include "stm32f4xx_can.h" 84 | #include "stm32f4xx_dac.h" 85 | #include "stm32f4xx_dcmi.h" 86 | #include "stm32f4xx_fsmc.h" 87 | #endif /* STM32F40_41xxx */ 88 | 89 | #if defined (STM32F411xE) 90 | #include "stm32f4xx_flash_ramfunc.h" 91 | #endif /* STM32F411xE */ 92 | /* Exported types ------------------------------------------------------------*/ 93 | /* Exported constants --------------------------------------------------------*/ 94 | 95 | /* If an external clock source is used, then the value of the following define 96 | should be set to the value of the external clock source, else, if no external 97 | clock is used, keep this define commented */ 98 | /*#define I2S_EXTERNAL_CLOCK_VAL 12288000 */ /* Value of the external clock in Hz */ 99 | 100 | 101 | /* Uncomment the line below to expanse the "assert_param" macro in the 102 | Standard Peripheral Library drivers code */ 103 | /* #define USE_FULL_ASSERT 1 */ 104 | 105 | /* Exported macro ------------------------------------------------------------*/ 106 | #ifdef USE_FULL_ASSERT 107 | 108 | /** 109 | * @brief The assert_param macro is used for function's parameters check. 110 | * @param expr: If expr is false, it calls assert_failed function 111 | * which reports the name of the source file and the source 112 | * line number of the call that failed. 113 | * If expr is true, it returns no value. 114 | * @retval None 115 | */ 116 | #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) 117 | /* Exported functions ------------------------------------------------------- */ 118 | void assert_failed(uint8_t* file, uint32_t line); 119 | #else 120 | #define assert_param(expr) ((void)0) 121 | #endif /* USE_FULL_ASSERT */ 122 | 123 | #endif /* __STM32F4xx_CONF_H */ 124 | 125 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 126 | -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/USER/stm32f4xx_it.__i: -------------------------------------------------------------------------------- 1 | -c --cpu Cortex-M4.fp -g -O0 --apcs=interwork -I..\CORE -I..\SYSTEM\delay -I..\SYSTEM\sys -I..\SYSTEM\usart -I..\USER -I..\HARDWARE\LED -I..\FWLIB\inc 2 | -I C:\Keil\ARM\RV31\INC 3 | -I C:\Keil\ARM\CMSIS\Include 4 | -I C:\Keil\ARM\Inc\ST\STM32F4xx 5 | -DSTM32F40_41xxx -DUSE_STDPERIPH_DRIVER -DSTM32F40XX 6 | -o stm32f4xx_it.o --omf_browse stm32f4xx_it.crf --depend stm32f4xx_it.d "stm32f4xx_it.c" -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/USER/stm32f4xx_it.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file Project/STM32F4xx_StdPeriph_Templates/stm32f4xx_it.c 4 | * @author MCD Application Team 5 | * @version V1.4.0 6 | * @date 04-August-2014 7 | * @brief Main Interrupt Service Routines. 8 | * This file provides template for all exceptions handler and 9 | * peripherals interrupt service routine. 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | *

© COPYRIGHT 2014 STMicroelectronics

14 | * 15 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 16 | * You may not use this file except in compliance with the License. 17 | * You may obtain a copy of the License at: 18 | * 19 | * http://www.st.com/software_license_agreement_liberty_v2 20 | * 21 | * Unless required by applicable law or agreed to in writing, software 22 | * distributed under the License is distributed on an "AS IS" BASIS, 23 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 24 | * See the License for the specific language governing permissions and 25 | * limitations under the License. 26 | * 27 | ****************************************************************************** 28 | */ 29 | 30 | /* Includes ------------------------------------------------------------------*/ 31 | #include "stm32f4xx_it.h" 32 | 33 | 34 | /** @addtogroup Template_Project 35 | * @{ 36 | */ 37 | 38 | /* Private typedef -----------------------------------------------------------*/ 39 | /* Private define ------------------------------------------------------------*/ 40 | /* Private macro -------------------------------------------------------------*/ 41 | /* Private variables ---------------------------------------------------------*/ 42 | /* Private function prototypes -----------------------------------------------*/ 43 | /* Private functions ---------------------------------------------------------*/ 44 | 45 | /******************************************************************************/ 46 | /* Cortex-M4 Processor Exceptions Handlers */ 47 | /******************************************************************************/ 48 | 49 | /** 50 | * @brief This function handles NMI exception. 51 | * @param None 52 | * @retval None 53 | */ 54 | void NMI_Handler(void) 55 | { 56 | } 57 | 58 | /** 59 | * @brief This function handles Hard Fault exception. 60 | * @param None 61 | * @retval None 62 | */ 63 | void HardFault_Handler(void) 64 | { 65 | /* Go to infinite loop when Hard Fault exception occurs */ 66 | while (1) 67 | { 68 | } 69 | } 70 | 71 | /** 72 | * @brief This function handles Memory Manage exception. 73 | * @param None 74 | * @retval None 75 | */ 76 | void MemManage_Handler(void) 77 | { 78 | /* Go to infinite loop when Memory Manage exception occurs */ 79 | while (1) 80 | { 81 | } 82 | } 83 | 84 | /** 85 | * @brief This function handles Bus Fault exception. 86 | * @param None 87 | * @retval None 88 | */ 89 | void BusFault_Handler(void) 90 | { 91 | /* Go to infinite loop when Bus Fault exception occurs */ 92 | while (1) 93 | { 94 | } 95 | } 96 | 97 | /** 98 | * @brief This function handles Usage Fault exception. 99 | * @param None 100 | * @retval None 101 | */ 102 | void UsageFault_Handler(void) 103 | { 104 | /* Go to infinite loop when Usage Fault exception occurs */ 105 | while (1) 106 | { 107 | } 108 | } 109 | 110 | /** 111 | * @brief This function handles SVCall exception. 112 | * @param None 113 | * @retval None 114 | */ 115 | void SVC_Handler(void) 116 | { 117 | } 118 | 119 | /** 120 | * @brief This function handles Debug Monitor exception. 121 | * @param None 122 | * @retval None 123 | */ 124 | void DebugMon_Handler(void) 125 | { 126 | } 127 | 128 | /** 129 | * @brief This function handles PendSVC exception. 130 | * @param None 131 | * @retval None 132 | */ 133 | void PendSV_Handler(void) 134 | { 135 | } 136 | 137 | /** 138 | * @brief This function handles SysTick Handler. 139 | * @param None 140 | * @retval None 141 | */ 142 | void SysTick_Handler(void) 143 | { 144 | 145 | } 146 | 147 | /******************************************************************************/ 148 | /* STM32F4xx Peripherals Interrupt Handlers */ 149 | /* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */ 150 | /* available peripheral interrupt handler's name please refer to the startup */ 151 | /* file (startup_stm32f4xx.s). */ 152 | /******************************************************************************/ 153 | 154 | /** 155 | * @brief This function handles PPP interrupt request. 156 | * @param None 157 | * @retval None 158 | */ 159 | /*void PPP_IRQHandler(void) 160 | { 161 | }*/ 162 | 163 | /** 164 | * @} 165 | */ 166 | 167 | 168 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 169 | -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/USER/stm32f4xx_it.crf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/wuxx/nanoDAP-HS/b629d2acf5910341de32ab4a8dbe2478d3efaec3/test/stm32f405rgt6/led_test/USER/stm32f4xx_it.crf -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/USER/stm32f4xx_it.d: -------------------------------------------------------------------------------- 1 | stm32f4xx_it.o: stm32f4xx_it.c 2 | stm32f4xx_it.o: stm32f4xx_it.h 3 | stm32f4xx_it.o: stm32f4xx.h 4 | stm32f4xx_it.o: ..\CORE\core_cm4.h 5 | stm32f4xx_it.o: C:\Keil\ARM\ARMCC\bin\..\include\stdint.h 6 | stm32f4xx_it.o: C:\Keil\ARM\CMSIS\Include\core_cmInstr.h 7 | stm32f4xx_it.o: C:\Keil\ARM\CMSIS\Include\core_cmFunc.h 8 | stm32f4xx_it.o: ..\CORE\core_cm4_simd.h 9 | stm32f4xx_it.o: system_stm32f4xx.h 10 | stm32f4xx_it.o: stm32f4xx_conf.h 11 | stm32f4xx_it.o: ..\FWLIB\inc\stm32f4xx_adc.h 12 | stm32f4xx_it.o: ..\USER\stm32f4xx.h 13 | stm32f4xx_it.o: ..\FWLIB\inc\stm32f4xx_crc.h 14 | stm32f4xx_it.o: ..\FWLIB\inc\stm32f4xx_dbgmcu.h 15 | stm32f4xx_it.o: ..\FWLIB\inc\stm32f4xx_dma.h 16 | stm32f4xx_it.o: ..\FWLIB\inc\stm32f4xx_exti.h 17 | stm32f4xx_it.o: ..\FWLIB\inc\stm32f4xx_flash.h 18 | stm32f4xx_it.o: ..\FWLIB\inc\stm32f4xx_gpio.h 19 | stm32f4xx_it.o: ..\FWLIB\inc\stm32f4xx_i2c.h 20 | stm32f4xx_it.o: ..\FWLIB\inc\stm32f4xx_iwdg.h 21 | stm32f4xx_it.o: ..\FWLIB\inc\stm32f4xx_pwr.h 22 | stm32f4xx_it.o: ..\FWLIB\inc\stm32f4xx_rcc.h 23 | stm32f4xx_it.o: ..\FWLIB\inc\stm32f4xx_rtc.h 24 | stm32f4xx_it.o: ..\FWLIB\inc\stm32f4xx_sdio.h 25 | stm32f4xx_it.o: ..\FWLIB\inc\stm32f4xx_spi.h 26 | stm32f4xx_it.o: ..\FWLIB\inc\stm32f4xx_syscfg.h 27 | stm32f4xx_it.o: ..\FWLIB\inc\stm32f4xx_tim.h 28 | stm32f4xx_it.o: ..\FWLIB\inc\stm32f4xx_usart.h 29 | stm32f4xx_it.o: ..\FWLIB\inc\stm32f4xx_wwdg.h 30 | stm32f4xx_it.o: ..\FWLIB\inc\misc.h 31 | stm32f4xx_it.o: ..\FWLIB\inc\stm32f4xx_cryp.h 32 | stm32f4xx_it.o: ..\FWLIB\inc\stm32f4xx_hash.h 33 | stm32f4xx_it.o: ..\FWLIB\inc\stm32f4xx_rng.h 34 | stm32f4xx_it.o: ..\FWLIB\inc\stm32f4xx_can.h 35 | stm32f4xx_it.o: ..\FWLIB\inc\stm32f4xx_dac.h 36 | stm32f4xx_it.o: ..\FWLIB\inc\stm32f4xx_dcmi.h 37 | stm32f4xx_it.o: ..\FWLIB\inc\stm32f4xx_fsmc.h 38 | -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/USER/stm32f4xx_it.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file Project/STM32F4xx_StdPeriph_Templates/stm32f4xx_it.h 4 | * @author MCD Application Team 5 | * @version V1.4.0 6 | * @date 04-August-2014 7 | * @brief This file contains the headers of the interrupt handlers. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2014 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __STM32F4xx_IT_H 30 | #define __STM32F4xx_IT_H 31 | 32 | #ifdef __cplusplus 33 | extern "C" { 34 | #endif 35 | 36 | /* Includes ------------------------------------------------------------------*/ 37 | #include "stm32f4xx.h" 38 | 39 | /* Exported types ------------------------------------------------------------*/ 40 | /* Exported constants --------------------------------------------------------*/ 41 | /* Exported macro ------------------------------------------------------------*/ 42 | /* Exported functions ------------------------------------------------------- */ 43 | 44 | void NMI_Handler(void); 45 | void HardFault_Handler(void); 46 | void MemManage_Handler(void); 47 | void BusFault_Handler(void); 48 | void UsageFault_Handler(void); 49 | void SVC_Handler(void); 50 | void DebugMon_Handler(void); 51 | void PendSV_Handler(void); 52 | void SysTick_Handler(void); 53 | 54 | #ifdef __cplusplus 55 | } 56 | #endif 57 | 58 | #endif /* __STM32F4xx_IT_H */ 59 | 60 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 61 | -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/USER/stm32f4xx_it.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/wuxx/nanoDAP-HS/b629d2acf5910341de32ab4a8dbe2478d3efaec3/test/stm32f405rgt6/led_test/USER/stm32f4xx_it.o -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/USER/system_stm32f4xx.__i: -------------------------------------------------------------------------------- 1 | -c --cpu Cortex-M4.fp -g -O0 --apcs=interwork -I..\CORE -I..\SYSTEM\delay -I..\SYSTEM\sys -I..\SYSTEM\usart -I..\USER -I..\HARDWARE\LED -I..\FWLIB\inc 2 | -I C:\Keil\ARM\RV31\INC 3 | -I C:\Keil\ARM\CMSIS\Include 4 | -I C:\Keil\ARM\Inc\ST\STM32F4xx 5 | -DSTM32F40_41xxx -DUSE_STDPERIPH_DRIVER -DSTM32F40XX 6 | -o system_stm32f4xx.o --omf_browse system_stm32f4xx.crf --depend system_stm32f4xx.d "system_stm32f4xx.c" -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/USER/system_stm32f4xx.crf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/wuxx/nanoDAP-HS/b629d2acf5910341de32ab4a8dbe2478d3efaec3/test/stm32f405rgt6/led_test/USER/system_stm32f4xx.crf -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/USER/system_stm32f4xx.d: -------------------------------------------------------------------------------- 1 | system_stm32f4xx.o: system_stm32f4xx.c 2 | system_stm32f4xx.o: stm32f4xx.h 3 | system_stm32f4xx.o: ..\CORE\core_cm4.h 4 | system_stm32f4xx.o: C:\Keil\ARM\ARMCC\bin\..\include\stdint.h 5 | system_stm32f4xx.o: C:\Keil\ARM\CMSIS\Include\core_cmInstr.h 6 | system_stm32f4xx.o: C:\Keil\ARM\CMSIS\Include\core_cmFunc.h 7 | system_stm32f4xx.o: ..\CORE\core_cm4_simd.h 8 | system_stm32f4xx.o: system_stm32f4xx.h 9 | system_stm32f4xx.o: stm32f4xx_conf.h 10 | system_stm32f4xx.o: ..\FWLIB\inc\stm32f4xx_adc.h 11 | system_stm32f4xx.o: ..\USER\stm32f4xx.h 12 | system_stm32f4xx.o: ..\FWLIB\inc\stm32f4xx_crc.h 13 | system_stm32f4xx.o: ..\FWLIB\inc\stm32f4xx_dbgmcu.h 14 | system_stm32f4xx.o: ..\FWLIB\inc\stm32f4xx_dma.h 15 | system_stm32f4xx.o: ..\FWLIB\inc\stm32f4xx_exti.h 16 | system_stm32f4xx.o: ..\FWLIB\inc\stm32f4xx_flash.h 17 | system_stm32f4xx.o: ..\FWLIB\inc\stm32f4xx_gpio.h 18 | system_stm32f4xx.o: ..\FWLIB\inc\stm32f4xx_i2c.h 19 | system_stm32f4xx.o: ..\FWLIB\inc\stm32f4xx_iwdg.h 20 | system_stm32f4xx.o: ..\FWLIB\inc\stm32f4xx_pwr.h 21 | system_stm32f4xx.o: ..\FWLIB\inc\stm32f4xx_rcc.h 22 | system_stm32f4xx.o: ..\FWLIB\inc\stm32f4xx_rtc.h 23 | system_stm32f4xx.o: ..\FWLIB\inc\stm32f4xx_sdio.h 24 | system_stm32f4xx.o: ..\FWLIB\inc\stm32f4xx_spi.h 25 | system_stm32f4xx.o: ..\FWLIB\inc\stm32f4xx_syscfg.h 26 | system_stm32f4xx.o: ..\FWLIB\inc\stm32f4xx_tim.h 27 | system_stm32f4xx.o: ..\FWLIB\inc\stm32f4xx_usart.h 28 | system_stm32f4xx.o: ..\FWLIB\inc\stm32f4xx_wwdg.h 29 | system_stm32f4xx.o: ..\FWLIB\inc\misc.h 30 | system_stm32f4xx.o: ..\FWLIB\inc\stm32f4xx_cryp.h 31 | system_stm32f4xx.o: ..\FWLIB\inc\stm32f4xx_hash.h 32 | system_stm32f4xx.o: ..\FWLIB\inc\stm32f4xx_rng.h 33 | system_stm32f4xx.o: ..\FWLIB\inc\stm32f4xx_can.h 34 | system_stm32f4xx.o: ..\FWLIB\inc\stm32f4xx_dac.h 35 | system_stm32f4xx.o: ..\FWLIB\inc\stm32f4xx_dcmi.h 36 | system_stm32f4xx.o: ..\FWLIB\inc\stm32f4xx_fsmc.h 37 | -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/USER/system_stm32f4xx.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file system_stm32f4xx.h 4 | * @author MCD Application Team 5 | * @version V1.4.0 6 | * @date 04-August-2014 7 | * @brief CMSIS Cortex-M4 Device System Source File for STM32F4xx devices. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2014 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /** @addtogroup CMSIS 29 | * @{ 30 | */ 31 | 32 | /** @addtogroup stm32f4xx_system 33 | * @{ 34 | */ 35 | 36 | /** 37 | * @brief Define to prevent recursive inclusion 38 | */ 39 | #ifndef __SYSTEM_STM32F4XX_H 40 | #define __SYSTEM_STM32F4XX_H 41 | 42 | #ifdef __cplusplus 43 | extern "C" { 44 | #endif 45 | 46 | /** @addtogroup STM32F4xx_System_Includes 47 | * @{ 48 | */ 49 | 50 | /** 51 | * @} 52 | */ 53 | 54 | 55 | /** @addtogroup STM32F4xx_System_Exported_types 56 | * @{ 57 | */ 58 | 59 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ 60 | 61 | 62 | /** 63 | * @} 64 | */ 65 | 66 | /** @addtogroup STM32F4xx_System_Exported_Constants 67 | * @{ 68 | */ 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | /** @addtogroup STM32F4xx_System_Exported_Macros 75 | * @{ 76 | */ 77 | 78 | /** 79 | * @} 80 | */ 81 | 82 | /** @addtogroup STM32F4xx_System_Exported_Functions 83 | * @{ 84 | */ 85 | 86 | extern void SystemInit(void); 87 | extern void SystemCoreClockUpdate(void); 88 | /** 89 | * @} 90 | */ 91 | 92 | #ifdef __cplusplus 93 | } 94 | #endif 95 | 96 | #endif /*__SYSTEM_STM32F4XX_H */ 97 | 98 | /** 99 | * @} 100 | */ 101 | 102 | /** 103 | * @} 104 | */ 105 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 106 | -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/USER/system_stm32f4xx.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/wuxx/nanoDAP-HS/b629d2acf5910341de32ab4a8dbe2478d3efaec3/test/stm32f405rgt6/led_test/USER/system_stm32f4xx.o -------------------------------------------------------------------------------- /test/stm32f405rgt6/led_test/keilkilll.bat: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/wuxx/nanoDAP-HS/b629d2acf5910341de32ab4a8dbe2478d3efaec3/test/stm32f405rgt6/led_test/keilkilll.bat --------------------------------------------------------------------------------