├── .gitignore ├── LICENSE ├── Makefile ├── README.md ├── build_sos.sh ├── driver ├── dma │ └── dma.c ├── dram │ └── dram.c ├── driver.mk ├── ethc │ └── ethc.c ├── gpio │ └── gpio.c ├── i2c │ └── i2c.c ├── log │ └── log.c ├── mailbox │ └── mailbox.c ├── mmc │ ├── mmc.c │ └── sdhci.c ├── pwm │ └── pwm.c ├── shell │ └── shell.c ├── spi │ └── spi.c ├── timer │ └── timer.c ├── uart │ └── uart.c ├── usb │ ├── eth │ │ ├── .depend │ │ ├── .depend.smsc95xx │ │ ├── .depend.usb_ether │ │ ├── Makefile │ │ ├── smsc95xx.c │ │ ├── smsc95xx.su │ │ ├── usb_ether.c │ │ └── usb_ether.su │ ├── host │ │ ├── .depend │ │ ├── .depend.dwc_otg │ │ ├── .depend.dwc_otg-hcd │ │ ├── Makefile │ │ ├── dwc_otg-hcd.c │ │ ├── dwc_otg-hcd.su │ │ ├── dwc_otg.c │ │ ├── dwc_otg.h │ │ ├── dwc_otg.su │ │ ├── dwc_otg_core_if.h │ │ └── dwc_otg_regs.h │ └── storage │ │ └── usb_storage.c └── watchdog │ └── watchdog.c ├── include ├── driver │ ├── common.h │ ├── dma.h │ ├── dram.h │ ├── gpio.h │ ├── i2c.h │ ├── log.h │ ├── mailbox.h │ ├── mmc.h │ ├── mmio.h │ ├── net.h │ ├── pwm.h │ ├── sdhci.h │ ├── shell.h │ ├── timer.h │ ├── uart.h │ ├── usb.h │ ├── usb_ether.h │ └── watchdog.h ├── kernel │ ├── os.h │ ├── os_event.h │ ├── os_list.h │ ├── os_mailbox.h │ ├── os_memory.h │ ├── os_semaphore.h │ ├── os_sleep.h │ └── os_task.h ├── libc │ ├── assert.h │ ├── bitmap.h │ ├── libc.h │ ├── stdarg.h │ ├── stdio.h │ ├── string.h │ └── types.h └── platform │ ├── cpu.h │ ├── int.h │ ├── memory_map.h │ ├── syscall.h │ ├── system_config.h │ └── systest.h ├── kernel ├── kernel.c ├── kernel.mk ├── os_event.c ├── os_list.c ├── os_mailbox.c ├── os_memory.c ├── os_semaphore.c ├── os_sleep.c └── os_task.c ├── libc ├── bitmap.c ├── libc.mk ├── signal.c ├── string.c └── vsnprintf.c ├── platform ├── arm_v6.s ├── init.s ├── int.c ├── main.c ├── platform.mk └── syscall.c ├── sos.ld └── test ├── systest.c ├── test.mk ├── test_cpu.c ├── test_gpio.c ├── test_libc.c ├── test_log.c ├── test_os.c ├── test_timer.c └── test_wdt.c /.gitignore: -------------------------------------------------------------------------------- 1 | tags 2 | build/ 3 | .compiler/ 4 | -------------------------------------------------------------------------------- /Makefile: -------------------------------------------------------------------------------- 1 | ############ create by wuxx ############# 2 | 3 | #from build_sos.sh 4 | CFLAGS = $(cflags) 5 | 6 | #$(warning CFLAGS: $(CFLAGS)) 7 | HOST_IS_ARM = $(shell uname -m | grep "arm") 8 | 9 | #$(warning HOST_IS_ARM: $(HOST_IS_ARM)) 10 | ifeq ("", "$(HOST_IS_ARM)") 11 | TOOLCHAIN_DIR=~/gcc-arm-none-eabi-5_4-2016q3 12 | CROSS_COMPILE=$(TOOLCHAIN_DIR)/bin/arm-none-eabi- 13 | LIBGCC = $(shell find $(TOOLCHAIN_DIR)/ | grep "armv6-m\/libgcc\.a") 14 | endif 15 | 16 | LIBGCC ?= $(shell gcc -print-libgcc-file-name) 17 | #$(warning libgcc $(LIBGCC)) 18 | 19 | ROOT = . 20 | 21 | CC = $(CROSS_COMPILE)gcc 22 | AS = $(CROSS_COMPILE)as 23 | LD = $(CROSS_COMPILE)ld 24 | OBJCOPY = $(CROSS_COMPILE)objcopy 25 | OBJDUMP = $(CROSS_COMPILE)objdump 26 | READELF = $(CROSS_COMPILE)readelf 27 | 28 | BUILD = $(ROOT)/build 29 | 30 | KERNEL_DIR = $(ROOT)/kernel 31 | PLATFORM_DIR = $(ROOT)/platform 32 | LIBC_DIR = $(ROOT)/libc 33 | DRIVER_DIR = $(ROOT)/driver 34 | TEST_DIR = $(ROOT)/test 35 | 36 | INCLUDE_DIR = $(ROOT)/include/driver -I$(ROOT)/include/kernel -I$(ROOT)/include/libc -I$(ROOT)/include/platform 37 | 38 | include $(ROOT)/kernel/kernel.mk 39 | include $(ROOT)/platform/platform.mk 40 | include $(ROOT)/libc/libc.mk 41 | include $(ROOT)/driver/driver.mk 42 | include $(ROOT)/test/test.mk 43 | 44 | ALL_SRCS = $(KERNEL_SRCS) $(PLATFORM_SRCS) $(LIBC_SRCS) $(DRIVER_SRCS) $(TEST_SRCS) 45 | 46 | C_SRCS = $(filter %.c, $(ALL_SRCS)) 47 | ASM_SRCS = $(filter %.s, $(ALL_SRCS)) 48 | H_SRCS = $(wildcard $(INCLUDE_DIR)/*.h) 49 | 50 | C_OBJS = $(addprefix $(BUILD)/, $(patsubst %.c,%.o,$(C_SRCS))) 51 | ASM_OBJS = $(addprefix $(BUILD)/, $(patsubst %.s,%.o,$(ASM_SRCS))) 52 | 53 | ALL_OBJS = $(C_OBJS) $(ASM_OBJS) 54 | #$(warning ALL_SRCS $(ALL_SRCS)) 55 | #$(warning ALL_OBJS $(ALL_OBJS)) 56 | 57 | #$(warning C_SRCS $(C_SRCS) ASM_SRCS $(ASM_SRCS)) 58 | #$(warning C_OBJS $(C_OBJS) ASM_OBJS $(ASM_OBJS)) 59 | 60 | 61 | OBJ_PATHS = $(addprefix $(BUILD)/, $(sort $(dir $(ALL_SRCS)))) 62 | #$(warning OBJ_PATHS $(OBJ_PATHS)) 63 | 64 | 65 | TARGET = sos 66 | TARGET_ELF = $(BUILD)/$(TARGET).elf 67 | TARGET_IMG = $(BUILD)/$(TARGET).img 68 | TARGET_MAP = $(BUILD)/$(TARGET).map 69 | TARGET_DISASM = $(BUILD)/$(TARGET).disasm 70 | TARGET_ELFINFO = $(BUILD)/$(TARGET).elfinfo 71 | TARGET_SECINFO = $(BUILD)/$(TARGET).secinfo #section info 72 | 73 | LDS = $(ROOT)/$(TARGET).ld 74 | 75 | #CFLAGS += -mcpu=arm1176jzf-s 76 | CFLAGS += -mtune=arm1176jzf-s 77 | CFLAGS += -nostdlib -funwind-tables -fno-builtin -Wall -O3 -g -I$(INCLUDE_DIR) 78 | ASFLAGS += 79 | 80 | LDFLAGS = -T $(LDS) -Map $(TARGET_MAP) -nostdlib -nostartfiles $(LIBGCC) 81 | 82 | .PHONY: build_all clean tags 83 | 84 | build_all: all 85 | 86 | $(C_OBJS): $(H_SRCS) 87 | $(C_OBJS): $(BUILD)/%.o: %.c 88 | $(CC) $(CFLAGS) -c $< -o $@ 89 | 90 | $(ASM_OBJS): $(BUILD)/%.o: %.s 91 | $(AS) $(ASFLAGS) $< -o $@ 92 | 93 | build_objs: $(C_OBJS) $(ASM_OBJS) 94 | 95 | init: 96 | mkdir -p build 97 | $(foreach d,$(OBJ_PATHS), mkdir -p $(d);) 98 | 99 | all:init build_objs 100 | $(LD) $(ALL_OBJS) $(LDFLAGS) -o $(TARGET_ELF) 101 | $(OBJCOPY) $(TARGET_ELF) -O binary $(TARGET_IMG) 102 | $(OBJDUMP) -S $(TARGET_ELF) > $(TARGET_DISASM) 103 | $(OBJDUMP) -s $(TARGET_ELF) > $(TARGET_SECINFO) 104 | $(READELF) -a $(TARGET_ELF) > $(TARGET_ELFINFO) 105 | cp $(TARGET_IMG) $(BUILD)/kernel.img 106 | 107 | tags: 108 | ctags -R $(KERNEL_DIR) $(PLATFORM_DIR) $(LIBC_DIR) $(DRIVER_DIR) $(TEST_DIR) $(INCLUDE_DIR) 109 | 110 | ccount: 111 | find . | egrep ".*\.[ch]$$" | xargs wc -l 112 | 113 | 114 | clean: 115 | -rm -rf build 116 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | SOS 2 | === 3 | 4 | Simple OS for raspberry pi model B
5 | 1. SOS use u-boot as bootloader (https://github.com/wuxx/u-boot-pi)
6 | U-Boot> loady 0x200000 (because sos is link to 0x200000, please checkout the sos.ld)
7 | U-Boot> go 0x200000
8 | 9 | 2. use u-boot boot normal linux kernel
10 | (U-Boot> fatls mmc 0:1)
11 | (U-Boot> fatload mmc 0:1 0x8000 kernel.img.linux)
12 | (U-Boot> bootz 0x8000)
13 | 14 | 3. u-boot net up 15 | (U-Boot> usb start)
16 | (U-Boot> env set ipaddr 192.168.x.x)
17 | (U-Boot> ping 192.168.x.x)
18 | 19 | 20 | 4. more information about rpi
21 | https://www.raspberrypi.org/documentation/hardware/raspberrypi/schematics/
22 | 23 | 5. arm inline asm
24 | http://www.ethernut.de/en/documents/arm-inline-asm.html
25 | 26 | 6. interrupt infomation from linux kernel document
27 | The interrupt sources are as follows:
28 | Bank 0:
29 | 0: ARM_TIMER
30 | 1: ARM_MAILBOX
31 | 2: ARM_DOORBELL_0
32 | 3: ARM_DOORBELL_1
33 | 4: VPU0_HALTED
34 | 5: VPU1_HALTED
35 | 6: ILLEGAL_TYPE0
36 | 7: ILLEGAL_TYPE1
37 | 38 | Bank 1:
39 | 0: TIMER0
40 | 1: TIMER1
41 | 2: TIMER2
42 | 3: TIMER3
43 | 4: CODEC0
44 | 5: CODEC1
45 | 6: CODEC2
46 | 7: VC_JPEG
47 | 8: ISP
48 | 9: VC_USB
49 | 10: VC_3D
50 | 11: TRANSPOSER
51 | 12: MULTICORESYNC0
52 | 13: MULTICORESYNC1
53 | 14: MULTICORESYNC2
54 | 15: MULTICORESYNC3
55 | 16: DMA0
56 | 17: DMA1
57 | 18: VC_DMA2
58 | 19: VC_DMA3
59 | 20: DMA4
60 | 21: DMA5
61 | 22: DMA6
62 | 23: DMA7
63 | 24: DMA8
64 | 25: DMA9
65 | 26: DMA10
66 | 27: DMA11
67 | 28: DMA12
68 | 29: AUX
69 | 30: ARM
70 | 31: VPUDMA
71 | 72 | Bank 2:
73 | 0: HOSTPORT
74 | 1: VIDEOSCALER
75 | 2: CCP2TX
76 | 3: SDC
77 | 4: DSI0
78 | 5: AVE
79 | 6: CAM0
80 | 7: CAM1
81 | 8: HDMI0
82 | 9: HDMI1
83 | 10: PIXELVALVE1
84 | 11: I2CSPISLV
85 | 12: DSI1
86 | 13: PWA0
87 | 14: PWA1
88 | 15: CPR
89 | 16: SMI
90 | 17: GPIO0
91 | 18: GPIO1
92 | 19: GPIO2
93 | 20: GPIO3
94 | 21: VC_I2C
95 | 22: VC_SPI
96 | 23: VC_I2SPCM
97 | 24: VC_SDIO
98 | 25: VC_UART
99 | 26: SLIMBUS
100 | 27: VEC
101 | 28: CPG
102 | 29: RNG
103 | 30: VC_ARASANSDIO
104 | 31: AVSPMON
105 | -------------------------------------------------------------------------------- /build_sos.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | 3 | help() { 4 | echo "usage: $0 " 5 | echo -e "\t\t[--debug] CFLAGS+=-DDEBUG" 6 | echo -e "\t\t[--help]" 7 | } 8 | 9 | #default build config 10 | export cflags="" 11 | 12 | echo $REVISION 13 | 14 | while [ ! -z "$1" ]; do 15 | case "$1" in 16 | "--debug") 17 | export cflags="-DDEBUG" 18 | shift 19 | ;; 20 | "--help") 21 | help 22 | shift 23 | exit 0 24 | ;; 25 | *) 26 | echo "illegal param $1" 27 | shift 28 | help 29 | exit 1 30 | ;; 31 | esac 32 | done 33 | 34 | export cflags="${cflags}" 35 | 36 | echo "cflags=$cflag" 37 | CPU_NUM=$(nproc) 38 | make -j ${CPU_NUM} 39 | 40 | if [ $? -eq 0 ]; then 41 | echo -e "\033[32mbuild ok!\033[0" 42 | else 43 | echo -e "\033[31mbuild failed!\033[0" 44 | fi 45 | 46 | -------------------------------------------------------------------------------- /driver/dma/dma.c: -------------------------------------------------------------------------------- 1 | #include "libc.h" 2 | #include "dma.h" 3 | 4 | s32 dma_copy(u32 *dst, u32 *src, u32 size) 5 | { 6 | 7 | } 8 | 9 | s32 dma_init() 10 | { 11 | return 0; 12 | } 13 | -------------------------------------------------------------------------------- /driver/dram/dram.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include "common.h" 3 | #include "mailbox.h" 4 | #include "log.h" 5 | 6 | u32 dram_init(void) 7 | { 8 | u32 ram_size; 9 | s32 ret; 10 | ALLOC_ALIGN_BUFFER(struct msg_get_arm_mem, msg, 1, 16); 11 | 12 | BCM2835_MBOX_INIT_HDR(msg); 13 | BCM2835_MBOX_INIT_TAG(&msg->get_arm_mem, GET_ARM_MEMORY); 14 | 15 | ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg->hdr); 16 | if (ret) { 17 | PRINT_ERR("bcm2835: Could not query ARM memory size\n"); 18 | return -1; 19 | } 20 | 21 | ram_size = msg->get_arm_mem.body.resp.mem_size; 22 | 23 | PRINT_ERR("DRAM: [0, 0x%x]\n", ram_size); 24 | 25 | return 0; 26 | } 27 | -------------------------------------------------------------------------------- /driver/driver.mk: -------------------------------------------------------------------------------- 1 | # $(DRIVER_DIR)/usb/eth/smsc95xx.c \ 2 | $(DRIVER_DIR)/usb/eth/usb_ether.c \ 3 | $(DRIVER_DIR)/usb/host/dwc_otg.c \ 4 | $(DRIVER_DIR)/usb/host/dwc_otg-hcd.c 5 | 6 | DRIVER_SRCS = \ 7 | $(DRIVER_DIR)/gpio/gpio.c \ 8 | $(DRIVER_DIR)/timer/timer.c \ 9 | $(DRIVER_DIR)/i2c/i2c.c \ 10 | $(DRIVER_DIR)/watchdog/watchdog.c \ 11 | $(DRIVER_DIR)/mailbox/mailbox.c \ 12 | $(DRIVER_DIR)/dram/dram.c \ 13 | $(DRIVER_DIR)/mmc/mmc.c \ 14 | $(DRIVER_DIR)/mmc/sdhci.c \ 15 | $(DRIVER_DIR)/pwm/pwm.c \ 16 | $(DRIVER_DIR)/log/log.c \ 17 | $(DRIVER_DIR)/shell/shell.c \ 18 | $(DRIVER_DIR)/uart/uart.c 19 | -------------------------------------------------------------------------------- /driver/ethc/ethc.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/wuxx/sos/b76219fc39d43197c21d8866f360399ce0f8f7db/driver/ethc/ethc.c -------------------------------------------------------------------------------- /driver/gpio/gpio.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include "mmio.h" 4 | #include "log.h" 5 | #include "gpio.h" 6 | 7 | PUBLIC s32 gpio_set_function(u32 gpio_index, u32 func_index) 8 | { 9 | u32 i, fsel_addr; 10 | union gpio_fsel_reg fr; 11 | 12 | 13 | if ((gpio_index >= GPIO_NR_MAX) || func_index >= ALT_FUNC_MAX) { 14 | PRINT_EMG("invalid para %d %d\n", gpio_index, func_index); 15 | return -1; 16 | } 17 | 18 | /* which reg */ 19 | fsel_addr = GPFSEL0 + 4*(gpio_index / 10); 20 | i = gpio_index % 10; 21 | 22 | fr.value = readl(fsel_addr); 23 | #if 0 24 | PRINT_EMG("%d %x %x\n", i, fr.value, func_index); 25 | #endif 26 | switch (i) { 27 | case (0): 28 | fr.reg.fsel0 = func_index; 29 | break; 30 | case (1): 31 | fr.reg.fsel1 = func_index; 32 | break; 33 | case (2): 34 | fr.reg.fsel2 = func_index; 35 | break; 36 | case (3): 37 | fr.reg.fsel3 = func_index; 38 | break; 39 | case (4): 40 | fr.reg.fsel4 = func_index; 41 | break; 42 | case (5): 43 | fr.reg.fsel5 = func_index; 44 | break; 45 | case (6): 46 | fr.reg.fsel6 = func_index; 47 | break; 48 | case (7): 49 | fr.reg.fsel7 = func_index; 50 | break; 51 | case (8): 52 | fr.reg.fsel8 = func_index; 53 | break; 54 | case (9): 55 | fr.reg.fsel9 = func_index; 56 | break; 57 | default: 58 | break; 59 | } 60 | #if 0 61 | PRINT_EMG(" 0x%x -> [0x%x] \n", fr.value, fsel_addr); 62 | #endif 63 | writel(fsel_addr, fr.value); 64 | return 0; 65 | } 66 | 67 | PUBLIC u32 gpio_get_function(u32 gpio_index) 68 | { 69 | u32 i, fsel_addr; 70 | u32 rvalue; 71 | u32 func_index; 72 | 73 | 74 | if (gpio_index >= GPIO_NR_MAX) { 75 | PRINT_EMG("invalid para %d \n", gpio_index); 76 | return -1; 77 | } 78 | 79 | /* which reg */ 80 | fsel_addr = GPFSEL0 + 4*(gpio_index / 10); 81 | i = gpio_index % 10; 82 | 83 | rvalue = readl(fsel_addr); 84 | #if 0 85 | PRINT_EMG("%d %x %x\n", i, fr.value, func_index); 86 | #endif 87 | func_index = (rvalue >> (3 * i)) & 0x7; 88 | return func_index; 89 | } 90 | 91 | PUBLIC s32 gpio_set_output(u32 gpio_index, u32 bit) 92 | { 93 | u32 output_set_addr, output_clear_addr; 94 | u32 bit_offset; 95 | 96 | if ((gpio_index >= GPIO_NR_MAX) || bit > 1) { 97 | PRINT_EMG("invalid para %d %d\n", gpio_index, bit); 98 | return -1; 99 | } 100 | 101 | bit_offset = gpio_index % 32; 102 | output_set_addr = GPSET0 + gpio_index / 32; 103 | output_clear_addr = GPCLR0 + gpio_index / 32; 104 | 105 | /* PRINT_DEBUG("%s 0x%x 0x%x [0x%x] [0x%x]\n", __func__, bit, bit_offset, output_set_addr, output_clear_addr); */ 106 | 107 | if (bit == 0) { 108 | writel(output_clear_addr, 0x1 << bit_offset); 109 | } else { 110 | writel(output_set_addr, 0x1 << bit_offset); 111 | } 112 | 113 | return 0; 114 | } 115 | -------------------------------------------------------------------------------- /driver/i2c/i2c.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include "mmio.h" 4 | #include "log.h" 5 | #include "gpio.h" 6 | #include "i2c.h" 7 | 8 | PUBLIC s32 i2c_init() 9 | { 10 | return 0; 11 | } 12 | 13 | #if 0 14 | #define wakeup_isr(i2cp, msg) { \ 15 | chSysLockFromIsr(); \ 16 | if ((i2cp)->thread != NULL) { \ 17 | Thread *tp = (i2cp)->thread; \ 18 | (i2cp)->thread = NULL; \ 19 | tp->p_u.rdymsg = (msg); \ 20 | chSchReadyI(tp); \ 21 | } \ 22 | chSysUnlockFromIsr(); \ 23 | } 24 | #else 25 | #define wakeup_isr(i2cp, msg) 26 | #endif 27 | 28 | /** 29 | * @brief Handling of stalled I2C transactions. 30 | * 31 | * @param[in] i2cp pointer to the @p I2CDriver object 32 | * 33 | * @notapi 34 | */ 35 | static void i2c_lld_safety_timeout(void *p) 36 | { 37 | #if 0 38 | I2CDriver *i2cp = (I2CDriver *)p; 39 | chSysLockFromIsr(); 40 | if (i2cp->thread) { 41 | bscdevice_t *device = i2cp->device; 42 | 43 | i2cp->errors |= I2CD_TIMEOUT; 44 | if (device->status & BSC_CLKT) 45 | i2cp->errors |= I2CD_BUS_ERROR; 46 | if (device->status & BSC_ERR) 47 | i2cp->errors |= I2CD_ACK_FAILURE; 48 | 49 | device->control = 0; 50 | device->status = BSC_CLKT | BSC_ERR | BSC_DONE; 51 | 52 | Thread *tp = i2cp->thread; 53 | i2cp->thread = NULL; 54 | tp->p_u.rdymsg = RDY_TIMEOUT; 55 | chSchReadyI(tp); 56 | } 57 | chSysUnlockFromIsr(); 58 | #endif 59 | } 60 | 61 | /*===========================================================================*/ 62 | /* Driver interrupt handlers. */ 63 | /*===========================================================================*/ 64 | 65 | volatile u32 i2c_done = 0; 66 | s32 i2c_irq_handler(u32 arg) 67 | { 68 | I2CDriver *i2cp = (I2CDriver *)arg; 69 | bscdevice_t *device = i2cp->device; 70 | u32 status = device->status; 71 | 72 | if (status & (BSC_CLKT | BSC_ERR)) { 73 | // TODO set error flags 74 | wakeup_isr(i2cp, RDY_RESET); 75 | } 76 | else if (status & BSC_DONE) { 77 | while ((status & BSC_RXD) && (i2cp->rxidx < i2cp->rxbytes)) 78 | i2cp->rxbuf[i2cp->rxidx++] = device->dataFifo; 79 | device->control = 0; 80 | device->status = BSC_CLKT | BSC_ERR | BSC_DONE; 81 | wakeup_isr(i2cp, RDY_OK); 82 | } 83 | else if (status & BSC_TXW) { 84 | while ((i2cp->txidx < i2cp->txbytes) && (status & BSC_TXD)) 85 | device->dataFifo = i2cp->txbuf[i2cp->txidx++]; 86 | } 87 | else if (status & BSC_RXR) { 88 | while ((i2cp->rxidx < i2cp->rxbytes) && (status & BSC_RXD)) 89 | i2cp->rxbuf[i2cp->rxidx++] = device->dataFifo; 90 | } 91 | i2c_done = 1; 92 | return 0; 93 | } 94 | 95 | /*===========================================================================*/ 96 | /* Driver exported functions. */ 97 | /*===========================================================================*/ 98 | 99 | /** 100 | * @brief Low level I2C driver initialization. 101 | * 102 | * @notapi 103 | */ 104 | void i2c_lld_init(void) 105 | { 106 | request_irq(IRQ_I2C, i2c_irq_handler); 107 | enable_irq(IRQ_I2C); 108 | } 109 | 110 | /** 111 | * @brief Configures and activates the I2C peripheral. 112 | * 113 | * @param[in] i2cp pointer to the @p I2CDriver object 114 | * 115 | * @notapi 116 | */ 117 | void i2c_lld_start(I2CDriver *i2cp) 118 | { 119 | /* Set up GPIO pins for I2C */ 120 | gpio_set_function(0, ALT_FUNC_0); 121 | gpio_set_function(1, ALT_FUNC_0); 122 | 123 | u32 speed = i2cp->config->ic_speed; 124 | if (speed != 0 && speed != 100000) 125 | i2cp->device->clockDivider = BSC_CLOCK_FREQ / i2cp->config->ic_speed; 126 | 127 | i2cp->device->control |= BSC_I2CEN; 128 | } 129 | 130 | /** 131 | * @brief Deactivates the I2C peripheral. 132 | * 133 | * @param[in] i2cp pointer to the @p I2CDriver object 134 | * 135 | * @notapi 136 | */ 137 | void i2c_lld_stop(I2CDriver *i2cp) 138 | { 139 | /* Set GPIO pin function to default */ 140 | gpio_set_function(0, INPUT); 141 | gpio_set_function(1, INPUT); 142 | 143 | i2cp->device->control &= ~BSC_I2CEN; 144 | } 145 | 146 | /** 147 | * @brief Master transmission. 148 | * 149 | * @param[in] i2cp pointer to the @p I2CDriver object 150 | * @param[in] addr slave device address (7 bits) without R/W bit 151 | * @param[in] txbuf transmit data buffer pointer 152 | * @param[in] txbytes number of bytes to be transmitted 153 | * @param[out] rxbuf receive data buffer pointer 154 | * @param[in] rxbytes number of bytes to be received 155 | * @param[in] timeout the number of ticks before the operation timeouts, 156 | * the following special values are allowed: 157 | * - @a TIME_INFINITE no timeout. 158 | * . 159 | * 160 | * @notapi 161 | */ 162 | s32 i2c_lld_master_transmit_timeout(I2CDriver *i2cp, u16 addr, 163 | const u8 *txbuf, u32 txbytes, 164 | u8 *rxbuf, const u8 rxbytes, 165 | u32 timeout) 166 | { 167 | 168 | #if 0 169 | VirtualTimer vt; 170 | 171 | /* Global timeout for the whole operation.*/ 172 | if (timeout != TIME_INFINITE) 173 | chVTSetI(&vt, timeout, i2c_lld_safety_timeout, (void *)i2cp); 174 | 175 | #endif 176 | u32 status; 177 | 178 | i2cp->addr = addr; 179 | i2cp->txbuf = txbuf; 180 | i2cp->txbytes = txbytes; 181 | i2cp->txidx = 0; 182 | i2cp->rxbuf = rxbuf; 183 | i2cp->rxbytes = rxbytes; 184 | i2cp->rxidx = 0; 185 | 186 | bscdevice_t *device = i2cp->device; 187 | device->slaveAddress = addr; 188 | device->dataLength = txbytes; 189 | device->status = CLEAR_STATUS; 190 | 191 | /* Enable Interrupts and start transfer.*/ 192 | device->control |= (BSC_INTT | BSC_INTD | START_WRITE); 193 | 194 | while(i2c_done == 0); 195 | i2c_done = 0; 196 | 197 | if (rxbytes > 0) { 198 | /* The TIMEOUT_INFINITE prevents receive from setting up it's own timer.*/ 199 | status = i2c_lld_master_receive_timeout(i2cp, addr, rxbuf, 200 | rxbytes, 0); 201 | 202 | while(i2c_done == 0); 203 | i2c_done = 0; 204 | } 205 | 206 | return status; 207 | } 208 | 209 | 210 | /** 211 | * @brief Master receive. 212 | * 213 | * @param[in] i2cp pointer to the @p I2CDriver object 214 | * @param[in] addr slave device address (7 bits) without R/W bit 215 | * @param[out] rxbuf receive data buffer pointer 216 | * @param[in] rxbytes number of bytes to be received 217 | * @param[in] timeout the number of ticks before the operation timeouts, 218 | * the following special values are allowed: 219 | * - @a TIME_INFINITE no timeout. 220 | * . 221 | * 222 | * @notapi 223 | */ 224 | s32 i2c_lld_master_receive_timeout(I2CDriver *i2cp, u16 addr, 225 | u8 *rxbuf, u32 rxbytes, 226 | u32 timeout) 227 | { 228 | 229 | #if 0 230 | VirtualTimer vt; 231 | 232 | /* Global timeout for the whole operation.*/ 233 | if (timeout != TIME_INFINITE) 234 | chVTSetI(&vt, timeout, i2c_lld_safety_timeout, (void *)i2cp); 235 | #endif 236 | 237 | i2cp->addr = addr; 238 | i2cp->txbuf = NULL; 239 | i2cp->txbytes = 0; 240 | i2cp->txidx = 0; 241 | i2cp->rxbuf = rxbuf; 242 | i2cp->rxbytes = rxbytes; 243 | i2cp->rxidx = 0; 244 | 245 | /* Setup device.*/ 246 | bscdevice_t *device = i2cp->device; 247 | device->slaveAddress = addr; 248 | device->dataLength = rxbytes; 249 | device->status = CLEAR_STATUS; 250 | 251 | /* Enable Interrupts and start transfer.*/ 252 | device->control = (BSC_INTR | BSC_INTD | START_READ); 253 | 254 | while(i2c_done == 0); 255 | i2c_done = 0; 256 | return 0; 257 | } 258 | -------------------------------------------------------------------------------- /driver/log/log.c: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | #include "log.h" 4 | #include "int.h" 5 | #include "uart.h" 6 | 7 | PRIVATE u32 default_log_level = LOG_INFO; 8 | 9 | u8 log_buffer[64*1024] = {0}; 10 | u32 lbindex = 0; 11 | 12 | u32 is_printable(u8 c) 13 | { 14 | /* man ascii */ 15 | if (c == '\n') { 16 | return 1; 17 | } 18 | 19 | if (c >= 32 && c <= 126) { 20 | return 1; 21 | } else { 22 | return 0; 23 | } 24 | } 25 | 26 | void dumpb(void *buf, u32 size) 27 | { 28 | #if 0 29 | u32 i, j; 30 | u32 line_nr; 31 | u8 *b = (u8 *)buf; 32 | 33 | char sbuf[3]; 34 | char cbuf[17]; 35 | 36 | line_nr = size / 16; 37 | 38 | uart_printf("[%X]:", b); 39 | 40 | for(i = 0; i < line_nr; i++) { 41 | 42 | for (j = 0; j < 16; j++) { 43 | snprintf(sbuf, sizeof(sbuf), "%x", b[16*i + j]); 44 | /* PRINT_EMG("%x ", b[16*i + j]); */ 45 | 46 | /* it's ugly, but I don't wanna let vsnprintf process the format string like %02x, which will make code more complicate */ 47 | if (strlen(sbuf) == 1) { 48 | sbuf[1] = sbuf[0]; 49 | sbuf[0] = '0'; 50 | sbuf[2] = '\0'; 51 | } 52 | 53 | uart_printf("%s ", sbuf); 54 | 55 | if (is_printable(b[16*i + j])) { 56 | cbuf[j] = b[16*i + j]; 57 | } else { 58 | cbuf[j] = '.'; 59 | } 60 | } 61 | 62 | cbuf[j] = '\0'; 63 | 64 | uart_printf(" %s\n[%X]:", cbuf, &b[16*i + j]); 65 | } 66 | #else 67 | u32 i; 68 | u8 *b = (u8 *)buf; 69 | 70 | for (i = 0; i < size; i++) { 71 | if (is_printable(b[i])) { 72 | uart_printf("%c", b[i]); 73 | } else { 74 | uart_printf("."); 75 | } 76 | 77 | } 78 | uart_printf("\n\n"); 79 | #endif 80 | } 81 | 82 | PUBLIC s32 set_log_level(u32 log_level) 83 | { 84 | if ((log_level >= LOG_EMG) && (log_level <= LOG_DEBUG)) { 85 | default_log_level = log_level; 86 | return OK; 87 | } else { 88 | return EINVAL; 89 | } 90 | 91 | return 0; 92 | } 93 | 94 | PUBLIC s32 log(u32 log_level, const char *format, ...) 95 | { 96 | u32 len; 97 | va_list args; 98 | char format_buf[FORMAT_BUF_SIZE] = {0}; 99 | 100 | va_start(args, format); 101 | len = vsnprintf(format_buf, sizeof(format_buf), format, args); 102 | va_end(args); 103 | 104 | if (log_level <= default_log_level) { 105 | /*lock_irq(); */ 106 | uart_puts(format_buf); 107 | /*unlock_irq();*/ 108 | } 109 | 110 | if ((len + 1) >= (sizeof(log_buffer) - (lbindex))) { 111 | lbindex = 0; /* we don't use the last slot even it is enough. just keep simple */ 112 | } 113 | 114 | memcpy(&log_buffer[lbindex], format_buf, len + 1); 115 | lbindex += len + 1; 116 | 117 | return OK; 118 | } 119 | 120 | PUBLIC s32 dump_log() 121 | { 122 | dumpb(log_buffer, sizeof(log_buffer)); 123 | return 0; 124 | } 125 | -------------------------------------------------------------------------------- /driver/mailbox/mailbox.c: -------------------------------------------------------------------------------- 1 | /* 2 | * (C) Copyright 2012 Stephen Warren 3 | * 4 | * See file CREDITS for list of people who contributed to this 5 | * project. 6 | * 7 | * This program is free software; you can redistribute it and/or 8 | * modify it under the terms of the GNU General Public License as 9 | * published by the Free Software Foundation; either version 2 of 10 | * the License, or (at your option) any later version. 11 | * 12 | * This program is distributed in the hope that it will be useful, 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 | * GNU General Public License for more details. 16 | */ 17 | 18 | #include 19 | #include "log.h" 20 | #include "timer.h" 21 | #include "mailbox.h" 22 | 23 | #define TIMEOUT (100 * 1000) /* 100mS in uS */ 24 | 25 | static s32 read_reg() 26 | { 27 | struct bcm2835_mbox_regs *regs = 28 | (struct bcm2835_mbox_regs *)BCM2835_MBOX_PHYSADDR; 29 | 30 | readl((u32)(&(regs->read))); 31 | return 0; 32 | } 33 | 34 | int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv) 35 | { 36 | struct bcm2835_mbox_regs *regs = 37 | (struct bcm2835_mbox_regs *)BCM2835_MBOX_PHYSADDR; 38 | u32 val; 39 | 40 | if (send & BCM2835_CHAN_MASK) { 41 | PRINT_ERR("mbox: Illegal mbox data 0x%x\n", send); 42 | return -1; 43 | } 44 | 45 | /* Drain any stale responses */ 46 | 47 | if (wait_value(®s->status, BCM2835_MBOX_STATUS_RD_EMPTY, 1, 100, read_reg) == -1) { 48 | PRINT_ERR("mbox: Timeout draining stale responses\n"); 49 | return -1; 50 | } 51 | 52 | /* Wait for space to send */ 53 | if (readl((u32)(®s->status)) & BCM2835_MBOX_STATUS_WR_FULL) { 54 | PRINT_ERR("mbox: Timeout waiting for send space\n"); 55 | return -1; 56 | } 57 | 58 | /* Send the request */ 59 | 60 | val = BCM2835_MBOX_PACK(chan, send); 61 | PRINT_ERR("mbox: TX raw: 0x%x\n", val); 62 | writel((u32)(®s->write), val); 63 | 64 | /* Wait for the response */ 65 | if (wait_value(®s->status, BCM2835_MBOX_STATUS_RD_EMPTY, 0, 100, NULL) == -1) { 66 | PRINT_ERR("mbox: Timeout waiting for response\n"); 67 | return -1; 68 | } 69 | 70 | /* Read the response */ 71 | 72 | val = readl((u32)(®s->read)); 73 | PRINT_ERR("mbox: RX raw: 0x%x\n", val); 74 | 75 | /* Validate the response */ 76 | 77 | if (BCM2835_MBOX_UNPACK_CHAN(val) != chan) { 78 | PRINT_ERR("mbox: Response channel mismatch\n"); 79 | return -1; 80 | } 81 | 82 | *recv = BCM2835_MBOX_UNPACK_DATA(val); 83 | 84 | return 0; 85 | } 86 | 87 | #ifdef DEBUG 88 | void dump_buf(struct bcm2835_mbox_hdr *buffer) 89 | { 90 | u32 *p; 91 | u32 words; 92 | int i; 93 | 94 | p = (u32 *)buffer; 95 | words = buffer->buf_size / 4; 96 | for (i = 0; i < words; i++) 97 | PRINT_ERR(" 0x%x: 0x%x\n", i * 4, p[i]); 98 | } 99 | #endif 100 | 101 | int bcm2835_mbox_call_prop(u32 chan, struct bcm2835_mbox_hdr *buffer) 102 | { 103 | int ret; 104 | u32 rbuffer; 105 | struct bcm2835_mbox_tag_hdr *tag; 106 | int tag_index; 107 | 108 | #ifdef DEBUG 109 | PRINT_ERR("mbox: TX buffer\n"); 110 | dump_buf(buffer); 111 | #endif 112 | 113 | ret = bcm2835_mbox_call_raw(chan, (u32)buffer, &rbuffer); 114 | if (ret) 115 | return ret; 116 | if (rbuffer != (u32)buffer) { 117 | PRINT_ERR("mbox: Response buffer mismatch (0x%x 0x%x)\n", rbuffer, buffer); 118 | return -1; 119 | } 120 | 121 | #ifdef DEBUG 122 | PRINT_ERR("mbox: RX buffer\n"); 123 | dump_buf(buffer); 124 | #endif 125 | 126 | /* Validate overall response status */ 127 | 128 | if (buffer->code != BCM2835_MBOX_RESP_CODE_SUCCESS) { 129 | PRINT_ERR("mbox: Header response code invalid\n"); 130 | return -1; 131 | } 132 | 133 | /* Validate each tag's response status */ 134 | 135 | tag = (void *)(buffer + 1); 136 | tag_index = 0; 137 | while (tag->tag) { 138 | if (!(tag->val_len & BCM2835_MBOX_TAG_VAL_LEN_RESPONSE)) { 139 | PRINT_ERR("mbox: Tag %d missing val_len response bit\n", 140 | tag_index); 141 | return -1; 142 | } 143 | /* 144 | * Clear the reponse bit so clients can just look right at the 145 | * length field without extra processing 146 | */ 147 | tag->val_len &= ~BCM2835_MBOX_TAG_VAL_LEN_RESPONSE; 148 | tag = (void *)(((u8 *)tag) + sizeof(*tag) + tag->val_buf_size); 149 | tag_index++; 150 | } 151 | 152 | return 0; 153 | } 154 | -------------------------------------------------------------------------------- /driver/pwm/pwm.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include "gpio.h" 3 | #include "timer.h" 4 | #include "pwm.h" 5 | 6 | PUBLIC void pwm_init(void) 7 | { 8 | return; 9 | } 10 | 11 | PUBLIC void pwm_start(u32 period) 12 | { 13 | /* Set PWM pin function.*/ 14 | gpio_set_function(18, ALT_FUNC_5); 15 | 16 | /* Stop PWM.*/ 17 | writel(PWM_CTL, 0); 18 | 19 | /* Disable clock generator (reset bit 4).*/ 20 | writel(GPIO0_CLK_CTL, GPIO_CLK_PWD | 0x01); 21 | mdelay(110); 22 | 23 | /* Wait for clock to be !BUSY.*/ 24 | while ((readl(GPIO0_CLK_CTL) & 0x80) != 0); 25 | 26 | /* set pwm div to 32 (19.2/32 = 600KHz).*/ 27 | writel(GPIO0_CLK_DIV, GPIO_CLK_PWD | (32 << 12)); 28 | 29 | /* enable clock generator.*/ 30 | writel(GPIO0_CLK_CTL, GPIO_CLK_PWD | 0x11); 31 | 32 | /* N/M -- N = DATA, M = RANGE.*/ 33 | /* M/S -- M = DATA, S = RANGE.*/ 34 | writel(PWM0_DATA, 0); 35 | writel(PWM0_RANGE, period); 36 | 37 | } 38 | 39 | PUBLIC void pwm_stop() 40 | { 41 | writel(PWM_CTL, ~PWM0_ENABLE); 42 | } 43 | 44 | PUBLIC void pwm_set_period(u32 period) 45 | { 46 | writel(PWM0_RANGE, period); 47 | } 48 | 49 | PUBLIC void pwm_enable_channel(u8 channel, u32 width) 50 | { 51 | writel(PWM_CTL, readl(PWM_CTL) | PWM0_ENABLE); 52 | writel(PWM0_DATA, width); 53 | } 54 | 55 | PUBLIC void pwm_disable_channel(u8 channel) 56 | { 57 | writel(PWM_CTL, readl(PWM_CTL) & ~PWM0_ENABLE); 58 | } 59 | -------------------------------------------------------------------------------- /driver/shell/shell.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | 4 | #include "uart.h" 5 | #include "log.h" 6 | #include "mmio.h" 7 | #include "shell.h" 8 | #include "systest.h" 9 | 10 | u32 argc; 11 | char *argv[SHELL_ARGS_MAX] = {NULL}; 12 | 13 | s32 cmd_read(); 14 | s32 cmd_write(); 15 | s32 cmd_exec(); 16 | s32 cmd_dump(); 17 | s32 cmd_help(); 18 | s32 cmd_systest(); 19 | s32 cmd_panic(); 20 | s32 cmd_reset(); 21 | 22 | struct shell_cmd_info ci[] = { 23 | { .name = "r", .func = cmd_read, .desc = "r [addr] read any addr"}, 24 | { .name = "w", .func = cmd_write, .desc = "w [addr] [data] write any addr"}, 25 | { .name = "x", .func = cmd_exec, .desc = "x [addr] execute any addr"}, 26 | { .name = "dump", .func = cmd_dump, .desc = "dump [addr] [word_num] dump any addr"}, 27 | { .name = "panic", .func = cmd_panic, .desc = "panic system panic" }, 28 | { .name = "reset", .func = cmd_reset, .desc = "reset system reset" }, 29 | { .name = "systest", .func = cmd_systest, .desc = "systest [module] [i] system test" }, 30 | { .name = "help", .func = cmd_help, .desc = "help print cmd info" }, 31 | }; 32 | 33 | 34 | PRIVATE s32 cmd_read() 35 | { 36 | u32 addr; 37 | u32 data; 38 | 39 | addr = atoi(argv[1]); 40 | data = readl(addr); 41 | PRINT_EMG("[0x%x]: 0x%x\n", addr, data); 42 | return 0; 43 | } 44 | 45 | PRIVATE s32 cmd_write() 46 | { 47 | u32 addr, data; 48 | 49 | addr = atoi(argv[1]); 50 | data = atoi(argv[2]); 51 | 52 | writel(addr, data); 53 | PRINT_EMG("(0x%x) ->[0x%x]\n", data, addr); 54 | return 0; 55 | } 56 | 57 | PRIVATE s32 cmd_exec() 58 | { 59 | s32 ret; 60 | u32 addr, para1, para2, para3, para4; 61 | func_4 func; 62 | 63 | addr = atoi(argv[1]); 64 | para1 = atoi(argv[2]); 65 | para2 = atoi(argv[3]); 66 | para3 = atoi(argv[4]); 67 | para4 = atoi(argv[5]); 68 | 69 | func = (func_4)(addr | 0x1); /* thumb-2 instruction */ 70 | 71 | ret = func(para1, para2, para3, para4); 72 | PRINT_EMG("execute 0x%x (0x%x 0x%x 0x%x 0x%x) return 0x%x\n", addr, para1, para2, para3, para4, ret); 73 | return ret; 74 | } 75 | 76 | PRIVATE s32 cmd_dump() 77 | { 78 | u32 i; 79 | u32 *p; 80 | u32 addr, word_nr; 81 | 82 | addr = atoi(argv[1]); 83 | word_nr = atoi(argv[2]); 84 | p = (u32*)addr; 85 | 86 | for(i=0;i 2 | #include 3 | #include 4 | #include 5 | 6 | #include "log.h" 7 | #include "timer.h" 8 | 9 | /* increment syscounter */ 10 | PUBLIC u64 get_syscounter() 11 | { 12 | #if 0 13 | u64 sc; 14 | u64 clo, chi; 15 | clo = readl(SYSTMCLO); 16 | chi = readl(SYSTMCHI); 17 | sc = (chi << 32) | clo; 18 | return sc; 19 | #endif 20 | return readl(SYSTMCLO); 21 | } 22 | 23 | PUBLIC void udelay(u32 us) 24 | { 25 | u64 sc_start, sc_end; 26 | u32 ticks; 27 | 28 | us = us > 1000 ? 1000 : us; /* max of 1ms */ 29 | ticks = US2TICK(us); 30 | 31 | sc_start = get_syscounter(); 32 | sc_end = get_syscounter(); 33 | 34 | while ((sc_end - sc_start) < ticks) { 35 | sc_end = get_syscounter(); 36 | } 37 | 38 | } 39 | 40 | PUBLIC void mdelay(u32 ms) 41 | { 42 | u64 sc_start, sc_end; 43 | u64 ticks; 44 | 45 | ms = ms > 100000 ? 100000 : ms; /* max of 100s */ 46 | ticks = MS2TICK(ms); 47 | 48 | sc_start = get_syscounter(); 49 | sc_end = get_syscounter(); 50 | 51 | while ((sc_end - sc_start) < ticks) { 52 | sc_end = get_syscounter(); 53 | } 54 | 55 | } 56 | 57 | PUBLIC void clk_delay(u32 count) { 58 | asm volatile("__delay_%=: subs %[count], %[count], #1; bne __delay_%=\n" 59 | : 60 | : [count]"r"(count) 61 | : "cc"); 62 | } 63 | 64 | PUBLIC s32 wait_value(u32 *addr, u32 value, u32 type, u32 timeout_us, func_0 func) 65 | { 66 | u32 count = 0; 67 | u32 mask = value; 68 | 69 | while (1) { 70 | 71 | if (type == 0) { 72 | if ((readl((u32)addr) & mask) != value) { 73 | return 0; 74 | } 75 | } else { 76 | if ((readl((u32)addr) & mask) == value) { 77 | return 0; 78 | } 79 | } 80 | 81 | if (count == timeout_us) { 82 | break; 83 | } 84 | 85 | if (func != NULL) { 86 | func(); 87 | } 88 | 89 | udelay(1); 90 | count++; 91 | 92 | } 93 | 94 | return -1; 95 | 96 | } 97 | 98 | PUBLIC s32 timer_init() 99 | { 100 | return 0; 101 | } 102 | -------------------------------------------------------------------------------- /driver/uart/uart.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | 4 | #include "mmio.h" 5 | #include "uart.h" 6 | #include "shell.h" 7 | #include "gpio.h" 8 | #include "timer.h" 9 | 10 | #define UART_PL011 /* pl011 uart */ 11 | 12 | #define UART_IO_SIZE 256 13 | 14 | PRIVATE u32 uart_recv_buf_index = 0; 15 | PRIVATE char uart_recv_buf[UART_IO_SIZE] = {0}; 16 | 17 | PUBLIC void uart_wait_fifo_empty() 18 | { 19 | while(1) { 20 | if ((readl(UART0_FR) & (1 << 7))) { 21 | break; 22 | } 23 | } 24 | } 25 | 26 | PUBLIC void uart_putc(u8 byte) { 27 | // wait for UART to become ready to transmit 28 | while (1) { 29 | if (!(readl(UART0_FR) & (1 << 5))) { 30 | break; 31 | } 32 | } 33 | writel(UART0_DR, byte); 34 | uart_wait_fifo_empty(); 35 | } 36 | 37 | PUBLIC void uart_puts(const char *str) { 38 | while (*str) { 39 | if (*str == '\n') { 40 | uart_putc('\r'); 41 | uart_putc('\n'); 42 | str++; 43 | } 44 | else { 45 | uart_putc(*str++); 46 | } 47 | } 48 | } 49 | 50 | PRIVATE s8 uart_recv() 51 | { 52 | 53 | if ((readl(UART0_FR) & (1 << 4)) == 0) { /* if RX FIFO not empty */ 54 | return readl(UART0_DR); 55 | } else { 56 | return 0; 57 | } 58 | } 59 | 60 | PRIVATE s32 uart_irq_handler(u32 irq_nr) 61 | { 62 | u8 ch; 63 | u32 raw_status; 64 | 65 | /* handle one character */ 66 | while((ch = uart_recv())) { 67 | /* uart_printf("recv [%x][%c] \n", ch, ch); */ 68 | if (ch == '\n') { /* sscom will send '\r\n' we ignore the '\n' */ 69 | continue; 70 | } 71 | if (uart_recv_buf_index == (UART_IO_SIZE - 1) && ch != '\r') { 72 | uart_puts("cmd too long!\n"); 73 | uart_recv_buf_index = 0; 74 | return EINVAL; 75 | 76 | } 77 | 78 | if (ch == '\r') { 79 | uart_recv_buf[uart_recv_buf_index] = '\0'; /* terminate the string. */ 80 | shell(uart_recv_buf); 81 | 82 | uart_recv_buf_index = 0; 83 | uart_puts("\nsos>"); 84 | break; 85 | } else { 86 | uart_recv_buf[uart_recv_buf_index] = ch; 87 | uart_recv_buf_index++; 88 | } 89 | 90 | 91 | /* echo */ 92 | if (ch == '\r') { 93 | uart_putc('\r'); 94 | uart_putc('\n'); 95 | } else { 96 | uart_putc(ch); 97 | } 98 | } 99 | 100 | raw_status = readl(UART0_RIS); 101 | if ((raw_status >> 7) & 0xf) { 102 | uart_printf("uart error %x \n", raw_status); 103 | writel(UART0_ICR, 0xFFFFFFFF); 104 | } 105 | 106 | writel(UART0_ICR, 1 << 4); 107 | 108 | return 0; 109 | } 110 | 111 | PUBLIC s32 uart_printf(const char *format, ...) 112 | { 113 | u32 len; 114 | va_list args; 115 | static char format_buf[UART_IO_SIZE] = {0}; 116 | 117 | va_start(args, format); 118 | len = vsnprintf(format_buf, sizeof(format_buf), format, args); 119 | va_end(args); 120 | 121 | uart_puts(format_buf); 122 | 123 | return len; 124 | } 125 | 126 | PUBLIC void uart_init() 127 | { 128 | 129 | // Setup the GPIO pin 14 && 15. 130 | gpio_set_function(14, ALT_FUNC_0); 131 | gpio_set_function(15, ALT_FUNC_0); 132 | 133 | // Disable PL011_UART. 134 | writel(UART0_CR, 0x00000000); 135 | 136 | // Disable pull up/down for all GPIO pins & delay for 150 cycles. 137 | writel(GPPUD, 0x00000000); 138 | clk_delay(150); 139 | 140 | // Disable pull up/down for pin 14,15 & delay for 150 cycles. 141 | writel(GPPUDCLK0, (1 << 14) | (1 << 15)); 142 | clk_delay(150); 143 | 144 | // Write 0 to GPPUDCLK0 to make it take effect. 145 | writel(GPPUDCLK0, 0x00000000); 146 | 147 | // Clear pending interrupts. 148 | writel(UART0_ICR, 0x7FF); 149 | 150 | // Set integer & fractional part of baud rate. 151 | // Divider = UART_CLOCK/(16 * Baud) 152 | // Fraction part register = (Fractional part * 64) + 0.5 153 | // UART_CLOCK = 3000000; Baud = 115200. 154 | 155 | /* uart clk: 3000000 */ 156 | // Divider = 3000000/(16 * 115200) = 1.627 = ~1. 157 | // Fractional part register = (.627 * 64) + 0.5 = 40.6 = ~40. 158 | writel(UART0_IBRD, 1); 159 | writel(UART0_FBRD, 40); 160 | 161 | // Enable FIFO & 8 bit data transmissio (1 stop bit, no parity). 162 | writel(UART0_LCRH, (1 << 4) | (1 << 5) | (1 << 6)); 163 | // Disable FIFO & 8 bit data transmissio (1 stop bit, no parity). 164 | /* writel(UART0_LCRH, (0 << 4) | (1 << 5) | (1 << 6)); */ 165 | 166 | // Mask all interrupts. 167 | #if 0 168 | writel(UART0_IMSC, 0xFFFFFFFF); 169 | #else 170 | writel(UART0_IMSC, (1 << 1) | (1 << 4) | 171 | (1 << 6) | (1 << 7) | (1 << 8) | 172 | (1 << 9) | (1 << 10)); 173 | #endif 174 | 175 | // Enable UART, receive & transfer part of UART. 176 | writel(UART0_CR, (1 << 0) | (1 << 8) | (1 << 9)); 177 | 178 | request_irq(IRQ_UART, uart_irq_handler); 179 | enable_irq(IRQ_UART); 180 | } 181 | -------------------------------------------------------------------------------- /driver/usb/eth/.depend: -------------------------------------------------------------------------------- 1 | usb_ether.o: usb_ether.c /home/pi/share/oss/u-boot-pi/include/common.h \ 2 | /home/pi/share/oss/u-boot-pi/include/config.h \ 3 | /home/pi/share/oss/u-boot-pi/include/config_cmd_defaults.h \ 4 | /home/pi/share/oss/u-boot-pi/include/config_defaults.h \ 5 | /home/pi/share/oss/u-boot-pi/include/configs/rpi_b.h \ 6 | /home/pi/share/oss/u-boot-pi/include/asm/sizes.h \ 7 | /home/pi/share/oss/u-boot-pi/include/config_cmd_default.h \ 8 | /home/pi/share/oss/u-boot-pi/include/asm/config.h \ 9 | /home/pi/share/oss/u-boot-pi/include/config_fallbacks.h \ 10 | /home/pi/share/oss/u-boot-pi/include/config_uncmd_spl.h \ 11 | /home/pi/share/oss/u-boot-pi/include/asm-offsets.h \ 12 | /home/pi/share/oss/u-boot-pi/include/generated/generic-asm-offsets.h \ 13 | /home/pi/share/oss/u-boot-pi/include/linux/bitops.h \ 14 | /home/pi/share/oss/u-boot-pi/include/asm/types.h \ 15 | /home/pi/share/oss/u-boot-pi/include/asm/bitops.h \ 16 | /home/pi/share/oss/u-boot-pi/include/asm/proc/system.h \ 17 | /home/pi/share/oss/u-boot-pi/include/linux/config.h \ 18 | /home/pi/share/oss/u-boot-pi/include/linux/types.h \ 19 | /home/pi/share/oss/u-boot-pi/include/linux/posix_types.h \ 20 | /home/pi/share/oss/u-boot-pi/include/linux/stddef.h \ 21 | /home/pi/share/oss/u-boot-pi/include/asm/posix_types.h \ 22 | /home/pi/share/oss/u-boot-pi/include/linux/string.h \ 23 | /home/pi/share/oss/u-boot-pi/include/asm/string.h \ 24 | /home/pi/share/oss/u-boot-pi/include/linux/stringify.h \ 25 | /home/pi/share/oss/u-boot-pi/include/asm/ptrace.h \ 26 | /home/pi/share/oss/u-boot-pi/include/asm/proc/ptrace.h \ 27 | /usr/lib/gcc/arm-linux-gnueabihf/4.6/include/stdarg.h \ 28 | /home/pi/share/oss/u-boot-pi/include/part.h \ 29 | /home/pi/share/oss/u-boot-pi/include/ide.h \ 30 | /home/pi/share/oss/u-boot-pi/include/flash.h \ 31 | /home/pi/share/oss/u-boot-pi/include/image.h \ 32 | /home/pi/share/oss/u-boot-pi/include/compiler.h \ 33 | /usr/lib/gcc/arm-linux-gnueabihf/4.6/include/stddef.h \ 34 | /home/pi/share/oss/u-boot-pi/include/asm/byteorder.h \ 35 | /home/pi/share/oss/u-boot-pi/include/linux/byteorder/little_endian.h \ 36 | /home/pi/share/oss/u-boot-pi/include/linux/compiler.h \ 37 | /home/pi/share/oss/u-boot-pi/include/linux/compiler-gcc.h \ 38 | /home/pi/share/oss/u-boot-pi/include/linux/compiler-gcc4.h \ 39 | /home/pi/share/oss/u-boot-pi/include/linux/byteorder/swab.h \ 40 | /home/pi/share/oss/u-boot-pi/include/linux/byteorder/generic.h \ 41 | /home/pi/share/oss/u-boot-pi/include/lmb.h \ 42 | /home/pi/share/oss/u-boot-pi/include/asm/u-boot.h \ 43 | /home/pi/share/oss/u-boot-pi/include/command.h \ 44 | /home/pi/share/oss/u-boot-pi/include/linker_lists.h \ 45 | /home/pi/share/oss/u-boot-pi/include/asm/global_data.h \ 46 | /home/pi/share/oss/u-boot-pi/include/asm-generic/global_data_flags.h \ 47 | /home/pi/share/oss/u-boot-pi/include/asm/mach-types.h \ 48 | /home/pi/share/oss/u-boot-pi/include/asm/setup.h \ 49 | /home/pi/share/oss/u-boot-pi/include/asm/u-boot-arm.h \ 50 | /home/pi/share/oss/u-boot-pi/include/vsprintf.h \ 51 | /home/pi/share/oss/u-boot-pi/include/u-boot/crc.h \ 52 | /home/pi/share/oss/u-boot-pi/include/net.h \ 53 | /home/pi/share/oss/u-boot-pi/include/asm/cache.h \ 54 | /home/pi/share/oss/u-boot-pi/include/asm/system.h \ 55 | /home/pi/share/oss/u-boot-pi/include/iomux.h \ 56 | /home/pi/share/oss/u-boot-pi/include/stdio_dev.h \ 57 | /home/pi/share/oss/u-boot-pi/include/linux/list.h \ 58 | /home/pi/share/oss/u-boot-pi/include/linux/poison.h \ 59 | /home/pi/share/oss/u-boot-pi/include/bootstage.h \ 60 | /home/pi/share/oss/u-boot-pi/include/usb.h \ 61 | /home/pi/share/oss/u-boot-pi/include/usb_defs.h \ 62 | /home/pi/share/oss/u-boot-pi/include/usbdescriptors.h \ 63 | /home/pi/share/oss/u-boot-pi/include/usb_ether.h 64 | smsc95xx.o: smsc95xx.c \ 65 | /home/pi/share/oss/u-boot-pi/include/asm/unaligned.h \ 66 | /home/pi/share/oss/u-boot-pi/include/linux/unaligned/le_byteshift.h \ 67 | /home/pi/share/oss/u-boot-pi/include/linux/types.h \ 68 | /home/pi/share/oss/u-boot-pi/include/linux/config.h \ 69 | /home/pi/share/oss/u-boot-pi/include/linux/posix_types.h \ 70 | /home/pi/share/oss/u-boot-pi/include/linux/stddef.h \ 71 | /home/pi/share/oss/u-boot-pi/include/asm/posix_types.h \ 72 | /home/pi/share/oss/u-boot-pi/include/asm/types.h \ 73 | /home/pi/share/oss/u-boot-pi/include/linux/unaligned/be_byteshift.h \ 74 | /home/pi/share/oss/u-boot-pi/include/linux/unaligned/generic.h \ 75 | /home/pi/share/oss/u-boot-pi/include/common.h \ 76 | /home/pi/share/oss/u-boot-pi/include/config.h \ 77 | /home/pi/share/oss/u-boot-pi/include/config_cmd_defaults.h \ 78 | /home/pi/share/oss/u-boot-pi/include/config_defaults.h \ 79 | /home/pi/share/oss/u-boot-pi/include/configs/rpi_b.h \ 80 | /home/pi/share/oss/u-boot-pi/include/asm/sizes.h \ 81 | /home/pi/share/oss/u-boot-pi/include/config_cmd_default.h \ 82 | /home/pi/share/oss/u-boot-pi/include/asm/config.h \ 83 | /home/pi/share/oss/u-boot-pi/include/config_fallbacks.h \ 84 | /home/pi/share/oss/u-boot-pi/include/config_uncmd_spl.h \ 85 | /home/pi/share/oss/u-boot-pi/include/asm-offsets.h \ 86 | /home/pi/share/oss/u-boot-pi/include/generated/generic-asm-offsets.h \ 87 | /home/pi/share/oss/u-boot-pi/include/linux/bitops.h \ 88 | /home/pi/share/oss/u-boot-pi/include/asm/bitops.h \ 89 | /home/pi/share/oss/u-boot-pi/include/asm/proc/system.h \ 90 | /home/pi/share/oss/u-boot-pi/include/linux/string.h \ 91 | /home/pi/share/oss/u-boot-pi/include/asm/string.h \ 92 | /home/pi/share/oss/u-boot-pi/include/linux/stringify.h \ 93 | /home/pi/share/oss/u-boot-pi/include/asm/ptrace.h \ 94 | /home/pi/share/oss/u-boot-pi/include/asm/proc/ptrace.h \ 95 | /usr/lib/gcc/arm-linux-gnueabihf/4.6/include/stdarg.h \ 96 | /home/pi/share/oss/u-boot-pi/include/part.h \ 97 | /home/pi/share/oss/u-boot-pi/include/ide.h \ 98 | /home/pi/share/oss/u-boot-pi/include/flash.h \ 99 | /home/pi/share/oss/u-boot-pi/include/image.h \ 100 | /home/pi/share/oss/u-boot-pi/include/compiler.h \ 101 | /usr/lib/gcc/arm-linux-gnueabihf/4.6/include/stddef.h \ 102 | /home/pi/share/oss/u-boot-pi/include/asm/byteorder.h \ 103 | /home/pi/share/oss/u-boot-pi/include/linux/byteorder/little_endian.h \ 104 | /home/pi/share/oss/u-boot-pi/include/linux/compiler.h \ 105 | /home/pi/share/oss/u-boot-pi/include/linux/compiler-gcc.h \ 106 | /home/pi/share/oss/u-boot-pi/include/linux/compiler-gcc4.h \ 107 | /home/pi/share/oss/u-boot-pi/include/linux/byteorder/swab.h \ 108 | /home/pi/share/oss/u-boot-pi/include/linux/byteorder/generic.h \ 109 | /home/pi/share/oss/u-boot-pi/include/lmb.h \ 110 | /home/pi/share/oss/u-boot-pi/include/asm/u-boot.h \ 111 | /home/pi/share/oss/u-boot-pi/include/command.h \ 112 | /home/pi/share/oss/u-boot-pi/include/linker_lists.h \ 113 | /home/pi/share/oss/u-boot-pi/include/asm/global_data.h \ 114 | /home/pi/share/oss/u-boot-pi/include/asm-generic/global_data_flags.h \ 115 | /home/pi/share/oss/u-boot-pi/include/asm/mach-types.h \ 116 | /home/pi/share/oss/u-boot-pi/include/asm/setup.h \ 117 | /home/pi/share/oss/u-boot-pi/include/asm/u-boot-arm.h \ 118 | /home/pi/share/oss/u-boot-pi/include/vsprintf.h \ 119 | /home/pi/share/oss/u-boot-pi/include/u-boot/crc.h \ 120 | /home/pi/share/oss/u-boot-pi/include/net.h \ 121 | /home/pi/share/oss/u-boot-pi/include/asm/cache.h \ 122 | /home/pi/share/oss/u-boot-pi/include/asm/system.h \ 123 | /home/pi/share/oss/u-boot-pi/include/iomux.h \ 124 | /home/pi/share/oss/u-boot-pi/include/stdio_dev.h \ 125 | /home/pi/share/oss/u-boot-pi/include/linux/list.h \ 126 | /home/pi/share/oss/u-boot-pi/include/linux/poison.h \ 127 | /home/pi/share/oss/u-boot-pi/include/bootstage.h \ 128 | /home/pi/share/oss/u-boot-pi/include/usb.h \ 129 | /home/pi/share/oss/u-boot-pi/include/usb_defs.h \ 130 | /home/pi/share/oss/u-boot-pi/include/usbdescriptors.h \ 131 | /home/pi/share/oss/u-boot-pi/include/linux/mii.h \ 132 | /home/pi/share/oss/u-boot-pi/include/usb_ether.h \ 133 | /home/pi/share/oss/u-boot-pi/include/malloc.h 134 | -------------------------------------------------------------------------------- /driver/usb/eth/.depend.smsc95xx: -------------------------------------------------------------------------------- 1 | smsc95xx.o: smsc95xx.c \ 2 | /home/pi/share/oss/u-boot-pi/include/asm/unaligned.h \ 3 | /home/pi/share/oss/u-boot-pi/include/linux/unaligned/le_byteshift.h \ 4 | /home/pi/share/oss/u-boot-pi/include/linux/types.h \ 5 | /home/pi/share/oss/u-boot-pi/include/linux/config.h \ 6 | /home/pi/share/oss/u-boot-pi/include/linux/posix_types.h \ 7 | /home/pi/share/oss/u-boot-pi/include/linux/stddef.h \ 8 | /home/pi/share/oss/u-boot-pi/include/asm/posix_types.h \ 9 | /home/pi/share/oss/u-boot-pi/include/asm/types.h \ 10 | /home/pi/share/oss/u-boot-pi/include/linux/unaligned/be_byteshift.h \ 11 | /home/pi/share/oss/u-boot-pi/include/linux/unaligned/generic.h \ 12 | /home/pi/share/oss/u-boot-pi/include/common.h \ 13 | /home/pi/share/oss/u-boot-pi/include/config.h \ 14 | /home/pi/share/oss/u-boot-pi/include/config_cmd_defaults.h \ 15 | /home/pi/share/oss/u-boot-pi/include/config_defaults.h \ 16 | /home/pi/share/oss/u-boot-pi/include/configs/rpi_b.h \ 17 | /home/pi/share/oss/u-boot-pi/include/asm/sizes.h \ 18 | /home/pi/share/oss/u-boot-pi/include/config_cmd_default.h \ 19 | /home/pi/share/oss/u-boot-pi/include/asm/config.h \ 20 | /home/pi/share/oss/u-boot-pi/include/config_fallbacks.h \ 21 | /home/pi/share/oss/u-boot-pi/include/config_uncmd_spl.h \ 22 | /home/pi/share/oss/u-boot-pi/include/asm-offsets.h \ 23 | /home/pi/share/oss/u-boot-pi/include/generated/generic-asm-offsets.h \ 24 | /home/pi/share/oss/u-boot-pi/include/linux/bitops.h \ 25 | /home/pi/share/oss/u-boot-pi/include/asm/bitops.h \ 26 | /home/pi/share/oss/u-boot-pi/include/asm/proc/system.h \ 27 | /home/pi/share/oss/u-boot-pi/include/linux/string.h \ 28 | /home/pi/share/oss/u-boot-pi/include/asm/string.h \ 29 | /home/pi/share/oss/u-boot-pi/include/linux/stringify.h \ 30 | /home/pi/share/oss/u-boot-pi/include/asm/ptrace.h \ 31 | /home/pi/share/oss/u-boot-pi/include/asm/proc/ptrace.h \ 32 | /usr/lib/gcc/arm-linux-gnueabihf/4.6/include/stdarg.h \ 33 | /home/pi/share/oss/u-boot-pi/include/part.h \ 34 | /home/pi/share/oss/u-boot-pi/include/ide.h \ 35 | /home/pi/share/oss/u-boot-pi/include/flash.h \ 36 | /home/pi/share/oss/u-boot-pi/include/image.h \ 37 | /home/pi/share/oss/u-boot-pi/include/compiler.h \ 38 | /usr/lib/gcc/arm-linux-gnueabihf/4.6/include/stddef.h \ 39 | /home/pi/share/oss/u-boot-pi/include/asm/byteorder.h \ 40 | /home/pi/share/oss/u-boot-pi/include/linux/byteorder/little_endian.h \ 41 | /home/pi/share/oss/u-boot-pi/include/linux/compiler.h \ 42 | /home/pi/share/oss/u-boot-pi/include/linux/compiler-gcc.h \ 43 | /home/pi/share/oss/u-boot-pi/include/linux/compiler-gcc4.h \ 44 | /home/pi/share/oss/u-boot-pi/include/linux/byteorder/swab.h \ 45 | /home/pi/share/oss/u-boot-pi/include/linux/byteorder/generic.h \ 46 | /home/pi/share/oss/u-boot-pi/include/lmb.h \ 47 | /home/pi/share/oss/u-boot-pi/include/asm/u-boot.h \ 48 | /home/pi/share/oss/u-boot-pi/include/command.h \ 49 | /home/pi/share/oss/u-boot-pi/include/linker_lists.h \ 50 | /home/pi/share/oss/u-boot-pi/include/asm/global_data.h \ 51 | /home/pi/share/oss/u-boot-pi/include/asm-generic/global_data_flags.h \ 52 | /home/pi/share/oss/u-boot-pi/include/asm/mach-types.h \ 53 | /home/pi/share/oss/u-boot-pi/include/asm/setup.h \ 54 | /home/pi/share/oss/u-boot-pi/include/asm/u-boot-arm.h \ 55 | /home/pi/share/oss/u-boot-pi/include/vsprintf.h \ 56 | /home/pi/share/oss/u-boot-pi/include/u-boot/crc.h \ 57 | /home/pi/share/oss/u-boot-pi/include/net.h \ 58 | /home/pi/share/oss/u-boot-pi/include/asm/cache.h \ 59 | /home/pi/share/oss/u-boot-pi/include/asm/system.h \ 60 | /home/pi/share/oss/u-boot-pi/include/iomux.h \ 61 | /home/pi/share/oss/u-boot-pi/include/stdio_dev.h \ 62 | /home/pi/share/oss/u-boot-pi/include/linux/list.h \ 63 | /home/pi/share/oss/u-boot-pi/include/linux/poison.h \ 64 | /home/pi/share/oss/u-boot-pi/include/bootstage.h \ 65 | /home/pi/share/oss/u-boot-pi/include/usb.h \ 66 | /home/pi/share/oss/u-boot-pi/include/usb_defs.h \ 67 | /home/pi/share/oss/u-boot-pi/include/usbdescriptors.h \ 68 | /home/pi/share/oss/u-boot-pi/include/linux/mii.h \ 69 | /home/pi/share/oss/u-boot-pi/include/usb_ether.h \ 70 | /home/pi/share/oss/u-boot-pi/include/malloc.h 71 | -------------------------------------------------------------------------------- /driver/usb/eth/.depend.usb_ether: -------------------------------------------------------------------------------- 1 | usb_ether.o: usb_ether.c /home/pi/share/oss/u-boot-pi/include/common.h \ 2 | /home/pi/share/oss/u-boot-pi/include/config.h \ 3 | /home/pi/share/oss/u-boot-pi/include/config_cmd_defaults.h \ 4 | /home/pi/share/oss/u-boot-pi/include/config_defaults.h \ 5 | /home/pi/share/oss/u-boot-pi/include/configs/rpi_b.h \ 6 | /home/pi/share/oss/u-boot-pi/include/asm/sizes.h \ 7 | /home/pi/share/oss/u-boot-pi/include/config_cmd_default.h \ 8 | /home/pi/share/oss/u-boot-pi/include/asm/config.h \ 9 | /home/pi/share/oss/u-boot-pi/include/config_fallbacks.h \ 10 | /home/pi/share/oss/u-boot-pi/include/config_uncmd_spl.h \ 11 | /home/pi/share/oss/u-boot-pi/include/asm-offsets.h \ 12 | /home/pi/share/oss/u-boot-pi/include/generated/generic-asm-offsets.h \ 13 | /home/pi/share/oss/u-boot-pi/include/linux/bitops.h \ 14 | /home/pi/share/oss/u-boot-pi/include/asm/types.h \ 15 | /home/pi/share/oss/u-boot-pi/include/asm/bitops.h \ 16 | /home/pi/share/oss/u-boot-pi/include/asm/proc/system.h \ 17 | /home/pi/share/oss/u-boot-pi/include/linux/config.h \ 18 | /home/pi/share/oss/u-boot-pi/include/linux/types.h \ 19 | /home/pi/share/oss/u-boot-pi/include/linux/posix_types.h \ 20 | /home/pi/share/oss/u-boot-pi/include/linux/stddef.h \ 21 | /home/pi/share/oss/u-boot-pi/include/asm/posix_types.h \ 22 | /home/pi/share/oss/u-boot-pi/include/linux/string.h \ 23 | /home/pi/share/oss/u-boot-pi/include/asm/string.h \ 24 | /home/pi/share/oss/u-boot-pi/include/linux/stringify.h \ 25 | /home/pi/share/oss/u-boot-pi/include/asm/ptrace.h \ 26 | /home/pi/share/oss/u-boot-pi/include/asm/proc/ptrace.h \ 27 | /usr/lib/gcc/arm-linux-gnueabihf/4.6/include/stdarg.h \ 28 | /home/pi/share/oss/u-boot-pi/include/part.h \ 29 | /home/pi/share/oss/u-boot-pi/include/ide.h \ 30 | /home/pi/share/oss/u-boot-pi/include/flash.h \ 31 | /home/pi/share/oss/u-boot-pi/include/image.h \ 32 | /home/pi/share/oss/u-boot-pi/include/compiler.h \ 33 | /usr/lib/gcc/arm-linux-gnueabihf/4.6/include/stddef.h \ 34 | /home/pi/share/oss/u-boot-pi/include/asm/byteorder.h \ 35 | /home/pi/share/oss/u-boot-pi/include/linux/byteorder/little_endian.h \ 36 | /home/pi/share/oss/u-boot-pi/include/linux/compiler.h \ 37 | /home/pi/share/oss/u-boot-pi/include/linux/compiler-gcc.h \ 38 | /home/pi/share/oss/u-boot-pi/include/linux/compiler-gcc4.h \ 39 | /home/pi/share/oss/u-boot-pi/include/linux/byteorder/swab.h \ 40 | /home/pi/share/oss/u-boot-pi/include/linux/byteorder/generic.h \ 41 | /home/pi/share/oss/u-boot-pi/include/lmb.h \ 42 | /home/pi/share/oss/u-boot-pi/include/asm/u-boot.h \ 43 | /home/pi/share/oss/u-boot-pi/include/command.h \ 44 | /home/pi/share/oss/u-boot-pi/include/linker_lists.h \ 45 | /home/pi/share/oss/u-boot-pi/include/asm/global_data.h \ 46 | /home/pi/share/oss/u-boot-pi/include/asm-generic/global_data_flags.h \ 47 | /home/pi/share/oss/u-boot-pi/include/asm/mach-types.h \ 48 | /home/pi/share/oss/u-boot-pi/include/asm/setup.h \ 49 | /home/pi/share/oss/u-boot-pi/include/asm/u-boot-arm.h \ 50 | /home/pi/share/oss/u-boot-pi/include/vsprintf.h \ 51 | /home/pi/share/oss/u-boot-pi/include/u-boot/crc.h \ 52 | /home/pi/share/oss/u-boot-pi/include/net.h \ 53 | /home/pi/share/oss/u-boot-pi/include/asm/cache.h \ 54 | /home/pi/share/oss/u-boot-pi/include/asm/system.h \ 55 | /home/pi/share/oss/u-boot-pi/include/iomux.h \ 56 | /home/pi/share/oss/u-boot-pi/include/stdio_dev.h \ 57 | /home/pi/share/oss/u-boot-pi/include/linux/list.h \ 58 | /home/pi/share/oss/u-boot-pi/include/linux/poison.h \ 59 | /home/pi/share/oss/u-boot-pi/include/bootstage.h \ 60 | /home/pi/share/oss/u-boot-pi/include/usb.h \ 61 | /home/pi/share/oss/u-boot-pi/include/usb_defs.h \ 62 | /home/pi/share/oss/u-boot-pi/include/usbdescriptors.h \ 63 | /home/pi/share/oss/u-boot-pi/include/usb_ether.h 64 | -------------------------------------------------------------------------------- /driver/usb/eth/Makefile: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (c) 2011 The Chromium OS Authors. 3 | # See file CREDITS for list of people who contributed to this 4 | # project. 5 | # 6 | # This program is free software; you can redistribute it and/or 7 | # modify it under the terms of the GNU General Public License as 8 | # published by the Free Software Foundation; either version 2 of 9 | # the License, or (at your option) any later version. 10 | # 11 | # This program is distributed in the hope that it will be useful, 12 | # but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | # GNU General Public License for more details. 15 | # 16 | # You should have received a copy of the GNU General Public License 17 | # along with this program; if not, write to the Free Software 18 | # Foundation, Inc., 59 Temple Place, Suite 330, Boston, 19 | # MA 02111-1307 USA 20 | # 21 | 22 | include $(TOPDIR)/config.mk 23 | 24 | LIB := $(obj)libusb_eth.o 25 | 26 | # new USB host ethernet layer dependencies 27 | COBJS-$(CONFIG_USB_HOST_ETHER) += usb_ether.o 28 | ifdef CONFIG_USB_ETHER_ASIX 29 | COBJS-y += asix.o 30 | endif 31 | COBJS-$(CONFIG_USB_ETHER_SMSC95XX) += smsc95xx.o 32 | 33 | COBJS := $(COBJS-y) 34 | SRCS := $(COBJS:.o=.c) 35 | OBJS := $(addprefix $(obj),$(COBJS)) 36 | 37 | all: $(LIB) 38 | 39 | $(LIB): $(obj).depend $(OBJS) 40 | $(call cmd_link_o_target, $(OBJS)) 41 | 42 | ######################################################################### 43 | 44 | # defines $(obj).depend target 45 | include $(SRCTREE)/rules.mk 46 | 47 | sinclude $(obj).depend 48 | 49 | ######################################################################### 50 | -------------------------------------------------------------------------------- /driver/usb/eth/smsc95xx.su: -------------------------------------------------------------------------------- 1 | smsc95xx.c:784:13:smsc95xx_halt 0 static 2 | smsc95xx.c:160:12:smsc95xx_write_reg 160 static 3 | smsc95xx.c:384:12:smsc95xx_write_hwaddr 24 static 4 | smsc95xx.c:180:12:smsc95xx_read_reg 168 static 5 | smsc95xx.c:679:12:smsc95xx_send 1648 static 6 | smsc95xx.c:715:12:smsc95xx_recv 32 static 7 | smsc95xx.c:201:12:smsc95xx_phy_wait_not_busy 24 static 8 | smsc95xx.c:215:12:smsc95xx_mdio_read 24 static 9 | smsc95xx.c:239:13:smsc95xx_mdio_write 24 static 10 | smsc95xx.c:470:12:smsc95xx_init 56 static 11 | smsc95xx.c:792:6:smsc95xx_eth_before_probe 0 static 12 | smsc95xx.c:809:5:smsc95xx_eth_probe 24 static 13 | smsc95xx.c:884:5:smsc95xx_eth_get_info 16 static 14 | -------------------------------------------------------------------------------- /driver/usb/eth/usb_ether.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2011 The Chromium OS Authors. 3 | * See file CREDITS for list of people who contributed to this 4 | * project. 5 | * 6 | * This program is free software; you can redistribute it and/or 7 | * modify it under the terms of the GNU General Public License as 8 | * published by the Free Software Foundation; either version 2 of 9 | * the License, or (at your option) any later version. 10 | * 11 | * This program is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU General Public License 17 | * along with this program; if not, write to the Free Software 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 19 | * MA 02111-1307 USA 20 | */ 21 | 22 | #include 23 | 24 | #include "usb_ether.h" 25 | 26 | typedef void (*usb_eth_before_probe)(void); 27 | typedef int (*usb_eth_probe)(struct usb_device *dev, unsigned int ifnum, 28 | struct ueth_data *ss); 29 | typedef int (*usb_eth_get_info)(struct usb_device *dev, struct ueth_data *ss, 30 | struct eth_device *dev_desc); 31 | 32 | struct usb_eth_prob_dev { 33 | usb_eth_before_probe before_probe; /* optional */ 34 | usb_eth_probe probe; 35 | usb_eth_get_info get_info; 36 | }; 37 | 38 | /* driver functions go here, each bracketed by #ifdef CONFIG_USB_ETHER_xxx */ 39 | static const struct usb_eth_prob_dev prob_dev[] = { 40 | #ifdef CONFIG_USB_ETHER_ASIX 41 | { 42 | .before_probe = asix_eth_before_probe, 43 | .probe = asix_eth_probe, 44 | .get_info = asix_eth_get_info, 45 | }, 46 | #endif 47 | #ifdef CONFIG_USB_ETHER_SMSC95XX 48 | { 49 | .before_probe = smsc95xx_eth_before_probe, 50 | .probe = smsc95xx_eth_probe, 51 | .get_info = smsc95xx_eth_get_info, 52 | }, 53 | #endif 54 | { }, /* END */ 55 | }; 56 | 57 | static int usb_max_eth_dev; /* number of highest available usb eth device */ 58 | static struct ueth_data usb_eth[USB_MAX_ETH_DEV]; 59 | 60 | /******************************************************************************* 61 | * tell if current ethernet device is a usb dongle 62 | */ 63 | int is_eth_dev_on_usb_host(void) 64 | { 65 | int i; 66 | struct eth_device *dev = eth_get_dev(); 67 | 68 | if (dev) { 69 | for (i = 0; i < usb_max_eth_dev; i++) 70 | if (&usb_eth[i].eth_dev == dev) 71 | return 1; 72 | } 73 | return 0; 74 | } 75 | 76 | /* 77 | * Given a USB device, ask each driver if it can support it, and attach it 78 | * to the first driver that says 'yes' 79 | */ 80 | static void probe_valid_drivers(struct usb_device *dev) 81 | { 82 | struct eth_device *eth; 83 | int j; 84 | 85 | for (j = 0; prob_dev[j].probe && prob_dev[j].get_info; j++) { 86 | if (!prob_dev[j].probe(dev, 0, &usb_eth[usb_max_eth_dev])) 87 | continue; 88 | /* 89 | * ok, it is a supported eth device. Get info and fill it in 90 | */ 91 | eth = &usb_eth[usb_max_eth_dev].eth_dev; 92 | if (prob_dev[j].get_info(dev, 93 | &usb_eth[usb_max_eth_dev], 94 | eth)) { 95 | /* found proper driver */ 96 | /* register with networking stack */ 97 | usb_max_eth_dev++; 98 | 99 | /* 100 | * usb_max_eth_dev must be incremented prior to this 101 | * call since eth_current_changed (internally called) 102 | * relies on it 103 | */ 104 | eth_register(eth); 105 | if (eth_write_hwaddr(eth, "usbeth", 106 | usb_max_eth_dev - 1)) 107 | puts("Warning: failed to set MAC address\n"); 108 | break; 109 | } 110 | } 111 | } 112 | 113 | /******************************************************************************* 114 | * scan the usb and reports device info 115 | * to the user if mode = 1 116 | * returns current device or -1 if no 117 | */ 118 | int usb_host_eth_scan(int mode) 119 | { 120 | int i, old_async; 121 | struct usb_device *dev; 122 | 123 | 124 | if (mode == 1) 125 | printf(" scanning usb for ethernet devices... "); 126 | 127 | old_async = usb_disable_asynch(1); /* asynch transfer not allowed */ 128 | 129 | /* unregister a previously detected device */ 130 | for (i = 0; i < usb_max_eth_dev; i++) 131 | eth_unregister(&usb_eth[i].eth_dev); 132 | 133 | memset(usb_eth, 0, sizeof(usb_eth)); 134 | 135 | for (i = 0; prob_dev[i].probe; i++) { 136 | if (prob_dev[i].before_probe) 137 | prob_dev[i].before_probe(); 138 | } 139 | 140 | usb_max_eth_dev = 0; 141 | for (i = 0; i < USB_MAX_DEVICE; i++) { 142 | dev = usb_get_dev_index(i); /* get device */ 143 | debug("i=%d\n", i); 144 | if (dev == NULL) 145 | break; /* no more devices available */ 146 | 147 | /* find valid usb_ether driver for this device, if any */ 148 | probe_valid_drivers(dev); 149 | 150 | /* check limit */ 151 | if (usb_max_eth_dev == USB_MAX_ETH_DEV) { 152 | printf("max USB Ethernet Device reached: %d stopping\n", 153 | usb_max_eth_dev); 154 | break; 155 | } 156 | } /* for */ 157 | 158 | usb_disable_asynch(old_async); /* restore asynch value */ 159 | printf("%d Ethernet Device(s) found\n", usb_max_eth_dev); 160 | if (usb_max_eth_dev > 0) 161 | return 0; 162 | return -1; 163 | } 164 | -------------------------------------------------------------------------------- /driver/usb/eth/usb_ether.su: -------------------------------------------------------------------------------- 1 | usb_ether.c:64:5:is_eth_dev_on_usb_host 8 static 2 | usb_ether.c:119:5:usb_host_eth_scan 40 static 3 | -------------------------------------------------------------------------------- /driver/usb/host/.depend: -------------------------------------------------------------------------------- 1 | dwc_otg.o: dwc_otg.c /home/pi/share/oss/u-boot-pi/include/common.h \ 2 | /home/pi/share/oss/u-boot-pi/include/config.h \ 3 | /home/pi/share/oss/u-boot-pi/include/config_cmd_defaults.h \ 4 | /home/pi/share/oss/u-boot-pi/include/config_defaults.h \ 5 | /home/pi/share/oss/u-boot-pi/include/configs/rpi_b.h \ 6 | /home/pi/share/oss/u-boot-pi/include/asm/sizes.h \ 7 | /home/pi/share/oss/u-boot-pi/include/config_cmd_default.h \ 8 | /home/pi/share/oss/u-boot-pi/include/asm/config.h \ 9 | /home/pi/share/oss/u-boot-pi/include/config_fallbacks.h \ 10 | /home/pi/share/oss/u-boot-pi/include/config_uncmd_spl.h \ 11 | /home/pi/share/oss/u-boot-pi/include/asm-offsets.h \ 12 | /home/pi/share/oss/u-boot-pi/include/generated/generic-asm-offsets.h \ 13 | /home/pi/share/oss/u-boot-pi/include/linux/bitops.h \ 14 | /home/pi/share/oss/u-boot-pi/include/asm/types.h \ 15 | /home/pi/share/oss/u-boot-pi/include/asm/bitops.h \ 16 | /home/pi/share/oss/u-boot-pi/include/asm/proc/system.h \ 17 | /home/pi/share/oss/u-boot-pi/include/linux/config.h \ 18 | /home/pi/share/oss/u-boot-pi/include/linux/types.h \ 19 | /home/pi/share/oss/u-boot-pi/include/linux/posix_types.h \ 20 | /home/pi/share/oss/u-boot-pi/include/linux/stddef.h \ 21 | /home/pi/share/oss/u-boot-pi/include/asm/posix_types.h \ 22 | /home/pi/share/oss/u-boot-pi/include/linux/string.h \ 23 | /home/pi/share/oss/u-boot-pi/include/asm/string.h \ 24 | /home/pi/share/oss/u-boot-pi/include/linux/stringify.h \ 25 | /home/pi/share/oss/u-boot-pi/include/asm/ptrace.h \ 26 | /home/pi/share/oss/u-boot-pi/include/asm/proc/ptrace.h \ 27 | /usr/lib/gcc/arm-linux-gnueabihf/4.6/include/stdarg.h \ 28 | /home/pi/share/oss/u-boot-pi/include/part.h \ 29 | /home/pi/share/oss/u-boot-pi/include/ide.h \ 30 | /home/pi/share/oss/u-boot-pi/include/flash.h \ 31 | /home/pi/share/oss/u-boot-pi/include/image.h \ 32 | /home/pi/share/oss/u-boot-pi/include/compiler.h \ 33 | /usr/lib/gcc/arm-linux-gnueabihf/4.6/include/stddef.h \ 34 | /home/pi/share/oss/u-boot-pi/include/asm/byteorder.h \ 35 | /home/pi/share/oss/u-boot-pi/include/linux/byteorder/little_endian.h \ 36 | /home/pi/share/oss/u-boot-pi/include/linux/compiler.h \ 37 | /home/pi/share/oss/u-boot-pi/include/linux/compiler-gcc.h \ 38 | /home/pi/share/oss/u-boot-pi/include/linux/compiler-gcc4.h \ 39 | /home/pi/share/oss/u-boot-pi/include/linux/byteorder/swab.h \ 40 | /home/pi/share/oss/u-boot-pi/include/linux/byteorder/generic.h \ 41 | /home/pi/share/oss/u-boot-pi/include/lmb.h \ 42 | /home/pi/share/oss/u-boot-pi/include/asm/u-boot.h \ 43 | /home/pi/share/oss/u-boot-pi/include/command.h \ 44 | /home/pi/share/oss/u-boot-pi/include/linker_lists.h \ 45 | /home/pi/share/oss/u-boot-pi/include/asm/global_data.h \ 46 | /home/pi/share/oss/u-boot-pi/include/asm-generic/global_data_flags.h \ 47 | /home/pi/share/oss/u-boot-pi/include/asm/mach-types.h \ 48 | /home/pi/share/oss/u-boot-pi/include/asm/setup.h \ 49 | /home/pi/share/oss/u-boot-pi/include/asm/u-boot-arm.h \ 50 | /home/pi/share/oss/u-boot-pi/include/vsprintf.h \ 51 | /home/pi/share/oss/u-boot-pi/include/u-boot/crc.h \ 52 | /home/pi/share/oss/u-boot-pi/include/net.h \ 53 | /home/pi/share/oss/u-boot-pi/include/asm/cache.h \ 54 | /home/pi/share/oss/u-boot-pi/include/asm/system.h \ 55 | /home/pi/share/oss/u-boot-pi/include/iomux.h \ 56 | /home/pi/share/oss/u-boot-pi/include/stdio_dev.h \ 57 | /home/pi/share/oss/u-boot-pi/include/linux/list.h \ 58 | /home/pi/share/oss/u-boot-pi/include/linux/poison.h \ 59 | /home/pi/share/oss/u-boot-pi/include/bootstage.h \ 60 | /home/pi/share/oss/u-boot-pi/include/usb.h \ 61 | /home/pi/share/oss/u-boot-pi/include/usb_defs.h \ 62 | /home/pi/share/oss/u-boot-pi/include/usbdescriptors.h \ 63 | /home/pi/share/oss/u-boot-pi/include/malloc.h dwc_otg.h dwc_otg_regs.h \ 64 | dwc_otg_core_if.h 65 | dwc_otg-hcd.o: dwc_otg-hcd.c \ 66 | /home/pi/share/oss/u-boot-pi/include/common.h \ 67 | /home/pi/share/oss/u-boot-pi/include/config.h \ 68 | /home/pi/share/oss/u-boot-pi/include/config_cmd_defaults.h \ 69 | /home/pi/share/oss/u-boot-pi/include/config_defaults.h \ 70 | /home/pi/share/oss/u-boot-pi/include/configs/rpi_b.h \ 71 | /home/pi/share/oss/u-boot-pi/include/asm/sizes.h \ 72 | /home/pi/share/oss/u-boot-pi/include/config_cmd_default.h \ 73 | /home/pi/share/oss/u-boot-pi/include/asm/config.h \ 74 | /home/pi/share/oss/u-boot-pi/include/config_fallbacks.h \ 75 | /home/pi/share/oss/u-boot-pi/include/config_uncmd_spl.h \ 76 | /home/pi/share/oss/u-boot-pi/include/asm-offsets.h \ 77 | /home/pi/share/oss/u-boot-pi/include/generated/generic-asm-offsets.h \ 78 | /home/pi/share/oss/u-boot-pi/include/linux/bitops.h \ 79 | /home/pi/share/oss/u-boot-pi/include/asm/types.h \ 80 | /home/pi/share/oss/u-boot-pi/include/asm/bitops.h \ 81 | /home/pi/share/oss/u-boot-pi/include/asm/proc/system.h \ 82 | /home/pi/share/oss/u-boot-pi/include/linux/config.h \ 83 | /home/pi/share/oss/u-boot-pi/include/linux/types.h \ 84 | /home/pi/share/oss/u-boot-pi/include/linux/posix_types.h \ 85 | /home/pi/share/oss/u-boot-pi/include/linux/stddef.h \ 86 | /home/pi/share/oss/u-boot-pi/include/asm/posix_types.h \ 87 | /home/pi/share/oss/u-boot-pi/include/linux/string.h \ 88 | /home/pi/share/oss/u-boot-pi/include/asm/string.h \ 89 | /home/pi/share/oss/u-boot-pi/include/linux/stringify.h \ 90 | /home/pi/share/oss/u-boot-pi/include/asm/ptrace.h \ 91 | /home/pi/share/oss/u-boot-pi/include/asm/proc/ptrace.h \ 92 | /usr/lib/gcc/arm-linux-gnueabihf/4.6/include/stdarg.h \ 93 | /home/pi/share/oss/u-boot-pi/include/part.h \ 94 | /home/pi/share/oss/u-boot-pi/include/ide.h \ 95 | /home/pi/share/oss/u-boot-pi/include/flash.h \ 96 | /home/pi/share/oss/u-boot-pi/include/image.h \ 97 | /home/pi/share/oss/u-boot-pi/include/compiler.h \ 98 | /usr/lib/gcc/arm-linux-gnueabihf/4.6/include/stddef.h \ 99 | /home/pi/share/oss/u-boot-pi/include/asm/byteorder.h \ 100 | /home/pi/share/oss/u-boot-pi/include/linux/byteorder/little_endian.h \ 101 | /home/pi/share/oss/u-boot-pi/include/linux/compiler.h \ 102 | /home/pi/share/oss/u-boot-pi/include/linux/compiler-gcc.h \ 103 | /home/pi/share/oss/u-boot-pi/include/linux/compiler-gcc4.h \ 104 | /home/pi/share/oss/u-boot-pi/include/linux/byteorder/swab.h \ 105 | /home/pi/share/oss/u-boot-pi/include/linux/byteorder/generic.h \ 106 | /home/pi/share/oss/u-boot-pi/include/lmb.h \ 107 | /home/pi/share/oss/u-boot-pi/include/asm/u-boot.h \ 108 | /home/pi/share/oss/u-boot-pi/include/command.h \ 109 | /home/pi/share/oss/u-boot-pi/include/linker_lists.h \ 110 | /home/pi/share/oss/u-boot-pi/include/asm/global_data.h \ 111 | /home/pi/share/oss/u-boot-pi/include/asm-generic/global_data_flags.h \ 112 | /home/pi/share/oss/u-boot-pi/include/asm/mach-types.h \ 113 | /home/pi/share/oss/u-boot-pi/include/asm/setup.h \ 114 | /home/pi/share/oss/u-boot-pi/include/asm/u-boot-arm.h \ 115 | /home/pi/share/oss/u-boot-pi/include/vsprintf.h \ 116 | /home/pi/share/oss/u-boot-pi/include/u-boot/crc.h \ 117 | /home/pi/share/oss/u-boot-pi/include/net.h \ 118 | /home/pi/share/oss/u-boot-pi/include/asm/cache.h \ 119 | /home/pi/share/oss/u-boot-pi/include/asm/system.h \ 120 | /home/pi/share/oss/u-boot-pi/include/iomux.h \ 121 | /home/pi/share/oss/u-boot-pi/include/stdio_dev.h \ 122 | /home/pi/share/oss/u-boot-pi/include/linux/list.h \ 123 | /home/pi/share/oss/u-boot-pi/include/linux/poison.h \ 124 | /home/pi/share/oss/u-boot-pi/include/bootstage.h \ 125 | /home/pi/share/oss/u-boot-pi/include/usb.h \ 126 | /home/pi/share/oss/u-boot-pi/include/usb_defs.h \ 127 | /home/pi/share/oss/u-boot-pi/include/usbdescriptors.h \ 128 | /home/pi/share/oss/u-boot-pi/include/malloc.h dwc_otg.h dwc_otg_regs.h \ 129 | dwc_otg_core_if.h 130 | -------------------------------------------------------------------------------- /driver/usb/host/.depend.dwc_otg: -------------------------------------------------------------------------------- 1 | dwc_otg.o: dwc_otg.c /home/pi/share/oss/u-boot-pi/include/common.h \ 2 | /home/pi/share/oss/u-boot-pi/include/config.h \ 3 | /home/pi/share/oss/u-boot-pi/include/config_cmd_defaults.h \ 4 | /home/pi/share/oss/u-boot-pi/include/config_defaults.h \ 5 | /home/pi/share/oss/u-boot-pi/include/configs/rpi_b.h \ 6 | /home/pi/share/oss/u-boot-pi/include/asm/sizes.h \ 7 | /home/pi/share/oss/u-boot-pi/include/config_cmd_default.h \ 8 | /home/pi/share/oss/u-boot-pi/include/asm/config.h \ 9 | /home/pi/share/oss/u-boot-pi/include/config_fallbacks.h \ 10 | /home/pi/share/oss/u-boot-pi/include/config_uncmd_spl.h \ 11 | /home/pi/share/oss/u-boot-pi/include/asm-offsets.h \ 12 | /home/pi/share/oss/u-boot-pi/include/generated/generic-asm-offsets.h \ 13 | /home/pi/share/oss/u-boot-pi/include/linux/bitops.h \ 14 | /home/pi/share/oss/u-boot-pi/include/asm/types.h \ 15 | /home/pi/share/oss/u-boot-pi/include/asm/bitops.h \ 16 | /home/pi/share/oss/u-boot-pi/include/asm/proc/system.h \ 17 | /home/pi/share/oss/u-boot-pi/include/linux/config.h \ 18 | /home/pi/share/oss/u-boot-pi/include/linux/types.h \ 19 | /home/pi/share/oss/u-boot-pi/include/linux/posix_types.h \ 20 | /home/pi/share/oss/u-boot-pi/include/linux/stddef.h \ 21 | /home/pi/share/oss/u-boot-pi/include/asm/posix_types.h \ 22 | /home/pi/share/oss/u-boot-pi/include/linux/string.h \ 23 | /home/pi/share/oss/u-boot-pi/include/asm/string.h \ 24 | /home/pi/share/oss/u-boot-pi/include/linux/stringify.h \ 25 | /home/pi/share/oss/u-boot-pi/include/asm/ptrace.h \ 26 | /home/pi/share/oss/u-boot-pi/include/asm/proc/ptrace.h \ 27 | /usr/lib/gcc/arm-linux-gnueabihf/4.6/include/stdarg.h \ 28 | /home/pi/share/oss/u-boot-pi/include/part.h \ 29 | /home/pi/share/oss/u-boot-pi/include/ide.h \ 30 | /home/pi/share/oss/u-boot-pi/include/flash.h \ 31 | /home/pi/share/oss/u-boot-pi/include/image.h \ 32 | /home/pi/share/oss/u-boot-pi/include/compiler.h \ 33 | /usr/lib/gcc/arm-linux-gnueabihf/4.6/include/stddef.h \ 34 | /home/pi/share/oss/u-boot-pi/include/asm/byteorder.h \ 35 | /home/pi/share/oss/u-boot-pi/include/linux/byteorder/little_endian.h \ 36 | /home/pi/share/oss/u-boot-pi/include/linux/compiler.h \ 37 | /home/pi/share/oss/u-boot-pi/include/linux/compiler-gcc.h \ 38 | /home/pi/share/oss/u-boot-pi/include/linux/compiler-gcc4.h \ 39 | /home/pi/share/oss/u-boot-pi/include/linux/byteorder/swab.h \ 40 | /home/pi/share/oss/u-boot-pi/include/linux/byteorder/generic.h \ 41 | /home/pi/share/oss/u-boot-pi/include/lmb.h \ 42 | /home/pi/share/oss/u-boot-pi/include/asm/u-boot.h \ 43 | /home/pi/share/oss/u-boot-pi/include/command.h \ 44 | /home/pi/share/oss/u-boot-pi/include/linker_lists.h \ 45 | /home/pi/share/oss/u-boot-pi/include/asm/global_data.h \ 46 | /home/pi/share/oss/u-boot-pi/include/asm-generic/global_data_flags.h \ 47 | /home/pi/share/oss/u-boot-pi/include/asm/mach-types.h \ 48 | /home/pi/share/oss/u-boot-pi/include/asm/setup.h \ 49 | /home/pi/share/oss/u-boot-pi/include/asm/u-boot-arm.h \ 50 | /home/pi/share/oss/u-boot-pi/include/vsprintf.h \ 51 | /home/pi/share/oss/u-boot-pi/include/u-boot/crc.h \ 52 | /home/pi/share/oss/u-boot-pi/include/net.h \ 53 | /home/pi/share/oss/u-boot-pi/include/asm/cache.h \ 54 | /home/pi/share/oss/u-boot-pi/include/asm/system.h \ 55 | /home/pi/share/oss/u-boot-pi/include/iomux.h \ 56 | /home/pi/share/oss/u-boot-pi/include/stdio_dev.h \ 57 | /home/pi/share/oss/u-boot-pi/include/linux/list.h \ 58 | /home/pi/share/oss/u-boot-pi/include/linux/poison.h \ 59 | /home/pi/share/oss/u-boot-pi/include/bootstage.h \ 60 | /home/pi/share/oss/u-boot-pi/include/usb.h \ 61 | /home/pi/share/oss/u-boot-pi/include/usb_defs.h \ 62 | /home/pi/share/oss/u-boot-pi/include/usbdescriptors.h \ 63 | /home/pi/share/oss/u-boot-pi/include/malloc.h dwc_otg.h dwc_otg_regs.h \ 64 | dwc_otg_core_if.h 65 | -------------------------------------------------------------------------------- /driver/usb/host/.depend.dwc_otg-hcd: -------------------------------------------------------------------------------- 1 | dwc_otg-hcd.o: dwc_otg-hcd.c \ 2 | /home/pi/share/oss/u-boot-pi/include/common.h \ 3 | /home/pi/share/oss/u-boot-pi/include/config.h \ 4 | /home/pi/share/oss/u-boot-pi/include/config_cmd_defaults.h \ 5 | /home/pi/share/oss/u-boot-pi/include/config_defaults.h \ 6 | /home/pi/share/oss/u-boot-pi/include/configs/rpi_b.h \ 7 | /home/pi/share/oss/u-boot-pi/include/asm/sizes.h \ 8 | /home/pi/share/oss/u-boot-pi/include/config_cmd_default.h \ 9 | /home/pi/share/oss/u-boot-pi/include/asm/config.h \ 10 | /home/pi/share/oss/u-boot-pi/include/config_fallbacks.h \ 11 | /home/pi/share/oss/u-boot-pi/include/config_uncmd_spl.h \ 12 | /home/pi/share/oss/u-boot-pi/include/asm-offsets.h \ 13 | /home/pi/share/oss/u-boot-pi/include/generated/generic-asm-offsets.h \ 14 | /home/pi/share/oss/u-boot-pi/include/linux/bitops.h \ 15 | /home/pi/share/oss/u-boot-pi/include/asm/types.h \ 16 | /home/pi/share/oss/u-boot-pi/include/asm/bitops.h \ 17 | /home/pi/share/oss/u-boot-pi/include/asm/proc/system.h \ 18 | /home/pi/share/oss/u-boot-pi/include/linux/config.h \ 19 | /home/pi/share/oss/u-boot-pi/include/linux/types.h \ 20 | /home/pi/share/oss/u-boot-pi/include/linux/posix_types.h \ 21 | /home/pi/share/oss/u-boot-pi/include/linux/stddef.h \ 22 | /home/pi/share/oss/u-boot-pi/include/asm/posix_types.h \ 23 | /home/pi/share/oss/u-boot-pi/include/linux/string.h \ 24 | /home/pi/share/oss/u-boot-pi/include/asm/string.h \ 25 | /home/pi/share/oss/u-boot-pi/include/linux/stringify.h \ 26 | /home/pi/share/oss/u-boot-pi/include/asm/ptrace.h \ 27 | /home/pi/share/oss/u-boot-pi/include/asm/proc/ptrace.h \ 28 | /usr/lib/gcc/arm-linux-gnueabihf/4.6/include/stdarg.h \ 29 | /home/pi/share/oss/u-boot-pi/include/part.h \ 30 | /home/pi/share/oss/u-boot-pi/include/ide.h \ 31 | /home/pi/share/oss/u-boot-pi/include/flash.h \ 32 | /home/pi/share/oss/u-boot-pi/include/image.h \ 33 | /home/pi/share/oss/u-boot-pi/include/compiler.h \ 34 | /usr/lib/gcc/arm-linux-gnueabihf/4.6/include/stddef.h \ 35 | /home/pi/share/oss/u-boot-pi/include/asm/byteorder.h \ 36 | /home/pi/share/oss/u-boot-pi/include/linux/byteorder/little_endian.h \ 37 | /home/pi/share/oss/u-boot-pi/include/linux/compiler.h \ 38 | /home/pi/share/oss/u-boot-pi/include/linux/compiler-gcc.h \ 39 | /home/pi/share/oss/u-boot-pi/include/linux/compiler-gcc4.h \ 40 | /home/pi/share/oss/u-boot-pi/include/linux/byteorder/swab.h \ 41 | /home/pi/share/oss/u-boot-pi/include/linux/byteorder/generic.h \ 42 | /home/pi/share/oss/u-boot-pi/include/lmb.h \ 43 | /home/pi/share/oss/u-boot-pi/include/asm/u-boot.h \ 44 | /home/pi/share/oss/u-boot-pi/include/command.h \ 45 | /home/pi/share/oss/u-boot-pi/include/linker_lists.h \ 46 | /home/pi/share/oss/u-boot-pi/include/asm/global_data.h \ 47 | /home/pi/share/oss/u-boot-pi/include/asm-generic/global_data_flags.h \ 48 | /home/pi/share/oss/u-boot-pi/include/asm/mach-types.h \ 49 | /home/pi/share/oss/u-boot-pi/include/asm/setup.h \ 50 | /home/pi/share/oss/u-boot-pi/include/asm/u-boot-arm.h \ 51 | /home/pi/share/oss/u-boot-pi/include/vsprintf.h \ 52 | /home/pi/share/oss/u-boot-pi/include/u-boot/crc.h \ 53 | /home/pi/share/oss/u-boot-pi/include/net.h \ 54 | /home/pi/share/oss/u-boot-pi/include/asm/cache.h \ 55 | /home/pi/share/oss/u-boot-pi/include/asm/system.h \ 56 | /home/pi/share/oss/u-boot-pi/include/iomux.h \ 57 | /home/pi/share/oss/u-boot-pi/include/stdio_dev.h \ 58 | /home/pi/share/oss/u-boot-pi/include/linux/list.h \ 59 | /home/pi/share/oss/u-boot-pi/include/linux/poison.h \ 60 | /home/pi/share/oss/u-boot-pi/include/bootstage.h \ 61 | /home/pi/share/oss/u-boot-pi/include/usb.h \ 62 | /home/pi/share/oss/u-boot-pi/include/usb_defs.h \ 63 | /home/pi/share/oss/u-boot-pi/include/usbdescriptors.h \ 64 | /home/pi/share/oss/u-boot-pi/include/malloc.h dwc_otg.h dwc_otg_regs.h \ 65 | dwc_otg_core_if.h 66 | -------------------------------------------------------------------------------- /driver/usb/host/Makefile: -------------------------------------------------------------------------------- 1 | # 2 | # (C) Copyright 2000-2007 3 | # Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4 | # 5 | # See file CREDITS for list of people who contributed to this 6 | # project. 7 | # 8 | # This program is free software; you can redistribute it and/or 9 | # modify it under the terms of the GNU General Public License as 10 | # published by the Free Software Foundation; either version 2 of 11 | # the License, or (at your option) any later version. 12 | # 13 | # This program is distributed in the hope that it will be useful, 14 | # but WITHOUT ANY WARRANTY; without even the implied warranty of 15 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 | # GNU General Public License for more details. 17 | # 18 | # You should have received a copy of the GNU General Public License 19 | # along with this program; if not, write to the Free Software 20 | # Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 | # MA 02111-1307 USA 22 | # 23 | 24 | include $(TOPDIR)/config.mk 25 | 26 | LIB := $(obj)libusb_host.o 27 | 28 | # ohci 29 | COBJS-$(CONFIG_USB_OHCI_NEW) += ohci-hcd.o 30 | COBJS-$(CONFIG_USB_ATMEL) += ohci-at91.o 31 | COBJS-$(CONFIG_USB_OHCI_DA8XX) += ohci-da8xx.o 32 | COBJS-$(CONFIG_USB_ISP116X_HCD) += isp116x-hcd.o 33 | COBJS-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o 34 | COBJS-$(CONFIG_USB_S3C64XX) += s3c64xx-hcd.o 35 | COBJS-$(CONFIG_USB_SL811HS) += sl811-hcd.o 36 | COBJS-$(CONFIG_USB_OHCI_S3C24XX) += ohci-s3c24xx.o 37 | 38 | # echi 39 | COBJS-$(CONFIG_USB_EHCI) += ehci-hcd.o 40 | COBJS-$(CONFIG_USB_EHCI_ARMADA100) += ehci-armada100.o utmi-armada100.o 41 | COBJS-$(CONFIG_USB_EHCI_ATMEL) += ehci-atmel.o 42 | ifdef CONFIG_MPC512X 43 | COBJS-$(CONFIG_USB_EHCI_FSL) += ehci-mpc512x.o 44 | else 45 | COBJS-$(CONFIG_USB_EHCI_FSL) += ehci-fsl.o 46 | endif 47 | COBJS-$(CONFIG_USB_EHCI_EXYNOS) += ehci-exynos.o 48 | COBJS-$(CONFIG_USB_EHCI_MXC) += ehci-mxc.o 49 | COBJS-$(CONFIG_USB_EHCI_MXS) += ehci-mxs.o 50 | COBJS-$(CONFIG_USB_EHCI_MX5) += ehci-mx5.o 51 | COBJS-$(CONFIG_USB_EHCI_MX6) += ehci-mx6.o 52 | COBJS-$(CONFIG_USB_EHCI_OMAP) += ehci-omap.o 53 | COBJS-$(CONFIG_USB_EHCI_PPC4XX) += ehci-ppc4xx.o 54 | COBJS-$(CONFIG_USB_EHCI_IXP4XX) += ehci-ixp.o 55 | COBJS-$(CONFIG_USB_EHCI_MARVELL) += ehci-marvell.o 56 | COBJS-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o 57 | COBJS-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o 58 | COBJS-$(CONFIG_USB_EHCI_VCT) += ehci-vct.o 59 | COBJS-$(CONFIG_USB_DWC_OTG) += dwc_otg.o dwc_otg-hcd.o 60 | 61 | COBJS := $(COBJS-y) 62 | SRCS := $(COBJS:.o=.c) 63 | OBJS := $(addprefix $(obj),$(COBJS)) 64 | 65 | all: $(LIB) 66 | 67 | $(LIB): $(obj).depend $(OBJS) 68 | $(call cmd_link_o_target, $(OBJS)) 69 | 70 | ######################################################################### 71 | 72 | # defines $(obj).depend target 73 | include $(SRCTREE)/rules.mk 74 | 75 | sinclude $(obj).depend 76 | 77 | ######################################################################### 78 | -------------------------------------------------------------------------------- /driver/usb/host/dwc_otg-hcd.su: -------------------------------------------------------------------------------- 1 | dwc_otg-hcd.c:47:6:do_hang 8 static 2 | dwc_otg-hcd.c:56:6:handle_error 8 static 3 | dwc_otg-hcd.c:82:5:usb_lowlevel_init 16 static 4 | dwc_otg-hcd.c:127:5:usb_lowlevel_stop 8 static 5 | dwc_otg-hcd.c:456:5:submit_bulk_msg 96 static 6 | dwc_otg-hcd.c:591:5:submit_control_msg 104 static 7 | dwc_otg-hcd.c:757:5:submit_int_msg 16 static 8 | -------------------------------------------------------------------------------- /driver/usb/host/dwc_otg.h: -------------------------------------------------------------------------------- 1 | /* 2 | * DWC OTG HCD (Host Controller Driver) for u-boot 3 | * 4 | * Copyright (C) 2012 Oleksandr Tymoshenko 5 | * 6 | * This program is free software; you can redistribute it and/or modify 7 | * it under the terms of the GNU General Public License as published by 8 | * the Free Software Foundation; version 2 of the License. 9 | * 10 | * This program is distributed in the hope that it will be useful, 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 | * GNU General Public License for more details. 14 | * 15 | * You should have received a copy of the GNU General Public License 16 | * along with this program; if not, write to the Free Software 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 18 | * 19 | */ 20 | 21 | #ifndef __DWC_OTG_H__ 22 | #define __DWC_OTG_H__ 23 | 24 | /* USB HUB CONSTANTS (not OHCI-specific; see hub.h, based on usb_ohci.h) */ 25 | 26 | /* destination of request */ 27 | #define RH_INTERFACE 0x01 28 | #define RH_ENDPOINT 0x02 29 | #define RH_OTHER 0x03 30 | 31 | #define RH_CLASS 0x20 32 | #define RH_VENDOR 0x40 33 | 34 | /* Requests: bRequest << 8 | bmRequestType */ 35 | #define RH_GET_STATUS 0x0080 36 | #define RH_CLEAR_FEATURE 0x0100 37 | #define RH_SET_FEATURE 0x0300 38 | #define RH_SET_ADDRESS 0x0500 39 | #define RH_GET_DESCRIPTOR 0x0680 40 | #define RH_SET_DESCRIPTOR 0x0700 41 | #define RH_GET_CONFIGURATION 0x0880 42 | #define RH_SET_CONFIGURATION 0x0900 43 | #define RH_GET_STATE 0x0280 44 | #define RH_GET_INTERFACE 0x0A80 45 | #define RH_SET_INTERFACE 0x0B00 46 | #define RH_SYNC_FRAME 0x0C80 47 | /* Our Vendor Specific Request */ 48 | #define RH_SET_EP 0x2000 49 | 50 | /* Hub port features */ 51 | #define RH_PORT_CONNECTION 0x00 52 | #define RH_PORT_ENABLE 0x01 53 | #define RH_PORT_SUSPEND 0x02 54 | #define RH_PORT_OVER_CURRENT 0x03 55 | #define RH_PORT_RESET 0x04 56 | #define RH_PORT_POWER 0x08 57 | #define RH_PORT_LOW_SPEED 0x09 58 | 59 | #define RH_C_PORT_CONNECTION 0x10 60 | #define RH_C_PORT_ENABLE 0x11 61 | #define RH_C_PORT_SUSPEND 0x12 62 | #define RH_C_PORT_OVER_CURRENT 0x13 63 | #define RH_C_PORT_RESET 0x14 64 | 65 | /* Hub features */ 66 | #define RH_C_HUB_LOCAL_POWER 0x00 67 | #define RH_C_HUB_OVER_CURRENT 0x01 68 | 69 | #define RH_DEVICE_REMOTE_WAKEUP 0x00 70 | #define RH_ENDPOINT_STALL 0x01 71 | 72 | #define RH_ACK 0x01 73 | #define RH_REQ_ERR -1 74 | #define RH_NACK 0x00 75 | 76 | /* OHCI ROOT HUB REGISTER MASKS */ 77 | 78 | /* roothub.portstatus [i] bits */ 79 | #define RH_PS_CCS 0x00000001 /* current connect status */ 80 | #define RH_PS_PES 0x00000002 /* port enable status*/ 81 | #define RH_PS_PSS 0x00000004 /* port suspend status */ 82 | #define RH_PS_POCI 0x00000008 /* port over current indicator */ 83 | #define RH_PS_PRS 0x00000010 /* port reset status */ 84 | #define RH_PS_PPS 0x00000100 /* port power status */ 85 | #define RH_PS_LSDA 0x00000200 /* low speed device attached */ 86 | #define RH_PS_CSC 0x00010000 /* connect status change */ 87 | #define RH_PS_PESC 0x00020000 /* port enable status change */ 88 | #define RH_PS_PSSC 0x00040000 /* port suspend status change */ 89 | #define RH_PS_OCIC 0x00080000 /* over current indicator change */ 90 | #define RH_PS_PRSC 0x00100000 /* port reset status change */ 91 | 92 | /* roothub.status bits */ 93 | #define RH_HS_LPS 0x00000001 /* local power status */ 94 | #define RH_HS_OCI 0x00000002 /* over current indicator */ 95 | #define RH_HS_DRWE 0x00008000 /* device remote wakeup enable */ 96 | #define RH_HS_LPSC 0x00010000 /* local power status change */ 97 | #define RH_HS_OCIC 0x00020000 /* over current indicator change */ 98 | #define RH_HS_CRWE 0x80000000 /* clear remote wakeup enable */ 99 | 100 | /* roothub.b masks */ 101 | #define RH_B_DR 0x0000ffff /* device removable flags */ 102 | #define RH_B_PPCM 0xffff0000 /* port power control mask */ 103 | 104 | /* roothub.a masks */ 105 | #define RH_A_NDP (0xff << 0) /* number of downstream ports */ 106 | #define RH_A_PSM (1 << 8) /* power switching mode */ 107 | #define RH_A_NPS (1 << 9) /* no power switching */ 108 | #define RH_A_DT (1 << 10) /* device type (mbz) */ 109 | #define RH_A_OCPM (1 << 11) /* over current protection mode */ 110 | #define RH_A_NOCP (1 << 12) /* no over current protection */ 111 | #define RH_A_POTPGT (0xff << 24) /* power on to power good time */ 112 | 113 | #define DWC_OTG_HC_PID_DATA0 0 114 | #define DWC_OTG_HC_PID_DATA2 1 115 | #define DWC_OTG_HC_PID_DATA1 2 116 | #define DWC_OTG_HC_PID_MDATA 3 117 | #define DWC_OTG_HC_PID_SETUP 3 118 | 119 | /** Macros defined for DWC OTG HW Release verison */ 120 | #define OTG_CORE_REV_2_60a 0x4F54260A 121 | #define OTG_CORE_REV_2_71a 0x4F54271A 122 | #define OTG_CORE_REV_2_72a 0x4F54272A 123 | #define OTG_CORE_REV_2_80a 0x4F54280A 124 | #define OTG_CORE_REV_2_81a 0x4F54281A 125 | #define OTG_CORE_REV_2_90a 0x4F54290A 126 | 127 | #define DWC_OTG_EP_TYPE_CONTROL 0 128 | #define DWC_OTG_EP_TYPE_ISOC 1 129 | #define DWC_OTG_EP_TYPE_BULK 2 130 | #define DWC_OTG_EP_TYPE_INTR 3 131 | 132 | #define DWC_OTG_EP_SPEED_LOW 0 133 | #define DWC_OTG_EP_SPEED_FULL 1 134 | #define DWC_OTG_EP_SPEED_HIGH 2 135 | 136 | /** Maximum number of Periodic FIFOs */ 137 | #define MAX_PERIO_FIFOS 15 138 | /** Maximum number of Periodic FIFOs */ 139 | #define MAX_TX_FIFOS 15 140 | 141 | /** Maximum number of Endpoints/HostChannels */ 142 | #define MAX_EPS_CHANNELS 16 143 | 144 | #endif /* __DWC_OTG_H__ */ 145 | 146 | -------------------------------------------------------------------------------- /driver/usb/host/dwc_otg.su: -------------------------------------------------------------------------------- 1 | dwc_otg.c:1578:13:init_fslspclksel 0 static 2 | dwc_otg.c:18:6:dwc_write_reg32 0 static 3 | dwc_otg.c:23:10:dwc_read_reg32 0 static 4 | dwc_otg.c:28:6:dwc_modify_reg32 0 static 5 | dwc_otg.c:44:9:dwc_otg_is_host_mode 0 static 6 | dwc_otg.c:83:10:dwc_otg_read_hprt0 0 static 7 | dwc_otg.c:100:5:dwc_otg_set_param_otg_cap 8 static 8 | dwc_otg.c:159:9:dwc_otg_get_param_otg_cap 0 static 9 | dwc_otg.c:164:5:dwc_otg_set_param_opt 8 static 10 | dwc_otg.c:174:9:dwc_otg_get_param_opt 0 static 11 | dwc_otg.c:204:9:dwc_otg_get_param_dma_enable 0 static 12 | dwc_otg.c:209:5:dwc_otg_set_param_dma_desc_enable 8 static 13 | dwc_otg.c:179:5:dwc_otg_set_param_dma_enable 16 static 14 | dwc_otg.c:234:9:dwc_otg_get_param_dma_desc_enable 0 static 15 | dwc_otg.c:239:5:dwc_otg_set_param_host_support_fs_ls_low_power 8 static 16 | dwc_otg.c:251:9:dwc_otg_get_param_host_support_fs_ls_low_power 0 static 17 | dwc_otg.c:257:5:dwc_otg_set_param_enable_dynamic_fifo 16 static 18 | dwc_otg.c:281:9:dwc_otg_get_param_enable_dynamic_fifo 0 static 19 | dwc_otg.c:286:5:dwc_otg_set_param_data_fifo_size 8 static 20 | dwc_otg.c:310:9:dwc_otg_get_param_data_fifo_size 0 static 21 | dwc_otg.c:315:5:dwc_otg_set_param_dev_rx_fifo_size 8 static 22 | dwc_otg.c:336:9:dwc_otg_get_param_dev_rx_fifo_size 0 static 23 | dwc_otg.c:341:5:dwc_otg_set_param_dev_nperio_tx_fifo_size 8 static 24 | dwc_otg.c:369:9:dwc_otg_get_param_dev_nperio_tx_fifo_size 0 static 25 | dwc_otg.c:374:5:dwc_otg_set_param_host_rx_fifo_size 8 static 26 | dwc_otg.c:401:9:dwc_otg_get_param_host_rx_fifo_size 0 static 27 | dwc_otg.c:406:5:dwc_otg_set_param_host_nperio_tx_fifo_size 8 static 28 | dwc_otg.c:434:9:dwc_otg_get_param_host_nperio_tx_fifo_size 0 static 29 | dwc_otg.c:439:5:dwc_otg_set_param_host_perio_tx_fifo_size 8 static 30 | dwc_otg.c:467:9:dwc_otg_get_param_host_perio_tx_fifo_size 0 static 31 | dwc_otg.c:472:5:dwc_otg_set_param_max_transfer_size 8 static 32 | dwc_otg.c:500:9:dwc_otg_get_param_max_transfer_size 0 static 33 | dwc_otg.c:505:5:dwc_otg_set_param_max_packet_count 8 static 34 | dwc_otg.c:531:9:dwc_otg_get_param_max_packet_count 0 static 35 | dwc_otg.c:536:5:dwc_otg_set_param_host_channels 8 static 36 | dwc_otg.c:561:9:dwc_otg_get_param_host_channels 0 static 37 | dwc_otg.c:566:5:dwc_otg_set_param_dev_endpoints 8 static 38 | dwc_otg.c:591:9:dwc_otg_get_param_dev_endpoints 0 static 39 | dwc_otg.c:596:5:dwc_otg_set_param_phy_type 16 static 40 | dwc_otg.c:640:9:dwc_otg_get_param_phy_type 0 static 41 | dwc_otg.c:645:5:dwc_otg_set_param_speed 8 static 42 | dwc_otg.c:669:9:dwc_otg_get_param_speed 0 static 43 | dwc_otg.c:674:5:dwc_otg_set_param_host_ls_low_power_phy_clk 8 static 44 | dwc_otg.c:704:9:dwc_otg_get_param_host_ls_low_power_phy_clk 0 static 45 | dwc_otg.c:709:5:dwc_otg_set_param_phy_ulpi_ddr 8 static 46 | dwc_otg.c:721:9:dwc_otg_get_param_phy_ulpi_ddr 0 static 47 | dwc_otg.c:726:5:dwc_otg_set_param_phy_ulpi_ext_vbus 8 static 48 | dwc_otg.c:739:9:dwc_otg_get_param_phy_ulpi_ext_vbus 0 static 49 | dwc_otg.c:744:5:dwc_otg_set_param_phy_utmi_width 8 static 50 | dwc_otg.c:756:9:dwc_otg_get_param_phy_utmi_width 0 static 51 | dwc_otg.c:761:5:dwc_otg_set_param_ulpi_fs_ls 8 static 52 | dwc_otg.c:773:9:dwc_otg_get_param_ulpi_fs_ls 0 static 53 | dwc_otg.c:778:5:dwc_otg_set_param_ts_dline 8 static 54 | dwc_otg.c:790:9:dwc_otg_get_param_ts_dline 0 static 55 | dwc_otg.c:795:5:dwc_otg_set_param_i2c_enable 16 static 56 | dwc_otg.c:818:9:dwc_otg_get_param_i2c_enable 0 static 57 | dwc_otg.c:823:5:dwc_otg_set_param_dev_perio_tx_fifo_size 16 static 58 | dwc_otg.c:847:9:dwc_otg_get_param_dev_perio_tx_fifo_size 0 static 59 | dwc_otg.c:853:5:dwc_otg_set_param_en_multiple_tx_fifo 16 static 60 | dwc_otg.c:876:9:dwc_otg_get_param_en_multiple_tx_fifo 0 static 61 | dwc_otg.c:881:5:dwc_otg_set_param_dev_tx_fifo_size 16 static 62 | dwc_otg.c:905:9:dwc_otg_get_param_dev_tx_fifo_size 0 static 63 | dwc_otg.c:911:5:dwc_otg_set_param_thr_ctl 8 static 64 | dwc_otg.c:936:9:dwc_otg_get_param_thr_ctl 0 static 65 | dwc_otg.c:941:5:dwc_otg_set_param_lpm_enable 16 static 66 | dwc_otg.c:964:9:dwc_otg_get_param_lpm_enable 0 static 67 | dwc_otg.c:969:5:dwc_otg_set_param_tx_thr_length 8 static 68 | dwc_otg.c:981:9:dwc_otg_get_param_tx_thr_length 0 static 69 | dwc_otg.c:986:5:dwc_otg_set_param_rx_thr_length 8 static 70 | dwc_otg.c:998:9:dwc_otg_get_param_rx_thr_length 0 static 71 | dwc_otg.c:1003:5:dwc_otg_set_param_dma_burst_size 8 static 72 | dwc_otg.c:1020:9:dwc_otg_get_param_dma_burst_size 0 static 73 | dwc_otg.c:1025:5:dwc_otg_set_param_pti_enable 8 static 74 | dwc_otg.c:1044:9:dwc_otg_get_param_pti_enable 0 static 75 | dwc_otg.c:1049:5:dwc_otg_set_param_mpi_enable 16 static 76 | dwc_otg.c:1068:9:dwc_otg_get_param_mpi_enable 0 static 77 | dwc_otg.c:1073:5:dwc_otg_set_param_ic_usb_cap 16 static 78 | dwc_otg.c:1094:9:dwc_otg_get_param_ic_usb_cap 0 static 79 | dwc_otg.c:1099:5:dwc_otg_set_param_ahb_thr_ratio 16 static 80 | dwc_otg.c:1126:9:dwc_otg_get_param_ahb_thr_ratio 0 static 81 | dwc_otg.c:1132:10:dwc_otg_get_hnpstatus 0 static 82 | dwc_otg.c:1139:10:dwc_otg_get_srpstatus 0 static 83 | dwc_otg.c:1146:6:dwc_otg_set_hnpreq 0 static 84 | dwc_otg.c:1154:10:dwc_otg_get_gsnpsid 0 static 85 | dwc_otg.c:1159:10:dwc_otg_get_mode 0 static 86 | dwc_otg.c:1166:10:dwc_otg_get_hnpcapable 0 static 87 | dwc_otg.c:1173:6:dwc_otg_set_hnpcapable 0 static 88 | dwc_otg.c:1181:10:dwc_otg_get_srpcapable 0 static 89 | dwc_otg.c:1188:6:dwc_otg_set_srpcapable 0 static 90 | dwc_otg.c:1196:10:dwc_otg_get_busconnected 0 static 91 | dwc_otg.c:1203:10:dwc_otg_get_prtpower 0 static 92 | dwc_otg.c:1211:6:dwc_otg_set_prtpower 0 static 93 | dwc_otg.c:1219:10:dwc_otg_get_prtsuspend 0 static 94 | dwc_otg.c:1227:6:dwc_otg_set_prtsuspend 0 static 95 | dwc_otg.c:1235:6:dwc_otg_set_prtresume 0 static 96 | dwc_otg.c:1243:10:dwc_otg_get_lpm_portsleepstatus 0 static 97 | dwc_otg.c:1251:10:dwc_otg_get_lpm_remotewakeenabled 0 static 98 | dwc_otg.c:1258:10:dwc_otg_get_lpmresponse 0 static 99 | dwc_otg.c:1265:6:dwc_otg_set_lpmresponse 0 static 100 | dwc_otg.c:1273:10:dwc_otg_get_hsic_connect 0 static 101 | dwc_otg.c:1280:6:dwc_otg_set_hsic_connect 0 static 102 | dwc_otg.c:1288:10:dwc_otg_get_inv_sel_hsic 0 static 103 | dwc_otg.c:1296:6:dwc_otg_set_inv_sel_hsic 0 static 104 | dwc_otg.c:1304:10:dwc_otg_get_gotgctl 0 static 105 | dwc_otg.c:1309:6:dwc_otg_set_gotgctl 0 static 106 | dwc_otg.c:1314:10:dwc_otg_get_gusbcfg 0 static 107 | dwc_otg.c:1319:6:dwc_otg_set_gusbcfg 0 static 108 | dwc_otg.c:1324:10:dwc_otg_get_grxfsiz 0 static 109 | dwc_otg.c:1329:6:dwc_otg_set_grxfsiz 0 static 110 | dwc_otg.c:1334:10:dwc_otg_get_gnptxfsiz 0 static 111 | dwc_otg.c:1339:6:dwc_otg_set_gnptxfsiz 0 static 112 | dwc_otg.c:1344:10:dwc_otg_get_gpvndctl 0 static 113 | dwc_otg.c:1349:6:dwc_otg_set_gpvndctl 0 static 114 | dwc_otg.c:1354:10:dwc_otg_get_ggpio 0 static 115 | dwc_otg.c:1359:6:dwc_otg_set_ggpio 0 static 116 | dwc_otg.c:1364:10:dwc_otg_get_hprt0 0 static 117 | dwc_otg.c:1370:6:dwc_otg_set_hprt0 0 static 118 | dwc_otg.c:1375:10:dwc_otg_get_guid 0 static 119 | dwc_otg.c:1380:6:dwc_otg_set_guid 0 static 120 | dwc_otg.c:1385:10:dwc_otg_get_hptxfsiz 0 static 121 | dwc_otg.c:1472:6:dwc_otg_cil_init 24 static 122 | dwc_otg.c:1606:6:dwc_otg_flush_tx_fifo 24 static 123 | dwc_otg.c:1638:6:dwc_otg_flush_rx_fifo 24 static 124 | dwc_otg.c:1676:6:dwc_otg_core_host_init 40 static 125 | dwc_otg.c:1825:6:dwc_otg_core_reset 24 static 126 | dwc_otg.c:1872:6:dwc_otg_core_init 24 static 127 | dwc_otg.c:2138:6:dwc_otg_hc_init 0 static 128 | -------------------------------------------------------------------------------- /driver/watchdog/watchdog.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include "log.h" 4 | #include "watchdog.h" 5 | 6 | PRIVATE u32 default_timeout = 10; /* 1000 tick */ 7 | 8 | PUBLIC u32 watchdog_init() 9 | { 10 | return 0; 11 | } 12 | 13 | PUBLIC s32 watchdog_ctrl(u32 cmd, ...) 14 | { 15 | va_list args; 16 | va_start(args, cmd); 17 | u32 cur_rstc; 18 | u32 timeout = 0; 19 | 20 | switch (cmd) { 21 | case (WDT_START): 22 | cur_rstc = readl(WATCHDOG_RSTC); 23 | writel(WATCHDOG_RSTC, WDT_PASSWORD | (cur_rstc & 0xFFFFFFCF) | 0x00000020); 24 | break; 25 | case (WDT_STOP): 26 | writel(WATCHDOG_RSTC, WDT_PASSWORD | 0x00000102); 27 | break; 28 | case (WDT_FEED): 29 | writel(WATCHDOG_WDOG, WDT_PASSWORD | ((default_timeout) & 0x000FFFFF)); 30 | cur_rstc = readl(WATCHDOG_RSTC); 31 | writel(WATCHDOG_RSTC, WDT_PASSWORD | (cur_rstc & 0xFFFFFFCF) | 0x00000020); 32 | break; 33 | case (WDT_SET_TIMEOUT): 34 | timeout = va_arg(args, u32); 35 | va_end(args); 36 | writel(WATCHDOG_WDOG, WDT_PASSWORD | ((timeout) & 0x000FFFFF)); 37 | break; 38 | default: 39 | PRINT_ERR("unknown watchdog cmd %x \n", cmd); 40 | return -1; 41 | break; 42 | } 43 | 44 | return 0; 45 | } 46 | -------------------------------------------------------------------------------- /include/driver/common.h: -------------------------------------------------------------------------------- 1 | #ifndef __COMMON_H__ 2 | #define __COMMON_H__ 3 | 4 | #define ALLOC_ALIGN_BUFFER(type, name, size, align) \ 5 | char __##name[ROUND(size * sizeof(type), align) + (align - 1)]; \ 6 | \ 7 | type *name = (type *) ALIGN((u32)__##name, align) 8 | #define ALLOC_CACHE_ALIGN_BUFFER(type, name, size) \ 9 | ALLOC_ALIGN_BUFFER(type, name, size, ARCH_DMA_MINALIGN) 10 | 11 | #define ROUND(a,b) (((a) + (b) - 1) & ~((b) - 1)) 12 | #define ALIGN(x,a) __ALIGN_MASK((x),(typeof(x))(a)-1) 13 | #define __ALIGN_MASK(x,mask) (((x)+(mask))&~(mask)) 14 | 15 | #endif /* __COMMON_H__ */ 16 | -------------------------------------------------------------------------------- /include/driver/dma.h: -------------------------------------------------------------------------------- 1 | #ifndef __DMA_H__ 2 | #define __DMA_H__ 3 | 4 | #endif /* __DMA_H__ */ 5 | -------------------------------------------------------------------------------- /include/driver/dram.h: -------------------------------------------------------------------------------- 1 | #ifndef __DRAM_H__ 2 | #define __DRAM_H__ 3 | 4 | u32 dram_init(void); 5 | 6 | #endif /* __DRAM_H__ */ 7 | -------------------------------------------------------------------------------- /include/driver/gpio.h: -------------------------------------------------------------------------------- 1 | #ifndef __GPIO_H__ 2 | #define __GPIO_H__ 3 | 4 | enum { 5 | GPIO_0 = 0, 6 | GPIO_1, 7 | GPIO_2, 8 | GPIO_3, 9 | GPIO_4, 10 | GPIO_5, 11 | GPIO_6, 12 | GPIO_7, 13 | GPIO_8, 14 | GPIO_9, 15 | GPIO_10, 16 | GPIO_11, 17 | GPIO_12, 18 | GPIO_13, 19 | GPIO_14, 20 | GPIO_15, 21 | GPIO_16, 22 | GPIO_17, 23 | GPIO_18, 24 | GPIO_19, 25 | GPIO_20, 26 | GPIO_21, 27 | GPIO_22, 28 | GPIO_23, 29 | GPIO_24, 30 | GPIO_25, 31 | GPIO_26, 32 | GPIO_27, 33 | GPIO_28, 34 | GPIO_29, 35 | GPIO_30, 36 | GPIO_31, 37 | GPIO_32, 38 | GPIO_33, 39 | GPIO_34, 40 | GPIO_35, 41 | GPIO_36, 42 | GPIO_37, 43 | GPIO_38, 44 | GPIO_39, 45 | GPIO_40, 46 | GPIO_41, 47 | GPIO_42, 48 | GPIO_43, 49 | GPIO_44, 50 | GPIO_45, 51 | GPIO_46, 52 | GPIO_47, 53 | GPIO_48, 54 | GPIO_49, 55 | GPIO_50, 56 | GPIO_51, 57 | GPIO_52, 58 | GPIO_53, 59 | GPIO_NR_MAX, 60 | }; 61 | 62 | enum { 63 | INPUT = 0, /* 0 */ 64 | OUTPUT, /* 1 */ 65 | ALT_FUNC_5, /* 2 */ /* yes, the arrange is strange */ 66 | ALT_FUNC_4, /* 3 */ 67 | ALT_FUNC_0, /* 4 */ 68 | ALT_FUNC_1, /* 5 */ 69 | ALT_FUNC_2, /* 6 */ 70 | ALT_FUNC_3, /* 7 */ 71 | ALT_FUNC_MAX, 72 | }; 73 | 74 | struct _gpio_fsel_reg { 75 | u32 fsel0 : 3; 76 | u32 fsel1 : 3; 77 | u32 fsel2 : 3; 78 | u32 fsel3 : 3; 79 | u32 fsel4 : 3; 80 | u32 fsel5 : 3; 81 | u32 fsel6 : 3; 82 | u32 fsel7 : 3; 83 | u32 fsel8 : 3; 84 | u32 fsel9 : 3; 85 | u32 reserved : 2; 86 | }__attribute__((__packed__)); 87 | 88 | union gpio_fsel_reg { 89 | u32 value; 90 | struct _gpio_fsel_reg reg; 91 | }; 92 | 93 | s32 gpio_set_function(u32 gpio_index, u32 func_index); 94 | u32 gpio_get_function(u32 gpio_index); 95 | 96 | s32 gpio_set_output(u32 gpio_index, u32 bit); 97 | 98 | #endif /* __GPIO_H__ */ 99 | -------------------------------------------------------------------------------- /include/driver/i2c.h: -------------------------------------------------------------------------------- 1 | #ifndef __I2C_H__ 2 | #define __I2C_H__ 3 | 4 | #define BSC0_ADDR ((bscdevice_t *)0x20205000) 5 | #define BSC1_ADDR ((bscdevice_t *)0x20804000) 6 | #define BSC2_ADDR ((bscdevice_t *)0x20805000) 7 | 8 | #define BSC_CLOCK_FREQ 150000000 9 | 10 | /* I2C control flags */ 11 | #define BSC_I2CEN BIT(15) 12 | #define BSC_INTR BIT(10) 13 | #define BSC_INTT BIT(9) 14 | #define BSC_INTD BIT(8) 15 | #define BSC_ST BIT(7) 16 | #define BSC_CLEAR BIT(4) 17 | #define BSC_READ BIT(0) 18 | 19 | /* I2C status flags */ 20 | #define BSC_TA BIT(0) /** @brief Transfer active.*/ 21 | #define BSC_DONE BIT(1) /** @brief Transfer done.*/ 22 | #define BSC_TXW BIT(2) /** @brief FIFO needs writing.*/ 23 | #define BSC_RXR BIT(3) /** @brief FIFO needs reading.*/ 24 | #define BSC_TXD BIT(4) /** @brief FIFO can accept data.*/ 25 | #define BSC_RXD BIT(5) /** @brief FIFO contains data.*/ 26 | #define BSC_TXE BIT(6) /** @brief FIFO empty.*/ 27 | #define BSC_RXF BIT(7) /** @brief FIFO full.*/ 28 | #define BSC_ERR BIT(8) /** @brief ACK error.*/ 29 | #define BSC_CLKT BIT(9) /** @brief Clock stretch timeout.*/ 30 | 31 | /* Rising/Falling Edge Delay Defaults.*/ 32 | #define BSC_DEFAULT_FEDL 0x30 33 | #define BSC_DEFAULT_REDL 0x30 34 | 35 | /* Clock Stretch Timeout Defaults.*/ 36 | #define BSC_DEFAULT_CLKT 0x40 37 | 38 | #define CLEAR_STATUS BSC_CLKT|BSC_ERR|BSC_DONE 39 | 40 | #define START_READ BSC_I2CEN|BSC_ST|BSC_CLEAR|BSC_READ 41 | #define START_WRITE BSC_I2CEN|BSC_ST 42 | 43 | 44 | #define I2CD_NO_ERROR 0x00 /**< @brief No error. */ 45 | #define I2CD_BUS_ERROR 0x01 /**< @brief Bus Error. */ 46 | #define I2CD_ARBITRATION_LOST 0x02 /**< @brief Arbitration Lost 47 | (master mode). */ 48 | #define I2CD_ACK_FAILURE 0x04 /**< @brief Acknowledge Failure. */ 49 | #define I2CD_OVERRUN 0x08 /**< @brief Overrun/Underrun. */ 50 | #define I2CD_PEC_ERROR 0x10 /**< @brief PEC Error in 51 | reception. */ 52 | #define I2CD_TIMEOUT 0x20 /**< @brief Hardware timeout. */ 53 | #define I2CD_SMB_ALERT 0x40 /**< @brief SMBus Alert. */ 54 | 55 | typedef enum { 56 | I2C_UNINIT = 0, /**< Not initialized. */ 57 | I2C_STOP = 1, /**< Stopped. */ 58 | I2C_READY = 2, /**< Ready. */ 59 | I2C_ACTIVE_TX = 3, /**< Transmitting. */ 60 | I2C_ACTIVE_RX = 4, /**< Receiving. */ 61 | I2C_LOCKED = 5 /**> Bus or driver locked. */ 62 | } i2cstate_t; 63 | 64 | struct bscdevice_t { 65 | volatile unsigned int control; 66 | volatile unsigned int status; 67 | volatile unsigned int dataLength; 68 | volatile unsigned int slaveAddress; 69 | volatile unsigned int dataFifo; 70 | volatile unsigned int clockDivider; 71 | volatile unsigned int dataDelay; 72 | volatile unsigned int clockStretchTimeout; 73 | }; 74 | 75 | typedef struct bscdevice_t bscdevice_t; 76 | 77 | /** 78 | * @brief Type of a structure representing an I2C driver. 79 | */ 80 | typedef struct I2CDriver I2CDriver; 81 | 82 | /** 83 | * @brief I2C completion callback type. 84 | * 85 | * @param[in] i2cp pointer to the @p I2CDriver object 86 | * @param[in] sts operation status 87 | */ 88 | typedef void (*i2ccallback_t)(I2CDriver *i2cp, u32 sts); 89 | 90 | /** 91 | * @brief Driver configuration structure. 92 | * @note Implementations may extend this structure to contain more, 93 | * architecture dependent, fields. 94 | */ 95 | typedef struct { 96 | /** @brief I2C bus bit rate.*/ 97 | u32 ic_speed; 98 | /* End of the mandatory fields.*/ 99 | } I2CConfig; 100 | 101 | /** 102 | * @brief Structure representing an I2C driver. 103 | * @note Implementations may extend this structure to contain more, 104 | * architecture dependent, fields. 105 | */ 106 | struct I2CDriver { 107 | /** @brief Driver state.*/ 108 | i2cstate_t state; 109 | /** @brief Current configuration data.*/ 110 | const I2CConfig *config; 111 | /** @brief Error flags.*/ 112 | u32 errors; 113 | /** @brief BSC device registers.*/ 114 | bscdevice_t *device; 115 | #if I2C_USE_MUTUAL_EXCLUSION 116 | #if CH_USE_MUTEXES 117 | Mutex mutex; 118 | #endif /* CH_USE_MUTEXES */ 119 | #endif /* I2C_USE_MUTUAL_EXCLUSION */ 120 | /* End of the mandatory fields.*/ 121 | /** 122 | * @brief Thread waiting for I/O completion. 123 | */ 124 | /* Thread *thread; */ 125 | /** 126 | * @brief Address of slave device. 127 | */ 128 | u16 addr; 129 | /** 130 | * @brief Pointer to the buffer with data to send. 131 | */ 132 | const u8 *txbuf; 133 | /** 134 | * @brief Number of bytes of data to send. 135 | */ 136 | u32 txbytes; 137 | /** 138 | * @brief Current index in buffer when sending data. 139 | */ 140 | u32 txidx; 141 | /** 142 | * @brief Pointer to the buffer to put received data. 143 | */ 144 | u8 *rxbuf; 145 | /** 146 | * @brief Number of bytes of data to receive. 147 | */ 148 | u32 rxbytes; 149 | /** 150 | * @brief Current index in buffer when receiving data. 151 | */ 152 | u32 rxidx; 153 | }; 154 | 155 | /*===========================================================================*/ 156 | /* Driver macros. */ 157 | /*===========================================================================*/ 158 | 159 | #define i2c_lld_master_start(i2cp, header) 160 | 161 | #define i2c_lld_master_stop(i2cp) 162 | 163 | #define i2c_lld_master_restart(i2cp) 164 | 165 | #define i2c_lld_get_errors(i2cp) ((i2cp)->errors) 166 | 167 | /*===========================================================================*/ 168 | /* External declarations. */ 169 | /*===========================================================================*/ 170 | 171 | extern I2CDriver I2C0; 172 | 173 | void i2c_lld_init(void); 174 | void i2c_lld_start(I2CDriver *i2cp); 175 | void i2c_lld_stop(I2CDriver *i2cp); 176 | 177 | s32 i2c_lld_master_transmit_timeout(I2CDriver *i2cp, u16 addr, 178 | const u8 *txbuf, u32 txbytes, 179 | u8 *rxbuf, const u8 rxbytes, 180 | u32 timeout); 181 | 182 | s32 i2c_lld_master_receive_timeout(I2CDriver *i2cp, u16 addr, 183 | u8 *rxbuf, u32 rxbytes, 184 | u32 timeout); 185 | 186 | void i2c_lld_serve_interrupt(I2CDriver *i2cp); 187 | 188 | #endif /* __I2C_H__ */ 189 | -------------------------------------------------------------------------------- /include/driver/log.h: -------------------------------------------------------------------------------- 1 | #ifndef __LOG_H__ 2 | #define __LOG_H__ 3 | #include 4 | #include "timer.h" 5 | 6 | #define FORMAT_BUF_SIZE 200 7 | enum LOG_LEVEL_E { 8 | LOG_EMG = 0, 9 | LOG_ERR, 10 | LOG_WARN, 11 | LOG_INFO, 12 | LOG_DEBUG, 13 | LOG_MAX, 14 | }; 15 | 16 | s32 set_log_level(u32 log_level); 17 | s32 log(u32 log_level, const char *format, ...); 18 | s32 dump_log(); 19 | 20 | #define PRINT_EMG(fmt, ...) log(LOG_EMG, "[%X]"fmt, (u32)get_syscounter(), ##__VA_ARGS__) 21 | #define PRINT_ERR(fmt, ...) log(LOG_ERR, "[%X]"fmt, (u32)get_syscounter(), ##__VA_ARGS__) 22 | #define PRINT_WARN(fmt, ...) log(LOG_WARN, "[%X]"fmt, (u32)get_syscounter(), ##__VA_ARGS__) 23 | #define PRINT_INFO(fmt, ...) log(LOG_INFO, "[%X]"fmt, (u32)get_syscounter(), ##__VA_ARGS__) 24 | #define PRINT_DEBUG(fmt, ...) log(LOG_DEBUG, "[%X]"fmt, (u32)get_syscounter(), ##__VA_ARGS__) 25 | 26 | #define PRINT_STAMP() PRINT_EMG("%s:%s:%d\n", __FILE__, __func__, __LINE__) 27 | #define SHOW_VAR(var) PRINT_EMG(#var"\t 0x%x\n", var) 28 | 29 | #endif /* __LOG_H__ */ 30 | -------------------------------------------------------------------------------- /include/driver/mmio.h: -------------------------------------------------------------------------------- 1 | #ifndef __MMIO_H__ 2 | #define __MMIO_H__ 3 | 4 | #include 5 | 6 | #define readb(addr) (*((u8*)addr)) 7 | #define writeb(addr, data) (*((volatile u8*)addr) = data) 8 | 9 | #define get_bit(x, bit_index) ((x >> bit_index) & 0x1) 10 | 11 | static inline void set_bit(u32 *x, u32 bit_index, u32 b) { 12 | u32 _x; 13 | u32 bit_mask; 14 | _x = *x; 15 | if (get_bit(_x, bit_index) != b) { 16 | if (b == 0) { 17 | bit_mask = ~(0x1 << bit_index); 18 | *x = (_x) & bit_mask; 19 | } else { /* b == 1 */ 20 | bit_mask = (0x1 << bit_index); 21 | *x = (_x) | bit_mask; 22 | } 23 | } 24 | } 25 | 26 | static inline void writel(u32 addr, u32 data) { 27 | u32 *ptr = (u32*)addr; 28 | asm volatile("str %[data], [%[addr]]" 29 | : 30 | : [addr]"r"(ptr), [data]"r"(data)); 31 | } 32 | 33 | static inline u32 readl(u32 addr) { 34 | u32 *ptr = (u32*)addr; 35 | u32 data; 36 | asm volatile("ldr %[data], [%[addr]]" 37 | : [data]"=r"(data) 38 | : [addr]"r"(ptr)); 39 | return data; 40 | } 41 | 42 | #endif /* __MMIO_H__ */ 43 | -------------------------------------------------------------------------------- /include/driver/pwm.h: -------------------------------------------------------------------------------- 1 | #ifndef __PWM_H__ 2 | #define __PWM_H__ 3 | 4 | #include 5 | 6 | #define PWM_CTL (0x2020C000) 7 | #define PWM_STATUS (0x2020C004) 8 | 9 | #define PWM0_RANGE (0x2020C010) 10 | #define PWM0_DATA (0x2020C014) 11 | 12 | #define PWM1_RANGE (0x2020C020) 13 | #define PWM1_DATA (0x2020C024) 14 | 15 | #define PWM0_ENABLE BIT(0) 16 | #define PWM0_MODE_MS BIT(7) 17 | 18 | #define PWM1_ENABLE BIT(8) 19 | #define PWM1_MODE_MS BIT(15) 20 | 21 | #define PWM_MODE_MS 0xFF 22 | 23 | #define GPIO_CLK_PWD 0x5a000000 24 | 25 | #define GPIO0_CLK_CTL (0x201010A0) 26 | #define GPIO0_CLK_DIV (0x201010A4) 27 | 28 | void pwm_init(void); 29 | void pwm_start(u32 period); 30 | void pwm_stop(); 31 | void pwm_set_period(u32 period); 32 | void pwm_enable_channel(u8 channel, u32 width); 33 | void pwm_disable_channel(u8 channel); 34 | 35 | #endif /* __PWM_H__ */ 36 | -------------------------------------------------------------------------------- /include/driver/sdhci.h: -------------------------------------------------------------------------------- 1 | /* 2 | * (C) Copyright 2012 Stephen Warren 3 | * 4 | * See file CREDITS for list of people who contributed to this 5 | * project. 6 | * 7 | * This program is free software; you can redistribute it and/or 8 | * modify it under the terms of the GNU General Public License 9 | * version 2 as published by the Free Software Foundation. 10 | * 11 | * This program is distributed in the hope that it will be useful, but 12 | * WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU General Public License for more details. 15 | */ 16 | 17 | #ifndef __SDHCI_H__ 18 | #define __SDHCI_H__ 19 | 20 | #include "mmc.h" 21 | 22 | #define BCM2835_SDHCI_BASE 0x20300000 23 | 24 | int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq); 25 | 26 | 27 | 28 | 29 | /* 30 | * Copyright 2011, Marvell Semiconductor Inc. 31 | * Lei Wen 32 | * 33 | * See file CREDITS for list of people who contributed to this 34 | * project. 35 | * 36 | * This program is free software; you can redistribute it and/or 37 | * modify it under the terms of the GNU General Public License as 38 | * published by the Free Software Foundation; either version 2 of 39 | * the License, or (at your option) any later version. 40 | * 41 | * This program is distributed in the hope that it will be useful, 42 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 43 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 44 | * GNU General Public License for more details. 45 | * 46 | * You should have received a copy of the GNU General Public License 47 | * along with this program; if not, write to the Free Software 48 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 49 | * MA 02111-1307 USA 50 | * 51 | * Back ported to the 8xx platform (from the 8260 platform) by 52 | * Murray.Jensen@cmst.csiro.au, 27-Jan-01. 53 | */ 54 | 55 | /* 56 | * Controller registers 57 | */ 58 | 59 | #define SDHCI_DMA_ADDRESS 0x00 60 | 61 | #define SDHCI_BLOCK_SIZE 0x04 62 | #define SDHCI_MAKE_BLKSZ(dma, blksz) (((dma & 0x7) << 12) | (blksz & 0xFFF)) 63 | 64 | #define SDHCI_BLOCK_COUNT 0x06 65 | 66 | #define SDHCI_ARGUMENT 0x08 67 | 68 | #define SDHCI_TRANSFER_MODE 0x0C 69 | #define SDHCI_TRNS_DMA 0x01 70 | #define SDHCI_TRNS_BLK_CNT_EN 0x02 71 | #define SDHCI_TRNS_ACMD12 0x04 72 | #define SDHCI_TRNS_READ 0x10 73 | #define SDHCI_TRNS_MULTI 0x20 74 | 75 | #define SDHCI_COMMAND 0x0E 76 | #define SDHCI_CMD_RESP_MASK 0x03 77 | #define SDHCI_CMD_CRC 0x08 78 | #define SDHCI_CMD_INDEX 0x10 79 | #define SDHCI_CMD_DATA 0x20 80 | #define SDHCI_CMD_ABORTCMD 0xC0 81 | 82 | #define SDHCI_CMD_RESP_NONE 0x00 83 | #define SDHCI_CMD_RESP_LONG 0x01 84 | #define SDHCI_CMD_RESP_SHORT 0x02 85 | #define SDHCI_CMD_RESP_SHORT_BUSY 0x03 86 | 87 | #define SDHCI_MAKE_CMD(c, f) (((c & 0xff) << 8) | (f & 0xff)) 88 | #define SDHCI_GET_CMD(c) ((c>>8) & 0x3f) 89 | 90 | #define SDHCI_RESPONSE 0x10 91 | 92 | #define SDHCI_BUFFER 0x20 93 | 94 | #define SDHCI_PRESENT_STATE 0x24 95 | #define SDHCI_CMD_INHIBIT 0x00000001 96 | #define SDHCI_DATA_INHIBIT 0x00000002 97 | #define SDHCI_DOING_WRITE 0x00000100 98 | #define SDHCI_DOING_READ 0x00000200 99 | #define SDHCI_SPACE_AVAILABLE 0x00000400 100 | #define SDHCI_DATA_AVAILABLE 0x00000800 101 | #define SDHCI_CARD_PRESENT 0x00010000 102 | #define SDHCI_CARD_STATE_STABLE 0x00020000 103 | #define SDHCI_CARD_DETECT_PIN_LEVEL 0x00040000 104 | #define SDHCI_WRITE_PROTECT 0x00080000 105 | 106 | #define SDHCI_HOST_CONTROL 0x28 107 | #define SDHCI_CTRL_LED 0x01 108 | #define SDHCI_CTRL_4BITBUS 0x02 109 | #define SDHCI_CTRL_HISPD 0x04 110 | #define SDHCI_CTRL_DMA_MASK 0x18 111 | #define SDHCI_CTRL_SDMA 0x00 112 | #define SDHCI_CTRL_ADMA1 0x08 113 | #define SDHCI_CTRL_ADMA32 0x10 114 | #define SDHCI_CTRL_ADMA64 0x18 115 | #define SDHCI_CTRL_8BITBUS 0x20 116 | #define SDHCI_CTRL_CD_TEST_INS 0x40 117 | #define SDHCI_CTRL_CD_TEST 0x80 118 | 119 | #define SDHCI_POWER_CONTROL 0x29 120 | #define SDHCI_POWER_ON 0x01 121 | #define SDHCI_POWER_180 0x0A 122 | #define SDHCI_POWER_300 0x0C 123 | #define SDHCI_POWER_330 0x0E 124 | 125 | #define SDHCI_BLOCK_GAP_CONTROL 0x2A 126 | 127 | #define SDHCI_WAKE_UP_CONTROL 0x2B 128 | #define SDHCI_WAKE_ON_INT 0x01 129 | #define SDHCI_WAKE_ON_INSERT 0x02 130 | #define SDHCI_WAKE_ON_REMOVE 0x04 131 | 132 | #define SDHCI_CLOCK_CONTROL 0x2C 133 | #define SDHCI_DIVIDER_SHIFT 8 134 | #define SDHCI_DIVIDER_HI_SHIFT 6 135 | #define SDHCI_DIV_MASK 0xFF 136 | #define SDHCI_DIV_MASK_LEN 8 137 | #define SDHCI_DIV_HI_MASK 0x300 138 | #define SDHCI_CLOCK_CARD_EN 0x0004 139 | #define SDHCI_CLOCK_INT_STABLE 0x0002 140 | #define SDHCI_CLOCK_INT_EN 0x0001 141 | 142 | #define SDHCI_TIMEOUT_CONTROL 0x2E 143 | 144 | #define SDHCI_SOFTWARE_RESET 0x2F 145 | #define SDHCI_RESET_ALL 0x01 146 | #define SDHCI_RESET_CMD 0x02 147 | #define SDHCI_RESET_DATA 0x04 148 | 149 | #define SDHCI_INT_STATUS 0x30 150 | #define SDHCI_INT_ENABLE 0x34 151 | #define SDHCI_SIGNAL_ENABLE 0x38 152 | #define SDHCI_INT_RESPONSE 0x00000001 153 | #define SDHCI_INT_DATA_END 0x00000002 154 | #define SDHCI_INT_DMA_END 0x00000008 155 | #define SDHCI_INT_SPACE_AVAIL 0x00000010 156 | #define SDHCI_INT_DATA_AVAIL 0x00000020 157 | #define SDHCI_INT_CARD_INSERT 0x00000040 158 | #define SDHCI_INT_CARD_REMOVE 0x00000080 159 | #define SDHCI_INT_CARD_INT 0x00000100 160 | #define SDHCI_INT_ERROR 0x00008000 161 | #define SDHCI_INT_TIMEOUT 0x00010000 162 | #define SDHCI_INT_CRC 0x00020000 163 | #define SDHCI_INT_END_BIT 0x00040000 164 | #define SDHCI_INT_INDEX 0x00080000 165 | #define SDHCI_INT_DATA_TIMEOUT 0x00100000 166 | #define SDHCI_INT_DATA_CRC 0x00200000 167 | #define SDHCI_INT_DATA_END_BIT 0x00400000 168 | #define SDHCI_INT_BUS_POWER 0x00800000 169 | #define SDHCI_INT_ACMD12ERR 0x01000000 170 | #define SDHCI_INT_ADMA_ERROR 0x02000000 171 | 172 | #define SDHCI_INT_NORMAL_MASK 0x00007FFF 173 | #define SDHCI_INT_ERROR_MASK 0xFFFF8000 174 | 175 | #define SDHCI_INT_CMD_MASK (SDHCI_INT_RESPONSE | SDHCI_INT_TIMEOUT | \ 176 | SDHCI_INT_CRC | SDHCI_INT_END_BIT | SDHCI_INT_INDEX) 177 | #define SDHCI_INT_DATA_MASK (SDHCI_INT_DATA_END | SDHCI_INT_DMA_END | \ 178 | SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL | \ 179 | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_DATA_CRC | \ 180 | SDHCI_INT_DATA_END_BIT | SDHCI_INT_ADMA_ERROR) 181 | #define SDHCI_INT_ALL_MASK ((unsigned int)-1) 182 | 183 | #define SDHCI_ACMD12_ERR 0x3C 184 | 185 | /* 3E-3F reserved */ 186 | 187 | #define SDHCI_CAPABILITIES 0x40 188 | #define SDHCI_TIMEOUT_CLK_MASK 0x0000003F 189 | #define SDHCI_TIMEOUT_CLK_SHIFT 0 190 | #define SDHCI_TIMEOUT_CLK_UNIT 0x00000080 191 | #define SDHCI_CLOCK_BASE_MASK 0x00003F00 192 | #define SDHCI_CLOCK_V3_BASE_MASK 0x0000FF00 193 | #define SDHCI_CLOCK_BASE_SHIFT 8 194 | #define SDHCI_MAX_BLOCK_MASK 0x00030000 195 | #define SDHCI_MAX_BLOCK_SHIFT 16 196 | #define SDHCI_CAN_DO_8BIT 0x00040000 197 | #define SDHCI_CAN_DO_ADMA2 0x00080000 198 | #define SDHCI_CAN_DO_ADMA1 0x00100000 199 | #define SDHCI_CAN_DO_HISPD 0x00200000 200 | #define SDHCI_CAN_DO_SDMA 0x00400000 201 | #define SDHCI_CAN_VDD_330 0x01000000 202 | #define SDHCI_CAN_VDD_300 0x02000000 203 | #define SDHCI_CAN_VDD_180 0x04000000 204 | #define SDHCI_CAN_64BIT 0x10000000 205 | 206 | #define SDHCI_CAPABILITIES_1 0x44 207 | 208 | #define SDHCI_MAX_CURRENT 0x48 209 | 210 | /* 4C-4F reserved for more max current */ 211 | 212 | #define SDHCI_SET_ACMD12_ERROR 0x50 213 | #define SDHCI_SET_INT_ERROR 0x52 214 | 215 | #define SDHCI_ADMA_ERROR 0x54 216 | 217 | /* 55-57 reserved */ 218 | 219 | #define SDHCI_ADMA_ADDRESS 0x58 220 | 221 | /* 60-FB reserved */ 222 | 223 | #define SDHCI_SLOT_INT_STATUS 0xFC 224 | 225 | #define SDHCI_HOST_VERSION 0xFE 226 | #define SDHCI_VENDOR_VER_MASK 0xFF00 227 | #define SDHCI_VENDOR_VER_SHIFT 8 228 | #define SDHCI_SPEC_VER_MASK 0x00FF 229 | #define SDHCI_SPEC_VER_SHIFT 0 230 | #define SDHCI_SPEC_100 0 231 | #define SDHCI_SPEC_200 1 232 | #define SDHCI_SPEC_300 2 233 | 234 | /* 235 | * End of controller registers. 236 | */ 237 | 238 | #define SDHCI_MAX_DIV_SPEC_200 256 239 | #define SDHCI_MAX_DIV_SPEC_300 2046 240 | 241 | /* 242 | * quirks 243 | */ 244 | #define SDHCI_QUIRK_32BIT_DMA_ADDR (1 << 0) 245 | #define SDHCI_QUIRK_REG32_RW (1 << 1) 246 | #define SDHCI_QUIRK_BROKEN_R1B (1 << 2) 247 | #define SDHCI_QUIRK_NO_HISPD_BIT (1 << 3) 248 | #define SDHCI_QUIRK_BROKEN_VOLTAGE (1 << 4) 249 | #define SDHCI_QUIRK_NO_CD (1 << 5) 250 | #define SDHCI_QUIRK_WAIT_SEND_CMD (1 << 6) 251 | 252 | /* to make gcc happy */ 253 | struct sdhci_host; 254 | 255 | /* 256 | * Host SDMA buffer boundary. Valid values from 4K to 512K in powers of 2. 257 | */ 258 | #define SDHCI_DEFAULT_BOUNDARY_SIZE (512 * 1024) 259 | #define SDHCI_DEFAULT_BOUNDARY_ARG (7) 260 | struct sdhci_ops { 261 | #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS 262 | u32 (*read_l)(struct sdhci_host *host, int reg); 263 | u16 (*read_w)(struct sdhci_host *host, int reg); 264 | u8 (*read_b)(struct sdhci_host *host, int reg); 265 | void (*write_l)(struct sdhci_host *host, u32 val, int reg); 266 | void (*write_w)(struct sdhci_host *host, u16 val, int reg); 267 | void (*write_b)(struct sdhci_host *host, u8 val, int reg); 268 | #endif 269 | }; 270 | 271 | struct sdhci_host { 272 | char *name; 273 | void *ioaddr; 274 | unsigned int quirks; 275 | unsigned int host_caps; 276 | unsigned int version; 277 | unsigned int clock; 278 | struct mmc *mmc; 279 | const struct sdhci_ops *ops; 280 | int index; 281 | 282 | void (*set_control_reg)(struct sdhci_host *host); 283 | void (*set_clock)(int dev_index, unsigned int div); 284 | u32 voltages; 285 | }; 286 | 287 | #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS 288 | 289 | static inline void sdhci_writel(struct sdhci_host *host, u32 val, int reg) 290 | { 291 | if ((host->ops->write_l)) 292 | host->ops->write_l(host, val, reg); 293 | else 294 | writel((u32)(host->ioaddr + reg), val); 295 | } 296 | 297 | static inline void sdhci_writew(struct sdhci_host *host, u16 val, int reg) 298 | { 299 | if ((host->ops->write_w)) 300 | host->ops->write_w(host, val, reg); 301 | else 302 | writel((u32)(host->ioaddr + reg), val); /* FIXME: */ 303 | } 304 | 305 | static inline void sdhci_writeb(struct sdhci_host *host, u8 val, int reg) 306 | { 307 | if ((host->ops->write_b)) 308 | host->ops->write_b(host, val, reg); 309 | else 310 | writeb(host->ioaddr + reg, val); 311 | } 312 | 313 | static inline u32 sdhci_readl(struct sdhci_host *host, int reg) 314 | { 315 | if ((host->ops->read_l)) 316 | return host->ops->read_l(host, reg); 317 | else 318 | return readl((u32)(host->ioaddr + reg)); 319 | } 320 | 321 | static inline u16 sdhci_readw(struct sdhci_host *host, int reg) 322 | { 323 | if ((host->ops->read_w)) 324 | return host->ops->read_w(host, reg); 325 | else 326 | return readl((u32)(host->ioaddr + reg)); 327 | } 328 | 329 | static inline u8 sdhci_readb(struct sdhci_host *host, int reg) 330 | { 331 | if ((host->ops->read_b)) 332 | return host->ops->read_b(host, reg); 333 | else 334 | return readb(host->ioaddr + reg); 335 | } 336 | 337 | #else 338 | 339 | static inline void sdhci_writel(struct sdhci_host *host, u32 val, int reg) 340 | { 341 | writel((u32)(host->ioaddr + reg), val); 342 | } 343 | 344 | static inline void sdhci_writew(struct sdhci_host *host, u16 val, int reg) 345 | { 346 | writew(host->ioaddr + reg, val); 347 | } 348 | 349 | static inline void sdhci_writeb(struct sdhci_host *host, u8 val, int reg) 350 | { 351 | writeb(host->ioaddr + reg, val); 352 | } 353 | static inline u32 sdhci_readl(struct sdhci_host *host, int reg) 354 | { 355 | return readl((u32)(host->ioaddr + reg)); 356 | } 357 | 358 | static inline u16 sdhci_readw(struct sdhci_host *host, int reg) 359 | { 360 | return readl((u32)(host->ioaddr + reg)); 361 | } 362 | 363 | static inline u8 sdhci_readb(struct sdhci_host *host, int reg) 364 | { 365 | return readb(host->ioaddr + reg); 366 | } 367 | #endif 368 | 369 | int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk); 370 | 371 | #endif /* __SDHCI_H__ */ 372 | -------------------------------------------------------------------------------- /include/driver/shell.h: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | #define SHELL_ARGS_MAX (7) 4 | struct shell_cmd_info { 5 | char *name; 6 | func_0 func; 7 | char *desc; 8 | }; 9 | 10 | s32 shell(char *cmd); 11 | -------------------------------------------------------------------------------- /include/driver/timer.h: -------------------------------------------------------------------------------- 1 | #ifndef __TIMER_H__ 2 | #define __TIMER_H__ 3 | 4 | #include 5 | 6 | #define CORETM_HZ (1000000) /* 1M, may be not very precise */ 7 | #define SYSTM_HZ (1000000) 8 | 9 | #define US2TICK(us) (us) 10 | #define TICK2US(tick) (tick) 11 | 12 | #define MS2TICK(ms) (ms*1000) 13 | #define TICK2MS(tick) (tick/1000) 14 | 15 | u64 get_syscounter(); 16 | void udelay(u32 us); 17 | void mdelay(u32 ms); 18 | void clk_delay(u32 cycle); 19 | s32 wait_value(u32 *addr, u32 value, u32 type, u32 timeout_us, func_0 func); 20 | s32 timer_init(); 21 | #endif /* __TIMER_H__ */ 22 | -------------------------------------------------------------------------------- /include/driver/uart.h: -------------------------------------------------------------------------------- 1 | #ifndef __UART_H__ 2 | #define __UART_H__ 3 | #include 4 | 5 | void uart_putc(u8 byte); 6 | void uart_puts(const char *str); 7 | void uart_init(); 8 | void uart_wait_fifo_empty(); 9 | s32 uart_printf(const char *format, ...); 10 | 11 | #endif /* __UART_H__ */ 12 | -------------------------------------------------------------------------------- /include/driver/usb.h: -------------------------------------------------------------------------------- 1 | #ifndef __USB_H__ 2 | #define __USB_H__ 3 | 4 | /* USB Networking options */ 5 | #define CONFIG_USB_HOST_ETHER 6 | #define CONFIG_USB_ETHER_SMSC95XX 7 | #define CONFIG_USB_DWC_OTG 8 | #define CONFIG_USB_STORAGE 9 | 10 | #endif /* __USB_H__ */ 11 | -------------------------------------------------------------------------------- /include/driver/usb_ether.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2011 The Chromium OS Authors. 3 | * See file CREDITS for list of people who contributed to this 4 | * project. 5 | * 6 | * This program is free software; you can redistribute it and/or 7 | * modify it under the terms of the GNU General Public License as 8 | * published by the Free Software Foundation; either version 2 of 9 | * the License, or (at your option) any later version. 10 | * 11 | * This program is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU General Public License 17 | * along with this program; if not, write to the Free Software 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 19 | * MA 02111-1307 USA 20 | */ 21 | 22 | #ifndef __USB_ETHER_H__ 23 | #define __USB_ETHER_H__ 24 | 25 | #include 26 | 27 | /* 28 | * IEEE 802.3 Ethernet magic constants. The frame sizes omit the preamble 29 | * and FCS/CRC (frame check sequence). 30 | */ 31 | #define ETH_ALEN 6 /* Octets in one ethernet addr */ 32 | #define ETH_HLEN 14 /* Total octets in header. */ 33 | #define ETH_ZLEN 60 /* Min. octets in frame sans FCS */ 34 | #define ETH_DATA_LEN 1500 /* Max. octets in payload */ 35 | #define ETH_FRAME_LEN PKTSIZE_ALIGN /* Max. octets in frame sans FCS */ 36 | #define ETH_FCS_LEN 4 /* Octets in the FCS */ 37 | 38 | struct ueth_data { 39 | /* eth info */ 40 | struct eth_device eth_dev; /* used with eth_register */ 41 | int phy_id; /* mii phy id */ 42 | 43 | /* usb info */ 44 | struct usb_device *pusb_dev; /* this usb_device */ 45 | unsigned char ifnum; /* interface number */ 46 | unsigned char ep_in; /* in endpoint */ 47 | unsigned char ep_out; /* out ....... */ 48 | unsigned char ep_int; /* interrupt . */ 49 | unsigned char subclass; /* as in overview */ 50 | unsigned char protocol; /* .............. */ 51 | unsigned char irqinterval; /* Intervall for IRQ Pipe */ 52 | 53 | /* driver private */ 54 | void *dev_priv; 55 | }; 56 | 57 | /* 58 | * Function definitions for each USB ethernet driver go here, bracketed by 59 | * #ifdef CONFIG_USB_ETHER_xxx...#endif 60 | */ 61 | #ifdef CONFIG_USB_ETHER_ASIX 62 | void asix_eth_before_probe(void); 63 | int asix_eth_probe(struct usb_device *dev, unsigned int ifnum, 64 | struct ueth_data *ss); 65 | int asix_eth_get_info(struct usb_device *dev, struct ueth_data *ss, 66 | struct eth_device *eth); 67 | #endif 68 | 69 | #ifdef CONFIG_USB_ETHER_SMSC95XX 70 | void smsc95xx_eth_before_probe(void); 71 | int smsc95xx_eth_probe(struct usb_device *dev, unsigned int ifnum, 72 | struct ueth_data *ss); 73 | int smsc95xx_eth_get_info(struct usb_device *dev, struct ueth_data *ss, 74 | struct eth_device *eth); 75 | #endif 76 | 77 | #endif /* __USB_ETHER_H__ */ 78 | -------------------------------------------------------------------------------- /include/driver/watchdog.h: -------------------------------------------------------------------------------- 1 | #ifndef __WATCHDOG_H__ 2 | #define __WATCHDOG_H__ 3 | 4 | enum wdt_cmd { 5 | WDT_START = 0, 6 | WDT_STOP, 7 | WDT_FEED, 8 | WDT_SET_TIMEOUT, 9 | WDT_CMD_MAX, 10 | }; 11 | 12 | #define WDT_PASSWORD (0x5a000000) 13 | 14 | #define WDT_TICK2S(tick) ((tick) >> 16) 15 | #define WDT_S2TICK(us) ((us) << 16) 16 | 17 | u32 watchdog_init(); 18 | s32 watchdog_ctrl(u32 cmd, ...); 19 | #endif /* __WATCHDOG_H__ */ 20 | -------------------------------------------------------------------------------- /include/kernel/os.h: -------------------------------------------------------------------------------- 1 | #ifndef __OS_H__ 2 | #define __OS_H__ 3 | 4 | #include 5 | #define kassert(exp) assert(exp) 6 | 7 | #include 8 | #include 9 | #include 10 | #include 11 | #include 12 | #include 13 | #include 14 | 15 | #include 16 | 17 | 18 | #endif /* __OS_H__ */ 19 | -------------------------------------------------------------------------------- /include/kernel/os_event.h: -------------------------------------------------------------------------------- 1 | #ifndef __OS_EVENT_H__ 2 | #define __OS_EVENT_H__ 3 | #include 4 | 5 | s32 event_wait(u32 task_id, u16 event); 6 | s32 event_release(u32 task_id, u16 event); 7 | 8 | #endif /* __OS_EVENT_H__ */ 9 | -------------------------------------------------------------------------------- /include/kernel/os_list.h: -------------------------------------------------------------------------------- 1 | #ifndef __OS_LIST_H__ 2 | #define __OS_LIST_H__ 3 | 4 | #include 5 | 6 | #define os_ready_insert(task) list_insert(&os_ready_list, task) 7 | #define os_ready_delete(task) list_delete(&os_ready_list, task) 8 | 9 | #define os_sleep_insert(task) list_insert(&os_sleep_list, task) 10 | #define os_sleep_delete(task) list_delete(&os_sleep_list, task) 11 | 12 | #define os_sem_insert(psem, task) list_insert((struct __os_list__ *)psem, task) 13 | #define os_sem_delete(psem, task) list_delete((struct __os_list__ *)psem, task) 14 | 15 | #define os_mbx_insert(pmbx, task) list_insert((struct __os_list__ *)pmbx, task) 16 | #define os_mbx_delete(pmbx, task) list_delete((struct __os_list__ *)pmbx, task) 17 | 18 | enum CB_TYPE_E { 19 | OS_READY, 20 | OS_SLEEP, 21 | OS_SEM, 22 | OS_MBX, 23 | }; 24 | 25 | struct __os_list__ { 26 | u32 type; 27 | struct __os_task__ *next; 28 | struct __os_task__ *prev; 29 | }; 30 | 31 | extern struct __os_list__ os_ready_list; 32 | extern struct __os_list__ os_sleep_list; 33 | 34 | s32 list_insert(struct __os_list__ *list, struct __os_task__ *ptask); 35 | s32 list_delete(struct __os_list__ *list, struct __os_task__ *ptask); 36 | 37 | #endif /* __OS_LIST_H__ */ 38 | 39 | 40 | 41 | -------------------------------------------------------------------------------- /include/kernel/os_mailbox.h: -------------------------------------------------------------------------------- 1 | #ifndef __OS_MAILBOX_H__ 2 | #define __OS_MAILBOX_H__ 3 | 4 | enum MBX_STATUS_E { 5 | MBX_FREE = 0, 6 | MBX_EMPTY = 1, 7 | MBX_FULL = 2, 8 | MBX_IDLE = 3, 9 | }; 10 | 11 | /* user should manage the mailbox memory themself */ 12 | struct __os_mailbox__ { 13 | u32 type; 14 | struct __os_task__ *next; 15 | u32 status; 16 | void *mailbox; 17 | u32 mail_nr; 18 | u32 mail_size; 19 | u32 head; 20 | u32 tail; 21 | }; 22 | 23 | s32 mailbox_create(void *addr, u32 mail_size, u32 mail_nr); 24 | s32 mail_alloc(u32 mbx_id); 25 | s32 mail_free(u32 mbx_id, void *mail); 26 | s32 mailbox_delete(u32 mbx_id); 27 | s32 mailbox_put(u32 mbx_id, void *mail); 28 | s32 mailbox_get(u32 mbx_id); 29 | s32 mailbox_init(); 30 | 31 | #endif /* __OS_MAILBOX_H__ */ 32 | -------------------------------------------------------------------------------- /include/kernel/os_memory.h: -------------------------------------------------------------------------------- 1 | #ifndef __OS_MEMORY_H__ 2 | #define __OS_MEMORY_H__ 3 | 4 | #include 5 | 6 | struct pnode { 7 | struct pnode *next; 8 | struct pnode *prev; 9 | s32 size; /* include the struct pnode itself */ 10 | }; 11 | 12 | struct __memory_pool__ { 13 | struct pnode *next; 14 | u32 size; 15 | }; 16 | 17 | 18 | struct __memory_box__ { 19 | void *addr; 20 | u32 cell_nr; 21 | u32 cell_size; 22 | u8 map[0]; 23 | }; 24 | 25 | struct __memory_pool__ * memory_pool_init(void *mem, u32 size); 26 | void * memory_pool_alloc(struct __memory_pool__ *mp, u32 size); 27 | void memory_pool_free(struct __memory_pool__ *mp, void *mem); 28 | 29 | struct __memory_box__ * memory_box_init(void *mem, u32 size, u32 cell_size); 30 | void * memory_box_alloc(struct __memory_box__ *mb); 31 | void memory_box_free(struct __memory_box__ *mb, void *cell); 32 | 33 | #endif /* __OS_MEMORY_H__ */ 34 | -------------------------------------------------------------------------------- /include/kernel/os_semaphore.h: -------------------------------------------------------------------------------- 1 | #ifndef __OS_SEMAPHORE_H__ 2 | #define __OS_SEMAPHORE_H__ 3 | #include 4 | 5 | enum SEM_STATUS_E { 6 | SEM_FREE = 0, 7 | SEM_USED = 1, 8 | }; 9 | 10 | struct __os_semaphore__ { 11 | u32 type; 12 | struct __os_task__ *next; 13 | u32 status; 14 | u32 token; 15 | }; 16 | 17 | s32 semaphore_create(u32 res_num); 18 | s32 semaphore_get(u32 sem_id); 19 | s32 semaphore_put(u32 sem_id); 20 | s32 semaphore_delete(u32 sem_id); 21 | 22 | struct __os_semaphore__ * semaphore_init(); 23 | 24 | #endif /* __OS_SEMAPHORE_H__ */ 25 | -------------------------------------------------------------------------------- /include/kernel/os_sleep.h: -------------------------------------------------------------------------------- 1 | #ifndef __OS_SLEEP_H__ 2 | #include 3 | 4 | s32 os_sleep_expire(); 5 | #define __OS_SLEEP_H__ 6 | 7 | #endif /* __OS_SLEEP_H__ */ 8 | -------------------------------------------------------------------------------- /include/kernel/os_task.h: -------------------------------------------------------------------------------- 1 | #ifndef __OS_TASK_H__ 2 | #define __OS_TASK_H__ 3 | #include 4 | #include 5 | #include "cpu.h" 6 | 7 | /* task state */ 8 | enum TASK_STATE_E { 9 | TASK_UNUSED = 0, 10 | TASK_RUNNING = 1, 11 | TASK_SLEEP = 2, 12 | TASK_READY = 3, 13 | TASK_WAIT_SEM = 4, 14 | TASK_WAIT_MBX = 5, 15 | TASK_WAIT_EVENT = 6, 16 | TASK_STATE_MAX, 17 | }; 18 | /* task priority */ 19 | #define TASK_PRIO_MAX (255) /* 0: the highest priority, 255: the lowest priority */ 20 | 21 | #define IDLE_TASK_ID (0) /* idle task id */ 22 | 23 | struct __os_task__ 24 | { 25 | u32 id; 26 | 27 | struct __os_task__ *next; /* must be at offset 4byte */ 28 | struct __os_task__ *prev; 29 | 30 | u32 state; 31 | u32 prio; 32 | void *private_data; 33 | 34 | u32 sleep_ticks; 35 | u32 events; 36 | 37 | u32 sp; 38 | u32 *stack; 39 | u32 stack_size; 40 | func_1 entry; 41 | }; 42 | 43 | extern u32 task_stack[TASK_NR_MAX][TASK_STK_SIZE]; 44 | extern struct __os_task__ tcb[TASK_NR_MAX]; 45 | extern struct __os_task__ *current_task; 46 | extern struct __os_task__ *new_task; 47 | 48 | struct __os_task__ * get_task_ready(); 49 | s32 task_create(func_1 entry, u32 arg, u32 prio); 50 | s32 task_delete(u32 task_id); 51 | s32 task_sleep(u32 ticks); 52 | s32 task_dispatch(); 53 | struct __os_task__ * get_best_task(); 54 | s32 task_delete(u32 task_id); 55 | s32 task_init(); 56 | #endif /* __OS_TASK_H__ */ 57 | 58 | 59 | -------------------------------------------------------------------------------- /include/libc/assert.h: -------------------------------------------------------------------------------- 1 | #ifndef __ASSERT_H__ 2 | #define __ASSERT_H__ 3 | #include 4 | #define assert(exp) ((exp) ? (void)0 : _assert(__FILE__, __func__, __LINE__, "assert (" #exp ") failed!\n")) 5 | #endif /* __ASSERT_H__ */ 6 | -------------------------------------------------------------------------------- /include/libc/bitmap.h: -------------------------------------------------------------------------------- 1 | #ifndef __BITMAP_H__ 2 | #define __BITMAP_H__ 3 | 4 | #include 5 | 6 | #define BIT(x) (0x1UL << x) 7 | 8 | u8 bitmap_get(void *map, u32 bit_max, u32 bit_index); 9 | u8 bitmap_set(void *map, u32 bit_max, u32 bit_index, u8 bit); 10 | 11 | s32 bitmap_ffz(void *map, u32 bit_max); 12 | #endif /* __BITMAP_H__ */ 13 | -------------------------------------------------------------------------------- /include/libc/libc.h: -------------------------------------------------------------------------------- 1 | #ifndef __LIBC_H__ 2 | #define __LIBC_H__ 3 | 4 | #include 5 | #include 6 | #include 7 | #include 8 | #include 9 | #include 10 | 11 | #endif /* __LIBC_H__ */ 12 | -------------------------------------------------------------------------------- /include/libc/stdarg.h: -------------------------------------------------------------------------------- 1 | #ifndef __STDARG_H__ 2 | #define __STDARG_H__ 3 | #include 4 | 5 | typedef char* va_list; 6 | 7 | #define __va_size(type) \ 8 | (((sizeof(type) + sizeof(long) - 1) / sizeof (long)) * sizeof (long)) 9 | 10 | #define va_start(ap, last) \ 11 | ((ap) = ((char*)&last) + __va_size(last)) 12 | 13 | #define va_arg(ap, type) \ 14 | (*(type*)((ap)+= __va_size(type), (ap) - __va_size(type))) 15 | 16 | #define va_end(va_list) ((void)0) 17 | 18 | int vsnprintf(char *buf, u32 size, const char *fmt, va_list args); 19 | #endif /* __STDARG_H__ */ 20 | -------------------------------------------------------------------------------- /include/libc/stdio.h: -------------------------------------------------------------------------------- 1 | #ifndef __STDIO_H__ 2 | #define __STDIO_H__ 3 | 4 | #include 5 | #include 6 | 7 | int snprintf(char *buf, u32 size, const char *fmt, ...); 8 | 9 | #endif /* __STDIO_H__ */ 10 | -------------------------------------------------------------------------------- /include/libc/string.h: -------------------------------------------------------------------------------- 1 | #ifndef __STRING_H__ 2 | #define __STRING_H__ 3 | #include 4 | #include 5 | 6 | u32 strlen(const char *str); 7 | s32 strcmp(char *s1, char *s2); 8 | u32 atoi(char *str); 9 | char * itoa(char *buf, u32 x, u32 radix); 10 | void * memset(void *s, s32 c, u32 size); 11 | void * memcpy(void *dst, void *src, u32 size); 12 | s32 memcmp(void *s1, void *s2, u32 n); 13 | u32 ffs(u32 x); 14 | u32 fls(u32 x); 15 | #endif /* __STRING_H__ */ 16 | 17 | -------------------------------------------------------------------------------- /include/libc/types.h: -------------------------------------------------------------------------------- 1 | #ifndef __TYPES_H__ 2 | #define __TYPES_H__ 3 | 4 | #define PUBLIC /* __attribute__((weak)) */ 5 | #define PRIVATE /* static */ 6 | 7 | #define NULL ((void*)0) 8 | 9 | typedef signed char s8; 10 | typedef unsigned char u8; 11 | 12 | typedef signed short s16; 13 | typedef unsigned short u16; 14 | 15 | typedef signed int s32; 16 | typedef unsigned int u32; 17 | 18 | typedef signed long long s64; 19 | typedef unsigned long long u64; 20 | 21 | typedef s32 (*func_0)(); 22 | typedef s32 (*func_1)(u32 arg1); 23 | typedef s32 (*func_2)(u32 arg1, u32 arg2); 24 | typedef s32 (*func_3)(u32 arg1, u32 arg2, u32 arg3); 25 | typedef s32 (*func_4)(u32 arg1, u32 arg2, u32 arg3, u32 arg4); 26 | typedef s32 (*func_5)(u32 arg1, u32 arg2, u32 arg3, u32 arg4, u32 arg5); 27 | 28 | enum { 29 | OK = 0, 30 | ERROR, 31 | EINVAL, /* invalid parameter */ 32 | ENOMEM, /* out of memory */ 33 | }; 34 | 35 | #endif /* __TYPES_H__ */ 36 | -------------------------------------------------------------------------------- /include/platform/cpu.h: -------------------------------------------------------------------------------- 1 | #ifndef __CPU_H__ 2 | #define __CPU_H__ 3 | #include 4 | 5 | /* 6 | cpu_context in irq mode sp 7 | lr 8 | r12 9 | r11 10 | r10 11 | r9 12 | r8 13 | r7 14 | r6 15 | r5 16 | r4 17 | r3 18 | r2 19 | r1 20 | r0 21 | cpsr 22 | sp_irq -> r13 (sp_user or sp_system) 23 | */ 24 | enum CPU_MODE_E { 25 | MODE_USER = 16, 26 | MODE_FIQ = 17, 27 | MODE_IRQ = 18, 28 | MODE_SVC = 19, 29 | MODE_SECMT = 22, 30 | MODE_ABORT = 23, 31 | MODE_UNDEF = 27, 32 | MODE_SYSTEM = 31, 33 | }; 34 | 35 | struct __cpu_context__ { 36 | u32 cpsr; /* banked as spsr_xxx in irq mode, each task has its own cpsr */ 37 | u32 r0; 38 | u32 r1; 39 | u32 r2; 40 | u32 r3; 41 | u32 r4; 42 | u32 r5; 43 | u32 r6; 44 | u32 r7; 45 | u32 r8; 46 | u32 r9; 47 | u32 r10; 48 | u32 r11; 49 | u32 r12; 50 | u32 sp; 51 | u32 lr; 52 | u32 pc; /* user/system mode [pc] + 4 */ 53 | }; 54 | 55 | #if 0 56 | static __inline__ u32 __get_lr() 57 | { 58 | register u32 __r0 __asm("r0"); 59 | 60 | __asm__ volatile ( 61 | "mov r0, lr\n\t" 62 | : "=r" (__r0) 63 | : 64 | : 65 | ); 66 | return __r0; 67 | } 68 | #endif 69 | 70 | extern u32 __get_pc(); 71 | extern u32 __set_pc(); 72 | 73 | extern u32 __get_lr(); 74 | 75 | extern u32 __get_sp(); 76 | extern u32 __set_sp(); 77 | 78 | extern u32 __get_cpsr(); 79 | extern u32 __set_cpsr(); 80 | 81 | #endif /* __CPU_H__ */ 82 | -------------------------------------------------------------------------------- /include/platform/int.h: -------------------------------------------------------------------------------- 1 | #ifndef __INT_H__ 2 | #define __INT_H__ 3 | #include 4 | #include 5 | 6 | /* CPSR bit */ 7 | #define FIQ_DISABLE_BIT 6 8 | #define IRQ_DISABLE_BIT 7 9 | 10 | enum IRQ_NR_E { 11 | /* arm basic irq */ 12 | IRQ_CORE_TIMER = 0, 13 | IRQ_CORE_MAILBOX = 1, 14 | IRQ_CORE_DOORBELL0 = 2, 15 | IRQ_CORE_DOORBELL1 = 3, 16 | IRQ_GPU0_HALT = 4, 17 | IRQ_GPU1_HALT = 5, 18 | IRQ_ILEGAL_ACCESS0 = 6, 19 | IRQ_ILEGAL_ACCESS1 = 7, 20 | 21 | /* arm peripherals irq */ 22 | IRQ_SYS_TIMER0 = 32 + 0, 23 | IRQ_SYS_TIMER1 = 32 + 1, 24 | IRQ_SYS_TIMER2 = 32 + 2, 25 | IRQ_SYS_TIMER3 = 32 + 3, 26 | IRQ_AUX = 32 + 29, 27 | IRQ_I2C_SPI_SLV = 32 + 43, 28 | IRQ_SMI = 32 + 48, 29 | IRQ_GPIO0 = 32 + 49, 30 | IRQ_GPIO1 = 32 + 50, 31 | IRQ_GPIO2 = 32 + 51, 32 | IRQ_GPIO3 = 32 + 52, 33 | IRQ_I2C = 32 + 53, 34 | IRQ_SPI = 32 + 54, 35 | IRQ_PCM = 32 + 55, 36 | IRQ_UART = 32 + 57, 37 | IRQ_MAX = 32 * 3, 38 | }; 39 | 40 | char* get_cpu_mode(u32 *m); 41 | s32 request_irq(u32 irq_nr, func_1 irq_handler); 42 | s32 release_irq(u32 irq_nr); 43 | s32 enable_irq(u32 irq_nr); 44 | s32 disable_irq(u32 irq_nr); 45 | s32 panic(); 46 | s32 lockup(); 47 | s32 reset(); 48 | u32 in_interrupt(); 49 | void lock_irq(); 50 | void unlock_irq(); 51 | s32 _assert(const char *file_name, const char *func_name, u32 line_num, char *desc); 52 | s32 int_init(); 53 | 54 | #endif /* __INT_H__ */ 55 | -------------------------------------------------------------------------------- /include/platform/memory_map.h: -------------------------------------------------------------------------------- 1 | #ifndef __MEMORY_MAP_H__ 2 | #define __MEMORY_MAP_H__ 3 | 4 | #include 5 | 6 | enum { 7 | 8 | /* peripherals */ 9 | SYSTIMER_BASE = 0x20003000, 10 | SYSTMCS = (SYSTIMER_BASE + 0x00), 11 | SYSTMCLO = (SYSTIMER_BASE + 0x04), 12 | SYSTMCHI = (SYSTIMER_BASE + 0x08), 13 | SYSTMC0 = (SYSTIMER_BASE + 0x0C), 14 | SYSTMC1 = (SYSTIMER_BASE + 0x10), 15 | SYSTMC2 = (SYSTIMER_BASE + 0x14), 16 | SYSTMC3 = (SYSTIMER_BASE + 0x18), 17 | 18 | IRQ_BASE = 0x2000B200, 19 | IRQ_PEND_BASIC = (IRQ_BASE + 0x00), 20 | IRQ_PEND1 = (IRQ_BASE + 0x04), 21 | IRQ_PEND2 = (IRQ_BASE + 0x08), 22 | FIQ_CTRL = (IRQ_BASE + 0x0C), 23 | IRQ_ENABLE1 = (IRQ_BASE + 0x10), 24 | IRQ_ENABLE2 = (IRQ_BASE + 0x14), 25 | IRQ_ENABLE_BASIC = (IRQ_BASE + 0x18), 26 | IRQ_DISABLE1 = (IRQ_BASE + 0x1C), 27 | IRQ_DISABLE2 = (IRQ_BASE + 0x20), 28 | IRQ_DISABLE_BASIC = (IRQ_BASE + 0x24), 29 | 30 | CORETIMER_BASE = 0x2000B400, 31 | CORETMLOAD = (CORETIMER_BASE + 0x00), 32 | CORETMVAL = (CORETIMER_BASE + 0x04), 33 | CORETMCTRL = (CORETIMER_BASE + 0x08), 34 | CORETMCLR = (CORETIMER_BASE + 0x0C), 35 | CORETMRAW = (CORETIMER_BASE + 0x10), 36 | CORETMMSK = (CORETIMER_BASE + 0x14), 37 | CORETMRELD = (CORETIMER_BASE + 0x18), 38 | CORETMPRED = (CORETIMER_BASE + 0x1C), 39 | CORETMFRC = (CORETIMER_BASE + 0x20), 40 | 41 | WATCHDOG_BASE = 0x20100000, 42 | WATCHDOG_RSTC = (WATCHDOG_BASE + 0x1C), 43 | WATCHDOG_WDOG = (WATCHDOG_BASE + 0x24), 44 | 45 | GPIO_BASE = 0x20200000, 46 | GPFSEL0 = (GPIO_BASE + 0x00), 47 | GPFSEL1 = (GPIO_BASE + 0x04), 48 | GPFSEL2 = (GPIO_BASE + 0x08), 49 | GPFSEL3 = (GPIO_BASE + 0x0C), 50 | GPFSEL4 = (GPIO_BASE + 0x10), 51 | GPFSEL5 = (GPIO_BASE + 0x14), 52 | 53 | GPSET0 = (GPIO_BASE + 0x1C), 54 | GPSET1 = (GPIO_BASE + 0x20), 55 | 56 | GPCLR0 = (GPIO_BASE + 0x28), 57 | GPCLR1 = (GPIO_BASE + 0x2C), 58 | 59 | GPLEV0 = (GPIO_BASE + 0x34), 60 | GPLEV1 = (GPIO_BASE + 0x38), 61 | 62 | GPEDS0 = (GPIO_BASE + 0x40), 63 | GPEDS1 = (GPIO_BASE + 0x44), 64 | 65 | GPREN0 = (GPIO_BASE + 0x4C), 66 | GPREN1 = (GPIO_BASE + 0x50), 67 | 68 | GPFEN0 = (GPIO_BASE + 0x58), 69 | GPFEN1 = (GPIO_BASE + 0x5C), 70 | 71 | GPHEN0 = (GPIO_BASE + 0x64), 72 | GPHEN1 = (GPIO_BASE + 0x68), 73 | 74 | GPLEN0 = (GPIO_BASE + 0x70), 75 | GPLEN1 = (GPIO_BASE + 0x74), 76 | 77 | GPAREN0 = (GPIO_BASE + 0x7C), 78 | GPAREN1 = (GPIO_BASE + 0x80), 79 | 80 | GPAFEN0 = (GPIO_BASE + 0x88), 81 | GPAFEN1 = (GPIO_BASE + 0x8C), 82 | 83 | GPPUD = (GPIO_BASE + 0x94), 84 | 85 | GPPUDCLK0 = (GPIO_BASE + 0x98), 86 | GPPUDCLK1 = (GPIO_BASE + 0x9C), 87 | 88 | UART0_BASE = 0x20201000, 89 | UART0_DR = (UART0_BASE + 0x00), 90 | UART0_RSRECR = (UART0_BASE + 0x04), 91 | UART0_FR = (UART0_BASE + 0x18), 92 | UART0_ILPR = (UART0_BASE + 0x20), 93 | UART0_IBRD = (UART0_BASE + 0x24), 94 | UART0_FBRD = (UART0_BASE + 0x28), 95 | UART0_LCRH = (UART0_BASE + 0x2C), 96 | UART0_CR = (UART0_BASE + 0x30), 97 | UART0_IFLS = (UART0_BASE + 0x34), 98 | UART0_IMSC = (UART0_BASE + 0x38), 99 | UART0_RIS = (UART0_BASE + 0x3C), 100 | UART0_MIS = (UART0_BASE + 0x40), 101 | UART0_ICR = (UART0_BASE + 0x44), 102 | UART0_DMACR = (UART0_BASE + 0x48), 103 | UART0_ITCR = (UART0_BASE + 0x80), 104 | UART0_ITIP = (UART0_BASE + 0x84), 105 | UART0_ITOP = (UART0_BASE + 0x88), 106 | UART0_TDR = (UART0_BASE + 0x8C), 107 | }; 108 | 109 | #endif /* __MEMORY_MAP_H__ */ 110 | -------------------------------------------------------------------------------- /include/platform/syscall.h: -------------------------------------------------------------------------------- 1 | #ifndef __SYSCALL_H__ 2 | #define __SYSCALL_H__ 3 | 4 | #define SYS_TASK_CREATE "0x0" 5 | #define SYS_TASK_SLEEP "0x1" 6 | 7 | #define SYS_SEM_CREATE "0x2" 8 | #define SYS_SEM_GET "0x3" 9 | #define SYS_SEM_PUT "0x4" 10 | #define SYS_SEM_DELETE "0x5" 11 | 12 | #define SYS_MBX_CREATE "0x6" 13 | #define SYS_MAIL_ALLOC "0x7" 14 | #define SYS_MAIL_FREE "0x8" 15 | #define SYS_MBX_GET "0x9" 16 | #define SYS_MBX_PUT "0xA" 17 | #define SYS_MBX_DELETE "0xB" 18 | 19 | #define SYS_EVT_WAIT "0xC" 20 | #define SYS_EVT_RELEASE "0xD" 21 | 22 | #define SYS_CALL_MAX "0x100" 23 | 24 | struct __syscall__ { 25 | char *desc; 26 | s32 (*handler)(u32 *arg); 27 | #if 0 28 | u32 free; /* if the run context (task context | irq context) is free */ 29 | #endif 30 | }; 31 | s32 system_call(u32 nr, u32 *args); 32 | 33 | s32 os_task_create(func_1 entry, u32 arg, u32 prio); 34 | s32 os_task_delete(u32 task_id); 35 | s32 os_task_sleep(u32 ticks); 36 | 37 | s32 os_semaphore_create(u32 tokens); 38 | s32 os_semaphore_delete(u32 sem_id); 39 | s32 os_semaphore_get(u32 sem_id); 40 | s32 os_semaphore_put(u32 sem_id); 41 | 42 | s32 os_mailbox_create(void *addr, u32 mail_size, u32 mail_nr); 43 | s32 os_mailbox_delete(u32 mbx_id); 44 | s32 os_mailbox_get(u32 mbx_id); 45 | s32 os_mailbox_put(u32 mbx_id, void *mail); 46 | 47 | s32 os_event_wait(u32 tsk_id, u16 event); 48 | s32 os_event_release(u32 tsk_id, u16 event); 49 | #endif /* __SYSCALL_H__ */ 50 | -------------------------------------------------------------------------------- /include/platform/system_config.h: -------------------------------------------------------------------------------- 1 | #ifndef __SYSTEM_CONFIG_H__ 2 | #define __SYSTEM_CONFIG_H__ 3 | 4 | #define OS_HZ (10) /* 1000/OS_HZ ms os_tick++ */ 5 | 6 | #define TASK_NR_MAX (10) 7 | #define TASK_STK_SIZE (256) /* 256 word */ 8 | 9 | #define MBX_NR_MAX (10) 10 | #define SEM_NR_MAX (10) 11 | 12 | #endif /* __SYSTEM_CONFIG_H__ */ 13 | -------------------------------------------------------------------------------- /include/platform/systest.h: -------------------------------------------------------------------------------- 1 | #ifndef __SYSTEST_H__ 2 | #include 3 | void dump_mem(u32 addr, u32 word_nr); 4 | s32 systest(u32 argc, char **argv); 5 | #define __SYSTEST_H__ 6 | #endif /* __SYSTEST_H__ */ 7 | -------------------------------------------------------------------------------- /kernel/kernel.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | #include 5 | 6 | #include "cpu.h" 7 | #include "timer.h" 8 | #include "log.h" 9 | #include "int.h" 10 | #include "gpio.h" 11 | #include "uart.h" 12 | #include "mmc.h" 13 | #include "dram.h" 14 | 15 | extern struct __os_task__ * tcb_alloc(); 16 | extern s32 tcb_init(struct __os_task__ *ptask, func_1 task_entry, u32 arg, u32 priority); 17 | extern s32 main_task(u32 arg); 18 | 19 | char sys_banner[] = {"SOS system buildtime [" __TIME__ " " __DATE__ "]"}; 20 | 21 | extern struct cpu_context *current_context; 22 | 23 | volatile u32 os_tick = 0; 24 | PRIVATE s32 idle_task(u32 arg) 25 | { 26 | 27 | unlock_irq(); /* kick off the system, will switch to the main_task */ 28 | while(1) { 29 | #if 0 30 | PRINT_INFO("in %s %d cpu_mode: %s; lr: 0x%x; sp: 0x%x; cpsr: 0x%x\n", 31 | __func__, __LINE__, get_cpu_mode(NULL), __get_lr(), __get_sp(), __get_cpsr()); 32 | 33 | #endif 34 | /* mdelay(100000); */ 35 | #if 0 36 | PRINT_INFO("in %s %d cpu_mode: %s; lr: 0x%x; sp: 0x%x; cpsr: 0x%x\n", 37 | __func__, __LINE__, get_cpu_mode(NULL), __get_lr(), __get_sp(), __get_cpsr()); 38 | #endif 39 | } 40 | return 0; 41 | } 42 | 43 | PUBLIC s32 os_sleep(u32 ms) 44 | { 45 | 46 | u32 ticks = (ms * OS_HZ) / 1000; 47 | current_task->sleep_ticks = ticks; 48 | 49 | current_task->state = TASK_SLEEP; 50 | task_dispatch(); 51 | return 0; 52 | } 53 | 54 | PRIVATE void os_clock_irq_hook(struct cpu_context *ctx) 55 | { 56 | struct __os_task__ *best_task; 57 | 58 | os_tick ++ ; 59 | 60 | os_sleep_expire(); 61 | 62 | best_task = get_best_task(); 63 | if (best_task == NULL) { 64 | kassert(current_task == &tcb[IDLE_TASK_ID]); 65 | } else if (best_task->prio <= current_task->prio) { 66 | current_task->state = TASK_READY; 67 | task_dispatch(); 68 | } 69 | } 70 | 71 | PRIVATE s32 coretimer_irq_handler(u32 irq_nr) 72 | { 73 | PRINT_DEBUG("%s start: %d %d\n", __func__, irq_nr, os_tick); 74 | os_clock_irq_hook(current_context); 75 | writel(CORETMCLR, 0x0); 76 | PRINT_DEBUG("%s end: %d %d\n", __func__, irq_nr, os_tick); 77 | return 0; 78 | } 79 | 80 | PRIVATE s32 coretimer_init() 81 | { 82 | /* core timer */ 83 | writel(CORETMLOAD, MS2TICK(1000/OS_HZ)); 84 | /* 23-bit counter & irq enable & timer enable */ 85 | writel(CORETMCTRL, 0x1 << 1 | 0x1 << 5 | 0x1 << 7); 86 | request_irq(IRQ_CORE_TIMER, coretimer_irq_handler); 87 | enable_irq(IRQ_CORE_TIMER); 88 | return 0; 89 | } 90 | 91 | s32 os_main(u32 sp) 92 | { 93 | struct __os_task__ *ptask; 94 | 95 | int_init(); 96 | uart_init(); 97 | dram_init(); 98 | timer_init(); 99 | mmc_init(); 100 | 101 | PRINT_INFO("%s\n", sys_banner); 102 | 103 | coretimer_init(); 104 | task_init(); 105 | semaphore_init(); 106 | 107 | PRINT_INFO("cpu_mode: %s; lr: 0x%x; sp: 0x%x; cpsr: 0x%x\n", 108 | get_cpu_mode(NULL), __get_lr(), sp, __get_cpsr()); 109 | 110 | gpio_set_function(GPIO_16, OUTPUT); 111 | gpio_set_output(GPIO_16, 0); 112 | 113 | /* set_log_level(LOG_DEBUG); */ 114 | 115 | /* create idle task */ 116 | if ((ptask = tcb_alloc()) == NULL) { 117 | panic(); 118 | } 119 | 120 | tcb_init(ptask, idle_task, 0, 256); 121 | 122 | /*os_ready_insert(ptask);*/ 123 | 124 | current_task = &tcb[IDLE_TASK_ID]; /* assume that this is idle_task */ 125 | 126 | /* create main task */ 127 | if ((ptask = tcb_alloc()) == NULL) { 128 | panic(); 129 | } 130 | 131 | tcb_init(ptask, main_task, 0, 100); 132 | 133 | os_ready_insert(ptask); 134 | 135 | /* 'slip into idle task', cause the os_main() is not a task (it's the god code of system) */ 136 | __set_sp(&(task_stack[0][TASK_STK_SIZE])); 137 | current_task->state = TASK_RUNNING; 138 | idle_task(0); 139 | 140 | kassert(0); 141 | return 0; 142 | } 143 | 144 | -------------------------------------------------------------------------------- /kernel/kernel.mk: -------------------------------------------------------------------------------- 1 | KERNEL_SRCS = \ 2 | $(KERNEL_DIR)/kernel.c \ 3 | $(KERNEL_DIR)/os_task.c \ 4 | $(KERNEL_DIR)/os_sleep.c \ 5 | $(KERNEL_DIR)/os_semaphore.c \ 6 | $(KERNEL_DIR)/os_mailbox.c \ 7 | $(KERNEL_DIR)/os_event.c \ 8 | $(KERNEL_DIR)/os_memory.c \ 9 | $(KERNEL_DIR)/os_list.c 10 | 11 | -------------------------------------------------------------------------------- /kernel/os_event.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | 5 | /* event: L16: event waiting ; H16:event already issued */ 6 | s32 event_wait(u32 task_id, u16 event) 7 | { 8 | u8 i, bw, bp; 9 | u16 eventw, eventp; 10 | kassert(task_id < TASK_NR_MAX); 11 | 12 | eventw = (u16)(tcb[task_id].events); /* event waiting */ 13 | eventp = (u16)(tcb[task_id].events >> 16); /* event pending (already happened) */ 14 | 15 | eventw |= event; 16 | 17 | for(i = 0; i < 16; i++) { 18 | bw = get_bit(eventw, i); 19 | bp = get_bit(eventp, i); 20 | if (bp == 1 && bw == 1) { 21 | set_bit((u32 *)&eventp, i, 0); 22 | set_bit((u32 *)&eventw, i, 0); 23 | } 24 | } 25 | 26 | tcb[task_id].events = eventp << 16 | eventw; 27 | if (eventw != 0) { 28 | current_task->state = TASK_WAIT_EVENT; 29 | task_dispatch(); 30 | } 31 | 32 | return 0; 33 | } 34 | 35 | s32 event_release(u32 task_id, u16 event) 36 | { 37 | u8 i, bw, bp; 38 | u16 eventw, eventp; 39 | struct __os_task__ *ptask = NULL; 40 | 41 | kassert(task_id < TASK_NR_MAX); 42 | 43 | ptask = &tcb[task_id]; 44 | eventw = (u16)(tcb[task_id].events); /* event waiting */ 45 | eventp = (u16)(tcb[task_id].events >> 16); /* event pending (already happened) */ 46 | 47 | eventw |= event; 48 | 49 | for(i = 0; i < 16; i++) { 50 | bw = get_bit(eventw, i); 51 | bp = get_bit(eventp, i); 52 | if (bp == 1 && bw == 1) { 53 | set_bit((u32 *)&eventp, i, 0); 54 | set_bit((u32 *)&eventw, i, 0); 55 | } 56 | } 57 | 58 | tcb[task_id].events = eventp << 16 | eventw; 59 | if (eventw == 0) { 60 | ptask->state = TASK_READY; 61 | os_ready_insert(ptask); 62 | 63 | if (ptask->prio < current_task->prio) { 64 | current_task->state = TASK_READY; 65 | task_dispatch(); 66 | } 67 | } 68 | 69 | return 0; 70 | 71 | } 72 | -------------------------------------------------------------------------------- /kernel/os_list.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | 5 | #include "log.h" 6 | 7 | struct __os_list__ os_ready_list = {.type = OS_READY, .next = NULL, .prev = NULL}; 8 | struct __os_list__ os_sleep_list = {.type = OS_SLEEP, .next = NULL, .prev = NULL}; 9 | 10 | s32 list_insert(struct __os_list__ *list, struct __os_task__ *ptask) 11 | { 12 | struct __os_task__ *pprev, *pcurr; 13 | pprev = (struct __os_task__ *)list; 14 | pcurr = list->next; 15 | 16 | if (list->type == OS_READY || 17 | list->type == OS_SEM || 18 | list->type == OS_MBX ) { 19 | while (pcurr != NULL && pcurr->prio <= ptask->prio) { 20 | pprev = pcurr; 21 | pcurr = pcurr->next; 22 | } 23 | pprev->next = ptask; 24 | ptask->next = pcurr; 25 | 26 | ptask->prev = pprev; 27 | 28 | if (pcurr != NULL) { 29 | pcurr->prev = ptask; 30 | } 31 | 32 | } else if (list->type == OS_SLEEP) { 33 | while (pcurr != NULL && pcurr->sleep_ticks <= ptask->sleep_ticks) { 34 | pprev = pcurr; 35 | pcurr = pcurr->next; 36 | } 37 | pprev->next = ptask; 38 | ptask->next = pcurr; 39 | 40 | ptask->prev = pprev; 41 | 42 | if (pcurr != NULL) { 43 | pcurr->prev = ptask; 44 | } 45 | 46 | } else { 47 | panic(); 48 | } 49 | return 0; 50 | } 51 | 52 | s32 list_delete(struct __os_list__ *list, struct __os_task__ *ptask) 53 | { 54 | struct __os_task__ *pprev, *pcurr; 55 | pprev = (struct __os_task__ *)list; 56 | pcurr = list->next; 57 | 58 | PRINT_DEBUG("list delete %x from list %d\n", ptask, list->type); 59 | while (pcurr != ptask && pcurr != NULL) { 60 | pprev = pcurr; 61 | pcurr = pcurr->next; 62 | } 63 | 64 | kassert(pcurr != NULL); 65 | 66 | pprev->next = ptask->next; 67 | 68 | if (ptask->next != NULL) { 69 | ptask->next->prev = pprev; 70 | } 71 | return 0; 72 | } 73 | 74 | -------------------------------------------------------------------------------- /kernel/os_mailbox.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | 5 | /* for producer (int context or task context (FIXME)) */ 6 | /* mail_alloc -> mailbox_put */ 7 | 8 | /* for consumer (task context) */ 9 | /* mailbox_get -> mail_free */ 10 | 11 | struct __os_mailbox__ os_mailbox[MBX_NR_MAX]; 12 | 13 | PRIVATE s32 get_free_mbx() 14 | { 15 | u32 i; 16 | for(i = 0; i < MBX_NR_MAX; i++) { 17 | if (os_mailbox[i].status == MBX_FREE) { 18 | return i; 19 | } 20 | } 21 | return -1; 22 | } 23 | 24 | s32 mailbox_create(void *addr, u32 mail_size, u32 mail_nr) 25 | { 26 | s32 mbx_id; 27 | mbx_id = get_free_mbx(); 28 | 29 | if (mbx_id != -1) { 30 | os_mailbox[mbx_id].status = MBX_EMPTY; 31 | os_mailbox[mbx_id].mailbox = addr; 32 | os_mailbox[mbx_id].mail_size = mail_size; 33 | os_mailbox[mbx_id].mail_nr = mail_nr; 34 | os_mailbox[mbx_id].head = 0; 35 | os_mailbox[mbx_id].tail = 0; 36 | os_mailbox[mbx_id].next = NULL; 37 | return mbx_id; 38 | } else { 39 | return -1; 40 | } 41 | 42 | } 43 | 44 | /* producer */ 45 | s32 mail_alloc(u32 mbx_id) 46 | { 47 | u32 mail_addr = 0; 48 | 49 | kassert(mbx_id < MBX_NR_MAX); 50 | 51 | if (os_mailbox[mbx_id].status != MBX_FULL) { 52 | mail_addr = (u32)(os_mailbox[mbx_id].mailbox) + os_mailbox[mbx_id].tail * os_mailbox[mbx_id].mail_size; 53 | } 54 | 55 | return mail_addr; 56 | } 57 | 58 | /* producer */ 59 | s32 mailbox_put(u32 mbx_id, void *mail) 60 | { 61 | u32 mail_index; 62 | struct __os_mailbox__ *pmbx; 63 | struct __os_task__ *ptask; 64 | struct __cpu_context__ *cc; 65 | 66 | kassert(mbx_id < MBX_NR_MAX); 67 | 68 | pmbx = &os_mailbox[mbx_id]; 69 | mail_index = ((u32)mail - (u32)(pmbx->mailbox)) / pmbx->mail_size; 70 | 71 | kassert(mail_index == pmbx->tail); 72 | 73 | pmbx->tail++ ; 74 | pmbx->tail = pmbx->tail % pmbx->mail_nr; 75 | 76 | if (pmbx->tail == pmbx->head) { 77 | pmbx->status = MBX_FULL; 78 | } 79 | 80 | /* somebody is waiting for mail, wake it up */ 81 | if (pmbx->next != NULL) { 82 | ptask = pmbx->next; 83 | 84 | mail = (void *)((u32)(pmbx->mailbox) + pmbx->head * pmbx->mail_size); 85 | pmbx->head++; 86 | pmbx->head = pmbx->head % pmbx->mail_nr; 87 | 88 | cc = (struct __cpu_context__ *)(ptask->sp); 89 | cc->r0 = (u32)mail; 90 | 91 | ptask->state = TASK_READY; 92 | os_mbx_delete(pmbx, ptask); 93 | os_ready_insert(ptask); 94 | 95 | if (ptask->prio < current_task->prio) { 96 | current_task->state = TASK_READY; 97 | task_dispatch(); 98 | } 99 | } 100 | 101 | return 0; 102 | } 103 | 104 | /* consumer */ 105 | s32 mailbox_get(u32 mbx_id) 106 | { 107 | u32 mail; 108 | struct __os_mailbox__ *pmbx = NULL; 109 | 110 | pmbx = &os_mailbox[mbx_id]; 111 | 112 | get_mail: 113 | 114 | if (os_mailbox[mbx_id].status != MBX_EMPTY) { 115 | mail = (u32)(pmbx->mailbox) + pmbx->head * pmbx->mail_size; 116 | pmbx->head++; 117 | pmbx->head = pmbx->head % pmbx->mail_nr; 118 | } else { 119 | /* wait in mbx list */ 120 | current_task->private_data = pmbx; 121 | current_task->state = TASK_WAIT_MBX; 122 | task_dispatch(); 123 | goto get_mail; /* FIXME: we are in swi context, how can the task restore in swi context? need read the arm-v6 TRM */ 124 | } 125 | 126 | return mail; 127 | } 128 | 129 | /* consumer */ 130 | s32 mail_free(u32 mbx_id, void *mail) 131 | { 132 | u32 mail_index; 133 | struct __os_mailbox__ *pmbx = NULL; 134 | 135 | kassert(mbx_id < MBX_NR_MAX); 136 | kassert(mail != NULL); 137 | kassert(os_mailbox[mbx_id].status != MBX_EMPTY); 138 | pmbx = &os_mailbox[mbx_id]; 139 | 140 | mail_index = ((u32)mail - (u32)pmbx->mailbox) / pmbx->mail_size; 141 | 142 | kassert(mail_index == pmbx->head); 143 | 144 | pmbx->head++; 145 | 146 | pmbx->head = pmbx->head % pmbx->mail_nr; 147 | 148 | if (pmbx->tail == pmbx->head) { 149 | pmbx->status = MBX_EMPTY; 150 | } 151 | 152 | if (pmbx->status == MBX_FULL) { 153 | pmbx->status = MBX_IDLE; 154 | } 155 | 156 | return 0; 157 | } 158 | 159 | s32 mailbox_delete(u32 mbx_id) 160 | { 161 | kassert(mbx_id < MBX_NR_MAX); 162 | os_mailbox[mbx_id].status = MBX_FREE; 163 | return 0; 164 | } 165 | 166 | s32 mailbox_init() 167 | { 168 | u32 i; 169 | for(i = 0; i < MBX_NR_MAX; i++) { 170 | os_mailbox[i].type = OS_MBX; 171 | os_mailbox[i].next = NULL; 172 | os_mailbox[i].status = MBX_FREE; 173 | os_mailbox[i].mailbox = NULL; 174 | os_mailbox[i].mail_nr = 0; 175 | os_mailbox[i].mail_size = 0; 176 | os_mailbox[i].head = 0; 177 | os_mailbox[i].tail = 0; 178 | } 179 | 180 | return 0; 181 | } 182 | -------------------------------------------------------------------------------- /kernel/os_memory.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | #include "log.h" 5 | 6 | /* |mp|first...|last| */ 7 | struct __memory_pool__ * memory_pool_init(void *mem, u32 size) 8 | { 9 | struct __memory_pool__ *mp; 10 | struct pnode *first, *last; 11 | 12 | if (size <= sizeof(struct __memory_pool__) + 2 * sizeof(struct pnode)) { 13 | return NULL; 14 | } 15 | 16 | size = size - sizeof(struct __memory_pool__) - sizeof(struct pnode); 17 | 18 | mp = (struct __memory_pool__ *)mem; 19 | first = (struct pnode *)((u32)mem + sizeof(struct __memory_pool__)); 20 | last = (struct pnode *)((u32)mem + size - sizeof(struct __memory_pool__)); 21 | 22 | last->next = NULL; 23 | last->prev = NULL; 24 | last->size = 0; 25 | 26 | first->next = last; 27 | first->prev = (struct pnode *)mp; 28 | first->size = size; 29 | 30 | mp->next = first; 31 | mp->size = size; 32 | 33 | return mp; 34 | } 35 | 36 | void * memory_pool_alloc(struct __memory_pool__ *mp, u32 size) 37 | { 38 | u32 left_size = 0; 39 | 40 | struct pnode *ppn, *ppnn; 41 | 42 | ppn = mp->next; 43 | 44 | while(ppn->size != 0) { 45 | 46 | if (ppn->size > 0 && ppn->size >= (sizeof(struct pnode) + size)) { 47 | left_size = (u32)(ppn->next) - (u32)ppn - sizeof(struct pnode) - size; 48 | if (left_size > sizeof(struct pnode)) { 49 | ppnn = (struct pnode *)((u32)ppn + sizeof(struct pnode) + size); 50 | 51 | ppnn->size = ppn->size - (sizeof(struct pnode) + size); 52 | 53 | ppnn->next = ppn->next; 54 | ppnn->prev = ppn; 55 | 56 | ppn->next = ppnn; 57 | 58 | ppn->size = ppn->size - ppnn->size; 59 | 60 | } 61 | 62 | break; 63 | } 64 | 65 | ppn = ppn->next; 66 | } 67 | 68 | if (ppn->size == 0) { /* the last node */ 69 | return NULL; 70 | } else { 71 | ppn->size = -ppn->size; 72 | return (void *)((u32)(ppn) + sizeof(struct pnode)); 73 | } 74 | 75 | } 76 | 77 | void memory_pool_free(struct __memory_pool__ *mp, void *mem) 78 | { 79 | struct pnode *ppn; 80 | ppn = (struct pnode *)((u32)mem - sizeof(struct pnode)); 81 | kassert(ppn->size <= 0 && ppn->next != NULL && ppn->prev != NULL); 82 | 83 | ppn->size = -ppn->size; 84 | /* back merge */ 85 | if (ppn->next->size > 0) { 86 | ppn->size += ppn->next->size; 87 | ppn->next->next->prev = ppn; 88 | ppn->next = ppn->next->next; 89 | } 90 | 91 | /* front merge */ 92 | if (ppn != mp->next) { 93 | if (ppn->prev->size > 0) { 94 | ppn->prev->size += ppn->size; 95 | ppn->prev->next = ppn->next; 96 | ppn->next->prev = ppn->prev; 97 | } 98 | } 99 | 100 | } 101 | 102 | struct __memory_box__ * memory_box_init(void *mem, u32 size, u32 cell_size) 103 | { 104 | u32 cell_nr1, cell_nr2; 105 | struct __memory_box__ *mb; 106 | 107 | if (size >= sizeof(struct __memory_box__)) { 108 | return NULL; 109 | } 110 | 111 | memset(mem, 0, size); 112 | 113 | mb = (struct __memory_box__ *)mem; 114 | 115 | size = size - sizeof(struct __memory_box__); 116 | cell_nr2 = size / cell_size; 117 | cell_nr1 = (size % cell_size) * sizeof(u8); 118 | 119 | while (cell_nr1 < cell_nr2) { 120 | cell_nr2--; 121 | cell_nr1 = cell_nr1 + cell_size * sizeof(u8); 122 | } 123 | 124 | 125 | mb->addr = (void *)((u32)mem + size - cell_size * cell_nr2); 126 | mb->cell_nr = cell_nr2; 127 | mb->cell_size = cell_size; 128 | 129 | return mb; 130 | } 131 | 132 | void * memory_box_alloc(struct __memory_box__ *mb) 133 | { 134 | s32 i; 135 | if ((i = bitmap_ffz(mb->map, mb->cell_nr)) == -1) { 136 | return NULL; 137 | } 138 | 139 | bitmap_set(mb->map, mb->cell_nr, i, 1); 140 | return (void *)((u32)(mb->addr) + i * mb->cell_size); 141 | } 142 | 143 | void memory_box_free(struct __memory_box__ *mb, void *cell) 144 | { 145 | u32 i; 146 | i = ((u32)(cell) - (u32)(mb->addr)) / mb->cell_size; 147 | 148 | kassert(i < mb->cell_nr); 149 | 150 | bitmap_set(mb->map, mb->cell_nr, i, 0); 151 | } 152 | -------------------------------------------------------------------------------- /kernel/os_semaphore.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | 5 | struct __os_semaphore__ os_semaphore[SEM_NR_MAX]; 6 | 7 | PRIVATE s32 get_free_sem() 8 | { 9 | u32 i; 10 | for(i = 0; i < SEM_NR_MAX; i++) { 11 | if (os_semaphore[i].status == SEM_FREE) { 12 | return i; 13 | } 14 | } 15 | return -1; 16 | } 17 | 18 | PUBLIC s32 semaphore_create(u32 res_num) 19 | { 20 | s32 sem_id; 21 | sem_id = get_free_sem(); 22 | 23 | if (sem_id != -1) { 24 | os_semaphore[sem_id].status = SEM_USED; 25 | os_semaphore[sem_id].token = res_num; 26 | } 27 | 28 | return sem_id; 29 | } 30 | 31 | PUBLIC s32 semaphore_get(u32 sem_id) 32 | { 33 | struct __os_semaphore__ *psem = NULL; 34 | 35 | kassert(sem_id < SEM_NR_MAX); 36 | kassert(os_semaphore[sem_id].status == SEM_USED); 37 | 38 | psem = &os_semaphore[sem_id]; 39 | 40 | if (psem->token == 0) { 41 | current_task->private_data = psem; 42 | current_task->state = TASK_WAIT_SEM; 43 | task_dispatch(); 44 | } else { 45 | psem->token -- ; 46 | } 47 | 48 | return 0; 49 | } 50 | 51 | /* 52 | FIXME: 1. task A prio 10 is waiting for sem, but token == 0, so put it in sem list 53 | 2. task D prio 20 running, it create a task B prio 5 54 | 3. task B prio 5 running, it put the sem, token -> 1, then put task A in ready list 55 | 4. task B exit, then assume task C prio 7 running, get the sem, token -> 0; 56 | 5. at this point, task B should not run, but task B is in ready list! 57 | */ 58 | 59 | PUBLIC s32 semaphore_put(u32 sem_id) 60 | { 61 | struct __os_semaphore__ *psem = NULL; 62 | struct __os_task__ *ptask = NULL; 63 | 64 | kassert(sem_id < SEM_NR_MAX); 65 | kassert(os_semaphore[sem_id].status == SEM_USED); 66 | 67 | psem = &os_semaphore[sem_id]; 68 | 69 | psem->token ++; 70 | if (psem->token == 1) { /* 0 -> 1 */ 71 | if (psem->next != NULL) { /* somebody is waiting for the sem */ 72 | psem->token --; 73 | ptask = psem->next; 74 | ptask->state = TASK_READY; 75 | os_sem_delete(psem, ptask); 76 | os_ready_insert(ptask); 77 | 78 | if (ptask->prio < current_task->prio) { 79 | current_task->state = TASK_READY; 80 | task_dispatch(); 81 | } 82 | } 83 | } 84 | 85 | return 0; 86 | } 87 | 88 | PUBLIC s32 semaphore_delete(u32 sem_id) 89 | { 90 | struct __os_semaphore__ *psem = NULL; 91 | 92 | kassert(sem_id < SEM_NR_MAX); 93 | kassert(os_semaphore[sem_id].status == SEM_USED); 94 | 95 | psem = &os_semaphore[sem_id]; 96 | assert(psem->next == NULL); 97 | psem->status = SEM_FREE; 98 | psem->token = 0; 99 | return 0; 100 | } 101 | 102 | PUBLIC struct __os_semaphore__ * semaphore_init() 103 | { 104 | u32 i; 105 | for(i = 0; i < SEM_NR_MAX; i++) { 106 | os_semaphore[i].type = OS_SEM; 107 | os_semaphore[i].next = NULL; 108 | os_semaphore[i].status = SEM_FREE; 109 | os_semaphore[i].token = 0; 110 | } 111 | return 0; 112 | } 113 | 114 | -------------------------------------------------------------------------------- /kernel/os_sleep.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | #include "log.h" 5 | 6 | extern struct __os_list__ os_sleep_list; 7 | 8 | PUBLIC s32 os_sleep_expire() 9 | { 10 | struct __os_task__ *pprev, *pcurr; 11 | 12 | pprev = (struct __os_task__ *)&os_sleep_list; 13 | pcurr = pprev->next; 14 | 15 | /* FIXME: it's a stupid-loop, I am a impatient man */ 16 | while (pcurr != NULL) { 17 | pcurr->sleep_ticks--; 18 | if (pcurr->sleep_ticks == 0) { 19 | 20 | if (pcurr->next == NULL) { 21 | pcurr->prev = NULL; 22 | pprev->next = NULL; 23 | } else { 24 | pprev->next = pcurr->next; 25 | pcurr->next->prev = pprev; 26 | } 27 | 28 | pcurr->state = TASK_READY; 29 | os_ready_insert(pcurr); 30 | 31 | /* pick next task */ 32 | pcurr = pprev->next; 33 | 34 | } else { 35 | pprev = pcurr; 36 | pcurr = pcurr->next; 37 | } 38 | } 39 | 40 | return 0; 41 | } 42 | -------------------------------------------------------------------------------- /kernel/os_task.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | #include "log.h" 5 | 6 | PRIVATE void task_sched(struct __os_task__ *best_task); 7 | 8 | struct __os_task__ tcb[TASK_NR_MAX] __attribute__((__aligned__(0x100))); 9 | u32 task_stack[TASK_NR_MAX][TASK_STK_SIZE] __attribute__((__aligned__(0x100))); 10 | 11 | /* get current task id, little hack */ 12 | PRIVATE u32 get_current_task() 13 | { 14 | u32 task_id; 15 | u32 sp = __get_sp(); 16 | 17 | task_id = (sp - (u32)task_stack) / (TASK_STK_SIZE * 4); 18 | PRINT_EMG("task_id: %d\n", task_id); 19 | kassert(task_id <= TASK_NR_MAX); 20 | return task_id; 21 | } 22 | 23 | /* get the highest priority task in os_ready_list */ 24 | PUBLIC struct __os_task__ * get_task_ready() 25 | { 26 | struct __os_task__ *ptask; 27 | ptask = os_ready_list.next; 28 | PRINT_DEBUG("get_task_ready %x \n", ptask); 29 | return ptask; 30 | } 31 | 32 | PUBLIC struct __os_task__ * tcb_alloc() 33 | { 34 | u32 i; 35 | 36 | for(i = 0; i < sizeof(tcb)/sizeof(tcb[0]); i++) { 37 | if (tcb[i].state == TASK_UNUSED) { 38 | tcb[i].id = i; 39 | return &tcb[i]; 40 | } 41 | } 42 | return NULL; 43 | } 44 | 45 | PRIVATE void task_matrix(u32 addr, u32 arg) 46 | { 47 | u32 current_task_id; 48 | func_1 task_entry = (func_1)addr; 49 | task_entry(arg); 50 | current_task_id = get_current_task(); 51 | 52 | task_delete(current_task_id); 53 | while(1); 54 | } 55 | 56 | /* PRIVATE */ s32 tcb_init(struct __os_task__ *ptask, func_1 task_entry, u32 arg, u32 priority) 57 | { 58 | struct __cpu_context__ *cc; 59 | 60 | ptask->state = TASK_READY; 61 | ptask->prio = priority; 62 | ptask->stack = &task_stack[ptask->id][0]; 63 | ptask->stack_size = TASK_STK_SIZE; 64 | ptask->entry = task_entry; 65 | ptask->sleep_ticks = 0; 66 | ptask->events = 0; 67 | 68 | /* task context init */ 69 | cc = (struct __cpu_context__ *) 70 | (&(ptask->stack[TASK_STK_SIZE - (sizeof(struct __cpu_context__) / 4)])); 71 | 72 | cc->cpsr = 0x15F; /* irq enable, fiq disable, arm instruction, system mode */ 73 | cc->r0 = (u32)task_entry; 74 | cc->r1 = arg; 75 | cc->r2 = 0; 76 | cc->r3 = 0; 77 | cc->r4 = 0; 78 | cc->r5 = 0; 79 | cc->r6 = 0; 80 | cc->r7 = 0; 81 | cc->r8 = 0; 82 | cc->r9 = 0; 83 | cc->r10 = 0; 84 | cc->r11 = 0; 85 | cc->r12 = 0; 86 | cc->sp = (u32)(&ptask->stack[TASK_STK_SIZE]); 87 | cc->lr = 0; 88 | cc->pc = (u32)task_matrix + 4; /* real pc + 4, create the fake irq mode saved cpu_context */ 89 | 90 | ptask->sp = (u32)cc; 91 | 92 | ptask->stack[0] = 0xbadbeef; 93 | 94 | return 0; 95 | } 96 | 97 | PUBLIC struct __os_task__ * get_best_task() 98 | { 99 | struct __os_task__ *best_task = NULL; 100 | 101 | best_task = get_task_ready(); /* get the highest priority task in READY STATE */ 102 | 103 | PRINT_DEBUG("get best_task %x \n", best_task); 104 | #if 0 105 | if (best_task->prio <= current_task->prio || /* current_task create a higher prio task */ 106 | current_task->state == TASK_UNUSED || /* current_task self-destruction */ 107 | current_task->state == TASK_SLEEP || /* current_task invoke os_sleep */ 108 | current_task->state == TASK_WAIT_SEM /* current_task wait for semaphore */ 109 | ) { 110 | PRINT_DEBUG("schedule task %d \n", best_task->id); 111 | return best_task; 112 | } 113 | #endif 114 | return best_task; 115 | } 116 | 117 | PUBLIC s32 task_dispatch() 118 | { 119 | struct __os_task__ *best_task; 120 | 121 | best_task = get_best_task(); 122 | PRINT_DEBUG("task_dispatch %d \n", best_task->id); 123 | task_sched(best_task); 124 | 125 | return 0; 126 | } 127 | 128 | PUBLIC s32 task_create(func_1 entry, u32 arg, u32 prio) 129 | { 130 | struct __os_task__ *ptask; 131 | if ((ptask = tcb_alloc()) == NULL) { 132 | kassert(0); 133 | } 134 | 135 | tcb_init(ptask, entry, arg, prio); 136 | 137 | os_ready_insert(ptask); /* FIXME: do task switch immediately if a higher task created. */ 138 | 139 | if (ptask->prio < current_task->prio) { 140 | current_task->state = TASK_READY; 141 | task_dispatch(); 142 | } 143 | 144 | return ptask->id; 145 | } 146 | 147 | PUBLIC s32 task_delete(u32 task_id) 148 | { 149 | tcb[task_id].prio = TASK_PRIO_MAX; /* lowest prio */ 150 | tcb[task_id].state = TASK_UNUSED; 151 | /* FIXME: do task switch immediately */ 152 | return 0; 153 | } 154 | 155 | PUBLIC s32 task_sleep(u32 ticks) 156 | { 157 | current_task->sleep_ticks = ticks; 158 | current_task->state = TASK_SLEEP; 159 | task_dispatch(); 160 | return 0; 161 | } 162 | 163 | /* 164 | 1. update new_task (request a task switch) 165 | 2. delete the best_task from os_ready_list 166 | 3. insert old_task into os_sleep_list or os_ready_list or sem_list or mbx_list. 167 | */ 168 | PRIVATE void task_sched(struct __os_task__ *best_task) 169 | { 170 | struct __os_task__ *old_task; 171 | struct __os_semaphore__ *psem; 172 | struct __os_mailbox__ *pmbx; 173 | 174 | old_task = current_task; 175 | new_task = best_task; 176 | 177 | new_task->state = TASK_RUNNING; 178 | os_ready_delete(best_task); 179 | 180 | switch (old_task->state) { 181 | case (TASK_UNUSED): /* current task self-destruction */ 182 | break; 183 | #if 0 184 | case (TASK_RUNNING): /* current task create higher prio task */ 185 | old_task->state = TASK_READY; 186 | os_ready_insert(old_task); 187 | break; 188 | #endif 189 | case (TASK_READY): /* current task create higher prio task */ 190 | os_ready_insert(old_task); 191 | break; 192 | case (TASK_SLEEP): /* current task invoke os_task_sleep sleep */ 193 | os_sleep_insert(old_task); 194 | break; 195 | case (TASK_WAIT_SEM): 196 | psem = (struct __os_semaphore__ *)(old_task->private_data); 197 | os_sem_insert(psem, old_task); 198 | break; 199 | case (TASK_WAIT_MBX): 200 | pmbx = (struct __os_mailbox__ *)(old_task->private_data); 201 | os_mbx_insert(pmbx, old_task); 202 | break; 203 | case (TASK_WAIT_EVENT): 204 | /* TODO */ 205 | break; 206 | default: 207 | kassert(0); 208 | } 209 | 210 | /* dump_list(); */ 211 | PRINT_DEBUG("schedule %d \n", new_task->id); 212 | } 213 | 214 | PUBLIC s32 task_init() 215 | { 216 | return 0; 217 | } 218 | -------------------------------------------------------------------------------- /libc/bitmap.c: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | u8 bitmap_get(void *map, u32 bit_max, u32 bit_index) 4 | { 5 | u8 bit; 6 | u32 word_index, word_offset; 7 | u32 *pmap; 8 | 9 | bit_index = bit_index % bit_max; 10 | 11 | pmap = map; 12 | word_index = bit_index / 32; 13 | word_offset = bit_index % 32; 14 | 15 | bit = pmap[word_index] & (0x1 << word_offset); 16 | 17 | return bit; 18 | } 19 | 20 | u8 bitmap_set(void *map, u32 bit_max, u32 bit_index, u8 bit) 21 | { 22 | u32 word_index, word_offset; 23 | u32 *pmap; 24 | u32 bit_mask; 25 | 26 | bit_index = bit_index % bit_max; 27 | 28 | pmap = map; 29 | word_index = bit_index / 32; 30 | word_offset = bit_index % 32; 31 | 32 | if (bit == 0) { 33 | bit_mask = ~(0x1 << word_offset); 34 | pmap[word_index] = (pmap[word_index]) & bit_mask; 35 | } else { /* b == 1 */ 36 | bit_mask = (0x1 << word_offset); 37 | pmap[word_index] = (pmap[word_index]) | bit_mask; 38 | } 39 | 40 | return 0; 41 | } 42 | 43 | /* find first zero */ 44 | s32 bitmap_ffz(void *map, u32 bit_max) 45 | { 46 | u32 i; 47 | for(i = 0; i < bit_max; i++) { 48 | if (bitmap_get(map, bit_max, i) == 0) { 49 | return i; 50 | } 51 | } 52 | return -1; 53 | } 54 | -------------------------------------------------------------------------------- /libc/libc.mk: -------------------------------------------------------------------------------- 1 | LIBC_SRCS = \ 2 | $(LIBC_DIR)/string.c \ 3 | $(LIBC_DIR)/signal.c \ 4 | $(LIBC_DIR)/bitmap.c \ 5 | $(LIBC_DIR)/vsnprintf.c 6 | -------------------------------------------------------------------------------- /libc/signal.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include "int.h" 3 | 4 | /* __aeabi_ldiv0 will call raise */ 5 | s32 raise(s32 signum) 6 | { 7 | lockup(); 8 | return 0; 9 | } 10 | -------------------------------------------------------------------------------- /libc/string.c: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | u32 strlen(const char *str) 4 | { 5 | u32 i = 0; 6 | while(str[i] != '\0') { 7 | i++; 8 | } 9 | return i; 10 | } 11 | 12 | s32 strcmp(char *s1, char *s2) 13 | { 14 | u32 i; 15 | s32 delta; 16 | 17 | if (s1 == NULL && s2 == NULL) { 18 | return 0; 19 | } 20 | 21 | if (s1 == NULL && s2 != NULL) { 22 | return 1; 23 | } 24 | 25 | if (s1 != NULL && s2 == NULL) { 26 | return -1; 27 | } 28 | 29 | /* s1 != NULL && s2 != NULL */ 30 | for(i=0; s1[i]!= '\0' && s2[i] != '\0'; i++) { 31 | delta = s1[i] - s2[i]; 32 | if (delta != 0) { 33 | return delta; 34 | } 35 | } 36 | 37 | return s1[i] - s2[i]; 38 | } 39 | 40 | u32 atoi(char *str) 41 | { 42 | u32 i; 43 | u32 len; 44 | u32 sum = 0; 45 | 46 | len = strlen(str); 47 | if (len == 0) { 48 | return 0; 49 | } 50 | 51 | if (len >= 2 && str[0] == '0' && (str[1] == 'x' || str[1] == 'X')) { /* hex */ 52 | i = 2; 53 | while(i < len) { 54 | switch(str[i]) { 55 | 56 | case ('a'): case ('b'): case ('c'): case ('d'): case ('e'): case ('f'): 57 | sum = sum*16 + (str[i] - 'a' + 10); 58 | break; 59 | 60 | case ('A'): case ('B'): case ('C'): case ('D'): case ('E'): case ('F'): 61 | sum = sum*16 + (str[i] - 'A' + 10); 62 | break; 63 | 64 | case ('0'): case ('1'): case ('2'): case ('3'): case ('4'): 65 | case ('5'): case ('6'): case ('7'): case ('8'): case ('9'): 66 | sum = sum*16 + (str[i] - '0'); 67 | break; 68 | 69 | default: 70 | return 0; 71 | 72 | } 73 | i++; 74 | } 75 | } else { /* dec */ 76 | i = 0; 77 | while(i < len) { 78 | switch(str[i]) { 79 | 80 | case ('0'): case ('1'): case ('2'): case ('3'): case ('4'): 81 | case ('5'): case ('6'): case ('7'): case ('8'): case ('9'): 82 | sum = sum*10 + (str[i] - '0'); 83 | break; 84 | 85 | default: 86 | return 0; 87 | 88 | } 89 | i++; 90 | } 91 | 92 | } 93 | return sum; 94 | } 95 | 96 | void *memset(void *s, s32 c, u32 size) 97 | { 98 | u32 i; 99 | char *_s = (char*)s; 100 | for(i=0;i= 0; i--) { 155 | if (x & (1 << i)) { 156 | return i + 1; 157 | } 158 | } 159 | 160 | return 0; 161 | 162 | } 163 | 164 | -------------------------------------------------------------------------------- /libc/vsnprintf.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | 5 | PRIVATE u32 buf_putc(char *buf, u32 size, u32 *offset, u8 c) 6 | { 7 | u32 off = *offset; 8 | if (off < size) { 9 | buf[off] = c; 10 | *offset = off + 1; 11 | } 12 | return 0; 13 | } 14 | 15 | PRIVATE u32 buf_puts(char *buf, u32 size, u32 *offset, char *s) 16 | { 17 | u32 i; 18 | for(i=0;s[i]!='\0';i++) { 19 | buf_putc(buf, size, offset, s[i]); 20 | } 21 | return 0; 22 | } 23 | 24 | /* buf size: 10 if radix == 10; 8 if radix == 16 */ 25 | PUBLIC char * itoa(char *buf, u32 x, u32 radix) 26 | { 27 | s32 i; 28 | memset(buf, '0', 10); 29 | 30 | for(i=9;i>=0;i--) { 31 | switch (radix) { 32 | case (10): 33 | buf[i] =(x % radix) + '0'; 34 | x = x / radix ; 35 | break; 36 | case (16): 37 | if ((x % radix) < 10) { 38 | buf[i] = (x % radix) + '0'; 39 | } else { 40 | buf[i] = (x % radix) - 10 + 'A'; 41 | } 42 | x = x / radix ; 43 | break; 44 | default: 45 | return NULL; 46 | } 47 | } 48 | for(i=0;i<9;i++) { 49 | if (buf[i] != '0') { 50 | break; 51 | } 52 | } 53 | 54 | 55 | return &buf[i]; 56 | 57 | } 58 | 59 | /* as simple as possible, only support %c %d %x %X(not omit the high '0') %s, and don't care the negative num */ 60 | /* of course, I don't care the efficiency as well */ 61 | /* return: the strlen(string), that is, not include the '\0' */ 62 | PUBLIC int vsnprintf(char *buf, u32 size, const char *fmt, va_list args) 63 | { 64 | u32 i, offset, len; 65 | u8 c; 66 | u32 d, x; 67 | char *s, *b; 68 | 69 | char num[11]; /* 2^32 = 4294967296 + '\0' */ 70 | 71 | offset = 0; 72 | memset(buf, 0, size); 73 | memset(num, 0, sizeof(num)); 74 | len = strlen(fmt); 75 | 76 | for(i=0;i 2 | 3 | #include 4 | #include 5 | 6 | #include 7 | 8 | #include "mmio.h" 9 | #include "uart.h" 10 | #include "timer.h" 11 | #include "uart.h" 12 | #include "log.h" 13 | #include "gpio.h" 14 | #include "cpu.h" 15 | 16 | void __aeabi_unwind_cpp_pr0() {} 17 | void __aeabi_unwind_cpp_pr1() {} 18 | 19 | s32 blink_task(u32 arg) 20 | { 21 | u32 count = 0; 22 | gpio_set_function(16, OUTPUT); 23 | 24 | while(1) { 25 | PRINT_INFO("in %s %d;\n", __func__, count++); 26 | gpio_set_output(16, 0); /* led on */ 27 | mdelay(1000); 28 | gpio_set_output(16, 1); /* led off */ 29 | mdelay(1000); 30 | 31 | } 32 | return 0; 33 | } 34 | 35 | s32 test_task(u32 arg) 36 | { 37 | u32 count = 0; 38 | while (1) { 39 | PRINT_INFO("in %s %d\n", __func__, count++); 40 | mdelay(1000); 41 | } 42 | 43 | return 0; 44 | } 45 | 46 | u32 test_flag = 0; 47 | PUBLIC s32 main_task(u32 arg) 48 | { 49 | #if 0 50 | u32 tid; 51 | u32 count = 0; 52 | s32 sem_id; 53 | 54 | if ((tid = os_task_create(test_task, 0, 100)) == -1) { 55 | PRINT_EMG("test_task create failed %d !\n", tid); 56 | } 57 | PRINT_EMG("test_task tid %d\n", tid); 58 | 59 | if ((tid = os_task_create(blink_task, 0, 100)) == -1) { 60 | PRINT_EMG("blink_task create failed %d !\n", tid); 61 | } 62 | PRINT_EMG("blink_task tid %d\n", tid); 63 | 64 | if ((sem_id = os_semaphore_create(1) == -1)) { 65 | PRINT_ERR("%s create sem fail! \n", __func__); 66 | } 67 | 68 | while (1) { 69 | PRINT_INFO("in %s %d %d\n", __func__, __LINE__, count++); 70 | os_task_sleep(5*OS_HZ); /* 10 s */ 71 | os_semaphore_get(sem_id); 72 | PRINT_INFO("in %s %d %d\n", __func__, __LINE__, count++); 73 | } 74 | #endif 75 | return 0; 76 | } 77 | -------------------------------------------------------------------------------- /platform/platform.mk: -------------------------------------------------------------------------------- 1 | PLATFORM_SRCS = \ 2 | $(PLATFORM_DIR)/main.c \ 3 | $(PLATFORM_DIR)/int.c \ 4 | $(PLATFORM_DIR)/syscall.c \ 5 | $(PLATFORM_DIR)/arm_v6.s \ 6 | $(PLATFORM_DIR)/init.s 7 | -------------------------------------------------------------------------------- /platform/syscall.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | #include 5 | 6 | #include "log.h" 7 | 8 | 9 | #define SYSCALL_ARG_MAX (4) 10 | 11 | s32 do_tsk_create (u32 *args); 12 | s32 do_tsk_sleep (u32 *args); 13 | s32 do_sem_create (u32 *args); 14 | s32 do_sem_get (u32 *args); 15 | s32 do_sem_put (u32 *args); 16 | s32 do_sem_delete (u32 *args); 17 | s32 do_mbx_create (u32 *args); 18 | s32 do_mail_alloc (u32 *args); 19 | s32 do_mbx_get (u32 *args); 20 | s32 do_mbx_put (u32 *args); 21 | s32 do_mbx_delete (u32 *args); 22 | s32 do_evt_wait (u32 *args); 23 | s32 do_evt_release(u32 *args); 24 | 25 | 26 | struct __syscall__ syscall_table[] = { 27 | {SYS_TASK_CREATE, do_tsk_create, }, 28 | {SYS_TASK_SLEEP, do_tsk_sleep, }, 29 | {SYS_SEM_CREATE, do_sem_create, }, 30 | {SYS_SEM_GET, do_sem_get, }, 31 | {SYS_SEM_PUT, do_sem_put, }, 32 | {SYS_SEM_DELETE, do_sem_delete, }, 33 | {SYS_MBX_CREATE, do_mbx_create, }, 34 | {SYS_MAIL_ALLOC, do_mail_alloc, }, 35 | {SYS_MBX_GET, do_mbx_get, }, 36 | {SYS_MBX_PUT, do_mbx_put, }, 37 | {SYS_MBX_DELETE, do_mbx_delete, }, 38 | {SYS_EVT_WAIT, do_evt_wait, }, 39 | {SYS_EVT_RELEASE, do_evt_release, }, 40 | }; 41 | 42 | PUBLIC s32 system_call(u32 nr, u32 *args) 43 | { 44 | s32 ret; 45 | PRINT_DEBUG("syscall %d \n", nr); 46 | 47 | ret = syscall_table[nr].handler(args); /* syscall handler may invoke task_dispatch */ 48 | return ret; 49 | } 50 | 51 | PUBLIC s32 os_task_create(func_1 entry, u32 arg, u32 prio) 52 | { 53 | register int __r0 __asm("r0"); 54 | register int __r1 __asm("r1"); 55 | register int __r2 __asm("r2"); 56 | register int __r3 __asm("r3"); 57 | 58 | kassert(!in_interrupt()); 59 | 60 | __r0 = (u32)entry; 61 | __r1 = arg; 62 | __r2 = prio; 63 | /* invoke the swi */ 64 | asm ( 65 | "swi " SYS_TASK_CREATE "\n\t" 66 | :"=r" (__r0), "=r" (__r1), "=r" (__r2), "=r" (__r3) 67 | : "r" (__r0), "r" (__r1), "r" (__r2), "r" (__r3) 68 | :"cc" 69 | ); 70 | return __r0; 71 | } 72 | 73 | PUBLIC s32 os_task_sleep(u32 ticks) 74 | { 75 | register s32 __r0 __asm("r0"); 76 | register s32 __r1 __asm("r1"); 77 | register s32 __r2 __asm("r2"); 78 | register s32 __r3 __asm("r3"); 79 | 80 | kassert(!in_interrupt()); 81 | 82 | __r0 = (u32)ticks; 83 | /* invoke the swi */ 84 | asm ( 85 | "swi " SYS_TASK_SLEEP "\n\t" 86 | :"=r" (__r0), "=r" (__r1), "=r" (__r2), "=r" (__r3) 87 | : "r" (__r0), "r" (__r1), "r" (__r2), "r" (__r3) 88 | :"cc" 89 | ); 90 | return __r0; 91 | } 92 | 93 | PUBLIC s32 os_semaphore_create(u32 tokens) 94 | { 95 | register s32 __r0 __asm("r0"); 96 | register s32 __r1 __asm("r1"); 97 | register s32 __r2 __asm("r2"); 98 | register s32 __r3 __asm("r3"); 99 | 100 | kassert(!in_interrupt()); 101 | 102 | __r0 = (u32)tokens; 103 | /* invoke the swi */ 104 | asm ( 105 | "swi " SYS_SEM_CREATE "\n\t" 106 | :"=r" (__r0), "=r" (__r1), "=r" (__r2), "=r" (__r3) 107 | : "r" (__r0), "r" (__r1), "r" (__r2), "r" (__r3) 108 | :"cc" 109 | ); 110 | return __r0; 111 | } 112 | 113 | PUBLIC s32 os_semaphore_delete(u32 sem_id) 114 | { 115 | register s32 __r0 __asm("r0"); 116 | register s32 __r1 __asm("r1"); 117 | register s32 __r2 __asm("r2"); 118 | register s32 __r3 __asm("r3"); 119 | 120 | kassert(!in_interrupt()); 121 | 122 | __r0 = (u32)sem_id; 123 | /* invoke the swi */ 124 | asm ( 125 | "swi " SYS_SEM_DELETE "\n\t" 126 | :"=r" (__r0), "=r" (__r1), "=r" (__r2), "=r" (__r3) 127 | : "r" (__r0), "r" (__r1), "r" (__r2), "r" (__r3) 128 | :"cc" 129 | ); 130 | return __r0; 131 | } 132 | 133 | 134 | PUBLIC s32 os_semaphore_get(u32 sem_id) 135 | { 136 | register s32 __r0 __asm("r0"); 137 | register s32 __r1 __asm("r1"); 138 | register s32 __r2 __asm("r2"); 139 | register s32 __r3 __asm("r3"); 140 | 141 | kassert(!in_interrupt()); 142 | 143 | __r0 = (u32)sem_id; 144 | /* invoke the swi */ 145 | asm ( 146 | "swi " SYS_SEM_GET "\n\t" 147 | :"=r" (__r0), "=r" (__r1), "=r" (__r2), "=r" (__r3) 148 | : "r" (__r0), "r" (__r1), "r" (__r2), "r" (__r3) 149 | :"cc" 150 | ); 151 | 152 | return __r0; 153 | } 154 | 155 | PUBLIC s32 os_semaphore_put(u32 sem_id) 156 | { 157 | register s32 __r0 __asm("r0"); 158 | register s32 __r1 __asm("r1"); 159 | register s32 __r2 __asm("r2"); 160 | register s32 __r3 __asm("r3"); 161 | 162 | /* kassert(!in_interrupt()); */ 163 | 164 | __r0 = (u32)sem_id; 165 | /* invoke the swi */ 166 | asm ( 167 | "swi " SYS_SEM_PUT "\n\t" 168 | :"=r" (__r0), "=r" (__r1), "=r" (__r2), "=r" (__r3) 169 | : "r" (__r0), "r" (__r1), "r" (__r2), "r" (__r3) 170 | :"cc" 171 | ); 172 | return __r0; 173 | } 174 | 175 | PUBLIC s32 os_mailbox_create(void *addr, u32 mail_size, u32 mail_nr) 176 | { 177 | register s32 __r0 __asm("r0"); 178 | register s32 __r1 __asm("r1"); 179 | register s32 __r2 __asm("r2"); 180 | register s32 __r3 __asm("r3"); 181 | 182 | kassert(!in_interrupt()); 183 | 184 | __r0 = (u32)addr; 185 | __r1 = (u32)mail_size; 186 | __r2 = (u32)mail_nr; 187 | /* invoke the swi */ 188 | asm ( 189 | "swi " SYS_MBX_CREATE "\n\t" 190 | :"=r" (__r0), "=r" (__r1), "=r" (__r2), "=r" (__r3) 191 | : "r" (__r0), "r" (__r1), "r" (__r2), "r" (__r3) 192 | :"cc" 193 | ); 194 | return __r0; 195 | } 196 | 197 | PUBLIC s32 os_mail_alloc(u32 mbx_id) 198 | { 199 | register s32 __r0 __asm("r0"); 200 | register s32 __r1 __asm("r1"); 201 | register s32 __r2 __asm("r2"); 202 | register s32 __r3 __asm("r3"); 203 | 204 | kassert(!in_interrupt()); 205 | 206 | __r0 = (u32)mbx_id; 207 | /* invoke the swi */ 208 | asm ( 209 | "swi " SYS_MAIL_ALLOC "\n\t" 210 | :"=r" (__r0), "=r" (__r1), "=r" (__r2), "=r" (__r3) 211 | : "r" (__r0), "r" (__r1), "r" (__r2), "r" (__r3) 212 | :"cc" 213 | ); 214 | return __r0; 215 | } 216 | 217 | PUBLIC s32 os_mail_free(u32 mbx_id, void *mail) 218 | { 219 | register s32 __r0 __asm("r0"); 220 | register s32 __r1 __asm("r1"); 221 | register s32 __r2 __asm("r2"); 222 | register s32 __r3 __asm("r3"); 223 | 224 | kassert(!in_interrupt()); 225 | 226 | __r0 = (u32)mbx_id; 227 | __r1 = (u32)mail; 228 | /* invoke the swi */ 229 | asm ( 230 | "swi " SYS_MAIL_FREE "\n\t" 231 | :"=r" (__r0), "=r" (__r1), "=r" (__r2), "=r" (__r3) 232 | : "r" (__r0), "r" (__r1), "r" (__r2), "r" (__r3) 233 | :"cc" 234 | ); 235 | return __r0; 236 | } 237 | 238 | PUBLIC s32 os_mailbox_delete(u32 mbx_id) 239 | { 240 | register s32 __r0 __asm("r0"); 241 | register s32 __r1 __asm("r1"); 242 | register s32 __r2 __asm("r2"); 243 | register s32 __r3 __asm("r3"); 244 | 245 | kassert(!in_interrupt()); 246 | 247 | __r0 = (u32)mbx_id; 248 | /* invoke the swi */ 249 | asm ( 250 | "swi " SYS_MBX_DELETE "\n\t" 251 | :"=r" (__r0), "=r" (__r1), "=r" (__r2), "=r" (__r3) 252 | : "r" (__r0), "r" (__r1), "r" (__r2), "r" (__r3) 253 | :"cc" 254 | ); 255 | return __r0; 256 | } 257 | 258 | PUBLIC s32 os_mailbox_get(u32 mbx_id) 259 | { 260 | register s32 __r0 __asm("r0"); 261 | register s32 __r1 __asm("r1"); 262 | register s32 __r2 __asm("r2"); 263 | register s32 __r3 __asm("r3"); 264 | 265 | kassert(!in_interrupt()); 266 | 267 | __r0 = (u32)mbx_id; 268 | /* invoke the swi */ 269 | asm ( 270 | "swi " SYS_MBX_GET "\n\t" 271 | :"=r" (__r0), "=r" (__r1), "=r" (__r2), "=r" (__r3) 272 | : "r" (__r0), "r" (__r1), "r" (__r2), "r" (__r3) 273 | :"cc" 274 | ); 275 | 276 | return __r0; 277 | } 278 | 279 | PUBLIC s32 os_mailbox_put(u32 mbx_id, void *mail) 280 | { 281 | register s32 __r0 __asm("r0"); 282 | register s32 __r1 __asm("r1"); 283 | register s32 __r2 __asm("r2"); 284 | register s32 __r3 __asm("r3"); 285 | 286 | /* kassert(!in_interrupt()); */ 287 | 288 | __r0 = (u32)mbx_id; 289 | __r1 = (u32)mail; 290 | /* invoke the swi */ 291 | asm ( 292 | "swi " SYS_MBX_PUT "\n\t" 293 | :"=r" (__r0), "=r" (__r1), "=r" (__r2), "=r" (__r3) 294 | : "r" (__r0), "r" (__r1), "r" (__r2), "r" (__r3) 295 | :"cc" 296 | ); 297 | return __r0; 298 | } 299 | 300 | PUBLIC s32 os_event_wait(u32 tsk_id, u16 event) 301 | { 302 | register s32 __r0 __asm("r0"); 303 | register s32 __r1 __asm("r1"); 304 | register s32 __r2 __asm("r2"); 305 | register s32 __r3 __asm("r3"); 306 | 307 | kassert(!in_interrupt()); 308 | 309 | __r0 = (u32)tsk_id; 310 | __r1 = (u32)event; 311 | /* invoke the swi */ 312 | asm ( 313 | "swi " SYS_EVT_WAIT "\n\t" 314 | :"=r" (__r0), "=r" (__r1), "=r" (__r2), "=r" (__r3) 315 | : "r" (__r0), "r" (__r1), "r" (__r2), "r" (__r3) 316 | :"cc" 317 | ); 318 | return __r0; 319 | } 320 | 321 | PUBLIC s32 os_event_release(u32 tsk_id, u16 event) 322 | { 323 | register s32 __r0 __asm("r0"); 324 | register s32 __r1 __asm("r1"); 325 | register s32 __r2 __asm("r2"); 326 | register s32 __r3 __asm("r3"); 327 | 328 | kassert(!in_interrupt()); 329 | 330 | __r0 = (u32)tsk_id; 331 | __r1 = (u32)event; 332 | /* invoke the swi */ 333 | asm ( 334 | "swi " SYS_EVT_RELEASE "\n\t" 335 | :"=r" (__r0), "=r" (__r1), "=r" (__r2), "=r" (__r3) 336 | : "r" (__r0), "r" (__r1), "r" (__r2), "r" (__r3) 337 | :"cc" 338 | ); 339 | return __r0; 340 | } 341 | 342 | PUBLIC s32 do_tsk_create(u32 *args) 343 | { 344 | func_1 entry; 345 | u32 arg; 346 | u32 prio; 347 | entry = (func_1)(args[0]); 348 | arg = args[1]; 349 | prio = args[2]; 350 | return task_create(entry, arg, prio); 351 | } 352 | 353 | PRIVATE s32 do_tsk_sleep(u32 *args) 354 | { 355 | task_sleep(args[0]); 356 | return 0; 357 | } 358 | 359 | PRIVATE s32 do_sem_create(u32 *args) 360 | { 361 | u32 tokens = args[0]; 362 | return semaphore_create(tokens); 363 | } 364 | 365 | PRIVATE s32 do_sem_get(u32 *args) 366 | { 367 | u32 sem_id = args[0]; 368 | return semaphore_get(sem_id); 369 | } 370 | 371 | PRIVATE s32 do_sem_put(u32 *args) 372 | { 373 | u32 sem_id = args[0]; 374 | return semaphore_put(sem_id); 375 | } 376 | 377 | PRIVATE s32 do_sem_delete(u32 *args) 378 | { 379 | u32 sem_id = args[0]; 380 | return semaphore_delete(sem_id); 381 | } 382 | 383 | PRIVATE s32 do_mbx_create(u32 *args) 384 | { 385 | void *addr = (void *)args[0]; 386 | u32 mail_size = args[1]; 387 | u32 mail_nr = args[2]; 388 | 389 | return mailbox_create(addr, mail_size, mail_nr); 390 | } 391 | 392 | PRIVATE s32 do_mail_alloc(u32 *args) 393 | { 394 | u32 mbx_id = args[0]; 395 | 396 | return mail_alloc(mbx_id); 397 | } 398 | 399 | PRIVATE s32 do_mail_free(u32 *args) 400 | { 401 | u32 mbx_id = args[0]; 402 | void *mail = (void *)args[1]; 403 | 404 | return mail_free(mbx_id, mail); 405 | } 406 | 407 | PRIVATE s32 do_mbx_get(u32 *args) 408 | { 409 | u32 mbx_id = args[0]; 410 | return mailbox_get(mbx_id); 411 | } 412 | 413 | PRIVATE s32 do_mbx_put(u32 *args) 414 | { 415 | u32 mbx_id = args[0]; 416 | void *mail = (void *)args[1]; 417 | return mailbox_put(mbx_id, mail); 418 | } 419 | 420 | PRIVATE s32 do_mbx_delete(u32 *args) 421 | { 422 | u32 mbx_id = args[0]; 423 | return mailbox_delete(mbx_id); 424 | } 425 | 426 | PRIVATE s32 do_evt_wait(u32 *args) 427 | { 428 | u32 tsk_id = args[0]; 429 | u16 event = (u16)args[1]; 430 | return event_wait(tsk_id, event); 431 | } 432 | 433 | PRIVATE s32 do_evt_release(u32 *args) 434 | { 435 | u32 tsk_id = args[0]; 436 | u16 event = (u16)args[1]; 437 | return event_release(tsk_id, event); 438 | } 439 | 440 | -------------------------------------------------------------------------------- /sos.ld: -------------------------------------------------------------------------------- 1 | __und_stack_size__ = 0x0400; 2 | __abt_stack_size__ = 0x0400; 3 | __fiq_stack_size__ = 0x0400; 4 | __irq_stack_size__ = 0x0400; 5 | __svc_stack_size__ = 0x0400; 6 | __sys_stack_size__ = 0x0400; 7 | __stacks_total_size__ = __und_stack_size__ + __abt_stack_size__ + __fiq_stack_size__ + __irq_stack_size__ + __svc_stack_size__ + __sys_stack_size__; 8 | 9 | MEMORY 10 | { 11 | SYSTEM_RAM : org = 0x200000, len = 0x06000000 12 | } 13 | 14 | __ram_start__ = ORIGIN(SYSTEM_RAM); 15 | __ram_size__ = LENGTH(SYSTEM_RAM); 16 | __ram_end__ = __ram_start__ + __ram_size__; 17 | 18 | SECTIONS { 19 | __sys_start__ = __ram_start__; 20 | .init : { 21 | *(.init) 22 | } > SYSTEM_RAM 23 | 24 | .text ALIGN(0x10): { 25 | __text_start__ = .; 26 | *(.text) 27 | *(.rodata) 28 | __text_end__ = .; 29 | } > SYSTEM_RAM 30 | 31 | 32 | .data ALIGN(0x10): { 33 | __data_start__ = .; 34 | *(.data) 35 | __data_end__ = .; 36 | } > SYSTEM_RAM 37 | 38 | .bss ALIGN(0x10): { 39 | __bss_start__ = .; 40 | *(.bss) 41 | *(COMMON) 42 | __bss_end__ = .; 43 | 44 | __stack_start__ = .; 45 | . = . + 0x20000; /* 128K for int stack */ 46 | __stack_end__ = .; 47 | } > SYSTEM_RAM 48 | 49 | __sys_end__ = .; 50 | } 51 | -------------------------------------------------------------------------------- /test/systest.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include "shell.h" 3 | #include "uart.h" 4 | #include "log.h" 5 | 6 | s32 test_cpu_all(u32 argc, char **argv); 7 | s32 test_timer_all(u32 argc, char **argv); 8 | s32 test_gpio_all(u32 argc, char **argv); 9 | s32 test_libc_all(u32 argc, char **argv); 10 | s32 test_log_all(u32 argc, char **argv); 11 | s32 test_os_all(u32 argc, char **argv); 12 | s32 test_wdt_all(u32 argc, char **argv); 13 | 14 | s32 sub_cmd_help(); 15 | 16 | struct shell_cmd_info sub_ci[] = { 17 | { .name = "cpu", .func = test_cpu_all, .desc = ""}, 18 | { .name = "timer", .func = test_timer_all, .desc = ""}, 19 | { .name = "gpio", .func = test_gpio_all, .desc = ""}, 20 | { .name = "libc", .func = test_libc_all, .desc = ""}, 21 | { .name = "log", .func = test_log_all, .desc = ""}, 22 | { .name = "os", .func = test_os_all, .desc = ""}, 23 | { .name = "wdt", .func = test_wdt_all, .desc = ""}, 24 | { .name = "help", .func = sub_cmd_help, .desc = ""}, 25 | }; 26 | 27 | PUBLIC void dump_mem(u32 addr, u32 word_nr) 28 | { 29 | u32 i; 30 | u32 *p = (u32 *)addr; 31 | for(i = 0; i < word_nr; i++) { 32 | if (i % 4 == 0) { 33 | uart_printf("\n[0x%X]: ", &p[i]); 34 | } 35 | uart_printf("0x%X ", p[i]); 36 | } 37 | 38 | uart_printf("\n"); 39 | } 40 | 41 | PRIVATE s32 sub_cmd_help() 42 | { 43 | u32 i; 44 | for(i = 0; i < (sizeof(sub_ci)/sizeof(sub_ci[0])); i++) { 45 | PRINT_EMG("%s:\t\t\t%s\n", sub_ci[i].name, sub_ci[i].desc); 46 | } 47 | return 0; 48 | } 49 | 50 | PRIVATE static s32 get_cmd_index(char *cmd) 51 | { 52 | u32 i; 53 | for(i = 0; i < (sizeof(sub_ci)/sizeof(sub_ci[0])); i++) { 54 | if (strcmp(sub_ci[i].name, cmd) == 0) { 55 | return i; 56 | } 57 | } 58 | return -1; 59 | } 60 | 61 | PUBLIC s32 systest(u32 argc, char **argv) 62 | { 63 | u32 i; 64 | s32 ret; 65 | 66 | if ((i = get_cmd_index(argv[1])) == -1) { 67 | PRINT_EMG("illegal sub-cmd [%s]\n", argv[1]); 68 | sub_cmd_help(); 69 | return -1; 70 | } 71 | 72 | ret = sub_ci[i].func(argc, argv); 73 | return ret; 74 | } 75 | -------------------------------------------------------------------------------- /test/test.mk: -------------------------------------------------------------------------------- 1 | TEST_SRCS = \ 2 | $(TEST_DIR)/systest.c \ 3 | $(TEST_DIR)/test_libc.c \ 4 | $(TEST_DIR)/test_cpu.c \ 5 | $(TEST_DIR)/test_timer.c \ 6 | $(TEST_DIR)/test_log.c \ 7 | $(TEST_DIR)/test_os.c \ 8 | $(TEST_DIR)/test_wdt.c \ 9 | $(TEST_DIR)/test_gpio.c 10 | -------------------------------------------------------------------------------- /test/test_cpu.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include "log.h" 4 | #include "cpu.h" 5 | #include "int.h" 6 | #include "systest.h" 7 | 8 | static inline void swi(u32 i) 9 | { 10 | #if 1 11 | asm volatile ( 12 | "swi 0x1\n\t" 13 | : 14 | : 15 | : 16 | ); 17 | #else 18 | u32 word; 19 | func_0 _swi; 20 | word = 0xef << 24 | i & 0xFFFFFFFF ; 21 | _swi = (func_0)word; 22 | _swi(); 23 | #endif 24 | } 25 | 26 | s32 test_cpu_all(u32 argc, char **argv) 27 | { 28 | s32 ret = 0; 29 | u32 i, arg1; 30 | func_0 func; 31 | 32 | i = atoi(argv[2]); 33 | arg1 = atoi(argv[3]); 34 | 35 | PRINT_EMG("arg1: %x\n", arg1); 36 | 37 | switch (i) { 38 | case (0): 39 | dump_mem(IRQ_BASE, 10); 40 | break; 41 | case (1): 42 | PRINT_EMG("pc: 0x%x\n", __get_pc()); 43 | PRINT_EMG("lr: 0x%x\n", __get_lr()); 44 | PRINT_EMG("sp: 0x%x\n", __get_sp()); 45 | PRINT_EMG("cpsr: 0x%x\n", __get_cpsr()); 46 | break; 47 | case (2): 48 | __set_pc(arg1); 49 | break; 50 | case (3): 51 | __set_sp(arg1); 52 | break; 53 | case (4): 54 | __set_cpsr(arg1); 55 | break; 56 | case (100): /* illegal instruction */ 57 | arg1 = 0x12345678; 58 | func = (func_0)arg1; 59 | func(); 60 | break; 61 | case (110): 62 | reset(); 63 | break; 64 | case (200): /* enable irq */ 65 | enable_irq(arg1); 66 | break; 67 | case (201): /* disable irq */ 68 | disable_irq(arg1); 69 | break; 70 | case (300): /* swi */ 71 | swi(arg1); 72 | break; 73 | default: 74 | return -1; 75 | } 76 | 77 | return ret; 78 | } 79 | -------------------------------------------------------------------------------- /test/test_gpio.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include "gpio.h" 4 | #include "log.h" 5 | #include "systest.h" 6 | 7 | /* GPIO17 -> GPIO_GEN0 -> 11 */ 8 | /* GPIO18 -> GPIO_GEN1 -> 12 */ 9 | 10 | s32 test_gpio_irq_handler(u32 irq_nr) 11 | { 12 | u32 stat; 13 | PRINT_EMG("in %s %d\n", __func__, irq_nr); 14 | dump_mem(GPIO_BASE, 40); 15 | 16 | stat = readl(GPEDS0); 17 | writel(GPEDS0, stat); 18 | 19 | stat = readl(GPEDS1); 20 | writel(GPEDS1, stat); 21 | return 0; 22 | } 23 | 24 | s32 test_gpio_all(u32 argc, char **argv) 25 | { 26 | s32 ret = 0; 27 | u32 i, arg1, arg2; 28 | i = atoi(argv[2]); 29 | arg1 = atoi(argv[3]); 30 | arg2 = atoi(argv[4]); 31 | 32 | PRINT_EMG("i: %x; arg1: %x; arg2: %x\n", i, arg1, arg2); 33 | switch (i) { 34 | case (0): 35 | dump_mem(GPIO_BASE, 40); 36 | break; 37 | case (1): 38 | ret = gpio_set_function(arg1, arg2); 39 | break; 40 | case (2): 41 | ret = gpio_set_output(arg1, arg2); 42 | break; 43 | case (3): 44 | gpio_set_function(17, OUTPUT); 45 | gpio_set_output(17, 1); 46 | 47 | gpio_set_function(18, INPUT); 48 | writel(GPREN0, 1 << 18); /* rise trigger int */ 49 | #if 0 50 | writel(GPHEN0, 1 << 18); /* high trigger int */ 51 | writel(GPFEN0, 1 << 18); 52 | writel(GPLEN0, 1 << 18); 53 | writel(GPAREN0, 1 << 18); 54 | writel(GPAFEN0, 1 << 18); 55 | #endif 56 | 57 | request_irq(IRQ_GPIO0, test_gpio_irq_handler); 58 | request_irq(IRQ_GPIO1, test_gpio_irq_handler); 59 | request_irq(IRQ_GPIO2, test_gpio_irq_handler); 60 | request_irq(IRQ_GPIO3, test_gpio_irq_handler); 61 | enable_irq(IRQ_GPIO0); 62 | enable_irq(IRQ_GPIO1); 63 | enable_irq(IRQ_GPIO2); 64 | enable_irq(IRQ_GPIO3); 65 | break; 66 | case (4): 67 | /* gpio config for jtag */ 68 | 69 | /* please checkout http://sysprogs.com/VisualKernel/tutorials/raspberry/jtagsetup */ 70 | 71 | /* TDI */ 72 | gpio_set_function( 4, ALT_FUNC_5); 73 | /* nTRST */ 74 | gpio_set_function(22, ALT_FUNC_4); 75 | /* RTCK */ 76 | gpio_set_function(23, ALT_FUNC_4); 77 | /* TDO */ 78 | gpio_set_function(24, ALT_FUNC_4); 79 | /* TCK */ 80 | gpio_set_function(25, ALT_FUNC_4); 81 | /* TMS */ 82 | gpio_set_function(27, ALT_FUNC_4); 83 | break; 84 | case (5): 85 | /* TDI */ 86 | PRINT_EMG("gpio4: %d\n", gpio_get_function(4)); 87 | /* nTRST */ 88 | PRINT_EMG("gpio22: %d\n", gpio_get_function(22)); 89 | /* RTCK */ 90 | PRINT_EMG("gpio23: %d\n", gpio_get_function(23)); 91 | /* TDO */ 92 | PRINT_EMG("gpio24: %d\n", gpio_get_function(24)); 93 | /* TCK */ 94 | PRINT_EMG("gpio25: %d\n", gpio_get_function(25)); 95 | /* TMS */ 96 | PRINT_EMG("gpio27: %d\n", gpio_get_function(27)); 97 | break; 98 | default: 99 | return -1; 100 | } 101 | 102 | return ret; 103 | } 104 | -------------------------------------------------------------------------------- /test/test_libc.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | 4 | #include "log.h" 5 | #include "uart.h" 6 | 7 | static char buf[1024] = {0}; 8 | 9 | s32 test_libc_all(u32 argc, char **argv) 10 | { 11 | s32 ret = 0; 12 | u32 i; 13 | i = atoi(argv[2]); 14 | switch (i) { 15 | case (0): /* itoa test */ 16 | itoa(buf, 0x12345678, 10); 17 | uart_puts(buf); 18 | 19 | uart_puts("\n"); 20 | itoa(buf, 0x12345678, 16); 21 | uart_puts(buf); 22 | 23 | uart_puts("\n"); 24 | itoa(buf, 0xABCDEF12, 16); 25 | uart_puts(buf); 26 | break; 27 | case (1): /* vsnprintf test */ 28 | PRINT_EMG("hello, world!\n"); 29 | PRINT_EMG("%%%%%%%%%%%%%%%"); 30 | PRINT_EMG("hello %c \n", 'A'); 31 | PRINT_EMG("hello %d \n", 12345678); 32 | PRINT_EMG("hello %x \n", 0x12345678); 33 | PRINT_EMG("hello %s \n", "world!"); 34 | PRINT_EMG("hello %X \n", 0x12345678); 35 | PRINT_EMG("hello %X \n", 0x5678); 36 | break; 37 | case (2): /* assert test */ 38 | assert(1==2); 39 | break; 40 | default: 41 | return -1; 42 | } 43 | 44 | return ret; 45 | } 46 | -------------------------------------------------------------------------------- /test/test_log.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include "log.h" 4 | #include "systest.h" 5 | 6 | extern void dumpb(void *buf, u32 size); 7 | 8 | char *loglevel_desc[] = { 9 | "LOG_EMG", 10 | "LOG_ERR", 11 | "LOG_WARN", 12 | "LOG_INFO", 13 | "LOG_DEBUG", 14 | "LOG_MAX", 15 | }; 16 | 17 | 18 | s32 test_log_all(u32 argc, char **argv) 19 | { 20 | s32 ret = 0; 21 | u32 i, arg1, arg2; 22 | 23 | i = atoi(argv[2]); 24 | arg1 = atoi(argv[3]); 25 | arg2 = atoi(argv[4]); 26 | 27 | SHOW_VAR(i); 28 | SHOW_VAR(arg1); 29 | SHOW_VAR(arg2); 30 | 31 | switch (i) { 32 | case (0): 33 | arg1 = arg1 > LOG_MAX ? LOG_MAX : arg1; 34 | PRINT_EMG("set loglevel [%s]\n", loglevel_desc[arg1]); 35 | ret = set_log_level(arg1); 36 | break; 37 | case (1): 38 | log(LOG_EMG, "%d: %s\n", __LINE__, "hello, world!"); 39 | log(LOG_ERR, "%d: %s\n", __LINE__, "hello, world!"); 40 | log(LOG_WARN, "%d: %s\n", __LINE__, "hello, world!"); 41 | log(LOG_INFO, "%d: %s\n", __LINE__, "hello, world!"); 42 | log(LOG_DEBUG, "%d: %s\n", __LINE__, "hello, world!"); 43 | break; 44 | case (2): 45 | dump_log(); 46 | break; 47 | case (3): 48 | dumpb((void *)arg1, arg2); 49 | break; 50 | default: 51 | return -1; 52 | } 53 | 54 | return ret; 55 | } 56 | -------------------------------------------------------------------------------- /test/test_os.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | #include 5 | #include "timer.h" 6 | #include "log.h" 7 | #include "systest.h" 8 | 9 | extern u32 os_tick; 10 | extern struct __os_task__ tcb[TASK_NR_MAX]; 11 | extern struct __os_semaphore__ os_semaphore[]; 12 | 13 | extern void dump_ctx(struct __cpu_context__ *ctx); 14 | 15 | char *task_state_desc[] = { 16 | "TASK_UNUSED", 17 | "TASK_RUNNING", 18 | "TASK_SUSPEND", 19 | "TASK_READY", 20 | "TASK_WAIT_SEM", 21 | }; 22 | 23 | char *semaphore_state_desc[] = { 24 | "SEM_FREE", 25 | "SEM_USED", 26 | }; 27 | 28 | static s32 test_task(u32 arg) 29 | { 30 | while (1) { 31 | PRINT_EMG("in %s \n", __func__); 32 | mdelay(1000); 33 | } 34 | return 0; 35 | } 36 | 37 | 38 | void dump_tcb(u32 i) 39 | { 40 | struct __cpu_context__ *ctx = (struct __cpu_context__ *)(tcb[i].sp); 41 | 42 | PRINT_EMG("\n[%d]: [%s]\n", i, task_state_desc[tcb[i].state]); 43 | 44 | if (tcb[i].state != TASK_UNUSED) { 45 | dump_ctx(ctx); 46 | PRINT_EMG("\ttask_id: [%d]\n", tcb[i].id); 47 | PRINT_EMG("\tstate: [%s]\n", task_state_desc[tcb[i].state]); 48 | PRINT_EMG("\tprio: [%d]\n", tcb[i].prio); 49 | PRINT_EMG("\tsleep_ticks: [%d]\n", tcb[i].sleep_ticks); 50 | 51 | PRINT_EMG("\tsp: [0x%x]\n", tcb[i].sp); 52 | PRINT_EMG("\tstack: [0x%x]\n", tcb[i].stack); 53 | PRINT_EMG("\tstack_size: [%d]\n", tcb[i].stack_size); 54 | PRINT_EMG("\ttask_entry: [0x%x]\n", tcb[i].entry); 55 | dump_mem((u32)(tcb[i].stack), tcb[i].stack_size); 56 | } 57 | 58 | } 59 | 60 | void dump_tcb_all() 61 | { 62 | u32 i; 63 | for(i=0;iid);*/ 88 | PRINT_EMG("[%d] ->", ptask->id); 89 | ptask = ptask->next; 90 | } 91 | 92 | ptask = os_sleep_list.next; 93 | PRINT_EMG("\nos_sleep: \n"); 94 | while(ptask != NULL) { 95 | /*dump_tcb(ptask->id);*/ 96 | PRINT_EMG("[%d] ->", ptask->id); 97 | ptask = ptask->next; 98 | } 99 | 100 | for(i = 0; i < SEM_NR_MAX; i++) { 101 | if (os_semaphore[i].status == SEM_USED) { 102 | ptask = os_semaphore[i].next; 103 | PRINT_EMG("os_sem[%d]:", i); 104 | while(ptask != NULL) { 105 | /*dump_tcb(ptask->id);*/ 106 | PRINT_EMG("[%d] ->", ptask->id); 107 | ptask = ptask->next; 108 | } 109 | 110 | } 111 | } 112 | 113 | return 0; 114 | } 115 | 116 | s32 test_os_all(u32 argc, char **argv) 117 | { 118 | s32 ret = 0; 119 | u32 i, arg1; 120 | u32 sem_id; 121 | 122 | i = atoi(argv[2]); 123 | arg1 = atoi(argv[3]); 124 | 125 | PRINT_EMG("arg1: %d\n", arg1); 126 | 127 | switch (i) { 128 | case (0): 129 | PRINT_EMG("os_tick: 0x%x\n", os_tick); 130 | break; 131 | case (1): 132 | dump_tcb_all(); 133 | break; 134 | case (2): 135 | dump_scb_all(); 136 | break; 137 | case (99): /* slip to case 100 */ 138 | set_log_level(LOG_DEBUG); 139 | case (100): 140 | os_task_create(test_task, 0, 0); 141 | break; 142 | case (200): 143 | dump_list(); 144 | break; 145 | case (300): 146 | sem_id = arg1; 147 | os_semaphore_put(sem_id); 148 | break; 149 | default: 150 | return -1; 151 | } 152 | 153 | return ret; 154 | } 155 | -------------------------------------------------------------------------------- /test/test_timer.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include "timer.h" 4 | #include "log.h" 5 | #include "systest.h" 6 | 7 | void systimer_irq_handler(u32 irq_nr) 8 | { 9 | PRINT_EMG("in %s %d \n", __func__, irq_nr); 10 | u32 clear = 0; 11 | switch (irq_nr) { 12 | case (IRQ_SYS_TIMER0): 13 | set_bit(&clear, 0, 1); 14 | break; 15 | case (IRQ_SYS_TIMER1): 16 | set_bit(&clear, 1, 1); 17 | break; 18 | case (IRQ_SYS_TIMER2): 19 | set_bit(&clear, 2, 1); 20 | break; 21 | case (IRQ_SYS_TIMER3): 22 | set_bit(&clear, 3, 1); 23 | break; 24 | default: 25 | PRINT_EMG("unknown irq %d \n", irq_nr); 26 | lockup(); 27 | break; 28 | } 29 | writel(SYSTMCS, clear); 30 | } 31 | 32 | void sys_timer_init() 33 | { 34 | writel(SYSTMCS, 0xF); 35 | } 36 | 37 | s32 test_timer_all(u32 argc, char **argv) 38 | { 39 | u64 sc; 40 | u32 clo, chi; 41 | s32 ret = 0; 42 | u32 i, arg1; 43 | i = atoi(argv[2]); 44 | arg1 = atoi(argv[3]); 45 | 46 | PRINT_EMG("arg1: %d\n", arg1); 47 | 48 | switch (i) { 49 | case (0): 50 | dump_mem(CORETIMER_BASE, 9); 51 | break; 52 | case (1): 53 | dump_mem(SYSTIMER_BASE, 7); 54 | break; 55 | case (2): 56 | ret = timer_init(); 57 | break; 58 | case (3): 59 | sc = get_syscounter(); 60 | chi = (u32)(sc >> 32); 61 | clo = (u32)(sc); 62 | PRINT_EMG("[%x] [%x] \n", chi, clo); 63 | break; 64 | case (100): /* udelay */ 65 | PRINT_STAMP(); 66 | udelay(arg1); 67 | PRINT_STAMP(); 68 | break; 69 | case (101): 70 | PRINT_STAMP(); 71 | mdelay(arg1); 72 | PRINT_STAMP(); 73 | break; 74 | default: 75 | return -1; 76 | } 77 | 78 | return ret; 79 | } 80 | -------------------------------------------------------------------------------- /test/test_wdt.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include "timer.h" 4 | #include "log.h" 5 | #include "watchdog.h" 6 | #include "systest.h" 7 | 8 | s32 test_wdt_all(u32 argc, char **argv) 9 | { 10 | s32 ret = 0; 11 | u32 i, arg1; 12 | i = atoi(argv[2]); 13 | arg1 = atoi(argv[3]); 14 | 15 | PRINT_EMG("arg1: %d\n", arg1); 16 | 17 | switch (i) { 18 | case (0): 19 | dump_mem(WATCHDOG_BASE, 12); 20 | break; 21 | case (1): 22 | watchdog_ctrl(arg1); 23 | break; 24 | default: 25 | return -1; 26 | } 27 | 28 | return ret; 29 | } 30 | --------------------------------------------------------------------------------