├── axi_irq_prj1 ├── hdl │ ├── src │ │ ├── constr │ │ │ ├── main.eprj │ │ │ └── system.xdc │ │ ├── main.eprj │ │ ├── bd │ │ │ ├── main.eprj │ │ │ └── design_1_ooc.xdc │ │ └── add_ip │ │ │ └── main.eprj │ ├── build.sh │ ├── proj_def.tcl │ └── eprj_build.tcl └── software │ ├── example │ ├── overlay │ │ └── usr │ │ │ └── bin │ │ │ ├── test3_irq.py │ │ │ └── test3_hist.py │ ├── dts │ │ ├── skeleton.dtsi │ │ ├── README │ │ ├── system.dts │ │ └── pl.dtsi │ ├── buildroot-2016.08-rc1 │ │ └── package │ │ │ └── axi-irq1-module │ │ │ ├── Config.in │ │ │ └── axi-irq1-module.mk │ └── axi_irq1 │ │ └── Makefile │ └── build_soft.sh ├── axi_dma_prj1 ├── hdl │ ├── src │ │ ├── constr │ │ │ └── main.eprj │ │ ├── axi4s │ │ │ └── main.eprj │ │ ├── bridge │ │ │ └── main.eprj │ │ ├── ipbus │ │ │ ├── decoder │ │ │ │ ├── main.eprj │ │ │ │ ├── addr_table │ │ │ │ ├── ipbus_addr_decode.vhd.tmpl │ │ │ │ ├── ipbus_addr_decode.vhd │ │ │ │ └── addr_dec.py │ │ │ ├── slaves │ │ │ │ ├── main.eprj │ │ │ │ ├── ipbus_reg_types.vhd │ │ │ │ ├── ipbus_reg.vhd │ │ │ │ ├── ipbus_ram.vhd │ │ │ │ ├── ipbus_ctrlreg_v.vhd │ │ │ │ └── ipbus_ctrlreg.vhd │ │ │ ├── README │ │ │ ├── main.eprj │ │ │ ├── ipbus_package.vhd │ │ │ └── ipbus_fabric.vhd │ │ ├── bd │ │ │ ├── main.eprj │ │ │ └── design_1_ooc.xdc │ │ ├── lfsr │ │ │ ├── main.eprj │ │ │ ├── lfsr_test_a_ooc.eprj │ │ │ ├── lfsr_test_b_ooc.eprj │ │ │ ├── lfsr_ooc.eprj │ │ │ ├── lfsr_ooc_common.eprj │ │ │ ├── lfsr_test_a_ooc.xdc │ │ │ ├── lfsr_test_b_ooc.xdc │ │ │ ├── lfsr_test_a_stub.vhd │ │ │ ├── lfsr_test_b_stub.vhd │ │ │ ├── lfsr_test_a_stub.vhd.old │ │ │ ├── lfsr_test_b_stub.vhd.old │ │ │ ├── lfsr_test_b.vhd │ │ │ ├── lfsr_test_a.vhd │ │ │ └── lfsr_test.vhd │ │ └── main.eprj │ ├── build.sh │ ├── sim │ │ ├── ipbus_test.sh │ │ ├── ipbus_test.py │ │ ├── ipbus_test.xml │ │ └── cbus.py │ ├── proj_def.tcl │ └── eprj_build.tcl ├── software │ ├── example │ │ ├── overlay │ │ │ └── usr │ │ │ │ └── bin │ │ │ │ ├── axil2ipb │ │ │ │ ├── t1.sh │ │ │ │ ├── t2.sh │ │ │ │ └── axil2ipb.py │ │ ├── axi4s2dma │ │ │ ├── app │ │ │ │ ├── Makefile │ │ │ │ └── a4s2d_app.c │ │ │ ├── Makefile │ │ │ └── axi4s2dma.h │ │ ├── dts │ │ │ ├── skeleton.dtsi │ │ │ ├── README │ │ │ ├── system.dts │ │ │ └── pl.dtsi │ │ ├── buildroot-2016.08-rc1 │ │ │ └── package │ │ │ │ ├── axi4s2dma-module │ │ │ │ ├── Config.in │ │ │ │ └── axi4s2dma-module.mk │ │ │ │ ├── axil2ipb-module │ │ │ │ ├── Config.in │ │ │ │ └── axil2ipb-module.mk │ │ │ │ └── axi4s2dma-test │ │ │ │ ├── Config.in │ │ │ │ └── axi4s2dma-module.mk │ │ └── axil2ipb │ │ │ └── Makefile │ └── build_soft.sh └── sd_boot │ ├── boot.bin │ ├── boot_hp0_32b.bin │ ├── boot_hp0_64b.bin │ ├── README │ └── uEnv.txt ├── axi_dma_prj2 ├── hdl │ ├── src │ │ ├── constr │ │ │ ├── main.eprj │ │ │ └── gpio_axi.xdc │ │ ├── axi4s │ │ │ ├── main.eprj │ │ │ └── axi4s_src3_tb.vhd │ │ ├── bridge │ │ │ └── main.eprj │ │ ├── ipbus │ │ │ ├── decoder │ │ │ │ ├── main.eprj │ │ │ │ ├── addr_table │ │ │ │ ├── ipbus_addr_decode.vhd.tmpl │ │ │ │ ├── ipbus_addr_decode.vhd │ │ │ │ └── addr_dec.py │ │ │ ├── slaves │ │ │ │ ├── main.eprj │ │ │ │ ├── ipbus_reg_types.vhd │ │ │ │ ├── ipbus_reg.vhd │ │ │ │ ├── ipbus_ram.vhd │ │ │ │ ├── ipbus_ctrlreg_v.vhd │ │ │ │ └── ipbus_ctrlreg.vhd │ │ │ ├── README │ │ │ ├── main.eprj │ │ │ ├── ipbus_package.vhd │ │ │ └── ipbus_fabric.vhd │ │ ├── bd │ │ │ ├── main.eprj │ │ │ └── design_1_ooc.xdc │ │ ├── lfsr │ │ │ ├── main.eprj │ │ │ ├── lfsr_test_a_ooc.eprj │ │ │ ├── lfsr_test_b_ooc.eprj │ │ │ ├── lfsr_ooc.eprj │ │ │ ├── lfsr_ooc_common.eprj │ │ │ ├── lfsr_test_a_ooc.xdc │ │ │ ├── lfsr_test_b_ooc.xdc │ │ │ ├── lfsr_test_a_stub.vhd │ │ │ ├── lfsr_test_b_stub.vhd │ │ │ ├── lfsr_test_a_stub.vhd.old │ │ │ ├── lfsr_test_b_stub.vhd.old │ │ │ ├── lfsr_test_b.vhd │ │ │ └── lfsr_test_a.vhd │ │ └── main.eprj │ ├── build.sh │ ├── sim │ │ ├── ipbus_test.sh │ │ ├── ipbus_test.py │ │ ├── ipbus_test.xml │ │ └── cbus.py │ ├── proj_def.tcl │ └── eprj_build.tcl ├── software │ ├── example │ │ ├── overlay │ │ │ └── usr │ │ │ │ └── bin │ │ │ │ ├── t2.sh │ │ │ │ ├── axil2ipb │ │ │ │ ├── t1.sh │ │ │ │ └── axil2ipb.py │ │ ├── axi4s2dmov │ │ │ ├── app │ │ │ │ ├── Makefile │ │ │ │ └── a4s2d_app.c │ │ │ ├── axi4s2dmov.h │ │ │ └── Makefile │ │ ├── dts │ │ │ ├── system.dts │ │ │ ├── ksgpio.dtsi │ │ │ ├── skeleton.dtsi │ │ │ ├── system-top.dts │ │ │ ├── README │ │ │ ├── pcw.dtsi │ │ │ └── pl.dtsi │ │ ├── buildroot-2017.11.2 │ │ │ ├── package │ │ │ │ ├── axil2ipb-module │ │ │ │ │ ├── Config.in │ │ │ │ │ └── axil2ipb-module.mk │ │ │ │ ├── axi4s2dmov-module │ │ │ │ │ ├── Config.in │ │ │ │ │ └── axi4s2dmov-module.mk │ │ │ │ └── axi4s2dmov-test │ │ │ │ │ ├── Config.in │ │ │ │ │ └── axi4s2dmov-module.mk │ │ │ └── configs │ │ │ │ └── zynq_zturn_defconfig │ │ └── axil2ipb │ │ │ └── Makefile │ ├── README │ └── build_soft.sh └── sd_boot │ ├── boot.bin │ ├── boot_hp0_32b.bin │ ├── boot_hp0_64b.bin │ ├── README │ └── uEnv.txt ├── axi_vdma_prj1 ├── hdl │ ├── src │ │ ├── axi4s │ │ │ └── main.eprj │ │ ├── bridge │ │ │ └── main.eprj │ │ ├── constr │ │ │ ├── main.eprj │ │ │ └── gpio_axi.xdc │ │ ├── ipbus │ │ │ ├── decoder │ │ │ │ ├── main.eprj │ │ │ │ ├── addr_table │ │ │ │ ├── ipbus_addr_decode.vhd.tmpl │ │ │ │ ├── ipbus_addr_decode.vhd │ │ │ │ └── addr_dec.py │ │ │ ├── slaves │ │ │ │ ├── main.eprj │ │ │ │ ├── ipbus_reg_types.vhd │ │ │ │ ├── ipbus_reg.vhd │ │ │ │ ├── ipbus_ram.vhd │ │ │ │ ├── ipbus_ctrlreg_v.vhd │ │ │ │ └── ipbus_ctrlreg.vhd │ │ │ ├── README │ │ │ ├── main.eprj │ │ │ ├── ipbus_package.vhd │ │ │ └── ipbus_fabric.vhd │ │ ├── bd │ │ │ ├── main.eprj │ │ │ └── design_1_ooc.xdc │ │ ├── lfsr │ │ │ ├── main.eprj │ │ │ ├── lfsr_test_a_ooc.eprj │ │ │ ├── lfsr_test_b_ooc.eprj │ │ │ ├── lfsr_ooc.eprj │ │ │ ├── lfsr_ooc_common.eprj │ │ │ ├── lfsr_test_a_ooc.xdc │ │ │ ├── lfsr_test_b_ooc.xdc │ │ │ ├── lfsr_test_a_stub.vhd │ │ │ ├── lfsr_test_b_stub.vhd │ │ │ ├── lfsr_test_a_stub.vhd.old │ │ │ ├── lfsr_test_b_stub.vhd.old │ │ │ ├── lfsr_test_b.vhd │ │ │ └── lfsr_test_a.vhd │ │ └── main.eprj │ ├── build.sh │ ├── sim │ │ ├── ipbus_test.sh │ │ ├── ipbus_test.py │ │ ├── ipbus_test.xml │ │ └── cbus.py │ ├── proj_def.tcl │ └── eprj_build.tcl ├── software │ ├── example │ │ ├── overlay │ │ │ └── usr │ │ │ │ └── bin │ │ │ │ ├── axil2ipb │ │ │ │ ├── t1.sh │ │ │ │ ├── t2.sh │ │ │ │ └── axil2ipb.py │ │ ├── axi4s2dma │ │ │ ├── app │ │ │ │ ├── Makefile │ │ │ │ └── a4s2d_app.c │ │ │ ├── Makefile │ │ │ └── axi4s2dma.h │ │ ├── dts │ │ │ ├── skeleton.dtsi │ │ │ ├── README │ │ │ ├── system.dts │ │ │ └── pl.dtsi │ │ ├── buildroot-2016.08-rc1 │ │ │ └── package │ │ │ │ ├── axil2ipb-module │ │ │ │ ├── Config.in │ │ │ │ └── axil2ipb-module.mk │ │ │ │ ├── axi4s2dma-module │ │ │ │ ├── Config.in │ │ │ │ └── axi4s2dma-module.mk │ │ │ │ └── axi4s2dma-test │ │ │ │ ├── Config.in │ │ │ │ └── axi4s2dma-module.mk │ │ └── axil2ipb │ │ │ └── Makefile │ └── build_soft.sh └── sd_boot │ ├── boot.bin │ ├── boot_hp0_32b.bin │ ├── boot_hp0_64b.bin │ ├── README │ └── uEnv.txt └── axi_gpio_prj1 └── software └── example └── multi-gpio └── Makefile /axi_irq_prj1/hdl/src/constr/main.eprj: -------------------------------------------------------------------------------- 1 | xdc system.xdc 2 | -------------------------------------------------------------------------------- /axi_dma_prj1/hdl/src/constr/main.eprj: -------------------------------------------------------------------------------- 1 | xdc gpio_axi.xdc 2 | 3 | 4 | -------------------------------------------------------------------------------- /axi_dma_prj2/hdl/src/constr/main.eprj: -------------------------------------------------------------------------------- 1 | xdc gpio_axi.xdc 2 | 3 | 4 | -------------------------------------------------------------------------------- /axi_dma_prj1/hdl/src/axi4s/main.eprj: -------------------------------------------------------------------------------- 1 | vhdl work axi4s_src1.vhd 2 | 3 | -------------------------------------------------------------------------------- /axi_dma_prj1/hdl/src/bridge/main.eprj: -------------------------------------------------------------------------------- 1 | vhdl work axil2ipb.vhd 2 | 3 | -------------------------------------------------------------------------------- /axi_dma_prj2/hdl/src/axi4s/main.eprj: -------------------------------------------------------------------------------- 1 | vhdl work axi4s_src1.vhd 2 | 3 | -------------------------------------------------------------------------------- /axi_dma_prj2/hdl/src/bridge/main.eprj: -------------------------------------------------------------------------------- 1 | vhdl work axil2ipb.vhd 2 | 3 | -------------------------------------------------------------------------------- /axi_vdma_prj1/hdl/src/axi4s/main.eprj: -------------------------------------------------------------------------------- 1 | vhdl work axi4s_src2.vhd 2 | 3 | -------------------------------------------------------------------------------- /axi_vdma_prj1/hdl/src/bridge/main.eprj: -------------------------------------------------------------------------------- 1 | vhdl work axil2ipb.vhd 2 | 3 | -------------------------------------------------------------------------------- /axi_vdma_prj1/hdl/src/constr/main.eprj: -------------------------------------------------------------------------------- 1 | xdc gpio_axi.xdc 2 | 3 | 4 | -------------------------------------------------------------------------------- /axi_dma_prj2/software/example/overlay/usr/bin/t2.sh: -------------------------------------------------------------------------------- 1 | #!/bin/ash 2 | a4s2d_app 3 | 4 | -------------------------------------------------------------------------------- /axi_irq_prj1/hdl/src/main.eprj: -------------------------------------------------------------------------------- 1 | include add_ip 2 | include constr 3 | include bd 4 | 5 | 6 | -------------------------------------------------------------------------------- /axi_dma_prj1/software/example/overlay/usr/bin/axil2ipb: -------------------------------------------------------------------------------- 1 | #!/bin/sh 2 | modprobe axil2ipb 3 | axil2ipb.py 4 | -------------------------------------------------------------------------------- /axi_dma_prj2/software/example/overlay/usr/bin/axil2ipb: -------------------------------------------------------------------------------- 1 | #!/bin/sh 2 | modprobe axil2ipb 3 | axil2ipb.py 4 | -------------------------------------------------------------------------------- /axi_vdma_prj1/software/example/overlay/usr/bin/axil2ipb: -------------------------------------------------------------------------------- 1 | #!/bin/sh 2 | modprobe axil2ipb 3 | axil2ipb.py 4 | -------------------------------------------------------------------------------- /axi_dma_prj1/hdl/src/ipbus/decoder/main.eprj: -------------------------------------------------------------------------------- 1 | exec addr_dec.py 2 | vhdl work ipbus_addr_decode.vhd 3 | 4 | 5 | 6 | -------------------------------------------------------------------------------- /axi_dma_prj1/sd_boot/boot.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/wzab/Z-turn-examples/HEAD/axi_dma_prj1/sd_boot/boot.bin -------------------------------------------------------------------------------- /axi_dma_prj1/software/example/overlay/usr/bin/t1.sh: -------------------------------------------------------------------------------- 1 | #!/bin/ash 2 | udhcpc ; modprobe axi4s2dma ; a4s2d_app 3 | 4 | -------------------------------------------------------------------------------- /axi_dma_prj2/hdl/src/ipbus/decoder/main.eprj: -------------------------------------------------------------------------------- 1 | exec addr_dec.py 2 | vhdl work ipbus_addr_decode.vhd 3 | 4 | 5 | 6 | -------------------------------------------------------------------------------- /axi_dma_prj2/sd_boot/boot.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/wzab/Z-turn-examples/HEAD/axi_dma_prj2/sd_boot/boot.bin -------------------------------------------------------------------------------- /axi_vdma_prj1/hdl/src/ipbus/decoder/main.eprj: -------------------------------------------------------------------------------- 1 | exec addr_dec.py 2 | vhdl work ipbus_addr_decode.vhd 3 | 4 | 5 | 6 | -------------------------------------------------------------------------------- /axi_vdma_prj1/sd_boot/boot.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/wzab/Z-turn-examples/HEAD/axi_vdma_prj1/sd_boot/boot.bin -------------------------------------------------------------------------------- /axi_vdma_prj1/software/example/overlay/usr/bin/t1.sh: -------------------------------------------------------------------------------- 1 | #!/bin/ash 2 | udhcpc ; modprobe axi4s2dma ; a4s2d_app 3 | 4 | -------------------------------------------------------------------------------- /axi_dma_prj1/hdl/src/bd/main.eprj: -------------------------------------------------------------------------------- 1 | bd design_1.bd 2 | vhdl work design_1_wrapper.vhd 3 | xdc_ooc design_1_ooc.xdc 4 | 5 | -------------------------------------------------------------------------------- /axi_dma_prj2/hdl/src/bd/main.eprj: -------------------------------------------------------------------------------- 1 | bd design_1.bd 2 | vhdl work design_1_wrapper.vhd 3 | xdc_ooc design_1_ooc.xdc 4 | 5 | -------------------------------------------------------------------------------- /axi_irq_prj1/hdl/src/bd/main.eprj: -------------------------------------------------------------------------------- 1 | bd design_1.bd 2 | xdc_ooc design_1_ooc.xdc 3 | vhdl work design_1_wrapper.vhd 4 | 5 | -------------------------------------------------------------------------------- /axi_vdma_prj1/hdl/src/bd/main.eprj: -------------------------------------------------------------------------------- 1 | bd design_1.bd 2 | vhdl work design_1_wrapper.vhd 3 | xdc_ooc design_1_ooc.xdc 4 | 5 | -------------------------------------------------------------------------------- /axi_dma_prj1/hdl/src/lfsr/main.eprj: -------------------------------------------------------------------------------- 1 | vhdl work lfsr_test.vhd 2 | vhdl work lfsr_test_a.vhd 3 | vhdl work lfsr_test_b.vhd 4 | 5 | -------------------------------------------------------------------------------- /axi_dma_prj2/hdl/src/lfsr/main.eprj: -------------------------------------------------------------------------------- 1 | vhdl work lfsr_test.vhd 2 | vhdl work lfsr_test_a.vhd 3 | vhdl work lfsr_test_b.vhd 4 | 5 | -------------------------------------------------------------------------------- /axi_dma_prj1/sd_boot/boot_hp0_32b.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/wzab/Z-turn-examples/HEAD/axi_dma_prj1/sd_boot/boot_hp0_32b.bin -------------------------------------------------------------------------------- /axi_dma_prj1/sd_boot/boot_hp0_64b.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/wzab/Z-turn-examples/HEAD/axi_dma_prj1/sd_boot/boot_hp0_64b.bin -------------------------------------------------------------------------------- /axi_dma_prj2/sd_boot/boot_hp0_32b.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/wzab/Z-turn-examples/HEAD/axi_dma_prj2/sd_boot/boot_hp0_32b.bin -------------------------------------------------------------------------------- /axi_dma_prj2/sd_boot/boot_hp0_64b.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/wzab/Z-turn-examples/HEAD/axi_dma_prj2/sd_boot/boot_hp0_64b.bin -------------------------------------------------------------------------------- /axi_vdma_prj1/hdl/src/lfsr/main.eprj: -------------------------------------------------------------------------------- 1 | vhdl work lfsr_test.vhd 2 | vhdl work lfsr_test_a.vhd 3 | vhdl work lfsr_test_b.vhd 4 | 5 | -------------------------------------------------------------------------------- /axi_vdma_prj1/sd_boot/boot_hp0_32b.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/wzab/Z-turn-examples/HEAD/axi_vdma_prj1/sd_boot/boot_hp0_32b.bin -------------------------------------------------------------------------------- /axi_vdma_prj1/sd_boot/boot_hp0_64b.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/wzab/Z-turn-examples/HEAD/axi_vdma_prj1/sd_boot/boot_hp0_64b.bin -------------------------------------------------------------------------------- /axi_dma_prj1/hdl/src/lfsr/lfsr_test_a_ooc.eprj: -------------------------------------------------------------------------------- 1 | include lfsr_ooc_common.eprj 2 | vhdl work lfsr_test_a.vhd 3 | xdc_ooc lfsr_test_a_ooc.xdc 4 | 5 | -------------------------------------------------------------------------------- /axi_dma_prj1/hdl/src/lfsr/lfsr_test_b_ooc.eprj: -------------------------------------------------------------------------------- 1 | include lfsr_ooc_common.eprj 2 | vhdl work lfsr_test_b.vhd 3 | xdc_ooc lfsr_test_b_ooc.xdc 4 | 5 | -------------------------------------------------------------------------------- /axi_dma_prj2/hdl/src/lfsr/lfsr_test_a_ooc.eprj: -------------------------------------------------------------------------------- 1 | include lfsr_ooc_common.eprj 2 | vhdl work lfsr_test_a.vhd 3 | xdc_ooc lfsr_test_a_ooc.xdc 4 | 5 | -------------------------------------------------------------------------------- /axi_dma_prj2/hdl/src/lfsr/lfsr_test_b_ooc.eprj: -------------------------------------------------------------------------------- 1 | include lfsr_ooc_common.eprj 2 | vhdl work lfsr_test_b.vhd 3 | xdc_ooc lfsr_test_b_ooc.xdc 4 | 5 | -------------------------------------------------------------------------------- /axi_vdma_prj1/hdl/src/lfsr/lfsr_test_a_ooc.eprj: -------------------------------------------------------------------------------- 1 | include lfsr_ooc_common.eprj 2 | vhdl work lfsr_test_a.vhd 3 | xdc_ooc lfsr_test_a_ooc.xdc 4 | 5 | -------------------------------------------------------------------------------- /axi_vdma_prj1/hdl/src/lfsr/lfsr_test_b_ooc.eprj: -------------------------------------------------------------------------------- 1 | include lfsr_ooc_common.eprj 2 | vhdl work lfsr_test_b.vhd 3 | xdc_ooc lfsr_test_b_ooc.xdc 4 | 5 | -------------------------------------------------------------------------------- /axi_dma_prj1/hdl/build.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | set -e 3 | vivado -mode batch -source eprj_create.tcl 4 | vivado -mode batch -source eprj_build.tcl 5 | 6 | -------------------------------------------------------------------------------- /axi_dma_prj1/software/example/overlay/usr/bin/t2.sh: -------------------------------------------------------------------------------- 1 | #!/bin/ash 2 | echo 905 > /sys/class/gpio/export ; echo high > /sys/class/gpio/gpio905/direction 3 | -------------------------------------------------------------------------------- /axi_dma_prj2/hdl/build.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | set -e 3 | vivado -mode batch -source eprj_create.tcl 4 | vivado -mode batch -source eprj_build.tcl 5 | 6 | -------------------------------------------------------------------------------- /axi_dma_prj2/software/README: -------------------------------------------------------------------------------- 1 | The software directory contains software copied from axi_dma_prj1. 2 | It must be adapted for the axi_dma_prj2 design... 3 | -------------------------------------------------------------------------------- /axi_irq_prj1/hdl/build.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | set -e 3 | vivado -mode batch -source eprj_create.tcl 4 | vivado -mode batch -source eprj_build.tcl 5 | 6 | -------------------------------------------------------------------------------- /axi_vdma_prj1/hdl/build.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | set -e 3 | vivado -mode batch -source eprj_create.tcl 4 | vivado -mode batch -source eprj_build.tcl 5 | 6 | -------------------------------------------------------------------------------- /axi_vdma_prj1/software/example/overlay/usr/bin/t2.sh: -------------------------------------------------------------------------------- 1 | #!/bin/ash 2 | echo 905 > /sys/class/gpio/export ; echo high > /sys/class/gpio/gpio905/direction 3 | -------------------------------------------------------------------------------- /axi_dma_prj1/software/example/axi4s2dma/app/Makefile: -------------------------------------------------------------------------------- 1 | OBJS := a4s2d_app.o 2 | a4s2d_app: $(OBJS) 3 | $(CC) -o a4s2d_app $(OBJS) 4 | $(OBJS) : %.o : %.c 5 | $(CC) -c $(CFLAGS) $< -o $@ 6 | -------------------------------------------------------------------------------- /axi_dma_prj2/software/example/axi4s2dmov/app/Makefile: -------------------------------------------------------------------------------- 1 | OBJS := a4s2d_app.o 2 | a4s2d_app: $(OBJS) 3 | $(CC) -o a4s2d_app $(OBJS) 4 | $(OBJS) : %.o : %.c 5 | $(CC) -c $(CFLAGS) $< -o $@ 6 | -------------------------------------------------------------------------------- /axi_vdma_prj1/software/example/axi4s2dma/app/Makefile: -------------------------------------------------------------------------------- 1 | OBJS := a4s2d_app.o 2 | a4s2d_app: $(OBJS) 3 | $(CC) -o a4s2d_app $(OBJS) 4 | $(OBJS) : %.o : %.c 5 | $(CC) -c $(CFLAGS) $< -o $@ 6 | -------------------------------------------------------------------------------- /axi_irq_prj1/hdl/src/add_ip/main.eprj: -------------------------------------------------------------------------------- 1 | vhdl work wzab_ip_ms_v1_0_M00_AXI.vhd 2 | vhdl work wzab_ip_ms_v1_0_S00_AXI.vhd 3 | vhdl work wzab_ip_ms_v1_0_S_AXI_INTR.vhd 4 | vhdl work wzab_ip_ms_v1_0.vhd 5 | -------------------------------------------------------------------------------- /axi_dma_prj1/hdl/src/ipbus/slaves/main.eprj: -------------------------------------------------------------------------------- 1 | vhdl work ipbus_ctrlreg.vhd 2 | vhdl work ipbus_ctrlreg_v.vhd 3 | vhdl work ipbus_ram.vhd 4 | vhdl work ipbus_reg.vhd 5 | vhdl work ipbus_reg_types.vhd 6 | 7 | 8 | -------------------------------------------------------------------------------- /axi_dma_prj2/hdl/src/ipbus/slaves/main.eprj: -------------------------------------------------------------------------------- 1 | vhdl work ipbus_ctrlreg.vhd 2 | vhdl work ipbus_ctrlreg_v.vhd 3 | vhdl work ipbus_ram.vhd 4 | vhdl work ipbus_reg.vhd 5 | vhdl work ipbus_reg_types.vhd 6 | 7 | 8 | -------------------------------------------------------------------------------- /axi_vdma_prj1/hdl/src/ipbus/slaves/main.eprj: -------------------------------------------------------------------------------- 1 | vhdl work ipbus_ctrlreg.vhd 2 | vhdl work ipbus_ctrlreg_v.vhd 3 | vhdl work ipbus_ram.vhd 4 | vhdl work ipbus_reg.vhd 5 | vhdl work ipbus_reg_types.vhd 6 | 7 | 8 | -------------------------------------------------------------------------------- /axi_dma_prj1/hdl/src/ipbus/README: -------------------------------------------------------------------------------- 1 | Most files in this directory are taken from the IPbus firmware directory 2 | See https://svnweb.cern.ch/trac/cactus/wiki/IPbusFirmware 3 | to find how to get the whole IPbus firmware source. 4 | -------------------------------------------------------------------------------- /axi_dma_prj2/hdl/src/ipbus/README: -------------------------------------------------------------------------------- 1 | Most files in this directory are taken from the IPbus firmware directory 2 | See https://svnweb.cern.ch/trac/cactus/wiki/IPbusFirmware 3 | to find how to get the whole IPbus firmware source. 4 | -------------------------------------------------------------------------------- /axi_dma_prj1/hdl/src/lfsr/lfsr_ooc.eprj: -------------------------------------------------------------------------------- 1 | ooc noauto lfsr_test_a_ooc.eprj lfsr_test_a 2 | ooc noauto lfsr_test_b_ooc.eprj lfsr_test_b 3 | vhdl xil_defaultlib lfsr_test_a_stub.vhd 4 | vhdl xil_defaultlib lfsr_test_b_stub.vhd 5 | 6 | -------------------------------------------------------------------------------- /axi_dma_prj2/hdl/src/lfsr/lfsr_ooc.eprj: -------------------------------------------------------------------------------- 1 | ooc noauto lfsr_test_a_ooc.eprj lfsr_test_a 2 | ooc noauto lfsr_test_b_ooc.eprj lfsr_test_b 3 | vhdl xil_defaultlib lfsr_test_a_stub.vhd 4 | vhdl xil_defaultlib lfsr_test_b_stub.vhd 5 | 6 | -------------------------------------------------------------------------------- /axi_vdma_prj1/hdl/src/ipbus/README: -------------------------------------------------------------------------------- 1 | Most files in this directory are taken from the IPbus firmware directory 2 | See https://svnweb.cern.ch/trac/cactus/wiki/IPbusFirmware 3 | to find how to get the whole IPbus firmware source. 4 | -------------------------------------------------------------------------------- /axi_vdma_prj1/hdl/src/lfsr/lfsr_ooc.eprj: -------------------------------------------------------------------------------- 1 | ooc noauto lfsr_test_a_ooc.eprj lfsr_test_a 2 | ooc noauto lfsr_test_b_ooc.eprj lfsr_test_b 3 | vhdl xil_defaultlib lfsr_test_a_stub.vhd 4 | vhdl xil_defaultlib lfsr_test_b_stub.vhd 5 | 6 | -------------------------------------------------------------------------------- /axi_dma_prj1/hdl/src/lfsr/lfsr_ooc_common.eprj: -------------------------------------------------------------------------------- 1 | #packages from ipbus 2 | vhdl work ../ipbus/ipbus_package.vhd 3 | vhdl work ../ipbus/slaves/ipbus_reg_types.vhd 4 | vhdl work ../ipbus/slaves/ipbus_ctrlreg_v.vhd 5 | vhdl work lfsr_test.vhd 6 | -------------------------------------------------------------------------------- /axi_dma_prj2/hdl/src/lfsr/lfsr_ooc_common.eprj: -------------------------------------------------------------------------------- 1 | #packages from ipbus 2 | vhdl work ../ipbus/ipbus_package.vhd 3 | vhdl work ../ipbus/slaves/ipbus_reg_types.vhd 4 | vhdl work ../ipbus/slaves/ipbus_ctrlreg_v.vhd 5 | vhdl work lfsr_test.vhd 6 | -------------------------------------------------------------------------------- /axi_vdma_prj1/hdl/src/lfsr/lfsr_ooc_common.eprj: -------------------------------------------------------------------------------- 1 | #packages from ipbus 2 | vhdl work ../ipbus/ipbus_package.vhd 3 | vhdl work ../ipbus/slaves/ipbus_reg_types.vhd 4 | vhdl work ../ipbus/slaves/ipbus_ctrlreg_v.vhd 5 | vhdl work lfsr_test.vhd 6 | -------------------------------------------------------------------------------- /axi_dma_prj1/hdl/src/ipbus/main.eprj: -------------------------------------------------------------------------------- 1 | vhdl work ipbus_fabric.vhd 2 | vhdl work ipbus_package.vhd 3 | vhdl work slaves.vhd 4 | vhdl[sim] work ipbus_ctrl.vhd 5 | vhdl[sim] work ipbus_ctrl_tb.vhd 6 | include decoder 7 | include slaves 8 | 9 | 10 | 11 | -------------------------------------------------------------------------------- /axi_dma_prj2/hdl/src/ipbus/main.eprj: -------------------------------------------------------------------------------- 1 | vhdl work ipbus_fabric.vhd 2 | vhdl work ipbus_package.vhd 3 | vhdl work slaves.vhd 4 | vhdl[sim] work ipbus_ctrl.vhd 5 | vhdl[sim] work ipbus_ctrl_tb.vhd 6 | include decoder 7 | include slaves 8 | 9 | 10 | 11 | -------------------------------------------------------------------------------- /axi_vdma_prj1/hdl/src/ipbus/main.eprj: -------------------------------------------------------------------------------- 1 | vhdl work ipbus_fabric.vhd 2 | vhdl work ipbus_package.vhd 3 | vhdl work slaves.vhd 4 | vhdl[sim] work ipbus_ctrl.vhd 5 | vhdl[sim] work ipbus_ctrl_tb.vhd 6 | include decoder 7 | include slaves 8 | 9 | 10 | 11 | -------------------------------------------------------------------------------- /axi_dma_prj2/software/example/dts/system.dts: -------------------------------------------------------------------------------- 1 | /* 2 | * CAUTION: This file is automatically generated by Xilinx. 3 | * Version: 4 | * Today is: Wed Jan 31 22:07:57 2018 5 | */ 6 | 7 | 8 | &gem0 { 9 | local-mac-address = [00 0a 35 00 00 00]; 10 | }; 11 | -------------------------------------------------------------------------------- /axi_dma_prj1/hdl/sim/ipbus_test.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | set -e 3 | rm -f /tmp/rdpipe /tmp/wrpipe 4 | # Create the named pipes 5 | mknod /tmp/rdpipe p 6 | mknod /tmp/wrpipe p 7 | # Run the python script in the other xterm 8 | xterm -e "python -i ipbus_test.py; echo 'press ENTER'; read" & 9 | -------------------------------------------------------------------------------- /axi_dma_prj1/hdl/src/ipbus/decoder/addr_table: -------------------------------------------------------------------------------- 1 | # Example addr_table file to show the format 2 | # 3 | # num name base addr_width 4 | 5 | 0 ctrl_reg 0x0 1 6 | 1 reg 0x2 1 7 | 2 lfsr1 0x4 2 8 | 3 lfsr2 0x8 2 9 | 4 ram 0x1000 12 10 | 11 | -------------------------------------------------------------------------------- /axi_dma_prj2/hdl/sim/ipbus_test.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | set -e 3 | rm -f /tmp/rdpipe /tmp/wrpipe 4 | # Create the named pipes 5 | mknod /tmp/rdpipe p 6 | mknod /tmp/wrpipe p 7 | # Run the python script in the other xterm 8 | xterm -e "python -i ipbus_test.py; echo 'press ENTER'; read" & 9 | -------------------------------------------------------------------------------- /axi_dma_prj2/hdl/src/ipbus/decoder/addr_table: -------------------------------------------------------------------------------- 1 | # Example addr_table file to show the format 2 | # 3 | # num name base addr_width 4 | 5 | 0 ctrl_reg 0x0 1 6 | 1 reg 0x2 1 7 | 2 lfsr1 0x4 2 8 | 3 lfsr2 0x8 2 9 | 4 ram 0x1000 12 10 | 11 | -------------------------------------------------------------------------------- /axi_vdma_prj1/hdl/sim/ipbus_test.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | set -e 3 | rm -f /tmp/rdpipe /tmp/wrpipe 4 | # Create the named pipes 5 | mknod /tmp/rdpipe p 6 | mknod /tmp/wrpipe p 7 | # Run the python script in the other xterm 8 | xterm -e "python -i ipbus_test.py; echo 'press ENTER'; read" & 9 | -------------------------------------------------------------------------------- /axi_vdma_prj1/hdl/src/ipbus/decoder/addr_table: -------------------------------------------------------------------------------- 1 | # Example addr_table file to show the format 2 | # 3 | # num name base addr_width 4 | 5 | 0 ctrl_reg 0x0 1 6 | 1 reg 0x2 1 7 | 2 lfsr1 0x4 2 8 | 3 lfsr2 0x8 2 9 | 4 ram 0x1000 12 10 | 11 | -------------------------------------------------------------------------------- /axi_dma_prj2/software/example/dts/ksgpio.dtsi: -------------------------------------------------------------------------------- 1 | 2 | &amba_pl { 3 | ksgpio { 4 | compatible = "wzab,ksgpio"; 5 | myctl-gpios = <&axi_gpio_ctl 0 0>, /* reset */ 6 | <&axi_gpio_ctl 1 0>; /* start */ 7 | }; 8 | }; 9 | -------------------------------------------------------------------------------- /axi_dma_prj1/hdl/src/main.eprj: -------------------------------------------------------------------------------- 1 | include bridge 2 | include ipbus 3 | include constr 4 | include axi4s 5 | #Uncomment line below , and comment the next one to avoid OOC 6 | include lfsr 7 | #Comment line above and uncomment line below to use OOC for LFSRs 8 | #include lfsr/lfsr_ooc.eprj 9 | include bd 10 | 11 | 12 | -------------------------------------------------------------------------------- /axi_dma_prj2/hdl/src/main.eprj: -------------------------------------------------------------------------------- 1 | include bridge 2 | include ipbus 3 | include constr 4 | include axi4s 5 | #Uncomment line below , and comment the next one to avoid OOC 6 | include lfsr 7 | #Comment line above and uncomment line below to use OOC for LFSRs 8 | #include lfsr/lfsr_ooc.eprj 9 | include bd 10 | 11 | 12 | -------------------------------------------------------------------------------- /axi_vdma_prj1/hdl/src/main.eprj: -------------------------------------------------------------------------------- 1 | include bridge 2 | include ipbus 3 | include constr 4 | include axi4s 5 | #Uncomment line below , and comment the next one to avoid OOC 6 | include lfsr 7 | #Comment line above and uncomment line below to use OOC for LFSRs 8 | #include lfsr/lfsr_ooc.eprj 9 | include bd 10 | 11 | 12 | -------------------------------------------------------------------------------- /axi_irq_prj1/software/example/overlay/usr/bin/test3_irq.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/python 2 | f=open("/dev/my_bm0","r+b",0) 3 | import struct 4 | import mmap 5 | import time 6 | t1=time.time() 7 | f.write(struct.pack(" /sys/class/gpio/export 4 | echo low > /sys/class/gpio/gpio904/direction 5 | echo high > /sys/class/gpio/gpio904/direction 6 | echo 905 > /sys/class/gpio/export 7 | echo low > /sys/class/gpio/gpio905/direction 8 | echo high > /sys/class/gpio/gpio905/direction 9 | 10 | -------------------------------------------------------------------------------- /axi_dma_prj1/software/example/dts/skeleton.dtsi: -------------------------------------------------------------------------------- 1 | /* 2 | * Skeleton device tree; the bare minimum needed to boot; just include and 3 | * add a compatible value. The bootloader will typically populate the memory 4 | * node. 5 | */ 6 | 7 | / { 8 | #address-cells = <1>; 9 | #size-cells = <1>; 10 | chosen { }; 11 | aliases { }; 12 | memory { device_type = "memory"; reg = <0 0>; }; 13 | }; 14 | -------------------------------------------------------------------------------- /axi_dma_prj2/software/example/dts/skeleton.dtsi: -------------------------------------------------------------------------------- 1 | /* 2 | * Skeleton device tree; the bare minimum needed to boot; just include and 3 | * add a compatible value. The bootloader will typically populate the memory 4 | * node. 5 | */ 6 | 7 | / { 8 | #address-cells = <1>; 9 | #size-cells = <1>; 10 | chosen { }; 11 | aliases { }; 12 | memory { device_type = "memory"; reg = <0 0>; }; 13 | }; 14 | -------------------------------------------------------------------------------- /axi_irq_prj1/software/example/dts/skeleton.dtsi: -------------------------------------------------------------------------------- 1 | /* 2 | * Skeleton device tree; the bare minimum needed to boot; just include and 3 | * add a compatible value. The bootloader will typically populate the memory 4 | * node. 5 | */ 6 | 7 | / { 8 | #address-cells = <1>; 9 | #size-cells = <1>; 10 | chosen { }; 11 | aliases { }; 12 | memory { device_type = "memory"; reg = <0 0>; }; 13 | }; 14 | -------------------------------------------------------------------------------- /axi_vdma_prj1/software/example/dts/skeleton.dtsi: -------------------------------------------------------------------------------- 1 | /* 2 | * Skeleton device tree; the bare minimum needed to boot; just include and 3 | * add a compatible value. The bootloader will typically populate the memory 4 | * node. 5 | */ 6 | 7 | / { 8 | #address-cells = <1>; 9 | #size-cells = <1>; 10 | chosen { }; 11 | aliases { }; 12 | memory { device_type = "memory"; reg = <0 0>; }; 13 | }; 14 | -------------------------------------------------------------------------------- /axi_dma_prj2/software/example/buildroot-2017.11.2/package/axil2ipb-module/Config.in: -------------------------------------------------------------------------------- 1 | config BR2_PACKAGE_AXIL2IPB_MODULE 2 | bool "axil2ipb-module" 3 | depends on BR2_LINUX_KERNEL 4 | help 5 | Driver for AXIL2IPB bridge. 6 | It is available as an example for my VEXTPROJ project 7 | 8 | http://github.com/wzab/vextproj 9 | 10 | comment "axil2ipb module needs a Linux kernel to be built" 11 | depends on !BR2_LINUX_KERNEL 12 | -------------------------------------------------------------------------------- /axi_irq_prj1/software/example/buildroot-2016.08-rc1/package/axi-irq1-module/Config.in: -------------------------------------------------------------------------------- 1 | config BR2_PACKAGE_AXI_IRQ1_MODULE 2 | bool "axi-irq1-module" 3 | depends on BR2_LINUX_KERNEL 4 | help 5 | Driver for AXI IRQ1 core. 6 | It is available as an example for my VEXTPROJ project 7 | 8 | http://github.com/wzab/vextproj 9 | 10 | comment "axi-irq1 module needs a Linux kernel to be built" 11 | depends on !BR2_LINUX_KERNEL 12 | -------------------------------------------------------------------------------- /axi_dma_prj1/sd_boot/README: -------------------------------------------------------------------------------- 1 | The files uEnv.txt and boot.bin must be placed on the 1st, VFAT partition of the SD card 2 | to allow booting of the Z-turn via TFTP from the server at 172.19.1.1 3 | The file boot.bin has been generated as described in main README.md 4 | 5 | Currently the boot_hp0_64b.bin is for designs with HP0 in 64-bit mode, 6 | while boot_hp0_32b.bin HP0 in 32-bit mode! 7 | 8 | The boot.bin is copied from boot_hp0_64b.bin . 9 | 10 | 11 | -------------------------------------------------------------------------------- /axi_dma_prj1/software/example/buildroot-2016.08-rc1/package/axi4s2dma-module/Config.in: -------------------------------------------------------------------------------- 1 | config BR2_PACKAGE_AXI4S2DMA_MODULE 2 | bool "axi4s2dma-module" 3 | depends on BR2_LINUX_KERNEL 4 | help 5 | Driver for AXI4S2DMA core. 6 | It is available as an example for my VEXTPROJ project 7 | 8 | http://github.com/wzab/vextproj 9 | 10 | comment "axi4s2dma module needs a Linux kernel to be built" 11 | depends on !BR2_LINUX_KERNEL 12 | -------------------------------------------------------------------------------- /axi_dma_prj1/software/example/buildroot-2016.08-rc1/package/axil2ipb-module/Config.in: -------------------------------------------------------------------------------- 1 | config BR2_PACKAGE_AXIL2IPB_MODULE 2 | bool "axil2ipb-module" 3 | depends on BR2_LINUX_KERNEL 4 | help 5 | Driver for AXIL2IPB bridge. 6 | It is available as an example for my VEXTPROJ project 7 | 8 | http://github.com/wzab/vextproj 9 | 10 | comment "axil2ipb module needs a Linux kernel to be built" 11 | depends on !BR2_LINUX_KERNEL 12 | -------------------------------------------------------------------------------- /axi_dma_prj2/sd_boot/README: -------------------------------------------------------------------------------- 1 | The files uEnv.txt and boot.bin must be placed on the 1st, VFAT partition of the SD card 2 | to allow booting of the Z-turn via TFTP from the server at 172.19.1.1 3 | The file boot.bin has been generated as described in main README.md 4 | 5 | Currently the boot_hp0_64b.bin is for designs with HP0 in 64-bit mode, 6 | while boot_hp0_32b.bin HP0 in 32-bit mode! 7 | 8 | The boot.bin is copied from boot_hp0_64b.bin . 9 | 10 | 11 | -------------------------------------------------------------------------------- /axi_dma_prj2/software/example/axi4s2dmov/axi4s2dmov.h: -------------------------------------------------------------------------------- 1 | #define ADM_IOC_MAGIC ('d') 2 | #define ADM_RESET _IO(ADM_IOC_MAGIC, 1) 3 | #define ADM_START _IO(ADM_IOC_MAGIC, 2) 4 | #define ADM_STOP _IO(ADM_IOC_MAGIC, 3) 5 | #define ADM_GET _IO(ADM_IOC_MAGIC, 4) 6 | #define ADM_CONFIRM _IO(ADM_IOC_MAGIC, 5) 7 | #define ADM_IOC_MAXNR (5) 8 | 9 | //Number of DMA buffers 10 | #define BUF_NUM 16 11 | //Size of a single DMA buffer 12 | #define BUF_SIZE (4096*1024) 13 | -------------------------------------------------------------------------------- /axi_vdma_prj1/sd_boot/README: -------------------------------------------------------------------------------- 1 | The files uEnv.txt and boot.bin must be placed on the 1st, VFAT partition of the SD card 2 | to allow booting of the Z-turn via TFTP from the server at 172.19.1.1 3 | The file boot.bin has been generated as described in main README.md 4 | 5 | Currently the boot_hp0_64b.bin is for designs with HP0 in 64-bit mode, 6 | while boot_hp0_32b.bin HP0 in 32-bit mode! 7 | 8 | The boot.bin is copied from boot_hp0_64b.bin . 9 | 10 | 11 | -------------------------------------------------------------------------------- /axi_vdma_prj1/software/example/buildroot-2016.08-rc1/package/axil2ipb-module/Config.in: -------------------------------------------------------------------------------- 1 | config BR2_PACKAGE_AXIL2IPB_MODULE 2 | bool "axil2ipb-module" 3 | depends on BR2_LINUX_KERNEL 4 | help 5 | Driver for AXIL2IPB bridge. 6 | It is available as an example for my VEXTPROJ project 7 | 8 | http://github.com/wzab/vextproj 9 | 10 | comment "axil2ipb module needs a Linux kernel to be built" 11 | depends on !BR2_LINUX_KERNEL 12 | -------------------------------------------------------------------------------- /axi_dma_prj2/software/example/buildroot-2017.11.2/package/axi4s2dmov-module/Config.in: -------------------------------------------------------------------------------- 1 | config BR2_PACKAGE_AXI4S2DMOV_MODULE 2 | bool "axi4s2dmov-module" 3 | depends on BR2_LINUX_KERNEL 4 | help 5 | Driver for AXI4S2DMOV core. 6 | It is available as an example for my VEXTPROJ project 7 | 8 | http://github.com/wzab/vextproj 9 | 10 | comment "axi4s2dmov module needs a Linux kernel to be built" 11 | depends on !BR2_LINUX_KERNEL 12 | -------------------------------------------------------------------------------- /axi_vdma_prj1/software/example/buildroot-2016.08-rc1/package/axi4s2dma-module/Config.in: -------------------------------------------------------------------------------- 1 | config BR2_PACKAGE_AXI4S2DMA_MODULE 2 | bool "axi4s2dma-module" 3 | depends on BR2_LINUX_KERNEL 4 | help 5 | Driver for AXI4S2DMA core. 6 | It is available as an example for my VEXTPROJ project 7 | 8 | http://github.com/wzab/vextproj 9 | 10 | comment "axi4s2dma module needs a Linux kernel to be built" 11 | depends on !BR2_LINUX_KERNEL 12 | -------------------------------------------------------------------------------- /axi_irq_prj1/software/example/overlay/usr/bin/test3_hist.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/python 2 | f=open("/dev/my_bm0","r+b",0) 3 | import struct 4 | import mmap 5 | import time 6 | fr=open("results.txt","w") 7 | n=0 8 | while n<10000: 9 | t1=time.time() 10 | f.write(struct.pack("; 25 | }; 26 | }; 27 | -------------------------------------------------------------------------------- /axi_dma_prj1/hdl/sim/ipbus_test.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/python 2 | 3 | import cbus 4 | nodes=cbus.cbus_read_nodes('ipbus_test.xml') 5 | ctrl=nodes['CTRLREG'] 6 | idreg=nodes['IDREG'] 7 | stat=nodes['STATREG'] 8 | l1set=nodes['LFSR1_SET'] 9 | l1shift=nodes['LFSR1_SHIFT'] 10 | l1read=nodes['LFSR1_READ'] 11 | l2set=nodes['LFSR2_SET'] 12 | l2shift=nodes['LFSR2_SHIFT'] 13 | l2read=nodes['LFSR2_READ'] 14 | cbus.bus_delay(250) 15 | print hex(idreg.read()) 16 | print "Simulating the shift register" 17 | l1set.write(1) 18 | for i in range(0,10): 19 | print hex(l1read.read()) 20 | l1shift.write(0) 21 | 22 | -------------------------------------------------------------------------------- /axi_dma_prj2/hdl/sim/ipbus_test.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/python 2 | 3 | import cbus 4 | nodes=cbus.cbus_read_nodes('ipbus_test.xml') 5 | ctrl=nodes['CTRLREG'] 6 | idreg=nodes['IDREG'] 7 | stat=nodes['STATREG'] 8 | l1set=nodes['LFSR1_SET'] 9 | l1shift=nodes['LFSR1_SHIFT'] 10 | l1read=nodes['LFSR1_READ'] 11 | l2set=nodes['LFSR2_SET'] 12 | l2shift=nodes['LFSR2_SHIFT'] 13 | l2read=nodes['LFSR2_READ'] 14 | cbus.bus_delay(250) 15 | print hex(idreg.read()) 16 | print "Simulating the shift register" 17 | l1set.write(1) 18 | for i in range(0,10): 19 | print hex(l1read.read()) 20 | l1shift.write(0) 21 | 22 | -------------------------------------------------------------------------------- /axi_vdma_prj1/hdl/sim/ipbus_test.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/python 2 | 3 | import cbus 4 | nodes=cbus.cbus_read_nodes('ipbus_test.xml') 5 | ctrl=nodes['CTRLREG'] 6 | idreg=nodes['IDREG'] 7 | stat=nodes['STATREG'] 8 | l1set=nodes['LFSR1_SET'] 9 | l1shift=nodes['LFSR1_SHIFT'] 10 | l1read=nodes['LFSR1_READ'] 11 | l2set=nodes['LFSR2_SET'] 12 | l2shift=nodes['LFSR2_SHIFT'] 13 | l2read=nodes['LFSR2_READ'] 14 | cbus.bus_delay(250) 15 | print hex(idreg.read()) 16 | print "Simulating the shift register" 17 | l1set.write(1) 18 | for i in range(0,10): 19 | print hex(l1read.read()) 20 | l1shift.write(0) 21 | 22 | -------------------------------------------------------------------------------- /axi_dma_prj1/hdl/proj_def.tcl: -------------------------------------------------------------------------------- 1 | set eprj_proj_name "zturn_axi4s2dma_demo" 2 | set eprj_def_root "src" 3 | set eprj_top_entity "design_1_wrapper" 4 | set eprj_board_part "" 5 | set eprj_part "xc7z020clg400-1" 6 | set eprj_target_language "VHDL" 7 | set eprj_simulator_language "Mixed" 8 | set eprj_default_lib "xil_defaultlib" 9 | set eprj_synth_flow "Vivado Synthesis 2016" 10 | set eprj_synth_strategy "Flow_PerfOptimized_high" 11 | set eprj_impl_flow "Vivado Implementation 2016" 12 | set eprj_impl_strategy "Performance_Retiming" 13 | set eprj_vivado_version "2016.2" 14 | set eprj_vivado_version_allow_upgrade false 15 | 16 | -------------------------------------------------------------------------------- /axi_dma_prj2/hdl/proj_def.tcl: -------------------------------------------------------------------------------- 1 | set eprj_proj_name "zturn_axi4s2dma_demo" 2 | set eprj_def_root "src" 3 | set eprj_top_entity "design_1_wrapper" 4 | set eprj_board_part "" 5 | set eprj_part "xc7z020clg400-1" 6 | set eprj_target_language "VHDL" 7 | set eprj_simulator_language "Mixed" 8 | set eprj_default_lib "xil_defaultlib" 9 | set eprj_synth_flow "Vivado Synthesis 2017" 10 | set eprj_synth_strategy "Flow_PerfOptimized_high" 11 | set eprj_impl_flow "Vivado Implementation 2017" 12 | set eprj_impl_strategy "Performance_Retiming" 13 | set eprj_vivado_version "2017.4" 14 | set eprj_vivado_version_allow_upgrade false 15 | 16 | -------------------------------------------------------------------------------- /axi_irq_prj1/hdl/proj_def.tcl: -------------------------------------------------------------------------------- 1 | set eprj_proj_name "zturn_axi_irq_demo" 2 | set eprj_def_root "src" 3 | set eprj_top_entity "design_1_wrapper" 4 | set eprj_board_part "" 5 | set eprj_part "xc7z020clg400-1" 6 | set eprj_target_language "VHDL" 7 | set eprj_simulator_language "Mixed" 8 | set eprj_default_lib "xil_defaultlib" 9 | set eprj_synth_flow "Vivado Synthesis 2016" 10 | set eprj_synth_strategy "Flow_PerfOptimized_high" 11 | set eprj_impl_flow "Vivado Implementation 2016" 12 | set eprj_impl_strategy "Performance_Retiming" 13 | set eprj_vivado_version "2016.2" 14 | set eprj_vivado_version_allow_upgrade false 15 | 16 | -------------------------------------------------------------------------------- /axi_vdma_prj1/hdl/proj_def.tcl: -------------------------------------------------------------------------------- 1 | set eprj_proj_name "zturn_axi4s2vdma_demo" 2 | set eprj_def_root "src" 3 | set eprj_top_entity "design_1_wrapper" 4 | set eprj_board_part "" 5 | set eprj_part "xc7z020clg400-1" 6 | set eprj_target_language "VHDL" 7 | set eprj_simulator_language "Mixed" 8 | set eprj_default_lib "xil_defaultlib" 9 | set eprj_synth_flow "Vivado Synthesis 2016" 10 | set eprj_synth_strategy "Flow_PerfOptimized_high" 11 | set eprj_impl_flow "Vivado Implementation 2016" 12 | set eprj_impl_strategy "Performance_Retiming" 13 | set eprj_vivado_version "2016.2" 14 | set eprj_vivado_version_allow_upgrade false 15 | 16 | -------------------------------------------------------------------------------- /axi_dma_prj1/software/example/axi4s2dma/Makefile: -------------------------------------------------------------------------------- 1 | # If KERNELRELEASE is defined, we've been invoked from the 2 | # kernel build system and can use its language. 3 | ifneq ($(KERNELRELEASE),) 4 | obj-m := axi4s2dma.o 5 | # Otherwise we were called directly from the command 6 | # line; invoke the kernel build system. 7 | else 8 | KERNELDIR ?= /lib/modules/$(shell uname -r)/build 9 | PWD := $(shell pwd) 10 | default: 11 | $(MAKE) -C $(KERNELDIR) M=$(PWD) modules 12 | 13 | modules_install: 14 | $(MAKE) -C $(KERNELDIR) M=$(PWD) modules_install 15 | 16 | clean: 17 | $(MAKE) -C $(KERNELDIR) M=$(PWD) clean 18 | 19 | endif 20 | -------------------------------------------------------------------------------- /axi_dma_prj1/software/example/axil2ipb/Makefile: -------------------------------------------------------------------------------- 1 | # If KERNELRELEASE is defined, we've been invoked from the 2 | # kernel build system and can use its language. 3 | ifneq ($(KERNELRELEASE),) 4 | obj-m := axil2ipb.o 5 | # Otherwise we were called directly from the command 6 | # line; invoke the kernel build system. 7 | else 8 | KERNELDIR ?= /lib/modules/$(shell uname -r)/build 9 | PWD := $(shell pwd) 10 | default: 11 | $(MAKE) -C $(KERNELDIR) M=$(PWD) modules 12 | 13 | modules_install: 14 | $(MAKE) -C $(KERNELDIR) M=$(PWD) modules_install 15 | 16 | clean: 17 | $(MAKE) -C $(KERNELDIR) M=$(PWD) clean 18 | 19 | endif 20 | -------------------------------------------------------------------------------- /axi_dma_prj2/software/example/axil2ipb/Makefile: -------------------------------------------------------------------------------- 1 | # If KERNELRELEASE is defined, we've been invoked from the 2 | # kernel build system and can use its language. 3 | ifneq ($(KERNELRELEASE),) 4 | obj-m := axil2ipb.o 5 | # Otherwise we were called directly from the command 6 | # line; invoke the kernel build system. 7 | else 8 | KERNELDIR ?= /lib/modules/$(shell uname -r)/build 9 | PWD := $(shell pwd) 10 | default: 11 | $(MAKE) -C $(KERNELDIR) M=$(PWD) modules 12 | 13 | modules_install: 14 | $(MAKE) -C $(KERNELDIR) M=$(PWD) modules_install 15 | 16 | clean: 17 | $(MAKE) -C $(KERNELDIR) M=$(PWD) clean 18 | 19 | endif 20 | -------------------------------------------------------------------------------- /axi_vdma_prj1/software/example/axi4s2dma/Makefile: -------------------------------------------------------------------------------- 1 | # If KERNELRELEASE is defined, we've been invoked from the 2 | # kernel build system and can use its language. 3 | ifneq ($(KERNELRELEASE),) 4 | obj-m := axi4s2dma.o 5 | # Otherwise we were called directly from the command 6 | # line; invoke the kernel build system. 7 | else 8 | KERNELDIR ?= /lib/modules/$(shell uname -r)/build 9 | PWD := $(shell pwd) 10 | default: 11 | $(MAKE) -C $(KERNELDIR) M=$(PWD) modules 12 | 13 | modules_install: 14 | $(MAKE) -C $(KERNELDIR) M=$(PWD) modules_install 15 | 16 | clean: 17 | $(MAKE) -C $(KERNELDIR) M=$(PWD) clean 18 | 19 | endif 20 | -------------------------------------------------------------------------------- /axi_vdma_prj1/software/example/axil2ipb/Makefile: -------------------------------------------------------------------------------- 1 | # If KERNELRELEASE is defined, we've been invoked from the 2 | # kernel build system and can use its language. 3 | ifneq ($(KERNELRELEASE),) 4 | obj-m := axil2ipb.o 5 | # Otherwise we were called directly from the command 6 | # line; invoke the kernel build system. 7 | else 8 | KERNELDIR ?= /lib/modules/$(shell uname -r)/build 9 | PWD := $(shell pwd) 10 | default: 11 | $(MAKE) -C $(KERNELDIR) M=$(PWD) modules 12 | 13 | modules_install: 14 | $(MAKE) -C $(KERNELDIR) M=$(PWD) modules_install 15 | 16 | clean: 17 | $(MAKE) -C $(KERNELDIR) M=$(PWD) clean 18 | 19 | endif 20 | -------------------------------------------------------------------------------- /axi_irq_prj1/software/example/axi_irq1/Makefile: -------------------------------------------------------------------------------- 1 | # If KERNELRELEASE is defined, we've been invoked from the 2 | # kernel build system and can use its language. 3 | ifneq ($(KERNELRELEASE),) 4 | obj-m := axi_irq1.o 5 | # Otherwise we were called directly from the command 6 | # line; invoke the kernel build system. 7 | else 8 | KERNELDIR ?= /lib/modules/$(shell uname -r)/build 9 | PWD := $(shell pwd) 10 | default: 11 | $(MAKE) -C $(KERNELDIR) M=$(PWD) modules 12 | 13 | modules_install: 14 | $(MAKE) -C $(KERNELDIR) M=$(PWD) modules_install 15 | 16 | clean: 17 | $(MAKE) -C $(KERNELDIR) M=$(PWD) clean 18 | 19 | endif 20 | 21 | -------------------------------------------------------------------------------- /axi_dma_prj2/software/example/axi4s2dmov/Makefile: -------------------------------------------------------------------------------- 1 | # If KERNELRELEASE is defined, we've been invoked from the 2 | # kernel build system and can use its language. 3 | ifneq ($(KERNELRELEASE),) 4 | obj-m := axi4s2dmov.o ksgpio.o 5 | # Otherwise we were called directly from the command 6 | # line; invoke the kernel build system. 7 | else 8 | KERNELDIR ?= /lib/modules/$(shell uname -r)/build 9 | PWD := $(shell pwd) 10 | default: 11 | $(MAKE) -C $(KERNELDIR) M=$(PWD) modules 12 | 13 | modules_install: 14 | $(MAKE) -C $(KERNELDIR) M=$(PWD) modules_install 15 | 16 | clean: 17 | $(MAKE) -C $(KERNELDIR) M=$(PWD) clean 18 | 19 | endif 20 | -------------------------------------------------------------------------------- /axi_gpio_prj1/software/example/multi-gpio/Makefile: -------------------------------------------------------------------------------- 1 | # If KERNELRELEASE is defined, we've been invoked from the 2 | # kernel build system and can use its language. 3 | ifneq ($(KERNELRELEASE),) 4 | obj-m := multi-gpio.o 5 | # Otherwise we were called directly from the command 6 | # line; invoke the kernel build system. 7 | else 8 | KERNELDIR ?= /lib/modules/$(shell uname -r)/build 9 | PWD := $(shell pwd) 10 | default: 11 | $(MAKE) -C $(KERNELDIR) M=$(PWD) modules 12 | 13 | modules_install: 14 | $(MAKE) -C $(KERNELDIR) M=$(PWD) modules_install 15 | 16 | clean: 17 | $(MAKE) -C $(KERNELDIR) M=$(PWD) clean 18 | 19 | endif 20 | 21 | -------------------------------------------------------------------------------- /axi_dma_prj1/software/example/axi4s2dma/axi4s2dma.h: -------------------------------------------------------------------------------- 1 | 2 | //Buffer descriptor pointer 3 | struct tst1_buf_desc { 4 | int magic; 5 | void * buf; 6 | int len; 7 | } __attribute__ ((packed)); 8 | 9 | 10 | #define TST1_IOCTL_TYPE 'W' 11 | 12 | #define TST1_IOC_MINNR 0x30 13 | // Define commands 14 | #define TST1_IOCTL_MAPBUF _IOW(TST1_IOCTL_TYPE,0x30,struct tst1_buf_desc) // Map the buffer for DMA 15 | #define TST1_IOCTL_UNMAPBUF _IO(TST1_IOCTL_TYPE,0x31) // Unmap the buffer for DMA 16 | #define TST1_IOCTL_START _IO(TST1_IOCTL_TYPE,0x32) // Start the DMA 17 | #define TST1_IOCTL_STOP _IO(TST1_IOCTL_TYPE,0x33) // Stop the DMA 18 | 19 | #define TST1_IOC_MAXNR 0x33 20 | #define TST1_MAGIC 0x32abbe57 21 | 22 | -------------------------------------------------------------------------------- /axi_vdma_prj1/software/example/axi4s2dma/axi4s2dma.h: -------------------------------------------------------------------------------- 1 | 2 | //Buffer descriptor pointer 3 | struct tst1_buf_desc { 4 | int magic; 5 | void * buf; 6 | int len; 7 | } __attribute__ ((packed)); 8 | 9 | 10 | #define TST1_IOCTL_TYPE 'W' 11 | 12 | #define TST1_IOC_MINNR 0x30 13 | // Define commands 14 | #define TST1_IOCTL_MAPBUF _IOW(TST1_IOCTL_TYPE,0x30,struct tst1_buf_desc) // Map the buffer for DMA 15 | #define TST1_IOCTL_UNMAPBUF _IO(TST1_IOCTL_TYPE,0x31) // Unmap the buffer for DMA 16 | #define TST1_IOCTL_START _IO(TST1_IOCTL_TYPE,0x32) // Start the DMA 17 | #define TST1_IOCTL_STOP _IO(TST1_IOCTL_TYPE,0x33) // Stop the DMA 18 | 19 | #define TST1_IOC_MAXNR 0x33 20 | #define TST1_MAGIC 0x32abbe57 21 | 22 | -------------------------------------------------------------------------------- /axi_dma_prj1/hdl/src/bd/design_1_ooc.xdc: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | 3 | # This XDC is used only for OOC mode of synthesis, implementation 4 | # This constraints file contains default clock frequencies to be used during 5 | # out-of-context flows such as OOC Synthesis and Hierarchical Designs. 6 | # This constraints file is not used in normal top-down synthesis (default flow 7 | # of Vivado) 8 | ################################################################################ 9 | create_clock -name processing_system7_0_FCLK_CLK0 -period 20 [get_pins processing_system7_0/FCLK_CLK0] 10 | 11 | ################################################################################ -------------------------------------------------------------------------------- /axi_dma_prj2/hdl/src/bd/design_1_ooc.xdc: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | 3 | # This XDC is used only for OOC mode of synthesis, implementation 4 | # This constraints file contains default clock frequencies to be used during 5 | # out-of-context flows such as OOC Synthesis and Hierarchical Designs. 6 | # This constraints file is not used in normal top-down synthesis (default flow 7 | # of Vivado) 8 | ################################################################################ 9 | create_clock -name processing_system7_0_FCLK_CLK0 -period 20 [get_pins processing_system7_0/FCLK_CLK0] 10 | 11 | ################################################################################ -------------------------------------------------------------------------------- /axi_vdma_prj1/hdl/src/bd/design_1_ooc.xdc: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | 3 | # This XDC is used only for OOC mode of synthesis, implementation 4 | # This constraints file contains default clock frequencies to be used during 5 | # out-of-context flows such as OOC Synthesis and Hierarchical Designs. 6 | # This constraints file is not used in normal top-down synthesis (default flow 7 | # of Vivado) 8 | ################################################################################ 9 | create_clock -name processing_system7_0_FCLK_CLK0 -period 20 [get_pins processing_system7_0/FCLK_CLK0] 10 | 11 | ################################################################################ -------------------------------------------------------------------------------- /axi_dma_prj1/software/example/overlay/usr/bin/axil2ipb.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/python 2 | f=open("/dev/ipb_0","r+b",0) 3 | import struct 4 | import mmap 5 | import time 6 | regs=mmap.mmap(f.fileno(),0x10,mmap.MAP_SHARED,mmap.ACCESS_WRITE,offset=0x000) 7 | 8 | def set_val(mm,pos,val): 9 | s=struct.pack(" 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | -------------------------------------------------------------------------------- /axi_dma_prj2/hdl/sim/ipbus_test.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | -------------------------------------------------------------------------------- /axi_vdma_prj1/hdl/sim/ipbus_test.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | -------------------------------------------------------------------------------- /axi_dma_prj2/software/example/dts/pcw.dtsi: -------------------------------------------------------------------------------- 1 | /* 2 | * CAUTION: This file is automatically generated by Xilinx. 3 | * Version: 4 | * Today is: Wed Jan 31 22:07:57 2018 5 | */ 6 | 7 | 8 | / { 9 | cpus { 10 | cpu@0 { 11 | operating-points = <666666 1000000 333333 1000000>; 12 | }; 13 | }; 14 | }; 15 | &gem0 { 16 | phy-mode = "rgmii-id"; 17 | status = "okay"; 18 | xlnx,ptp-enet-clock = <0x69f6bcb>; 19 | }; 20 | &gpio0 { 21 | emio-gpio-width = <64>; 22 | gpio-mask-high = <0x0>; 23 | gpio-mask-low = <0x5600>; 24 | }; 25 | &intc { 26 | num_cpus = <2>; 27 | num_interrupts = <96>; 28 | }; 29 | &sdhci0 { 30 | status = "okay"; 31 | xlnx,has-cd = <0x1>; 32 | xlnx,has-power = <0x0>; 33 | xlnx,has-wp = <0x1>; 34 | }; 35 | &uart1 { 36 | device_type = "serial"; 37 | port-number = <0>; 38 | status = "okay"; 39 | }; 40 | &clkc { 41 | fclk-enable = <0x1>; 42 | ps-clk-frequency = <33333333>; 43 | }; 44 | -------------------------------------------------------------------------------- /axi_dma_prj1/hdl/src/ipbus/decoder/ipbus_addr_decode.vhd.tmpl: -------------------------------------------------------------------------------- 1 | -- Address decode logic for ipbus fabric 2 | -- 3 | -- This file has been AUTOGENERATED from the address table - do not hand edit 4 | -- 5 | -- We assume the synthesis tool is clever enough to recognise exclusive conditions 6 | -- in the if statement. 7 | -- 8 | -- Dave Newbold, February 2011 9 | 10 | library IEEE; 11 | use IEEE.STD_LOGIC_1164.all; 12 | use ieee.numeric_std.all; 13 | use work.ipbus.all; 14 | 15 | package ipbus_addr_decode is 16 | 17 | function ipbus_addr_sel(signal addr : in std_logic_vector(31 downto 0)) return integer; 18 | 19 | end ipbus_addr_decode; 20 | 21 | package body ipbus_addr_decode is 22 | 23 | function ipbus_addr_sel(signal addr : in std_logic_vector(31 downto 0)) return integer is 24 | variable sel : integer; 25 | begin 26 | --ADDR_TABLE_HERE 27 | else 28 | sel := 99; 29 | end if; 30 | return sel; 31 | end ipbus_addr_sel; 32 | 33 | end ipbus_addr_decode; 34 | -------------------------------------------------------------------------------- /axi_dma_prj2/hdl/src/ipbus/decoder/ipbus_addr_decode.vhd.tmpl: -------------------------------------------------------------------------------- 1 | -- Address decode logic for ipbus fabric 2 | -- 3 | -- This file has been AUTOGENERATED from the address table - do not hand edit 4 | -- 5 | -- We assume the synthesis tool is clever enough to recognise exclusive conditions 6 | -- in the if statement. 7 | -- 8 | -- Dave Newbold, February 2011 9 | 10 | library IEEE; 11 | use IEEE.STD_LOGIC_1164.all; 12 | use ieee.numeric_std.all; 13 | use work.ipbus.all; 14 | 15 | package ipbus_addr_decode is 16 | 17 | function ipbus_addr_sel(signal addr : in std_logic_vector(31 downto 0)) return integer; 18 | 19 | end ipbus_addr_decode; 20 | 21 | package body ipbus_addr_decode is 22 | 23 | function ipbus_addr_sel(signal addr : in std_logic_vector(31 downto 0)) return integer is 24 | variable sel : integer; 25 | begin 26 | --ADDR_TABLE_HERE 27 | else 28 | sel := 99; 29 | end if; 30 | return sel; 31 | end ipbus_addr_sel; 32 | 33 | end ipbus_addr_decode; 34 | -------------------------------------------------------------------------------- /axi_vdma_prj1/hdl/src/ipbus/decoder/ipbus_addr_decode.vhd.tmpl: -------------------------------------------------------------------------------- 1 | -- Address decode logic for ipbus fabric 2 | -- 3 | -- This file has been AUTOGENERATED from the address table - do not hand edit 4 | -- 5 | -- We assume the synthesis tool is clever enough to recognise exclusive conditions 6 | -- in the if statement. 7 | -- 8 | -- Dave Newbold, February 2011 9 | 10 | library IEEE; 11 | use IEEE.STD_LOGIC_1164.all; 12 | use ieee.numeric_std.all; 13 | use work.ipbus.all; 14 | 15 | package ipbus_addr_decode is 16 | 17 | function ipbus_addr_sel(signal addr : in std_logic_vector(31 downto 0)) return integer; 18 | 19 | end ipbus_addr_decode; 20 | 21 | package body ipbus_addr_decode is 22 | 23 | function ipbus_addr_sel(signal addr : in std_logic_vector(31 downto 0)) return integer is 24 | variable sel : integer; 25 | begin 26 | --ADDR_TABLE_HERE 27 | else 28 | sel := 99; 29 | end if; 30 | return sel; 31 | end ipbus_addr_sel; 32 | 33 | end ipbus_addr_decode; 34 | -------------------------------------------------------------------------------- /axi_dma_prj1/hdl/src/ipbus/slaves/ipbus_reg_types.vhd: -------------------------------------------------------------------------------- 1 | library IEEE; 2 | use IEEE.STD_LOGIC_1164.all; 3 | 4 | package ipbus_reg_types is 5 | 6 | type ipb_reg_v is array(natural range <>) of std_logic_vector(31 downto 0); 7 | 8 | -- Useful functions - compile-time only 9 | 10 | function calc_width(n: integer) return integer; 11 | function integer_max(left, right: integer) return integer; 12 | 13 | end package ipbus_reg_types; 14 | 15 | package body ipbus_reg_types is 16 | 17 | function calc_width(n: integer) return integer is 18 | begin 19 | for i in 0 to 31 loop 20 | if(2 ** i >= n) then 21 | return(i); 22 | end if; 23 | end loop; 24 | return(0); 25 | end function calc_width; 26 | 27 | function integer_max(left, right: integer) return integer is 28 | begin 29 | if left > right then 30 | return left; 31 | else 32 | return right; 33 | end if; 34 | end function integer_max; 35 | 36 | end package body ipbus_reg_types; 37 | 38 | -------------------------------------------------------------------------------- /axi_dma_prj2/hdl/src/ipbus/slaves/ipbus_reg_types.vhd: -------------------------------------------------------------------------------- 1 | library IEEE; 2 | use IEEE.STD_LOGIC_1164.all; 3 | 4 | package ipbus_reg_types is 5 | 6 | type ipb_reg_v is array(natural range <>) of std_logic_vector(31 downto 0); 7 | 8 | -- Useful functions - compile-time only 9 | 10 | function calc_width(n: integer) return integer; 11 | function integer_max(left, right: integer) return integer; 12 | 13 | end package ipbus_reg_types; 14 | 15 | package body ipbus_reg_types is 16 | 17 | function calc_width(n: integer) return integer is 18 | begin 19 | for i in 0 to 31 loop 20 | if(2 ** i >= n) then 21 | return(i); 22 | end if; 23 | end loop; 24 | return(0); 25 | end function calc_width; 26 | 27 | function integer_max(left, right: integer) return integer is 28 | begin 29 | if left > right then 30 | return left; 31 | else 32 | return right; 33 | end if; 34 | end function integer_max; 35 | 36 | end package body ipbus_reg_types; 37 | 38 | -------------------------------------------------------------------------------- /axi_vdma_prj1/hdl/src/ipbus/slaves/ipbus_reg_types.vhd: -------------------------------------------------------------------------------- 1 | library IEEE; 2 | use IEEE.STD_LOGIC_1164.all; 3 | 4 | package ipbus_reg_types is 5 | 6 | type ipb_reg_v is array(natural range <>) of std_logic_vector(31 downto 0); 7 | 8 | -- Useful functions - compile-time only 9 | 10 | function calc_width(n: integer) return integer; 11 | function integer_max(left, right: integer) return integer; 12 | 13 | end package ipbus_reg_types; 14 | 15 | package body ipbus_reg_types is 16 | 17 | function calc_width(n: integer) return integer is 18 | begin 19 | for i in 0 to 31 loop 20 | if(2 ** i >= n) then 21 | return(i); 22 | end if; 23 | end loop; 24 | return(0); 25 | end function calc_width; 26 | 27 | function integer_max(left, right: integer) return integer is 28 | begin 29 | if left > right then 30 | return left; 31 | else 32 | return right; 33 | end if; 34 | end function integer_max; 35 | 36 | end package body ipbus_reg_types; 37 | 38 | -------------------------------------------------------------------------------- /axi_dma_prj1/hdl/src/ipbus/ipbus_package.vhd: -------------------------------------------------------------------------------- 1 | library IEEE; 2 | use IEEE.STD_LOGIC_1164.all; 3 | 4 | package ipbus is 5 | 6 | -- The signals going from master to slaves 7 | type ipb_wbus is 8 | record 9 | ipb_addr: std_logic_vector(31 downto 0); 10 | ipb_wdata: std_logic_vector(31 downto 0); 11 | ipb_strobe: std_logic; 12 | ipb_write: std_logic; 13 | end record; 14 | 15 | type ipb_wbus_array is array(natural range <>) of ipb_wbus; 16 | 17 | -- The signals going from slaves to master 18 | type ipb_rbus is 19 | record 20 | ipb_rdata: std_logic_vector(31 downto 0); 21 | ipb_ack: std_logic; 22 | ipb_err: std_logic; 23 | end record; 24 | 25 | type ipb_rbus_array is array(natural range <>) of ipb_rbus; 26 | 27 | constant IPB_RBUS_NULL: ipb_rbus := ((others => '0'), '0', '0'); 28 | constant IPB_WBUS_NULL: ipb_wbus := ((others => '0'), (others => '0'), '0', '0'); 29 | 30 | -- For top-level generics 31 | 32 | type ipb_mac_cfg is (EXTERNAL, INTERNAL); 33 | type ipb_ip_cfg is (EXTERNAL, INTERNAL); 34 | 35 | end ipbus; 36 | 37 | -------------------------------------------------------------------------------- /axi_dma_prj2/hdl/src/ipbus/ipbus_package.vhd: -------------------------------------------------------------------------------- 1 | library IEEE; 2 | use IEEE.STD_LOGIC_1164.all; 3 | 4 | package ipbus is 5 | 6 | -- The signals going from master to slaves 7 | type ipb_wbus is 8 | record 9 | ipb_addr: std_logic_vector(31 downto 0); 10 | ipb_wdata: std_logic_vector(31 downto 0); 11 | ipb_strobe: std_logic; 12 | ipb_write: std_logic; 13 | end record; 14 | 15 | type ipb_wbus_array is array(natural range <>) of ipb_wbus; 16 | 17 | -- The signals going from slaves to master 18 | type ipb_rbus is 19 | record 20 | ipb_rdata: std_logic_vector(31 downto 0); 21 | ipb_ack: std_logic; 22 | ipb_err: std_logic; 23 | end record; 24 | 25 | type ipb_rbus_array is array(natural range <>) of ipb_rbus; 26 | 27 | constant IPB_RBUS_NULL: ipb_rbus := ((others => '0'), '0', '0'); 28 | constant IPB_WBUS_NULL: ipb_wbus := ((others => '0'), (others => '0'), '0', '0'); 29 | 30 | -- For top-level generics 31 | 32 | type ipb_mac_cfg is (EXTERNAL, INTERNAL); 33 | type ipb_ip_cfg is (EXTERNAL, INTERNAL); 34 | 35 | end ipbus; 36 | 37 | -------------------------------------------------------------------------------- /axi_vdma_prj1/hdl/src/ipbus/ipbus_package.vhd: -------------------------------------------------------------------------------- 1 | library IEEE; 2 | use IEEE.STD_LOGIC_1164.all; 3 | 4 | package ipbus is 5 | 6 | -- The signals going from master to slaves 7 | type ipb_wbus is 8 | record 9 | ipb_addr: std_logic_vector(31 downto 0); 10 | ipb_wdata: std_logic_vector(31 downto 0); 11 | ipb_strobe: std_logic; 12 | ipb_write: std_logic; 13 | end record; 14 | 15 | type ipb_wbus_array is array(natural range <>) of ipb_wbus; 16 | 17 | -- The signals going from slaves to master 18 | type ipb_rbus is 19 | record 20 | ipb_rdata: std_logic_vector(31 downto 0); 21 | ipb_ack: std_logic; 22 | ipb_err: std_logic; 23 | end record; 24 | 25 | type ipb_rbus_array is array(natural range <>) of ipb_rbus; 26 | 27 | constant IPB_RBUS_NULL: ipb_rbus := ((others => '0'), '0', '0'); 28 | constant IPB_WBUS_NULL: ipb_wbus := ((others => '0'), (others => '0'), '0', '0'); 29 | 30 | -- For top-level generics 31 | 32 | type ipb_mac_cfg is (EXTERNAL, INTERNAL); 33 | type ipb_ip_cfg is (EXTERNAL, INTERNAL); 34 | 35 | end ipbus; 36 | 37 | -------------------------------------------------------------------------------- /axi_irq_prj1/software/build_soft.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | #Please note, that even though the Buildroot version 3 | #is put into the environment variable, it may be also 4 | #set in different configuration files or paths in 5 | #the zip archive. So if you want to change the Buildroot 6 | #version, it may be difficult... 7 | BRNAME=buildroot-2016.08-rc1 8 | wget https://buildroot.org/downloads/$BRNAME.tar.bz2 9 | #Unpack Buildroot 10 | tar -xjf $BRNAME.tar.bz2 11 | #Add our stuff (In the previous version we unpacked the 12 | #archive, but keeping archive in GIT does not allow 13 | #to track changes. Therefore now we copy contents from 14 | #the directory, using "tar" to ensure that all directories 15 | #and files, even hidden ones, are copied/overwritten) 16 | ( cd example ; tar -cf - . ) | tar -xf - 17 | #Modify the packages menu 18 | #It is not the most elegant way, but the simplest 19 | #we just add new menu 20 | cat >> $BRNAME/package/Config.in <