├── .gitattributes ├── .gitignore ├── Components ├── bsp │ ├── boards │ │ └── STM32 │ │ │ ├── bsp_board.c │ │ │ ├── bsp_board_defs.h │ │ │ ├── bsp_button_defs.h │ │ │ ├── bsp_config.h │ │ │ ├── bsp_driver_defs.h │ │ │ ├── bsp_drivers.c │ │ │ ├── bsp_external │ │ │ ├── mrfi_board.c │ │ │ └── mrfi_board_defs.h │ │ │ ├── bsp_led_defs.h │ │ │ ├── startup_stm32f10x_cl.s │ │ │ ├── startup_stm32f10x_hd.s │ │ │ ├── startup_stm32f10x_hd_vl.s │ │ │ ├── startup_stm32f10x_ld.s │ │ │ ├── startup_stm32f10x_ld_vl.s │ │ │ ├── startup_stm32f10x_md.s │ │ │ ├── startup_stm32f10x_md_vl.s │ │ │ ├── startup_stm32f10x_xl.s │ │ │ ├── stm32f103RE_flash.icf │ │ │ ├── stm32f10x.h │ │ │ ├── stm32f10x_conf.h │ │ │ ├── stm32f10x_flash.icf │ │ │ ├── stm32f2xx.h │ │ │ ├── system_stm32f10x.c │ │ │ └── system_stm32f10x.h │ ├── bsp.c │ ├── bsp.h │ ├── bsp_macros.h │ ├── drivers │ │ ├── bsp_buttons.h │ │ ├── bsp_leds.h │ │ ├── code │ │ │ ├── bsp_buttons.c │ │ │ ├── bsp_generic_buttons.h │ │ │ ├── bsp_generic_leds.h │ │ │ ├── bsp_leds.c │ │ │ ├── uart.c │ │ │ ├── uart_cc430.c │ │ │ ├── uart_intfc.c │ │ │ ├── uart_intfc_cc430.c │ │ │ └── uart_stm32.c │ │ ├── uart.h │ │ ├── uart_cc430.h │ │ ├── uart_intfc.h │ │ ├── uart_intfc_cc430.h │ │ └── uart_stm32.h │ ├── mcus │ │ ├── bsp_8051_defs.h │ │ ├── bsp_msp430_defs.h │ │ └── bsp_stm32f10x_defs.h │ └── pp_utils.h ├── mrfi │ ├── mrfi.c │ ├── mrfi.h │ ├── mrfi_defs.h │ ├── radios │ │ ├── common │ │ │ ├── mrfi_f1f2.c │ │ │ └── mrfi_f1f2.h │ │ ├── family1 │ │ │ ├── mrfi_radio.c │ │ │ ├── mrfi_spi.c │ │ │ └── mrfi_spi.h │ │ ├── family2 │ │ │ └── mrfi_radio.c │ │ ├── family3 │ │ │ ├── mrfi_radio.c │ │ │ ├── mrfi_spi.c │ │ │ └── mrfi_spi.h │ │ ├── family4 │ │ │ └── mrfi_radio.c │ │ ├── family5 │ │ │ ├── mrfi_radio.c │ │ │ ├── mrfi_radio_interface.c │ │ │ └── mrfi_radio_interface.h │ │ └── family6 │ │ │ └── mrfi_radio.c │ └── smartrf │ │ ├── CC1100 │ │ ├── rfstudio.srfs1100 │ │ └── smartrf_CC1100.h │ │ ├── CC1100E │ │ ├── 470 │ │ │ ├── rfstudio.srfs1102 │ │ │ └── smartrf_CC1100E.h │ │ └── 950 │ │ │ ├── rfstudio.srfs1102 │ │ │ └── smartrf_CC1100E.h │ │ ├── CC1101 │ │ ├── rfstudio.srfs │ │ ├── rfstudio.srfs1101 │ │ └── smartrf_CC1101.h │ │ ├── CC110L │ │ └── smartrf_CC110L.h │ │ ├── CC1110 │ │ ├── CC1110_433MHz.srfs │ │ ├── rfstudio.srfs1110 │ │ ├── smartrf_CC1110.h │ │ ├── smartrf_CC1110.h.default │ │ ├── smartrf_CC1110.prs │ │ └── smartrf_CC1110_433MHz.h │ │ ├── CC1111 │ │ ├── rfstudio.srfs1111 │ │ └── smartrf_CC1111.h │ │ ├── CC2500 │ │ ├── rfstudio.srfs │ │ ├── rfstudio.srfs2500 │ │ └── smartrf_CC2500.h │ │ ├── CC2510 │ │ ├── rfstudio.srfs2510 │ │ ├── smartrf_CC2510.h │ │ └── smartrf_CC2510.prs │ │ ├── CC2511 │ │ ├── rfstudio.srfs2511 │ │ └── smartrf_CC2511.h │ │ └── CC430 │ │ ├── rfstudio.srfsCC430Fx13x │ │ └── smartrf_CC430.h └── simpliciti │ ├── nwk │ ├── nwk.c │ ├── nwk.h │ ├── nwk_QMgmt.c │ ├── nwk_QMgmt.h │ ├── nwk_api.c │ ├── nwk_api.h │ ├── nwk_app.h │ ├── nwk_frame.c │ ├── nwk_frame.h │ ├── nwk_globals.c │ ├── nwk_globals.h │ └── nwk_types.h │ └── nwk_applications │ ├── nwk_freq.c │ ├── nwk_freq.h │ ├── nwk_ioctl.c │ ├── nwk_ioctl.h │ ├── nwk_join.c │ ├── nwk_join.h │ ├── nwk_link.c │ ├── nwk_link.h │ ├── nwk_mgmt.c │ ├── nwk_mgmt.h │ ├── nwk_ping.c │ ├── nwk_ping.h │ ├── nwk_pll.c │ ├── nwk_pll.h │ ├── nwk_security.c │ └── nwk_security.h ├── Libraries ├── CMSIS │ ├── CM3 │ │ ├── CoreSupport │ │ │ ├── core_cm3.c │ │ │ └── core_cm3.h │ │ └── DeviceSupport │ │ │ └── ST │ │ │ └── STM32F10x │ │ │ ├── Release_Notes.html │ │ │ ├── startup │ │ │ ├── TrueSTUDIO │ │ │ │ ├── startup_stm32f10x_cl.s │ │ │ │ ├── startup_stm32f10x_hd.s │ │ │ │ ├── startup_stm32f10x_hd_vl.s │ │ │ │ ├── startup_stm32f10x_ld.s │ │ │ │ ├── startup_stm32f10x_ld_vl.s │ │ │ │ ├── startup_stm32f10x_md.s │ │ │ │ ├── startup_stm32f10x_md_vl.s │ │ │ │ └── startup_stm32f10x_xl.s │ │ │ ├── arm │ │ │ │ ├── startup_stm32f10x_cl.s │ │ │ │ ├── startup_stm32f10x_hd.s │ │ │ │ ├── startup_stm32f10x_hd_vl.s │ │ │ │ ├── startup_stm32f10x_ld.s │ │ │ │ ├── startup_stm32f10x_ld_vl.s │ │ │ │ ├── startup_stm32f10x_md.s │ │ │ │ ├── startup_stm32f10x_md_vl.s │ │ │ │ └── startup_stm32f10x_xl.s │ │ │ ├── gcc_ride7 │ │ │ │ ├── startup_stm32f10x_cl.s │ │ │ │ ├── startup_stm32f10x_hd.s │ │ │ │ ├── startup_stm32f10x_hd_vl.s │ │ │ │ ├── startup_stm32f10x_ld.s │ │ │ │ ├── startup_stm32f10x_ld_vl.s │ │ │ │ ├── startup_stm32f10x_md.s │ │ │ │ ├── startup_stm32f10x_md_vl.s │ │ │ │ └── startup_stm32f10x_xl.s │ │ │ └── iar │ │ │ │ ├── startup_stm32f10x_cl.s │ │ │ │ ├── startup_stm32f10x_hd.s │ │ │ │ ├── startup_stm32f10x_hd_vl.s │ │ │ │ ├── startup_stm32f10x_ld.s │ │ │ │ ├── startup_stm32f10x_ld_vl.s │ │ │ │ ├── startup_stm32f10x_md.s │ │ │ │ ├── startup_stm32f10x_md_vl.s │ │ │ │ └── startup_stm32f10x_xl.s │ │ │ ├── stm32f10x.h │ │ │ ├── system_stm32f10x.c │ │ │ └── system_stm32f10x.h │ ├── CMSIS debug support.htm │ ├── CMSIS_changes.htm │ ├── Device │ │ └── ST │ │ │ └── STM32F2xx │ │ │ ├── Include │ │ │ ├── stm32f2xx.h │ │ │ └── system_stm32f2xx.h │ │ │ ├── Release_Notes.html │ │ │ └── Source │ │ │ └── Templates │ │ │ ├── TASKING │ │ │ └── cstart_thumb2.asm │ │ │ ├── TrueSTUDIO │ │ │ └── startup_stm32f2xx.s │ │ │ ├── arm │ │ │ └── startup_stm32f2xx.s │ │ │ ├── gcc_ride7 │ │ │ └── startup_stm32f2xx.s │ │ │ ├── iar │ │ │ └── startup_stm32f2xx.s │ │ │ └── system_stm32f2xx.c │ ├── Documentation │ │ └── CMSIS_Core.htm │ ├── Include │ │ ├── arm_common_tables.h │ │ ├── arm_math.h │ │ ├── core_cm0.h │ │ ├── core_cm3.h │ │ ├── core_cm4.h │ │ ├── core_cm4_simd.h │ │ ├── core_cmFunc.h │ │ └── core_cmInstr.h │ └── License.doc └── STM32F10x_StdPeriph_Driver │ ├── Release_Notes.html │ ├── inc │ ├── misc.h │ ├── stm32f10x_adc.h │ ├── stm32f10x_bkp.h │ ├── stm32f10x_can.h │ ├── stm32f10x_cec.h │ ├── stm32f10x_crc.h │ ├── stm32f10x_dac.h │ ├── stm32f10x_dbgmcu.h │ ├── stm32f10x_dma.h │ ├── stm32f10x_exti.h │ ├── stm32f10x_flash.h │ ├── stm32f10x_fsmc.h │ ├── stm32f10x_gpio.h │ ├── stm32f10x_i2c.h │ ├── stm32f10x_iwdg.h │ ├── stm32f10x_pwr.h │ ├── stm32f10x_rcc.h │ ├── stm32f10x_rtc.h │ ├── stm32f10x_sdio.h │ ├── stm32f10x_spi.h │ ├── stm32f10x_tim.h │ ├── stm32f10x_usart.h │ └── stm32f10x_wwdg.h │ └── src │ ├── misc.c │ ├── stm32f10x_adc.c │ ├── stm32f10x_bkp.c │ ├── stm32f10x_can.c │ ├── stm32f10x_cec.c │ ├── stm32f10x_crc.c │ ├── stm32f10x_dac.c │ ├── stm32f10x_dbgmcu.c │ ├── stm32f10x_dma.c │ ├── stm32f10x_exti.c │ ├── stm32f10x_flash.c │ ├── stm32f10x_fsmc.c │ ├── stm32f10x_gpio.c │ ├── stm32f10x_i2c.c │ ├── stm32f10x_iwdg.c │ ├── stm32f10x_pwr.c │ ├── stm32f10x_rcc.c │ ├── stm32f10x_rtc.c │ ├── stm32f10x_sdio.c │ ├── stm32f10x_spi.c │ ├── stm32f10x_tim.c │ ├── stm32f10x_usart.c │ └── stm32f10x_wwdg.c ├── Projects └── Examples │ ├── Applications │ ├── app_remap_led.h │ ├── main_2EDOnePolls.c │ ├── main_AP_Async_Listen.c │ ├── main_AP_Async_Listen_autoack.c │ ├── main_AP_RE.c │ ├── main_ED_Sniffer.c │ ├── main_LinkListen.c │ ├── main_LinkTo.c │ ├── main_UART_Bridge.c │ ├── main_babble.c │ ├── main_manyEDs.c │ └── main_manyEDs_autoack.c │ └── STM32 │ ├── AP_as_Data_Hub │ ├── IAR │ │ ├── Ap_as_Data_Hub.ewd │ │ ├── Ap_as_Data_Hub.ewp │ │ ├── Ap_as_Data_Hub.eww │ │ └── Configuration │ │ │ ├── Access_Point │ │ │ └── smpl_config.dat │ │ │ ├── Channel_Sniffer │ │ │ └── smpl_config.dat │ │ │ ├── End_Device │ │ │ └── smpl_config.dat │ │ │ ├── Range_Extender │ │ │ └── smpl_config.dat │ │ │ └── smpl_nwk_config.dat │ └── MDK-ARM │ │ ├── Ap_as_Data_Hub.uvproj │ │ ├── Configuration │ │ ├── Access_Point │ │ │ └── smpl_config.h │ │ ├── Channel_Sniffer │ │ │ └── smpl_config.h │ │ ├── End_Device │ │ │ └── smpl_config.h │ │ ├── Range_Extender │ │ │ └── smpl_config.h │ │ └── smpl_nwk_config.h │ │ └── intrinsics.h │ └── Cascading_End_Devices │ ├── IAR │ ├── Cascading_End_Devices.dep │ ├── Cascading_End_Devices.ewd │ ├── Cascading_End_Devices.ewp │ ├── Cascading_End_Devices.eww │ ├── Configuration │ │ ├── End_Device │ │ │ └── smpl_config.dat │ │ └── smpl_nwk_config.dat │ └── settings │ │ ├── Cascading_End_Devices.cspy.bat │ │ ├── Cascading_End_Devices.dbgdt │ │ ├── Cascading_End_Devices.dni │ │ └── Cascading_End_Devices.wsdt │ └── MDK-ARM │ ├── Cascading_End_Devices.uvproj │ ├── Configuration │ ├── End_Device │ │ └── smpl_config.h │ └── smpl_nwk_config.h │ └── intrinsics.h ├── Readme.htm └── Readme.txt /.gitattributes: -------------------------------------------------------------------------------- 1 | # Disable LF normalization for all files 2 | * -text -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | ################# 2 | ## Eclipse 3 | ################# 4 | 5 | *.pydevproject 6 | .project 7 | .metadata 8 | bin/ 9 | tmp/ 10 | *.tmp 11 | *.bak 12 | *.swp 13 | *~.nib 14 | local.properties 15 | .classpath 16 | .settings/ 17 | .loadpath 18 | 19 | # External tool builders 20 | .externalToolBuilders/ 21 | 22 | # Locally stored "Eclipse launch configurations" 23 | *.launch 24 | 25 | # CDT-specific 26 | .cproject 27 | 28 | # PDT-specific 29 | .buildpath 30 | 31 | 32 | ################# 33 | ## Visual Studio 34 | ################# 35 | 36 | ## Ignore Visual Studio temporary files, build results, and 37 | ## files generated by popular Visual Studio add-ons. 38 | 39 | # User-specific files 40 | *.suo 41 | *.user 42 | *.sln.docstates 43 | 44 | # Build results 45 | [Dd]ebug/ 46 | [Rr]elease/ 47 | *_i.c 48 | *_p.c 49 | *.ilk 50 | *.meta 51 | *.obj 52 | *.pch 53 | *.pdb 54 | *.pgc 55 | *.pgd 56 | *.rsp 57 | *.sbr 58 | *.tlb 59 | *.tli 60 | *.tlh 61 | *.tmp 62 | *.vspscc 63 | .builds 64 | *.dotCover 65 | 66 | ## TODO: If you have NuGet Package Restore enabled, uncomment this 67 | #packages/ 68 | 69 | # Visual C++ cache files 70 | ipch/ 71 | *.aps 72 | *.ncb 73 | *.opensdf 74 | *.sdf 75 | 76 | # Visual Studio profiler 77 | *.psess 78 | *.vsp 79 | 80 | # ReSharper is a .NET coding add-in 81 | _ReSharper* 82 | 83 | # Installshield output folder 84 | [Ee]xpress 85 | 86 | # DocProject is a documentation generator add-in 87 | DocProject/buildhelp/ 88 | DocProject/Help/*.HxT 89 | DocProject/Help/*.HxC 90 | DocProject/Help/*.hhc 91 | DocProject/Help/*.hhk 92 | DocProject/Help/*.hhp 93 | DocProject/Help/Html2 94 | DocProject/Help/html 95 | 96 | # Click-Once directory 97 | publish 98 | 99 | # Others 100 | [Bb]in 101 | [Oo]bj 102 | sql 103 | TestResults 104 | *.Cache 105 | ClientBin 106 | stylecop.* 107 | ~$* 108 | *.dbmdl 109 | Generated_Code #added for RIA/Silverlight projects 110 | 111 | # Backup & report files from converting an old project file to a newer 112 | # Visual Studio version. Backup files are not needed, because we have git ;-) 113 | _UpgradeReport_Files/ 114 | Backup*/ 115 | UpgradeLog*.XML 116 | 117 | 118 | 119 | ############ 120 | ## Windows 121 | ############ 122 | 123 | # Windows image file caches 124 | Thumbs.db 125 | 126 | # Folder config file 127 | Desktop.ini 128 | 129 | 130 | ############# 131 | ## Python 132 | ############# 133 | 134 | *.py[co] 135 | 136 | # Packages 137 | *.egg 138 | *.egg-info 139 | dist 140 | build 141 | eggs 142 | parts 143 | bin 144 | var 145 | sdist 146 | develop-eggs 147 | .installed.cfg 148 | 149 | # Installer logs 150 | pip-log.txt 151 | 152 | # Unit test / coverage reports 153 | .coverage 154 | .tox 155 | 156 | #Translations 157 | *.mo 158 | 159 | #Mr Developer 160 | .mr.developer.cfg 161 | 162 | # Mac crap 163 | .DS_Store 164 | 165 | ############# 166 | ## Keil 167 | ############# 168 | *.dep 169 | *.bak 170 | *.lst 171 | *.d 172 | *.crf 173 | *.map 174 | *.plg 175 | *.idx 176 | *.uvopt 177 | *.uvgui.* 178 | *.__i 179 | *._ia 180 | *.tra 181 | *.lnp 182 | *.axf 183 | [Bb]uild/ 184 | -------------------------------------------------------------------------------- /Components/bsp/boards/STM32/bsp_board_defs.h: -------------------------------------------------------------------------------- 1 | /* =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= 2 | * BSP (Board Support Package) 3 | * Target : STM32F10X 4 | * "STM32F10X board" 5 | * Board definition file. 6 | * =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= 7 | */ 8 | 9 | #ifndef BSP_BOARD_DEFS_H 10 | #define BSP_BOARD_DEFS_H 11 | 12 | #define BSP_BOARD_STM32 13 | #include "mcus/bsp_stm32f10x_defs.h" 14 | #include 15 | 16 | /* ------------------------------------------------------------------------------------------------ 17 | * Clock 18 | * ------------------------------------------------------------------------------------------------ 19 | */ 20 | #include "bsp_config.h" 21 | #define __bsp_CLOCK_MHZ__ BSP_CONFIG_CLOCK_MHZ 22 | 23 | /* ------------------------------------------------------------------------------------------------ 24 | * Timer 25 | * ------------------------------------------------------------------------------------------------ 26 | */ 27 | #ifdef FREQUENCY_HOPPING 28 | #ifndef NWK_PLL 29 | #define NWK_PLL 30 | #endif 31 | #endif 32 | 33 | #if defined( NWK_PLL ) && !defined ( MRFI_TIMER_ALWAYS_ACTIVE ) 34 | #define MRFI_TIMER_ALWAYS_ACTIVE 35 | #endif 36 | 37 | #ifdef MRFI_TIMER_ALWAYS_ACTIVE 38 | 39 | #define BSP_TIMER_A3 0x4133 // 'A' and '3' characters in hex 40 | #define BSP_TIMER_B7 0x4237 // 'B' and '7' characters in hex 41 | 42 | #ifndef BSP_TIMER_USED 43 | #define BSP_TIMER_USED BSP_TIMER_A3 44 | #else // if BSP_TIMER_USED was user defined 45 | #if BSP_TIMER_USED != BSP_TIMER_A3 && BSP_TIMER_USED != BSP_TIMER_B7 46 | #error "ERROR: The selected timer is invalid, must be BSP_TIMER_A3 or BSP_TIMER_B7." 47 | #endif 48 | #endif 49 | 50 | #define BSP_MAX_MODULATION_MAGNITUDE ( BSP_TIMER_CLK_KHZ * 10 / 100 ) // ten percent 51 | 52 | #define BSP_TIMER_PRESCALE_VALUE 0 53 | #define BSP_TIMER_PRESCALE_DIVISOR ( 1 << ( ( BSP_TIMER_PRESCALE_VALUE * 2 )\ 54 | + ( ( BSP_TIMER_PRESCALE_VALUE == 0 ) ? 0 : 1 ) ) ) 55 | // #define BSP_TIMER_CLK_KHZ ((BSP_CLOCK_MHZ * 2000L / BSP_TIMER_PRESCALE_DIVISOR + 1)/2) 56 | // #define BSP_TIMER_CLK_KHZ 6500 57 | 58 | #ifndef BSP_CONFIG_CLOCK_KHZ 59 | #define BSP_TIMER_CLK_KHZ ((BSP_CLOCK_MHZ * 2000L / BSP_TIMER_PRESCALE_DIVISOR + 1) / 2) 60 | #else 61 | #define BSP_TIMER_CLK_KHZ ((BSP_CONFIG_CLOCK_KHZ * 2L / BSP_TIMER_PRESCALE_DIVISOR + 1) / 2) 62 | #endif 63 | 64 | // #define BSP_CALC_LIMIT( ticks ) 65 | // #define BSP_ROLLOVER_LIMIT BSP_CALC_LIMIT( BSP_TIMER_CLK_KHZ ) 66 | // #define BSP_TIMER_FREE_RUN_INIT( ) 67 | // #define BSP_TIMER_CHECK_OVERFLOW_FLAG( ) 68 | // #define BSP_TIMER_CLEAR_OVERFLOW_FLAG( ) /* the event is cleared automatically */ 69 | // #define BSP_TIMER_MAN_CLEAR_OVERFLOW_FLAG( ) 70 | // #define BSP_TIMER_GET_TIMER_COUNT_VALUE_LO( ) 71 | // #define BSP_TIMER_GET_TIMER_COUNT_VALUE_HI( ) 72 | // #define BSP_TIMER_GET_TIMER_COUNT( p ) 73 | // #define BSP_TIMER_SET_OVERFLOW_VALUE( val ) 74 | 75 | #endif // MRFI_TIMER_ALWAYS_ACTIVE 76 | 77 | /* ------------------------------------------------------------------------------------------------ 78 | * Board Initialization 79 | * ------------------------------------------------------------------------------------------------ 80 | */ 81 | #define BSP_BOARD_C "bsp_board.c" 82 | #define BSP_INIT_BOARD() BSP_InitBoard() 83 | #define BSP_DELAY_USECS(x) BSP_Delay(x) 84 | 85 | void BSP_InitBoard(void); 86 | void BSP_Delay(uint16_t usec); 87 | 88 | void BSP_InitUSART(USART_TypeDef * port, uint32_t speed); 89 | void BSP_SendUSART(USART_TypeDef * port, uint8_t data); 90 | uint8_t BSP_RecvUSART(USART_TypeDef * port); 91 | 92 | void BSP_InitSPI(SPI_TypeDef * port); 93 | 94 | #ifdef BSP_DEBUG_PORT 95 | 96 | #if defined ( __GNUC__ ) 97 | /* With GCC/RAISONANCE, small printf (option LD Linker->Libraries->Small printf set to 'Yes') calls __io_putchar() */ 98 | #define PUTCHAR_PROTOTYPE int __io_putchar(int ch) 99 | #elif defined ( __CC_ARM ) 100 | #define PUTCHAR_PROTOTYPE int fputc(int ch, FILE *f) 101 | #else 102 | #define PUTCHAR_PROTOTYPE int putchar(int ch) 103 | #endif /* __GNUC__ */ 104 | 105 | char __bsp_debug(char data); 106 | void __bsp_debug_msg(const char * m); 107 | void __bsp_debug_msg_ln(const char * m); 108 | void __bsp_debug_dec(int num); 109 | void __bsp_debug_hex(uint8_t num); 110 | void __bsp_debug_hex_ln(uint8_t num); 111 | 112 | #define DEBUG(m) __bsp_debug_msg(m) 113 | #define DEBUG_LN(m) __bsp_debug_msg_ln(m) 114 | #define DEBUG_PRINT(m...) printf(m) 115 | #define DEBUG_DEC(n) __bsp_debug_dec(n) 116 | #define DEBUG_HEX(n) __bsp_debug_hex(n) 117 | #define DEBUG_HEX_LN(n) __bsp_debug_hex_ln(n) 118 | 119 | #else 120 | 121 | #define DEBUG(m) 122 | #define DEBUG_LN(m) 123 | #define DEBUG_PRINT(m...) 124 | #define DEBUG_CLEAR() 125 | 126 | #endif 127 | 128 | void __bsp_ASSERT(const char * file_name, int line, const char * func_name); 129 | #define BSP_ASSERT_HANDLER() __bsp_ASSERT(__FILE__, __LINE__, __func__) 130 | 131 | #endif 132 | -------------------------------------------------------------------------------- /Components/bsp/boards/STM32/bsp_button_defs.h: -------------------------------------------------------------------------------- 1 | /* =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= 2 | * BSP (Board Support Package) 3 | * Target : STM32 4 | * "STM32 Board" 5 | * Button definition file. 6 | * =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= 7 | */ 8 | 9 | #ifndef BSP_BUTTON_DEFS_H 10 | #define BSP_BUTTON_DEFS_H 11 | 12 | #include "bsp_board_defs.h" 13 | #include "bsp_macros.h" 14 | 15 | #define __bsp_NUM_BUTTONS__ 1 16 | #define __bsp_BUTTON_DEBOUNCE_WAIT__(expr) st( int i; for(i = 0; i < 500; i++) { if (!(expr)) i = 0; } ) 17 | 18 | #ifdef MapleRET6 19 | /* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 20 | * BUTTON #1 21 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 22 | * Description : Push Button 23 | * Polarity : Active High 24 | * GPIO : PC9 25 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 26 | */ 27 | #define __bsp_BUTTON1_PIN__ PC9 28 | #define __bsp_BUTTON1_BIT__ (__bsp_BUTTON1_PIN__ & 0x0F) 29 | #define __bsp_BUTTON1_PORT__ GPIOC->IDR 30 | #define __bsp_BUTTON1_DDR__ 31 | #define __bsp_BUTTON1_MODE__ ((uint32_t)GPIO_Mode_IN_FLOATING) 32 | #define __bsp_BUTTON1_IS_ACTIVE_LOW__ 0 33 | #endif 34 | 35 | #ifdef STM32VLDISCOVERY 36 | /* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 37 | * BUTTON #1 38 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 39 | * Description : Push Button 40 | * Polarity : Active Low 41 | * GPIO : PA0 42 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 43 | */ 44 | #define __bsp_BUTTON1_PIN__ PA0 45 | #define __bsp_BUTTON1_BIT__ (__bsp_BUTTON1_PIN__ & 0x0F) 46 | #define __bsp_BUTTON1_PORT__ GPIOA->IDR 47 | #define __bsp_BUTTON1_DDR__ 48 | #define __bsp_BUTTON1_MODE__ ((uint32_t)GPIO_Mode_IN_FLOATING) 49 | #define __bsp_BUTTON1_IS_ACTIVE_LOW__ 0 50 | #endif 51 | /* ------------------------------------------------------------------------------------------------ 52 | * Include Generic Button Macros 53 | * ------------------------------------------------------------------------------------------------ 54 | */ 55 | #include "code/bsp_generic_buttons.h" 56 | 57 | #undef __bsp_BUTTON1_CONFIG__ 58 | #define __bsp_BUTTON1_CONFIG__() __bsp_PIN_CONFIG__ ( __bsp_BUTTON1_PIN__, __bsp_BUTTON1_MODE__ ) 59 | 60 | #endif 61 | -------------------------------------------------------------------------------- /Components/bsp/boards/STM32/bsp_config.h: -------------------------------------------------------------------------------- 1 | /* =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= 2 | * BSP (Board Support Package) 3 | * Target : STM32 4 | * "STM32 board" 5 | * Board configuration file. 6 | * =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= 7 | */ 8 | 9 | #ifndef BSP_CONFIG_H 10 | #define BSP_CONFIG_H 11 | 12 | #define DEBUG_SPI 13 | 14 | #define BSP_DEBUG_PORT USART2 15 | #define BSP_DEBUG_SPEED 115200 16 | #define BSP_DEBUG_TX_PIN PA2 17 | #define BSP_DEBUG_RX_PIN PA3 18 | 19 | #include "Configuration/smpl_nwk_config.h" 20 | 21 | #if defined ( CFG_ACCESS_POINT ) 22 | #include "Configuration/Access_Point/smpl_config.h" 23 | 24 | #elif defined ( CFG_CHANNEL_SNIFFER ) 25 | #include "Configuration/Channel_Sniffer/smpl_config.h" 26 | 27 | #elif defined ( CFG_END_DEVICE ) 28 | #include "Configuration/End_Device/smpl_config.h" 29 | 30 | #elif defined ( CFG_RANGE_EXTENDER ) 31 | #include "Configuration/Range_Extender/smpl_config.h" 32 | 33 | #else 34 | #error "Configuration not define" 35 | #endif 36 | 37 | #endif 38 | -------------------------------------------------------------------------------- /Components/bsp/boards/STM32/bsp_driver_defs.h: -------------------------------------------------------------------------------- 1 | /* =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= 2 | * BSP (Board Support Package) 3 | * Target : STM32 4 | * "STM32 Board" 5 | * Driver definition file. 6 | * =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= 7 | */ 8 | 9 | #ifndef BSP_DRIVER_DEFS_H 10 | #define BSP_DRIVER_DEFS_H 11 | 12 | /* ------------------------------------------------------------------------------------------------ 13 | * Driver Initialization 14 | * ------------------------------------------------------------------------------------------------ 15 | */ 16 | #define BSP_DRIVERS_C "bsp_drivers.c" 17 | #define BSP_INIT_DRIVERS() BSP_InitDrivers() 18 | 19 | void BSP_InitDrivers(void); 20 | 21 | #endif 22 | -------------------------------------------------------------------------------- /Components/bsp/boards/STM32/bsp_drivers.c: -------------------------------------------------------------------------------- 1 | /* =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= 2 | * BSP (Board Support Package) 3 | * Target : STM32 4 | * "STM32 Board" 5 | * Top-level driver file. 6 | * =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= 7 | */ 8 | 9 | /* ------------------------------------------------------------------------------------------------ 10 | * Includes 11 | * ------------------------------------------------------------------------------------------------ 12 | */ 13 | #include "bsp_driver_defs.h" 14 | #include "bsp_leds.h" 15 | #include "bsp_buttons.h" 16 | #include "bsp_config.h" 17 | 18 | /************************************************************************************************** 19 | * @fn BSP_InitDrivers 20 | * 21 | * @brief Initialize all enabled BSP drivers. 22 | * 23 | * @param none 24 | * 25 | * @return none 26 | ************************************************************************************************** 27 | */ 28 | void BSP_InitDrivers(void) 29 | { 30 | #if (!defined BSP_NO_LEDS) 31 | BSP_InitLeds(); 32 | #endif 33 | 34 | #if (!defined BSP_NO_BUTTONS) 35 | BSP_InitButtons(); 36 | #endif 37 | 38 | } 39 | 40 | /* ================================================================================================ 41 | * C Code Includes 42 | * ================================================================================================ 43 | */ 44 | #ifndef BSP_NO_LEDS 45 | #include "drivers/code/bsp_leds.c" 46 | #endif 47 | 48 | #ifndef BSP_NO_BUTTONS 49 | #include "drivers/code/bsp_buttons.c" 50 | #endif 51 | 52 | 53 | /************************************************************************************************** 54 | */ 55 | 56 | 57 | 58 | -------------------------------------------------------------------------------- /Components/bsp/boards/STM32/bsp_external/mrfi_board.c: -------------------------------------------------------------------------------- 1 | /* ~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~= 2 | * MRFI (Minimal RF Interface) 3 | * Board code file. 4 | * Target : STM32 5 | * "STM32 Board" 6 | * Radios : CC1100, CC1101, CC2500 7 | * ~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~= 8 | */ 9 | #include "bsp.h" 10 | #include "mrfi_board_defs.h" 11 | #include "nwk_types.h" 12 | #include "nwk_api.h" 13 | 14 | /* ------------------------------------------------------------------------------------------------ 15 | * External Prototypes 16 | * ------------------------------------------------------------------------------------------------ 17 | */ 18 | extern void MRFI_GpioIsr(void); 19 | uint8_t mrfi_ignore_interrupt = 0; 20 | 21 | /************************************************************************************************** 22 | * @fn GDO0 Interrupt handler 23 | ************************************************************************************************** 24 | */ 25 | BSP_ISR_FUNCTION( MRFI_GDO0_INT_HANDLER, MRFI_GDO0_INT_VECTOR ) 26 | { 27 | if (mrfi_ignore_interrupt) 28 | { 29 | if (MRFI_SYNC_PIN_INT_IS_ENABLED() && MRFI_SYNC_PIN_INT_FLAG_IS_SET()) 30 | { 31 | MRFI_CLEAR_SYNC_PIN_INT_FLAG(); 32 | MRFI_GDO0_INT_DISABLE(); 33 | mrfi_ignore_interrupt = 0; 34 | } 35 | } 36 | else 37 | { 38 | /* This ISR is easily replaced. The new ISR must simply 39 | * include the following function call. 40 | */ 41 | DEBUG_LN("-- INT --"); 42 | MRFI_GpioIsr(); 43 | } 44 | } 45 | 46 | /************************************************************************************************** 47 | * @fn Set CS to high 48 | */ 49 | void MRFI_SPI_DRIVE_CSN_HIGH(void) 50 | { 51 | __mrfi_SPI_CSN_GPIO_PORT__->BSRR = BV(__mrfi_SPI_CSN_GPIO_BIT__); 52 | } 53 | 54 | /************************************************************************************************** 55 | * @fn Set CS to low 56 | */ 57 | void MRFI_SPI_DRIVE_CSN_LOW(void) 58 | { 59 | __mrfi_SPI_CSN_GPIO_PORT__->BRR = BV(__mrfi_SPI_CSN_GPIO_BIT__); 60 | } 61 | 62 | /************************************************************************************************** 63 | * @fn Read CS state 64 | */ 65 | uint16_t MRFI_SPI_CSN_IS_HIGH(void) 66 | { 67 | return (__mrfi_SPI_CSN_GPIO_PORT__->ODR & BV(__mrfi_SPI_CSN_GPIO_BIT__)); 68 | } 69 | 70 | /************************************************************************************************** 71 | * @fn Read data from SPI 72 | */ 73 | uint8_t __mrfi_SPI_READ_BYTE(void) 74 | { 75 | // Wait for data ready 76 | while (!(__mrfi_SPI_PORT__->SR & SPI_I2S_FLAG_RXNE)); 77 | return (uint8_t)(__mrfi_SPI_PORT__->DR); 78 | } 79 | 80 | /************************************************************************************************** 81 | * @fn Send data to SPI 82 | */ 83 | void __mrfi_SPI_WRITE_BYTE(uint8_t data) 84 | { 85 | // Check for data available from previous operation 86 | while (__mrfi_SPI_PORT__->SR & SPI_I2S_FLAG_RXNE) 87 | __mrfi_SPI_PORT__->DR; 88 | // Check for transmitte buffer empty 89 | while (!(__mrfi_SPI_PORT__->SR & SPI_I2S_FLAG_TXE)); 90 | __mrfi_SPI_PORT__->DR = data; 91 | } 92 | 93 | /* 94 | * @fn Check for SPI initialized 95 | */ 96 | uint8_t __mrfi_SPI_IS_INITIALIZED(void) 97 | { 98 | return (__mrfi_SPI_PORT__->CR1 & SPI_CR1_SPE) ? 1 : 0; 99 | } 100 | 101 | /* 102 | * @fn Wait for SPI complete operation (not a BUSY) 103 | */ 104 | void __mrfi_SPI_WAIT_DONE(void) 105 | { 106 | while (__mrfi_SPI_PORT__->SR & SPI_I2S_FLAG_BSY); 107 | } 108 | 109 | /* 110 | * @fn Wait for SPI complete operation (not a BUSY) 111 | */ 112 | void __mrfi_GDO0_INIT(void) 113 | { 114 | EXTI_InitTypeDef EXTI_InitStructure; 115 | NVIC_InitTypeDef NVIC_InitStructure; 116 | 117 | RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE); 118 | 119 | /* Set Falling edge */ 120 | /* Connect EXTI7 Line to PB7 pin */ 121 | GPIO_EXTILineConfig(__mrfi_GDO0_EXTI_PORT, __mrfi_GDO0_EXTI_PIN); 122 | 123 | /* Configure EXTI7 line */ 124 | EXTI_InitStructure.EXTI_Line = __mrfi_GDO0_EXTI_LINE; 125 | EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt; 126 | EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling; 127 | EXTI_InitStructure.EXTI_LineCmd = ENABLE; 128 | EXTI_Init(&EXTI_InitStructure); 129 | MRFI_GDO0_INT_DISABLE(); 130 | 131 | /* Enable and set EXTI9_5 Interrupt to highest priority */ 132 | NVIC_InitStructure.NVIC_IRQChannel = EXTI9_5_IRQn; 133 | NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x0; 134 | NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x1; 135 | NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; 136 | NVIC_Init(&NVIC_InitStructure); 137 | } 138 | 139 | /************************************************************************************************** 140 | * @fn createRandomAddress 141 | ************************************************************************************************** 142 | */ 143 | void createRandomAddress(addr_t * lAddr) 144 | { 145 | uint16_t * id = (uint16_t *)0x1FFFF7E8; 146 | uint16_t unique_id; 147 | 148 | RCC_AHBPeriphClockCmd(RCC_AHBPeriph_CRC, ENABLE); 149 | 150 | CRC_ResetDR(); 151 | CRC_CalcCRC(*id++); 152 | CRC_CalcCRC(*id++); 153 | CRC_CalcCRC(*id++); 154 | CRC_CalcCRC(*id++); 155 | CRC_CalcCRC(*id++); 156 | CRC_CalcCRC(*id++); 157 | unique_id = (uint16_t)CRC_GetCRC(); 158 | 159 | RCC_AHBPeriphClockCmd(RCC_AHBPeriph_CRC, DISABLE); 160 | 161 | SMPL_Ioctl(IOCTL_OBJ_ADDR, IOCTL_ACT_GET, lAddr); 162 | lAddr->addr[NET_ADDR_SIZE - 1] = (unique_id & 0x00FF); 163 | lAddr->addr[NET_ADDR_SIZE - 2] = (unique_id & 0xFF00) >> 8; 164 | } 165 | -------------------------------------------------------------------------------- /Components/bsp/boards/STM32/bsp_external/mrfi_board_defs.h: -------------------------------------------------------------------------------- 1 | /* ~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~= 2 | * MRFI (Minimal RF Interface) 3 | * Board definition file. 4 | * Target : STM32 5 | * "STM32 Board" 6 | * Radios : CC2500, CC1100, CC1101 7 | * ~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~=~= 8 | */ 9 | 10 | #ifndef MRFI_BOARD_DEFS_H 11 | #define MRFI_BOARD_DEFS_H 12 | 13 | /* ------------------------------------------------------------------------------------------------ 14 | * Includes 15 | * ------------------------------------------------------------------------------------------------ 16 | */ 17 | #include "bsp.h" 18 | #include "pp_utils.h" 19 | #include "bsp_config.h" 20 | #include "bsp_driver_defs.h" 21 | #include "nwk_types.h" 22 | 23 | /* ------------------------------------------------------------------------------------------------ 24 | * Radio Selection 25 | * ------------------------------------------------------------------------------------------------ 26 | */ 27 | #if (!defined MRFI_CC1100) && \ 28 | (!defined MRFI_CC1101) && \ 29 | (!defined MRFI_CC110L) && \ 30 | (!defined MRFI_CC1100E_470) && \ 31 | (!defined MRFI_CC1100E_950) && \ 32 | (!defined MRFI_CC2500) && \ 33 | (!defined MRFI_CC2420) 34 | #error "ERROR: A compatible radio must be specified for the STM32 board." 35 | #endif 36 | 37 | void createRandomAddress(addr_t * lAddr); 38 | 39 | /* ------------------------------------------------------------------------------------------------ 40 | * GDO0 Pin Configuration 41 | * ------------------------------------------------------------------------------------------------ 42 | */ 43 | 44 | #define __mrfi_GDO0_PIN__ PB7 45 | #define __mrfi_GDO0_PORT__ GPIOB 46 | #define __mrfi_GDO0_BIT__ (__mrfi_GDO0_PIN__ & 0xF) 47 | #define __mrfi_GDO0_DDR__ 48 | #define __mrfi_GDO0_EXTI_LINE EXTI_Line7 49 | #define __mrfi_GDO0_EXTI_PIN GPIO_PinSource7 50 | #define __mrfi_GDO0_EXTI_PORT GPIO_PortSourceGPIOB 51 | 52 | #define MRFI_CONFIG_GDO0_PIN_AS_INPUT() __bsp_PIN_CONFIG__ ( __mrfi_GDO0_PIN__, PIN_MODE_IN ) 53 | #define MRFI_GDO0_PIN_IS_HIGH() (__mrfi_GDO0_PORT__->IDR & BV(__mrfi_GDO0_BIT__) ? 1: 0) 54 | #define MRFI_GDO0_PIN_IS_LOW() (__mrfi_GDO0_PORT__->IDR & BV(__mrfi_GDO0_BIT__) ? 0: 1) 55 | 56 | #define MRFI_GDO0_INT_VECTOR EXTI9_5_IRQHandler 57 | #define MRFI_GDO0_INT_HANDLER EXTI9_5_IRQHandler 58 | 59 | #define MRFI_GDO0_INT_DISABLE() EXTI->IMR &= ~__mrfi_GDO0_EXTI_LINE 60 | #define MRFI_GDO0_INT_ENABLE() EXTI->IMR |= __mrfi_GDO0_EXTI_LINE 61 | #define MRFI_GDO0_SYNC_INT_ENABLE(s) if (s != true) MRFI_GDO0_INT_ENABLE() 62 | #define MRFI_GDO0_SYNC_INT_DISABLE(s) if (s != true) MRFI_GDO0_INT_DISABLE() 63 | 64 | #define MRFI_GDO0_INT_IS_ENABLED() (EXTI->IMR & __mrfi_GDO0_EXTI_LINE) 65 | 66 | #define MRFI_CLEAR_GDO0_INT_FLAG() EXTI->PR = __mrfi_GDO0_EXTI_LINE 67 | #define MRFI_GDO0_INT_FLAG_IS_SET() (EXTI->PR & __mrfi_GDO0_EXTI_LINE) 68 | 69 | void __mrfi_GDO0_INIT(void); 70 | #define MRFI_CONFIG_GDO0_FALLING_EDGE_INT() __mrfi_GDO0_INIT() 71 | 72 | /* ------------------------------------------------------------------------------------------------ 73 | * SPI Configuration 74 | * ------------------------------------------------------------------------------------------------ 75 | */ 76 | #define __mrfi_SPI_PORT__ SPI1 77 | 78 | /* CSn Pin Configuration */ 79 | void MRFI_SPI_DRIVE_CSN_HIGH(void); 80 | void MRFI_SPI_DRIVE_CSN_LOW(void); 81 | uint16_t MRFI_SPI_CSN_IS_HIGH(void); 82 | 83 | #define __mrfi_SPI_CSN_PIN__ PA4 84 | #define __mrfi_SPI_CSN_GPIO_BIT__ ( __mrfi_SPI_CSN_PIN__ & 0x0F ) 85 | #define __mrfi_SPI_CSN_GPIO_PORT__ GPIOA 86 | #define __mrfi_SPI_CSN_GPIO_DDR__ 87 | #define MRFI_SPI_CONFIG_CSN_PIN_AS_OUTPUT() MRFI_SPI_DRIVE_CSN_HIGH(); \ 88 | __bsp_PIN_CONFIG__ ( __mrfi_SPI_CSN_PIN__, PIN_MODE_OUT_PP_50 ) 89 | 90 | /* SCLK Pin Configuration */ 91 | #define __mrfi_SPI_SCLK_PIN__ PA5 92 | #define __mrfi_SPI_SCLK_GPIO_PORT__ GPIOA 93 | #define __mrfi_SPI_SCLK_GPIO_BIT__ ( __mrfi_SPI_SCLK_PIN__ & 0x0F ) 94 | #define __mrfi_SPI_SCLK_GPIO_DDR__ 95 | #define MRFI_SPI_CONFIG_SCLK_PIN_AS_OUTPUT() __bsp_PIN_CONFIG__ ( __mrfi_SPI_SCLK_PIN__, PIN_MODE_AF_50 ) 96 | 97 | /* SO Pin Configuration */ 98 | #define __mrfi_SPI_SO_PIN__ PA6 99 | #define __mrfi_SPI_SO_GPIO_PORT__ GPIOA 100 | #define __mrfi_SPI_SO_GPIO_BIT__ ( __mrfi_SPI_SO_PIN__ & 0x0F ) 101 | #define __mrfi_SPI_SO_GPIO_DDR__ 102 | #define MRFI_SPI_CONFIG_SO_PIN_AS_INPUT() __bsp_PIN_CONFIG__ ( __mrfi_SPI_SO_PIN__, PIN_MODE_IN ) 103 | #define MRFI_SPI_SO_IS_HIGH() ( __bsp_PIN_IN__ ( __mrfi_SPI_SO_PIN__ )) 104 | 105 | /* SI Pin Configuration */ 106 | #define __mrfi_SPI_SI_PIN__ PA7 107 | #define __mrfi_SPI_SI_GPIO_PORT__ GPIOA 108 | #define __mrfi_SPI_SI_GPIO_BIT__ ( __mrfi_SPI_SI_PIN__ & 0x0F ) 109 | #define __mrfi_SPI_SI_GPIO_DDR__ 110 | #define MRFI_SPI_CONFIG_SI_PIN_AS_OUTPUT() __bsp_PIN_CONFIG__ ( __mrfi_SPI_SI_PIN__, PIN_MODE_AF_50 ) 111 | 112 | /* read/write macros */ 113 | uint8_t __mrfi_SPI_READ_BYTE(void); 114 | void __mrfi_SPI_WRITE_BYTE(uint8_t data); 115 | void __mrfi_SPI_WAIT_DONE(void); 116 | uint8_t __mrfi_SPI_IS_INITIALIZED(void); 117 | 118 | #define MRFI_SPI_WRITE_BYTE(x) __mrfi_SPI_WRITE_BYTE(x) 119 | #define MRFI_SPI_READ_BYTE() __mrfi_SPI_READ_BYTE() 120 | #define MRFI_SPI_WAIT_DONE() __mrfi_SPI_WAIT_DONE() 121 | #define MRFI_SPI_IS_INITIALIZED() __mrfi_SPI_IS_INITIALIZED() 122 | 123 | /* SPI critical section macros */ 124 | typedef bspIState_t mrfiSpiIState_t; 125 | #define MRFI_SPI_ENTER_CRITICAL_SECTION(x) BSP_ENTER_CRITICAL_SECTION(x) 126 | #define MRFI_SPI_EXIT_CRITICAL_SECTION(x) BSP_EXIT_CRITICAL_SECTION(x) 127 | 128 | /* 129 | * Radio SPI Specifications 130 | * ----------------------------------------------- 131 | * Max SPI Clock : 10 MHz 132 | * Data Order : MSB transmitted first 133 | * Clock Polarity : low when idle 134 | * Clock Phase : sample leading edge 135 | */ 136 | 137 | /* initialization macro */ 138 | #define MRFI_SPI_INIT() BSP_InitSPI( __mrfi_SPI_PORT__ ); 139 | 140 | /************************************************************************************************** 141 | * Compile Time Integrity Checks 142 | ************************************************************************************************** 143 | */ 144 | #ifndef BSP_BOARD_STM32 145 | #error "ERROR: Mismatch between specified board and MRFI configuration." 146 | #endif 147 | 148 | #endif 149 | -------------------------------------------------------------------------------- /Components/bsp/boards/STM32/bsp_led_defs.h: -------------------------------------------------------------------------------- 1 | /* =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= 2 | * BSP (Board Support Package) 3 | * Target : STM32 4 | * "STM32 Board" 5 | * LED definition file. 6 | * =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= 7 | */ 8 | 9 | #ifndef BSP_LED_DEFS_H 10 | #define BSP_LED_DEFS_H 11 | 12 | /* ------------------------------------------------------------------------------------------------ 13 | * Includes 14 | * ------------------------------------------------------------------------------------------------ 15 | */ 16 | #include "bsp_board_defs.h" 17 | 18 | 19 | /* ------------------------------------------------------------------------------------------------ 20 | * Configuration 21 | * ------------------------------------------------------------------------------------------------ 22 | */ 23 | #if defined(STM32VLDISCOVERY) 24 | 25 | #define __bsp_NUM_LEDS__ 2 26 | 27 | #define __bsp_LED1_PIN__ PC9 28 | #define __bsp_LED1_BIT__ (__bsp_LED1_PIN__ & 0xF) 29 | #define __bsp_LED1_PORT__ GPIOC->ODR 30 | #define __bsp_LED1_DDR__ 0 31 | #define __bsp_LED1_MODE__ ((uint32_t)GPIO_Mode_Out_PP | (uint32_t)GPIO_Speed_2MHz) 32 | #define __bsp_LED1_IS_ACTIVE_LOW__ 0 33 | 34 | #define __bsp_LED2_PIN__ PC8 35 | #define __bsp_LED2_BIT__ (__bsp_LED2_PIN__ & 0xF) 36 | #define __bsp_LED2_PORT__ GPIOC->ODR 37 | #define __bsp_LED2_DDR__ 0 38 | #define __bsp_LED2_MODE__ ((uint32_t)GPIO_Mode_Out_PP | (uint32_t)GPIO_Speed_2MHz) 39 | #define __bsp_LED2_IS_ACTIVE_LOW__ 0 40 | 41 | #else 42 | #define __bsp_NUM_LEDS__ 0 43 | #endif 44 | 45 | #define __bsp_LED_BLINK_LOOP_COUNT__ (3000ul * BSP_CONFIG_CLOCK_MHZ / 72) 46 | 47 | /* ------------------------------------------------------------------------------------------------ 48 | * Include Generic LED Macros 49 | * ------------------------------------------------------------------------------------------------ 50 | */ 51 | #include "code/bsp_generic_leds.h" 52 | 53 | #if (__bsp_NUM_LED1_DEFINES__ == 4) 54 | #undef __bsp_LED1_CONFIG__ 55 | #define __bsp_LED1_CONFIG__() __bsp_PIN_CONFIG__ ( __bsp_LED1_PIN__, __bsp_LED1_MODE__ ) 56 | #endif 57 | #if (__bsp_NUM_LED2_DEFINES__ == 4) 58 | #undef __bsp_LED2_CONFIG__ 59 | #define __bsp_LED2_CONFIG__() __bsp_PIN_CONFIG__ ( __bsp_LED2_PIN__, __bsp_LED2_MODE__ ) 60 | #endif 61 | 62 | #endif 63 | -------------------------------------------------------------------------------- /Components/bsp/boards/STM32/stm32f103RE_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x000; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | define memory mem with size = 4G; 17 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 18 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 19 | 20 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 21 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 22 | 23 | initialize by copy { readwrite }; 24 | do not initialize { section .noinit }; 25 | 26 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 27 | 28 | place in ROM_region { readonly }; 29 | place in RAM_region { readwrite, 30 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /Components/bsp/boards/STM32/stm32f10x.h: -------------------------------------------------------------------------------- 1 | #ifndef __STM32_CUSTOM_H__ 2 | #define __STM32_CUSTOM_H__ 3 | 4 | #define USE_STDPERIPH_DRIVER 5 | 6 | #if defined(MapleRET6) 7 | 8 | #define STM32F10X_HD 9 | #define BSP_CONFIG_CLOCK_MHZ 72ul 10 | #define SYSCLK_FREQ_72MHz (BSP_CONFIG_CLOCK_MHZ * 1000000ul) 11 | 12 | #elif defined(STM32VLDISCOVERY) 13 | 14 | #define STM32F10X_MD_VL 15 | #define BSP_CONFIG_CLOCK_MHZ 24ul 16 | #define SYSCLK_FREQ_24MHz (BSP_CONFIG_CLOCK_MHZ * 1000000ul) 17 | 18 | #else 19 | #error "CPU type not define." 20 | #endif 21 | 22 | #if !defined (STM32F2XX) && \ 23 | !defined (STM32F4XX) 24 | 25 | #define STM32F10X 26 | 27 | #if !defined (STM32F10X_LD) && \ 28 | !defined (STM32F10X_LD_VL) && \ 29 | !defined (STM32F10X_MD) && \ 30 | !defined (STM32F10X_MD_VL) && \ 31 | !defined (STM32F10X_HD) && \ 32 | !defined (STM32F10X_HD_VL) && \ 33 | !defined (STM32F10X_XL) && \ 34 | !defined (STM32F10X_CL) && \ 35 | !defined (STM32F2XX) && \ 36 | !defined (STM32F4XX) 37 | 38 | #define STM32F10X_HD 39 | 40 | #endif 41 | #endif 42 | 43 | #if defined ( STM32F10X ) 44 | #include "ST/STM32F10x/stm32f10x.h" 45 | 46 | #elif defined ( STM32F2XX ) 47 | #include "ST/STM32F2xx/Include/stm32f10x.h" 48 | 49 | #endif 50 | 51 | #endif 52 | -------------------------------------------------------------------------------- /Components/bsp/boards/STM32/stm32f10x_conf.h: -------------------------------------------------------------------------------- 1 | #ifndef __STM32F10x_CONF_H 2 | #define __STM32F10x_CONF_H 3 | 4 | /* Uncomment/Comment the line below to enable/disable peripheral header file inclusion */ 5 | // #include "stm32f10x_adc.h" 6 | // #include "stm32f10x_bkp.h" 7 | // #include "stm32f10x_can.h" 8 | // #include "stm32f10x_cec.h" 9 | #include "stm32f10x_crc.h" 10 | // #include "stm32f10x_dac.h" 11 | #include "stm32f10x_dbgmcu.h" 12 | // #include "stm32f10x_dma.h" 13 | #include "stm32f10x_exti.h" 14 | // #include "stm32f10x_flash.h" 15 | // #include "stm32f10x_fsmc.h" 16 | #include "stm32f10x_gpio.h" 17 | // #include "stm32f10x_i2c.h" 18 | // #include "stm32f10x_iwdg.h" 19 | // #include "stm32f10x_pwr.h" 20 | #include "stm32f10x_rcc.h" 21 | // #include "stm32f10x_rtc.h" 22 | // #include "stm32f10x_sdio.h" 23 | #include "stm32f10x_spi.h" 24 | // #include "stm32f10x_tim.h" 25 | #include "stm32f10x_usart.h" 26 | // #include "stm32f10x_wwdg.h" 27 | #include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */ 28 | 29 | /* Uncomment the line below to expanse the "assert_param" macro in the 30 | Standard Peripheral Library drivers code */ 31 | /* #define USE_FULL_ASSERT 1 */ 32 | 33 | /* Exported macro ------------------------------------------------------------*/ 34 | #ifdef USE_FULL_ASSERT 35 | 36 | /** 37 | * @brief The assert_param macro is used for function's parameters check. 38 | * @param expr: If expr is false, it calls assert_failed function which reports 39 | * the name of the source file and the source line number of the call 40 | * that failed. If expr is true, it returns no value. 41 | * @retval None 42 | */ 43 | #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) 44 | /* Exported functions ------------------------------------------------------- */ 45 | void assert_failed(uint8_t* file, uint32_t line); 46 | #else 47 | #define assert_param(expr) ((void)0) 48 | #endif /* USE_FULL_ASSERT */ 49 | 50 | #endif /* __STM32F10x_CONF_H */ 51 | -------------------------------------------------------------------------------- /Components/bsp/boards/STM32/stm32f10x_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x000; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /Components/bsp/boards/STM32/stm32f2xx.h: -------------------------------------------------------------------------------- 1 | #ifndef __STM32F10x_CUSTOM_H__ 2 | #define __STM32F10x_CUSTOM_H__ 3 | 4 | #include "bsp_config.h" 5 | 6 | #if defined (STM32F2XX) 7 | 8 | #define STM32F10X 9 | #include "ST/STM32F10x/stm32f2xx.h" 10 | #endif 11 | 12 | #endif 13 | -------------------------------------------------------------------------------- /Components/bsp/boards/STM32/system_stm32f10x.h: -------------------------------------------------------------------------------- 1 | #ifndef __SYSTEM_STM32F10X_H 2 | #define __SYSTEM_STM32F10X_H 3 | 4 | #ifdef __cplusplus 5 | extern "C" { 6 | #endif 7 | 8 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ 9 | 10 | extern void SystemInit(void); 11 | extern void SystemCoreClockUpdate(void); 12 | 13 | #ifdef __cplusplus 14 | } 15 | #endif 16 | 17 | #endif /*__SYSTEM_STM32F10X_H */ 18 | -------------------------------------------------------------------------------- /Components/bsp/bsp.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Components/bsp/bsp.c -------------------------------------------------------------------------------- /Components/bsp/bsp.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Components/bsp/bsp.h -------------------------------------------------------------------------------- /Components/bsp/bsp_macros.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Components/bsp/bsp_macros.h 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https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Components/bsp/drivers/uart.h -------------------------------------------------------------------------------- /Components/bsp/drivers/uart_intfc.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Components/bsp/drivers/uart_intfc.h -------------------------------------------------------------------------------- /Components/bsp/drivers/uart_intfc_cc430.h: -------------------------------------------------------------------------------- 1 | #ifndef uart_intfc_cc430_h 2 | #define uart_intfc_cc430_h 3 | 4 | #include 5 | #include 6 | #include "uart_cc430.h" 7 | 8 | // call this function before using any other functions in this interface 9 | void uart_intfc_init( void ); 10 | 11 | // enqueue's the message pointed to by which is of length 12 | // and initiates its transfer across the uart. true is returned if there 13 | // was space in the fifo to send the data, false if the fifo didn't have 14 | // enough free space to enqueue the data. 15 | bool tx_send( const void* buff, size_t len ); 16 | 17 | // enqueue's the message bointed to by which is of length 18 | // and initiates its transfer across the uart. this is a blocking function 19 | // in that if the transmit fifo doesn't have enough room to enqueue the data 20 | // in its entirety it will push the data out a piece at a time as the room in 21 | // the fifo becomes available. the function returns true upon completion of 22 | // moving all the data into the fifo and false if either a null pointer or a 23 | // length of zero was passed. 24 | bool tx_send_wait( const void* buff, size_t len ); 25 | 26 | // returns the nubmer of bytes of free space in the output fifo. 27 | int tx_peek( void ); 28 | 29 | // returns the number of bytes currently available in the receive queue. 30 | int rx_peek( void ); 31 | 32 | // fills in the buffer with data from the receive queue until either 33 | // bytes have been transferred into or the receive queue 34 | // is emptied. the actual number of bytes put into is returned 35 | int rx_receive( void* buff, int max_len ); 36 | 37 | // returns true if there are characters in the receive buffer or transmit buffer 38 | // false if both buffers are empty. 39 | bool uart_busy( void ); 40 | 41 | #endif 42 | -------------------------------------------------------------------------------- /Components/bsp/drivers/uart_stm32.h: -------------------------------------------------------------------------------- 1 | #ifndef uart_h 2 | #define uart_h 3 | 4 | #include /* supports bool, true, and false */ 5 | #include /* supports NULL macro */ 6 | #include "bsp.h" 7 | 8 | /****************************************************************************** 9 | * CONSTANTS AND DEFINES 10 | */ 11 | 12 | /* ------------------------------------------------------------------------------------------------ 13 | * MACROS AND DEFINES FOR ALL 8051 VARIANTS 14 | * ------------------------------------------------------------------------------------------------ 15 | */ 16 | 17 | #if ( defined __IAR_SYSTEMS_ICC__ ) && \ 18 | ( defined __ICCARM__ ) && \ 19 | ( defined BSP_BOARD_STM32 ) 20 | 21 | #define USART_NUMBER USART2 22 | #define USART_IRQ_HANDLER USART2_IRQHandler 23 | 24 | #endif /* defined ( __IAR_SYSTEMS_ICC__ && __ICCARM__ && BSP_BOARD_STM32 ) */ 25 | 26 | /* ------------------------------------------------------------------------------------------------ 27 | * Typedefs 28 | * ------------------------------------------------------------------------------------------------ 29 | */ 30 | 31 | /* this type represents a function to call for each data character being 32 | * transmitted across the uart. it will be called at the character data rate. 33 | * the user should return true if there are still more characters to send and 34 | * false if this is the last character to send. the character to send should 35 | * be placed at the position pointed to by the passed parameter */ 36 | typedef bool ( *uart_get_tx_data_type )( unsigned char* ); 37 | 38 | /* this type represents a function to call for each data character that is 39 | * received from the uart. it will be called at the character data rate. 40 | * the character recieved is passed as the parameter to the function. 41 | * the user should return true if it is willing to accept more data, a return 42 | * value of false indicates the user is closing this message and no longer 43 | * wants to accept data from the uart. */ 44 | typedef bool ( *uart_put_rx_data_type )( unsigned char ); 45 | 46 | 47 | /* ------------------------------------------------------------------------------------------------ 48 | * Function Prototypes 49 | * ------------------------------------------------------------------------------------------------ 50 | */ 51 | 52 | /* initializes the uart for operation. this function should be called before 53 | * any other uart functions are called. */ 54 | void uart_init( void ); 55 | 56 | /* attempts to begin a uart transmission. if is NULL or there is 57 | * currently another message being sent, false is returned. otherwise, true 58 | * is returned indicating the message will be sent immediately. 59 | * the handler passed must be able to respond to character by character 60 | * requests from the isr. see the description of uart_get_tx_data_type above 61 | * for more details. */ 62 | bool uart_tx_message( uart_get_tx_data_type handler ); 63 | 64 | /* attempts to begin a uart reception. if is NULL or there is 65 | * currently another message being received, false is returned. otherwise, 66 | * true is returned indicating the handler has been accepted for any new 67 | * data received. the handler passed must be able to respond to character by 68 | * character requests from the isr. see the description of 69 | * uart_put_rx_data_type above for more details. */ 70 | bool uart_rx_message( uart_put_rx_data_type handler ); 71 | 72 | #endif /* uart_h */ 73 | -------------------------------------------------------------------------------- /Components/bsp/mcus/bsp_8051_defs.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Components/bsp/mcus/bsp_8051_defs.h -------------------------------------------------------------------------------- /Components/bsp/mcus/bsp_msp430_defs.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Components/bsp/mcus/bsp_msp430_defs.h -------------------------------------------------------------------------------- /Components/bsp/mcus/bsp_stm32f10x_defs.h: -------------------------------------------------------------------------------- 1 | /* =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= 2 | * BSP (Board Support Package) 3 | * MCU : STM32 family 4 | * Microcontroller definition file. 5 | * =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= 6 | */ 7 | 8 | #ifndef BSP_STM32_DEFS_H 9 | #define BSP_STM32_DEFS_H 10 | 11 | /* ------------------------------------------------------------------------------------------------ 12 | * Defines 13 | * ------------------------------------------------------------------------------------------------ 14 | */ 15 | #define BSP_MCU_STM32 16 | 17 | #include "stm32f10x.h" 18 | #undef READ_BIT 19 | 20 | #define PA0 0x00 21 | #define PA1 0x01 22 | #define PA2 0x02 23 | #define PA3 0x03 24 | #define PA4 0x04 25 | #define PA5 0x05 26 | #define PA6 0x06 27 | #define PA7 0x07 28 | #define PA8 0x08 29 | #define PA9 0x09 30 | #define PA10 0x0A 31 | #define PA11 0x0B 32 | #define PA12 0x0C 33 | #define PA13 0x0D 34 | #define PA14 0x0E 35 | #define PA15 0x0F 36 | 37 | #define PB0 0x10 38 | #define PB1 0x11 39 | #define PB2 0x12 40 | #define PB3 0x13 41 | #define PB4 0x14 42 | #define PB5 0x15 43 | #define PB6 0x16 44 | #define PB7 0x17 45 | #define PB8 0x18 46 | #define PB9 0x19 47 | #define PB10 0x1A 48 | #define PB11 0x1B 49 | #define PB12 0x1C 50 | #define PB13 0x1D 51 | #define PB14 0x1E 52 | #define PB15 0x1F 53 | 54 | #define PC0 0x20 55 | #define PC1 0x21 56 | #define PC2 0x22 57 | #define PC3 0x23 58 | #define PC4 0x24 59 | #define PC5 0x25 60 | #define PC6 0x26 61 | #define PC7 0x27 62 | #define PC8 0x28 63 | #define PC9 0x29 64 | #define PC10 0x2A 65 | #define PC11 0x2B 66 | #define PC12 0x2C 67 | #define PC13 0x2D 68 | #define PC14 0x2E 69 | #define PC15 0x2F 70 | 71 | void gpioPinHigh (uint8_t pin); 72 | void gpioPinLow (uint8_t pin); 73 | uint8_t gpioPinOut (uint8_t pin); 74 | uint8_t gpioPinIn (uint8_t pin); 75 | void gpioPinConfig(uint16_t mode_pin); 76 | 77 | #define __bsp_PIN_LOW__(pin) gpioPinLow (pin) 78 | #define __bsp_PIN_HIGH__(pin) gpioPinHigh (pin) 79 | #define __bsp_PIN_OUT__(pin) gpioPinOut (pin) 80 | #define __bsp_PIN_IN__(pin) gpioPinIn (pin) 81 | #define __bsp_PIN_CONFIG__(pin,mode) gpioPinConfig ((mode << 8) | pin) 82 | 83 | #define PIN_MODE_AF_50 (((uint32_t)GPIO_Mode_AF_PP | (uint32_t)GPIO_Speed_50MHz)) 84 | #define PIN_MODE_IN ((uint32_t)GPIO_Mode_IN_FLOATING) 85 | #define PIN_MODE_OUT_PP_50 (((uint32_t)GPIO_Mode_Out_PP | (uint32_t)GPIO_Speed_50MHz)) 86 | #define PIN_MODE_OUT_PP_10 (((uint32_t)GPIO_Mode_Out_PP | (uint32_t)GPIO_Speed_10MHz)) 87 | #define PIN_MODE_OUT_PP_2 (((uint32_t)GPIO_Mode_Out_PP | (uint32_t)GPIO_Speed_2MHz)) 88 | 89 | #define PORT_PIN_SET(p,b) p->BSRR = BV(b) 90 | #define PORT_PIN_CLR(p,b) p->BRR = BV(b) 91 | #define PORT_PIN_IN(p,b) ( p->IDR & BV(b) ) 92 | #define PORT_PIN_STATE(p,b) ( p->ODR & BV(b) ) 93 | 94 | /* ------------------------------------------------------------------------------------------------ 95 | * Compiler Abstraction 96 | * ------------------------------------------------------------------------------------------------ 97 | */ 98 | 99 | #ifdef __IAR_SYSTEMS_ICC__ 100 | /* ---------------------- IAR Compiler ---------------------- */ 101 | #define BSP_COMPILER_IAR 102 | 103 | #define __bsp_ISTATE_T__ __istate_t 104 | #define __bsp_ISR_FUNCTION__(f,v) void v(void) 105 | 106 | /* Initialization call provided in IAR environment before standard C-startup */ 107 | #include 108 | __intrinsic int __low_level_init(void); 109 | #define BSP_EARLY_INIT(void) __intrinsic int __low_level_init(void) 110 | 111 | #define __bsp_QUOTED_PRAGMA__(x) _Pragma(#x) 112 | #define __bsp_GET_ISTATE__() __get_interrupt_state() 113 | #define __bsp_RESTORE_ISTATE__(x) __set_interrupt_state(x) 114 | #define __bsp_INTERRUPTS_ARE_ENABLED__() __get_interrupt_state() 115 | 116 | #elif (defined __CC_ARM ) 117 | /* ---------------------- ARM--------------------------------- */ 118 | #define BSP_COMPILER_ARM 119 | 120 | #include 121 | 122 | #define __interrupt 123 | #define __bsp_QUOTED_PRAGMA__(x) 124 | #define __bsp_ISTATE_T__ int 125 | #define __bsp_ISR_FUNCTION__(f,v) __bsp_QUOTED_PRAGMA__(vector=v) __interrupt void f(void) 126 | #define BSP_EARLY_INIT(void) int _system_pre_init(void) 127 | #define __bsp_GET_ISTATE__() __disable_irq() 128 | #define __bsp_RESTORE_ISTATE__(x) if (!x) __enable_irq(); 129 | #define __bsp_INTERRUPTS_ARE_ENABLED__() 0 130 | 131 | /* ------------------ Unrecognized Compiler ------------------ */ 132 | #else 133 | #error "ERROR: Unknown compiler." 134 | #endif 135 | 136 | #if (defined BSP_COMPILER_IAR) || (defined BSP_COMPILER_ARM) 137 | 138 | #define __bsp_ENABLE_INTERRUPTS__() __enable_irq() 139 | #define __bsp_DISABLE_INTERRUPTS__() __disable_irq() 140 | 141 | #endif 142 | 143 | /* ------------------------------------------------------------------------------------------------ 144 | * Common 145 | * ------------------------------------------------------------------------------------------------ 146 | */ 147 | #define __bsp_LITTLE_ENDIAN__ 1 148 | #define __bsp_CODE_MEMSPACE__ /* blank */ 149 | #define __bsp_XDATA_MEMSPACE__ /* blank */ 150 | 151 | #ifndef NULL 152 | #define NULL 0 153 | #endif 154 | 155 | #endif 156 | -------------------------------------------------------------------------------- /Components/mrfi/mrfi.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Components/mrfi/mrfi.c -------------------------------------------------------------------------------- /Components/mrfi/mrfi.h: -------------------------------------------------------------------------------- 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-------------------------------------------------------------------------------- 1 | /*************************************************************** 2 | * SmartRF Studio(tm) Export 3 | * 4 | * Radio register settings specifed with C-code 5 | * compatible #define statements. 6 | * 7 | ***************************************************************/ 8 | 9 | #ifndef SMARTRF_CC1100_H 10 | #define SMARTRF_CC1100_H 11 | 12 | #define SMARTRF_RADIO_CC1100 13 | 14 | #define SMARTRF_SETTING_FSCTRL1 0x0A 15 | #define SMARTRF_SETTING_FSCTRL0 0x00 16 | #define SMARTRF_SETTING_FREQ2 0x22 17 | #define SMARTRF_SETTING_FREQ1 0xB1 18 | #define SMARTRF_SETTING_FREQ0 0x3B 19 | #define SMARTRF_SETTING_MDMCFG4 0x2D 20 | #define SMARTRF_SETTING_MDMCFG3 0x3B 21 | #define SMARTRF_SETTING_MDMCFG2 0x13 22 | #define SMARTRF_SETTING_MDMCFG1 0x22 23 | #define SMARTRF_SETTING_MDMCFG0 0xF8 24 | #define SMARTRF_SETTING_CHANNR 0x14 25 | #define SMARTRF_SETTING_DEVIATN 0x62 26 | #define SMARTRF_SETTING_FREND1 0xB6 27 | #define SMARTRF_SETTING_FREND0 0x10 28 | #define SMARTRF_SETTING_MCSM0 0x18 29 | #define SMARTRF_SETTING_FOCCFG 0x1D 30 | #define SMARTRF_SETTING_BSCFG 0x1C 31 | #define SMARTRF_SETTING_AGCCTRL2 0xC7 32 | #define SMARTRF_SETTING_AGCCTRL1 0x00 33 | #define SMARTRF_SETTING_AGCCTRL0 0xB0 34 | #define SMARTRF_SETTING_FSCAL3 0xEA 35 | #define SMARTRF_SETTING_FSCAL2 0x2A 36 | #define SMARTRF_SETTING_FSCAL1 0x00 37 | #define SMARTRF_SETTING_FSCAL0 0x1F 38 | #define SMARTRF_SETTING_FSTEST 0x59 39 | #define SMARTRF_SETTING_TEST2 0x88 40 | #define SMARTRF_SETTING_TEST1 0x31 41 | #define SMARTRF_SETTING_TEST0 0x09 42 | #define SMARTRF_SETTING_FIFOTHR 0x07 43 | #define SMARTRF_SETTING_IOCFG2 0x29 44 | #define SMARTRF_SETTING_IOCFG0D 0x06 45 | #define SMARTRF_SETTING_PKTCTRL1 0x04 46 | #define SMARTRF_SETTING_PKTCTRL0 0x05 47 | #define SMARTRF_SETTING_ADDR 0x00 48 | #define SMARTRF_SETTING_PKTLEN 0xFF 49 | 50 | #endif 51 | 52 | -------------------------------------------------------------------------------- /Components/mrfi/smartrf/CC1100E/470/rfstudio.srfs1102: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Components/mrfi/smartrf/CC1100E/470/rfstudio.srfs1102 -------------------------------------------------------------------------------- /Components/mrfi/smartrf/CC1100E/470/smartrf_CC1100E.h: -------------------------------------------------------------------------------- 1 | /*************************************************************** 2 | * SmartRF Studio(tm) Export 3 | * 4 | * Radio register settings specifed with C-code 5 | * compatible #define statements. 6 | * 7 | ***************************************************************/ 8 | 9 | #ifndef SMARTRF_CC1100E_H 10 | #define SMARTRF_CC1100E_H 11 | 12 | #define SMARTRF_RADIO_CC1100E 13 | 14 | #define SMARTRF_SETTING_FSCTRL1 0x0C 15 | #define SMARTRF_SETTING_FSCTRL0 0x00 16 | #define SMARTRF_SETTING_FREQ2 0x12 17 | #define SMARTRF_SETTING_FREQ1 0x76 18 | #define SMARTRF_SETTING_FREQ0 0x27 19 | #define SMARTRF_SETTING_MDMCFG4 0x2D 20 | #define SMARTRF_SETTING_MDMCFG3 0x3B 21 | #define SMARTRF_SETTING_MDMCFG2 0x13 22 | #define SMARTRF_SETTING_MDMCFG1 0x22 23 | #define SMARTRF_SETTING_MDMCFG0 0xF8 24 | #define SMARTRF_SETTING_CHANNR 0x00 25 | #define SMARTRF_SETTING_DEVIATN 0x62 26 | #define SMARTRF_SETTING_FREND1 0xB6 27 | #define SMARTRF_SETTING_FREND0 0x10 28 | #define SMARTRF_SETTING_MCSM0 0x18 29 | #define SMARTRF_SETTING_FOCCFG 0x1D 30 | #define SMARTRF_SETTING_BSCFG 0x1C 31 | #define SMARTRF_SETTING_AGCCTRL2 0xC7 32 | #define SMARTRF_SETTING_AGCCTRL1 0x00 33 | #define SMARTRF_SETTING_AGCCTRL0 0xB0 34 | #define SMARTRF_SETTING_FSCAL3 0xEA 35 | #define SMARTRF_SETTING_FSCAL2 0x0A 36 | #define SMARTRF_SETTING_FSCAL1 0x00 37 | #define SMARTRF_SETTING_FSCAL0 0x1F 38 | #define SMARTRF_SETTING_FSTEST 0x59 39 | #define SMARTRF_SETTING_TEST2 0x88 40 | #define SMARTRF_SETTING_TEST1 0x31 41 | #define SMARTRF_SETTING_TEST0 0x09 42 | #define SMARTRF_SETTING_FIFOTHR 0x07 43 | #define SMARTRF_SETTING_IOCFG2 0x29 44 | #define SMARTRF_SETTING_IOCFG0D 0x06 45 | #define SMARTRF_SETTING_PKTCTRL1 0x04 46 | #define SMARTRF_SETTING_PKTCTRL0 0x05 47 | #define SMARTRF_SETTING_ADDR 0x00 48 | #define SMARTRF_SETTING_PKTLEN 0xFF 49 | 50 | #endif 51 | 52 | -------------------------------------------------------------------------------- /Components/mrfi/smartrf/CC1100E/950/rfstudio.srfs1102: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Components/mrfi/smartrf/CC1100E/950/rfstudio.srfs1102 -------------------------------------------------------------------------------- /Components/mrfi/smartrf/CC1100E/950/smartrf_CC1100E.h: -------------------------------------------------------------------------------- 1 | /*************************************************************** 2 | * SmartRF Studio(tm) Export 3 | * 4 | * Radio register settings specifed with C-code 5 | * compatible #define statements. 6 | * 7 | ***************************************************************/ 8 | 9 | #ifndef SMARTRF_CC1100E_H 10 | #define SMARTRF_CC1100E_H 11 | 12 | #define SMARTRF_RADIO_CC1100E 13 | 14 | #define SMARTRF_SETTING_FSCTRL1 0x0C 15 | #define SMARTRF_SETTING_FSCTRL0 0x00 16 | #define SMARTRF_SETTING_FREQ2 0x24 17 | #define SMARTRF_SETTING_FREQ1 0xBB 18 | #define SMARTRF_SETTING_FREQ0 0x13 19 | #define SMARTRF_SETTING_MDMCFG4 0x2D 20 | #define SMARTRF_SETTING_MDMCFG3 0x3B 21 | #define SMARTRF_SETTING_MDMCFG2 0x13 22 | #define SMARTRF_SETTING_MDMCFG1 0x22 23 | #define SMARTRF_SETTING_MDMCFG0 0xF8 24 | #define SMARTRF_SETTING_CHANNR 0x00 25 | #define SMARTRF_SETTING_DEVIATN 0x62 26 | #define SMARTRF_SETTING_FREND1 0xB6 27 | #define SMARTRF_SETTING_FREND0 0x10 28 | #define SMARTRF_SETTING_MCSM0 0x18 29 | #define SMARTRF_SETTING_FOCCFG 0x1D 30 | #define SMARTRF_SETTING_BSCFG 0x1C 31 | #define SMARTRF_SETTING_AGCCTRL2 0xC7 32 | #define SMARTRF_SETTING_AGCCTRL1 0x00 33 | #define SMARTRF_SETTING_AGCCTRL0 0xB0 34 | #define SMARTRF_SETTING_FSCAL3 0xAA 35 | #define SMARTRF_SETTING_FSCAL2 0x0A 36 | #define SMARTRF_SETTING_FSCAL1 0x00 37 | #define SMARTRF_SETTING_FSCAL0 0x07 38 | #define SMARTRF_SETTING_FSTEST 0x59 39 | #define SMARTRF_SETTING_TEST2 0x88 40 | #define SMARTRF_SETTING_TEST1 0x31 41 | #define SMARTRF_SETTING_TEST0 0x09 42 | #define SMARTRF_SETTING_FIFOTHR 0x07 43 | #define SMARTRF_SETTING_IOCFG2 0x29 44 | #define SMARTRF_SETTING_IOCFG0D 0x06 45 | #define SMARTRF_SETTING_PKTCTRL1 0x04 46 | #define SMARTRF_SETTING_PKTCTRL0 0x05 47 | #define SMARTRF_SETTING_ADDR 0x00 48 | #define SMARTRF_SETTING_PKTLEN 0xFF 49 | 50 | #endif 51 | 52 | -------------------------------------------------------------------------------- /Components/mrfi/smartrf/CC1101/rfstudio.srfs: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Components/mrfi/smartrf/CC1101/rfstudio.srfs -------------------------------------------------------------------------------- /Components/mrfi/smartrf/CC1101/rfstudio.srfs1101: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Components/mrfi/smartrf/CC1101/rfstudio.srfs1101 -------------------------------------------------------------------------------- /Components/mrfi/smartrf/CC1101/smartrf_CC1101.h: -------------------------------------------------------------------------------- 1 | /*************************************************************** 2 | * SmartRF Studio(tm) Export 3 | * 4 | * Radio register settings specifed with C-code 5 | * compatible #define statements. 6 | * 7 | ***************************************************************/ 8 | 9 | #ifndef SMARTRF_CC1101_H 10 | #define SMARTRF_CC1101_H 11 | 12 | #define SMARTRF_RADIO_CC1101 13 | 14 | #define SMARTRF_SETTING_FSCTRL1 0x0C 15 | #define SMARTRF_SETTING_FSCTRL0 0x00 16 | #define SMARTRF_SETTING_FREQ2 0x22 17 | #define SMARTRF_SETTING_FREQ1 0xB1 18 | #define SMARTRF_SETTING_FREQ0 0x3B 19 | #define SMARTRF_SETTING_MDMCFG4 0x2D 20 | #define SMARTRF_SETTING_MDMCFG3 0x3B 21 | #define SMARTRF_SETTING_MDMCFG2 0x13 22 | #define SMARTRF_SETTING_MDMCFG1 0x22 23 | #define SMARTRF_SETTING_MDMCFG0 0xF8 24 | #define SMARTRF_SETTING_CHANNR 0x14 25 | #define SMARTRF_SETTING_DEVIATN 0x62 26 | #define SMARTRF_SETTING_FREND1 0xB6 27 | #define SMARTRF_SETTING_FREND0 0x10 28 | #define SMARTRF_SETTING_MCSM0 0x18 29 | #define SMARTRF_SETTING_FOCCFG 0x1D 30 | #define SMARTRF_SETTING_BSCFG 0x1C 31 | #define SMARTRF_SETTING_AGCCTRL2 0xC7 32 | #define SMARTRF_SETTING_AGCCTRL1 0x00 33 | #define SMARTRF_SETTING_AGCCTRL0 0xB0 34 | #define SMARTRF_SETTING_FSCAL3 0xEA 35 | #define SMARTRF_SETTING_FSCAL2 0x2A 36 | #define SMARTRF_SETTING_FSCAL1 0x00 37 | #define SMARTRF_SETTING_FSCAL0 0x1F 38 | #define SMARTRF_SETTING_FSTEST 0x59 39 | #define SMARTRF_SETTING_TEST2 0x88 40 | #define SMARTRF_SETTING_TEST1 0x31 41 | #define SMARTRF_SETTING_TEST0 0x09 42 | #define SMARTRF_SETTING_FIFOTHR 0x07 43 | #define SMARTRF_SETTING_IOCFG2 0x29 44 | #define SMARTRF_SETTING_IOCFG0D 0x06 45 | #define SMARTRF_SETTING_PKTCTRL1 0x04 46 | #define SMARTRF_SETTING_PKTCTRL0 0x05 47 | #define SMARTRF_SETTING_ADDR 0x00 48 | #define SMARTRF_SETTING_PKTLEN 0xFF 49 | 50 | #endif 51 | 52 | -------------------------------------------------------------------------------- /Components/mrfi/smartrf/CC110L/smartrf_CC110L.h: -------------------------------------------------------------------------------- 1 | /*************************************************************** 2 | * SmartRF Studio(tm) Export 3 | * 4 | * Radio register settings specifed with C-code 5 | * compatible #define statements. 6 | * 7 | ***************************************************************/ 8 | 9 | #ifndef SMARTRF_CC110L_H 10 | #define SMARTRF_CC110L_H 11 | 12 | #define SMARTRF_RADIO_CC110L 13 | 14 | #define SMARTRF_SETTING_FSCTRL1 0x0C 15 | #define SMARTRF_SETTING_FSCTRL0 0x00 16 | 17 | //+ 18 | #define SMARTRF_SETTING_FREQ2 0x21 19 | #define SMARTRF_SETTING_FREQ1 0xE4 20 | #define SMARTRF_SETTING_FREQ0 0x02 21 | 22 | #define SMARTRF_SETTING_MDMCFG4 0x2D 23 | #define SMARTRF_SETTING_MDMCFG3 0x3B 24 | #define SMARTRF_SETTING_MDMCFG2 0x13 25 | #define SMARTRF_SETTING_MDMCFG1 0x22 26 | #define SMARTRF_SETTING_MDMCFG0 0xF8 27 | 28 | //+ 29 | #define SMARTRF_SETTING_CHANNR 0x00 30 | #define SMARTRF_SETTING_DEVIATN 0x71 31 | 32 | #define SMARTRF_SETTING_FREND1 0xB6 33 | #define SMARTRF_SETTING_FREND0 0x10 34 | #define SMARTRF_SETTING_MCSM0 0x18 35 | #define SMARTRF_SETTING_FOCCFG 0x1D 36 | #define SMARTRF_SETTING_BSCFG 0x1C 37 | #define SMARTRF_SETTING_AGCCTRL2 0xC7 38 | #define SMARTRF_SETTING_AGCCTRL1 0x00 39 | #define SMARTRF_SETTING_AGCCTRL0 0xB0 40 | #define SMARTRF_SETTING_FSCAL3 0xEA 41 | #define SMARTRF_SETTING_FSCAL2 0x2A 42 | #define SMARTRF_SETTING_FSCAL1 0x00 43 | #define SMARTRF_SETTING_FSCAL0 0x1F 44 | #define SMARTRF_SETTING_FSTEST 0x59 45 | #define SMARTRF_SETTING_TEST2 0x88 46 | #define SMARTRF_SETTING_TEST1 0x31 47 | #define SMARTRF_SETTING_TEST0 0x09 48 | #define SMARTRF_SETTING_FIFOTHR 0x07 49 | #define SMARTRF_SETTING_IOCFG2 0x29 50 | #define SMARTRF_SETTING_IOCFG0D 0x06 51 | #define SMARTRF_SETTING_PKTCTRL1 0x04 52 | #define SMARTRF_SETTING_PKTCTRL0 0x05 53 | #define SMARTRF_SETTING_ADDR 0x00 54 | #define SMARTRF_SETTING_PKTLEN 0xFF 55 | 56 | #endif 57 | -------------------------------------------------------------------------------- /Components/mrfi/smartrf/CC1110/CC1110_433MHz.srfs: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Components/mrfi/smartrf/CC1110/CC1110_433MHz.srfs -------------------------------------------------------------------------------- /Components/mrfi/smartrf/CC1110/rfstudio.srfs1110: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Components/mrfi/smartrf/CC1110/rfstudio.srfs1110 -------------------------------------------------------------------------------- /Components/mrfi/smartrf/CC1110/smartrf_CC1110.h: -------------------------------------------------------------------------------- 1 | /*************************************************************** 2 | * SmartRF Studio(tm) Export 3 | * 4 | * Radio register settings specifed with C-code 5 | * compatible #define statements. 6 | * 7 | ***************************************************************/ 8 | 9 | #ifndef SMARTRF_CC1110_H 10 | #define SMARTRF_CC1110_H 11 | 12 | #define SMARTRF_RADIO_CC1110 13 | 14 | #define SMARTRF_SETTING_FSCTRL1 0x12 15 | #define SMARTRF_SETTING_FSCTRL0 0x00 16 | #define SMARTRF_SETTING_FREQ2 0x22 17 | #define SMARTRF_SETTING_FREQ1 0xB1 18 | #define SMARTRF_SETTING_FREQ0 0x3B 19 | #define SMARTRF_SETTING_MDMCFG4 0x2D 20 | #define SMARTRF_SETTING_MDMCFG3 0x3B 21 | #define SMARTRF_SETTING_MDMCFG2 0x13 22 | #define SMARTRF_SETTING_MDMCFG1 0x22 23 | #define SMARTRF_SETTING_MDMCFG0 0xF8 24 | #define SMARTRF_SETTING_CHANNR 0x14 25 | #define SMARTRF_SETTING_DEVIATN 0x62 26 | #define SMARTRF_SETTING_FREND1 0xB6 27 | #define SMARTRF_SETTING_FREND0 0x10 28 | #define SMARTRF_SETTING_MCSM0 0x18 29 | #define SMARTRF_SETTING_FOCCFG 0x1D 30 | #define SMARTRF_SETTING_BSCFG 0x1C 31 | #define SMARTRF_SETTING_AGCCTRL2 0xC7 32 | #define SMARTRF_SETTING_AGCCTRL1 0x00 33 | #define SMARTRF_SETTING_AGCCTRL0 0xB0 34 | #define SMARTRF_SETTING_FSCAL3 0xEA 35 | #define SMARTRF_SETTING_FSCAL2 0x2A 36 | #define SMARTRF_SETTING_FSCAL1 0x00 37 | #define SMARTRF_SETTING_FSCAL0 0x1F 38 | #define SMARTRF_SETTING_TEST2 0x88 39 | #define SMARTRF_SETTING_TEST1 0x31 40 | #define SMARTRF_SETTING_TEST0 0x09 41 | #define SMARTRF_SETTING_PA_TABLE0 0x8E 42 | #define SMARTRF_SETTING_PKTCTRL1 0x04 43 | #define SMARTRF_SETTING_PKTCTRL0 0x05 44 | #define SMARTRF_SETTING_ADDR 0x00 45 | #define SMARTRF_SETTING_PKTLEN 0xFF 46 | 47 | #endif 48 | 49 | -------------------------------------------------------------------------------- /Components/mrfi/smartrf/CC1110/smartrf_CC1110.h.default: -------------------------------------------------------------------------------- 1 | /*************************************************************** 2 | * SmartRF Studio(tm) Export 3 | * 4 | * Radio register settings specifed with C-code 5 | * compatible #define statements. 6 | * 7 | ***************************************************************/ 8 | 9 | #ifndef SMARTRF_CC1110_H 10 | #define SMARTRF_CC1110_H 11 | 12 | #define SMARTRF_RADIO_CC1110 13 | 14 | #define SMARTRF_SETTING_FSCTRL1 0x12 15 | #define SMARTRF_SETTING_FSCTRL0 0x00 16 | #define SMARTRF_SETTING_FREQ2 0x22 17 | #define SMARTRF_SETTING_FREQ1 0xB1 18 | #define SMARTRF_SETTING_FREQ0 0x3B 19 | //#define SMARTRF_SETTING_FREQ2 0x22 20 | //#define SMARTRF_SETTING_FREQ1 0xCE 21 | //#define SMARTRF_SETTING_FREQ0 0xC5 22 | #define SMARTRF_SETTING_MDMCFG4 0x2D 23 | #define SMARTRF_SETTING_MDMCFG3 0x3B 24 | #define SMARTRF_SETTING_MDMCFG2 0x13 25 | #define SMARTRF_SETTING_MDMCFG1 0x22 26 | #define SMARTRF_SETTING_MDMCFG0 0xF8 27 | //#define SMARTRF_SETTING_MDMCFG1 0x21 28 | //#define SMARTRF_SETTING_MDMCFG0 0x78 29 | #define SMARTRF_SETTING_CHANNR 0x14 30 | #define SMARTRF_SETTING_DEVIATN 0x62 31 | #define SMARTRF_SETTING_FREND1 0xB6 32 | #define SMARTRF_SETTING_FREND0 0x10 33 | #define SMARTRF_SETTING_MCSM0 0x18 34 | #define SMARTRF_SETTING_FOCCFG 0x1D 35 | #define SMARTRF_SETTING_BSCFG 0x1C 36 | #define SMARTRF_SETTING_AGCCTRL2 0xC7 37 | #define SMARTRF_SETTING_AGCCTRL1 0x00 38 | #define SMARTRF_SETTING_AGCCTRL0 0xB0 39 | #define SMARTRF_SETTING_FSCAL3 0xEA 40 | #define SMARTRF_SETTING_FSCAL2 0x2A 41 | #define SMARTRF_SETTING_FSCAL1 0x00 42 | #define SMARTRF_SETTING_FSCAL0 0x1F 43 | #define SMARTRF_SETTING_TEST2 0x88 44 | #define SMARTRF_SETTING_TEST1 0x31 45 | #define SMARTRF_SETTING_TEST0 0x09 46 | #define SMARTRF_SETTING_PA_TABLE0 0x8E 47 | #define SMARTRF_SETTING_PKTCTRL1 0x04 48 | #define SMARTRF_SETTING_PKTCTRL0 0x05 49 | #define SMARTRF_SETTING_ADDR 0x00 50 | #define SMARTRF_SETTING_PKTLEN 0xFF 51 | 52 | #endif 53 | 54 | -------------------------------------------------------------------------------- /Components/mrfi/smartrf/CC1110/smartrf_CC1110.prs: -------------------------------------------------------------------------------- 1 | FSCTRL1 |0xDF07|0x12|Frequency synthesizer control. 2 | FSCTRL0 |0xDF08|0x00|Frequency synthesizer control. 3 | FREQ2 |0xDF09|0x22|Frequency control word, high byte. 4 | FREQ1 |0xDF0A|0xB1|Frequency control word, middle byte. 5 | FREQ0 |0xDF0B|0x3B|Frequency control word, low byte. 6 | MDMCFG4 |0xDF0C|0x2D|Modem configuration. 7 | MDMCFG3 |0xDF0D|0x3B|Modem configuration. 8 | MDMCFG2 |0xDF0E|0x13|Modem configuration. 9 | MDMCFG1 |0xDF0F|0x22|Modem configuration. 10 | MDMCFG0 |0xDF10|0xF8|Modem configuration. 11 | CHANNR |0xDF06|0x14|Channel number. 12 | DEVIATN |0xDF11|0x62|Modem deviation setting (when FSK modulation is enabled). 13 | FREND1 |0xDF1A|0xB6|Front end RX configuration. 14 | FREND0 |0xDF1B|0x10|Front end RX configuration. 15 | MCSM0 |0xDF14|0x18|Main Radio Control State Machine configuration. 16 | FOCCFG |0xDF15|0x1D|Frequency Offset Compensation Configuration. 17 | BSCFG |0xDF16|0x1C|Bit synchronization Configuration. 18 | AGCCTRL2 |0xDF17|0xC7|AGC control. 19 | AGCCTRL1 |0xDF18|0x00|AGC control. 20 | AGCCTRL0 |0xDF19|0xB0|AGC control. 21 | FSCAL3 |0xDF1C|0xEA|Frequency synthesizer calibration. 22 | FSCAL2 |0xDF1D|0x2A|Frequency synthesizer calibration. 23 | FSCAL1 |0xDF1E|0x00|Frequency synthesizer calibration. 24 | FSCAL0 |0xDF1F|0x1F|Frequency synthesizer calibration. 25 | TEST2 |0xDF23|0x88|Various test settings. 26 | TEST1 |0xDF24|0x31|Various test settings. 27 | TEST0 |0xDF25|0x09|Various test settings. 28 | PA_TABLE0|0xDF2E|0x8E|PA output power setting. 29 | PKTCTRL1 |0xDF03|0x04|Packet automation control. 30 | PKTCTRL0 |0xDF04|0x05|Packet automation control. 31 | ADDR |0xDF05|0x00|Device address. 32 | PKTLEN |0xDF02|0xFF|Packet length. 33 | -------------------------------------------------------------------------------- /Components/mrfi/smartrf/CC1110/smartrf_CC1110_433MHz.h: -------------------------------------------------------------------------------- 1 | /* Deviation = 9.521484 */ 2 | /* Base frequency = 433.074799 */ 3 | /* Carrier frequency = 433.074799 */ 4 | /* Channel number = 0 */ 5 | /* Carrier frequency = 433.074799 */ 6 | /* Modulated = true */ 7 | /* Modulation format = GFSK */ 8 | /* Manchester enable = false */ 9 | /* Sync word qualifier mode = 30/32 sync word bits detected */ 10 | /* Preamble count = 4 */ 11 | /* Channel spacing = 25.390625 */ 12 | /* Carrier frequency = 433.074799 */ 13 | /* Data rate = 99.9756 */ 14 | /* RX filter BW = 270.833333 */ 15 | /* = Normal mode */ 16 | /* Length config = Variable packet length mode. Packet length configured by the first byte after sync word */ 17 | /* CRC enable = true */ 18 | /* Packet length = 255 */ 19 | /* Device address = 0 */ 20 | /* Address config = No address check */ 21 | /* = false */ 22 | /* PA ramping = false */ 23 | /* TX power = 0 */ 24 | /*************************************************************** 25 | * SmartRF Studio(tm) Export 26 | * 27 | * Radio register settings specifed with C-code 28 | * compatible #define statements. 29 | * 30 | ***************************************************************/ 31 | 32 | #ifndef SMARTRF_CC1110_H 33 | #define SMARTRF_CC1110_H 34 | 35 | #define SMARTRF_RADIO_CC1110 36 | 37 | #define SMARTRF_SETTING_FSCTRL1 0x06 38 | #define SMARTRF_SETTING_FSCTRL0 0x00 39 | #define SMARTRF_SETTING_FREQ2 0x10 40 | #define SMARTRF_SETTING_FREQ1 0xA8 41 | #define SMARTRF_SETTING_FREQ0 0x1F 42 | #define SMARTRF_SETTING_MDMCFG4 0x6B 43 | #define SMARTRF_SETTING_MDMCFG3 0xF8 44 | #define SMARTRF_SETTING_MDMCFG2 0x13 45 | #define SMARTRF_SETTING_MDMCFG1 0x20 46 | #define SMARTRF_SETTING_MDMCFG0 0x00 47 | #define SMARTRF_SETTING_CHANNR 0x00 48 | #define SMARTRF_SETTING_DEVIATN 0x24 49 | #define SMARTRF_SETTING_FREND1 0x56 50 | #define SMARTRF_SETTING_FREND0 0x10 51 | #define SMARTRF_SETTING_MCSM0 0x18 52 | #define SMARTRF_SETTING_FOCCFG 0x16 53 | #define SMARTRF_SETTING_BSCFG 0x6C 54 | #define SMARTRF_SETTING_AGCCTRL2 0x43 55 | #define SMARTRF_SETTING_AGCCTRL1 0x40 56 | #define SMARTRF_SETTING_AGCCTRL0 0x91 57 | #define SMARTRF_SETTING_FSCAL3 0xEA 58 | #define SMARTRF_SETTING_FSCAL2 0x2A 59 | #define SMARTRF_SETTING_FSCAL1 0x00 60 | #define SMARTRF_SETTING_FSCAL0 0x1F 61 | #define SMARTRF_SETTING_TEST2 0x81 62 | #define SMARTRF_SETTING_TEST1 0x35 63 | #define SMARTRF_SETTING_TEST0 0x09 64 | #define SMARTRF_SETTING_PA_TABLE0 0x60 65 | #define SMARTRF_SETTING_PKTCTRL1 0x04 66 | #define SMARTRF_SETTING_PKTCTRL0 0x05 67 | #define SMARTRF_SETTING_ADDR 0x00 68 | #define SMARTRF_SETTING_PKTLEN 0xFF 69 | 70 | #endif 71 | -------------------------------------------------------------------------------- /Components/mrfi/smartrf/CC1111/rfstudio.srfs1111: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Components/mrfi/smartrf/CC1111/rfstudio.srfs1111 -------------------------------------------------------------------------------- /Components/mrfi/smartrf/CC1111/smartrf_CC1111.h: -------------------------------------------------------------------------------- 1 | /*************************************************************** 2 | * SmartRF Studio(tm) Export 3 | * 4 | * Radio register settings specifed with C-code 5 | * compatible #define statements. 6 | * 7 | ***************************************************************/ 8 | 9 | #ifndef SMARTRF_CC1111_H 10 | #define SMARTRF_CC1111_H 11 | 12 | #define SMARTRF_RADIO_CC1111 13 | 14 | #define SMARTRF_SETTING_FSCTRL1 0x12 15 | #define SMARTRF_SETTING_FSCTRL0 0x00 16 | #define SMARTRF_SETTING_FREQ2 0x25 17 | #define SMARTRF_SETTING_FREQ1 0x95 18 | #define SMARTRF_SETTING_FREQ0 0x55 19 | #define SMARTRF_SETTING_MDMCFG4 0x1D 20 | #define SMARTRF_SETTING_MDMCFG3 0x55 21 | #define SMARTRF_SETTING_MDMCFG2 0x13 22 | #define SMARTRF_SETTING_MDMCFG1 0x23 23 | #define SMARTRF_SETTING_MDMCFG0 0x11 24 | #define SMARTRF_SETTING_CHANNR 0x14 25 | #define SMARTRF_SETTING_DEVIATN 0x63 26 | #define SMARTRF_SETTING_FREND1 0xB6 27 | #define SMARTRF_SETTING_FREND0 0x10 28 | #define SMARTRF_SETTING_MCSM0 0x18 29 | #define SMARTRF_SETTING_FOCCFG 0x1D 30 | #define SMARTRF_SETTING_BSCFG 0x1C 31 | #define SMARTRF_SETTING_AGCCTRL2 0xC7 32 | #define SMARTRF_SETTING_AGCCTRL1 0x00 33 | #define SMARTRF_SETTING_AGCCTRL0 0xB0 34 | #define SMARTRF_SETTING_FSCAL3 0xEA 35 | #define SMARTRF_SETTING_FSCAL2 0x2A 36 | #define SMARTRF_SETTING_FSCAL1 0x00 37 | #define SMARTRF_SETTING_FSCAL0 0x1F 38 | #define SMARTRF_SETTING_TEST2 0x88 39 | #define SMARTRF_SETTING_TEST1 0x31 40 | #define SMARTRF_SETTING_TEST0 0x09 41 | #define SMARTRF_SETTING_PA_TABLE0 0x8E 42 | #define SMARTRF_SETTING_PKTCTRL1 0x04 43 | #define SMARTRF_SETTING_PKTCTRL0 0x05 44 | #define SMARTRF_SETTING_ADDR 0x00 45 | #define SMARTRF_SETTING_PKTLEN 0xFF 46 | 47 | #endif 48 | 49 | -------------------------------------------------------------------------------- /Components/mrfi/smartrf/CC2500/rfstudio.srfs: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Components/mrfi/smartrf/CC2500/rfstudio.srfs -------------------------------------------------------------------------------- /Components/mrfi/smartrf/CC2500/rfstudio.srfs2500: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Components/mrfi/smartrf/CC2500/rfstudio.srfs2500 -------------------------------------------------------------------------------- /Components/mrfi/smartrf/CC2500/smartrf_CC2500.h: -------------------------------------------------------------------------------- 1 | /*************************************************************** 2 | * SmartRF Studio(tm) Export 3 | * 4 | * Radio register settings specifed with C-code 5 | * compatible #define statements. 6 | * 7 | ***************************************************************/ 8 | 9 | #ifndef SMARTRF_CC2500_H 10 | #define SMARTRF_CC2500_H 11 | 12 | #define SMARTRF_RADIO_CC2500 13 | 14 | #define SMARTRF_SETTING_FSCTRL1 0x07 15 | #define SMARTRF_SETTING_FSCTRL0 0x00 16 | #define SMARTRF_SETTING_FREQ2 0x5D 17 | #define SMARTRF_SETTING_FREQ1 0x44 18 | #define SMARTRF_SETTING_FREQ0 0xEC 19 | #define SMARTRF_SETTING_MDMCFG4 0x2D 20 | #define SMARTRF_SETTING_MDMCFG3 0x3B 21 | #define SMARTRF_SETTING_MDMCFG2 0x73 22 | #define SMARTRF_SETTING_MDMCFG1 0x23 23 | #define SMARTRF_SETTING_MDMCFG0 0x3B 24 | #define SMARTRF_SETTING_CHANNR 0x03 25 | #define SMARTRF_SETTING_DEVIATN 0x01 26 | #define SMARTRF_SETTING_FREND1 0xB6 27 | #define SMARTRF_SETTING_FREND0 0x10 28 | #define SMARTRF_SETTING_MCSM0 0x18 29 | #define SMARTRF_SETTING_FOCCFG 0x1D 30 | #define SMARTRF_SETTING_BSCFG 0x1C 31 | #define SMARTRF_SETTING_AGCCTRL2 0xC7 32 | #define SMARTRF_SETTING_AGCCTRL1 0x00 33 | #define SMARTRF_SETTING_AGCCTRL0 0xB0 34 | #define SMARTRF_SETTING_FSCAL3 0xEA 35 | #define SMARTRF_SETTING_FSCAL2 0x0A 36 | #define SMARTRF_SETTING_FSCAL1 0x00 37 | #define SMARTRF_SETTING_FSCAL0 0x11 38 | #define SMARTRF_SETTING_FSTEST 0x59 39 | #define SMARTRF_SETTING_TEST2 0x88 40 | #define SMARTRF_SETTING_TEST1 0x31 41 | #define SMARTRF_SETTING_TEST0 0x0B 42 | #define SMARTRF_SETTING_FIFOTHR 0x07 43 | #define SMARTRF_SETTING_IOCFG2 0x29 44 | #define SMARTRF_SETTING_IOCFG0D 0x06 45 | #define SMARTRF_SETTING_PKTCTRL1 0x04 46 | #define SMARTRF_SETTING_PKTCTRL0 0x05 47 | #define SMARTRF_SETTING_ADDR 0x00 48 | #define SMARTRF_SETTING_PKTLEN 0xFF 49 | 50 | #endif 51 | 52 | -------------------------------------------------------------------------------- /Components/mrfi/smartrf/CC2510/rfstudio.srfs2510: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Components/mrfi/smartrf/CC2510/rfstudio.srfs2510 -------------------------------------------------------------------------------- /Components/mrfi/smartrf/CC2510/smartrf_CC2510.h: -------------------------------------------------------------------------------- 1 | /*************************************************************** 2 | * SmartRF Studio(tm) Export 3 | * 4 | * Radio register settings specifed with C-code 5 | * compatible #define statements. 6 | * 7 | ***************************************************************/ 8 | 9 | #ifndef SMARTRF_CC2510_H 10 | #define SMARTRF_CC2510_H 11 | 12 | #define SMARTRF_RADIO_CC2510 13 | 14 | #define SMARTRF_SETTING_FSCTRL1 0x0A 15 | #define SMARTRF_SETTING_FSCTRL0 0x00 16 | #define SMARTRF_SETTING_FREQ2 0x5D 17 | #define SMARTRF_SETTING_FREQ1 0x44 18 | #define SMARTRF_SETTING_FREQ0 0xEC 19 | #define SMARTRF_SETTING_MDMCFG4 0x2D 20 | #define SMARTRF_SETTING_MDMCFG3 0x3B 21 | #define SMARTRF_SETTING_MDMCFG2 0x73 22 | #define SMARTRF_SETTING_MDMCFG1 0x23 23 | #define SMARTRF_SETTING_MDMCFG0 0x3B 24 | #define SMARTRF_SETTING_CHANNR 0x03 25 | #define SMARTRF_SETTING_DEVIATN 0x00 26 | #define SMARTRF_SETTING_FREND1 0xB6 27 | #define SMARTRF_SETTING_FREND0 0x10 28 | #define SMARTRF_SETTING_MCSM0 0x10 29 | #define SMARTRF_SETTING_FOCCFG 0x1D 30 | #define SMARTRF_SETTING_BSCFG 0x1C 31 | #define SMARTRF_SETTING_AGCCTRL2 0xC7 32 | #define SMARTRF_SETTING_AGCCTRL1 0x00 33 | #define SMARTRF_SETTING_AGCCTRL0 0xB2 34 | #define SMARTRF_SETTING_FSCAL3 0xEA 35 | #define SMARTRF_SETTING_FSCAL2 0x0A 36 | #define SMARTRF_SETTING_FSCAL1 0x00 37 | #define SMARTRF_SETTING_FSCAL0 0x11 38 | #define SMARTRF_SETTING_TEST2 0x88 39 | #define SMARTRF_SETTING_TEST1 0x31 40 | #define SMARTRF_SETTING_TEST0 0x09 41 | #define SMARTRF_SETTING_PA_TABLE0 0xFE 42 | #define SMARTRF_SETTING_PKTCTRL1 0x04 43 | #define SMARTRF_SETTING_PKTCTRL0 0x05 44 | #define SMARTRF_SETTING_ADDR 0x00 45 | #define SMARTRF_SETTING_PKTLEN 0xFF 46 | 47 | #endif 48 | 49 | -------------------------------------------------------------------------------- /Components/mrfi/smartrf/CC2510/smartrf_CC2510.prs: -------------------------------------------------------------------------------- 1 | FSCTRL1 |0xDF07|0x0A|Frequency synthesizer control. 2 | FSCTRL0 |0xDF08|0x00|Frequency synthesizer control. 3 | FREQ2 |0xDF09|0x5D|Frequency control word, high byte. 4 | FREQ1 |0xDF0A|0x44|Frequency control word, middle byte. 5 | FREQ0 |0xDF0B|0xEC|Frequency control word, low byte. 6 | MDMCFG4 |0xDF0C|0x2D|Modem configuration. 7 | MDMCFG3 |0xDF0D|0x3B|Modem configuration. 8 | MDMCFG2 |0xDF0E|0x73|Modem configuration. 9 | MDMCFG1 |0xDF0F|0x23|Modem configuration. 10 | MDMCFG0 |0xDF10|0x3B|Modem configuration. 11 | CHANNR |0xDF06|0x03|Channel number. 12 | DEVIATN |0xDF11|0x00|Modem deviation setting (when FSK modulation is enabled). 13 | FREND1 |0xDF1A|0xB6|Front end RX configuration. 14 | FREND0 |0xDF1B|0x10|Front end RX configuration. 15 | MCSM0 |0xDF14|0x10|Main Radio Control State Machine configuration. 16 | FOCCFG |0xDF15|0x1D|Frequency Offset Compensation Configuration. 17 | BSCFG |0xDF16|0x1C|Bit synchronization Configuration. 18 | AGCCTRL2 |0xDF17|0xC7|AGC control. 19 | AGCCTRL1 |0xDF18|0x00|AGC control. 20 | AGCCTRL0 |0xDF19|0xB2|AGC control. 21 | FSCAL3 |0xDF1C|0xEA|Frequency synthesizer calibration. 22 | FSCAL2 |0xDF1D|0x0A|Frequency synthesizer calibration. 23 | FSCAL1 |0xDF1E|0x00|Frequency synthesizer calibration. 24 | FSCAL0 |0xDF1F|0x11|Frequency synthesizer calibration. 25 | TEST2 |0xDF23|0x88|Various test settings. 26 | TEST1 |0xDF24|0x31|Various test settings. 27 | TEST0 |0xDF25|0x09|Various test settings. 28 | PA_TABLE0|0xDF2E|0xFE|PA output power setting. 29 | PKTCTRL1 |0xDF03|0x04|Packet automation control. 30 | PKTCTRL0 |0xDF04|0x05|Packet automation control. 31 | ADDR |0xDF05|0x00|Device address. 32 | PKTLEN |0xDF02|0xFF|Packet length. 33 | -------------------------------------------------------------------------------- /Components/mrfi/smartrf/CC2511/rfstudio.srfs2511: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Components/mrfi/smartrf/CC2511/rfstudio.srfs2511 -------------------------------------------------------------------------------- /Components/mrfi/smartrf/CC2511/smartrf_CC2511.h: -------------------------------------------------------------------------------- 1 | /*************************************************************** 2 | * SmartRF Studio(tm) Export 3 | * 4 | * Radio register settings specifed with C-code 5 | * compatible #define statements. 6 | * 7 | ***************************************************************/ 8 | 9 | #ifndef SMARTRF_CC2511_H 10 | #define SMARTRF_CC2511_H 11 | 12 | #define SMARTRF_RADIO_CC2511 13 | 14 | #define SMARTRF_SETTING_FSCTRL1 0x0A 15 | #define SMARTRF_SETTING_FSCTRL0 0x00 16 | #define SMARTRF_SETTING_FREQ2 0x65 17 | #define SMARTRF_SETTING_FREQ1 0x0A 18 | #define SMARTRF_SETTING_FREQ0 0xAA 19 | #define SMARTRF_SETTING_MDMCFG4 0x1D 20 | #define SMARTRF_SETTING_MDMCFG3 0x55 21 | #define SMARTRF_SETTING_MDMCFG2 0x73 22 | #define SMARTRF_SETTING_MDMCFG1 0x23 23 | #define SMARTRF_SETTING_MDMCFG0 0x55 24 | #define SMARTRF_SETTING_CHANNR 0x03 25 | #define SMARTRF_SETTING_DEVIATN 0x00 26 | #define SMARTRF_SETTING_FREND1 0xB6 27 | #define SMARTRF_SETTING_FREND0 0x10 28 | #define SMARTRF_SETTING_MCSM0 0x10 29 | #define SMARTRF_SETTING_FOCCFG 0x1D 30 | #define SMARTRF_SETTING_BSCFG 0x1C 31 | #define SMARTRF_SETTING_AGCCTRL2 0xC7 32 | #define SMARTRF_SETTING_AGCCTRL1 0x00 33 | #define SMARTRF_SETTING_AGCCTRL0 0xB2 34 | #define SMARTRF_SETTING_FSCAL3 0xEA 35 | #define SMARTRF_SETTING_FSCAL2 0x0A 36 | #define SMARTRF_SETTING_FSCAL1 0x00 37 | #define SMARTRF_SETTING_FSCAL0 0x11 38 | #define SMARTRF_SETTING_TEST2 0x88 39 | #define SMARTRF_SETTING_TEST1 0x31 40 | #define SMARTRF_SETTING_TEST0 0x09 41 | #define SMARTRF_SETTING_PA_TABLE0 0xFE 42 | #define SMARTRF_SETTING_PKTCTRL1 0x04 43 | #define SMARTRF_SETTING_PKTCTRL0 0x05 44 | #define SMARTRF_SETTING_ADDR 0x00 45 | #define SMARTRF_SETTING_PKTLEN 0xFF 46 | 47 | #endif 48 | 49 | -------------------------------------------------------------------------------- /Components/mrfi/smartrf/CC430/rfstudio.srfsCC430Fx13x: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Components/mrfi/smartrf/CC430/rfstudio.srfsCC430Fx13x -------------------------------------------------------------------------------- /Components/mrfi/smartrf/CC430/smartrf_CC430.h: -------------------------------------------------------------------------------- 1 | /*************************************************************** 2 | * SmartRF Studio(tm) Export 3 | * 4 | * Radio register settings specifed with C-code 5 | * compatible #define statements. 6 | * 7 | ***************************************************************/ 8 | 9 | #ifndef SMARTRF_CC430_H 10 | #define SMARTRF_CC430_H 11 | 12 | #define SMARTRF_RADIO_CC430 13 | 14 | #define SMARTRF_SETTING_FSCTRL1 0x0C 15 | #define SMARTRF_SETTING_FSCTRL0 0x00 16 | #define SMARTRF_SETTING_FREQ2 0x22 17 | #define SMARTRF_SETTING_FREQ1 0xB1 18 | #define SMARTRF_SETTING_FREQ0 0x3B 19 | #define SMARTRF_SETTING_MDMCFG4 0x2D 20 | #define SMARTRF_SETTING_MDMCFG3 0x3B 21 | #define SMARTRF_SETTING_MDMCFG2 0x13 22 | #define SMARTRF_SETTING_MDMCFG1 0x22 23 | #define SMARTRF_SETTING_MDMCFG0 0xF8 24 | #define SMARTRF_SETTING_CHANNR 0x14 25 | #define SMARTRF_SETTING_DEVIATN 0x62 26 | #define SMARTRF_SETTING_FREND1 0xB6 27 | #define SMARTRF_SETTING_FREND0 0x10 28 | #define SMARTRF_SETTING_MCSM0 0x18 29 | #define SMARTRF_SETTING_FOCCFG 0x1D 30 | #define SMARTRF_SETTING_BSCFG 0x1C 31 | #define SMARTRF_SETTING_AGCCTRL2 0xC7 32 | #define SMARTRF_SETTING_AGCCTRL1 0x00 33 | #define SMARTRF_SETTING_AGCCTRL0 0xB0 34 | #define SMARTRF_SETTING_FSCAL3 0xEA 35 | #define SMARTRF_SETTING_FSCAL2 0x2A 36 | #define SMARTRF_SETTING_FSCAL1 0x00 37 | #define SMARTRF_SETTING_FSCAL0 0x1F 38 | #define SMARTRF_SETTING_FSTEST 0x59 39 | #define SMARTRF_SETTING_TEST2 0x88 40 | #define SMARTRF_SETTING_TEST1 0x31 41 | #define SMARTRF_SETTING_TEST0 0x09 42 | #define SMARTRF_SETTING_FIFOTHR 0x07 43 | #define SMARTRF_SETTING_IOCFG2 0x29 44 | #define SMARTRF_SETTING_IOCFG0 0x06 45 | #define SMARTRF_SETTING_PKTCTRL1 0x04 46 | #define SMARTRF_SETTING_PKTCTRL0 0x05 47 | #define SMARTRF_SETTING_ADDR 0x00 48 | #define SMARTRF_SETTING_PKTLEN 0xFF 49 | 50 | #endif 51 | 52 | -------------------------------------------------------------------------------- /Components/simpliciti/nwk/nwk.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Components/simpliciti/nwk/nwk.c -------------------------------------------------------------------------------- /Components/simpliciti/nwk/nwk.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Components/simpliciti/nwk/nwk.h -------------------------------------------------------------------------------- /Components/simpliciti/nwk/nwk_QMgmt.c: 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https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Components/simpliciti/nwk_applications/nwk_security.h -------------------------------------------------------------------------------- /Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/stm32f10x.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/stm32f10x.h -------------------------------------------------------------------------------- /Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file system_stm32f10x.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 | * 18 | *

© COPYRIGHT 2011 STMicroelectronics

19 | ****************************************************************************** 20 | */ 21 | 22 | /** @addtogroup CMSIS 23 | * @{ 24 | */ 25 | 26 | /** @addtogroup stm32f10x_system 27 | * @{ 28 | */ 29 | 30 | /** 31 | * @brief Define to prevent recursive inclusion 32 | */ 33 | #ifndef __SYSTEM_STM32F10X_H 34 | #define __SYSTEM_STM32F10X_H 35 | 36 | #ifdef __cplusplus 37 | extern "C" { 38 | #endif 39 | 40 | /** @addtogroup STM32F10x_System_Includes 41 | * @{ 42 | */ 43 | 44 | /** 45 | * @} 46 | */ 47 | 48 | 49 | /** @addtogroup STM32F10x_System_Exported_types 50 | * @{ 51 | */ 52 | 53 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ 54 | 55 | /** 56 | * @} 57 | */ 58 | 59 | /** @addtogroup STM32F10x_System_Exported_Constants 60 | * @{ 61 | */ 62 | 63 | /** 64 | * @} 65 | */ 66 | 67 | /** @addtogroup STM32F10x_System_Exported_Macros 68 | * @{ 69 | */ 70 | 71 | /** 72 | * @} 73 | */ 74 | 75 | /** @addtogroup STM32F10x_System_Exported_Functions 76 | * @{ 77 | */ 78 | 79 | extern void SystemInit(void); 80 | extern void SystemCoreClockUpdate(void); 81 | /** 82 | * @} 83 | */ 84 | 85 | #ifdef __cplusplus 86 | } 87 | #endif 88 | 89 | #endif /*__SYSTEM_STM32F10X_H */ 90 | 91 | /** 92 | * @} 93 | */ 94 | 95 | /** 96 | * @} 97 | */ 98 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 99 | -------------------------------------------------------------------------------- /Libraries/CMSIS/CMSIS debug support.htm: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Libraries/CMSIS/CMSIS debug support.htm -------------------------------------------------------------------------------- /Libraries/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Libraries/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h -------------------------------------------------------------------------------- /Libraries/CMSIS/Device/ST/STM32F2xx/Include/system_stm32f2xx.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file system_stm32f2xx.h 4 | * @author MCD Application Team 5 | * @version V1.1.3 6 | * @date 05-March-2012 7 | * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2012 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /** @addtogroup CMSIS 29 | * @{ 30 | */ 31 | 32 | /** @addtogroup stm32f2xx_system 33 | * @{ 34 | */ 35 | 36 | /** 37 | * @brief Define to prevent recursive inclusion 38 | */ 39 | #ifndef __SYSTEM_STM32F2XX_H 40 | #define __SYSTEM_STM32F2XX_H 41 | 42 | #ifdef __cplusplus 43 | extern "C" { 44 | #endif 45 | 46 | /** @addtogroup STM32F2xx_System_Includes 47 | * @{ 48 | */ 49 | 50 | /** 51 | * @} 52 | */ 53 | 54 | 55 | /** @addtogroup STM32F2xx_System_Exported_types 56 | * @{ 57 | */ 58 | 59 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ 60 | 61 | 62 | /** 63 | * @} 64 | */ 65 | 66 | /** @addtogroup STM32F2xx_System_Exported_Constants 67 | * @{ 68 | */ 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | /** @addtogroup STM32F2xx_System_Exported_Macros 75 | * @{ 76 | */ 77 | 78 | /** 79 | * @} 80 | */ 81 | 82 | /** @addtogroup STM32F2xx_System_Exported_Functions 83 | * @{ 84 | */ 85 | 86 | extern void SystemInit(void); 87 | extern void SystemCoreClockUpdate(void); 88 | /** 89 | * @} 90 | */ 91 | 92 | #ifdef __cplusplus 93 | } 94 | #endif 95 | 96 | #endif /*__SYSTEM_STM32F2XX_H */ 97 | 98 | /** 99 | * @} 100 | */ 101 | 102 | /** 103 | * @} 104 | */ 105 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 106 | -------------------------------------------------------------------------------- /Libraries/CMSIS/Device/ST/STM32F2xx/Source/Templates/TASKING/cstart_thumb2.asm: -------------------------------------------------------------------------------- 1 | 2 | 3 | ;; NOTE: To allow the use of this file for both ARMv6M and ARMv7M, 4 | ;; we will only use 16-bit Thumb intructions. 5 | 6 | .extern _lc_ub_stack ; usr/sys mode stack pointer 7 | .extern _lc_ue_stack ; symbol required by debugger 8 | .extern _lc_ub_table ; ROM to RAM copy table 9 | .extern main 10 | .extern _Exit 11 | .extern exit 12 | .weak exit 13 | .global __get_argcv 14 | .weak __get_argcv 15 | .extern __argcvbuf 16 | .weak __argcvbuf 17 | ;;.extern __init_hardware 18 | .extern SystemInit 19 | 20 | .if @defined('__PROF_ENABLE__') 21 | .extern __prof_init 22 | .endif 23 | .if @defined('__POSIX__') 24 | .extern posix_main 25 | .extern _posix_boot_stack_top 26 | .endif 27 | 28 | .global _START 29 | 30 | .section .text.cstart 31 | 32 | .thumb 33 | _START: 34 | ;; anticipate possible ROM/RAM remapping 35 | ;; by loading the 'real' program address 36 | ldr r1,=_Next 37 | bx r1 38 | _Next: 39 | ;; initialize the stack pointer 40 | ldr r1,=_lc_ub_stack ; TODO: make this part of the vector table 41 | mov sp,r1 42 | 43 | ;; call a user function which initializes function. 44 | bl SystemInit 45 | 46 | ;; copy initialized sections from ROM to RAM 47 | ;; and clear uninitialized data sections in RAM 48 | 49 | ldr r3,=_lc_ub_table 50 | movs r0,#0 51 | cploop: 52 | ldr r4,[r3,#0] ; load type 53 | ldr r5,[r3,#4] ; dst address 54 | ldr r6,[r3,#8] ; src address 55 | ldr r7,[r3,#12] ; size 56 | 57 | cmp r4,#1 58 | beq copy 59 | cmp r4,#2 60 | beq clear 61 | b done 62 | 63 | copy: 64 | subs r7,r7,#1 65 | ldrb r1,[r6,r7] 66 | strb r1,[r5,r7] 67 | bne copy 68 | 69 | adds r3,r3,#16 70 | b cploop 71 | 72 | clear: 73 | subs r7,r7,#1 74 | strb r0,[r5,r7] 75 | bne clear 76 | 77 | adds r3,r3,#16 78 | b cploop 79 | 80 | done: 81 | 82 | .if @defined('__POSIX__') 83 | 84 | ;; posix stack buffer for system upbringing 85 | ldr r0,=_posix_boot_stack_top 86 | ldr r0, [r0] 87 | mov sp,r0 88 | 89 | .else 90 | 91 | ;; load r10 with end of USR/SYS stack, which is 92 | ;; needed in case stack overflow checking is on 93 | ;; NOTE: use 16-bit instructions only, for ARMv6M 94 | ldr r0,=_lc_ue_stack 95 | mov r10,r0 96 | 97 | .endif 98 | 99 | .if @defined('__PROF_ENABLE__') 100 | bl __prof_init 101 | .endif 102 | 103 | .if @defined('__POSIX__') 104 | ;; call posix_main with no arguments 105 | bl posix_main 106 | .else 107 | ;; retrieve argc and argv (default argv[0]==NULL & argc==0) 108 | bl __get_argcv 109 | ldr r1,=__argcvbuf 110 | ;; call main 111 | bl main 112 | .endif 113 | 114 | ;; call exit using the return value from main() 115 | ;; Note. Calling exit will also run all functions 116 | ;; that were supplied through atexit(). 117 | bl exit 118 | 119 | __get_argcv: ; weak definition 120 | movs r0,#0 121 | bx lr 122 | 123 | .ltorg 124 | .endsec 125 | 126 | .calls '_START', ' ' 127 | .calls '_START','__init_vector_table' 128 | .if @defined('__PROF_ENABLE__') 129 | .calls '_START','__prof_init' 130 | .endif 131 | .if @defined('__POSIX__') 132 | .calls '_START','posix_main' 133 | .else 134 | .calls '_START','__get_argcv' 135 | .calls '_START','main' 136 | .endif 137 | .calls '_START','exit' 138 | .calls '_START','',0 139 | 140 | .end 141 | -------------------------------------------------------------------------------- /Libraries/CMSIS/Documentation/CMSIS_Core.htm: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Libraries/CMSIS/Documentation/CMSIS_Core.htm -------------------------------------------------------------------------------- /Libraries/CMSIS/Include/arm_common_tables.h: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Copyright (C) 2010 ARM Limited. All rights reserved. 3 | * 4 | * $Date: 11. November 2010 5 | * $Revision: V1.0.2 6 | * 7 | * Project: CMSIS DSP Library 8 | * Title: arm_common_tables.h 9 | * 10 | * Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions 11 | * 12 | * Target Processor: Cortex-M4/Cortex-M3 13 | * 14 | * Version 1.0.2 2010/11/11 15 | * Documentation updated. 16 | * 17 | * Version 1.0.1 2010/10/05 18 | * Production release and review comments incorporated. 19 | * 20 | * Version 1.0.0 2010/09/20 21 | * Production release and review comments incorporated. 22 | * -------------------------------------------------------------------- */ 23 | 24 | #ifndef _ARM_COMMON_TABLES_H 25 | #define _ARM_COMMON_TABLES_H 26 | 27 | #include "arm_math.h" 28 | 29 | extern uint16_t armBitRevTable[256]; 30 | extern q15_t armRecipTableQ15[64]; 31 | extern q31_t armRecipTableQ31[64]; 32 | extern const q31_t realCoefAQ31[1024]; 33 | extern const q31_t realCoefBQ31[1024]; 34 | 35 | #endif /* ARM_COMMON_TABLES_H */ 36 | -------------------------------------------------------------------------------- /Libraries/CMSIS/License.doc: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Libraries/CMSIS/License.doc -------------------------------------------------------------------------------- /Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_cec.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_cec.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file contains all the functions prototypes for the CEC firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ 24 | #ifndef __STM32F10x_CEC_H 25 | #define __STM32F10x_CEC_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f10x.h" 33 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup CEC 39 | * @{ 40 | */ 41 | 42 | 43 | /** @defgroup CEC_Exported_Types 44 | * @{ 45 | */ 46 | 47 | /** 48 | * @brief CEC Init structure definition 49 | */ 50 | typedef struct 51 | { 52 | uint16_t CEC_BitTimingMode; /*!< Configures the CEC Bit Timing Error Mode. 53 | This parameter can be a value of @ref CEC_BitTiming_Mode */ 54 | uint16_t CEC_BitPeriodMode; /*!< Configures the CEC Bit Period Error Mode. 55 | This parameter can be a value of @ref CEC_BitPeriod_Mode */ 56 | }CEC_InitTypeDef; 57 | 58 | /** 59 | * @} 60 | */ 61 | 62 | /** @defgroup CEC_Exported_Constants 63 | * @{ 64 | */ 65 | 66 | /** @defgroup CEC_BitTiming_Mode 67 | * @{ 68 | */ 69 | #define CEC_BitTimingStdMode ((uint16_t)0x00) /*!< Bit timing error Standard Mode */ 70 | #define CEC_BitTimingErrFreeMode CEC_CFGR_BTEM /*!< Bit timing error Free Mode */ 71 | 72 | #define IS_CEC_BIT_TIMING_ERROR_MODE(MODE) (((MODE) == CEC_BitTimingStdMode) || \ 73 | ((MODE) == CEC_BitTimingErrFreeMode)) 74 | /** 75 | * @} 76 | */ 77 | 78 | /** @defgroup CEC_BitPeriod_Mode 79 | * @{ 80 | */ 81 | #define CEC_BitPeriodStdMode ((uint16_t)0x00) /*!< Bit period error Standard Mode */ 82 | #define CEC_BitPeriodFlexibleMode CEC_CFGR_BPEM /*!< Bit period error Flexible Mode */ 83 | 84 | #define IS_CEC_BIT_PERIOD_ERROR_MODE(MODE) (((MODE) == CEC_BitPeriodStdMode) || \ 85 | ((MODE) == CEC_BitPeriodFlexibleMode)) 86 | /** 87 | * @} 88 | */ 89 | 90 | 91 | /** @defgroup CEC_interrupts_definition 92 | * @{ 93 | */ 94 | #define CEC_IT_TERR CEC_CSR_TERR 95 | #define CEC_IT_TBTRF CEC_CSR_TBTRF 96 | #define CEC_IT_RERR CEC_CSR_RERR 97 | #define CEC_IT_RBTF CEC_CSR_RBTF 98 | #define IS_CEC_GET_IT(IT) (((IT) == CEC_IT_TERR) || ((IT) == CEC_IT_TBTRF) || \ 99 | ((IT) == CEC_IT_RERR) || ((IT) == CEC_IT_RBTF)) 100 | /** 101 | * @} 102 | */ 103 | 104 | 105 | /** @defgroup CEC_Own_Address 106 | * @{ 107 | */ 108 | #define IS_CEC_ADDRESS(ADDRESS) ((ADDRESS) < 0x10) 109 | /** 110 | * @} 111 | */ 112 | 113 | /** @defgroup CEC_Prescaler 114 | * @{ 115 | */ 116 | #define IS_CEC_PRESCALER(PRESCALER) ((PRESCALER) <= 0x3FFF) 117 | 118 | /** 119 | * @} 120 | */ 121 | 122 | /** @defgroup CEC_flags_definition 123 | * @{ 124 | */ 125 | 126 | /** 127 | * @brief ESR register flags 128 | */ 129 | #define CEC_FLAG_BTE ((uint32_t)0x10010000) 130 | #define CEC_FLAG_BPE ((uint32_t)0x10020000) 131 | #define CEC_FLAG_RBTFE ((uint32_t)0x10040000) 132 | #define CEC_FLAG_SBE ((uint32_t)0x10080000) 133 | #define CEC_FLAG_ACKE ((uint32_t)0x10100000) 134 | #define CEC_FLAG_LINE ((uint32_t)0x10200000) 135 | #define CEC_FLAG_TBTFE ((uint32_t)0x10400000) 136 | 137 | /** 138 | * @brief CSR register flags 139 | */ 140 | #define CEC_FLAG_TEOM ((uint32_t)0x00000002) 141 | #define CEC_FLAG_TERR ((uint32_t)0x00000004) 142 | #define CEC_FLAG_TBTRF ((uint32_t)0x00000008) 143 | #define CEC_FLAG_RSOM ((uint32_t)0x00000010) 144 | #define CEC_FLAG_REOM ((uint32_t)0x00000020) 145 | #define CEC_FLAG_RERR ((uint32_t)0x00000040) 146 | #define CEC_FLAG_RBTF ((uint32_t)0x00000080) 147 | 148 | #define IS_CEC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFF03) == 0x00) && ((FLAG) != 0x00)) 149 | 150 | #define IS_CEC_GET_FLAG(FLAG) (((FLAG) == CEC_FLAG_BTE) || ((FLAG) == CEC_FLAG_BPE) || \ 151 | ((FLAG) == CEC_FLAG_RBTFE) || ((FLAG)== CEC_FLAG_SBE) || \ 152 | ((FLAG) == CEC_FLAG_ACKE) || ((FLAG) == CEC_FLAG_LINE) || \ 153 | ((FLAG) == CEC_FLAG_TBTFE) || ((FLAG) == CEC_FLAG_TEOM) || \ 154 | ((FLAG) == CEC_FLAG_TERR) || ((FLAG) == CEC_FLAG_TBTRF) || \ 155 | ((FLAG) == CEC_FLAG_RSOM) || ((FLAG) == CEC_FLAG_REOM) || \ 156 | ((FLAG) == CEC_FLAG_RERR) || ((FLAG) == CEC_FLAG_RBTF)) 157 | 158 | /** 159 | * @} 160 | */ 161 | 162 | /** 163 | * @} 164 | */ 165 | 166 | /** @defgroup CEC_Exported_Macros 167 | * @{ 168 | */ 169 | 170 | /** 171 | * @} 172 | */ 173 | 174 | /** @defgroup CEC_Exported_Functions 175 | * @{ 176 | */ 177 | void CEC_DeInit(void); 178 | void CEC_Init(CEC_InitTypeDef* CEC_InitStruct); 179 | void CEC_Cmd(FunctionalState NewState); 180 | void CEC_ITConfig(FunctionalState NewState); 181 | void CEC_OwnAddressConfig(uint8_t CEC_OwnAddress); 182 | void CEC_SetPrescaler(uint16_t CEC_Prescaler); 183 | void CEC_SendDataByte(uint8_t Data); 184 | uint8_t CEC_ReceiveDataByte(void); 185 | void CEC_StartOfMessage(void); 186 | void CEC_EndOfMessageCmd(FunctionalState NewState); 187 | FlagStatus CEC_GetFlagStatus(uint32_t CEC_FLAG); 188 | void CEC_ClearFlag(uint32_t CEC_FLAG); 189 | ITStatus CEC_GetITStatus(uint8_t CEC_IT); 190 | void CEC_ClearITPendingBit(uint16_t CEC_IT); 191 | 192 | #ifdef __cplusplus 193 | } 194 | #endif 195 | 196 | #endif /* __STM32F10x_CEC_H */ 197 | 198 | /** 199 | * @} 200 | */ 201 | 202 | /** 203 | * @} 204 | */ 205 | 206 | /** 207 | * @} 208 | */ 209 | 210 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 211 | -------------------------------------------------------------------------------- /Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_crc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_crc.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file contains all the functions prototypes for the CRC firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ 24 | #ifndef __STM32F10x_CRC_H 25 | #define __STM32F10x_CRC_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f10x.h" 33 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup CRC 39 | * @{ 40 | */ 41 | 42 | /** @defgroup CRC_Exported_Types 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @} 48 | */ 49 | 50 | /** @defgroup CRC_Exported_Constants 51 | * @{ 52 | */ 53 | 54 | /** 55 | * @} 56 | */ 57 | 58 | /** @defgroup CRC_Exported_Macros 59 | * @{ 60 | */ 61 | 62 | /** 63 | * @} 64 | */ 65 | 66 | /** @defgroup CRC_Exported_Functions 67 | * @{ 68 | */ 69 | 70 | void CRC_ResetDR(void); 71 | uint32_t CRC_CalcCRC(uint32_t Data); 72 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength); 73 | uint32_t CRC_GetCRC(void); 74 | void CRC_SetIDRegister(uint8_t IDValue); 75 | uint8_t CRC_GetIDRegister(void); 76 | 77 | #ifdef __cplusplus 78 | } 79 | #endif 80 | 81 | #endif /* __STM32F10x_CRC_H */ 82 | /** 83 | * @} 84 | */ 85 | 86 | /** 87 | * @} 88 | */ 89 | 90 | /** 91 | * @} 92 | */ 93 | 94 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 95 | -------------------------------------------------------------------------------- /Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_dbgmcu.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_dbgmcu.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file contains all the functions prototypes for the DBGMCU 8 | * firmware library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ 24 | #ifndef __STM32F10x_DBGMCU_H 25 | #define __STM32F10x_DBGMCU_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f10x.h" 33 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup DBGMCU 39 | * @{ 40 | */ 41 | 42 | /** @defgroup DBGMCU_Exported_Types 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @} 48 | */ 49 | 50 | /** @defgroup DBGMCU_Exported_Constants 51 | * @{ 52 | */ 53 | 54 | #define DBGMCU_SLEEP ((uint32_t)0x00000001) 55 | #define DBGMCU_STOP ((uint32_t)0x00000002) 56 | #define DBGMCU_STANDBY ((uint32_t)0x00000004) 57 | #define DBGMCU_IWDG_STOP ((uint32_t)0x00000100) 58 | #define DBGMCU_WWDG_STOP ((uint32_t)0x00000200) 59 | #define DBGMCU_TIM1_STOP ((uint32_t)0x00000400) 60 | #define DBGMCU_TIM2_STOP ((uint32_t)0x00000800) 61 | #define DBGMCU_TIM3_STOP ((uint32_t)0x00001000) 62 | #define DBGMCU_TIM4_STOP ((uint32_t)0x00002000) 63 | #define DBGMCU_CAN1_STOP ((uint32_t)0x00004000) 64 | #define DBGMCU_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00008000) 65 | #define DBGMCU_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00010000) 66 | #define DBGMCU_TIM8_STOP ((uint32_t)0x00020000) 67 | #define DBGMCU_TIM5_STOP ((uint32_t)0x00040000) 68 | #define DBGMCU_TIM6_STOP ((uint32_t)0x00080000) 69 | #define DBGMCU_TIM7_STOP ((uint32_t)0x00100000) 70 | #define DBGMCU_CAN2_STOP ((uint32_t)0x00200000) 71 | #define DBGMCU_TIM15_STOP ((uint32_t)0x00400000) 72 | #define DBGMCU_TIM16_STOP ((uint32_t)0x00800000) 73 | #define DBGMCU_TIM17_STOP ((uint32_t)0x01000000) 74 | #define DBGMCU_TIM12_STOP ((uint32_t)0x02000000) 75 | #define DBGMCU_TIM13_STOP ((uint32_t)0x04000000) 76 | #define DBGMCU_TIM14_STOP ((uint32_t)0x08000000) 77 | #define DBGMCU_TIM9_STOP ((uint32_t)0x10000000) 78 | #define DBGMCU_TIM10_STOP ((uint32_t)0x20000000) 79 | #define DBGMCU_TIM11_STOP ((uint32_t)0x40000000) 80 | 81 | #define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0x800000F8) == 0x00) && ((PERIPH) != 0x00)) 82 | /** 83 | * @} 84 | */ 85 | 86 | /** @defgroup DBGMCU_Exported_Macros 87 | * @{ 88 | */ 89 | 90 | /** 91 | * @} 92 | */ 93 | 94 | /** @defgroup DBGMCU_Exported_Functions 95 | * @{ 96 | */ 97 | 98 | uint32_t DBGMCU_GetREVID(void); 99 | uint32_t DBGMCU_GetDEVID(void); 100 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState); 101 | 102 | #ifdef __cplusplus 103 | } 104 | #endif 105 | 106 | #endif /* __STM32F10x_DBGMCU_H */ 107 | /** 108 | * @} 109 | */ 110 | 111 | /** 112 | * @} 113 | */ 114 | 115 | /** 116 | * @} 117 | */ 118 | 119 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 120 | -------------------------------------------------------------------------------- /Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_exti.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_exti.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file contains all the functions prototypes for the EXTI firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ 24 | #ifndef __STM32F10x_EXTI_H 25 | #define __STM32F10x_EXTI_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f10x.h" 33 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup EXTI 39 | * @{ 40 | */ 41 | 42 | /** @defgroup EXTI_Exported_Types 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @brief EXTI mode enumeration 48 | */ 49 | 50 | typedef enum 51 | { 52 | EXTI_Mode_Interrupt = 0x00, 53 | EXTI_Mode_Event = 0x04 54 | }EXTIMode_TypeDef; 55 | 56 | #define IS_EXTI_MODE(MODE) (((MODE) == EXTI_Mode_Interrupt) || ((MODE) == EXTI_Mode_Event)) 57 | 58 | /** 59 | * @brief EXTI Trigger enumeration 60 | */ 61 | 62 | typedef enum 63 | { 64 | EXTI_Trigger_Rising = 0x08, 65 | EXTI_Trigger_Falling = 0x0C, 66 | EXTI_Trigger_Rising_Falling = 0x10 67 | }EXTITrigger_TypeDef; 68 | 69 | #define IS_EXTI_TRIGGER(TRIGGER) (((TRIGGER) == EXTI_Trigger_Rising) || \ 70 | ((TRIGGER) == EXTI_Trigger_Falling) || \ 71 | ((TRIGGER) == EXTI_Trigger_Rising_Falling)) 72 | /** 73 | * @brief EXTI Init Structure definition 74 | */ 75 | 76 | typedef struct 77 | { 78 | uint32_t EXTI_Line; /*!< Specifies the EXTI lines to be enabled or disabled. 79 | This parameter can be any combination of @ref EXTI_Lines */ 80 | 81 | EXTIMode_TypeDef EXTI_Mode; /*!< Specifies the mode for the EXTI lines. 82 | This parameter can be a value of @ref EXTIMode_TypeDef */ 83 | 84 | EXTITrigger_TypeDef EXTI_Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines. 85 | This parameter can be a value of @ref EXTIMode_TypeDef */ 86 | 87 | FunctionalState EXTI_LineCmd; /*!< Specifies the new state of the selected EXTI lines. 88 | This parameter can be set either to ENABLE or DISABLE */ 89 | }EXTI_InitTypeDef; 90 | 91 | /** 92 | * @} 93 | */ 94 | 95 | /** @defgroup EXTI_Exported_Constants 96 | * @{ 97 | */ 98 | 99 | /** @defgroup EXTI_Lines 100 | * @{ 101 | */ 102 | 103 | #define EXTI_Line0 ((uint32_t)0x00001) /*!< External interrupt line 0 */ 104 | #define EXTI_Line1 ((uint32_t)0x00002) /*!< External interrupt line 1 */ 105 | #define EXTI_Line2 ((uint32_t)0x00004) /*!< External interrupt line 2 */ 106 | #define EXTI_Line3 ((uint32_t)0x00008) /*!< External interrupt line 3 */ 107 | #define EXTI_Line4 ((uint32_t)0x00010) /*!< External interrupt line 4 */ 108 | #define EXTI_Line5 ((uint32_t)0x00020) /*!< External interrupt line 5 */ 109 | #define EXTI_Line6 ((uint32_t)0x00040) /*!< External interrupt line 6 */ 110 | #define EXTI_Line7 ((uint32_t)0x00080) /*!< External interrupt line 7 */ 111 | #define EXTI_Line8 ((uint32_t)0x00100) /*!< External interrupt line 8 */ 112 | #define EXTI_Line9 ((uint32_t)0x00200) /*!< External interrupt line 9 */ 113 | #define EXTI_Line10 ((uint32_t)0x00400) /*!< External interrupt line 10 */ 114 | #define EXTI_Line11 ((uint32_t)0x00800) /*!< External interrupt line 11 */ 115 | #define EXTI_Line12 ((uint32_t)0x01000) /*!< External interrupt line 12 */ 116 | #define EXTI_Line13 ((uint32_t)0x02000) /*!< External interrupt line 13 */ 117 | #define EXTI_Line14 ((uint32_t)0x04000) /*!< External interrupt line 14 */ 118 | #define EXTI_Line15 ((uint32_t)0x08000) /*!< External interrupt line 15 */ 119 | #define EXTI_Line16 ((uint32_t)0x10000) /*!< External interrupt line 16 Connected to the PVD Output */ 120 | #define EXTI_Line17 ((uint32_t)0x20000) /*!< External interrupt line 17 Connected to the RTC Alarm event */ 121 | #define EXTI_Line18 ((uint32_t)0x40000) /*!< External interrupt line 18 Connected to the USB Device/USB OTG FS 122 | Wakeup from suspend event */ 123 | #define EXTI_Line19 ((uint32_t)0x80000) /*!< External interrupt line 19 Connected to the Ethernet Wakeup event */ 124 | 125 | #define IS_EXTI_LINE(LINE) ((((LINE) & (uint32_t)0xFFF00000) == 0x00) && ((LINE) != (uint16_t)0x00)) 126 | #define IS_GET_EXTI_LINE(LINE) (((LINE) == EXTI_Line0) || ((LINE) == EXTI_Line1) || \ 127 | ((LINE) == EXTI_Line2) || ((LINE) == EXTI_Line3) || \ 128 | ((LINE) == EXTI_Line4) || ((LINE) == EXTI_Line5) || \ 129 | ((LINE) == EXTI_Line6) || ((LINE) == EXTI_Line7) || \ 130 | ((LINE) == EXTI_Line8) || ((LINE) == EXTI_Line9) || \ 131 | ((LINE) == EXTI_Line10) || ((LINE) == EXTI_Line11) || \ 132 | ((LINE) == EXTI_Line12) || ((LINE) == EXTI_Line13) || \ 133 | ((LINE) == EXTI_Line14) || ((LINE) == EXTI_Line15) || \ 134 | ((LINE) == EXTI_Line16) || ((LINE) == EXTI_Line17) || \ 135 | ((LINE) == EXTI_Line18) || ((LINE) == EXTI_Line19)) 136 | 137 | 138 | /** 139 | * @} 140 | */ 141 | 142 | /** 143 | * @} 144 | */ 145 | 146 | /** @defgroup EXTI_Exported_Macros 147 | * @{ 148 | */ 149 | 150 | /** 151 | * @} 152 | */ 153 | 154 | /** @defgroup EXTI_Exported_Functions 155 | * @{ 156 | */ 157 | 158 | void EXTI_DeInit(void); 159 | void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct); 160 | void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct); 161 | void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line); 162 | FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line); 163 | void EXTI_ClearFlag(uint32_t EXTI_Line); 164 | ITStatus EXTI_GetITStatus(uint32_t EXTI_Line); 165 | void EXTI_ClearITPendingBit(uint32_t EXTI_Line); 166 | 167 | #ifdef __cplusplus 168 | } 169 | #endif 170 | 171 | #endif /* __STM32F10x_EXTI_H */ 172 | /** 173 | * @} 174 | */ 175 | 176 | /** 177 | * @} 178 | */ 179 | 180 | /** 181 | * @} 182 | */ 183 | 184 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 185 | -------------------------------------------------------------------------------- /Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_iwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_iwdg.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file contains all the functions prototypes for the IWDG 8 | * firmware library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ 24 | #ifndef __STM32F10x_IWDG_H 25 | #define __STM32F10x_IWDG_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f10x.h" 33 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup IWDG 39 | * @{ 40 | */ 41 | 42 | /** @defgroup IWDG_Exported_Types 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @} 48 | */ 49 | 50 | /** @defgroup IWDG_Exported_Constants 51 | * @{ 52 | */ 53 | 54 | /** @defgroup IWDG_WriteAccess 55 | * @{ 56 | */ 57 | 58 | #define IWDG_WriteAccess_Enable ((uint16_t)0x5555) 59 | #define IWDG_WriteAccess_Disable ((uint16_t)0x0000) 60 | #define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \ 61 | ((ACCESS) == IWDG_WriteAccess_Disable)) 62 | /** 63 | * @} 64 | */ 65 | 66 | /** @defgroup IWDG_prescaler 67 | * @{ 68 | */ 69 | 70 | #define IWDG_Prescaler_4 ((uint8_t)0x00) 71 | #define IWDG_Prescaler_8 ((uint8_t)0x01) 72 | #define IWDG_Prescaler_16 ((uint8_t)0x02) 73 | #define IWDG_Prescaler_32 ((uint8_t)0x03) 74 | #define IWDG_Prescaler_64 ((uint8_t)0x04) 75 | #define IWDG_Prescaler_128 ((uint8_t)0x05) 76 | #define IWDG_Prescaler_256 ((uint8_t)0x06) 77 | #define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4) || \ 78 | ((PRESCALER) == IWDG_Prescaler_8) || \ 79 | ((PRESCALER) == IWDG_Prescaler_16) || \ 80 | ((PRESCALER) == IWDG_Prescaler_32) || \ 81 | ((PRESCALER) == IWDG_Prescaler_64) || \ 82 | ((PRESCALER) == IWDG_Prescaler_128)|| \ 83 | ((PRESCALER) == IWDG_Prescaler_256)) 84 | /** 85 | * @} 86 | */ 87 | 88 | /** @defgroup IWDG_Flag 89 | * @{ 90 | */ 91 | 92 | #define IWDG_FLAG_PVU ((uint16_t)0x0001) 93 | #define IWDG_FLAG_RVU ((uint16_t)0x0002) 94 | #define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU)) 95 | #define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF) 96 | /** 97 | * @} 98 | */ 99 | 100 | /** 101 | * @} 102 | */ 103 | 104 | /** @defgroup IWDG_Exported_Macros 105 | * @{ 106 | */ 107 | 108 | /** 109 | * @} 110 | */ 111 | 112 | /** @defgroup IWDG_Exported_Functions 113 | * @{ 114 | */ 115 | 116 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess); 117 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler); 118 | void IWDG_SetReload(uint16_t Reload); 119 | void IWDG_ReloadCounter(void); 120 | void IWDG_Enable(void); 121 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG); 122 | 123 | #ifdef __cplusplus 124 | } 125 | #endif 126 | 127 | #endif /* __STM32F10x_IWDG_H */ 128 | /** 129 | * @} 130 | */ 131 | 132 | /** 133 | * @} 134 | */ 135 | 136 | /** 137 | * @} 138 | */ 139 | 140 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 141 | -------------------------------------------------------------------------------- /Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_pwr.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_pwr.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file contains all the functions prototypes for the PWR firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ 24 | #ifndef __STM32F10x_PWR_H 25 | #define __STM32F10x_PWR_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f10x.h" 33 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup PWR 39 | * @{ 40 | */ 41 | 42 | /** @defgroup PWR_Exported_Types 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @} 48 | */ 49 | 50 | /** @defgroup PWR_Exported_Constants 51 | * @{ 52 | */ 53 | 54 | /** @defgroup PVD_detection_level 55 | * @{ 56 | */ 57 | 58 | #define PWR_PVDLevel_2V2 ((uint32_t)0x00000000) 59 | #define PWR_PVDLevel_2V3 ((uint32_t)0x00000020) 60 | #define PWR_PVDLevel_2V4 ((uint32_t)0x00000040) 61 | #define PWR_PVDLevel_2V5 ((uint32_t)0x00000060) 62 | #define PWR_PVDLevel_2V6 ((uint32_t)0x00000080) 63 | #define PWR_PVDLevel_2V7 ((uint32_t)0x000000A0) 64 | #define PWR_PVDLevel_2V8 ((uint32_t)0x000000C0) 65 | #define PWR_PVDLevel_2V9 ((uint32_t)0x000000E0) 66 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_2V2) || ((LEVEL) == PWR_PVDLevel_2V3)|| \ 67 | ((LEVEL) == PWR_PVDLevel_2V4) || ((LEVEL) == PWR_PVDLevel_2V5)|| \ 68 | ((LEVEL) == PWR_PVDLevel_2V6) || ((LEVEL) == PWR_PVDLevel_2V7)|| \ 69 | ((LEVEL) == PWR_PVDLevel_2V8) || ((LEVEL) == PWR_PVDLevel_2V9)) 70 | /** 71 | * @} 72 | */ 73 | 74 | /** @defgroup Regulator_state_is_STOP_mode 75 | * @{ 76 | */ 77 | 78 | #define PWR_Regulator_ON ((uint32_t)0x00000000) 79 | #define PWR_Regulator_LowPower ((uint32_t)0x00000001) 80 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_Regulator_ON) || \ 81 | ((REGULATOR) == PWR_Regulator_LowPower)) 82 | /** 83 | * @} 84 | */ 85 | 86 | /** @defgroup STOP_mode_entry 87 | * @{ 88 | */ 89 | 90 | #define PWR_STOPEntry_WFI ((uint8_t)0x01) 91 | #define PWR_STOPEntry_WFE ((uint8_t)0x02) 92 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE)) 93 | 94 | /** 95 | * @} 96 | */ 97 | 98 | /** @defgroup PWR_Flag 99 | * @{ 100 | */ 101 | 102 | #define PWR_FLAG_WU ((uint32_t)0x00000001) 103 | #define PWR_FLAG_SB ((uint32_t)0x00000002) 104 | #define PWR_FLAG_PVDO ((uint32_t)0x00000004) 105 | #define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \ 106 | ((FLAG) == PWR_FLAG_PVDO)) 107 | 108 | #define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB)) 109 | /** 110 | * @} 111 | */ 112 | 113 | /** 114 | * @} 115 | */ 116 | 117 | /** @defgroup PWR_Exported_Macros 118 | * @{ 119 | */ 120 | 121 | /** 122 | * @} 123 | */ 124 | 125 | /** @defgroup PWR_Exported_Functions 126 | * @{ 127 | */ 128 | 129 | void PWR_DeInit(void); 130 | void PWR_BackupAccessCmd(FunctionalState NewState); 131 | void PWR_PVDCmd(FunctionalState NewState); 132 | void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel); 133 | void PWR_WakeUpPinCmd(FunctionalState NewState); 134 | void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry); 135 | void PWR_EnterSTANDBYMode(void); 136 | FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG); 137 | void PWR_ClearFlag(uint32_t PWR_FLAG); 138 | 139 | #ifdef __cplusplus 140 | } 141 | #endif 142 | 143 | #endif /* __STM32F10x_PWR_H */ 144 | /** 145 | * @} 146 | */ 147 | 148 | /** 149 | * @} 150 | */ 151 | 152 | /** 153 | * @} 154 | */ 155 | 156 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 157 | -------------------------------------------------------------------------------- /Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_rtc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_rtc.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file contains all the functions prototypes for the RTC firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ 24 | #ifndef __STM32F10x_RTC_H 25 | #define __STM32F10x_RTC_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f10x.h" 33 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup RTC 39 | * @{ 40 | */ 41 | 42 | /** @defgroup RTC_Exported_Types 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @} 48 | */ 49 | 50 | /** @defgroup RTC_Exported_Constants 51 | * @{ 52 | */ 53 | 54 | /** @defgroup RTC_interrupts_define 55 | * @{ 56 | */ 57 | 58 | #define RTC_IT_OW ((uint16_t)0x0004) /*!< Overflow interrupt */ 59 | #define RTC_IT_ALR ((uint16_t)0x0002) /*!< Alarm interrupt */ 60 | #define RTC_IT_SEC ((uint16_t)0x0001) /*!< Second interrupt */ 61 | #define IS_RTC_IT(IT) ((((IT) & (uint16_t)0xFFF8) == 0x00) && ((IT) != 0x00)) 62 | #define IS_RTC_GET_IT(IT) (((IT) == RTC_IT_OW) || ((IT) == RTC_IT_ALR) || \ 63 | ((IT) == RTC_IT_SEC)) 64 | /** 65 | * @} 66 | */ 67 | 68 | /** @defgroup RTC_interrupts_flags 69 | * @{ 70 | */ 71 | 72 | #define RTC_FLAG_RTOFF ((uint16_t)0x0020) /*!< RTC Operation OFF flag */ 73 | #define RTC_FLAG_RSF ((uint16_t)0x0008) /*!< Registers Synchronized flag */ 74 | #define RTC_FLAG_OW ((uint16_t)0x0004) /*!< Overflow flag */ 75 | #define RTC_FLAG_ALR ((uint16_t)0x0002) /*!< Alarm flag */ 76 | #define RTC_FLAG_SEC ((uint16_t)0x0001) /*!< Second flag */ 77 | #define IS_RTC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFFF0) == 0x00) && ((FLAG) != 0x00)) 78 | #define IS_RTC_GET_FLAG(FLAG) (((FLAG) == RTC_FLAG_RTOFF) || ((FLAG) == RTC_FLAG_RSF) || \ 79 | ((FLAG) == RTC_FLAG_OW) || ((FLAG) == RTC_FLAG_ALR) || \ 80 | ((FLAG) == RTC_FLAG_SEC)) 81 | #define IS_RTC_PRESCALER(PRESCALER) ((PRESCALER) <= 0xFFFFF) 82 | 83 | /** 84 | * @} 85 | */ 86 | 87 | /** 88 | * @} 89 | */ 90 | 91 | /** @defgroup RTC_Exported_Macros 92 | * @{ 93 | */ 94 | 95 | /** 96 | * @} 97 | */ 98 | 99 | /** @defgroup RTC_Exported_Functions 100 | * @{ 101 | */ 102 | 103 | void RTC_ITConfig(uint16_t RTC_IT, FunctionalState NewState); 104 | void RTC_EnterConfigMode(void); 105 | void RTC_ExitConfigMode(void); 106 | uint32_t RTC_GetCounter(void); 107 | void RTC_SetCounter(uint32_t CounterValue); 108 | void RTC_SetPrescaler(uint32_t PrescalerValue); 109 | void RTC_SetAlarm(uint32_t AlarmValue); 110 | uint32_t RTC_GetDivider(void); 111 | void RTC_WaitForLastTask(void); 112 | void RTC_WaitForSynchro(void); 113 | FlagStatus RTC_GetFlagStatus(uint16_t RTC_FLAG); 114 | void RTC_ClearFlag(uint16_t RTC_FLAG); 115 | ITStatus RTC_GetITStatus(uint16_t RTC_IT); 116 | void RTC_ClearITPendingBit(uint16_t RTC_IT); 117 | 118 | #ifdef __cplusplus 119 | } 120 | #endif 121 | 122 | #endif /* __STM32F10x_RTC_H */ 123 | /** 124 | * @} 125 | */ 126 | 127 | /** 128 | * @} 129 | */ 130 | 131 | /** 132 | * @} 133 | */ 134 | 135 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 136 | -------------------------------------------------------------------------------- /Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_wwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_wwdg.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file contains all the functions prototypes for the WWDG firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ 24 | #ifndef __STM32F10x_WWDG_H 25 | #define __STM32F10x_WWDG_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f10x.h" 33 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup WWDG 39 | * @{ 40 | */ 41 | 42 | /** @defgroup WWDG_Exported_Types 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @} 48 | */ 49 | 50 | /** @defgroup WWDG_Exported_Constants 51 | * @{ 52 | */ 53 | 54 | /** @defgroup WWDG_Prescaler 55 | * @{ 56 | */ 57 | 58 | #define WWDG_Prescaler_1 ((uint32_t)0x00000000) 59 | #define WWDG_Prescaler_2 ((uint32_t)0x00000080) 60 | #define WWDG_Prescaler_4 ((uint32_t)0x00000100) 61 | #define WWDG_Prescaler_8 ((uint32_t)0x00000180) 62 | #define IS_WWDG_PRESCALER(PRESCALER) (((PRESCALER) == WWDG_Prescaler_1) || \ 63 | ((PRESCALER) == WWDG_Prescaler_2) || \ 64 | ((PRESCALER) == WWDG_Prescaler_4) || \ 65 | ((PRESCALER) == WWDG_Prescaler_8)) 66 | #define IS_WWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0x7F) 67 | #define IS_WWDG_COUNTER(COUNTER) (((COUNTER) >= 0x40) && ((COUNTER) <= 0x7F)) 68 | 69 | /** 70 | * @} 71 | */ 72 | 73 | /** 74 | * @} 75 | */ 76 | 77 | /** @defgroup WWDG_Exported_Macros 78 | * @{ 79 | */ 80 | /** 81 | * @} 82 | */ 83 | 84 | /** @defgroup WWDG_Exported_Functions 85 | * @{ 86 | */ 87 | 88 | void WWDG_DeInit(void); 89 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler); 90 | void WWDG_SetWindowValue(uint8_t WindowValue); 91 | void WWDG_EnableIT(void); 92 | void WWDG_SetCounter(uint8_t Counter); 93 | void WWDG_Enable(uint8_t Counter); 94 | FlagStatus WWDG_GetFlagStatus(void); 95 | void WWDG_ClearFlag(void); 96 | 97 | #ifdef __cplusplus 98 | } 99 | #endif 100 | 101 | #endif /* __STM32F10x_WWDG_H */ 102 | 103 | /** 104 | * @} 105 | */ 106 | 107 | /** 108 | * @} 109 | */ 110 | 111 | /** 112 | * @} 113 | */ 114 | 115 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 116 | -------------------------------------------------------------------------------- /Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_crc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_crc.c 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file provides all the CRC firmware functions. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 | * 18 | *

© COPYRIGHT 2011 STMicroelectronics

19 | ****************************************************************************** 20 | */ 21 | 22 | /* Includes ------------------------------------------------------------------*/ 23 | #include "stm32f10x_crc.h" 24 | 25 | /** @addtogroup STM32F10x_StdPeriph_Driver 26 | * @{ 27 | */ 28 | 29 | /** @defgroup CRC 30 | * @brief CRC driver modules 31 | * @{ 32 | */ 33 | 34 | /** @defgroup CRC_Private_TypesDefinitions 35 | * @{ 36 | */ 37 | 38 | /** 39 | * @} 40 | */ 41 | 42 | /** @defgroup CRC_Private_Defines 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @} 48 | */ 49 | 50 | /** @defgroup CRC_Private_Macros 51 | * @{ 52 | */ 53 | 54 | /** 55 | * @} 56 | */ 57 | 58 | /** @defgroup CRC_Private_Variables 59 | * @{ 60 | */ 61 | 62 | /** 63 | * @} 64 | */ 65 | 66 | /** @defgroup CRC_Private_FunctionPrototypes 67 | * @{ 68 | */ 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | /** @defgroup CRC_Private_Functions 75 | * @{ 76 | */ 77 | 78 | /** 79 | * @brief Resets the CRC Data register (DR). 80 | * @param None 81 | * @retval None 82 | */ 83 | void CRC_ResetDR(void) 84 | { 85 | /* Reset CRC generator */ 86 | CRC->CR = CRC_CR_RESET; 87 | } 88 | 89 | /** 90 | * @brief Computes the 32-bit CRC of a given data word(32-bit). 91 | * @param Data: data word(32-bit) to compute its CRC 92 | * @retval 32-bit CRC 93 | */ 94 | uint32_t CRC_CalcCRC(uint32_t Data) 95 | { 96 | CRC->DR = Data; 97 | 98 | return (CRC->DR); 99 | } 100 | 101 | /** 102 | * @brief Computes the 32-bit CRC of a given buffer of data word(32-bit). 103 | * @param pBuffer: pointer to the buffer containing the data to be computed 104 | * @param BufferLength: length of the buffer to be computed 105 | * @retval 32-bit CRC 106 | */ 107 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength) 108 | { 109 | uint32_t index = 0; 110 | 111 | for(index = 0; index < BufferLength; index++) 112 | { 113 | CRC->DR = pBuffer[index]; 114 | } 115 | return (CRC->DR); 116 | } 117 | 118 | /** 119 | * @brief Returns the current CRC value. 120 | * @param None 121 | * @retval 32-bit CRC 122 | */ 123 | uint32_t CRC_GetCRC(void) 124 | { 125 | return (CRC->DR); 126 | } 127 | 128 | /** 129 | * @brief Stores a 8-bit data in the Independent Data(ID) register. 130 | * @param IDValue: 8-bit value to be stored in the ID register 131 | * @retval None 132 | */ 133 | void CRC_SetIDRegister(uint8_t IDValue) 134 | { 135 | CRC->IDR = IDValue; 136 | } 137 | 138 | /** 139 | * @brief Returns the 8-bit data stored in the Independent Data(ID) register 140 | * @param None 141 | * @retval 8-bit value of the ID register 142 | */ 143 | uint8_t CRC_GetIDRegister(void) 144 | { 145 | return (CRC->IDR); 146 | } 147 | 148 | /** 149 | * @} 150 | */ 151 | 152 | /** 153 | * @} 154 | */ 155 | 156 | /** 157 | * @} 158 | */ 159 | 160 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 161 | -------------------------------------------------------------------------------- /Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dbgmcu.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_dbgmcu.c 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file provides all the DBGMCU firmware functions. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 | * 18 | *

© COPYRIGHT 2011 STMicroelectronics

19 | ****************************************************************************** 20 | */ 21 | 22 | /* Includes ------------------------------------------------------------------*/ 23 | #include "stm32f10x_dbgmcu.h" 24 | 25 | /** @addtogroup STM32F10x_StdPeriph_Driver 26 | * @{ 27 | */ 28 | 29 | /** @defgroup DBGMCU 30 | * @brief DBGMCU driver modules 31 | * @{ 32 | */ 33 | 34 | /** @defgroup DBGMCU_Private_TypesDefinitions 35 | * @{ 36 | */ 37 | 38 | /** 39 | * @} 40 | */ 41 | 42 | /** @defgroup DBGMCU_Private_Defines 43 | * @{ 44 | */ 45 | 46 | #define IDCODE_DEVID_MASK ((uint32_t)0x00000FFF) 47 | /** 48 | * @} 49 | */ 50 | 51 | /** @defgroup DBGMCU_Private_Macros 52 | * @{ 53 | */ 54 | 55 | /** 56 | * @} 57 | */ 58 | 59 | /** @defgroup DBGMCU_Private_Variables 60 | * @{ 61 | */ 62 | 63 | /** 64 | * @} 65 | */ 66 | 67 | /** @defgroup DBGMCU_Private_FunctionPrototypes 68 | * @{ 69 | */ 70 | 71 | /** 72 | * @} 73 | */ 74 | 75 | /** @defgroup DBGMCU_Private_Functions 76 | * @{ 77 | */ 78 | 79 | /** 80 | * @brief Returns the device revision identifier. 81 | * @param None 82 | * @retval Device revision identifier 83 | */ 84 | uint32_t DBGMCU_GetREVID(void) 85 | { 86 | return(DBGMCU->IDCODE >> 16); 87 | } 88 | 89 | /** 90 | * @brief Returns the device identifier. 91 | * @param None 92 | * @retval Device identifier 93 | */ 94 | uint32_t DBGMCU_GetDEVID(void) 95 | { 96 | return(DBGMCU->IDCODE & IDCODE_DEVID_MASK); 97 | } 98 | 99 | /** 100 | * @brief Configures the specified peripheral and low power mode behavior 101 | * when the MCU under Debug mode. 102 | * @param DBGMCU_Periph: specifies the peripheral and low power mode. 103 | * This parameter can be any combination of the following values: 104 | * @arg DBGMCU_SLEEP: Keep debugger connection during SLEEP mode 105 | * @arg DBGMCU_STOP: Keep debugger connection during STOP mode 106 | * @arg DBGMCU_STANDBY: Keep debugger connection during STANDBY mode 107 | * @arg DBGMCU_IWDG_STOP: Debug IWDG stopped when Core is halted 108 | * @arg DBGMCU_WWDG_STOP: Debug WWDG stopped when Core is halted 109 | * @arg DBGMCU_TIM1_STOP: TIM1 counter stopped when Core is halted 110 | * @arg DBGMCU_TIM2_STOP: TIM2 counter stopped when Core is halted 111 | * @arg DBGMCU_TIM3_STOP: TIM3 counter stopped when Core is halted 112 | * @arg DBGMCU_TIM4_STOP: TIM4 counter stopped when Core is halted 113 | * @arg DBGMCU_CAN1_STOP: Debug CAN2 stopped when Core is halted 114 | * @arg DBGMCU_I2C1_SMBUS_TIMEOUT: I2C1 SMBUS timeout mode stopped when Core is halted 115 | * @arg DBGMCU_I2C2_SMBUS_TIMEOUT: I2C2 SMBUS timeout mode stopped when Core is halted 116 | * @arg DBGMCU_TIM5_STOP: TIM5 counter stopped when Core is halted 117 | * @arg DBGMCU_TIM6_STOP: TIM6 counter stopped when Core is halted 118 | * @arg DBGMCU_TIM7_STOP: TIM7 counter stopped when Core is halted 119 | * @arg DBGMCU_TIM8_STOP: TIM8 counter stopped when Core is halted 120 | * @arg DBGMCU_CAN2_STOP: Debug CAN2 stopped when Core is halted 121 | * @arg DBGMCU_TIM15_STOP: TIM15 counter stopped when Core is halted 122 | * @arg DBGMCU_TIM16_STOP: TIM16 counter stopped when Core is halted 123 | * @arg DBGMCU_TIM17_STOP: TIM17 counter stopped when Core is halted 124 | * @arg DBGMCU_TIM9_STOP: TIM9 counter stopped when Core is halted 125 | * @arg DBGMCU_TIM10_STOP: TIM10 counter stopped when Core is halted 126 | * @arg DBGMCU_TIM11_STOP: TIM11 counter stopped when Core is halted 127 | * @arg DBGMCU_TIM12_STOP: TIM12 counter stopped when Core is halted 128 | * @arg DBGMCU_TIM13_STOP: TIM13 counter stopped when Core is halted 129 | * @arg DBGMCU_TIM14_STOP: TIM14 counter stopped when Core is halted 130 | * @param NewState: new state of the specified peripheral in Debug mode. 131 | * This parameter can be: ENABLE or DISABLE. 132 | * @retval None 133 | */ 134 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState) 135 | { 136 | /* Check the parameters */ 137 | assert_param(IS_DBGMCU_PERIPH(DBGMCU_Periph)); 138 | assert_param(IS_FUNCTIONAL_STATE(NewState)); 139 | 140 | if (NewState != DISABLE) 141 | { 142 | DBGMCU->CR |= DBGMCU_Periph; 143 | } 144 | else 145 | { 146 | DBGMCU->CR &= ~DBGMCU_Periph; 147 | } 148 | } 149 | 150 | /** 151 | * @} 152 | */ 153 | 154 | /** 155 | * @} 156 | */ 157 | 158 | /** 159 | * @} 160 | */ 161 | 162 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 163 | -------------------------------------------------------------------------------- /Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_flash.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_flash.c -------------------------------------------------------------------------------- /Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_i2c.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_i2c.c -------------------------------------------------------------------------------- /Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_iwdg.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_iwdg.c 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file provides all the IWDG firmware functions. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 | * 18 | *

© COPYRIGHT 2011 STMicroelectronics

19 | ****************************************************************************** 20 | */ 21 | 22 | /* Includes ------------------------------------------------------------------*/ 23 | #include "stm32f10x_iwdg.h" 24 | 25 | /** @addtogroup STM32F10x_StdPeriph_Driver 26 | * @{ 27 | */ 28 | 29 | /** @defgroup IWDG 30 | * @brief IWDG driver modules 31 | * @{ 32 | */ 33 | 34 | /** @defgroup IWDG_Private_TypesDefinitions 35 | * @{ 36 | */ 37 | 38 | /** 39 | * @} 40 | */ 41 | 42 | /** @defgroup IWDG_Private_Defines 43 | * @{ 44 | */ 45 | 46 | /* ---------------------- IWDG registers bit mask ----------------------------*/ 47 | 48 | /* KR register bit mask */ 49 | #define KR_KEY_Reload ((uint16_t)0xAAAA) 50 | #define KR_KEY_Enable ((uint16_t)0xCCCC) 51 | 52 | /** 53 | * @} 54 | */ 55 | 56 | /** @defgroup IWDG_Private_Macros 57 | * @{ 58 | */ 59 | 60 | /** 61 | * @} 62 | */ 63 | 64 | /** @defgroup IWDG_Private_Variables 65 | * @{ 66 | */ 67 | 68 | /** 69 | * @} 70 | */ 71 | 72 | /** @defgroup IWDG_Private_FunctionPrototypes 73 | * @{ 74 | */ 75 | 76 | /** 77 | * @} 78 | */ 79 | 80 | /** @defgroup IWDG_Private_Functions 81 | * @{ 82 | */ 83 | 84 | /** 85 | * @brief Enables or disables write access to IWDG_PR and IWDG_RLR registers. 86 | * @param IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers. 87 | * This parameter can be one of the following values: 88 | * @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers 89 | * @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers 90 | * @retval None 91 | */ 92 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess) 93 | { 94 | /* Check the parameters */ 95 | assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess)); 96 | IWDG->KR = IWDG_WriteAccess; 97 | } 98 | 99 | /** 100 | * @brief Sets IWDG Prescaler value. 101 | * @param IWDG_Prescaler: specifies the IWDG Prescaler value. 102 | * This parameter can be one of the following values: 103 | * @arg IWDG_Prescaler_4: IWDG prescaler set to 4 104 | * @arg IWDG_Prescaler_8: IWDG prescaler set to 8 105 | * @arg IWDG_Prescaler_16: IWDG prescaler set to 16 106 | * @arg IWDG_Prescaler_32: IWDG prescaler set to 32 107 | * @arg IWDG_Prescaler_64: IWDG prescaler set to 64 108 | * @arg IWDG_Prescaler_128: IWDG prescaler set to 128 109 | * @arg IWDG_Prescaler_256: IWDG prescaler set to 256 110 | * @retval None 111 | */ 112 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler) 113 | { 114 | /* Check the parameters */ 115 | assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler)); 116 | IWDG->PR = IWDG_Prescaler; 117 | } 118 | 119 | /** 120 | * @brief Sets IWDG Reload value. 121 | * @param Reload: specifies the IWDG Reload value. 122 | * This parameter must be a number between 0 and 0x0FFF. 123 | * @retval None 124 | */ 125 | void IWDG_SetReload(uint16_t Reload) 126 | { 127 | /* Check the parameters */ 128 | assert_param(IS_IWDG_RELOAD(Reload)); 129 | IWDG->RLR = Reload; 130 | } 131 | 132 | /** 133 | * @brief Reloads IWDG counter with value defined in the reload register 134 | * (write access to IWDG_PR and IWDG_RLR registers disabled). 135 | * @param None 136 | * @retval None 137 | */ 138 | void IWDG_ReloadCounter(void) 139 | { 140 | IWDG->KR = KR_KEY_Reload; 141 | } 142 | 143 | /** 144 | * @brief Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled). 145 | * @param None 146 | * @retval None 147 | */ 148 | void IWDG_Enable(void) 149 | { 150 | IWDG->KR = KR_KEY_Enable; 151 | } 152 | 153 | /** 154 | * @brief Checks whether the specified IWDG flag is set or not. 155 | * @param IWDG_FLAG: specifies the flag to check. 156 | * This parameter can be one of the following values: 157 | * @arg IWDG_FLAG_PVU: Prescaler Value Update on going 158 | * @arg IWDG_FLAG_RVU: Reload Value Update on going 159 | * @retval The new state of IWDG_FLAG (SET or RESET). 160 | */ 161 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG) 162 | { 163 | FlagStatus bitstatus = RESET; 164 | /* Check the parameters */ 165 | assert_param(IS_IWDG_FLAG(IWDG_FLAG)); 166 | if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET) 167 | { 168 | bitstatus = SET; 169 | } 170 | else 171 | { 172 | bitstatus = RESET; 173 | } 174 | /* Return the flag status */ 175 | return bitstatus; 176 | } 177 | 178 | /** 179 | * @} 180 | */ 181 | 182 | /** 183 | * @} 184 | */ 185 | 186 | /** 187 | * @} 188 | */ 189 | 190 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 191 | -------------------------------------------------------------------------------- /Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c -------------------------------------------------------------------------------- /Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_wwdg.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_wwdg.c 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file provides all the WWDG firmware functions. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 | * 18 | *

© COPYRIGHT 2011 STMicroelectronics

19 | ****************************************************************************** 20 | */ 21 | 22 | /* Includes ------------------------------------------------------------------*/ 23 | #include "stm32f10x_wwdg.h" 24 | #include "stm32f10x_rcc.h" 25 | 26 | /** @addtogroup STM32F10x_StdPeriph_Driver 27 | * @{ 28 | */ 29 | 30 | /** @defgroup WWDG 31 | * @brief WWDG driver modules 32 | * @{ 33 | */ 34 | 35 | /** @defgroup WWDG_Private_TypesDefinitions 36 | * @{ 37 | */ 38 | 39 | /** 40 | * @} 41 | */ 42 | 43 | /** @defgroup WWDG_Private_Defines 44 | * @{ 45 | */ 46 | 47 | /* ----------- WWDG registers bit address in the alias region ----------- */ 48 | #define WWDG_OFFSET (WWDG_BASE - PERIPH_BASE) 49 | 50 | /* Alias word address of EWI bit */ 51 | #define CFR_OFFSET (WWDG_OFFSET + 0x04) 52 | #define EWI_BitNumber 0x09 53 | #define CFR_EWI_BB (PERIPH_BB_BASE + (CFR_OFFSET * 32) + (EWI_BitNumber * 4)) 54 | 55 | /* --------------------- WWDG registers bit mask ------------------------ */ 56 | 57 | /* CR register bit mask */ 58 | #define CR_WDGA_Set ((uint32_t)0x00000080) 59 | 60 | /* CFR register bit mask */ 61 | #define CFR_WDGTB_Mask ((uint32_t)0xFFFFFE7F) 62 | #define CFR_W_Mask ((uint32_t)0xFFFFFF80) 63 | #define BIT_Mask ((uint8_t)0x7F) 64 | 65 | /** 66 | * @} 67 | */ 68 | 69 | /** @defgroup WWDG_Private_Macros 70 | * @{ 71 | */ 72 | 73 | /** 74 | * @} 75 | */ 76 | 77 | /** @defgroup WWDG_Private_Variables 78 | * @{ 79 | */ 80 | 81 | /** 82 | * @} 83 | */ 84 | 85 | /** @defgroup WWDG_Private_FunctionPrototypes 86 | * @{ 87 | */ 88 | 89 | /** 90 | * @} 91 | */ 92 | 93 | /** @defgroup WWDG_Private_Functions 94 | * @{ 95 | */ 96 | 97 | /** 98 | * @brief Deinitializes the WWDG peripheral registers to their default reset values. 99 | * @param None 100 | * @retval None 101 | */ 102 | void WWDG_DeInit(void) 103 | { 104 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE); 105 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE); 106 | } 107 | 108 | /** 109 | * @brief Sets the WWDG Prescaler. 110 | * @param WWDG_Prescaler: specifies the WWDG Prescaler. 111 | * This parameter can be one of the following values: 112 | * @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1 113 | * @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2 114 | * @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4 115 | * @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8 116 | * @retval None 117 | */ 118 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler) 119 | { 120 | uint32_t tmpreg = 0; 121 | /* Check the parameters */ 122 | assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler)); 123 | /* Clear WDGTB[1:0] bits */ 124 | tmpreg = WWDG->CFR & CFR_WDGTB_Mask; 125 | /* Set WDGTB[1:0] bits according to WWDG_Prescaler value */ 126 | tmpreg |= WWDG_Prescaler; 127 | /* Store the new value */ 128 | WWDG->CFR = tmpreg; 129 | } 130 | 131 | /** 132 | * @brief Sets the WWDG window value. 133 | * @param WindowValue: specifies the window value to be compared to the downcounter. 134 | * This parameter value must be lower than 0x80. 135 | * @retval None 136 | */ 137 | void WWDG_SetWindowValue(uint8_t WindowValue) 138 | { 139 | __IO uint32_t tmpreg = 0; 140 | 141 | /* Check the parameters */ 142 | assert_param(IS_WWDG_WINDOW_VALUE(WindowValue)); 143 | /* Clear W[6:0] bits */ 144 | 145 | tmpreg = WWDG->CFR & CFR_W_Mask; 146 | 147 | /* Set W[6:0] bits according to WindowValue value */ 148 | tmpreg |= WindowValue & (uint32_t) BIT_Mask; 149 | 150 | /* Store the new value */ 151 | WWDG->CFR = tmpreg; 152 | } 153 | 154 | /** 155 | * @brief Enables the WWDG Early Wakeup interrupt(EWI). 156 | * @param None 157 | * @retval None 158 | */ 159 | void WWDG_EnableIT(void) 160 | { 161 | *(__IO uint32_t *) CFR_EWI_BB = (uint32_t)ENABLE; 162 | } 163 | 164 | /** 165 | * @brief Sets the WWDG counter value. 166 | * @param Counter: specifies the watchdog counter value. 167 | * This parameter must be a number between 0x40 and 0x7F. 168 | * @retval None 169 | */ 170 | void WWDG_SetCounter(uint8_t Counter) 171 | { 172 | /* Check the parameters */ 173 | assert_param(IS_WWDG_COUNTER(Counter)); 174 | /* Write to T[6:0] bits to configure the counter value, no need to do 175 | a read-modify-write; writing a 0 to WDGA bit does nothing */ 176 | WWDG->CR = Counter & BIT_Mask; 177 | } 178 | 179 | /** 180 | * @brief Enables WWDG and load the counter value. 181 | * @param Counter: specifies the watchdog counter value. 182 | * This parameter must be a number between 0x40 and 0x7F. 183 | * @retval None 184 | */ 185 | void WWDG_Enable(uint8_t Counter) 186 | { 187 | /* Check the parameters */ 188 | assert_param(IS_WWDG_COUNTER(Counter)); 189 | WWDG->CR = CR_WDGA_Set | Counter; 190 | } 191 | 192 | /** 193 | * @brief Checks whether the Early Wakeup interrupt flag is set or not. 194 | * @param None 195 | * @retval The new state of the Early Wakeup interrupt flag (SET or RESET) 196 | */ 197 | FlagStatus WWDG_GetFlagStatus(void) 198 | { 199 | return (FlagStatus)(WWDG->SR); 200 | } 201 | 202 | /** 203 | * @brief Clears Early Wakeup interrupt flag. 204 | * @param None 205 | * @retval None 206 | */ 207 | void WWDG_ClearFlag(void) 208 | { 209 | WWDG->SR = (uint32_t)RESET; 210 | } 211 | 212 | /** 213 | * @} 214 | */ 215 | 216 | /** 217 | * @} 218 | */ 219 | 220 | /** 221 | * @} 222 | */ 223 | 224 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 225 | -------------------------------------------------------------------------------- /Projects/Examples/Applications/app_remap_led.h: -------------------------------------------------------------------------------- 1 | #ifdef BSP_BOARD_EXP461x 2 | 3 | #undef BSP_TURN_ON_LED2 4 | #undef BSP_TURN_OFF_LED2 5 | #undef BSP_TOGGLE_LED2 6 | #undef BSP_LED2_IS_ON 7 | 8 | #define BSP_TURN_ON_LED2() BSP_TURN_ON_LED3() 9 | #define BSP_TURN_OFF_LED2() BSP_TURN_OFF_LED3() 10 | #define BSP_TOGGLE_LED2() BSP_TOGGLE_LED3() 11 | #define BSP_LED2_IS_ON() BSP_LED3_IS_ON() 12 | 13 | #endif 14 | -------------------------------------------------------------------------------- /Projects/Examples/Applications/main_2EDOnePolls.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Projects/Examples/Applications/main_2EDOnePolls.c -------------------------------------------------------------------------------- /Projects/Examples/Applications/main_AP_Async_Listen.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Projects/Examples/Applications/main_AP_Async_Listen.c -------------------------------------------------------------------------------- /Projects/Examples/Applications/main_AP_Async_Listen_autoack.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Projects/Examples/Applications/main_AP_Async_Listen_autoack.c -------------------------------------------------------------------------------- /Projects/Examples/Applications/main_AP_RE.c: -------------------------------------------------------------------------------- 1 | #include "bsp.h" 2 | #include "mrfi.h" 3 | #include "bsp_leds.h" 4 | #include "nwk_types.h" 5 | #include "nwk_api.h" 6 | #include "nwk_pll.h" 7 | 8 | /* For FHSS systems, calls to NWK_DELAY() will also call nwk_pllBackgrounder() 9 | * during the delay time so if you use the system delay mechanism in a loop, 10 | * you don't need to also call the nwk_pllBackgrounder() function. 11 | */ 12 | #define SPIN_ABOUT_A_SECOND NWK_DELAY(1000) 13 | 14 | void toggleLED(uint8_t); 15 | void createRandomAddress(addr_t * lAddr); 16 | 17 | int main (void) 18 | { 19 | BSP_Init(); 20 | 21 | /* If an on-the-fly device address is generated it must be done before the 22 | * call to SMPL_Init(). If the address is set here the ROM value will not 23 | * be used. If SMPL_Init() runs before this IOCTL is used the IOCTL call 24 | * will not take effect. One shot only. The IOCTL call below is conformal. 25 | */ 26 | #ifdef I_WANT_TO_CHANGE_DEFAULT_ROM_DEVICE_ADDRESS_PSEUDO_CODE 27 | { 28 | addr_t lAddr; 29 | 30 | createRandomAddress(&lAddr); 31 | SMPL_Ioctl(IOCTL_OBJ_ADDR, IOCTL_ACT_SET, &lAddr); 32 | } 33 | #endif /* I_WANT_TO_CHANGE_DEFAULT_ROM_DEVICE_ADDRESS_PSEUDO_CODE */ 34 | 35 | /* On FHSS systems the call to SMPL_Init will not return until we have 36 | * locked onto a reference clock. Also, on return the radio will always 37 | * be on in receive mode (at least for now). 38 | */ 39 | 40 | while (SMPL_SUCCESS != SMPL_Init((uint8_t (*)(linkID_t))0)) 41 | { 42 | toggleLED(1); 43 | toggleLED(2); 44 | SPIN_ABOUT_A_SECOND; 45 | } 46 | 47 | toggleLED(1); 48 | toggleLED(2); 49 | 50 | #ifdef ACCESS_POINT 51 | /* This code example changes the Link token to be distributed to those who 52 | * Join. For the example here this should be done before anyone joins so 53 | * the Join context is defaulted to OFF for this scenario. See the 54 | * smpl_config.dat file. After the link token is set the Join context must 55 | * be enabled. 56 | * 57 | * NOTE that this is done after initialization. For APs the init sequence 58 | * consists of a step in which a link token is generated. The sequence here 59 | * overrides that setting. It can be used to distribute different link tokens 60 | * to different devices. The sequence here is a simple example of how to use 61 | * the IOCTL interface to set the Link token for subsequent Joiners. 62 | * 63 | * You might want to be careful about following this particular example if you 64 | * are restoring from NV unless you are setting a fixed value as is done here. 65 | * Unconditionally setting a random value will make it esentially impossible 66 | * for newly joining devices to link to devices that joined before the AP was 67 | * reset since they will have different link tokens. 68 | */ 69 | { 70 | ioctlToken_t t; 71 | 72 | t.tokenType = TT_LINK; 73 | t.token.linkToken = 0x78563412; 74 | 75 | SMPL_Ioctl(IOCTL_OBJ_TOKEN, IOCTL_ACT_SET, &t); 76 | 77 | /* enable join context */ 78 | SMPL_Ioctl(IOCTL_OBJ_AP_JOIN, IOCTL_ACT_ON, 0); 79 | } 80 | #endif 81 | 82 | while (1) 83 | FHSS_ACTIVE( nwk_pllBackgrounder( false ) ); /* manage FHSS */ 84 | } 85 | 86 | void toggleLED(uint8_t which) 87 | { 88 | if (1 == which) { BSP_TOGGLE_LED1(); } 89 | else if (2 == which) { BSP_TOGGLE_LED2(); } 90 | } 91 | -------------------------------------------------------------------------------- /Projects/Examples/Applications/main_ED_Sniffer.c: -------------------------------------------------------------------------------- 1 | #include "bsp.h" 2 | #include "mrfi.h" 3 | #include "nwk_types.h" 4 | #include "nwk_api.h" 5 | #include "bsp_leds.h" 6 | #include "bsp_buttons.h" 7 | 8 | /* SANITY CHECKS */ 9 | #if defined( BSP_BOARD_RFUSB ) 10 | #error ERROR: RFUSB does not support default channel sniffer build (has only 1 LED) 11 | #endif 12 | 13 | #if ( NUM_CONNECTIONS > 0 ) 14 | #error ERROR: NUM_CONNECTIONS must be 0 when building channel sniffer 15 | #endif 16 | 17 | #ifndef FREQUENCY_AGILITY 18 | #error ERROR: FREQUENCY_AGILITY must be defined when building channel sniffer 19 | #endif 20 | /* END SANITY CHECKS */ 21 | 22 | #define SPIN_ABOUT_A_SECOND NWK_DELAY(1000) 23 | #define SPIN_ABOUT_A_QUARTER_SECOND NWK_DELAY(250) 24 | 25 | static void toggleLED(uint8_t); 26 | 27 | int main (void) 28 | { 29 | ioctlScanChan_t scan; 30 | freqEntry_t freq[NWK_FREQ_TBL_SIZE]; 31 | uint8_t firstTimeThru = 1; 32 | 33 | BSP_Init(); 34 | 35 | /* Keep trying to join (a side effect of successful initialization) until 36 | * successful. Toggle LEDS to indicate that joining has not occurred. 37 | */ 38 | while (SMPL_SUCCESS != SMPL_Init(0)) 39 | { 40 | toggleLED(1); 41 | toggleLED(2); 42 | SPIN_ABOUT_A_SECOND; 43 | } 44 | 45 | scan.freq = freq; 46 | while (1) 47 | { 48 | SPIN_ABOUT_A_QUARTER_SECOND; 49 | 50 | SMPL_Ioctl(IOCTL_OBJ_FREQ, IOCTL_ACT_SCAN, &scan); 51 | if (1 == scan.numChan) 52 | { 53 | if (firstTimeThru) 54 | { 55 | BSP_TURN_OFF_LED1(); 56 | BSP_TURN_ON_LED2(); 57 | { 58 | uint8_t i = 15; 59 | while (i--) 60 | { 61 | toggleLED(1); 62 | toggleLED(2); 63 | SPIN_ABOUT_A_QUARTER_SECOND; 64 | } 65 | } 66 | firstTimeThru = 0; 67 | } 68 | switch(freq[0].logicalChan) 69 | { 70 | case 0: 71 | /* GREEN OFF */ 72 | /* RED OFF */ 73 | BSP_TURN_OFF_LED1(); 74 | BSP_TURN_OFF_LED2(); 75 | break; 76 | 77 | case 1: 78 | /* GREEN OFF */ 79 | /* RED ON */ 80 | BSP_TURN_OFF_LED1(); 81 | BSP_TURN_ON_LED2(); 82 | break; 83 | 84 | case 2: 85 | /* GREEN ON */ 86 | /* RED OFF */ 87 | BSP_TURN_ON_LED1(); 88 | BSP_TURN_OFF_LED2(); 89 | break; 90 | 91 | case 3: 92 | /* GREEN ON */ 93 | /* RED ON */ 94 | BSP_TURN_ON_LED1(); 95 | BSP_TURN_ON_LED2(); 96 | break; 97 | 98 | case 4: 99 | /* blink them both... */ 100 | BSP_TURN_OFF_LED1(); 101 | BSP_TURN_OFF_LED2(); 102 | SPIN_ABOUT_A_QUARTER_SECOND; 103 | BSP_TURN_ON_LED1(); 104 | BSP_TURN_ON_LED2(); 105 | SPIN_ABOUT_A_QUARTER_SECOND; 106 | BSP_TURN_OFF_LED1(); 107 | BSP_TURN_OFF_LED2(); 108 | } 109 | } 110 | } 111 | } 112 | 113 | static void toggleLED(uint8_t which) 114 | { 115 | if (1 == which) { BSP_TOGGLE_LED1(); } 116 | else if (2 == which) { BSP_TOGGLE_LED2(); } 117 | return; 118 | } 119 | -------------------------------------------------------------------------------- /Projects/Examples/Applications/main_LinkListen.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Projects/Examples/Applications/main_LinkListen.c -------------------------------------------------------------------------------- /Projects/Examples/Applications/main_LinkTo.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Projects/Examples/Applications/main_LinkTo.c -------------------------------------------------------------------------------- /Projects/Examples/Applications/main_UART_Bridge.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Projects/Examples/Applications/main_UART_Bridge.c -------------------------------------------------------------------------------- /Projects/Examples/Applications/main_babble.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Projects/Examples/Applications/main_babble.c -------------------------------------------------------------------------------- /Projects/Examples/Applications/main_manyEDs.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Projects/Examples/Applications/main_manyEDs.c -------------------------------------------------------------------------------- /Projects/Examples/Applications/main_manyEDs_autoack.c: -------------------------------------------------------------------------------- 1 | #include "bsp.h" 2 | #include "mrfi.h" 3 | #include "nwk_types.h" 4 | #include "nwk_api.h" 5 | #include "bsp_leds.h" 6 | #include "bsp_buttons.h" 7 | #include "nwk_pll.h" 8 | 9 | #ifndef APP_AUTO_ACK 10 | #error ERROR: Must define the macro APP_AUTO_ACK for this application. 11 | #endif 12 | 13 | void toggleLED(uint8_t); 14 | void linkTo(void); 15 | void createRandomAddress(addr_t * lAddr); 16 | 17 | static uint8_t sTid = 0; 18 | static linkID_t sLinkID1 = 0; 19 | 20 | #define SPIN_ABOUT_A_SECOND NWK_DELAY(1000) 21 | #define SPIN_ABOUT_A_QUARTER_SECOND NWK_DELAY(250) 22 | 23 | /* How many times to try a Tx and miss an acknowledge before doing a scan */ 24 | #define MISSES_IN_A_ROW 2 25 | 26 | int main (void) 27 | { 28 | BSP_Init(); 29 | 30 | /* If an on-the-fly device address is generated it must be done before the 31 | * call to SMPL_Init(). If the address is set here the ROM value will not 32 | * be used. If SMPL_Init() runs before this IOCTL is used the IOCTL call 33 | * will not take effect. One shot only. The IOCTL call below is conformal. 34 | */ 35 | #ifdef I_WANT_TO_CHANGE_DEFAULT_ROM_DEVICE_ADDRESS_PSEUDO_CODE 36 | { 37 | addr_t lAddr; 38 | createRandomAddress(&lAddr); 39 | SMPL_Ioctl(IOCTL_OBJ_ADDR, IOCTL_ACT_SET, &lAddr); 40 | } 41 | #endif /* I_WANT_TO_CHANGE_DEFAULT_ROM_DEVICE_ADDRESS_PSEUDO_CODE */ 42 | 43 | /* Keep trying to join (a side effect of successful initialization) until 44 | * successful. Toggle LEDS to indicate that joining has not occurred. 45 | */ 46 | while (SMPL_SUCCESS != SMPL_Init(NULL)) 47 | { 48 | toggleLED(1); 49 | toggleLED(2); 50 | SPIN_ABOUT_A_SECOND; /* calls nwk_pllBackgrounder for us */ 51 | } 52 | 53 | /* LEDs on solid to indicate successful join. */ 54 | if (!BSP_LED2_IS_ON()) { toggleLED(2); } 55 | if (!BSP_LED1_IS_ON()) { toggleLED(1); } 56 | 57 | /* Unconditional link to AP which is listening due to successful join. */ 58 | linkTo(); 59 | 60 | while (1) 61 | FHSS_ACTIVE( nwk_pllBackgrounder( false ) ); 62 | } 63 | 64 | void linkTo() 65 | { 66 | uint8_t msg[2]; 67 | uint8_t button, misses, done; 68 | 69 | /* Keep trying to link... */ 70 | while (SMPL_SUCCESS != SMPL_Link(&sLinkID1)) 71 | { 72 | toggleLED(1); 73 | toggleLED(2); 74 | SPIN_ABOUT_A_SECOND; /* calls nwk_pllBackgrounder for us */ 75 | } 76 | 77 | /* Turn off LEDs. */ 78 | if (BSP_LED2_IS_ON()) { toggleLED(2); } 79 | if (BSP_LED1_IS_ON()) { toggleLED(1); } 80 | 81 | #ifndef FREQUENCY_HOPPING 82 | /* sleep until button press... */ 83 | SMPL_Ioctl( IOCTL_OBJ_RADIO, IOCTL_ACT_RADIO_SLEEP, 0); 84 | #endif 85 | 86 | while (1) 87 | { 88 | /* keep the FHSS scheduler happy */ 89 | FHSS_ACTIVE( nwk_pllBackgrounder( false ) ); 90 | 91 | button = 0; 92 | /* Send a message when either button pressed */ 93 | if (BSP_BUTTON1()) 94 | { /* calls nwk_pllBackgrounder for us */ 95 | SPIN_ABOUT_A_QUARTER_SECOND; /* debounce... */ 96 | /* Message to toggle LED 1. */ 97 | button = 1; 98 | } 99 | else if (BSP_BUTTON2()) 100 | { /* calls nwk_pllBackgrounder for us */ 101 | SPIN_ABOUT_A_QUARTER_SECOND; /* debounce... */ 102 | /* Message to toggle LED 2. */ 103 | button = 2; 104 | } 105 | if (button) 106 | { 107 | uint8_t noAck; 108 | smplStatus_t rc; 109 | 110 | #ifndef FREQUENCY_HOPPING 111 | /* get radio ready...awakens in idle state */ 112 | SMPL_Ioctl( IOCTL_OBJ_RADIO, IOCTL_ACT_RADIO_AWAKE, 0); 113 | #endif 114 | 115 | /* Set TID and designate which LED to toggle */ 116 | msg[1] = ++sTid; 117 | msg[0] = (button == 1) ? 1 : 2; 118 | done = 0; 119 | while (!done) 120 | { 121 | noAck = 0; 122 | 123 | /* Try sending message MISSES_IN_A_ROW times looking for ack */ 124 | for (misses=0; misses < MISSES_IN_A_ROW; ++misses) 125 | { 126 | if (SMPL_SUCCESS == (rc = SMPL_SendOpt(sLinkID1, msg, sizeof(msg), SMPL_TXOPTION_ACKREQ))) 127 | { 128 | /* Message acked. We're done. Toggle LED 1 to indicate ack received. */ 129 | toggleLED(1); 130 | break; 131 | } 132 | if (SMPL_NO_ACK == rc) 133 | { 134 | /* Count ack failures. Could also fail becuase of CCA and 135 | * we don't want to scan in this case. 136 | */ 137 | noAck++; 138 | } 139 | } 140 | if (MISSES_IN_A_ROW == noAck) 141 | { 142 | /* Message not acked. Toggle LED 2. */ 143 | toggleLED(2); 144 | #ifdef FREQUENCY_AGILITY 145 | /* Assume we're on the wrong channel so look for channel by 146 | * using the Ping to initiate a scan when it gets no reply. With 147 | * a successful ping try sending the message again. Otherwise, 148 | * for any error we get we will wait until the next button 149 | * press to try again. 150 | */ 151 | if (SMPL_SUCCESS != SMPL_Ping(sLinkID1)) 152 | { 153 | done = 1; 154 | } 155 | #else 156 | done = 1; 157 | #endif /* FREQUENCY_AGILITY */ 158 | } 159 | else 160 | { 161 | /* Got the ack or we don't care. We're done. */ 162 | done = 1; 163 | } 164 | } 165 | 166 | #ifndef FREQUENCY_HOPPING 167 | /* radio back to sleep */ 168 | SMPL_Ioctl( IOCTL_OBJ_RADIO, IOCTL_ACT_RADIO_SLEEP, 0); 169 | #endif 170 | } 171 | } 172 | } 173 | 174 | 175 | void toggleLED(uint8_t which) 176 | { 177 | if (1 == which) { BSP_TOGGLE_LED1(); } 178 | else if (2 == which) { BSP_TOGGLE_LED2(); } 179 | return; 180 | } 181 | 182 | -------------------------------------------------------------------------------- /Projects/Examples/STM32/AP_as_Data_Hub/IAR/Ap_as_Data_Hub.eww: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | $WS_DIR$\Ap_as_Data_Hub.ewp 6 | 7 | 8 | 9 | All Devices 10 | 11 | Ap_as_Data_Hub 12 | CC1100-LinkTo 13 | 14 | 15 | Ap_as_Data_Hub 16 | CC1100-LinkListen 17 | 18 | 19 | Ap_as_Data_Hub 20 | CC1101-Linkto 21 | 22 | 23 | Ap_as_Data_Hub 24 | CC1101-LinkListen 25 | 26 | 27 | Ap_as_Data_Hub 28 | CC1100E-LinkTo 29 | 30 | 31 | Ap_as_Data_Hub 32 | CC1100E-LinkListen 33 | 34 | 35 | Ap_as_Data_Hub 36 | CC2500-LinkTo 37 | 38 | 39 | Ap_as_Data_Hub 40 | CC2500-LinkListen 41 | 42 | 43 | 44 | CC1100 Devices 45 | 46 | Ap_as_Data_Hub 47 | CC1100-LinkTo 48 | 49 | 50 | Ap_as_Data_Hub 51 | CC1100-LinkListen 52 | 53 | 54 | 55 | CC1101 Devices 56 | 57 | Ap_as_Data_Hub 58 | CC1101-Linkto 59 | 60 | 61 | Ap_as_Data_Hub 62 | CC1101-LinkListen 63 | 64 | 65 | 66 | CC1100E Devices 67 | 68 | Ap_as_Data_Hub 69 | CC1100E-LinkTo 70 | 71 | 72 | Ap_as_Data_Hub 73 | CC1100E-LinkListen 74 | 75 | 76 | 77 | CC2500 Devices 78 | 79 | Ap_as_Data_Hub 80 | CC2500-LinkTo 81 | 82 | 83 | Ap_as_Data_Hub 84 | CC2500-LinkListen 85 | 86 | 87 | 88 | 89 | 90 | 91 | -------------------------------------------------------------------------------- /Projects/Examples/STM32/AP_as_Data_Hub/IAR/Configuration/Access_Point/smpl_config.dat: -------------------------------------------------------------------------------- 1 | /* Number of connections supported. Each connection supports bi-directional 2 | * communication. Access Points and Range Extenders can set this to 0 if they 3 | * do not host End Device objects. 4 | */ 5 | -DNUM_CONNECTIONS=8 6 | 7 | /* *** Size of low level queues for sent and received frames. Affects RAM usage *** */ 8 | 9 | /* AP needs larger input frame queue if it is supporting store-and-forward 10 | * clients because the forwarded messages are held here. 11 | */ 12 | -DSIZE_INFRAME_Q=6 13 | 14 | /* The output frame queue can be small since Tx is done synchronously. Actually 15 | * 1 is probably enough. If an Access Point device is also hosting an End Device 16 | * that sends to a sleeping peer the output queue should be larger -- the waiting 17 | * frames in this case are held here. In that case the output frame queue should 18 | * be bigger. 19 | */ 20 | -DSIZE_OUTFRAME_Q=2 21 | 22 | /* This device's address. The first byte is used as a filter on the CC1100/CC2500 23 | * radios so THE FIRST BYTE MUST NOT BE either 0x00 or 0xFF. Also, for these radios 24 | * on End Devices the first byte should be the least significant byte so the filtering 25 | * is maximally effective. Otherwise the frame has to be processed by the MCU before it 26 | * is recognized as not intended for the device. APs and REs run in promiscuous mode so 27 | * the filtering is not done. This macro intializes a static const array of unsigned 28 | * characters of length NET_ADDR_SIZE (found in nwk_types.h). The quotes (") are 29 | * necessary below unless the spaces are removed. 30 | */ 31 | -DTHIS_DEVICE_ADDRESS="{0x78, 0x56, 0x34, 0x12}" 32 | 33 | /* device type */ 34 | -DACCESS_POINT 35 | 36 | /* In the spcial case in which the AP is a data hub, the AP will automaically 37 | * listen for a link each time a new device joins the network. This is a special 38 | * case scenario in which all End Device peers are the AP and every ED links 39 | * to the AP. In this scenario the ED must automatically try and link after the 40 | * Join reply. 41 | */ 42 | -DAP_IS_DATA_HUB 43 | 44 | /* Store and forward support: number of clients */ 45 | -DNUM_STORE_AND_FWD_CLIENTS=3 46 | 47 | -DSTARTUP_JOINCONTEXT_ON 48 | 49 | 50 | 51 | 52 | -------------------------------------------------------------------------------- /Projects/Examples/STM32/AP_as_Data_Hub/IAR/Configuration/Channel_Sniffer/smpl_config.dat: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Projects/Examples/STM32/AP_as_Data_Hub/IAR/Configuration/Channel_Sniffer/smpl_config.dat -------------------------------------------------------------------------------- /Projects/Examples/STM32/AP_as_Data_Hub/IAR/Configuration/End_Device/smpl_config.dat: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Projects/Examples/STM32/AP_as_Data_Hub/IAR/Configuration/End_Device/smpl_config.dat -------------------------------------------------------------------------------- /Projects/Examples/STM32/AP_as_Data_Hub/IAR/Configuration/Range_Extender/smpl_config.dat: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Projects/Examples/STM32/AP_as_Data_Hub/IAR/Configuration/Range_Extender/smpl_config.dat -------------------------------------------------------------------------------- /Projects/Examples/STM32/AP_as_Data_Hub/IAR/Configuration/smpl_nwk_config.dat: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Projects/Examples/STM32/AP_as_Data_Hub/IAR/Configuration/smpl_nwk_config.dat -------------------------------------------------------------------------------- /Projects/Examples/STM32/AP_as_Data_Hub/MDK-ARM/Configuration/Access_Point/smpl_config.h: -------------------------------------------------------------------------------- 1 | /* Number of connections supported. Each connection supports bi-directional 2 | * communication. Access Points and Range Extenders can set this to 0 if they 3 | * do not host End Device objects. 4 | */ 5 | #define NUM_CONNECTIONS 8 6 | 7 | /* *** Size of low level queues for sent and received frames. Affects RAM usage *** */ 8 | 9 | /* AP needs larger input frame queue if it is supporting store-and-forward 10 | * clients because the forwarded messages are held here. 11 | */ 12 | #define SIZE_INFRAME_Q 6 13 | 14 | /* The output frame queue can be small since Tx is done synchronously. Actually 15 | * 1 is probably enough. If an Access Point device is also hosting an End Device 16 | * that sends to a sleeping peer the output queue should be larger -- the waiting 17 | * frames in this case are held here. In that case the output frame queue should 18 | * be bigger. 19 | */ 20 | #define SIZE_OUTFRAME_Q 2 21 | 22 | /* This device's address. The first byte is used as a filter on the CC1100/CC2500 23 | * radios so THE FIRST BYTE MUST NOT BE either 0x00 or 0xFF. Also, for these radios 24 | * on End Devices the first byte should be the least significant byte so the filtering 25 | * is maximally effective. Otherwise the frame has to be processed by the MCU before it 26 | * is recognized as not intended for the device. APs and REs run in promiscuous mode so 27 | * the filtering is not done. This macro intializes a static const array of unsigned 28 | * characters of length NET_ADDR_SIZE (found in nwk_types.h). The quotes (") are 29 | * necessary below unless the spaces are removed. 30 | */ 31 | #define THIS_DEVICE_ADDRESS {0x78, 0x56, 0x34, 0x12} 32 | 33 | /* device type */ 34 | #define ACCESS_POINT 35 | 36 | /* In the spcial case in which the AP is a data hub, the AP will automaically 37 | * listen for a link each time a new device joins the network. This is a special 38 | * case scenario in which all End Device peers are the AP and every ED links 39 | * to the AP. In this scenario the ED must automatically try and link after the 40 | * Join reply. 41 | */ 42 | #define AP_IS_DATA_HUB 43 | 44 | /* Store and forward support: number of clients */ 45 | #define NUM_STORE_AND_FWD_CLIENTS 3 46 | 47 | #define STARTUP_JOINCONTEXT_ON 48 | 49 | 50 | 51 | 52 | -------------------------------------------------------------------------------- /Projects/Examples/STM32/AP_as_Data_Hub/MDK-ARM/Configuration/Channel_Sniffer/smpl_config.h: -------------------------------------------------------------------------------- 1 | /* Number of connections supported. each connection supports bi-directional 2 | * communication. Access Points and Range Extenders can set this to 0 if they 3 | * do not host End Device objects 4 | */ 5 | #define NUM_CONNECTIONS 0 6 | 7 | /* *** Size of low level queues for sent and received frames. Affects RAM usage *** */ 8 | 9 | /* AP needs larger input frame queue if it is supporting store-and-forward 10 | * clients because the forwarded messages are held here. Two is probably enough 11 | * for an End Device 12 | */ 13 | #define SIZE_INFRAME_Q 2 14 | 15 | /* The output frame queue can be small since Tx is done synchronously. Actually 16 | * 1 is probably enough. If an Access Point device is also hosting an End Device 17 | * that sends to a sleeping peer the output queue should be larger -- the waiting 18 | * frames in this case are held here. In that case the output frame queue should 19 | * be bigger. 20 | */ 21 | #define SIZE_OUTFRAME_Q 2 22 | 23 | /* This device's address. The first byte is used as a filter on the CC1100/CC2500 24 | * radios so THE FIRST BYTE MUST NOT BE either 0x00 or 0xFF. Also, for these radios 25 | * on End Devices the first byte should be the least significant byte so the filtering 26 | * is maximally effective. Otherwise the frame has to be processed by the MCU before it 27 | * is recognized as not intended for the device. APs and REs run in promiscuous mode so 28 | * the filtering is not done. This macro intializes a static const array of unsigned 29 | * characters of length NET_ADDR_SIZE (found in nwk_types.h). the quotes (") are 30 | * necessary below unless the spaces are removed. 31 | */ 32 | #define THIS_DEVICE_ADDRESS {0x79, 0x56, 0x34, 0x12} 33 | 34 | /* device type */ 35 | #define END_DEVICE 36 | 37 | /* For polling End Devices we need to specify that they do so. Uncomment the 38 | * macro definition below if this is a polling device. This field is used 39 | * by the Access Point to know whether to reserve store-and-forward support 40 | * for the polling End Device during the Join exchange. 41 | */ 42 | /* -DRX_POLLS */ 43 | 44 | #define FREQUENCY_AGILITY 45 | -------------------------------------------------------------------------------- /Projects/Examples/STM32/AP_as_Data_Hub/MDK-ARM/Configuration/End_Device/smpl_config.h: -------------------------------------------------------------------------------- 1 | /* Number of connections supported. each connection supports bi-directional 2 | * communication. Access Points and Range Extenders can set this to 0 if they 3 | * do not host End Device objects 4 | */ 5 | #define NUM_CONNECTIONS 2 6 | 7 | /* *** Size of low level queues for sent and received frames. Affects RAM usage *** */ 8 | 9 | /* AP needs larger input frame queue if it is supporting store-and-forward 10 | * clients because the forwarded messages are held here. Two is probably enough 11 | * for an End Device 12 | */ 13 | #define SIZE_INFRAME_Q 2 14 | 15 | /* The output frame queue can be small since Tx is done synchronously. Actually 16 | * 1 is probably enough. If an Access Point device is also hosting an End Device 17 | * that sends to a sleeping peer the output queue should be larger -- the waiting 18 | * frames in this case are held here. In that case the output frame queue should 19 | * be bigger. 20 | */ 21 | #define SIZE_OUTFRAME_Q 2 22 | 23 | /* This device's address. The first byte is used as a filter on the CC1100/CC2500 24 | * radios so THE FIRST BYTE MUST NOT BE either 0x00 or 0xFF. Also, for these radios 25 | * on End Devices the first byte should be the least significant byte so the filtering 26 | * is maximally effective. Otherwise the frame has to be processed by the MCU before it 27 | * is recognized as not intended for the device. APs and REs run in promiscuous mode so 28 | * the filtering is not done. This macro intializes a static const array of unsigned 29 | * characters of length NET_ADDR_SIZE (found in nwk_types.h). the quotes (") are 30 | * necessary below unless the spaces are removed. 31 | */ 32 | #define THIS_DEVICE_ADDRESS {0x79, 0x56, 0x34, 0x12} 33 | 34 | /* device type */ 35 | #define END_DEVICE 36 | 37 | /* For polling End Devices we need to specify that they do so. Uncomment the 38 | * macro definition below if this is a polling device. This field is used 39 | * by the Access Point to know whether to reserve store-and-forward support 40 | * for the polling End Device during the Join exchange. 41 | */ 42 | /* -DRX_POLLS */ 43 | -------------------------------------------------------------------------------- /Projects/Examples/STM32/AP_as_Data_Hub/MDK-ARM/Configuration/Range_Extender/smpl_config.h: -------------------------------------------------------------------------------- 1 | /* Number of connections supported. Each connection supports bi-directional 2 | * communication. Access Points and Range Extenders can set this to 0 if they 3 | * do not host End Device objects. 4 | */ 5 | #define NUM_CONNECTIONS 0 6 | 7 | /* *** Size of low level queues for sent and received frames. Affects RAM usage *** */ 8 | 9 | /* AP needs larger input frame queue if it is supporting store-and-forward 10 | * clients because the forwarded messages are held here. 11 | */ 12 | #define SIZE_INFRAME_Q 2 13 | 14 | /* The output frame queue can be small since Tx is done synchronously. Actually 15 | * 1 is probably enough. If an Access Point device is also hosting an End Device 16 | * that sends to a sleeping peer the output queue should be larger -- the waiting 17 | * frames in this case are held here. In that case the output frame queue should 18 | * be bigger. 19 | */ 20 | #define SIZE_OUTFRAME_Q 2 21 | 22 | /* This device's address. The first byte is used as a filter on the CC1100/CC2500 23 | * radios so THE FIRST BYTE MUST NOT BE either 0x00 or 0xFF. Also, for these radios 24 | * on End Devices the first byte should be the least significant byte so the filtering 25 | * is maximally effective. Otherwise the frame has to be processed by the MCU before it 26 | * is recognized as not intended for the device. APs and REs run in promiscuous mode so 27 | * the filtering is not done. This macro intializes a static const array of unsigned 28 | * characters of length NET_ADDR_SIZE (found in nwk_types.h). The quotes (") are 29 | * necessary below unless the spaces are removed. 30 | */ 31 | #define THIS_DEVICE_ADDRESS {0x77, 0x56, 0x34, 0x12} 32 | 33 | /* device type */ 34 | #define RANGE_EXTENDER 35 | -------------------------------------------------------------------------------- /Projects/Examples/STM32/AP_as_Data_Hub/MDK-ARM/Configuration/smpl_nwk_config.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Projects/Examples/STM32/AP_as_Data_Hub/MDK-ARM/Configuration/smpl_nwk_config.h -------------------------------------------------------------------------------- /Projects/Examples/STM32/AP_as_Data_Hub/MDK-ARM/intrinsics.h: -------------------------------------------------------------------------------- 1 | 2 | -------------------------------------------------------------------------------- /Projects/Examples/STM32/Cascading_End_Devices/IAR/Cascading_End_Devices.eww: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | $WS_DIR$\Cascading_End_Devices.ewp 6 | 7 | 8 | 9 | All Devices 10 | 11 | Cascading_End_Devices 12 | CC1100-LinkTo 13 | 14 | 15 | Cascading_End_Devices 16 | CC1100-LinkListen 17 | 18 | 19 | Cascading_End_Devices 20 | CC1101-Linkto 21 | 22 | 23 | Cascading_End_Devices 24 | CC1101-LinkListen 25 | 26 | 27 | Cascading_End_Devices 28 | CC1100E-LinkTo 29 | 30 | 31 | Cascading_End_Devices 32 | CC1100E-LinkListen 33 | 34 | 35 | Cascading_End_Devices 36 | CC2500-LinkTo 37 | 38 | 39 | Cascading_End_Devices 40 | CC2500-LinkListen 41 | 42 | 43 | 44 | CC1100 Devices 45 | 46 | Cascading_End_Devices 47 | CC1100-LinkTo 48 | 49 | 50 | Cascading_End_Devices 51 | CC1100-LinkListen 52 | 53 | 54 | 55 | CC1101 Devices 56 | 57 | Cascading_End_Devices 58 | CC1101-Linkto 59 | 60 | 61 | Cascading_End_Devices 62 | CC1101-LinkListen 63 | 64 | 65 | 66 | CC1100E Devices 67 | 68 | Cascading_End_Devices 69 | CC1100E-LinkTo 70 | 71 | 72 | Cascading_End_Devices 73 | CC1100E-LinkListen 74 | 75 | 76 | 77 | CC2500 Devices 78 | 79 | Cascading_End_Devices 80 | CC2500-LinkTo 81 | 82 | 83 | Cascading_End_Devices 84 | CC2500-LinkListen 85 | 86 | 87 | 88 | 89 | 90 | 91 | -------------------------------------------------------------------------------- /Projects/Examples/STM32/Cascading_End_Devices/IAR/Configuration/End_Device/smpl_config.dat: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Projects/Examples/STM32/Cascading_End_Devices/IAR/Configuration/End_Device/smpl_config.dat -------------------------------------------------------------------------------- /Projects/Examples/STM32/Cascading_End_Devices/IAR/Configuration/smpl_nwk_config.dat: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/x893/SimpliciTI/b1806ac36fb6616cf06b03aa6352a7ca07c397ee/Projects/Examples/STM32/Cascading_End_Devices/IAR/Configuration/smpl_nwk_config.dat -------------------------------------------------------------------------------- /Projects/Examples/STM32/Cascading_End_Devices/IAR/settings/Cascading_End_Devices.cspy.bat: -------------------------------------------------------------------------------- 1 | @REM This batch file has been generated by the IAR Embedded Workbench 2 | @REM C-SPY Debugger, as an aid to preparing a command line for running 3 | @REM the cspybat command line utility using the appropriate settings. 4 | @REM 5 | @REM You can launch cspybat by typing the name of this batch file followed 6 | @REM by the name of the debug file (usually an ELF/DWARF or UBROF file). 7 | @REM Note that this file is generated every time a new debug session 8 | @REM is initialized, so you may want to move or rename the file before 9 | @REM making changes. 10 | @REM 11 | 12 | 13 | "C:\IAR Systems\ARM\common\bin\cspybat" "C:\IAR Systems\ARM\arm\bin\armproc.dll" "C:\IAR Systems\ARM\arm\bin\armsim2.dll" %1 --plugin "C:\IAR Systems\ARM\arm\bin\armbat.dll" --backend -B "--endian=little" "--cpu=Cortex-M3" "--fpu=None" "-p" "C:\IAR Systems\ARM\arm\CONFIG\debugger\ST\iostm32f10xxb.ddf" "--semihosting" "--device=STM32F10xxB" 14 | 15 | 16 | -------------------------------------------------------------------------------- /Projects/Examples/STM32/Cascading_End_Devices/IAR/settings/Cascading_End_Devices.dbgdt: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | -------------------------------------------------------------------------------- /Projects/Examples/STM32/Cascading_End_Devices/IAR/settings/Cascading_End_Devices.dni: -------------------------------------------------------------------------------- 1 | [Stack] 2 | FillEnabled=0 3 | OverflowWarningsEnabled=1 4 | WarningThreshold=90 5 | SpWarningsEnabled=1 6 | WarnLogOnly=1 7 | UseTrigger=1 8 | TriggerName=main 9 | LimitSize=0 10 | ByteLimit=50 11 | [State Storage] 12 | Control Register=-1 13 | [Sequencer] 14 | Control Register=-1 15 | NextState0=-1 16 | NextState1=-1 17 | [Action Register] 18 | Break=-1 19 | State Storage=-1 20 | [Breakpoints] 21 | Count=0 22 | [FET] 23 | Extended Clock mode=-1 24 | Secure Password= 25 | Extended Clock Control Enable=1 26 | Advanced Extended Clock Control=0 27 | Emulation mode=0 28 | Free running=0 29 | Shutting Down=3 30 | [Memory Dump] 31 | Start address= 32 | Lenghth= 33 | Address info=0 34 | Format=0 35 | Dump registers=0 36 | PC=0 37 | SP=0 38 | SR=0 39 | all registers=0 40 | File name= 41 | [InterruptLog] 42 | LogEnabled=0 43 | SumEnabled=0 44 | GraphEnabled=0 45 | ShowTimeLog=1 46 | ShowTimeSum=1 47 | SumSortOrder=0 48 | [Disassemble mode] 49 | mode=0 50 | [Breakpoints2] 51 | Count=0 52 | [Interrupts] 53 | Enabled=1 54 | [MemoryMap] 55 | Enabled=0 56 | Base=0 57 | UseAuto=0 58 | TypeViolation=1 59 | UnspecRange=1 60 | ActionState=1 61 | [Aliases] 62 | Count=0 63 | SuppressDialog=0 64 | [Trace1] 65 | Enabled=0 66 | ShowSource=1 67 | -------------------------------------------------------------------------------- /Projects/Examples/STM32/Cascading_End_Devices/IAR/settings/Cascading_End_Devices.wsdt: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | Cascading_End_Devices/CC1101-End Device 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 213272727 16 | 17 | 18 | 19 | 20 | 21 | 22 | 2084822656 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | TabID-8410-10543 31 | Workspace 32 | Workspace 33 | 34 | 35 | Cascading_End_DevicesCascading_End_Devices/ComponentsCascading_End_Devices/Components/bspCascading_End_Devices/peer applicationsCascading_End_Devices/peer applications/application 36 | 37 | 38 | 39 | 0 40 | 41 | 42 | TabID-6842-10573 43 | Build 44 | Build 45 | 46 | 47 | 48 | 49 | 0 50 | 51 | 52 | 53 | 54 | 55 | TextEditor$WS_DIR$\..\..\..\Applications\main_babble.c0423000300000100000010000001 56 | 57 | 58 | 59 | 60 | 61 | 62 | iaridepm.enu1-2-2759287-2-2183218168508213516266114745348-2-22161088-2-210902181003683213516168508213516 63 | 64 | 65 | 66 | 67 | -------------------------------------------------------------------------------- /Projects/Examples/STM32/Cascading_End_Devices/MDK-ARM/Configuration/End_Device/smpl_config.h: -------------------------------------------------------------------------------- 1 | /* Number of connections supported. each connection supports bi-directional 2 | * communication. Access Points and Range Extenders can set this to 0 if they 3 | * do not host End Device objects 4 | */ 5 | #define NUM_CONNECTIONS 2 6 | 7 | /* *** Size of low level queues for sent and received frames. Affects RAM usage *** */ 8 | 9 | /* AP needs larger input frame queue if it is supporting store-and-forward 10 | * clients because the forwarded messages are held here. Two is probably enough 11 | * for an End Device 12 | */ 13 | #define SIZE_INFRAME_Q 2 14 | 15 | /* The output frame queue can be small since Tx is done synchronously. Actually 16 | * 1 is probably enough. If an Access Point device is also hosting an End Device 17 | * that sends to a sleeping peer the output queue should be larger -- the waiting 18 | * frames in this case are held here. In that case the output frame queue should 19 | * be bigger. 20 | */ 21 | #define SIZE_OUTFRAME_Q 2 22 | 23 | /* This device's address. The first byte is used as a filter on the CC1100/CC2500 24 | * radios so THE FIRST BYTE MUST NOT BE either 0x00 or 0xFF. Also, for these radios 25 | * on End Devices the first byte should be the least significant byte so the filtering 26 | * is maximally effective. Otherwise the frame has to be processed by the MCU before it 27 | * is recognized as not intended for the device. APs and REs run in promiscuous mode so 28 | * the filtering is not done. This macro intializes a static const array of unsigned 29 | * characters of length NET_ADDR_SIZE (found in nwk_types.h). the quotes (") are 30 | * necessary below unless the spaces are removed. 31 | */ 32 | #define THIS_DEVICE_ADDRESS {0x79, 0x56, 0x34, 0x12} 33 | 34 | /* device type */ 35 | #define END_DEVICE 36 | 37 | /* For polling End Devices we need to specify that they do so. Uncomment the 38 | * macro definition below if this is a polling device. This field is used 39 | * by the Access Point to know whether to reserve store-and-forward support 40 | * for the polling End Device during the Join exchange. 41 | */ 42 | /* #define RX_POLLS */ 43 | -------------------------------------------------------------------------------- /Projects/Examples/STM32/Cascading_End_Devices/MDK-ARM/Configuration/smpl_nwk_config.h: -------------------------------------------------------------------------------- 1 | /* max hop count */ 2 | #define MAX_HOPS 3 3 | 4 | /* max hops away from and AP. Keeps hop count and therefore replay 5 | * storms down for sending to and from polling End Devices. Also used 6 | * when joining since the EDs can't be more than 1 hop away. 7 | */ 8 | #define MAX_HOPS_FROM_AP 1 9 | 10 | /* Maximum size of Network application payload. Do not change unless 11 | * protocol changes are reflected in different maximum network 12 | * application payload size. 13 | */ 14 | #define MAX_NWK_PAYLOAD 34 15 | 16 | /* Maximum size of application payload */ 17 | #define MAX_APP_PAYLOAD 10 18 | 19 | /* default Link token */ 20 | #define DEFAULT_LINK_TOKEN 0x01020304 21 | 22 | /* default Join token */ 23 | #define DEFAULT_JOIN_TOKEN 0x05060708 24 | 25 | /* Remove 'x' corruption to define Frequency Agility as active for this build */ 26 | #define xFREQUENCY_AGILITY 27 | 28 | /* Remove 'x' corruption to enable application autoacknowledge support. Requires extended API as well */ 29 | #define xAPP_AUTO_ACK 30 | 31 | /* Remove 'x' corruption to enable Extended API */ 32 | #define xEXTENDED_API 33 | 34 | /* Remove 'x' corruption to enable security. */ 35 | #define xSMPL_SECURE 36 | 37 | /* Remove 'x' corruption to enable NV object support. */ 38 | #define xNVOBJECT_SUPPORT 39 | 40 | /* Remove 'x' corruption to enable software timer. */ 41 | #define xSW_TIMER 42 | 43 | /* Remove 'x' corruption to enable frequency hopping. */ 44 | #define xFREQUENCY_HOPPING 45 | 46 | #define BSP_TIMER_USED BSP_TIMER_A3 47 | 48 | /* Remove 'x' corruption to make this device the reference clock. */ 49 | #define NWK_PLL_REFERENCE_CLOCK 50 | 51 | /* causes leds to blink in 00 -> 01 -> 11 -> 10 -> 00 rotation when FHSS enabled */ 52 | #define NWK_PLL_SHOW_LOCATION_INDICATORS 53 | 54 | #define I_WANT_TO_CHANGE_DEFAULT_ROM_DEVICE_ADDRESS_PSEUDO_CODE 55 | -------------------------------------------------------------------------------- /Projects/Examples/STM32/Cascading_End_Devices/MDK-ARM/intrinsics.h: -------------------------------------------------------------------------------- 1 | 2 | -------------------------------------------------------------------------------- /Readme.htm: -------------------------------------------------------------------------------- 1 | SimpliciTI port for STM32 2 | 3 | SimpliciTI Compliant Protocol Stack 4 | -------------------------------------------------------------------------------- /Readme.txt: -------------------------------------------------------------------------------- 1 | SimpliciTI port for STM32 2 | 3 | http://www.ti.com/tool/simpliciti 4 | --------------------------------------------------------------------------------