├── 0_Getting Started ├── 01_Step_one.v └── 02_Zero.v ├── 1_Verilog language ├── 03_Wire.v ├── 04_Wire4.v ├── 05_Inverter.v ├── 06_Andgate.v ├── 07_Norgate.v ├── 08_Xnorgate.v ├── 09_Wire_decl.v ├── 10_7458.v ├── 11_Vector0.v ├── 12_7Vector1.v ├── 13_Vector2.v ├── 14_Vectorgates.v ├── 15_Gates4.v ├── 16_Vector3.v ├── 17_Vectorr.v ├── 18_Vector4.v ├── 19_Vector5.v ├── 20_Module.v ├── 21_Module_pos.v ├── 22_Module_name.v ├── 23_Module_shift.v ├── 24_Module_shift8v.v ├── 25_Module_add.v ├── 26_Module_fadd.v ├── 27_Module_cseladd.v ├── 28_Module_addsub.v ├── 29_Alwaysblock1.v ├── 30_Alwaysblock2.v ├── 31_Always if.v ├── 32_Always if2.v ├── 33_Always_case.v ├── 34_Always_case2v.v ├── 35_Always casezv.v ├── 36_Always_nolatches.v ├── 37_Conditional.v ├── 38_Reduction.v ├── 39_Gates100.v ├── 40_Vector100r.v ├── 41_Popcount255.v ├── 42_Adder100i.v └── 43_Bcdadd100.v ├── 2_Circuits ├── 044_Wire_q4h.v ├── 045_GND_q4i.v ├── 046_NOR_q4e.v ├── 047_Anothergate_q4f.v ├── 048_TwoGates_q4g.v ├── 049_Gates.v ├── 050_7420.v ├── 051_Truthtable1.v ├── 052_Mt2015 eq2.v ├── 053_Mt2015 q4a.v ├── 054_.Mt2015 q4bv.v ├── 055_Mt2015 q4.v ├── 056_Ringer.v ├── 057_Thermostat.v ├── 058_Popcount3.v ├── 059_Gates.v ├── 060_Gatesv100.v ├── 061_Mux2to1.v ├── 062_Mux2to1v.v ├── 063_Mux9to1v.v ├── 064_Mux256to1.v ├── 065_Mux256to1v.v ├── 066_Hadd.v ├── 067_Fadd.v ├── 068_Adder3.v ├── 069_m2014 q4j.v ├── 070_ece241 2014 q1c.v ├── 071_Adder100.v ├── 072_Bcdadd4.v ├── 073_Kmap1.v ├── 074_Kmap2.v ├── 075_Kmap3.v ├── 076_Kmap4.v ├── 077_ece241 2013 q2.v ├── 078_m2014 q3.v ├── 079_2012 q1g.v ├── 080_ece241 2014 q3.v ├── 081_Dff.v ├── 082_Dff8.v ├── 083_Dff8r.v ├── 084_Dff8p.v ├── 085_Dff8ar.v ├── 086_Dff16e.v ├── 087_m2014 q4a.v ├── 088_m2014 q4b.v ├── 089_m2014 q4c.v ├── 090_m2014 q4d.v ├── 091_muxdff.v ├── 092_2014 q4a.v ├── 093_ece241 2014 q4.v ├── 094_ece241 2013 q7.v ├── 095_Edgedetect.v ├── 096_Edgedetect2.v ├── 097_Edgecapture_high.v ├── 098_Dualedge_high.v ├── 099_Count15.v ├── 100_Count10.v ├── 101_Count1to10.v ├── 102_Countslow.v ├── 103_Exams:ece241 2014 q7a.v ├── 104_Exams:ece241 2014 q7b_high.v ├── 105_Countbcd.v ├── 106_Count clock.v ├── 107_Shift4.v ├── 108_Rotate100_high.v ├── 109_Shift18.v ├── 110_Lfsr5.v ├── 111_Mt2015 lfsr.v ├── 112_Lfsr32.v ├── 114_Exams:m2014 q4k.v ├── 115_Exams:2014 q4b.v ├── 116_Exams:ece241 2013 q12_high.v ├── 117_Rule90.v ├── 118_ Rule110.v ├── 119_ Conwaylife.v ├── 120_ Fsm1.v ├── 121_ Fsm1s.v ├── 122_ Fsm2.v ├── 123_ Fsm2s.v ├── 124_ Fsm3comb.v ├── 125_ Fsm3onehot.v ├── 126_ Fsm3.v ├── 127_ Fsm3s.v ├── 128_ece241 2013 q4.v ├── 129_Lemmings1.v ├── 130_Lemmings2.v ├── 131_Lemmings3.v ├── 132_Lemmings4.v ├── 133_Fsm onehot.v ├── 134_Fsm ps2.v ├── 135_Fsm ps2data.v ├── 136_Fsm serial.v ├── 137_Fsm serialdata.v ├── 138_Fsm serialdp.v ├── 139_Fsm hdlc.v ├── 140_ece241 2013 q.v ├── 141_ece241 2014 q5a.v ├── 142_ece241 2014 q5b_high.v ├── 143_2014 q3fsm.v ├── 144_2014 q3bfsm.v ├── 145_2014 q3c.v ├── 146_m2014 q6b.v ├── 147_m2014 q6c.v ├── 148_m2014 q6.v ├── 149_2012 q2fsm.v ├── 150_2012 q2b.v ├── 151_2013 q2afsm.v ├── 152_2013 q2bfsm.v ├── 153_review2015 count1k.v ├── 154_review2015 fancytimer.v ├── 155_review2015 fsmonehot.v ├── 156_review2015 shiftcount.v ├── 157_review2015 fsmseq.v ├── 158_review2015 fsmshift_high.v └── 159_review2015 fsm.v ├── 3_Verification Reading simulations ├── 161_Bugs mux2.v ├── 162_Bugs nand3.v ├── 163_Bugs mux4.v ├── 164_Bugs addsubz.v ├── 165_Bugs case.v ├── 166_Sim:circuit1.v ├── 167_Sim:circuit2.v ├── 168_Sim:circuit3.v ├── 169_Sim:circuit4.v ├── 170_Sim:circuit5.v ├── 171_Sim:circuit6.v ├── 172_Sim:circuit7.v ├── 173_Sim:circuit8.v ├── 174_Sim:circuit9.v └── 175_Sim:circui10_high.v ├── 4_Verification Writing Testbenches ├── 176_Tb:clock.v ├── 177_Tb:tb1.v ├── 178_Tb:and.v ├── 179_Tb:tb2.v └── 180_Tb:tff.v ├── 5_CS450 ├── 181_CS450_timer.v ├── 182_CS450_counter_2bc.v ├── 183_CS450_history_shift.v └── 184_CS450_gshare.v └── README.md /0_Getting Started/01_Step_one.v: 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