├── .mxproject
├── BootloaderHAL.ioc
├── Drivers
├── CMSIS
│ ├── DSP_Lib
│ │ └── Source
│ │ │ ├── BasicMathFunctions
│ │ │ ├── arm_abs_f32.c
│ │ │ ├── arm_abs_q15.c
│ │ │ ├── arm_abs_q31.c
│ │ │ ├── arm_abs_q7.c
│ │ │ ├── arm_add_f32.c
│ │ │ ├── arm_add_q15.c
│ │ │ ├── arm_add_q31.c
│ │ │ ├── arm_add_q7.c
│ │ │ ├── arm_dot_prod_f32.c
│ │ │ ├── arm_dot_prod_q15.c
│ │ │ ├── arm_dot_prod_q31.c
│ │ │ ├── arm_dot_prod_q7.c
│ │ │ ├── arm_mult_f32.c
│ │ │ ├── arm_mult_q15.c
│ │ │ ├── arm_mult_q31.c
│ │ │ ├── arm_mult_q7.c
│ │ │ ├── arm_negate_f32.c
│ │ │ ├── arm_negate_q15.c
│ │ │ ├── arm_negate_q31.c
│ │ │ ├── arm_negate_q7.c
│ │ │ ├── arm_offset_f32.c
│ │ │ ├── arm_offset_q15.c
│ │ │ ├── arm_offset_q31.c
│ │ │ ├── arm_offset_q7.c
│ │ │ ├── arm_scale_f32.c
│ │ │ ├── arm_scale_q15.c
│ │ │ ├── arm_scale_q31.c
│ │ │ ├── arm_scale_q7.c
│ │ │ ├── arm_shift_q15.c
│ │ │ ├── arm_shift_q31.c
│ │ │ ├── arm_shift_q7.c
│ │ │ ├── arm_sub_f32.c
│ │ │ ├── arm_sub_q15.c
│ │ │ ├── arm_sub_q31.c
│ │ │ └── arm_sub_q7.c
│ │ │ ├── CommonTables
│ │ │ ├── arm_common_tables.c
│ │ │ └── arm_const_structs.c
│ │ │ ├── ComplexMathFunctions
│ │ │ ├── arm_cmplx_conj_f32.c
│ │ │ ├── arm_cmplx_conj_q15.c
│ │ │ ├── arm_cmplx_conj_q31.c
│ │ │ ├── arm_cmplx_dot_prod_f32.c
│ │ │ ├── arm_cmplx_dot_prod_q15.c
│ │ │ ├── arm_cmplx_dot_prod_q31.c
│ │ │ ├── arm_cmplx_mag_f32.c
│ │ │ ├── arm_cmplx_mag_q15.c
│ │ │ ├── arm_cmplx_mag_q31.c
│ │ │ ├── arm_cmplx_mag_squared_f32.c
│ │ │ ├── arm_cmplx_mag_squared_q15.c
│ │ │ ├── arm_cmplx_mag_squared_q31.c
│ │ │ ├── arm_cmplx_mult_cmplx_f32.c
│ │ │ ├── arm_cmplx_mult_cmplx_q15.c
│ │ │ ├── arm_cmplx_mult_cmplx_q31.c
│ │ │ ├── arm_cmplx_mult_real_f32.c
│ │ │ ├── arm_cmplx_mult_real_q15.c
│ │ │ └── arm_cmplx_mult_real_q31.c
│ │ │ ├── ControllerFunctions
│ │ │ ├── arm_pid_init_f32.c
│ │ │ ├── arm_pid_init_q15.c
│ │ │ ├── arm_pid_init_q31.c
│ │ │ ├── arm_pid_reset_f32.c
│ │ │ ├── arm_pid_reset_q15.c
│ │ │ ├── arm_pid_reset_q31.c
│ │ │ ├── arm_sin_cos_f32.c
│ │ │ └── arm_sin_cos_q31.c
│ │ │ ├── FastMathFunctions
│ │ │ ├── arm_cos_f32.c
│ │ │ ├── arm_cos_q15.c
│ │ │ ├── arm_cos_q31.c
│ │ │ ├── arm_sin_f32.c
│ │ │ ├── arm_sin_q15.c
│ │ │ ├── arm_sin_q31.c
│ │ │ ├── arm_sqrt_q15.c
│ │ │ └── arm_sqrt_q31.c
│ │ │ ├── FilteringFunctions
│ │ │ ├── arm_biquad_cascade_df1_32x64_init_q31.c
│ │ │ ├── arm_biquad_cascade_df1_32x64_q31.c
│ │ │ ├── arm_biquad_cascade_df1_f32.c
│ │ │ ├── arm_biquad_cascade_df1_fast_q15.c
│ │ │ ├── arm_biquad_cascade_df1_fast_q31.c
│ │ │ ├── arm_biquad_cascade_df1_init_f32.c
│ │ │ ├── arm_biquad_cascade_df1_init_q15.c
│ │ │ ├── arm_biquad_cascade_df1_init_q31.c
│ │ │ ├── arm_biquad_cascade_df1_q15.c
│ │ │ ├── arm_biquad_cascade_df1_q31.c
│ │ │ ├── arm_biquad_cascade_df2T_f32.c
│ │ │ ├── arm_biquad_cascade_df2T_f64.c
│ │ │ ├── arm_biquad_cascade_df2T_init_f32.c
│ │ │ ├── arm_biquad_cascade_df2T_init_f64.c
│ │ │ ├── arm_biquad_cascade_stereo_df2T_f32.c
│ │ │ ├── arm_biquad_cascade_stereo_df2T_init_f32.c
│ │ │ ├── arm_conv_f32.c
│ │ │ ├── arm_conv_fast_opt_q15.c
│ │ │ ├── arm_conv_fast_q15.c
│ │ │ ├── arm_conv_fast_q31.c
│ │ │ ├── arm_conv_opt_q15.c
│ │ │ ├── arm_conv_opt_q7.c
│ │ │ ├── arm_conv_partial_f32.c
│ │ │ ├── arm_conv_partial_fast_opt_q15.c
│ │ │ ├── arm_conv_partial_fast_q15.c
│ │ │ ├── arm_conv_partial_fast_q31.c
│ │ │ ├── arm_conv_partial_opt_q15.c
│ │ │ ├── arm_conv_partial_opt_q7.c
│ │ │ ├── arm_conv_partial_q15.c
│ │ │ ├── arm_conv_partial_q31.c
│ │ │ ├── arm_conv_partial_q7.c
│ │ │ ├── arm_conv_q15.c
│ │ │ ├── arm_conv_q31.c
│ │ │ ├── arm_conv_q7.c
│ │ │ ├── arm_correlate_f32.c
│ │ │ ├── arm_correlate_fast_opt_q15.c
│ │ │ ├── arm_correlate_fast_q15.c
│ │ │ ├── arm_correlate_fast_q31.c
│ │ │ ├── arm_correlate_opt_q15.c
│ │ │ ├── arm_correlate_opt_q7.c
│ │ │ ├── arm_correlate_q15.c
│ │ │ ├── arm_correlate_q31.c
│ │ │ ├── arm_correlate_q7.c
│ │ │ ├── arm_fir_decimate_f32.c
│ │ │ ├── arm_fir_decimate_fast_q15.c
│ │ │ ├── arm_fir_decimate_fast_q31.c
│ │ │ ├── arm_fir_decimate_init_f32.c
│ │ │ ├── arm_fir_decimate_init_q15.c
│ │ │ ├── arm_fir_decimate_init_q31.c
│ │ │ ├── arm_fir_decimate_q15.c
│ │ │ ├── arm_fir_decimate_q31.c
│ │ │ ├── arm_fir_f32.c
│ │ │ ├── arm_fir_fast_q15.c
│ │ │ ├── arm_fir_fast_q31.c
│ │ │ ├── arm_fir_init_f32.c
│ │ │ ├── arm_fir_init_q15.c
│ │ │ ├── arm_fir_init_q31.c
│ │ │ ├── arm_fir_init_q7.c
│ │ │ ├── arm_fir_interpolate_f32.c
│ │ │ ├── arm_fir_interpolate_init_f32.c
│ │ │ ├── arm_fir_interpolate_init_q15.c
│ │ │ ├── arm_fir_interpolate_init_q31.c
│ │ │ ├── arm_fir_interpolate_q15.c
│ │ │ ├── arm_fir_interpolate_q31.c
│ │ │ ├── arm_fir_lattice_f32.c
│ │ │ ├── arm_fir_lattice_init_f32.c
│ │ │ ├── arm_fir_lattice_init_q15.c
│ │ │ ├── arm_fir_lattice_init_q31.c
│ │ │ ├── arm_fir_lattice_q15.c
│ │ │ ├── arm_fir_lattice_q31.c
│ │ │ ├── arm_fir_q15.c
│ │ │ ├── arm_fir_q31.c
│ │ │ ├── arm_fir_q7.c
│ │ │ ├── arm_fir_sparse_f32.c
│ │ │ ├── arm_fir_sparse_init_f32.c
│ │ │ ├── arm_fir_sparse_init_q15.c
│ │ │ ├── arm_fir_sparse_init_q31.c
│ │ │ ├── arm_fir_sparse_init_q7.c
│ │ │ ├── arm_fir_sparse_q15.c
│ │ │ ├── arm_fir_sparse_q31.c
│ │ │ ├── arm_fir_sparse_q7.c
│ │ │ ├── arm_iir_lattice_f32.c
│ │ │ ├── arm_iir_lattice_init_f32.c
│ │ │ ├── arm_iir_lattice_init_q15.c
│ │ │ ├── arm_iir_lattice_init_q31.c
│ │ │ ├── arm_iir_lattice_q15.c
│ │ │ ├── arm_iir_lattice_q31.c
│ │ │ ├── arm_lms_f32.c
│ │ │ ├── arm_lms_init_f32.c
│ │ │ ├── arm_lms_init_q15.c
│ │ │ ├── arm_lms_init_q31.c
│ │ │ ├── arm_lms_norm_f32.c
│ │ │ ├── arm_lms_norm_init_f32.c
│ │ │ ├── arm_lms_norm_init_q15.c
│ │ │ ├── arm_lms_norm_init_q31.c
│ │ │ ├── arm_lms_norm_q15.c
│ │ │ ├── arm_lms_norm_q31.c
│ │ │ ├── arm_lms_q15.c
│ │ │ └── arm_lms_q31.c
│ │ │ ├── MatrixFunctions
│ │ │ ├── arm_mat_add_f32.c
│ │ │ ├── arm_mat_add_q15.c
│ │ │ ├── arm_mat_add_q31.c
│ │ │ ├── arm_mat_cmplx_mult_f32.c
│ │ │ ├── arm_mat_cmplx_mult_q15.c
│ │ │ ├── arm_mat_cmplx_mult_q31.c
│ │ │ ├── arm_mat_init_f32.c
│ │ │ ├── arm_mat_init_q15.c
│ │ │ ├── arm_mat_init_q31.c
│ │ │ ├── arm_mat_inverse_f32.c
│ │ │ ├── arm_mat_inverse_f64.c
│ │ │ ├── arm_mat_mult_f32.c
│ │ │ ├── arm_mat_mult_fast_q15.c
│ │ │ ├── arm_mat_mult_fast_q31.c
│ │ │ ├── arm_mat_mult_q15.c
│ │ │ ├── arm_mat_mult_q31.c
│ │ │ ├── arm_mat_scale_f32.c
│ │ │ ├── arm_mat_scale_q15.c
│ │ │ ├── arm_mat_scale_q31.c
│ │ │ ├── arm_mat_sub_f32.c
│ │ │ ├── arm_mat_sub_q15.c
│ │ │ ├── arm_mat_sub_q31.c
│ │ │ ├── arm_mat_trans_f32.c
│ │ │ ├── arm_mat_trans_q15.c
│ │ │ └── arm_mat_trans_q31.c
│ │ │ ├── StatisticsFunctions
│ │ │ ├── arm_max_f32.c
│ │ │ ├── arm_max_q15.c
│ │ │ ├── arm_max_q31.c
│ │ │ ├── arm_max_q7.c
│ │ │ ├── arm_mean_f32.c
│ │ │ ├── arm_mean_q15.c
│ │ │ ├── arm_mean_q31.c
│ │ │ ├── arm_mean_q7.c
│ │ │ ├── arm_min_f32.c
│ │ │ ├── arm_min_q15.c
│ │ │ ├── arm_min_q31.c
│ │ │ ├── arm_min_q7.c
│ │ │ ├── arm_power_f32.c
│ │ │ ├── arm_power_q15.c
│ │ │ ├── arm_power_q31.c
│ │ │ ├── arm_power_q7.c
│ │ │ ├── arm_rms_f32.c
│ │ │ ├── arm_rms_q15.c
│ │ │ ├── arm_rms_q31.c
│ │ │ ├── arm_std_f32.c
│ │ │ ├── arm_std_q15.c
│ │ │ ├── arm_std_q31.c
│ │ │ ├── arm_var_f32.c
│ │ │ ├── arm_var_q15.c
│ │ │ └── arm_var_q31.c
│ │ │ ├── SupportFunctions
│ │ │ ├── arm_copy_f32.c
│ │ │ ├── arm_copy_q15.c
│ │ │ ├── arm_copy_q31.c
│ │ │ ├── arm_copy_q7.c
│ │ │ ├── arm_fill_f32.c
│ │ │ ├── arm_fill_q15.c
│ │ │ ├── arm_fill_q31.c
│ │ │ ├── arm_fill_q7.c
│ │ │ ├── arm_float_to_q15.c
│ │ │ ├── arm_float_to_q31.c
│ │ │ ├── arm_float_to_q7.c
│ │ │ ├── arm_q15_to_float.c
│ │ │ ├── arm_q15_to_q31.c
│ │ │ ├── arm_q15_to_q7.c
│ │ │ ├── arm_q31_to_float.c
│ │ │ ├── arm_q31_to_q15.c
│ │ │ ├── arm_q31_to_q7.c
│ │ │ ├── arm_q7_to_float.c
│ │ │ ├── arm_q7_to_q15.c
│ │ │ └── arm_q7_to_q31.c
│ │ │ └── TransformFunctions
│ │ │ ├── arm_bitreversal.c
│ │ │ ├── arm_bitreversal2.S
│ │ │ ├── arm_cfft_f32.c
│ │ │ ├── arm_cfft_q15.c
│ │ │ ├── arm_cfft_q31.c
│ │ │ ├── arm_cfft_radix2_f32.c
│ │ │ ├── arm_cfft_radix2_init_f32.c
│ │ │ ├── arm_cfft_radix2_init_q15.c
│ │ │ ├── arm_cfft_radix2_init_q31.c
│ │ │ ├── arm_cfft_radix2_q15.c
│ │ │ ├── arm_cfft_radix2_q31.c
│ │ │ ├── arm_cfft_radix4_f32.c
│ │ │ ├── arm_cfft_radix4_init_f32.c
│ │ │ ├── arm_cfft_radix4_init_q15.c
│ │ │ ├── arm_cfft_radix4_init_q31.c
│ │ │ ├── arm_cfft_radix4_q15.c
│ │ │ ├── arm_cfft_radix4_q31.c
│ │ │ ├── arm_cfft_radix8_f32.c
│ │ │ ├── arm_dct4_f32.c
│ │ │ ├── arm_dct4_init_f32.c
│ │ │ ├── arm_dct4_init_q15.c
│ │ │ ├── arm_dct4_init_q31.c
│ │ │ ├── arm_dct4_q15.c
│ │ │ ├── arm_dct4_q31.c
│ │ │ ├── arm_rfft_f32.c
│ │ │ ├── arm_rfft_fast_f32.c
│ │ │ ├── arm_rfft_fast_init_f32.c
│ │ │ ├── arm_rfft_init_f32.c
│ │ │ ├── arm_rfft_init_q15.c
│ │ │ ├── arm_rfft_init_q31.c
│ │ │ ├── arm_rfft_q15.c
│ │ │ └── arm_rfft_q31.c
│ ├── Device
│ │ └── ST
│ │ │ └── STM32F0xx
│ │ │ └── Include
│ │ │ ├── stm32f070xb.h
│ │ │ ├── stm32f0xx.h
│ │ │ └── system_stm32f0xx.h
│ ├── Include
│ │ ├── arm_common_tables.h
│ │ ├── arm_const_structs.h
│ │ ├── arm_math.h
│ │ ├── cmsis_armcc.h
│ │ ├── cmsis_armcc_V6.h
│ │ ├── cmsis_gcc.h
│ │ ├── core_cm0.h
│ │ ├── core_cm0plus.h
│ │ ├── core_cm3.h
│ │ ├── core_cm4.h
│ │ ├── core_cm7.h
│ │ ├── core_cmFunc.h
│ │ ├── core_cmInstr.h
│ │ ├── core_cmSimd.h
│ │ ├── core_sc000.h
│ │ └── core_sc300.h
│ ├── Lib
│ │ ├── ARM
│ │ │ ├── arm_cortexM0b_math.lib
│ │ │ └── arm_cortexM0l_math.lib
│ │ └── GCC
│ │ │ └── libarm_cortexM0l_math.a
│ └── RTOS
│ │ └── Template
│ │ └── cmsis_os.h
└── STM32F0xx_HAL_Driver
│ ├── Inc
│ ├── Legacy
│ │ └── stm32_hal_legacy.h
│ ├── stm32f0xx_hal.h
│ ├── stm32f0xx_hal_cortex.h
│ ├── stm32f0xx_hal_def.h
│ ├── stm32f0xx_hal_dma.h
│ ├── stm32f0xx_hal_dma_ex.h
│ ├── stm32f0xx_hal_flash.h
│ ├── stm32f0xx_hal_flash_ex.h
│ ├── stm32f0xx_hal_gpio.h
│ ├── stm32f0xx_hal_gpio_ex.h
│ ├── stm32f0xx_hal_i2c.h
│ ├── stm32f0xx_hal_i2c_ex.h
│ ├── stm32f0xx_hal_iwdg.h
│ ├── stm32f0xx_hal_pwr.h
│ ├── stm32f0xx_hal_pwr_ex.h
│ ├── stm32f0xx_hal_rcc.h
│ ├── stm32f0xx_hal_rcc_ex.h
│ ├── stm32f0xx_hal_spi.h
│ ├── stm32f0xx_hal_spi_ex.h
│ ├── stm32f0xx_hal_tim.h
│ ├── stm32f0xx_hal_tim_ex.h
│ ├── stm32f0xx_hal_uart.h
│ └── stm32f0xx_hal_uart_ex.h
│ └── Src
│ ├── stm32f0xx_hal.c
│ ├── stm32f0xx_hal_cortex.c
│ ├── stm32f0xx_hal_dma.c
│ ├── stm32f0xx_hal_flash.c
│ ├── stm32f0xx_hal_flash_ex.c
│ ├── stm32f0xx_hal_gpio.c
│ ├── stm32f0xx_hal_i2c.c
│ ├── stm32f0xx_hal_i2c_ex.c
│ ├── stm32f0xx_hal_iwdg.c
│ ├── stm32f0xx_hal_pwr.c
│ ├── stm32f0xx_hal_pwr_ex.c
│ ├── stm32f0xx_hal_rcc.c
│ ├── stm32f0xx_hal_rcc_ex.c
│ ├── stm32f0xx_hal_spi.c
│ ├── stm32f0xx_hal_spi_ex.c
│ ├── stm32f0xx_hal_tim.c
│ ├── stm32f0xx_hal_tim_ex.c
│ ├── stm32f0xx_hal_uart.c
│ └── stm32f0xx_hal_uart_ex.c
├── EWARM
├── BootloaderHAL.dep
├── BootloaderHAL.ewd
├── BootloaderHAL.ewp
├── BootloaderHAL.ewt
├── Project.eww
├── settings
│ ├── BootloaderHAL.BootloaderHAL.cspy.bat
│ ├── BootloaderHAL.BootloaderHAL.cspy.ps1
│ ├── BootloaderHAL.BootloaderHAL.driver.xcl
│ ├── BootloaderHAL.BootloaderHAL.general.xcl
│ ├── BootloaderHAL.crun
│ ├── BootloaderHAL.dbgdt
│ ├── BootloaderHAL.dnx
│ └── Project.wsdt
├── startup_stm32f070xb.s
└── stm32f070xb_flash.icf
├── Inc
├── bootloader.h
├── internal_flash_driver.h
├── main.h
├── queue_manager.h
├── stm32f0xx_hal_conf.h
├── stm32f0xx_it.h
├── uart_handle.h
└── utils.h
├── README.md
├── Src
├── bootloader.c
├── internal_flash_driver.c
├── main.c
├── queue_manager.c
├── stm32f0xx_hal_msp.c
├── stm32f0xx_it.c
├── system_stm32f0xx.c
├── uart_handle.c
└── utils.c
└── w25qxx
├── w25qxx.c
├── w25qxx.h
└── w25qxxConfig.h
/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_negate_q31.c
9 | *
10 | * Description: Negates Q31 vectors.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupMath
45 | */
46 |
47 | /**
48 | * @addtogroup negate
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Negates the elements of a Q31 vector.
54 | * @param[in] *pSrc points to the input vector
55 | * @param[out] *pDst points to the output vector
56 | * @param[in] blockSize number of samples in the vector
57 | * @return none.
58 | *
59 | * Scaling and Overflow Behavior:
60 | * \par
61 | * The function uses saturating arithmetic.
62 | * The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
63 | */
64 |
65 | void arm_negate_q31(
66 | q31_t * pSrc,
67 | q31_t * pDst,
68 | uint32_t blockSize)
69 | {
70 | q31_t in; /* Temporary variable */
71 | uint32_t blkCnt; /* loop counter */
72 |
73 | #ifndef ARM_MATH_CM0_FAMILY
74 |
75 | /* Run the below code for Cortex-M4 and Cortex-M3 */
76 | q31_t in1, in2, in3, in4;
77 |
78 | /*loop Unrolling */
79 | blkCnt = blockSize >> 2u;
80 |
81 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
82 | ** a second loop below computes the remaining 1 to 3 samples. */
83 | while(blkCnt > 0u)
84 | {
85 | /* C = -A */
86 | /* Negate and then store the results in the destination buffer. */
87 | in1 = *pSrc++;
88 | in2 = *pSrc++;
89 | in3 = *pSrc++;
90 | in4 = *pSrc++;
91 |
92 | *pDst++ = __QSUB(0, in1);
93 | *pDst++ = __QSUB(0, in2);
94 | *pDst++ = __QSUB(0, in3);
95 | *pDst++ = __QSUB(0, in4);
96 |
97 | /* Decrement the loop counter */
98 | blkCnt--;
99 | }
100 |
101 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
102 | ** No loop unrolling is used. */
103 | blkCnt = blockSize % 0x4u;
104 |
105 | #else
106 |
107 | /* Run the below code for Cortex-M0 */
108 |
109 | /* Initialize blkCnt with number of samples */
110 | blkCnt = blockSize;
111 |
112 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
113 |
114 |
115 | while(blkCnt > 0u)
116 | {
117 | /* C = -A */
118 | /* Negate and then store the result in the destination buffer. */
119 | in = *pSrc++;
120 | *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
121 |
122 | /* Decrement the loop counter */
123 | blkCnt--;
124 | }
125 | }
126 |
127 | /**
128 | * @} end of negate group
129 | */
130 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q7.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_negate_q7.c
9 | *
10 | * Description: Negates Q7 vectors.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupMath
45 | */
46 |
47 | /**
48 | * @addtogroup negate
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Negates the elements of a Q7 vector.
54 | * @param[in] *pSrc points to the input vector
55 | * @param[out] *pDst points to the output vector
56 | * @param[in] blockSize number of samples in the vector
57 | * @return none.
58 | *
59 | * Scaling and Overflow Behavior:
60 | * \par
61 | * The function uses saturating arithmetic.
62 | * The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.
63 | */
64 |
65 | void arm_negate_q7(
66 | q7_t * pSrc,
67 | q7_t * pDst,
68 | uint32_t blockSize)
69 | {
70 | uint32_t blkCnt; /* loop counter */
71 | q7_t in;
72 |
73 | #ifndef ARM_MATH_CM0_FAMILY
74 |
75 | /* Run the below code for Cortex-M4 and Cortex-M3 */
76 | q31_t input; /* Input values1-4 */
77 | q31_t zero = 0x00000000;
78 |
79 |
80 | /*loop Unrolling */
81 | blkCnt = blockSize >> 2u;
82 |
83 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
84 | ** a second loop below computes the remaining 1 to 3 samples. */
85 | while(blkCnt > 0u)
86 | {
87 | /* C = -A */
88 | /* Read four inputs */
89 | input = *__SIMD32(pSrc)++;
90 |
91 | /* Store the Negated results in the destination buffer in a single cycle by packing the results */
92 | *__SIMD32(pDst)++ = __QSUB8(zero, input);
93 |
94 | /* Decrement the loop counter */
95 | blkCnt--;
96 | }
97 |
98 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
99 | ** No loop unrolling is used. */
100 | blkCnt = blockSize % 0x4u;
101 |
102 | #else
103 |
104 | /* Run the below code for Cortex-M0 */
105 |
106 | /* Initialize blkCnt with number of samples */
107 | blkCnt = blockSize;
108 |
109 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
110 |
111 | while(blkCnt > 0u)
112 | {
113 | /* C = -A */
114 | /* Negate and then store the results in the destination buffer. */ \
115 | in = *pSrc++;
116 | *pDst++ = (in == (q7_t) 0x80) ? 0x7f : -in;
117 |
118 | /* Decrement the loop counter */
119 | blkCnt--;
120 | }
121 | }
122 |
123 | /**
124 | * @} end of negate group
125 | */
126 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_f32.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_init_f32.c
9 | *
10 | * Description: Floating-point PID Control initialization function
11 | *
12 | *
13 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
14 | *
15 | * Redistribution and use in source and binary forms, with or without
16 | * modification, are permitted provided that the following conditions
17 | * are met:
18 | * - Redistributions of source code must retain the above copyright
19 | * notice, this list of conditions and the following disclaimer.
20 | * - Redistributions in binary form must reproduce the above copyright
21 | * notice, this list of conditions and the following disclaimer in
22 | * the documentation and/or other materials provided with the
23 | * distribution.
24 | * - Neither the name of ARM LIMITED nor the names of its contributors
25 | * may be used to endorse or promote products derived from this
26 | * software without specific prior written permission.
27 | *
28 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
31 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
32 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
33 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
34 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
35 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
36 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
38 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39 | * POSSIBILITY OF SUCH DAMAGE.
40 | * ------------------------------------------------------------------- */
41 |
42 | #include "arm_math.h"
43 |
44 | /**
45 | * @addtogroup PID
46 | * @{
47 | */
48 |
49 | /**
50 | * @brief Initialization function for the floating-point PID Control.
51 | * @param[in,out] *S points to an instance of the PID structure.
52 | * @param[in] resetStateFlag flag to reset the state. 0 = no change in state & 1 = reset the state.
53 | * @return none.
54 | * \par Description:
55 | * \par
56 | * The resetStateFlag specifies whether to set state to zero or not. \n
57 | * The function computes the structure fields: A0, A1 A2
58 | * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
59 | * also sets the state variables to all zeros.
60 | */
61 |
62 | void arm_pid_init_f32(
63 | arm_pid_instance_f32 * S,
64 | int32_t resetStateFlag)
65 | {
66 |
67 | /* Derived coefficient A0 */
68 | S->A0 = S->Kp + S->Ki + S->Kd;
69 |
70 | /* Derived coefficient A1 */
71 | S->A1 = (-S->Kp) - ((float32_t) 2.0 * S->Kd);
72 |
73 | /* Derived coefficient A2 */
74 | S->A2 = S->Kd;
75 |
76 | /* Check whether state needs reset or not */
77 | if(resetStateFlag)
78 | {
79 | /* Clear the state buffer. The size will be always 3 samples */
80 | memset(S->state, 0, 3u * sizeof(float32_t));
81 | }
82 |
83 | }
84 |
85 | /**
86 | * @} end of PID group
87 | */
88 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_init_q15.c
9 | *
10 | * Description: Q15 PID Control initialization function
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup PID
45 | * @{
46 | */
47 |
48 | /**
49 | * @details
50 | * @param[in,out] *S points to an instance of the Q15 PID structure.
51 | * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
52 | * @return none.
53 | * \par Description:
54 | * \par
55 | * The resetStateFlag specifies whether to set state to zero or not. \n
56 | * The function computes the structure fields: A0, A1 A2
57 | * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
58 | * also sets the state variables to all zeros.
59 | */
60 |
61 | void arm_pid_init_q15(
62 | arm_pid_instance_q15 * S,
63 | int32_t resetStateFlag)
64 | {
65 |
66 | #ifndef ARM_MATH_CM0_FAMILY
67 |
68 | /* Run the below code for Cortex-M4 and Cortex-M3 */
69 |
70 | /* Derived coefficient A0 */
71 | S->A0 = __QADD16(__QADD16(S->Kp, S->Ki), S->Kd);
72 |
73 | /* Derived coefficients and pack into A1 */
74 |
75 | #ifndef ARM_MATH_BIG_ENDIAN
76 |
77 | S->A1 = __PKHBT(-__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), S->Kd, 16);
78 |
79 | #else
80 |
81 | S->A1 = __PKHBT(S->Kd, -__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), 16);
82 |
83 | #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
84 |
85 | /* Check whether state needs reset or not */
86 | if(resetStateFlag)
87 | {
88 | /* Clear the state buffer. The size will be always 3 samples */
89 | memset(S->state, 0, 3u * sizeof(q15_t));
90 | }
91 |
92 | #else
93 |
94 | /* Run the below code for Cortex-M0 */
95 |
96 | q31_t temp; /*to store the sum */
97 |
98 | /* Derived coefficient A0 */
99 | temp = S->Kp + S->Ki + S->Kd;
100 | S->A0 = (q15_t) __SSAT(temp, 16);
101 |
102 | /* Derived coefficients and pack into A1 */
103 | temp = -(S->Kd + S->Kd + S->Kp);
104 | S->A1 = (q15_t) __SSAT(temp, 16);
105 | S->A2 = S->Kd;
106 |
107 |
108 |
109 | /* Check whether state needs reset or not */
110 | if(resetStateFlag)
111 | {
112 | /* Clear the state buffer. The size will be always 3 samples */
113 | memset(S->state, 0, 3u * sizeof(q15_t));
114 | }
115 |
116 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
117 |
118 | }
119 |
120 | /**
121 | * @} end of PID group
122 | */
123 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_init_q31.c
9 | *
10 | * Description: Q31 PID Control initialization function
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup PID
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Initialization function for the Q31 PID Control.
50 | * @param[in,out] *S points to an instance of the Q31 PID structure.
51 | * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
52 | * @return none.
53 | * \par Description:
54 | * \par
55 | * The resetStateFlag specifies whether to set state to zero or not. \n
56 | * The function computes the structure fields: A0, A1 A2
57 | * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
58 | * also sets the state variables to all zeros.
59 | */
60 |
61 | void arm_pid_init_q31(
62 | arm_pid_instance_q31 * S,
63 | int32_t resetStateFlag)
64 | {
65 |
66 | #ifndef ARM_MATH_CM0_FAMILY
67 |
68 | /* Run the below code for Cortex-M4 and Cortex-M3 */
69 |
70 | /* Derived coefficient A0 */
71 | S->A0 = __QADD(__QADD(S->Kp, S->Ki), S->Kd);
72 |
73 | /* Derived coefficient A1 */
74 | S->A1 = -__QADD(__QADD(S->Kd, S->Kd), S->Kp);
75 |
76 |
77 | #else
78 |
79 | /* Run the below code for Cortex-M0 */
80 |
81 | q31_t temp;
82 |
83 | /* Derived coefficient A0 */
84 | temp = clip_q63_to_q31((q63_t) S->Kp + S->Ki);
85 | S->A0 = clip_q63_to_q31((q63_t) temp + S->Kd);
86 |
87 | /* Derived coefficient A1 */
88 | temp = clip_q63_to_q31((q63_t) S->Kd + S->Kd);
89 | S->A1 = -clip_q63_to_q31((q63_t) temp + S->Kp);
90 |
91 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
92 |
93 | /* Derived coefficient A2 */
94 | S->A2 = S->Kd;
95 |
96 | /* Check whether state needs reset or not */
97 | if(resetStateFlag)
98 | {
99 | /* Clear the state buffer. The size will be always 3 samples */
100 | memset(S->state, 0, 3u * sizeof(q31_t));
101 | }
102 |
103 | }
104 |
105 | /**
106 | * @} end of PID group
107 | */
108 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_f32.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_reset_f32.c
9 | *
10 | * Description: Floating-point PID Control reset function
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup PID
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Reset function for the floating-point PID Control.
50 | * @param[in] *S Instance pointer of PID control data structure.
51 | * @return none.
52 | * \par Description:
53 | * The function resets the state buffer to zeros.
54 | */
55 | void arm_pid_reset_f32(
56 | arm_pid_instance_f32 * S)
57 | {
58 |
59 | /* Clear the state buffer. The size will be always 3 samples */
60 | memset(S->state, 0, 3u * sizeof(float32_t));
61 | }
62 |
63 | /**
64 | * @} end of PID group
65 | */
66 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_reset_q15.c
9 | *
10 | * Description: Q15 PID Control reset function
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup PID
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Reset function for the Q15 PID Control.
50 | * @param[in] *S Instance pointer of PID control data structure.
51 | * @return none.
52 | * \par Description:
53 | * The function resets the state buffer to zeros.
54 | */
55 | void arm_pid_reset_q15(
56 | arm_pid_instance_q15 * S)
57 | {
58 | /* Reset state to zero, The size will be always 3 samples */
59 | memset(S->state, 0, 3u * sizeof(q15_t));
60 | }
61 |
62 | /**
63 | * @} end of PID group
64 | */
65 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_reset_q31.c
9 | *
10 | * Description: Q31 PID Control reset function
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup PID
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Reset function for the Q31 PID Control.
50 | * @param[in] *S Instance pointer of PID control data structure.
51 | * @return none.
52 | * \par Description:
53 | * The function resets the state buffer to zeros.
54 | */
55 | void arm_pid_reset_q31(
56 | arm_pid_instance_q31 * S)
57 | {
58 |
59 | /* Clear the state buffer. The size will be always 3 samples */
60 | memset(S->state, 0, 3u * sizeof(q31_t));
61 | }
62 |
63 | /**
64 | * @} end of PID group
65 | */
66 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 07. September 2015
5 | * $Revision: V.1.4.5 a
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_cos_q15.c
9 | *
10 | * Description: Fast cosine calculation for Q15 values.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 | #include "arm_common_tables.h"
43 |
44 | /**
45 | * @ingroup groupFastMath
46 | */
47 |
48 | /**
49 | * @addtogroup cos
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Fast approximation to the trigonometric cosine function for Q15 data.
55 | * @param[in] x Scaled input value in radians.
56 | * @return cos(x).
57 | *
58 | * The Q15 input value is in the range [0 +0.9999] and is mapped to a radian
59 | * value in the range [0 2*pi).
60 | */
61 |
62 | q15_t arm_cos_q15(
63 | q15_t x)
64 | {
65 | q15_t cosVal; /* Temporary variables for input, output */
66 | int32_t index; /* Index variables */
67 | q15_t a, b; /* Four nearest output values */
68 | q15_t fract; /* Temporary values for fractional values */
69 |
70 | /* add 0.25 (pi/2) to read sine table */
71 | x = (uint16_t)x + 0x2000;
72 | if(x < 0)
73 | { /* convert negative numbers to corresponding positive ones */
74 | x = (uint16_t)x + 0x8000;
75 | }
76 |
77 | /* Calculate the nearest index */
78 | index = (uint32_t)x >> FAST_MATH_Q15_SHIFT;
79 |
80 | /* Calculation of fractional value */
81 | fract = (x - (index << FAST_MATH_Q15_SHIFT)) << 9;
82 |
83 | /* Read two nearest values of input value from the sin table */
84 | a = sinTable_q15[index];
85 | b = sinTable_q15[index+1];
86 |
87 | /* Linear interpolation process */
88 | cosVal = (q31_t)(0x8000-fract)*a >> 16;
89 | cosVal = (q15_t)((((q31_t)cosVal << 16) + ((q31_t)fract*b)) >> 16);
90 |
91 | return cosVal << 1;
92 | }
93 |
94 | /**
95 | * @} end of cos group
96 | */
97 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 07. September 2015
5 | * $Revision: V.1.4.5 a
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_cos_q31.c
9 | *
10 | * Description: Fast cosine calculation for Q31 values.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 | #include "arm_common_tables.h"
43 |
44 | /**
45 | * @ingroup groupFastMath
46 | */
47 |
48 | /**
49 | * @addtogroup cos
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Fast approximation to the trigonometric cosine function for Q31 data.
55 | * @param[in] x Scaled input value in radians.
56 | * @return cos(x).
57 | *
58 | * The Q31 input value is in the range [0 +0.9999] and is mapped to a radian
59 | * value in the range [0 2*pi).
60 | */
61 |
62 | q31_t arm_cos_q31(
63 | q31_t x)
64 | {
65 | q31_t cosVal; /* Temporary variables for input, output */
66 | int32_t index; /* Index variables */
67 | q31_t a, b; /* Four nearest output values */
68 | q31_t fract; /* Temporary values for fractional values */
69 |
70 | /* add 0.25 (pi/2) to read sine table */
71 | x = (uint32_t)x + 0x20000000;
72 | if(x < 0)
73 | { /* convert negative numbers to corresponding positive ones */
74 | x = (uint32_t)x + 0x80000000;
75 | }
76 |
77 | /* Calculate the nearest index */
78 | index = (uint32_t)x >> FAST_MATH_Q31_SHIFT;
79 |
80 | /* Calculation of fractional value */
81 | fract = (x - (index << FAST_MATH_Q31_SHIFT)) << 9;
82 |
83 | /* Read two nearest values of input value from the sin table */
84 | a = sinTable_q31[index];
85 | b = sinTable_q31[index+1];
86 |
87 | /* Linear interpolation process */
88 | cosVal = (q63_t)(0x80000000-fract)*a >> 32;
89 | cosVal = (q31_t)((((q63_t)cosVal << 32) + ((q63_t)fract*b)) >> 32);
90 |
91 | return cosVal << 1;
92 | }
93 |
94 | /**
95 | * @} end of cos group
96 | */
97 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_sin_q15.c
9 | *
10 | * Description: Fast sine calculation for Q15 values.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 | #include "arm_common_tables.h"
43 |
44 | /**
45 | * @ingroup groupFastMath
46 | */
47 |
48 | /**
49 | * @addtogroup sin
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Fast approximation to the trigonometric sine function for Q15 data.
55 | * @param[in] x Scaled input value in radians.
56 | * @return sin(x).
57 | *
58 | * The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi).
59 | */
60 |
61 | q15_t arm_sin_q15(
62 | q15_t x)
63 | {
64 | q15_t sinVal; /* Temporary variables for input, output */
65 | int32_t index; /* Index variables */
66 | q15_t a, b; /* Four nearest output values */
67 | q15_t fract; /* Temporary values for fractional values */
68 |
69 | /* Calculate the nearest index */
70 | index = (uint32_t)x >> FAST_MATH_Q15_SHIFT;
71 |
72 | /* Calculation of fractional value */
73 | fract = (x - (index << FAST_MATH_Q15_SHIFT)) << 9;
74 |
75 | /* Read two nearest values of input value from the sin table */
76 | a = sinTable_q15[index];
77 | b = sinTable_q15[index+1];
78 |
79 | /* Linear interpolation process */
80 | sinVal = (q31_t)(0x8000-fract)*a >> 16;
81 | sinVal = (q15_t)((((q31_t)sinVal << 16) + ((q31_t)fract*b)) >> 16);
82 |
83 | return sinVal << 1;
84 | }
85 |
86 | /**
87 | * @} end of sin group
88 | */
89 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_sin_q31.c
9 | *
10 | * Description: Fast sine calculation for Q31 values.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 | #include "arm_common_tables.h"
43 |
44 | /**
45 | * @ingroup groupFastMath
46 | */
47 |
48 | /**
49 | * @addtogroup sin
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Fast approximation to the trigonometric sine function for Q31 data.
55 | * @param[in] x Scaled input value in radians.
56 | * @return sin(x).
57 | *
58 | * The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi). */
59 |
60 | q31_t arm_sin_q31(
61 | q31_t x)
62 | {
63 | q31_t sinVal; /* Temporary variables for input, output */
64 | int32_t index; /* Index variables */
65 | q31_t a, b; /* Four nearest output values */
66 | q31_t fract; /* Temporary values for fractional values */
67 |
68 | /* Calculate the nearest index */
69 | index = (uint32_t)x >> FAST_MATH_Q31_SHIFT;
70 |
71 | /* Calculation of fractional value */
72 | fract = (x - (index << FAST_MATH_Q31_SHIFT)) << 9;
73 |
74 | /* Read two nearest values of input value from the sin table */
75 | a = sinTable_q31[index];
76 | b = sinTable_q31[index+1];
77 |
78 | /* Linear interpolation process */
79 | sinVal = (q63_t)(0x80000000-fract)*a >> 32;
80 | sinVal = (q31_t)((((q63_t)sinVal << 32) + ((q63_t)fract*b)) >> 32);
81 |
82 | return sinVal << 1;
83 | }
84 |
85 | /**
86 | * @} end of sin group
87 | */
88 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_biquad_cascade_df2T_init_f32.c
9 | *
10 | * Description: Initialization function for the floating-point transposed
11 | * direct form II Biquad cascade filter.
12 | *
13 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
14 | *
15 | * Redistribution and use in source and binary forms, with or without
16 | * modification, are permitted provided that the following conditions
17 | * are met:
18 | * - Redistributions of source code must retain the above copyright
19 | * notice, this list of conditions and the following disclaimer.
20 | * - Redistributions in binary form must reproduce the above copyright
21 | * notice, this list of conditions and the following disclaimer in
22 | * the documentation and/or other materials provided with the
23 | * distribution.
24 | * - Neither the name of ARM LIMITED nor the names of its contributors
25 | * may be used to endorse or promote products derived from this
26 | * software without specific prior written permission.
27 | *
28 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
31 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
32 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
33 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
34 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
35 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
36 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
38 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39 | * POSSIBILITY OF SUCH DAMAGE.
40 | * ---------------------------------------------------------------------------*/
41 |
42 | #include "arm_math.h"
43 |
44 | /**
45 | * @ingroup groupFilters
46 | */
47 |
48 | /**
49 | * @addtogroup BiquadCascadeDF2T
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter.
55 | * @param[in,out] *S points to an instance of the filter data structure.
56 | * @param[in] numStages number of 2nd order stages in the filter.
57 | * @param[in] *pCoeffs points to the filter coefficients.
58 | * @param[in] *pState points to the state buffer.
59 | * @return none
60 | *
61 | * Coefficient and State Ordering:
62 | * \par
63 | * The coefficients are stored in the array pCoeffs in the following order:
64 | *
65 | * {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
66 | *
67 | *
68 | * \par
69 | * where b1x and a1x are the coefficients for the first stage,
70 | * b2x and a2x are the coefficients for the second stage,
71 | * and so on. The pCoeffs array contains a total of 5*numStages values.
72 | *
73 | * \par
74 | * The pState is a pointer to state array.
75 | * Each Biquad stage has 2 state variables d1, and d2.
76 | * The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.
77 | * The state array has a total length of 2*numStages values.
78 | * The state variables are updated after each block of data is processed; the coefficients are untouched.
79 | */
80 |
81 | void arm_biquad_cascade_df2T_init_f32(
82 | arm_biquad_cascade_df2T_instance_f32 * S,
83 | uint8_t numStages,
84 | float32_t * pCoeffs,
85 | float32_t * pState)
86 | {
87 | /* Assign filter stages */
88 | S->numStages = numStages;
89 |
90 | /* Assign coefficient pointer */
91 | S->pCoeffs = pCoeffs;
92 |
93 | /* Clear state buffer and size is always 2 * numStages */
94 | memset(pState, 0, (2u * (uint32_t) numStages) * sizeof(float32_t));
95 |
96 | /* Assign state pointer */
97 | S->pState = pState;
98 | }
99 |
100 | /**
101 | * @} end of BiquadCascadeDF2T group
102 | */
103 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_biquad_cascade_df2T_init_f64.c
9 | *
10 | * Description: Initialization function for the floating-point transposed
11 | * direct form II Biquad cascade filter.
12 | *
13 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
14 | *
15 | * Redistribution and use in source and binary forms, with or without
16 | * modification, are permitted provided that the following conditions
17 | * are met:
18 | * - Redistributions of source code must retain the above copyright
19 | * notice, this list of conditions and the following disclaimer.
20 | * - Redistributions in binary form must reproduce the above copyright
21 | * notice, this list of conditions and the following disclaimer in
22 | * the documentation and/or other materials provided with the
23 | * distribution.
24 | * - Neither the name of ARM LIMITED nor the names of its contributors
25 | * may be used to endorse or promote products derived from this
26 | * software without specific prior written permission.
27 | *
28 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
31 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
32 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
33 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
34 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
35 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
36 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
38 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39 | * POSSIBILITY OF SUCH DAMAGE.
40 | * ---------------------------------------------------------------------------*/
41 |
42 | #include "arm_math.h"
43 |
44 | /**
45 | * @ingroup groupFilters
46 | */
47 |
48 | /**
49 | * @addtogroup BiquadCascadeDF2T
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter.
55 | * @param[in,out] *S points to an instance of the filter data structure.
56 | * @param[in] numStages number of 2nd order stages in the filter.
57 | * @param[in] *pCoeffs points to the filter coefficients.
58 | * @param[in] *pState points to the state buffer.
59 | * @return none
60 | *
61 | * Coefficient and State Ordering:
62 | * \par
63 | * The coefficients are stored in the array pCoeffs in the following order:
64 | *
65 | * {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
66 | *
67 | *
68 | * \par
69 | * where b1x and a1x are the coefficients for the first stage,
70 | * b2x and a2x are the coefficients for the second stage,
71 | * and so on. The pCoeffs array contains a total of 5*numStages values.
72 | *
73 | * \par
74 | * The pState is a pointer to state array.
75 | * Each Biquad stage has 2 state variables d1, and d2.
76 | * The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.
77 | * The state array has a total length of 2*numStages values.
78 | * The state variables are updated after each block of data is processed; the coefficients are untouched.
79 | */
80 |
81 | void arm_biquad_cascade_df2T_init_f64(
82 | arm_biquad_cascade_df2T_instance_f64 * S,
83 | uint8_t numStages,
84 | float64_t * pCoeffs,
85 | float64_t * pState)
86 | {
87 | /* Assign filter stages */
88 | S->numStages = numStages;
89 |
90 | /* Assign coefficient pointer */
91 | S->pCoeffs = pCoeffs;
92 |
93 | /* Clear state buffer and size is always 2 * numStages */
94 | memset(pState, 0, (2u * (uint32_t) numStages) * sizeof(float64_t));
95 |
96 | /* Assign state pointer */
97 | S->pState = pState;
98 | }
99 |
100 | /**
101 | * @} end of BiquadCascadeDF2T group
102 | */
103 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_f32.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_init_f32.c
9 | *
10 | * Description: Floating-point FIR filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR
49 | * @{
50 | */
51 |
52 | /**
53 | * @details
54 | *
55 | * @param[in,out] *S points to an instance of the floating-point FIR filter structure.
56 | * @param[in] numTaps Number of filter coefficients in the filter.
57 | * @param[in] *pCoeffs points to the filter coefficients buffer.
58 | * @param[in] *pState points to the state buffer.
59 | * @param[in] blockSize number of samples that are processed per call.
60 | * @return none.
61 | *
62 | * Description:
63 | * \par
64 | * pCoeffs points to the array of filter coefficients stored in time reversed order:
65 | *
66 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
67 | *
68 | * \par
69 | * pState points to the array of state variables.
70 | * pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_f32().
71 | */
72 |
73 | void arm_fir_init_f32(
74 | arm_fir_instance_f32 * S,
75 | uint16_t numTaps,
76 | float32_t * pCoeffs,
77 | float32_t * pState,
78 | uint32_t blockSize)
79 | {
80 | /* Assign filter taps */
81 | S->numTaps = numTaps;
82 |
83 | /* Assign coefficient pointer */
84 | S->pCoeffs = pCoeffs;
85 |
86 | /* Clear state buffer and the size of state buffer is (blockSize + numTaps - 1) */
87 | memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(float32_t));
88 |
89 | /* Assign state pointer */
90 | S->pState = pState;
91 |
92 | }
93 |
94 | /**
95 | * @} end of FIR group
96 | */
97 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_init_q31.c
9 | *
10 | * Description: Q31 FIR filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR
49 | * @{
50 | */
51 |
52 | /**
53 | * @details
54 | *
55 | * @param[in,out] *S points to an instance of the Q31 FIR filter structure.
56 | * @param[in] numTaps Number of filter coefficients in the filter.
57 | * @param[in] *pCoeffs points to the filter coefficients buffer.
58 | * @param[in] *pState points to the state buffer.
59 | * @param[in] blockSize number of samples that are processed per call.
60 | * @return none.
61 | *
62 | * Description:
63 | * \par
64 | * pCoeffs points to the array of filter coefficients stored in time reversed order:
65 | *
66 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
67 | *
68 | * \par
69 | * pState points to the array of state variables.
70 | * pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_q31().
71 | */
72 |
73 | void arm_fir_init_q31(
74 | arm_fir_instance_q31 * S,
75 | uint16_t numTaps,
76 | q31_t * pCoeffs,
77 | q31_t * pState,
78 | uint32_t blockSize)
79 | {
80 | /* Assign filter taps */
81 | S->numTaps = numTaps;
82 |
83 | /* Assign coefficient pointer */
84 | S->pCoeffs = pCoeffs;
85 |
86 | /* Clear state buffer and state array size is (blockSize + numTaps - 1) */
87 | memset(pState, 0, (blockSize + ((uint32_t) numTaps - 1u)) * sizeof(q31_t));
88 |
89 | /* Assign state pointer */
90 | S->pState = pState;
91 |
92 | }
93 |
94 | /**
95 | * @} end of FIR group
96 | */
97 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q7.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_init_q7.c
9 | *
10 | * Description: Q7 FIR filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR
49 | * @{
50 | */
51 | /**
52 | * @param[in,out] *S points to an instance of the Q7 FIR filter structure.
53 | * @param[in] numTaps Number of filter coefficients in the filter.
54 | * @param[in] *pCoeffs points to the filter coefficients buffer.
55 | * @param[in] *pState points to the state buffer.
56 | * @param[in] blockSize number of samples that are processed per call.
57 | * @return none
58 | *
59 | * Description:
60 | * \par
61 | * pCoeffs points to the array of filter coefficients stored in time reversed order:
62 | *
63 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
64 | *
65 | * \par
66 | * pState points to the array of state variables.
67 | * pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_q7().
68 | */
69 |
70 | void arm_fir_init_q7(
71 | arm_fir_instance_q7 * S,
72 | uint16_t numTaps,
73 | q7_t * pCoeffs,
74 | q7_t * pState,
75 | uint32_t blockSize)
76 | {
77 |
78 | /* Assign filter taps */
79 | S->numTaps = numTaps;
80 |
81 | /* Assign coefficient pointer */
82 | S->pCoeffs = pCoeffs;
83 |
84 | /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */
85 | memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q7_t));
86 |
87 | /* Assign state pointer */
88 | S->pState = pState;
89 |
90 | }
91 |
92 | /**
93 | * @} end of FIR group
94 | */
95 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_f32.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_lattice_init_f32.c
9 | *
10 | * Description: Floating-point FIR Lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the floating-point FIR lattice filter.
54 | * @param[in] *S points to an instance of the floating-point FIR lattice structure.
55 | * @param[in] numStages number of filter stages.
56 | * @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
57 | * @param[in] *pState points to the state buffer. The array is of length numStages.
58 | * @return none.
59 | */
60 |
61 | void arm_fir_lattice_init_f32(
62 | arm_fir_lattice_instance_f32 * S,
63 | uint16_t numStages,
64 | float32_t * pCoeffs,
65 | float32_t * pState)
66 | {
67 | /* Assign filter taps */
68 | S->numStages = numStages;
69 |
70 | /* Assign coefficient pointer */
71 | S->pCoeffs = pCoeffs;
72 |
73 | /* Clear state buffer and size is always numStages */
74 | memset(pState, 0, (numStages) * sizeof(float32_t));
75 |
76 | /* Assign state pointer */
77 | S->pState = pState;
78 |
79 | }
80 |
81 | /**
82 | * @} end of FIR_Lattice group
83 | */
84 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q15.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_lattice_init_q15.c
9 | *
10 | * Description: Q15 FIR Lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q15 FIR lattice filter.
54 | * @param[in] *S points to an instance of the Q15 FIR lattice structure.
55 | * @param[in] numStages number of filter stages.
56 | * @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
57 | * @param[in] *pState points to the state buffer. The array is of length numStages.
58 | * @return none.
59 | */
60 |
61 | void arm_fir_lattice_init_q15(
62 | arm_fir_lattice_instance_q15 * S,
63 | uint16_t numStages,
64 | q15_t * pCoeffs,
65 | q15_t * pState)
66 | {
67 | /* Assign filter taps */
68 | S->numStages = numStages;
69 |
70 | /* Assign coefficient pointer */
71 | S->pCoeffs = pCoeffs;
72 |
73 | /* Clear state buffer and size is always numStages */
74 | memset(pState, 0, (numStages) * sizeof(q15_t));
75 |
76 | /* Assign state pointer */
77 | S->pState = pState;
78 |
79 | }
80 |
81 | /**
82 | * @} end of FIR_Lattice group
83 | */
84 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q31.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_lattice_init_q31.c
9 | *
10 | * Description: Q31 FIR lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q31 FIR lattice filter.
54 | * @param[in] *S points to an instance of the Q31 FIR lattice structure.
55 | * @param[in] numStages number of filter stages.
56 | * @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
57 | * @param[in] *pState points to the state buffer. The array is of length numStages.
58 | * @return none.
59 | */
60 |
61 | void arm_fir_lattice_init_q31(
62 | arm_fir_lattice_instance_q31 * S,
63 | uint16_t numStages,
64 | q31_t * pCoeffs,
65 | q31_t * pState)
66 | {
67 | /* Assign filter taps */
68 | S->numStages = numStages;
69 |
70 | /* Assign coefficient pointer */
71 | S->pCoeffs = pCoeffs;
72 |
73 | /* Clear state buffer and size is always numStages */
74 | memset(pState, 0, (numStages) * sizeof(q31_t));
75 |
76 | /* Assign state pointer */
77 | S->pState = pState;
78 |
79 | }
80 |
81 | /**
82 | * @} end of FIR_Lattice group
83 | */
84 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_f32.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_sparse_init_f32.c
9 | *
10 | * Description: Floating-point sparse FIR filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR_Sparse
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the floating-point sparse FIR filter.
54 | * @param[in,out] *S points to an instance of the floating-point sparse FIR structure.
55 | * @param[in] numTaps number of nonzero coefficients in the filter.
56 | * @param[in] *pCoeffs points to the array of filter coefficients.
57 | * @param[in] *pState points to the state buffer.
58 | * @param[in] *pTapDelay points to the array of offset times.
59 | * @param[in] maxDelay maximum offset time supported.
60 | * @param[in] blockSize number of samples that will be processed per block.
61 | * @return none
62 | *
63 | * Description:
64 | * \par
65 | * pCoeffs holds the filter coefficients and has length numTaps.
66 | * pState holds the filter's state variables and must be of length
67 | * maxDelay + blockSize, where maxDelay
68 | * is the maximum number of delay line values.
69 | * blockSize is the
70 | * number of samples processed by the arm_fir_sparse_f32() function.
71 | */
72 |
73 | void arm_fir_sparse_init_f32(
74 | arm_fir_sparse_instance_f32 * S,
75 | uint16_t numTaps,
76 | float32_t * pCoeffs,
77 | float32_t * pState,
78 | int32_t * pTapDelay,
79 | uint16_t maxDelay,
80 | uint32_t blockSize)
81 | {
82 | /* Assign filter taps */
83 | S->numTaps = numTaps;
84 |
85 | /* Assign coefficient pointer */
86 | S->pCoeffs = pCoeffs;
87 |
88 | /* Assign TapDelay pointer */
89 | S->pTapDelay = pTapDelay;
90 |
91 | /* Assign MaxDelay */
92 | S->maxDelay = maxDelay;
93 |
94 | /* reset the stateIndex to 0 */
95 | S->stateIndex = 0u;
96 |
97 | /* Clear state buffer and size is always maxDelay + blockSize */
98 | memset(pState, 0, (maxDelay + blockSize) * sizeof(float32_t));
99 |
100 | /* Assign state pointer */
101 | S->pState = pState;
102 |
103 | }
104 |
105 | /**
106 | * @} end of FIR_Sparse group
107 | */
108 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_sparse_init_q15.c
9 | *
10 | * Description: Q15 sparse FIR filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR_Sparse
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q15 sparse FIR filter.
54 | * @param[in,out] *S points to an instance of the Q15 sparse FIR structure.
55 | * @param[in] numTaps number of nonzero coefficients in the filter.
56 | * @param[in] *pCoeffs points to the array of filter coefficients.
57 | * @param[in] *pState points to the state buffer.
58 | * @param[in] *pTapDelay points to the array of offset times.
59 | * @param[in] maxDelay maximum offset time supported.
60 | * @param[in] blockSize number of samples that will be processed per block.
61 | * @return none
62 | *
63 | * Description:
64 | * \par
65 | * pCoeffs holds the filter coefficients and has length numTaps.
66 | * pState holds the filter's state variables and must be of length
67 | * maxDelay + blockSize, where maxDelay
68 | * is the maximum number of delay line values.
69 | * blockSize is the
70 | * number of words processed by arm_fir_sparse_q15() function.
71 | */
72 |
73 | void arm_fir_sparse_init_q15(
74 | arm_fir_sparse_instance_q15 * S,
75 | uint16_t numTaps,
76 | q15_t * pCoeffs,
77 | q15_t * pState,
78 | int32_t * pTapDelay,
79 | uint16_t maxDelay,
80 | uint32_t blockSize)
81 | {
82 | /* Assign filter taps */
83 | S->numTaps = numTaps;
84 |
85 | /* Assign coefficient pointer */
86 | S->pCoeffs = pCoeffs;
87 |
88 | /* Assign TapDelay pointer */
89 | S->pTapDelay = pTapDelay;
90 |
91 | /* Assign MaxDelay */
92 | S->maxDelay = maxDelay;
93 |
94 | /* reset the stateIndex to 0 */
95 | S->stateIndex = 0u;
96 |
97 | /* Clear state buffer and size is always maxDelay + blockSize */
98 | memset(pState, 0, (maxDelay + blockSize) * sizeof(q15_t));
99 |
100 | /* Assign state pointer */
101 | S->pState = pState;
102 |
103 | }
104 |
105 | /**
106 | * @} end of FIR_Sparse group
107 | */
108 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_sparse_init_q31.c
9 | *
10 | * Description: Q31 sparse FIR filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR_Sparse
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q31 sparse FIR filter.
54 | * @param[in,out] *S points to an instance of the Q31 sparse FIR structure.
55 | * @param[in] numTaps number of nonzero coefficients in the filter.
56 | * @param[in] *pCoeffs points to the array of filter coefficients.
57 | * @param[in] *pState points to the state buffer.
58 | * @param[in] *pTapDelay points to the array of offset times.
59 | * @param[in] maxDelay maximum offset time supported.
60 | * @param[in] blockSize number of samples that will be processed per block.
61 | * @return none
62 | *
63 | * Description:
64 | * \par
65 | * pCoeffs holds the filter coefficients and has length numTaps.
66 | * pState holds the filter's state variables and must be of length
67 | * maxDelay + blockSize, where maxDelay
68 | * is the maximum number of delay line values.
69 | * blockSize is the number of words processed by arm_fir_sparse_q31() function.
70 | */
71 |
72 | void arm_fir_sparse_init_q31(
73 | arm_fir_sparse_instance_q31 * S,
74 | uint16_t numTaps,
75 | q31_t * pCoeffs,
76 | q31_t * pState,
77 | int32_t * pTapDelay,
78 | uint16_t maxDelay,
79 | uint32_t blockSize)
80 | {
81 | /* Assign filter taps */
82 | S->numTaps = numTaps;
83 |
84 | /* Assign coefficient pointer */
85 | S->pCoeffs = pCoeffs;
86 |
87 | /* Assign TapDelay pointer */
88 | S->pTapDelay = pTapDelay;
89 |
90 | /* Assign MaxDelay */
91 | S->maxDelay = maxDelay;
92 |
93 | /* reset the stateIndex to 0 */
94 | S->stateIndex = 0u;
95 |
96 | /* Clear state buffer and size is always maxDelay + blockSize */
97 | memset(pState, 0, (maxDelay + blockSize) * sizeof(q31_t));
98 |
99 | /* Assign state pointer */
100 | S->pState = pState;
101 |
102 | }
103 |
104 | /**
105 | * @} end of FIR_Sparse group
106 | */
107 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q7.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_sparse_init_q7.c
9 | *
10 | * Description: Q7 sparse FIR filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR_Sparse
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q7 sparse FIR filter.
54 | * @param[in,out] *S points to an instance of the Q7 sparse FIR structure.
55 | * @param[in] numTaps number of nonzero coefficients in the filter.
56 | * @param[in] *pCoeffs points to the array of filter coefficients.
57 | * @param[in] *pState points to the state buffer.
58 | * @param[in] *pTapDelay points to the array of offset times.
59 | * @param[in] maxDelay maximum offset time supported.
60 | * @param[in] blockSize number of samples that will be processed per block.
61 | * @return none
62 | *
63 | * Description:
64 | * \par
65 | * pCoeffs holds the filter coefficients and has length numTaps.
66 | * pState holds the filter's state variables and must be of length
67 | * maxDelay + blockSize, where maxDelay
68 | * is the maximum number of delay line values.
69 | * blockSize is the
70 | * number of samples processed by the arm_fir_sparse_q7() function.
71 | */
72 |
73 | void arm_fir_sparse_init_q7(
74 | arm_fir_sparse_instance_q7 * S,
75 | uint16_t numTaps,
76 | q7_t * pCoeffs,
77 | q7_t * pState,
78 | int32_t * pTapDelay,
79 | uint16_t maxDelay,
80 | uint32_t blockSize)
81 | {
82 | /* Assign filter taps */
83 | S->numTaps = numTaps;
84 |
85 | /* Assign coefficient pointer */
86 | S->pCoeffs = pCoeffs;
87 |
88 | /* Assign TapDelay pointer */
89 | S->pTapDelay = pTapDelay;
90 |
91 | /* Assign MaxDelay */
92 | S->maxDelay = maxDelay;
93 |
94 | /* reset the stateIndex to 0 */
95 | S->stateIndex = 0u;
96 |
97 | /* Clear state buffer and size is always maxDelay + blockSize */
98 | memset(pState, 0, (maxDelay + blockSize) * sizeof(q7_t));
99 |
100 | /* Assign state pointer */
101 | S->pState = pState;
102 |
103 | }
104 |
105 | /**
106 | * @} end of FIR_Sparse group
107 | */
108 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_f32.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_iir_lattice_init_f32.c
9 | *
10 | * Description: Floating-point IIR lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup IIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the floating-point IIR lattice filter.
54 | * @param[in] *S points to an instance of the floating-point IIR lattice structure.
55 | * @param[in] numStages number of stages in the filter.
56 | * @param[in] *pkCoeffs points to the reflection coefficient buffer. The array is of length numStages.
57 | * @param[in] *pvCoeffs points to the ladder coefficient buffer. The array is of length numStages+1.
58 | * @param[in] *pState points to the state buffer. The array is of length numStages+blockSize.
59 | * @param[in] blockSize number of samples to process.
60 | * @return none.
61 | */
62 |
63 | void arm_iir_lattice_init_f32(
64 | arm_iir_lattice_instance_f32 * S,
65 | uint16_t numStages,
66 | float32_t * pkCoeffs,
67 | float32_t * pvCoeffs,
68 | float32_t * pState,
69 | uint32_t blockSize)
70 | {
71 | /* Assign filter taps */
72 | S->numStages = numStages;
73 |
74 | /* Assign reflection coefficient pointer */
75 | S->pkCoeffs = pkCoeffs;
76 |
77 | /* Assign ladder coefficient pointer */
78 | S->pvCoeffs = pvCoeffs;
79 |
80 | /* Clear state buffer and size is always blockSize + numStages */
81 | memset(pState, 0, (numStages + blockSize) * sizeof(float32_t));
82 |
83 | /* Assign state pointer */
84 | S->pState = pState;
85 |
86 |
87 | }
88 |
89 | /**
90 | * @} end of IIR_Lattice group
91 | */
92 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q15.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_iir_lattice_init_q15.c
9 | *
10 | * Description: Q15 IIR lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup IIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q15 IIR lattice filter.
54 | * @param[in] *S points to an instance of the Q15 IIR lattice structure.
55 | * @param[in] numStages number of stages in the filter.
56 | * @param[in] *pkCoeffs points to reflection coefficient buffer. The array is of length numStages.
57 | * @param[in] *pvCoeffs points to ladder coefficient buffer. The array is of length numStages+1.
58 | * @param[in] *pState points to state buffer. The array is of length numStages+blockSize.
59 | * @param[in] blockSize number of samples to process per call.
60 | * @return none.
61 | */
62 |
63 | void arm_iir_lattice_init_q15(
64 | arm_iir_lattice_instance_q15 * S,
65 | uint16_t numStages,
66 | q15_t * pkCoeffs,
67 | q15_t * pvCoeffs,
68 | q15_t * pState,
69 | uint32_t blockSize)
70 | {
71 | /* Assign filter taps */
72 | S->numStages = numStages;
73 |
74 | /* Assign reflection coefficient pointer */
75 | S->pkCoeffs = pkCoeffs;
76 |
77 | /* Assign ladder coefficient pointer */
78 | S->pvCoeffs = pvCoeffs;
79 |
80 | /* Clear state buffer and size is always blockSize + numStages */
81 | memset(pState, 0, (numStages + blockSize) * sizeof(q15_t));
82 |
83 | /* Assign state pointer */
84 | S->pState = pState;
85 |
86 |
87 | }
88 |
89 | /**
90 | * @} end of IIR_Lattice group
91 | */
92 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q31.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_iir_lattice_init_q31.c
9 | *
10 | * Description: Initialization function for the Q31 IIR lattice filter.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup IIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q31 IIR lattice filter.
54 | * @param[in] *S points to an instance of the Q31 IIR lattice structure.
55 | * @param[in] numStages number of stages in the filter.
56 | * @param[in] *pkCoeffs points to the reflection coefficient buffer. The array is of length numStages.
57 | * @param[in] *pvCoeffs points to the ladder coefficient buffer. The array is of length numStages+1.
58 | * @param[in] *pState points to the state buffer. The array is of length numStages+blockSize.
59 | * @param[in] blockSize number of samples to process.
60 | * @return none.
61 | */
62 |
63 | void arm_iir_lattice_init_q31(
64 | arm_iir_lattice_instance_q31 * S,
65 | uint16_t numStages,
66 | q31_t * pkCoeffs,
67 | q31_t * pvCoeffs,
68 | q31_t * pState,
69 | uint32_t blockSize)
70 | {
71 | /* Assign filter taps */
72 | S->numStages = numStages;
73 |
74 | /* Assign reflection coefficient pointer */
75 | S->pkCoeffs = pkCoeffs;
76 |
77 | /* Assign ladder coefficient pointer */
78 | S->pvCoeffs = pvCoeffs;
79 |
80 | /* Clear state buffer and size is always blockSize + numStages */
81 | memset(pState, 0, (numStages + blockSize) * sizeof(q31_t));
82 |
83 | /* Assign state pointer */
84 | S->pState = pState;
85 |
86 |
87 | }
88 |
89 | /**
90 | * @} end of IIR_Lattice group
91 | */
92 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_f32.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_lms_init_f32.c
9 | *
10 | * Description: Floating-point LMS filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup LMS
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Initialization function for floating-point LMS filter.
50 | * @param[in] *S points to an instance of the floating-point LMS filter structure.
51 | * @param[in] numTaps number of filter coefficients.
52 | * @param[in] *pCoeffs points to the coefficient buffer.
53 | * @param[in] *pState points to state buffer.
54 | * @param[in] mu step size that controls filter coefficient updates.
55 | * @param[in] blockSize number of samples to process.
56 | * @return none.
57 | */
58 |
59 | /**
60 | * \par Description:
61 | * pCoeffs points to the array of filter coefficients stored in time reversed order:
62 | *
63 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
64 | *
65 | * The initial filter coefficients serve as a starting point for the adaptive filter.
66 | * pState points to an array of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_lms_f32().
67 | */
68 |
69 | void arm_lms_init_f32(
70 | arm_lms_instance_f32 * S,
71 | uint16_t numTaps,
72 | float32_t * pCoeffs,
73 | float32_t * pState,
74 | float32_t mu,
75 | uint32_t blockSize)
76 | {
77 | /* Assign filter taps */
78 | S->numTaps = numTaps;
79 |
80 | /* Assign coefficient pointer */
81 | S->pCoeffs = pCoeffs;
82 |
83 | /* Clear state buffer and size is always blockSize + numTaps */
84 | memset(pState, 0, (numTaps + (blockSize - 1)) * sizeof(float32_t));
85 |
86 | /* Assign state pointer */
87 | S->pState = pState;
88 |
89 | /* Assign Step size value */
90 | S->mu = mu;
91 | }
92 |
93 | /**
94 | * @} end of LMS group
95 | */
96 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q15.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_lms_init_q15.c
9 | *
10 | * Description: Q15 LMS filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup LMS
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q15 LMS filter.
54 | * @param[in] *S points to an instance of the Q15 LMS filter structure.
55 | * @param[in] numTaps number of filter coefficients.
56 | * @param[in] *pCoeffs points to the coefficient buffer.
57 | * @param[in] *pState points to the state buffer.
58 | * @param[in] mu step size that controls filter coefficient updates.
59 | * @param[in] blockSize number of samples to process.
60 | * @param[in] postShift bit shift applied to coefficients.
61 | * @return none.
62 | *
63 | * \par Description:
64 | * pCoeffs points to the array of filter coefficients stored in time reversed order:
65 | *
66 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
67 | *
68 | * The initial filter coefficients serve as a starting point for the adaptive filter.
69 | * pState points to the array of state variables and size of array is
70 | * numTaps+blockSize-1 samples, where blockSize is the number of
71 | * input samples processed by each call to arm_lms_q15().
72 | */
73 |
74 | void arm_lms_init_q15(
75 | arm_lms_instance_q15 * S,
76 | uint16_t numTaps,
77 | q15_t * pCoeffs,
78 | q15_t * pState,
79 | q15_t mu,
80 | uint32_t blockSize,
81 | uint32_t postShift)
82 | {
83 | /* Assign filter taps */
84 | S->numTaps = numTaps;
85 |
86 | /* Assign coefficient pointer */
87 | S->pCoeffs = pCoeffs;
88 |
89 | /* Clear state buffer and size is always blockSize + numTaps - 1 */
90 | memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
91 |
92 | /* Assign state pointer */
93 | S->pState = pState;
94 |
95 | /* Assign Step size value */
96 | S->mu = mu;
97 |
98 | /* Assign postShift value to be applied */
99 | S->postShift = postShift;
100 |
101 | }
102 |
103 | /**
104 | * @} end of LMS group
105 | */
106 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q31.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_lms_init_q31.c
9 | *
10 | * Description: Q31 LMS filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup LMS
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for Q31 LMS filter.
54 | * @param[in] *S points to an instance of the Q31 LMS filter structure.
55 | * @param[in] numTaps number of filter coefficients.
56 | * @param[in] *pCoeffs points to coefficient buffer.
57 | * @param[in] *pState points to state buffer.
58 | * @param[in] mu step size that controls filter coefficient updates.
59 | * @param[in] blockSize number of samples to process.
60 | * @param[in] postShift bit shift applied to coefficients.
61 | * @return none.
62 | *
63 | * \par Description:
64 | * pCoeffs points to the array of filter coefficients stored in time reversed order:
65 | *
66 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
67 | *
68 | * The initial filter coefficients serve as a starting point for the adaptive filter.
69 | * pState points to an array of length numTaps+blockSize-1 samples,
70 | * where blockSize is the number of input samples processed by each call to
71 | * arm_lms_q31().
72 | */
73 |
74 | void arm_lms_init_q31(
75 | arm_lms_instance_q31 * S,
76 | uint16_t numTaps,
77 | q31_t * pCoeffs,
78 | q31_t * pState,
79 | q31_t mu,
80 | uint32_t blockSize,
81 | uint32_t postShift)
82 | {
83 | /* Assign filter taps */
84 | S->numTaps = numTaps;
85 |
86 | /* Assign coefficient pointer */
87 | S->pCoeffs = pCoeffs;
88 |
89 | /* Clear state buffer and size is always blockSize + numTaps - 1 */
90 | memset(pState, 0, ((uint32_t) numTaps + (blockSize - 1u)) * sizeof(q31_t));
91 |
92 | /* Assign state pointer */
93 | S->pState = pState;
94 |
95 | /* Assign Step size value */
96 | S->mu = mu;
97 |
98 | /* Assign postShift value to be applied */
99 | S->postShift = postShift;
100 |
101 | }
102 |
103 | /**
104 | * @} end of LMS group
105 | */
106 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_f32.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_lms_norm_init_f32.c
9 | *
10 | * Description: Floating-point NLMS filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup LMS_NORM
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for floating-point normalized LMS filter.
54 | * @param[in] *S points to an instance of the floating-point LMS filter structure.
55 | * @param[in] numTaps number of filter coefficients.
56 | * @param[in] *pCoeffs points to coefficient buffer.
57 | * @param[in] *pState points to state buffer.
58 | * @param[in] mu step size that controls filter coefficient updates.
59 | * @param[in] blockSize number of samples to process.
60 | * @return none.
61 | *
62 | * \par Description:
63 | * pCoeffs points to the array of filter coefficients stored in time reversed order:
64 | *
65 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
66 | *
67 | * The initial filter coefficients serve as a starting point for the adaptive filter.
68 | * pState points to an array of length numTaps+blockSize-1 samples,
69 | * where blockSize is the number of input samples processed by each call to arm_lms_norm_f32().
70 | */
71 |
72 | void arm_lms_norm_init_f32(
73 | arm_lms_norm_instance_f32 * S,
74 | uint16_t numTaps,
75 | float32_t * pCoeffs,
76 | float32_t * pState,
77 | float32_t mu,
78 | uint32_t blockSize)
79 | {
80 | /* Assign filter taps */
81 | S->numTaps = numTaps;
82 |
83 | /* Assign coefficient pointer */
84 | S->pCoeffs = pCoeffs;
85 |
86 | /* Clear state buffer and size is always blockSize + numTaps - 1 */
87 | memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(float32_t));
88 |
89 | /* Assign state pointer */
90 | S->pState = pState;
91 |
92 | /* Assign Step size value */
93 | S->mu = mu;
94 |
95 | /* Initialise Energy to zero */
96 | S->energy = 0.0f;
97 |
98 | /* Initialise x0 to zero */
99 | S->x0 = 0.0f;
100 |
101 | }
102 |
103 | /**
104 | * @} end of LMS_NORM group
105 | */
106 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q15.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_lms_norm_init_q15.c
9 | *
10 | * Description: Q15 NLMS initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 | #include "arm_common_tables.h"
43 |
44 | /**
45 | * @addtogroup LMS_NORM
46 | * @{
47 | */
48 |
49 | /**
50 | * @brief Initialization function for Q15 normalized LMS filter.
51 | * @param[in] *S points to an instance of the Q15 normalized LMS filter structure.
52 | * @param[in] numTaps number of filter coefficients.
53 | * @param[in] *pCoeffs points to coefficient buffer.
54 | * @param[in] *pState points to state buffer.
55 | * @param[in] mu step size that controls filter coefficient updates.
56 | * @param[in] blockSize number of samples to process.
57 | * @param[in] postShift bit shift applied to coefficients.
58 | * @return none.
59 | *
60 | * Description:
61 | * \par
62 | * pCoeffs points to the array of filter coefficients stored in time reversed order:
63 | *
64 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
65 | *
66 | * The initial filter coefficients serve as a starting point for the adaptive filter.
67 | * pState points to the array of state variables and size of array is
68 | * numTaps+blockSize-1 samples, where blockSize is the number of input samples processed
69 | * by each call to arm_lms_norm_q15().
70 | */
71 |
72 | void arm_lms_norm_init_q15(
73 | arm_lms_norm_instance_q15 * S,
74 | uint16_t numTaps,
75 | q15_t * pCoeffs,
76 | q15_t * pState,
77 | q15_t mu,
78 | uint32_t blockSize,
79 | uint8_t postShift)
80 | {
81 | /* Assign filter taps */
82 | S->numTaps = numTaps;
83 |
84 | /* Assign coefficient pointer */
85 | S->pCoeffs = pCoeffs;
86 |
87 | /* Clear state buffer and size is always blockSize + numTaps - 1 */
88 | memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
89 |
90 | /* Assign post Shift value applied to coefficients */
91 | S->postShift = postShift;
92 |
93 | /* Assign state pointer */
94 | S->pState = pState;
95 |
96 | /* Assign Step size value */
97 | S->mu = mu;
98 |
99 | /* Initialize reciprocal pointer table */
100 | S->recipTable = (q15_t *) armRecipTableQ15;
101 |
102 | /* Initialise Energy to zero */
103 | S->energy = 0;
104 |
105 | /* Initialise x0 to zero */
106 | S->x0 = 0;
107 |
108 | }
109 |
110 | /**
111 | * @} end of LMS_NORM group
112 | */
113 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q31.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_lms_norm_init_q31.c
9 | *
10 | * Description: Q31 NLMS initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 | #include "arm_common_tables.h"
43 |
44 | /**
45 | * @addtogroup LMS_NORM
46 | * @{
47 | */
48 |
49 | /**
50 | * @brief Initialization function for Q31 normalized LMS filter.
51 | * @param[in] *S points to an instance of the Q31 normalized LMS filter structure.
52 | * @param[in] numTaps number of filter coefficients.
53 | * @param[in] *pCoeffs points to coefficient buffer.
54 | * @param[in] *pState points to state buffer.
55 | * @param[in] mu step size that controls filter coefficient updates.
56 | * @param[in] blockSize number of samples to process.
57 | * @param[in] postShift bit shift applied to coefficients.
58 | * @return none.
59 | *
60 | * Description:
61 | * \par
62 | * pCoeffs points to the array of filter coefficients stored in time reversed order:
63 | *
64 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
65 | *
66 | * The initial filter coefficients serve as a starting point for the adaptive filter.
67 | * pState points to an array of length numTaps+blockSize-1 samples,
68 | * where blockSize is the number of input samples processed by each call to arm_lms_norm_q31().
69 | */
70 |
71 | void arm_lms_norm_init_q31(
72 | arm_lms_norm_instance_q31 * S,
73 | uint16_t numTaps,
74 | q31_t * pCoeffs,
75 | q31_t * pState,
76 | q31_t mu,
77 | uint32_t blockSize,
78 | uint8_t postShift)
79 | {
80 | /* Assign filter taps */
81 | S->numTaps = numTaps;
82 |
83 | /* Assign coefficient pointer */
84 | S->pCoeffs = pCoeffs;
85 |
86 | /* Clear state buffer and size is always blockSize + numTaps - 1 */
87 | memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q31_t));
88 |
89 | /* Assign post Shift value applied to coefficients */
90 | S->postShift = postShift;
91 |
92 | /* Assign state pointer */
93 | S->pState = pState;
94 |
95 | /* Assign Step size value */
96 | S->mu = mu;
97 |
98 | /* Initialize reciprocal pointer table */
99 | S->recipTable = (q31_t *) armRecipTableQ31;
100 |
101 | /* Initialise Energy to zero */
102 | S->energy = 0;
103 |
104 | /* Initialise x0 to zero */
105 | S->x0 = 0;
106 |
107 | }
108 |
109 | /**
110 | * @} end of LMS_NORM group
111 | */
112 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_f32.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_mat_init_f32.c
9 | *
10 | * Description: Floating-point matrix initialization.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupMatrix
45 | */
46 |
47 | /**
48 | * @defgroup MatrixInit Matrix Initialization
49 | *
50 | * Initializes the underlying matrix data structure.
51 | * The functions set the numRows,
52 | * numCols, and pData fields
53 | * of the matrix data structure.
54 | */
55 |
56 | /**
57 | * @addtogroup MatrixInit
58 | * @{
59 | */
60 |
61 | /**
62 | * @brief Floating-point matrix initialization.
63 | * @param[in,out] *S points to an instance of the floating-point matrix structure.
64 | * @param[in] nRows number of rows in the matrix.
65 | * @param[in] nColumns number of columns in the matrix.
66 | * @param[in] *pData points to the matrix data array.
67 | * @return none
68 | */
69 |
70 | void arm_mat_init_f32(
71 | arm_matrix_instance_f32 * S,
72 | uint16_t nRows,
73 | uint16_t nColumns,
74 | float32_t * pData)
75 | {
76 | /* Assign Number of Rows */
77 | S->numRows = nRows;
78 |
79 | /* Assign Number of Columns */
80 | S->numCols = nColumns;
81 |
82 | /* Assign Data pointer */
83 | S->pData = pData;
84 | }
85 |
86 | /**
87 | * @} end of MatrixInit group
88 | */
89 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_mat_init_q15.c
9 | *
10 | * Description: Q15 matrix initialization.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------------- */
40 |
41 |
42 | #include "arm_math.h"
43 |
44 | /**
45 | * @ingroup groupMatrix
46 | */
47 |
48 | /**
49 | * @addtogroup MatrixInit
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Q15 matrix initialization.
55 | * @param[in,out] *S points to an instance of the floating-point matrix structure.
56 | * @param[in] nRows number of rows in the matrix.
57 | * @param[in] nColumns number of columns in the matrix.
58 | * @param[in] *pData points to the matrix data array.
59 | * @return none
60 | */
61 |
62 | void arm_mat_init_q15(
63 | arm_matrix_instance_q15 * S,
64 | uint16_t nRows,
65 | uint16_t nColumns,
66 | q15_t * pData)
67 | {
68 | /* Assign Number of Rows */
69 | S->numRows = nRows;
70 |
71 | /* Assign Number of Columns */
72 | S->numCols = nColumns;
73 |
74 | /* Assign Data pointer */
75 | S->pData = pData;
76 | }
77 |
78 | /**
79 | * @} end of MatrixInit group
80 | */
81 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_mat_init_q31.c
9 | *
10 | * Description: Q31 matrix initialization.
11 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
12 | *
13 | * Redistribution and use in source and binary forms, with or without
14 | * modification, are permitted provided that the following conditions
15 | * are met:
16 | * - Redistributions of source code must retain the above copyright
17 | * notice, this list of conditions and the following disclaimer.
18 | * - Redistributions in binary form must reproduce the above copyright
19 | * notice, this list of conditions and the following disclaimer in
20 | * the documentation and/or other materials provided with the
21 | * distribution.
22 | * - Neither the name of ARM LIMITED nor the names of its contributors
23 | * may be used to endorse or promote products derived from this
24 | * software without specific prior written permission.
25 | *
26 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
29 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
30 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
31 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
32 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
33 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
34 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
36 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 | * POSSIBILITY OF SUCH DAMAGE.
38 | * -------------------------------------------------------------------------- */
39 |
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupMatrix
45 | */
46 |
47 | /**
48 | * @defgroup MatrixInit Matrix Initialization
49 | *
50 | */
51 |
52 | /**
53 | * @addtogroup MatrixInit
54 | * @{
55 | */
56 |
57 | /**
58 | * @brief Q31 matrix initialization.
59 | * @param[in,out] *S points to an instance of the floating-point matrix structure.
60 | * @param[in] nRows number of rows in the matrix.
61 | * @param[in] nColumns number of columns in the matrix.
62 | * @param[in] *pData points to the matrix data array.
63 | * @return none
64 | */
65 |
66 | void arm_mat_init_q31(
67 | arm_matrix_instance_q31 * S,
68 | uint16_t nRows,
69 | uint16_t nColumns,
70 | q31_t * pData)
71 | {
72 | /* Assign Number of Rows */
73 | S->numRows = nRows;
74 |
75 | /* Assign Number of Columns */
76 | S->numCols = nColumns;
77 |
78 | /* Assign Data pointer */
79 | S->pData = pData;
80 | }
81 |
82 | /**
83 | * @} end of MatrixInit group
84 | */
85 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_copy_q15.c
9 | *
10 | * Description: Copies the elements of a Q15 vector.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupSupport
45 | */
46 |
47 | /**
48 | * @addtogroup copy
49 | * @{
50 | */
51 | /**
52 | * @brief Copies the elements of a Q15 vector.
53 | * @param[in] *pSrc points to input vector
54 | * @param[out] *pDst points to output vector
55 | * @param[in] blockSize length of the input vector
56 | * @return none.
57 | *
58 | */
59 |
60 | void arm_copy_q15(
61 | q15_t * pSrc,
62 | q15_t * pDst,
63 | uint32_t blockSize)
64 | {
65 | uint32_t blkCnt; /* loop counter */
66 |
67 | #ifndef ARM_MATH_CM0_FAMILY
68 |
69 | /* Run the below code for Cortex-M4 and Cortex-M3 */
70 |
71 | /*loop Unrolling */
72 | blkCnt = blockSize >> 2u;
73 |
74 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
75 | ** a second loop below computes the remaining 1 to 3 samples. */
76 | while(blkCnt > 0u)
77 | {
78 | /* C = A */
79 | /* Read two inputs */
80 | *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
81 | *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
82 |
83 | /* Decrement the loop counter */
84 | blkCnt--;
85 | }
86 |
87 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
88 | ** No loop unrolling is used. */
89 | blkCnt = blockSize % 0x4u;
90 |
91 |
92 | #else
93 |
94 | /* Run the below code for Cortex-M0 */
95 |
96 | /* Loop over blockSize number of values */
97 | blkCnt = blockSize;
98 |
99 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
100 |
101 | while(blkCnt > 0u)
102 | {
103 | /* C = A */
104 | /* Copy and then store the value in the destination buffer */
105 | *pDst++ = *pSrc++;
106 |
107 | /* Decrement the loop counter */
108 | blkCnt--;
109 | }
110 | }
111 |
112 | /**
113 | * @} end of BasicCopy group
114 | */
115 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_copy_q31.c
9 | *
10 | * Description: Copies the elements of a Q31 vector.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupSupport
45 | */
46 |
47 | /**
48 | * @addtogroup copy
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Copies the elements of a Q31 vector.
54 | * @param[in] *pSrc points to input vector
55 | * @param[out] *pDst points to output vector
56 | * @param[in] blockSize length of the input vector
57 | * @return none.
58 | *
59 | */
60 |
61 | void arm_copy_q31(
62 | q31_t * pSrc,
63 | q31_t * pDst,
64 | uint32_t blockSize)
65 | {
66 | uint32_t blkCnt; /* loop counter */
67 |
68 |
69 | #ifndef ARM_MATH_CM0_FAMILY
70 |
71 | /* Run the below code for Cortex-M4 and Cortex-M3 */
72 | q31_t in1, in2, in3, in4;
73 |
74 | /*loop Unrolling */
75 | blkCnt = blockSize >> 2u;
76 |
77 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
78 | ** a second loop below computes the remaining 1 to 3 samples. */
79 | while(blkCnt > 0u)
80 | {
81 | /* C = A */
82 | /* Copy and then store the values in the destination buffer */
83 | in1 = *pSrc++;
84 | in2 = *pSrc++;
85 | in3 = *pSrc++;
86 | in4 = *pSrc++;
87 |
88 | *pDst++ = in1;
89 | *pDst++ = in2;
90 | *pDst++ = in3;
91 | *pDst++ = in4;
92 |
93 | /* Decrement the loop counter */
94 | blkCnt--;
95 | }
96 |
97 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
98 | ** No loop unrolling is used. */
99 | blkCnt = blockSize % 0x4u;
100 |
101 | #else
102 |
103 | /* Run the below code for Cortex-M0 */
104 |
105 | /* Loop over blockSize number of values */
106 | blkCnt = blockSize;
107 |
108 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
109 |
110 | while(blkCnt > 0u)
111 | {
112 | /* C = A */
113 | /* Copy and then store the value in the destination buffer */
114 | *pDst++ = *pSrc++;
115 |
116 | /* Decrement the loop counter */
117 | blkCnt--;
118 | }
119 | }
120 |
121 | /**
122 | * @} end of BasicCopy group
123 | */
124 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q7.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_copy_q7.c
9 | *
10 | * Description: Copies the elements of a Q7 vector.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupSupport
45 | */
46 |
47 | /**
48 | * @addtogroup copy
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Copies the elements of a Q7 vector.
54 | * @param[in] *pSrc points to input vector
55 | * @param[out] *pDst points to output vector
56 | * @param[in] blockSize length of the input vector
57 | * @return none.
58 | *
59 | */
60 |
61 | void arm_copy_q7(
62 | q7_t * pSrc,
63 | q7_t * pDst,
64 | uint32_t blockSize)
65 | {
66 | uint32_t blkCnt; /* loop counter */
67 |
68 | #ifndef ARM_MATH_CM0_FAMILY
69 |
70 | /* Run the below code for Cortex-M4 and Cortex-M3 */
71 |
72 | /*loop Unrolling */
73 | blkCnt = blockSize >> 2u;
74 |
75 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
76 | ** a second loop below computes the remaining 1 to 3 samples. */
77 | while(blkCnt > 0u)
78 | {
79 | /* C = A */
80 | /* Copy and then store the results in the destination buffer */
81 | /* 4 samples are copied and stored at a time using SIMD */
82 | *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
83 |
84 | /* Decrement the loop counter */
85 | blkCnt--;
86 | }
87 |
88 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
89 | ** No loop unrolling is used. */
90 | blkCnt = blockSize % 0x4u;
91 |
92 | #else
93 |
94 | /* Run the below code for Cortex-M0 */
95 |
96 | /* Loop over blockSize number of values */
97 | blkCnt = blockSize;
98 |
99 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
100 |
101 |
102 | while(blkCnt > 0u)
103 | {
104 | /* C = A */
105 | /* Copy and then store the results in the destination buffer */
106 | *pDst++ = *pSrc++;
107 |
108 | /* Decrement the loop counter */
109 | blkCnt--;
110 | }
111 | }
112 |
113 | /**
114 | * @} end of BasicCopy group
115 | */
116 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_f32.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fill_f32.c
9 | *
10 | * Description: Fills a constant value into a floating-point vector.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupSupport
45 | */
46 |
47 | /**
48 | * @defgroup Fill Vector Fill
49 | *
50 | * Fills the destination vector with a constant value.
51 | *
52 | *
53 | * pDst[n] = value; 0 <= n < blockSize.
54 | *
55 | *
56 | * There are separate functions for floating point, Q31, Q15, and Q7 data types.
57 | */
58 |
59 | /**
60 | * @addtogroup Fill
61 | * @{
62 | */
63 |
64 | /**
65 | * @brief Fills a constant value into a floating-point vector.
66 | * @param[in] value input value to be filled
67 | * @param[out] *pDst points to output vector
68 | * @param[in] blockSize length of the output vector
69 | * @return none.
70 | *
71 | */
72 |
73 |
74 | void arm_fill_f32(
75 | float32_t value,
76 | float32_t * pDst,
77 | uint32_t blockSize)
78 | {
79 | uint32_t blkCnt; /* loop counter */
80 |
81 | #ifndef ARM_MATH_CM0_FAMILY
82 |
83 | /* Run the below code for Cortex-M4 and Cortex-M3 */
84 | float32_t in1 = value;
85 | float32_t in2 = value;
86 | float32_t in3 = value;
87 | float32_t in4 = value;
88 |
89 | /*loop Unrolling */
90 | blkCnt = blockSize >> 2u;
91 |
92 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
93 | ** a second loop below computes the remaining 1 to 3 samples. */
94 | while(blkCnt > 0u)
95 | {
96 | /* C = value */
97 | /* Fill the value in the destination buffer */
98 | *pDst++ = in1;
99 | *pDst++ = in2;
100 | *pDst++ = in3;
101 | *pDst++ = in4;
102 |
103 | /* Decrement the loop counter */
104 | blkCnt--;
105 | }
106 |
107 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
108 | ** No loop unrolling is used. */
109 | blkCnt = blockSize % 0x4u;
110 |
111 | #else
112 |
113 | /* Run the below code for Cortex-M0 */
114 |
115 | /* Loop over blockSize number of values */
116 | blkCnt = blockSize;
117 |
118 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
119 |
120 |
121 | while(blkCnt > 0u)
122 | {
123 | /* C = value */
124 | /* Fill the value in the destination buffer */
125 | *pDst++ = value;
126 |
127 | /* Decrement the loop counter */
128 | blkCnt--;
129 | }
130 | }
131 |
132 | /**
133 | * @} end of Fill group
134 | */
135 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fill_q15.c
9 | *
10 | * Description: Fills a constant value into a Q15 vector.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupSupport
45 | */
46 |
47 | /**
48 | * @addtogroup Fill
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Fills a constant value into a Q15 vector.
54 | * @param[in] value input value to be filled
55 | * @param[out] *pDst points to output vector
56 | * @param[in] blockSize length of the output vector
57 | * @return none.
58 | *
59 | */
60 |
61 | void arm_fill_q15(
62 | q15_t value,
63 | q15_t * pDst,
64 | uint32_t blockSize)
65 | {
66 | uint32_t blkCnt; /* loop counter */
67 |
68 | #ifndef ARM_MATH_CM0_FAMILY
69 |
70 | /* Run the below code for Cortex-M4 and Cortex-M3 */
71 |
72 | q31_t packedValue; /* value packed to 32 bits */
73 |
74 |
75 | /*loop Unrolling */
76 | blkCnt = blockSize >> 2u;
77 |
78 | /* Packing two 16 bit values to 32 bit value in order to use SIMD */
79 | packedValue = __PKHBT(value, value, 16u);
80 |
81 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
82 | ** a second loop below computes the remaining 1 to 3 samples. */
83 | while(blkCnt > 0u)
84 | {
85 | /* C = value */
86 | /* Fill the value in the destination buffer */
87 | *__SIMD32(pDst)++ = packedValue;
88 | *__SIMD32(pDst)++ = packedValue;
89 |
90 | /* Decrement the loop counter */
91 | blkCnt--;
92 | }
93 |
94 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
95 | ** No loop unrolling is used. */
96 | blkCnt = blockSize % 0x4u;
97 |
98 | #else
99 |
100 | /* Run the below code for Cortex-M0 */
101 |
102 | /* Loop over blockSize number of values */
103 | blkCnt = blockSize;
104 |
105 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
106 |
107 | while(blkCnt > 0u)
108 | {
109 | /* C = value */
110 | /* Fill the value in the destination buffer */
111 | *pDst++ = value;
112 |
113 | /* Decrement the loop counter */
114 | blkCnt--;
115 | }
116 | }
117 |
118 | /**
119 | * @} end of Fill group
120 | */
121 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fill_q31.c
9 | *
10 | * Description: Fills a constant value into a Q31 vector.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupSupport
45 | */
46 |
47 | /**
48 | * @addtogroup Fill
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Fills a constant value into a Q31 vector.
54 | * @param[in] value input value to be filled
55 | * @param[out] *pDst points to output vector
56 | * @param[in] blockSize length of the output vector
57 | * @return none.
58 | *
59 | */
60 |
61 | void arm_fill_q31(
62 | q31_t value,
63 | q31_t * pDst,
64 | uint32_t blockSize)
65 | {
66 | uint32_t blkCnt; /* loop counter */
67 |
68 |
69 | #ifndef ARM_MATH_CM0_FAMILY
70 |
71 | /* Run the below code for Cortex-M4 and Cortex-M3 */
72 | q31_t in1 = value;
73 | q31_t in2 = value;
74 | q31_t in3 = value;
75 | q31_t in4 = value;
76 |
77 | /*loop Unrolling */
78 | blkCnt = blockSize >> 2u;
79 |
80 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
81 | ** a second loop below computes the remaining 1 to 3 samples. */
82 | while(blkCnt > 0u)
83 | {
84 | /* C = value */
85 | /* Fill the value in the destination buffer */
86 | *pDst++ = in1;
87 | *pDst++ = in2;
88 | *pDst++ = in3;
89 | *pDst++ = in4;
90 |
91 | /* Decrement the loop counter */
92 | blkCnt--;
93 | }
94 |
95 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
96 | ** No loop unrolling is used. */
97 | blkCnt = blockSize % 0x4u;
98 |
99 | #else
100 |
101 | /* Run the below code for Cortex-M0 */
102 |
103 | /* Loop over blockSize number of values */
104 | blkCnt = blockSize;
105 |
106 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
107 |
108 | while(blkCnt > 0u)
109 | {
110 | /* C = value */
111 | /* Fill the value in the destination buffer */
112 | *pDst++ = value;
113 |
114 | /* Decrement the loop counter */
115 | blkCnt--;
116 | }
117 | }
118 |
119 | /**
120 | * @} end of Fill group
121 | */
122 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q7.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fill_q7.c
9 | *
10 | * Description: Fills a constant value into a Q7 vector.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupSupport
45 | */
46 |
47 | /**
48 | * @addtogroup Fill
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Fills a constant value into a Q7 vector.
54 | * @param[in] value input value to be filled
55 | * @param[out] *pDst points to output vector
56 | * @param[in] blockSize length of the output vector
57 | * @return none.
58 | *
59 | */
60 |
61 | void arm_fill_q7(
62 | q7_t value,
63 | q7_t * pDst,
64 | uint32_t blockSize)
65 | {
66 | uint32_t blkCnt; /* loop counter */
67 |
68 | #ifndef ARM_MATH_CM0_FAMILY
69 |
70 | /* Run the below code for Cortex-M4 and Cortex-M3 */
71 |
72 | q31_t packedValue; /* value packed to 32 bits */
73 |
74 | /*loop Unrolling */
75 | blkCnt = blockSize >> 2u;
76 |
77 | /* Packing four 8 bit values to 32 bit value in order to use SIMD */
78 | packedValue = __PACKq7(value, value, value, value);
79 |
80 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
81 | ** a second loop below computes the remaining 1 to 3 samples. */
82 | while(blkCnt > 0u)
83 | {
84 | /* C = value */
85 | /* Fill the value in the destination buffer */
86 | *__SIMD32(pDst)++ = packedValue;
87 |
88 | /* Decrement the loop counter */
89 | blkCnt--;
90 | }
91 |
92 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
93 | ** No loop unrolling is used. */
94 | blkCnt = blockSize % 0x4u;
95 |
96 | #else
97 |
98 | /* Run the below code for Cortex-M0 */
99 |
100 | /* Loop over blockSize number of values */
101 | blkCnt = blockSize;
102 |
103 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
104 |
105 | while(blkCnt > 0u)
106 | {
107 | /* C = value */
108 | /* Fill the value in the destination buffer */
109 | *pDst++ = value;
110 |
111 | /* Decrement the loop counter */
112 | blkCnt--;
113 | }
114 | }
115 |
116 | /**
117 | * @} end of Fill group
118 | */
119 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f070xb.h:
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https://raw.githubusercontent.com/xsumirx/stm32f0_bootloader/1b7969e5009724ac508355f654680303fdcaf8c2/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f070xb.h
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/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h:
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https://raw.githubusercontent.com/xsumirx/stm32f0_bootloader/1b7969e5009724ac508355f654680303fdcaf8c2/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h
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/Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file system_stm32f0xx.h
4 | * @author MCD Application Team
5 | * @brief CMSIS Cortex-M0 Device System Source File for STM32F0xx devices.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © COPYRIGHT(c) 2016 STMicroelectronics
10 | *
11 | * Redistribution and use in source and binary forms, with or without modification,
12 | * are permitted provided that the following conditions are met:
13 | * 1. Redistributions of source code must retain the above copyright notice,
14 | * this list of conditions and the following disclaimer.
15 | * 2. Redistributions in binary form must reproduce the above copyright notice,
16 | * this list of conditions and the following disclaimer in the documentation
17 | * and/or other materials provided with the distribution.
18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 | * may be used to endorse or promote products derived from this software
20 | * without specific prior written permission.
21 | *
22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 | *
33 | ******************************************************************************
34 | */
35 |
36 | /** @addtogroup CMSIS
37 | * @{
38 | */
39 |
40 | /** @addtogroup stm32f0xx_system
41 | * @{
42 | */
43 |
44 | /**
45 | * @brief Define to prevent recursive inclusion
46 | */
47 | #ifndef __SYSTEM_STM32F0XX_H
48 | #define __SYSTEM_STM32F0XX_H
49 |
50 | #ifdef __cplusplus
51 | extern "C" {
52 | #endif
53 |
54 | /** @addtogroup STM32F0xx_System_Includes
55 | * @{
56 | */
57 |
58 | /**
59 | * @}
60 | */
61 |
62 |
63 | /** @addtogroup STM32F0xx_System_Exported_types
64 | * @{
65 | */
66 | /* This variable is updated in three ways:
67 | 1) by calling CMSIS function SystemCoreClockUpdate()
68 | 3) by calling HAL API function HAL_RCC_GetHCLKFreq()
69 | 3) by calling HAL API function HAL_RCC_ClockConfig()
70 | Note: If you use this function to configure the system clock; then there
71 | is no need to call the 2 first functions listed above, since SystemCoreClock
72 | variable is updated automatically.
73 | */
74 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
75 | extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */
76 | extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */
77 |
78 | /**
79 | * @}
80 | */
81 |
82 | /** @addtogroup STM32F0xx_System_Exported_Constants
83 | * @{
84 | */
85 |
86 | /**
87 | * @}
88 | */
89 |
90 | /** @addtogroup STM32F0xx_System_Exported_Macros
91 | * @{
92 | */
93 |
94 | /**
95 | * @}
96 | */
97 |
98 | /** @addtogroup STM32F0xx_System_Exported_Functions
99 | * @{
100 | */
101 |
102 | extern void SystemInit(void);
103 | extern void SystemCoreClockUpdate(void);
104 | /**
105 | * @}
106 | */
107 |
108 | #ifdef __cplusplus
109 | }
110 | #endif
111 |
112 | #endif /*__SYSTEM_STM32F0XX_H */
113 |
114 | /**
115 | * @}
116 | */
117 |
118 | /**
119 | * @}
120 | */
121 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
122 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/Include/arm_const_structs.h:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_const_structs.h
9 | *
10 | * Description: This file has constant structs that are initialized for
11 | * user convenience. For example, some can be given as
12 | * arguments to the arm_cfft_f32() function.
13 | *
14 | * Target Processor: Cortex-M4/Cortex-M3
15 | *
16 | * Redistribution and use in source and binary forms, with or without
17 | * modification, are permitted provided that the following conditions
18 | * are met:
19 | * - Redistributions of source code must retain the above copyright
20 | * notice, this list of conditions and the following disclaimer.
21 | * - Redistributions in binary form must reproduce the above copyright
22 | * notice, this list of conditions and the following disclaimer in
23 | * the documentation and/or other materials provided with the
24 | * distribution.
25 | * - Neither the name of ARM LIMITED nor the names of its contributors
26 | * may be used to endorse or promote products derived from this
27 | * software without specific prior written permission.
28 | *
29 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
32 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
33 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
34 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
35 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
36 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
37 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
38 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
39 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
40 | * POSSIBILITY OF SUCH DAMAGE.
41 | * -------------------------------------------------------------------- */
42 |
43 | #ifndef _ARM_CONST_STRUCTS_H
44 | #define _ARM_CONST_STRUCTS_H
45 |
46 | #include "arm_math.h"
47 | #include "arm_common_tables.h"
48 |
49 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
50 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
51 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
52 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
53 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
54 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
55 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
56 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
57 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
58 |
59 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
60 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
61 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
62 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
63 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
64 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
65 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
66 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
67 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
68 |
69 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
70 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
71 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
72 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
73 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
74 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
75 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
76 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
77 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
78 |
79 | #endif
80 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/Include/core_cmFunc.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file core_cmFunc.h
3 | * @brief CMSIS Cortex-M Core Function Access Header File
4 | * @version V4.30
5 | * @date 20. October 2015
6 | ******************************************************************************/
7 | /* Copyright (c) 2009 - 2015 ARM LIMITED
8 |
9 | All rights reserved.
10 | Redistribution and use in source and binary forms, with or without
11 | modification, are permitted provided that the following conditions are met:
12 | - Redistributions of source code must retain the above copyright
13 | notice, this list of conditions and the following disclaimer.
14 | - Redistributions in binary form must reproduce the above copyright
15 | notice, this list of conditions and the following disclaimer in the
16 | documentation and/or other materials provided with the distribution.
17 | - Neither the name of ARM nor the names of its contributors may be used
18 | to endorse or promote products derived from this software without
19 | specific prior written permission.
20 | *
21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 | POSSIBILITY OF SUCH DAMAGE.
32 | ---------------------------------------------------------------------------*/
33 |
34 |
35 | #if defined ( __ICCARM__ )
36 | #pragma system_include /* treat file as system include file for MISRA check */
37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
38 | #pragma clang system_header /* treat file as system include file */
39 | #endif
40 |
41 | #ifndef __CORE_CMFUNC_H
42 | #define __CORE_CMFUNC_H
43 |
44 |
45 | /* ########################### Core Function Access ########################### */
46 | /** \ingroup CMSIS_Core_FunctionInterface
47 | \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
48 | @{
49 | */
50 |
51 | /*------------------ RealView Compiler -----------------*/
52 | #if defined ( __CC_ARM )
53 | #include "cmsis_armcc.h"
54 |
55 | /*------------------ ARM Compiler V6 -------------------*/
56 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
57 | #include "cmsis_armcc_V6.h"
58 |
59 | /*------------------ GNU Compiler ----------------------*/
60 | #elif defined ( __GNUC__ )
61 | #include "cmsis_gcc.h"
62 |
63 | /*------------------ ICC Compiler ----------------------*/
64 | #elif defined ( __ICCARM__ )
65 | #include
66 |
67 | /*------------------ TI CCS Compiler -------------------*/
68 | #elif defined ( __TMS470__ )
69 | #include
70 |
71 | /*------------------ TASKING Compiler ------------------*/
72 | #elif defined ( __TASKING__ )
73 | /*
74 | * The CMSIS functions have been implemented as intrinsics in the compiler.
75 | * Please use "carm -?i" to get an up to date list of all intrinsics,
76 | * Including the CMSIS ones.
77 | */
78 |
79 | /*------------------ COSMIC Compiler -------------------*/
80 | #elif defined ( __CSMC__ )
81 | #include
82 |
83 | #endif
84 |
85 | /*@} end of CMSIS_Core_RegAccFunctions */
86 |
87 | #endif /* __CORE_CMFUNC_H */
88 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/Include/core_cmInstr.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file core_cmInstr.h
3 | * @brief CMSIS Cortex-M Core Instruction Access Header File
4 | * @version V4.30
5 | * @date 20. October 2015
6 | ******************************************************************************/
7 | /* Copyright (c) 2009 - 2015 ARM LIMITED
8 |
9 | All rights reserved.
10 | Redistribution and use in source and binary forms, with or without
11 | modification, are permitted provided that the following conditions are met:
12 | - Redistributions of source code must retain the above copyright
13 | notice, this list of conditions and the following disclaimer.
14 | - Redistributions in binary form must reproduce the above copyright
15 | notice, this list of conditions and the following disclaimer in the
16 | documentation and/or other materials provided with the distribution.
17 | - Neither the name of ARM nor the names of its contributors may be used
18 | to endorse or promote products derived from this software without
19 | specific prior written permission.
20 | *
21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 | POSSIBILITY OF SUCH DAMAGE.
32 | ---------------------------------------------------------------------------*/
33 |
34 |
35 | #if defined ( __ICCARM__ )
36 | #pragma system_include /* treat file as system include file for MISRA check */
37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
38 | #pragma clang system_header /* treat file as system include file */
39 | #endif
40 |
41 | #ifndef __CORE_CMINSTR_H
42 | #define __CORE_CMINSTR_H
43 |
44 |
45 | /* ########################## Core Instruction Access ######################### */
46 | /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
47 | Access to dedicated instructions
48 | @{
49 | */
50 |
51 | /*------------------ RealView Compiler -----------------*/
52 | #if defined ( __CC_ARM )
53 | #include "cmsis_armcc.h"
54 |
55 | /*------------------ ARM Compiler V6 -------------------*/
56 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
57 | #include "cmsis_armcc_V6.h"
58 |
59 | /*------------------ GNU Compiler ----------------------*/
60 | #elif defined ( __GNUC__ )
61 | #include "cmsis_gcc.h"
62 |
63 | /*------------------ ICC Compiler ----------------------*/
64 | #elif defined ( __ICCARM__ )
65 | #include
66 |
67 | /*------------------ TI CCS Compiler -------------------*/
68 | #elif defined ( __TMS470__ )
69 | #include
70 |
71 | /*------------------ TASKING Compiler ------------------*/
72 | #elif defined ( __TASKING__ )
73 | /*
74 | * The CMSIS functions have been implemented as intrinsics in the compiler.
75 | * Please use "carm -?i" to get an up to date list of all intrinsics,
76 | * Including the CMSIS ones.
77 | */
78 |
79 | /*------------------ COSMIC Compiler -------------------*/
80 | #elif defined ( __CSMC__ )
81 | #include
82 |
83 | #endif
84 |
85 | /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
86 |
87 | #endif /* __CORE_CMINSTR_H */
88 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/Include/core_cmSimd.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file core_cmSimd.h
3 | * @brief CMSIS Cortex-M SIMD Header File
4 | * @version V4.30
5 | * @date 20. October 2015
6 | ******************************************************************************/
7 | /* Copyright (c) 2009 - 2015 ARM LIMITED
8 |
9 | All rights reserved.
10 | Redistribution and use in source and binary forms, with or without
11 | modification, are permitted provided that the following conditions are met:
12 | - Redistributions of source code must retain the above copyright
13 | notice, this list of conditions and the following disclaimer.
14 | - Redistributions in binary form must reproduce the above copyright
15 | notice, this list of conditions and the following disclaimer in the
16 | documentation and/or other materials provided with the distribution.
17 | - Neither the name of ARM nor the names of its contributors may be used
18 | to endorse or promote products derived from this software without
19 | specific prior written permission.
20 | *
21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 | POSSIBILITY OF SUCH DAMAGE.
32 | ---------------------------------------------------------------------------*/
33 |
34 |
35 | #if defined ( __ICCARM__ )
36 | #pragma system_include /* treat file as system include file for MISRA check */
37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
38 | #pragma clang system_header /* treat file as system include file */
39 | #endif
40 |
41 | #ifndef __CORE_CMSIMD_H
42 | #define __CORE_CMSIMD_H
43 |
44 | #ifdef __cplusplus
45 | extern "C" {
46 | #endif
47 |
48 |
49 | /* ################### Compiler specific Intrinsics ########################### */
50 | /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
51 | Access to dedicated SIMD instructions
52 | @{
53 | */
54 |
55 | /*------------------ RealView Compiler -----------------*/
56 | #if defined ( __CC_ARM )
57 | #include "cmsis_armcc.h"
58 |
59 | /*------------------ ARM Compiler V6 -------------------*/
60 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
61 | #include "cmsis_armcc_V6.h"
62 |
63 | /*------------------ GNU Compiler ----------------------*/
64 | #elif defined ( __GNUC__ )
65 | #include "cmsis_gcc.h"
66 |
67 | /*------------------ ICC Compiler ----------------------*/
68 | #elif defined ( __ICCARM__ )
69 | #include
70 |
71 | /*------------------ TI CCS Compiler -------------------*/
72 | #elif defined ( __TMS470__ )
73 | #include
74 |
75 | /*------------------ TASKING Compiler ------------------*/
76 | #elif defined ( __TASKING__ )
77 | /*
78 | * The CMSIS functions have been implemented as intrinsics in the compiler.
79 | * Please use "carm -?i" to get an up to date list of all intrinsics,
80 | * Including the CMSIS ones.
81 | */
82 |
83 | /*------------------ COSMIC Compiler -------------------*/
84 | #elif defined ( __CSMC__ )
85 | #include
86 |
87 | #endif
88 |
89 | /*@} end of group CMSIS_SIMD_intrinsics */
90 |
91 |
92 | #ifdef __cplusplus
93 | }
94 | #endif
95 |
96 | #endif /* __CORE_CMSIMD_H */
97 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/Lib/ARM/arm_cortexM0b_math.lib:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/xsumirx/stm32f0_bootloader/1b7969e5009724ac508355f654680303fdcaf8c2/Drivers/CMSIS/Lib/ARM/arm_cortexM0b_math.lib
--------------------------------------------------------------------------------
/Drivers/CMSIS/Lib/ARM/arm_cortexM0l_math.lib:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/xsumirx/stm32f0_bootloader/1b7969e5009724ac508355f654680303fdcaf8c2/Drivers/CMSIS/Lib/ARM/arm_cortexM0l_math.lib
--------------------------------------------------------------------------------
/Drivers/CMSIS/Lib/GCC/libarm_cortexM0l_math.a:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/xsumirx/stm32f0_bootloader/1b7969e5009724ac508355f654680303fdcaf8c2/Drivers/CMSIS/Lib/GCC/libarm_cortexM0l_math.a
--------------------------------------------------------------------------------
/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_spi_ex.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f0xx_hal_spi_ex.h
4 | * @author MCD Application Team
5 | * @brief Header file of SPI HAL Extended module.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © COPYRIGHT(c) 2016 STMicroelectronics
10 | *
11 | * Redistribution and use in source and binary forms, with or without modification,
12 | * are permitted provided that the following conditions are met:
13 | * 1. Redistributions of source code must retain the above copyright notice,
14 | * this list of conditions and the following disclaimer.
15 | * 2. Redistributions in binary form must reproduce the above copyright notice,
16 | * this list of conditions and the following disclaimer in the documentation
17 | * and/or other materials provided with the distribution.
18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 | * may be used to endorse or promote products derived from this software
20 | * without specific prior written permission.
21 | *
22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 | *
33 | ******************************************************************************
34 | */
35 |
36 | /* Define to prevent recursive inclusion -------------------------------------*/
37 | #ifndef __STM32F0xx_HAL_SPI_EX_H
38 | #define __STM32F0xx_HAL_SPI_EX_H
39 |
40 | #ifdef __cplusplus
41 | extern "C" {
42 | #endif
43 |
44 | /* Includes ------------------------------------------------------------------*/
45 | #include "stm32f0xx_hal_def.h"
46 |
47 | /** @addtogroup STM32F0xx_HAL_Driver
48 | * @{
49 | */
50 |
51 | /** @addtogroup SPIEx
52 | * @{
53 | */
54 |
55 | /* Exported types ------------------------------------------------------------*/
56 | /* Exported constants --------------------------------------------------------*/
57 | /* Exported macros -----------------------------------------------------------*/
58 | /* Exported functions --------------------------------------------------------*/
59 | /** @addtogroup SPIEx_Exported_Functions
60 | * @{
61 | */
62 |
63 | /* Initialization and de-initialization functions ****************************/
64 | /* IO operation functions *****************************************************/
65 | /** @addtogroup SPIEx_Exported_Functions_Group1
66 | * @{
67 | */
68 | HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(SPI_HandleTypeDef *hspi);
69 | /**
70 | * @}
71 | */
72 |
73 | /**
74 | * @}
75 | */
76 |
77 | /**
78 | * @}
79 | */
80 |
81 | /**
82 | * @}
83 | */
84 |
85 | #ifdef __cplusplus
86 | }
87 | #endif
88 |
89 | #endif /* __STM32F0xx_HAL_SPI_EX_H */
90 |
91 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
92 |
--------------------------------------------------------------------------------
/EWARM/Project.eww:
--------------------------------------------------------------------------------
1 |
2 |
3 |
4 | $WS_DIR$\BootloaderHAL.ewp
5 |
6 |
7 |
8 |
--------------------------------------------------------------------------------
/EWARM/settings/BootloaderHAL.BootloaderHAL.cspy.bat:
--------------------------------------------------------------------------------
1 | @REM This batch file has been generated by the IAR Embedded Workbench
2 | @REM C-SPY Debugger, as an aid to preparing a command line for running
3 | @REM the cspybat command line utility using the appropriate settings.
4 | @REM
5 | @REM Note that this file is generated every time a new debug session
6 | @REM is initialized, so you may want to move or rename the file before
7 | @REM making changes.
8 | @REM
9 | @REM You can launch cspybat by typing the name of this batch file followed
10 | @REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
11 | @REM
12 | @REM Read about available command line parameters in the C-SPY Debugging
13 | @REM Guide. Hints about additional command line parameters that may be
14 | @REM useful in specific cases:
15 | @REM --download_only Downloads a code image without starting a debug
16 | @REM session afterwards.
17 | @REM --silent Omits the sign-on message.
18 | @REM --timeout Limits the maximum allowed execution time.
19 | @REM
20 |
21 |
22 | @echo off
23 |
24 | if not "%~1" == "" goto debugFile
25 |
26 | @echo on
27 |
28 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.3\common\bin\cspybat" -f "E:\ProjectReader\BootloaderHAL\BootloaderHAL\EWARM\settings\BootloaderHAL.BootloaderHAL.general.xcl" --backend -f "E:\ProjectReader\BootloaderHAL\BootloaderHAL\EWARM\settings\BootloaderHAL.BootloaderHAL.driver.xcl"
29 |
30 | @echo off
31 | goto end
32 |
33 | :debugFile
34 |
35 | @echo on
36 |
37 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.3\common\bin\cspybat" -f "E:\ProjectReader\BootloaderHAL\BootloaderHAL\EWARM\settings\BootloaderHAL.BootloaderHAL.general.xcl" "--debug_file=%~1" --backend -f "E:\ProjectReader\BootloaderHAL\BootloaderHAL\EWARM\settings\BootloaderHAL.BootloaderHAL.driver.xcl"
38 |
39 | @echo off
40 | :end
--------------------------------------------------------------------------------
/EWARM/settings/BootloaderHAL.BootloaderHAL.cspy.ps1:
--------------------------------------------------------------------------------
1 | param([String]$debugfile = "");
2 |
3 | # This powershell file has been generated by the IAR Embedded Workbench
4 | # C - SPY Debugger, as an aid to preparing a command line for running
5 | # the cspybat command line utility using the appropriate settings.
6 | #
7 | # Note that this file is generated every time a new debug session
8 | # is initialized, so you may want to move or rename the file before
9 | # making changes.
10 | #
11 | # You can launch cspybat by typing Powershell.exe -File followed by the name of this batch file, followed
12 | # by the name of the debug file (usually an ELF / DWARF or UBROF file).
13 | #
14 | # Read about available command line parameters in the C - SPY Debugging
15 | # Guide. Hints about additional command line parameters that may be
16 | # useful in specific cases :
17 | # --download_only Downloads a code image without starting a debug
18 | # session afterwards.
19 | # --silent Omits the sign - on message.
20 | # --timeout Limits the maximum allowed execution time.
21 | #
22 |
23 |
24 | if ($debugfile -eq "")
25 | {
26 | & "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.3\common\bin\cspybat" -f "E:\ProjectReader\BootloaderHAL\BootloaderHAL\EWARM\settings\BootloaderHAL.BootloaderHAL.general.xcl" --backend -f "E:\ProjectReader\BootloaderHAL\BootloaderHAL\EWARM\settings\BootloaderHAL.BootloaderHAL.driver.xcl"
27 | }
28 | else
29 | {
30 | & "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.3\common\bin\cspybat" -f "E:\ProjectReader\BootloaderHAL\BootloaderHAL\EWARM\settings\BootloaderHAL.BootloaderHAL.general.xcl" --debug_file=$debugfile --backend -f "E:\ProjectReader\BootloaderHAL\BootloaderHAL\EWARM\settings\BootloaderHAL.BootloaderHAL.driver.xcl"
31 | }
32 |
--------------------------------------------------------------------------------
/EWARM/settings/BootloaderHAL.BootloaderHAL.driver.xcl:
--------------------------------------------------------------------------------
1 | "--endian=little"
2 |
3 | "--cpu=Cortex-M0"
4 |
5 | "--fpu=None"
6 |
7 | "-p"
8 |
9 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.3\arm\CONFIG\debugger\ST\STM32F070CB.ddf"
10 |
11 | "--drv_verify_download"
12 |
13 | "--semihosting"
14 |
15 | "--device=STM32F070CB"
16 |
17 | "--drv_interface=SWD"
18 |
19 | "--stlink_reset_strategy=0,2"
20 |
21 | "--drv_swo_clock_setup=48000000,0,2000000"
22 |
23 | "--drv_catch_exceptions=0x000"
24 |
25 | "--drv_debug_ap=0"
26 |
27 | "--stlink_probe=stlinkv2"
28 |
29 |
30 |
31 |
32 |
--------------------------------------------------------------------------------
/EWARM/settings/BootloaderHAL.BootloaderHAL.general.xcl:
--------------------------------------------------------------------------------
1 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.3\arm\bin\armproc.dll"
2 |
3 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.3\arm\bin\armstlink2.dll"
4 |
5 | "E:\ProjectReader\BootloaderHAL\BootloaderHAL\EWARM\BootloaderHAL\Exe\BootloaderHAL.out"
6 |
7 | --plugin="C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.3\arm\bin\armbat.dll"
8 |
9 | --device_macro="C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.3\arm\config\debugger\ST\STM32F0xx.dmac"
10 |
11 | --flash_loader="C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.3\arm\config\flashloader\ST\FlashSTM32F07xxB.board"
12 |
13 |
14 |
15 |
16 |
--------------------------------------------------------------------------------
/EWARM/settings/BootloaderHAL.crun:
--------------------------------------------------------------------------------
1 |
2 |
3 | 1
4 |
5 |
6 | *
7 | *
8 | *
9 | 0
10 | 1
11 |
12 |
13 |
14 |
--------------------------------------------------------------------------------
/EWARM/settings/BootloaderHAL.dnx:
--------------------------------------------------------------------------------
1 |
2 |
3 |
4 | 0
5 | 1
6 | 90
7 | 1
8 | 1
9 | 1
10 | main
11 | 0
12 | 50
13 |
14 |
15 | 67095825
16 |
17 | 0
18 | 2
19 | _ 0
20 | _ 0
21 |
22 |
23 | 4230138833
24 |
25 |
26 | 0
27 | 0
28 | 1
29 | 0
30 | 1
31 | 0
32 |
33 |
34 | 0
35 | 0
36 | 1
37 | 0
38 | 1
39 |
40 |
41 | 1
42 |
43 |
44 | 1
45 | 0
46 | 1
47 | 0
48 | 1
49 |
50 |
51 | 0
52 | 1
53 |
54 |
55 | 10000000
56 | 0
57 | 1
58 |
59 |
60 | _ 0
61 | _ 0
62 |
63 |
64 | 0
65 |
66 |
67 | 1
68 |
69 |
70 | SharedData_t-magic 4 0
71 | struct FwInfo-MAGIC_HASH 4 0
72 |
73 |
74 | {W}1:uart->Instance->TDR 5 0
75 |
76 |
77 | _ 0
78 | _ ""
79 |
80 |
81 | _ 0
82 | _ ""
83 | _ 0
84 |
85 |
86 | 0
87 |
88 |
89 | 1
90 |
91 |
92 | 0
93 |
94 |
95 | _ 1 "EMUL_CODE" "{$PROJ_DIR$\..\Src\stm32f0xx_it.c}.88.3" 0 0 1 "" 0 "" 0
96 | 1
97 |
98 |
99 | 0
100 | 0
101 |
102 |
103 |
--------------------------------------------------------------------------------
/EWARM/stm32f070xb_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003EFF;
11 | define symbol __ICFEDIT_region_RAM_shared_start__ = 0x20003F00;
12 | define symbol __ICFEDIT_region_RAM_shared_end__ = 0x20003FFF;
13 |
14 | /*-Sizes-*/
15 | define symbol __ICFEDIT_size_cstack__ = 0x400;
16 | define symbol __ICFEDIT_size_heap__ = 0x200;
17 | /**** End of ICF editor section. ###ICF###*/
18 |
19 | define memory mem with size = 4G;
20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
22 | define region SHARED_region = mem:[from __ICFEDIT_region_RAM_shared_start__ to __ICFEDIT_region_RAM_shared_end__];
23 |
24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
26 |
27 | initialize by copy { readwrite };
28 | do not initialize { section .noinit };
29 | do not initialize { section SHARED_DATA };
30 |
31 |
32 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
33 |
34 | place in ROM_region { readonly };
35 | place in RAM_region { readwrite,
36 | block CSTACK, block HEAP };
37 | place in SHARED_region { readwrite section SHARED_DATA};
38 |
39 | export symbol __ICFEDIT_region_RAM_start__;
40 | export symbol __ICFEDIT_region_RAM_end__;
41 |
--------------------------------------------------------------------------------
/Inc/bootloader.h:
--------------------------------------------------------------------------------
1 | #ifndef __BOOTLOADER_H__
2 | #define __BOOTLOADER_H__
3 |
4 |
5 |
6 |
7 |
8 | void bootloaderSetup(void);
9 |
10 | #endif
--------------------------------------------------------------------------------
/Inc/internal_flash_driver.h:
--------------------------------------------------------------------------------
1 | #ifndef __INTERNAL_FLASH_DRIVER_H
2 | #define __INTERNAL_FLASH_DRIVER_H
3 |
4 | #include "stdint.h"
5 | #include "stdbool.h"
6 | #include "stm32f0xx_hal.h"
7 |
8 | bool FlashErasePage(uint32_t PageAddress);
9 | bool FlashWrite(volatile uint32_t *flash, const uint8_t *data, uint32_t count);
10 | bool FlashUnlock();
11 | bool FlashLock();
12 |
13 |
14 | #endif
--------------------------------------------------------------------------------
/Inc/main.h:
--------------------------------------------------------------------------------
1 | /* USER CODE BEGIN Header */
2 | /**
3 | ******************************************************************************
4 | * @file : main.h
5 | * @brief : Header for main.c file.
6 | * This file contains the common defines of the application.
7 | ******************************************************************************
8 | * @attention
9 | *
10 | * © Copyright (c) 2019 STMicroelectronics.
11 | * All rights reserved.
12 | *
13 | * This software component is licensed by ST under BSD 3-Clause license,
14 | * the "License"; You may not use this file except in compliance with the
15 | * License. You may obtain a copy of the License at:
16 | * opensource.org/licenses/BSD-3-Clause
17 | *
18 | ******************************************************************************
19 | */
20 | /* USER CODE END Header */
21 |
22 | /* Define to prevent recursive inclusion -------------------------------------*/
23 | #ifndef __MAIN_H
24 | #define __MAIN_H
25 |
26 | #ifdef __cplusplus
27 | extern "C" {
28 | #endif
29 |
30 | /* Includes ------------------------------------------------------------------*/
31 | #include "stm32f0xx_hal.h"
32 |
33 | /* Private includes ----------------------------------------------------------*/
34 | /* USER CODE BEGIN Includes */
35 |
36 | /* USER CODE END Includes */
37 |
38 | /* Exported types ------------------------------------------------------------*/
39 | /* USER CODE BEGIN ET */
40 |
41 | /* USER CODE END ET */
42 |
43 | /* Exported constants --------------------------------------------------------*/
44 | /* USER CODE BEGIN EC */
45 |
46 | /* USER CODE END EC */
47 |
48 | /* Exported macro ------------------------------------------------------------*/
49 | /* USER CODE BEGIN EM */
50 |
51 | /* USER CODE END EM */
52 |
53 | /* Exported functions prototypes ---------------------------------------------*/
54 | void Error_Handler(void);
55 |
56 | /* USER CODE BEGIN EFP */
57 |
58 | /* USER CODE END EFP */
59 |
60 | /* Private defines -----------------------------------------------------------*/
61 | #define AUX_TX_Pin GPIO_PIN_2
62 | #define AUX_TX_GPIO_Port GPIOA
63 | #define AUX_RX_Pin GPIO_PIN_3
64 | #define AUX_RX_GPIO_Port GPIOA
65 | #define FLASH_CS_Pin GPIO_PIN_4
66 | #define FLASH_CS_GPIO_Port GPIOA
67 | #define BUZZER_OUT_Pin GPIO_PIN_8
68 | #define BUZZER_OUT_GPIO_Port GPIOA
69 | /* USER CODE BEGIN Private defines */
70 |
71 | /* USER CODE END Private defines */
72 |
73 | #ifdef __cplusplus
74 | }
75 | #endif
76 |
77 | #endif /* __MAIN_H */
78 |
79 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
80 |
--------------------------------------------------------------------------------
/Inc/queue_manager.h:
--------------------------------------------------------------------------------
1 | #ifndef __QUEUE_MANAGER_H
2 | #define __QUEUE_MANAGER_H
3 |
4 | #include "stdint.h"
5 | #include "stdbool.h"
6 |
7 | #define QUEUE_SIZE 512
8 |
9 | typedef struct _Queue
10 | {
11 | uint8_t data[QUEUE_SIZE];
12 | int32_t frontIndex;
13 | int32_t rearIndex;
14 | }Queue_t;
15 |
16 |
17 | void QueueInit(Queue_t *queue);
18 | void QueuePush(Queue_t *queue, char data);
19 | char QueuePop(Queue_t *queue);
20 | bool QueueAvailable(Queue_t *queue);
21 | void QueueClean(Queue_t *queue);
22 |
23 | #endif
--------------------------------------------------------------------------------
/Inc/stm32f0xx_it.h:
--------------------------------------------------------------------------------
1 | /* USER CODE BEGIN Header */
2 | /**
3 | ******************************************************************************
4 | * @file stm32f0xx_it.h
5 | * @brief This file contains the headers of the interrupt handlers.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2019 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 | /* USER CODE END Header */
20 |
21 | /* Define to prevent recursive inclusion -------------------------------------*/
22 | #ifndef __STM32F0xx_IT_H
23 | #define __STM32F0xx_IT_H
24 |
25 | #ifdef __cplusplus
26 | extern "C" {
27 | #endif
28 |
29 | /* Private includes ----------------------------------------------------------*/
30 | /* USER CODE BEGIN Includes */
31 |
32 | /* USER CODE END Includes */
33 |
34 | /* Exported types ------------------------------------------------------------*/
35 | /* USER CODE BEGIN ET */
36 |
37 | /* USER CODE END ET */
38 |
39 | /* Exported constants --------------------------------------------------------*/
40 | /* USER CODE BEGIN EC */
41 |
42 | /* USER CODE END EC */
43 |
44 | /* Exported macro ------------------------------------------------------------*/
45 | /* USER CODE BEGIN EM */
46 |
47 | /* USER CODE END EM */
48 |
49 | /* Exported functions prototypes ---------------------------------------------*/
50 | void NMI_Handler(void);
51 | void HardFault_Handler(void);
52 | void SVC_Handler(void);
53 | void PendSV_Handler(void);
54 | void SysTick_Handler(void);
55 | void USART2_IRQHandler(void);
56 | /* USER CODE BEGIN EFP */
57 |
58 | /* USER CODE END EFP */
59 |
60 | #ifdef __cplusplus
61 | }
62 | #endif
63 |
64 | #endif /* __STM32F0xx_IT_H */
65 |
66 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
67 |
--------------------------------------------------------------------------------
/Inc/uart_handle.h:
--------------------------------------------------------------------------------
1 | #ifndef __UART_HANDLE_H
2 | #define __UART_HANDLE_H
3 |
4 | #include "stm32f0xx_hal.h"
5 | #include "stdint.h"
6 | #include "stdbool.h"
7 | #include "queue_manager.h"
8 |
9 | typedef struct _UartHandle {
10 | USART_TypeDef *Instance;
11 | Queue_t qReceive;
12 | Queue_t qTransmit;
13 | }UartHandle_t;
14 |
15 |
16 | void UartInit(UartHandle_t *uart);
17 | void UartWrite(UartHandle_t *uart, uint8_t *buffer, uint32_t bufferSize);
18 | bool UartAvailable(UartHandle_t *uart);
19 | uint8_t UartRead(UartHandle_t *uart);
20 | void UartCleanRx(UartHandle_t *uart);
21 | void UartFlushTx(UartHandle_t *uart);
22 | void UartISR(UartHandle_t *uart);
23 |
24 | #endif
--------------------------------------------------------------------------------
/Inc/utils.h:
--------------------------------------------------------------------------------
1 | #ifndef __UTILS_H__
2 | #define __UTILS_H__
3 |
4 | #include "stdint.h"
5 | #include "stm32f0xx_hal.h"
6 |
7 |
8 | #define FEED_DOG WRITE_REG(((IWDG_TypeDef *)(IWDG_BASE))->KR, IWDG_KEY_RELOAD)
9 |
10 | enum LogLevel{
11 | LOG_DEBUG,
12 | LOG_INFO,
13 | LOG_ERROR,
14 | LOG_WARNING,
15 | };
16 |
17 | //logger
18 | void log(enum LogLevel level, char * log, ...);
19 |
20 | #define LOGD(x, ...) log(LOG_DEBUG, x, ##__VA_ARGS__)
21 |
22 | #endif
--------------------------------------------------------------------------------
/README.md:
--------------------------------------------------------------------------------
1 | # stm32f0_bootloader
2 |
3 | A small bootloader for stm32f0xx device. (Tested with STM32F070CBT6)
4 |
5 | For more information on design you can check my blog post on medium -> [Link](https://medium.com/@xsumirx/embedded-failsafe-bootloader-design-with-stm32-9c9d3955634b)
6 |
--------------------------------------------------------------------------------
/Src/internal_flash_driver.c:
--------------------------------------------------------------------------------
1 | #include "internal_flash_driver.h"
2 |
3 |
4 | bool FlashErasePage(uint32_t PageAddress)
5 | {
6 | /* Proceed to erase the page */
7 | SET_BIT(FLASH->CR, FLASH_CR_PER);
8 | WRITE_REG(FLASH->AR, PageAddress);
9 | SET_BIT(FLASH->CR, FLASH_CR_STRT);
10 | while (FLASH->SR & FLASH_SR_BSY) continue;
11 |
12 | return true;
13 | }
14 |
15 | bool FlashWrite(volatile uint32_t *flash, const uint8_t *data, uint32_t count)
16 | {
17 | uint32_t primask;
18 | uint8_t const *data_e;
19 | data_e = data + (count-(count%2));
20 | uint16_t *flashAddr = ((uint16_t*)((const void*)flash));
21 | if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) return false;
22 | while (data < data_e)
23 | {
24 | primask = __get_PRIMASK();
25 | __disable_irq();
26 | FLASH->CR = FLASH_CR_PG;
27 | *(__IO uint16_t*)flashAddr = (uint16_t)*((uint16_t *)((void *)data));
28 | flashAddr += 1;
29 | data += 2;
30 | __DMB();
31 | while (FLASH->SR & FLASH_SR_BSY) continue;
32 | __set_PRIMASK(primask);
33 | if (FLASH->SR & (FLASH_SR_PGERR | FLASH_SR_WRPERR)) return false;
34 | }
35 |
36 | if(count % 2){
37 | *(__IO uint16_t*)flashAddr = (uint16_t)*((uint16_t *)((void *)data));
38 | }
39 |
40 |
41 | return true;
42 | }
43 |
44 | bool FlashUnlock()
45 | {
46 | if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
47 | {
48 | /* Authorize the FLASH Registers access */
49 | WRITE_REG(FLASH->KEYR, FLASH_KEY1);
50 | WRITE_REG(FLASH->KEYR, FLASH_KEY2);
51 | /* Verify Flash is unlocked */
52 | if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) return false;
53 | }
54 |
55 | return true;
56 | }
57 |
58 | bool FlashLock()
59 | {
60 | SET_BIT(FLASH->CR, FLASH_CR_LOCK);
61 | return true;
62 | }
--------------------------------------------------------------------------------
/Src/queue_manager.c:
--------------------------------------------------------------------------------
1 | #include "queue_manager.h"
2 | #include "string.h"
3 |
4 | void QueueInit(Queue_t *queue)
5 | {
6 | queue->frontIndex = queue->rearIndex = -1;
7 | }
8 |
9 | bool QueueAvailable(Queue_t *queue)
10 | {
11 | if (queue->frontIndex == -1) {
12 | return false;
13 | }
14 |
15 | return true;
16 | }
17 |
18 | void QueuePush(Queue_t *queue, char data)
19 | {
20 | if((queue->rearIndex == QUEUE_SIZE - 1 && queue->frontIndex == 0) ||
21 | (queue->rearIndex ==(queue->frontIndex -1))){
22 | //Queue is Full -- Pop Last Element
23 | QueuePop(queue);
24 | }
25 |
26 | if (queue->frontIndex == -1){
27 | queue->rearIndex = queue->frontIndex = 0;
28 | queue->data[queue->rearIndex] = data;
29 | } else if (queue->rearIndex == QUEUE_SIZE - 1
30 | && queue->frontIndex != 0){
31 | queue->rearIndex = 0;
32 | queue->data[queue->rearIndex] = data;
33 | } else {
34 | queue->rearIndex++;
35 | queue->data[queue->rearIndex] = data;
36 | }
37 | }
38 |
39 |
40 | //Push Data Into Queue
41 | char QueuePop(Queue_t *queue){
42 | if (queue->frontIndex == -1) {
43 | return 0;
44 | }
45 |
46 | char data = queue->data[queue->frontIndex];
47 | if (queue->frontIndex == queue->rearIndex){
48 | queue->frontIndex = queue->rearIndex = -1;
49 | }else if (queue->frontIndex == QUEUE_SIZE - 1)
50 | queue->frontIndex = 0;
51 | else
52 | queue->frontIndex++;
53 |
54 | return data;
55 | }
56 |
57 |
58 | void QueueClean(Queue_t *queue)
59 | {
60 | queue->frontIndex = queue->rearIndex = -1;
61 | memset(queue->data, 0, QUEUE_SIZE);
62 | }
63 |
--------------------------------------------------------------------------------
/Src/uart_handle.c:
--------------------------------------------------------------------------------
1 | #include "uart_handle.h"
2 |
3 | #define MAX_BUFFER QUEUE_SIZE
4 |
5 | //Clear and disable all the interrupt
6 | static void UartDisableAndClearAllInterrupt(UartHandle_t *uart)
7 | {
8 | uart->Instance->CR1 &=
9 | ~(USART_CR1_RXNEIE |
10 | USART_CR1_TXEIE |
11 | USART_CR1_CMIE |
12 | USART_CR1_PEIE |
13 | USART_CR1_TCIE |
14 | USART_CR1_RTOIE |
15 | USART_CR1_IDLEIE);
16 |
17 | uart->Instance->CR3 &=
18 | ~(USART_CR3_EIE |
19 | USART_CR3_CTSIE);
20 |
21 |
22 | //Clear Flag
23 | uart->Instance->ICR |=
24 | (USART_ICR_CMCF |
25 | USART_ICR_CTSCF |
26 | USART_ICR_RTOCF |
27 | USART_ICR_TCCF |
28 | USART_ICR_IDLECF |
29 | USART_ICR_ORECF |
30 | USART_ICR_NCF |
31 | USART_ICR_FECF |
32 | USART_ICR_PECF);
33 |
34 | }
35 |
36 | //Enable/Disbale Error Interrupt
37 | static void UartErrorInterruptEnable(UartHandle_t *uart,
38 | bool enable)
39 | {
40 | if(enable){
41 | uart->Instance->CR3 |= (USART_CR3_EIE );
42 | }else {
43 | uart->Instance->CR3 &= ~(USART_CR3_EIE);
44 | }
45 | }
46 |
47 |
48 | //Enable/Disbale Receive Interrupt
49 | static void UartReceiveInterruptEnable(UartHandle_t *uart,
50 | bool enable)
51 | {
52 | if(enable){
53 | uart->Instance->CR1 |= (USART_CR1_RXNEIE );
54 | }else {
55 | uart->Instance->CR1 &= ~(USART_CR1_RXNEIE);
56 | }
57 | }
58 |
59 | //Enable/Disable Transmit Interrupt
60 | static void UartTransmitInterruptEnable(UartHandle_t *uart,
61 | bool enable)
62 | {
63 | if(enable){
64 | uart->Instance->CR1 |= (USART_CR1_TXEIE );
65 | }else {
66 | uart->Instance->CR1 &= ~(USART_CR1_TXEIE);
67 | }
68 | }
69 |
70 | void UartInit(UartHandle_t *uart)
71 | {
72 |
73 | //Enable All the Interrupt
74 | UartDisableAndClearAllInterrupt(uart);
75 | UartErrorInterruptEnable(uart, true);
76 | UartReceiveInterruptEnable(uart, true);
77 | //Init Queue
78 | QueueInit(&uart->qReceive);
79 | QueueInit(&uart->qTransmit);
80 | }
81 |
82 | void UartCleanRx(UartHandle_t *uart)
83 | {
84 | UartReceiveInterruptEnable(uart, false);
85 | QueueClean(&uart->qReceive);
86 | UartReceiveInterruptEnable(uart, true);
87 | }
88 |
89 | void UartFlushTx(UartHandle_t *uart)
90 | {
91 | UartTransmitInterruptEnable(uart, false);
92 | QueueClean(&uart->qTransmit);
93 | }
94 |
95 | //Write data into Queue for Scheduling transmission
96 | void UartWrite(UartHandle_t *uart, uint8_t *buffer, uint32_t bufferSize)
97 | {
98 |
99 | //printf("-> ");
100 | //HexDump(buffer, bufferSize);
101 | for(int i=0; (iqTransmit, *(buffer + i));
103 |
104 | //Raise Transmission Interupt
105 | UartTransmitInterruptEnable(uart, true);
106 | }
107 |
108 |
109 | //If data Available for Reading
110 | bool UartAvailable(UartHandle_t *uart)
111 | {
112 | return QueueAvailable(&uart->qReceive);
113 | }
114 |
115 | //Read Data from the Queue
116 | uint8_t UartRead(UartHandle_t *uart)
117 | {
118 | return (uint8_t)QueuePop(&uart->qReceive);
119 | }
120 |
121 | //Handle Interrupt
122 | char x = 0;
123 | void UartISR(UartHandle_t *uart)
124 | {
125 | if(uart->Instance->ISR & USART_ISR_RXNE)
126 | {
127 | //Read and Queue Data
128 | QueuePush(&uart->qReceive, uart->Instance->RDR);
129 | }else if (uart->Instance->ISR & USART_ISR_TXE){
130 | //Transmission Ready to Take More
131 | if(!QueueAvailable(&uart->qTransmit)){
132 | UartTransmitInterruptEnable(uart, false);
133 | }else{
134 | uart->Instance->TDR = QueuePop(&uart->qTransmit);
135 | }
136 | }
137 |
138 | //Clear Flag
139 | uart->Instance->ICR |=
140 | (USART_ICR_CMCF |
141 | USART_ICR_CTSCF |
142 | USART_ICR_RTOCF |
143 | USART_ICR_TCCF |
144 | USART_ICR_IDLECF |
145 | USART_ICR_ORECF |
146 | USART_ICR_NCF |
147 | USART_ICR_FECF |
148 | USART_ICR_PECF);
149 | }
150 |
151 |
--------------------------------------------------------------------------------
/Src/utils.c:
--------------------------------------------------------------------------------
1 | #include "utils.h"
2 | #include "stdio.h"
3 | #include "stdarg.h"
4 |
5 |
6 | void HAL_Delay(__IO uint32_t Delay)
7 | {
8 | uint32_t tickstart = HAL_GetTick();
9 | uint32_t wait = Delay;
10 |
11 | /* Add a period to guarantee minimum wait */
12 | if (wait < HAL_MAX_DELAY)
13 | {
14 | wait++;
15 | }
16 |
17 | while((HAL_GetTick() - tickstart) < wait)
18 | {
19 | FEED_DOG;
20 | }
21 | }
22 |
23 | //Log
24 | void log(enum LogLevel level, char *log, ...)
25 | {
26 | switch(level){
27 | case LOG_DEBUG: break;
28 | case LOG_INFO: break;
29 | case LOG_ERROR: break;
30 | case LOG_WARNING: break;
31 | default:break;
32 | }
33 |
34 | va_list argptr;
35 | va_start(argptr, log);
36 | vprintf(log, argptr);
37 | va_end(argptr);
38 |
39 | }
--------------------------------------------------------------------------------
/w25qxx/w25qxx.h:
--------------------------------------------------------------------------------
1 | #ifndef _W25QXX_H
2 | #define _W25QXX_H
3 |
4 | #include
5 | #include "main.h"
6 |
7 | #ifdef __cplusplus
8 | extern "C" {
9 | #endif
10 |
11 | typedef enum
12 | {
13 | W25Q10=1,
14 | W25Q20,
15 | W25Q40,
16 | W25Q80,
17 | W25Q16,
18 | W25Q32,
19 | W25Q64,
20 | W25Q128,
21 | W25Q256,
22 | W25Q512,
23 |
24 | }W25QXX_ID_t;
25 |
26 | typedef struct
27 | {
28 | W25QXX_ID_t ID;
29 | uint8_t UniqID[8];
30 |
31 | uint16_t PageSize;
32 | uint32_t PageCount;
33 | uint32_t SectorSize;
34 | uint32_t SectorCount;
35 | uint32_t BlockSize;
36 | uint32_t BlockCount;
37 |
38 | uint32_t CapacityInKiloByte;
39 |
40 | uint8_t StatusRegister1;
41 | uint8_t StatusRegister2;
42 | uint8_t StatusRegister3;
43 |
44 | uint8_t Lock;
45 |
46 | }w25qxx_t;
47 |
48 | extern w25qxx_t w25qxx;
49 | //############################################################################
50 | // in Page,Sector and block read/write functions, can put 0 to read maximum bytes
51 | //############################################################################
52 | bool W25qxx_Init(void);
53 |
54 | void W25qxx_EraseChip(void);
55 | void W25qxx_EraseSector(uint32_t SectorAddr);
56 | void W25qxx_EraseBlock(uint32_t BlockAddr);
57 |
58 | uint32_t W25qxx_PageToSector(uint32_t PageAddress);
59 | uint32_t W25qxx_PageToBlock(uint32_t PageAddress);
60 | uint32_t W25qxx_SectorToBlock(uint32_t SectorAddress);
61 | uint32_t W25qxx_SectorToPage(uint32_t SectorAddress);
62 | uint32_t W25qxx_BlockToPage(uint32_t BlockAddress);
63 |
64 | bool W25qxx_IsEmptyPage(uint32_t Page_Address,uint32_t OffsetInByte,uint32_t NumByteToCheck_up_to_PageSize);
65 | bool W25qxx_IsEmptySector(uint32_t Sector_Address,uint32_t OffsetInByte,uint32_t NumByteToCheck_up_to_SectorSize);
66 | bool W25qxx_IsEmptyBlock(uint32_t Block_Address,uint32_t OffsetInByte,uint32_t NumByteToCheck_up_to_BlockSize);
67 |
68 | void W25qxx_WriteByte(uint8_t pBuffer,uint32_t Bytes_Address);
69 | void W25qxx_WritePage(uint8_t *pBuffer ,uint32_t Page_Address,uint32_t OffsetInByte,uint32_t NumByteToWrite_up_to_PageSize);
70 | void W25qxx_WriteSector(uint8_t *pBuffer,uint32_t Sector_Address,uint32_t OffsetInByte,uint32_t NumByteToWrite_up_to_SectorSize);
71 | void W25qxx_WriteBlock(uint8_t* pBuffer,uint32_t Block_Address,uint32_t OffsetInByte,uint32_t NumByteToWrite_up_to_BlockSize);
72 |
73 | void W25qxx_ReadByte(uint8_t *pBuffer,uint32_t Bytes_Address);
74 | void W25qxx_ReadBytes(uint8_t *pBuffer,uint32_t ReadAddr,uint32_t NumByteToRead);
75 | void W25qxx_ReadPage(uint8_t *pBuffer,uint32_t Page_Address,uint32_t OffsetInByte,uint32_t NumByteToRead_up_to_PageSize);
76 | void W25qxx_ReadSector(uint8_t *pBuffer,uint32_t Sector_Address,uint32_t OffsetInByte,uint32_t NumByteToRead_up_to_SectorSize);
77 | void W25qxx_ReadBlock(uint8_t* pBuffer,uint32_t Block_Address,uint32_t OffsetInByte,uint32_t NumByteToRead_up_to_BlockSize);
78 | //############################################################################
79 | #ifdef __cplusplus
80 | }
81 | #endif
82 |
83 | #endif
84 |
85 |
--------------------------------------------------------------------------------
/w25qxx/w25qxxConfig.h:
--------------------------------------------------------------------------------
1 | #ifndef _W25QXXCONFIG_H
2 | #define _W25QXXCONFIG_H
3 |
4 | #define _W25QXX_SPI hspi1
5 | #define _W25QXX_CS_GPIO FLASH_CS_GPIO_Port
6 | #define _W25QXX_CS_PIN FLASH_CS_Pin
7 | #define _W25QXX_USE_FREERTOS 0
8 | #define _W25QXX_DEBUG 0
9 | #endif
10 |
--------------------------------------------------------------------------------