├── LICENSE.txt
├── README.md
├── init_adv7533.py
├── lbr
├── 2013978-1.lbr
├── ADV7533BCBZ-RL.lbr
├── AP7312.lbr
├── FTSH-107-XX-XXX-D.lbr
├── HDMI05-CL02F3.lbr
├── IP4786CZ32S.lbr
├── LM2757.lbr
├── PCA9306.lbr
├── PCMFXHDMI2S.lbr
├── QSH-030-01-X-D-A.lbr
├── SN75DPHY440SS.lbr
├── SiT8021.lbr
├── TFM-105-01-XXX-D-RA.lbr
├── Texas Instruments_By_element14_Batch_1-readme.txt
├── microbuilder-license.txt
├── microbuilder.lbr
└── zx62d-b-5pa8-oshpark_10.lbr
└── ngptv
├── eagle.epf
├── ngptv-lite-v11-bom.csv
├── ngptv-lite-v11.brd
├── ngptv-lite-v11.sch
├── ngptv-lite.brd
├── ngptv-lite.sch
└── ngptv.sch
/LICENSE.txt:
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/README.md:
--------------------------------------------------------------------------------
1 | ngptv
2 | =====
3 | This is an attempt at making an HDMI adapter for the Vita. It does not work
4 | because the ADV7533 does not support the auto clock stopping that the Vita uses
5 | to save battery on the MIPI DSI clock. There are two ways of getting it to
6 | work.
7 |
8 | 1. Replace the ADV7533 with another part that supports MIPI clock going from
9 | HS to LP mode when the data lanes are not in use. There are no other DSI to
10 | HDMI part, but you might get away with stacking a DSI to eDP and eDP to HDMI
11 | for example. Another way is to use a FPGA and convert the signals manually.
12 | 2. Creating some custom part to "filter" the stopped clock to a continuous
13 | clock. There does not appear to be any off-the-shelf part that does this and
14 | I've tried looking into re-purposing jitter correctors but they don't work
15 | because they average out the clock signals instead of locking on to the highest
16 | frequency.
17 |
18 | Both are too much work for me to consider doing, so I will leave this non-
19 | working project as is. Included are two designs. First is ngptv, which is
20 | supposed to be a small board that fits inside the Vita. Due to the design
21 | constraints of the ADV7533 (small pitch BGA) which requires > 6 layers and the
22 | small size requirement of all components, it does not seem feasible for me to
23 | prototype (too expensive and I don't have the right equipment to assemble).
24 | Additionally, the ADV7533 is a NDA part that requires a HDMI license to buy.
25 |
26 | The second design is ngptv lite which is designed to connect directly to a
27 | [B-LCDAD-HDMI](http://www.st.com/en/development-tools/b-lcdad-hdmi1.html)
28 | daughterboard. This $30 board contains a ADV7533 and was originally designed to
29 | work with a ST evaluation board. We instead connect it to the ngptv lite which
30 | has a microcontroller to interface with ADV7533 as well as a redriver for MIPI
31 | DSI. Using a
32 | [FFTP-07-D-03.85-01-N](https://www.samtec.com/products/fftp-07-d-03.85-01-n)
33 | cable, this connects to a breakout board placed inside the Vita that brings in
34 | the MIPI DSI signals from the exposed testpoints. The first version lacked the
35 | redriver, which seemed to still work (to the extent that it works if you
36 | manually set the Vita's MIPI clock to not use LP mode, which breaks the on
37 | screen video).
38 |
39 | These designs are provided as-is under CC 4.0.
40 |
--------------------------------------------------------------------------------
/init_adv7533.py:
--------------------------------------------------------------------------------
1 | #!/usr/bin/python
2 |
3 | # Sequence from https://github.com/xerpi/vita-baremetal-sample/blob/master/src/hdmi.c
4 |
5 | import smbus
6 |
7 | HDMI_I2C_BUS = 1
8 | HDMI_I2C_ADDR = 0x7A
9 |
10 | # Configurable addresses
11 | HDMI_I2C_CEC_ADDR = 0x78
12 |
13 | # ADV7533 Main registers
14 | ADV7533_REG_PACKET_ENABLE0 = 0x40
15 | ADV7533_REG_POWER = 0x41
16 | ADV7533_REG_STATUS = 0x42
17 | ADV7533_REG_AVI_INFOFRAME_1 = 0x56
18 | ADV7533_REG_INT_1 = 0x97
19 | ADV7533_REG_HDCP_HDMI_CFG = 0xAF
20 | ADV7533_REG_CEC_I2C_ADDR = 0xE1
21 | ADV7533_REG_POWER2 = 0xD6
22 |
23 | ADV7533_PACKET_ENABLE_GC = 0x80
24 |
25 | ADV7533_POWER_POWER_DOWN = 0x40
26 |
27 | ADV7533_INT1_BKSV = 0x40
28 |
29 | ADV7533_STATUS_HPD = 0x40
30 |
31 | ADV7533_REG_POWER2_HPD_SRC_MASK = 0xC0
32 | ADV7533_REG_POWER2_HPD_SRC_HPD = 0x40
33 |
34 | # ADV7533 CEC registers
35 | ADV7533_REG_CEC_DSI_INTERNAL_TIMING = 0x27
36 |
37 | LANES = 2
38 | CLOCK_DIV_BY_LANES = [6, 4, 3]
39 |
40 | def hdmi_write(bus, addr, reg, data):
41 | bus.write_byte_data(addr>>1, reg, data)
42 |
43 | def hdmi_read(bus, addr, reg):
44 | return bus.read_byte_data(addr>>1, reg)
45 |
46 | def hdmi_set_bit(bus, addr, reg, bit):
47 | val = hdmi_read(bus, addr, reg)
48 | val |= bit
49 | hdmi_write(bus, addr, reg, val)
50 |
51 | def hdmi_clr_bit(bus, addr, reg, bit):
52 | val = hdmi_read(bus, addr, reg)
53 | val &= ~bit
54 | hdmi_write(bus, addr, reg, val)
55 |
56 | def hdmi_update_bits(bus, addr, reg, mask, val):
57 | data = hdmi_read(bus, addr, reg)
58 | data &= ~mask
59 | data |= val & mask
60 | hdmi_write(bus, addr, reg, data)
61 |
62 | def main(bus, test, hdcp):
63 | print "Setting up CEC address"
64 | hdmi_write(bus, HDMI_I2C_ADDR, ADV7533_REG_CEC_I2C_ADDR, HDMI_I2C_CEC_ADDR)
65 |
66 | print "Waiting for HDMI hot-plug detect"
67 | while True:
68 | status = hdmi_read(bus, HDMI_I2C_ADDR, ADV7533_REG_STATUS)
69 | if ((status & ADV7533_STATUS_HPD) != 0):
70 | break
71 |
72 | print "Powering up ADV7533"
73 | hdmi_update_bits(bus, HDMI_I2C_ADDR, ADV7533_REG_POWER, ADV7533_POWER_POWER_DOWN, 0)
74 | hdmi_update_bits(bus, HDMI_I2C_ADDR, ADV7533_REG_POWER2, ADV7533_REG_POWER2_HPD_SRC_MASK, ADV7533_REG_POWER2_HPD_SRC_HPD)
75 |
76 | print "Sending main config sequence"
77 | hdmi_write(bus, HDMI_I2C_ADDR, 0x16, 0x20)
78 | hdmi_write(bus, HDMI_I2C_ADDR, 0x9a, 0xe0)
79 | hdmi_write(bus, HDMI_I2C_ADDR, 0xba, 0x70)
80 | hdmi_write(bus, HDMI_I2C_ADDR, 0xde, 0x82)
81 | hdmi_write(bus, HDMI_I2C_ADDR, 0xe4, 0x40)
82 | hdmi_write(bus, HDMI_I2C_ADDR, 0xe5, 0x80)
83 |
84 | print "Sending CEC config sequence"
85 | hdmi_write(bus, HDMI_I2C_CEC_ADDR, 0x15, 0xd0)
86 | hdmi_write(bus, HDMI_I2C_CEC_ADDR, 0x17, 0xd0)
87 | hdmi_write(bus, HDMI_I2C_CEC_ADDR, 0x24, 0x20)
88 | hdmi_write(bus, HDMI_I2C_CEC_ADDR, 0x57, 0x11)
89 | hdmi_write(bus, HDMI_I2C_CEC_ADDR, 0x05, 0xc8)
90 |
91 | print "Set number of dsi lanes"
92 | hdmi_write(bus, HDMI_I2C_CEC_ADDR, 0x1C, LANES << 4)
93 |
94 | if (test):
95 | print "Set pixel clock auto mode"
96 | hdmi_write(bus, HDMI_I2C_CEC_ADDR, 0x16, 0x00)
97 | else:
98 | print "Set pixel clock divider mode"
99 | hdmi_write(bus, HDMI_I2C_CEC_ADDR, 0x16, CLOCK_DIV_BY_LANES[LANES - 2] << 3)
100 |
101 | if (test):
102 | htotal, vtotal, hfp, hsw, hbp, vfp, vsw, vbp = 0x672, 0x2EE, 0x6E, 0x28, 0xDC, 5, 5, 0x14;
103 |
104 | print "Horizontal porch params"
105 | hdmi_write(bus, HDMI_I2C_CEC_ADDR, 0x28, htotal >> 4);
106 | hdmi_write(bus, HDMI_I2C_CEC_ADDR, 0x29, (htotal << 4) & 0xff);
107 | hdmi_write(bus, HDMI_I2C_CEC_ADDR, 0x2a, hsw >> 4);
108 | hdmi_write(bus, HDMI_I2C_CEC_ADDR, 0x2b, (hsw << 4) & 0xff);
109 | hdmi_write(bus, HDMI_I2C_CEC_ADDR, 0x2c, hfp >> 4);
110 | hdmi_write(bus, HDMI_I2C_CEC_ADDR, 0x2d, (hfp << 4) & 0xff);
111 | hdmi_write(bus, HDMI_I2C_CEC_ADDR, 0x2e, hbp >> 4);
112 | hdmi_write(bus, HDMI_I2C_CEC_ADDR, 0x2f, (hbp << 4) & 0xff);
113 |
114 | print "Vertical porch params"
115 | hdmi_write(bus, HDMI_I2C_CEC_ADDR, 0x30, vtotal >> 4);
116 | hdmi_write(bus, HDMI_I2C_CEC_ADDR, 0x31, (vtotal << 4) & 0xff);
117 | hdmi_write(bus, HDMI_I2C_CEC_ADDR, 0x32, vsw >> 4);
118 | hdmi_write(bus, HDMI_I2C_CEC_ADDR, 0x33, (vsw << 4) & 0xff);
119 | hdmi_write(bus, HDMI_I2C_CEC_ADDR, 0x34, vfp >> 4);
120 | hdmi_write(bus, HDMI_I2C_CEC_ADDR, 0x35, (vfp << 4) & 0xff);
121 | hdmi_write(bus, HDMI_I2C_CEC_ADDR, 0x36, vbp >> 4);
122 | hdmi_write(bus, HDMI_I2C_CEC_ADDR, 0x37, (vbp << 4) & 0xff);
123 |
124 | print "Enable internal timing generator"
125 | hdmi_write(bus, HDMI_I2C_CEC_ADDR, ADV7533_REG_CEC_DSI_INTERNAL_TIMING, 0xCB)
126 | hdmi_write(bus, HDMI_I2C_CEC_ADDR, ADV7533_REG_CEC_DSI_INTERNAL_TIMING, 0x8B)
127 | hdmi_write(bus, HDMI_I2C_CEC_ADDR, ADV7533_REG_CEC_DSI_INTERNAL_TIMING, 0xCB)
128 | else:
129 | print "Disable internal timing generator"
130 | hdmi_write(bus, HDMI_I2C_CEC_ADDR, ADV7533_REG_CEC_DSI_INTERNAL_TIMING, 0x0B)
131 |
132 | print "GC Packet Enable"
133 | hdmi_write(bus, HDMI_I2C_ADDR, ADV7533_REG_PACKET_ENABLE0, ADV7533_PACKET_ENABLE_GC)
134 |
135 | print "Down Dither Output Colour Depth - 8 Bit (default)"
136 | hdmi_write(bus, HDMI_I2C_ADDR, 0x49, 0x00)
137 |
138 | print "Set HDMI/DVI Mode Select = HDMI Mode Enabled - bit 1"
139 | hdmi_set_bit(bus, HDMI_I2C_ADDR, ADV7533_REG_HDCP_HDMI_CFG, 0x2)
140 |
141 | print "Set Color Depth to 24 Bits/Pixel"
142 | hdmi_clr_bit(bus, HDMI_I2C_ADDR, 0x4C, 0x0F)
143 | hdmi_set_bit(bus, HDMI_I2C_ADDR, 0x4C, 0x04)
144 |
145 | print "Set Active Format Aspect Ratio = 16:9 (Center)"
146 | hdmi_clr_bit(bus, HDMI_I2C_ADDR, ADV7533_REG_AVI_INFOFRAME_1, 0x1F)
147 | hdmi_set_bit(bus, HDMI_I2C_ADDR, ADV7533_REG_AVI_INFOFRAME_1, 0x2A)
148 |
149 | print "Set V1P2 Enable"
150 | hdmi_set_bit(bus, HDMI_I2C_ADDR, 0xE4, 0xC0)
151 |
152 | if (test):
153 | print "Enable test mode"
154 | hdmi_write(bus, HDMI_I2C_CEC_ADDR, 0x55, 0x80)
155 | else:
156 | print "Disable test mode"
157 | hdmi_clr_bit(bus, HDMI_I2C_CEC_ADDR, 0x55, 0x00)
158 |
159 | print "Enable hdmi"
160 | hdmi_write(bus, HDMI_I2C_CEC_ADDR, 0x03, 0x89)
161 |
162 | if (hdcp):
163 | print "Set HDCP"
164 | hdmi_write(bus, HDMI_I2C_ADDR, ADV7533_REG_HDCP_HDMI_CFG, 0x96)
165 |
166 | print "Wait for the BKSV flag"
167 | while True:
168 | status = hdmi_read(bus, HDMI_I2C_ADDR, ADV7533_REG_INT_1)
169 | if ((status & ADV7533_INT1_BKSV) != 0):
170 | break
171 |
172 | print "Clear BKSV interrupt"
173 | hdmi_write(bus, HDMI_I2C_ADDR, ADV7533_REG_INT_1, (status & ~0xBF) | ADV7533_INT1_BKSV)
174 |
175 | print "Done."
176 |
177 | def init(bus):
178 | print "Setting up CEC address"
179 | hdmi_write(bus, HDMI_I2C_ADDR, ADV7533_REG_CEC_I2C_ADDR, HDMI_I2C_CEC_ADDR)
180 |
181 | def configure(bus, lanes):
182 | # ADV7533 Power Settings
183 | print "Power down"
184 | hdmi_clr_bit(bus, HDMI_I2C_ADDR, 0x41, 0x40)
185 | print "HPD Override"
186 | hdmi_set_bit(bus, HDMI_I2C_ADDR, 0xD6, 0xc0)
187 | print "Gate DSI LP Oscillator and DSI Bias Clock Powerdown"
188 | hdmi_clr_bit(bus, HDMI_I2C_CEC_ADDR, 0x03, 0x02)
189 |
190 | print "Fixed registers that must be set on power-up"
191 | hdmi_update_bits(bus, HDMI_I2C_ADDR, 0x16, 0x3E, 0x20)
192 | hdmi_write(bus, HDMI_I2C_ADDR, 0x9A, 0xE0)
193 | hdmi_update_bits(bus, HDMI_I2C_ADDR, 0xBA, 0xF8, 0x70)
194 | hdmi_write(bus, HDMI_I2C_ADDR, 0xDE, 0x82)
195 |
196 | hdmi_set_bit(bus, HDMI_I2C_ADDR, 0xE4, 0x40)
197 | hdmi_write(bus, HDMI_I2C_ADDR, 0xE5, 0x80)
198 |
199 | hdmi_update_bits(bus, HDMI_I2C_CEC_ADDR, 0x15, 0x30, 0x10)
200 | hdmi_update_bits(bus, HDMI_I2C_CEC_ADDR, 0x17, 0xF0, 0xD0)
201 | hdmi_clr_bit(bus, HDMI_I2C_CEC_ADDR, 0x24, 0x10)
202 | hdmi_set_bit(bus, HDMI_I2C_CEC_ADDR, 0x57, 0x10 | 0x01)
203 |
204 | print "Configure the number of DSI lanes"
205 | hdmi_write(bus, HDMI_I2C_CEC_ADDR, 0x1C, (lanes << 4))
206 |
207 | # Setup video output mode
208 | print "Select HDMI mode"
209 | hdmi_set_bit(bus, HDMI_I2C_ADDR, 0xAF, 0x02)
210 | print "HDMI Output Enable"
211 | hdmi_set_bit(bus, HDMI_I2C_CEC_ADDR, 0x03, 0x80)
212 |
213 | print "GC packet enable"
214 | hdmi_set_bit(bus, HDMI_I2C_ADDR, 0x40, 0x80)
215 | print "Input color depth 24-bit per pixel"
216 | hdmi_update_bits(bus, HDMI_I2C_ADDR, 0x4C, 0x0F, 0x03)
217 | print "Down dither output color depth"
218 | hdmi_write(bus, HDMI_I2C_ADDR, 0x49, 0xfc)
219 |
220 | print "Internal timing disabled"
221 | hdmi_clr_bit(bus, HDMI_I2C_CEC_ADDR, 0x27, 0x80)
222 |
223 | def show_test_pattern(bus):
224 | print "Set test pattern"
225 | hdmi_set_bit(bus, HDMI_I2C_CEC_ADDR, 0x55, 0x80)
226 | hdmi_set_bit(bus, HDMI_I2C_CEC_ADDR, 0x55, 0xA0)
227 | print "HDMI Output Enable"
228 | hdmi_set_bit(bus, HDMI_I2C_CEC_ADDR, 0x03, 0x89)
229 | print "Select HDMI mode"
230 | hdmi_set_bit(bus, HDMI_I2C_ADDR, 0xAF, 0x16)
231 |
232 | def setup_audio(bus):
233 | print "HDMI Startup"
234 | n_value = 6144;
235 | temp_byte = ((n_value&0xF0000)>>16) & 0xFF
236 | hdmi_write(bus, HDMI_I2C_ADDR, 0x1, temp_byte);
237 |
238 | temp_byte = ((n_value&0xFF00)>>8) & 0xFF
239 | hdmi_write(bus, HDMI_I2C_ADDR, 0x2, temp_byte);
240 |
241 | temp_byte = (n_value&0xFF) & 0xFF
242 | hdmi_write(bus, HDMI_I2C_ADDR, 0x3, temp_byte);
243 |
244 | print "Set SPDIF Enable = SPDIF Enabled"
245 | hdmi_set_bit(bus, HDMI_I2C_ADDR, 0x0B, 0x80);
246 |
247 | print "Set I2S Enable = I2S Enabled"
248 | hdmi_set_bit(bus, HDMI_I2C_ADDR, 0x0C, 0x04);
249 |
250 | print "Set I2S Sampling Frequency = 48.0 kHz is 0x20, 44.1Khz is 0x0"
251 | hdmi_write(bus, HDMI_I2C_ADDR, 0x15, 0x0);
252 |
253 | print "Set Audio Select = SPDIF Input is 0x10, I2S is 0x0"
254 | hdmi_set_bit(bus, HDMI_I2C_ADDR, 0x0A, 0x00);
255 |
256 | def power_up(bus):
257 | print "Power up"
258 | hdmi_clr_bit(bus, HDMI_I2C_ADDR, 0x41, 0x40)
259 |
260 | if __name__ == "__main__":
261 | bus = smbus.SMBus(HDMI_I2C_BUS)
262 | main(bus, 0, 1)
263 | #init(bus)
264 | #configure(bus, 2)
265 | #show_test_pattern(bus)
266 | #setup_audio(bus)
267 | #power_up(bus)
268 |
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135 | >Value
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140 | HDMI Type C (Mini) Connector
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/lbr/HDMI05-CL02F3.lbr:
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59 |
60 | <NXP - IP4786CZ32S - DIODE, ESD, HDMI TX INTERFACE, SOT1318</b><p>
61 | <author>Created by SamacSys</author>
62 |
63 |
64 | <b>HXQFN32</b><br>
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157 | <b>NXP - IP4786CZ32S - DIODE, ESD, HDMI TX INTERFACE, SOT1318</b><p>
158 | Source: <a href="http://www.farnell.com/datasheets/1927812.pdf"> Datasheet </a>
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61 | LM2757
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129 | LM2757
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/lbr/PCMFXHDMI2S.lbr:
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--------------------------------------------------------------------------------
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https://raw.githubusercontent.com/yifanlu/ngptv/8f7097e1a655ece25f2d31b8d37e8f23af020277/lbr/QSH-030-01-X-D-A.lbr
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/lbr/SN75DPHY440SS.lbr:
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/lbr/SiT8021.lbr:
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/lbr/TFM-105-01-XXX-D-RA.lbr:
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61 | 0.050"X0.050" TERMINAL STRIP.
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118 | 0.050"X0.050" TERMINAL STRIP.
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--------------------------------------------------------------------------------
/lbr/Texas Instruments_By_element14_Batch_1-readme.txt:
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https://raw.githubusercontent.com/yifanlu/ngptv/8f7097e1a655ece25f2d31b8d37e8f23af020277/lbr/Texas Instruments_By_element14_Batch_1-readme.txt
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/lbr/microbuilder-license.txt:
--------------------------------------------------------------------------------
1 | This library was produced by microBuilder.eu and is placed in the public domain, subject to the following restrictions:
2 |
3 | THIS SOFTWARE IS PROVIDED ''AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
4 |
--------------------------------------------------------------------------------
/lbr/zx62d-b-5pa8-oshpark_10.lbr:
--------------------------------------------------------------------------------
1 |
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58 |
59 |
60 |
61 |
62 | <b>Hirose ZX62D-B-5PA8 Connector</b><br>
63 | ( OSH Park compatible library)<br>
64 | <br>
65 | © 2015 Samuel Lourenço
66 |
67 |
68 | <b>Micro USB Type B Connector</b> - Standard, Shell Through Hole<br>
69 | <br>
70 | Source: <a href="http://www.hirose.co.jp/cataloge_hp/ed_ZX_20140804.pdf">http://www.hirose.co.jp/cataloge_hp/ed_ZX_20140804.pdf</a>
71 |
72 |
73 |
74 |
75 |
76 |
77 |
78 |
79 | >NAME
80 | >VALUE
81 |
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175 |
176 | >NAME
177 | >VALUE
178 |
179 |
180 |
181 |
182 |
183 |
184 |
185 |
186 |
187 |
188 |
189 |
190 |
191 |
192 |
193 |
194 |
195 | >NAME
196 |
197 |
198 |
199 |
200 |
201 |
202 |
203 |
204 | <b>Micro USB Type B Connector</b> - Standard, Shell Through Hole<br>
205 | <br>
206 | Source: <a href="http://www.hirose.co.jp/cataloge_hp/ed_ZX_20140804.pdf">http://www.hirose.co.jp/cataloge_hp/ed_ZX_20140804.pdf</a>
207 |
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235 |
236 |
237 |
238 |
239 |
--------------------------------------------------------------------------------
/ngptv/eagle.epf:
--------------------------------------------------------------------------------
1 | [Eagle]
2 | Version="08 02 02"
3 | Platform="Mac OS X"
4 | Globals="Globals"
5 | Desktop="Desktop"
6 |
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350 | UsedLibrary="/Users/yifanlu/Library/Mobile Documents/com~apple~CloudDocs/Documents/Development/Other/psvideo/lbr/ADV7533BCBZ-RL.lbr"
351 | UsedLibrary="/Users/yifanlu/Library/Mobile Documents/com~apple~CloudDocs/Documents/Development/Other/psvideo/lbr/microbuilder.lbr"
352 | UsedLibrary="/Users/yifanlu/Library/Mobile Documents/com~apple~CloudDocs/Documents/Development/Other/psvideo/lbr/HDMI05-CL02F3.lbr"
353 | UsedLibrary="/Users/yifanlu/Library/Mobile Documents/com~apple~CloudDocs/Documents/Development/Other/psvideo/lbr/LM2757.lbr"
354 | UsedLibrary="/Users/yifanlu/Library/Mobile Documents/com~apple~CloudDocs/Documents/Development/Other/psvideo/lbr/SiT8021.lbr"
355 |
356 | [Win_1]
357 | Type="Control Panel"
358 | Loc="0 -22 1199 577"
359 | State=2
360 | Number=0
361 |
362 | [Win_2]
363 | Type="Schematic Editor"
364 | Loc="0 -22 1199 577"
365 | State=2
366 | Number=1
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371 | PadDrills=" 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.65 0.7 0.75 0.8 0.85 0.9 1 0.6"
372 | ViaDiameters=" 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 0.95 1 1.05 1.1 1.15 1.2 1.3 0"
373 | ViaDrills=" 0.2 0.25 0.3 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 1 0.35"
374 | HoleDrills=" 0.2 0.25 0.3 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 1 0.35"
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384 | WireBend=0
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398 | PinDirection=3
399 | PinFunction=0
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401 | PinVisible=3
402 | SwapLevel=0
403 | ArcDirection=0
404 | AddLevel=2
405 | PadsSameType=0
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408 |
409 | [Desktop]
410 | Screen="4000 1440"
411 | Window="Win_1"
412 | Window="Win_2"
413 |
--------------------------------------------------------------------------------
/ngptv/ngptv-lite-v11-bom.csv:
--------------------------------------------------------------------------------
1 | Part,Value,Device,Package,Description,,
2 | C1,100nf,CERAMIC-100NF-50V-10%-X7R(0603),C0603,302010138,,
3 | C2,100nf,CERAMIC-100NF-50V-10%-X7R(0603),C0603,302010138,,
4 | C3,100nf,CERAMIC-100NF-50V-10%-X7R(0603),C0603,302010138,,
5 | C4,1uf,CERAMIC-1UF-25V-10%-X7R(0603),C0603,302010139,,
6 | C5,1uf,CERAMIC-1UF-25V-10%-X7R(0603),C0603,302010139,,
7 | C6,1uf,CERAMIC-1UF-25V-10%-X7R(0603),C0603,302010139,,
8 | C7,200nF,CERAMIC-220NF-25V-10%-X7R(0603),C0603,302010073,,
9 | C8,100nf,CERAMIC-100NF-50V-10%-X7R(0603),C0603,302010138,,
10 | C9,100nf,CERAMIC-100NF-50V-10%-X7R(0603),C0603,302010138,,
11 | C10,100nf,CERAMIC-100NF-50V-10%-X7R(0603),C0603,302010138,,
12 | D1,BLUE-0603,SMD-LED-CLEAR-BLUE(0603),LED-0603,304090045,,
13 | J1,FTSH-107-XX-XXX-D,FTSH-107-XX-XXX-D,FTSH-107-XX-XXX-D,"0.050X0.050"" CL THROUGH HOLE TERMINAL STRIP ASSEMBLY,14PINS.""",,
14 | J2,FTSH-107-XX-XXX-D,FTSH-107-XX-XXX-D,FTSH-107-XX-XXX-D,"0.050X0.050"" CL THROUGH HOLE TERMINAL STRIP ASSEMBLY,14PINS.""",,
15 | J3,QSH-030-01-X-D-A,QSH-030-01-X-D-A,QSH-030-01-X-D-A,"HIGH SPEED SOCKET STRIP, .5mm PITCH, 60 PINS.",,
16 | J4,,PINHD-2X3/90,2X03/90,PIN HEADER,,
17 | L1,2500R-50MA,SMD-FERRITE-BEAD-2500R-50MA(0603),L0603,303030020,,
18 | R1,2K,SMD-RES-2K-5%-1/10W(0603),R0603,301010298,,
19 | R2,2K,SMD-RES-2K-5%-1/10W(0603),R0603,301010113,,
20 | R3,2K,SMD-RES-2K-5%-1/10W(0603),R0603,301010113,,
21 | R4,200K,SMD-RES-200K-5%-1/10W(0603),R0603,301010212,,
22 | R5,2K,SMD-RES-2K-5%-1/10W(0603),R0603,301010113,,
23 | R6,2K,SMD-RES-2K-5%-1/10W(0603),R0603,301010113,,
24 | U1,AP7312-1833W6-7,AP7312,SOT95P280X145-6N,,,
25 | U2,SN75DPHY440SS,SN75DPHY440SS,RHR0028A_NV,,,
26 | U3,ATTINY24A-SSU,ATTINY24A-SSU,SOIC127P600X175-14N,8-bit Microcontroller with In-System Programmable Flash,,
27 | U4,PCA9306_DCT_8,PCA9306_DCT_8,DCT8,,,
28 | X1,ZX62D-B-5PA8,ZX62D-B-5PA8,ZX62D-B-5PA8,"Micro USB Type B Connector - Standard, Shell Through Hole",,
--------------------------------------------------------------------------------