├── LICENSE ├── fw ├── HSC.BIN ├── fw.bpd ├── hsc.zip ├── vew211.CIS ├── vew211.bpd ├── hsc-orig.bin ├── SIEMENS_CP5511.BIN ├── FMC-98_C56M1_9509_IC3.BIN ├── README.md ├── main.py ├── SIEMENS_CP5511_flags.txt ├── HSC_flags.txt ├── SIEMENS_CP5511_cis.txt ├── FMC-98_C56M1_9509_IC3_cis.txt ├── HSC_cis.txt ├── FMC-98_C56M1_9509_IC3_flags.txt ├── vew211_cis.txt ├── cardinfo.py └── zconfig.py ├── docs ├── ymf289b.pdf ├── cfvew211.rar └── FMC98r_Sch_V3.pdf ├── dos ├── oplclone.zip ├── panas13.lzh ├── ena86r │ ├── ena86r.asm │ ├── ena86r.idb │ ├── ena86r.lzh │ └── io_tstmp.txt ├── opl3ena.txt └── opl3ena.asm ├── devboard ├── fpchp.stl ├── dut_render.png ├── 95622-004LF.pdf ├── fpchp-render.png ├── pcb_bracket.stl ├── devboard-render.png ├── fpchp-assembled.png ├── fp-lib-table ├── 92140-010LF │ ├── 92140-010LF.dcm │ ├── 92140-010LF.lib │ ├── 95622003LF.kicad_mod │ ├── 92140010LF.kicad_mod │ └── 92140-010LF.mod ├── sym-lib-table ├── fpchp.csv ├── fpchp.kicad_prl ├── devboard.kicad_prl ├── fpchp.kicad_pro └── devboard.kicad_pro ├── hp1661c ├── pcmcia.zip ├── listing.jpg ├── timings.jpg └── waveform.jpg ├── pc_card ├── Yamaha │ ├── YMF_YAC.dcm │ └── YMF_YAC.lib ├── TE │ ├── 5146547.pdf │ └── ENG_CVM_5146228-4_O.2d_dxf.zip ├── schematics.pdf ├── pc_card-render.png ├── Hirose │ ├── IC1K-68RD-1.27SF(71).pdf │ ├── IC1K-68RD-1.27SFA(71).pdf │ ├── IC1F-68RD-1.27SF_52.dcm │ ├── IC1F-68RD-1.27SF_52.lib │ └── IC1F-68RD-1.27SF_52.pretty │ │ └── IC1F-68RD-1.27SF(52).kicad_mod ├── TPA152DR │ ├── TPA152DR.dcm │ ├── TPA152DR.lib │ ├── TPA152DR.mod │ └── SOIC127P600X175-8N.kicad_mod ├── sym-lib-table ├── fp-lib-table ├── pc_card.kicad_prl └── Z8601720ASG │ ├── Z8601720ASG.lib │ └── QFP50P1600X1600X160-100N.kicad_mod ├── win9x ├── infedit.exe ├── sysprop.gif ├── sysprop-int.gif ├── sysprop-res.gif ├── readme.txt └── pccard.inf ├── .gitignore ├── gal ├── devboard.pld ├── Makefile └── devboard.jed ├── example.txt ├── README.md └── cern_ohl_s_v2.txt /LICENSE: -------------------------------------------------------------------------------- 1 | cern_ohl_s_v2.txt -------------------------------------------------------------------------------- /fw/HSC.BIN: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/yottatsa/card_barker/HEAD/fw/HSC.BIN -------------------------------------------------------------------------------- /fw/fw.bpd: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/yottatsa/card_barker/HEAD/fw/fw.bpd -------------------------------------------------------------------------------- /fw/hsc.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/yottatsa/card_barker/HEAD/fw/hsc.zip -------------------------------------------------------------------------------- /fw/vew211.CIS: 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https://raw.githubusercontent.com/yottatsa/card_barker/HEAD/docs/cfvew211.rar -------------------------------------------------------------------------------- /hp1661c/pcmcia.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/yottatsa/card_barker/HEAD/hp1661c/pcmcia.zip -------------------------------------------------------------------------------- /pc_card/Yamaha/YMF_YAC.dcm: -------------------------------------------------------------------------------- 1 | EESchema-DOCLIB Version 2.0 2 | # 3 | #End Doc Library 4 | -------------------------------------------------------------------------------- /win9x/infedit.exe: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/yottatsa/card_barker/HEAD/win9x/infedit.exe -------------------------------------------------------------------------------- /win9x/sysprop.gif: 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*.stp 11 | *.step 12 | *.CIS 13 | 14 | gal/GALasm 15 | -------------------------------------------------------------------------------- /pc_card/TPA152DR/TPA152DR.dcm: -------------------------------------------------------------------------------- 1 | EESchema-DOCLIB Version 2.0 2 | # 3 | $CMP TPA152DR 4 | D Hi-Fi, Stereo Headphone Audio Amplifier 5 | K 6 | F http://www.ti.com/lit/gpn/tpa152 7 | $ENDCMP 8 | # 9 | #End Doc Library 10 | -------------------------------------------------------------------------------- /pc_card/Hirose/IC1F-68RD-1.27SF_52.dcm: -------------------------------------------------------------------------------- 1 | EESchema-DOCLIB Version 2.0 2 | # 3 | $CMP IC1F-68RD-1.27SF(52) 4 | F https://www.mouser.co.uk/datasheet/2/185/hirose_electric_hiros11303-1-1735566.pdf 5 | $ENDCMP 6 | # 7 | #End Doc Library 8 | -------------------------------------------------------------------------------- /devboard/fp-lib-table: -------------------------------------------------------------------------------- 1 | (fp_lib_table 2 | (lib (name 92140-010LF)(type Legacy)(uri ${KIPRJMOD}/../Amphenol/92140-010LF.mod)(options "")(descr "")(disabled)) 3 | (lib (name Amphenol)(type KiCad)(uri ${KIPRJMOD}/../Amphenol)(options "")(descr "")) 4 | ) 5 | -------------------------------------------------------------------------------- /devboard/92140-010LF/92140-010LF.dcm: -------------------------------------------------------------------------------- 1 | EESchema-DOCLIB Version 2.0 2 | # 3 | $CMP 92140-010LF 4 | D Header, Top Mount, S/D(68Pins), R/A, 5V, 4mm s/o 5 | K 6 | F https://cdn.amphenol-icc.com/media/wysiwyg/files/drawing/92140.pdf 7 | $ENDCMP 8 | # 9 | #End Doc Library 10 | -------------------------------------------------------------------------------- /gal/devboard.pld: -------------------------------------------------------------------------------- 1 | GAL16V8 ; 2 | devboard ; 3 | 4 | Clock REG RESET IREQ IOWR IORD OE CE1 CE2 GND 5 | NC L K NC WE NC NC M J VCC 6 | ; CD1 CD2 7 | 8 | 9 | J = CE1 * CE2 + RESET 10 | K = IOWR * IORD * OE + RESET 11 | L = REG 12 | M = RESET 13 | 14 | 15 | DESCRIPTION 16 | -------------------------------------------------------------------------------- /fw/README.md: -------------------------------------------------------------------------------- 1 | # Firmware misc 2 | 3 | ## `main.py` and `fw.bpd` 4 | Fully generated driver 5 | 6 | ## `vew211*` 7 | 8 | CIS dump for Panasonic Sound Card CF-VEW211. 9 | 10 | ## `hsc.zip` 11 | 12 | 3rd-party software that includes `BURNER.EXE`, utility to program the 93C56 EEPROM in-situ. Note that it should be run without Card Services running. 13 | -------------------------------------------------------------------------------- /gal/Makefile: -------------------------------------------------------------------------------- 1 | sources = devboard.pld 2 | 3 | all: $(sources:.pld=.jed) 4 | @ls -lh "$^" 5 | 6 | GALasm: 7 | git submodule update $@ 8 | 9 | GALasm/src/galasm: GALasm 10 | make -C GALasm/src galasm 11 | 12 | %.jed: %.pld GALasm/src/galasm Makefile 13 | GALasm/src/galasm -v $< 14 | 15 | clean: 16 | rm -f $(sources:.pld=.jed) 17 | 18 | .PHONY: all clean 19 | -------------------------------------------------------------------------------- /devboard/sym-lib-table: -------------------------------------------------------------------------------- 1 | (sym_lib_table 2 | (version 7) 3 | (lib (name "92140-010LF")(type "Legacy")(uri "${KIPRJMOD}/../Amphenol/92140-010LF.lib")(options "")(descr "")) 4 | (lib (name "IC1F-68RD-1.27SF_52")(type "Legacy")(uri "${KIPRJMOD}/../Hirose/IC1F-68RD-1.27SF_52.lib")(options "")(descr "")) 5 | (lib (name "devboard-rescue")(type "KiCad")(uri "${KIPRJMOD}/devboard-rescue.kicad_sym")(options "")(descr "")) 6 | ) 7 | -------------------------------------------------------------------------------- /win9x/readme.txt: -------------------------------------------------------------------------------- 1 | pccard.inf 2 | ========== 3 | 4 | This is a sample driver that should work with Panasonic CF-VEW211 card (see ../fw/vew211*) and generated driver (../fw/fw.bpd). The driver is generated using INF File Editor based on MSDN Library April 2000, https://library.thedatadungeon.com/msdn-2000-04/win95ddk/devdoc/live/win98ddk/devinst_12yd.htm and Windows 95 DDK docs/pnp.doc, https://archive.org/download/ms-win95-ddk. 5 | 6 | todo 7 | ---- 8 | - figure out overrides, https://library.thedatadungeon.com/msdn-2000-04/win95ddk/devdoc/live/win98ddk/pnp_0hti.htm 9 | - check if LogConfig is needed 10 | -------------------------------------------------------------------------------- /pc_card/sym-lib-table: -------------------------------------------------------------------------------- 1 | (sym_lib_table 2 | (version 7) 3 | (lib (name "IC1F-68RD-1.27SF_52")(type "Legacy")(uri "${KIPRJMOD}/Hirose/IC1F-68RD-1.27SF_52.lib")(options "")(descr "")) 4 | (lib (name "YMF_YAC")(type "Legacy")(uri "${KIPRJMOD}/Yamaha/YMF_YAC.lib")(options "")(descr "")) 5 | (lib (name "Z8601720ASG")(type "Legacy")(uri "${KIPRJMOD}/Z8601720ASG/Z8601720ASG.lib")(options "")(descr "")) 6 | (lib (name "TPA152DR")(type "Legacy")(uri "${KIPRJMOD}/TPA152DR/TPA152DR.lib")(options "")(descr "")) 7 | (lib (name "pc_card_sound_barker-rescue")(type "KiCad")(uri "${KIPRJMOD}/pc_card_sound_barker-rescue.kicad_sym")(options "")(descr "")) 8 | ) 9 | -------------------------------------------------------------------------------- /gal/devboard.jed: -------------------------------------------------------------------------------- 1 |  2 | Used Program: GALasm 2.1 3 | GAL-Assembler: GALasm 2.1 4 | Device: GAL16V8 5 | 6 | *F0 7 | *G0 8 | *QF2194 9 | *L0000 11111111111111111111111101110111 10 | *L0032 11110111111111111111111111111111 11 | *L0256 11110111111111111111111111111111 12 | *L1536 11111111111101110111011111111111 13 | *L1568 11110111111111111111111111111111 14 | *L1792 01111111111111111111111111111111 15 | *L2048 11000011 16 | *L2056 0110010001100101011101100110001001101111011000010111001001100100 17 | *L2120 00000000 18 | *L2128 1111111111111111111111111111111111111111111111111111111111111111 19 | *L2192 1 20 | *L2193 0 21 | *C23b1 22 | * 23 | 6b92 24 | -------------------------------------------------------------------------------- /pc_card/fp-lib-table: -------------------------------------------------------------------------------- 1 | (fp_lib_table 2 | (version 7) 3 | (lib (name "Yamaha")(type "KiCad")(uri "${KIPRJMOD}/Yamaha")(options "")(descr "")) 4 | (lib (name "Z8601720ASG")(type "KiCad")(uri "${KIPRJMOD}/Z8601720ASG")(options "")(descr "")) 5 | (lib (name "IC1F-68RD-1.27SF_52")(type "KiCad")(uri "${KIPRJMOD}/Hirose/IC1F-68RD-1.27SF_52.pretty")(options "")(descr "")) 6 | (lib (name "TPA152DR")(type "Legacy")(uri "${KIPRJMOD}/TPA152DR/TPA152DR.mod")(options "")(descr "")) 7 | (lib (name "fixtures")(type "KiCad")(uri "${KIPRJMOD}/fixtures.pretty")(options "")(descr "")) 8 | (lib (name "SJ1-2533-SMT-TR")(type "KiCad")(uri "${KIPRJMOD}/SJ1-2533-SMT-TR")(options "")(descr "")) 9 | ) 10 | -------------------------------------------------------------------------------- /devboard/fpchp.csv: -------------------------------------------------------------------------------- 1 | "Id";"Designator";"Footprint";"Quantity";"Designation";"Supplier and ref"; 2 | 1;"C15,C9,C7,C16,C5,C12,C8,C11,C2,C4,C10,C18,C3,C17,C14,C1,C13,C6";"C_0402_1005Metric";18;"8.2pF 0402 SMD Capacitor";;; 3 | 2;"R24,R8,R19,R28,R32,R20,R12,R3,R16,R4,R7,R15,R27,R23,R11,R36,R31,R35";"R_0402_1005Metric";18;"249.0Ω 0402 SMD Resistor";;; 4 | 3;"J1";"Hirose_FH12-40S-0.5SH_1x40-1MP_P0.50mm_Horizontal";1;"Hirose Electric Co Ltd FH12A-40S-0.5SH(55)";;; 5 | 4;"R30,R17,R14,R9,R34,R29,R25,R22,R6,R18,R26,R5,R13,R33,R2,R21,R1,R10";"R_0402_1005Metric";18;"90.9kΩ 0402 SMD Resistor";;; 6 | 5;"C22,C19,C21,C20";"C_1206_3216Metric_Pad1.33x1.80mm_HandSolder";4;"1.0µF, 1206 SMD Capacitor";;; 7 | 6;"CP2,CP1";"CP_EIA-7343-31_Kemet-D";2;"593D106X9035D2TE3 or other 10uF Electrolytic 16V or higher";;; 8 | -------------------------------------------------------------------------------- /win9x/pccard.inf: -------------------------------------------------------------------------------- 1 | 2 | [Version] 3 | Signature=$CHICAGO$ 4 | Class=MultiFunction 5 | Provider=%String0% 6 | 7 | [ClassInstall] 8 | 9 | [DestinationDirs] 10 | DefaultDestDir=10 11 | 12 | [Manufacturer] 13 | %String1%=SECTION_0 14 | 15 | [SECTION_0] 16 | %String2%=TGOPL3.Install,PCMCIA\MATSUSHITA_ELECTRIC_INDUSTRIAL_CO.__LTD.-PANASONIC_SOUND_CARD-1E74 17 | %String3%=TGOPL3.Install,PCMCIA\TILDE.GAY-OPL3-CFA0 18 | 19 | [TGOPL3.Install] 20 | LogConfig=TGOPL3_DEFAULT 21 | 22 | [TGOPL3_DEFAULT] 23 | ConfigPriority=NORMAL 24 | IOConfig=388-38b(3ff::) 25 | 26 | [ControlFlags] 27 | 28 | [SourceDisksNames] 29 | 1=TGOPL3DriverDisk,TGOPL3,0000-0000 30 | 31 | [SourceDisksFiles] 32 | 33 | [Strings] 34 | String0="tilde.gay" 35 | String1="tilde.gay" 36 | String2="Panasonic CF-VEW211 passthru" 37 | String3="Card Barker OPL3" 38 | -------------------------------------------------------------------------------- /fw/main.py: -------------------------------------------------------------------------------- 1 | import itertools 2 | from enum import Flag, Enum 3 | 4 | from zconfig import ZilogConfig 5 | from cardinfo import gen_cis 6 | 7 | 8 | if __name__ == "__main__": 9 | zc = ZilogConfig() 10 | zc.pprint() 11 | config = zc.config 12 | cis = gen_cis() 13 | for tpl in cis: 14 | print(tpl) 15 | nibbles = ["%02X" % i for i in tpl] 16 | print(" ".join(nibbles[:2])) 17 | print(" ".join(nibbles[2:])) 18 | cis = list(itertools.chain(*cis)) 19 | #with open("vew211.CIS", "rb") as f: 20 | # cis = list(f.read())[0:208] 21 | print(len(cis), cis) 22 | padding = [0xff] * (208 - len(cis)) 23 | with open("fw.bpd", "wb+") as f: 24 | for val in config + cis + padding: 25 | if isinstance(val, Flag) or isinstance(val, Enum): 26 | b = val.value 27 | else: 28 | b = val 29 | f.write(bytes([b])) 30 | -------------------------------------------------------------------------------- /example.txt: -------------------------------------------------------------------------------- 1 | Memory dump 2 | 3 | .......C..\x7f...>.!.......3Com.Megahertz\x7f589E.TP/BNC\x7fLAN\x7fPC\x7fCard. 4 | 005.........\x7f..A.>qU5UT`r]d0\x7f\x7f....\x7f....qU&&..............s 5 | 6 | Python structure 7 | 8 | >>> ['', '', '', '', '', '', '', 'C', '', '', '\x7f', '', '', '', '>', '', '!', '', '', '.', '', '.', '', '', '3', 'C', 'o', 'm', '', 'M', 'e', 'g', 'a', 'h', 'e', 'r', 't', 'z', '\x7f', '5', '8', '9', 'E', '', 'T', 'P', '/', 'B', 'N', 'C', '\x7f', 'L', 'A', 'N', '\x7f', 'P', 'C', '\x7f', 'C', 'a', 'r', 'd', '', '0', '0', '5', '', '', '', '', '', '', '', '', '', '\x7f', '', '', 'A', '', '>', 'q', 'U', '5', 'U', 'T', '`', 'r', ']', 'd', '0', '\x7f', '\x7f', '', '', '', '', '\x7f', '', '', '', '', 'q', 'U', '&', '&', '', '', '', '', '', '', '', '', '', '', '', '', '', '', 's'] 9 | -------------------------------------------------------------------------------- /dos/opl3ena.txt: -------------------------------------------------------------------------------- 1 | grep PCMCIA opl3ena.asm -A 1 | grep ';' 2 | mov ax, 270h ; PCMCIA reg 02 val 70: card power on 3 | mov ax, 320h ; PCMCIA reg 03 val 20: io card 4 | mov ax, 360h ; PCMCIA reg 03 val 60: io card & reset 5 | mov ax, 2F0h ; PCMCIA reg 02 val F0: 6 | mov ax, 10E0h ; PCMCIA reg 10 val E0: 7 | mov ax, 1100h ; PCMCIA reg 11 val 00 8 | ; mem window 0 mapped to E0000h 9 | mov ax, 12E0h ; PCMCIA reg 12 val E0 10 | mov ax, 1300h ; PCMCIA reg 13 val 00 11 | ; mem window 0 end is E0000h + 4096 = E1000h 12 | mov ax, 1400h ; PCMCIA reg 14 val 00 13 | mov ax, 1540h ; PCMCIA reg 15 val 40: accessing attrib memory 14 | mov ax, 601h ; PCMCIA reg 06 val 01: mem window 0 enable 15 | mov ax, 888h ; PCMCIA reg 08 val 88 16 | mov ax, 903h ; PCMCIA reg 09 val 03 17 | ; io window 0 is 388h 18 | mov ax, 0A8Bh ; PCMCIA reg 0A val 8B 19 | mov ax, 0B03h ; PCMCIA reg 0B val 03 20 | ; io window 0 ends at 38Bh 21 | mov ax, 0C60h ; PCMCIA reg 0C val 60 22 | mov ax, 0DA4h ; PCMCIA reg 0D val A4 23 | mov ax, 0E6Eh ; PCMCIA reg 0E val 6E 24 | mov ax, 0FA4h ; PCMCIA reg 0F val A4 25 | ; io window 1 A460-A46E 26 | mov ax, 700h ; PCMCIA reg 07 val 0 27 | ; configure io to 8bit and wait-state 28 | mov ax, 6C0h ; PCMCIA reg 06 val C0: enable both io windows 29 | -------------------------------------------------------------------------------- /pc_card/TPA152DR/TPA152DR.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 2 | #encoding utf-8 3 | #SamacSys ECAD Model TPA152DR 4 | #/744970/601420/2.49/8/3/Integrated Circuit 5 | DEF TPA152DR IC 0 30 Y Y 1 F N 6 | F0 "IC" 1050 300 50 H V L CNN 7 | F1 "TPA152DR" 1050 200 50 H V L CNN 8 | F2 "SOIC127P600X175-8N" 1050 100 50 H I L CNN 9 | F3 "http://www.ti.com/lit/gpn/tpa152" 1050 0 50 H I L CNN 10 | F4 "Hi-Fi, Stereo Headphone Audio Amplifier" 1050 -100 50 H I L CNN "Description" 11 | F5 "1.75" 1050 -200 50 H I L CNN "Height" 12 | F6 "595-TPA152DR" 1050 -300 50 H I L CNN "Mouser Part Number" 13 | F7 "https://www.mouser.co.uk/ProductDetail/Texas-Instruments/TPA152DR?qs=ojKcPFmCWSUlM1ssE4%252BjWg%3D%3D" 1050 -400 50 H I L CNN "Mouser Price/Stock" 14 | F8 "Texas Instruments" 1050 -500 50 H I L CNN "Manufacturer_Name" 15 | F9 "TPA152DR" 1050 -600 50 H I L CNN "Manufacturer_Part_Number" 16 | DRAW 17 | X VO1 1 0 0 200 R 50 50 0 0 P 18 | X MUTE 2 0 -100 200 R 50 50 0 0 P 19 | X BYPASS 3 0 -200 200 R 50 50 0 0 P 20 | X IN2- 4 0 -300 200 R 50 50 0 0 P 21 | X IN1- 8 1200 0 200 L 50 50 0 0 P 22 | X GND 7 1200 -100 200 L 50 50 0 0 P 23 | X VDD 6 1200 -200 200 L 50 50 0 0 P 24 | X VO2 5 1200 -300 200 L 50 50 0 0 P 25 | P 5 0 1 6 200 100 1000 100 1000 -400 200 -400 200 100 N 26 | ENDDRAW 27 | ENDDEF 28 | # 29 | #End Library 30 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # Card Barker OPL3 Sound Card 2 | 3 | *WARNING: this project has manufacturability issues: Zilog and two Yamaha chips are virtually unobtainable* 4 | 5 | * PCMCIA interface: [Zilog Z86017/Z16017](https://www.zilog.com/index.php?option=com_product&Itemid=26&task=docs&businessLine=&parent_id=139&familyId=13&productId=Z86017) 6 | * OPL3: Yamaha YMF289B-S and YAC516-E 7 | * Amp: [Texas Instruments TPA152DR](http://www.ti.com/lit/gpn/tpa152) 8 | 9 | Project status: devboard is working, card hw rev 2 is working, card hw rev 3 goes thru small reDfM. 10 | 11 | ## How to run 12 | 13 | 1. After assembly, upload `fw/vew211.bpd` using `fw/hsc.zip/burner.exe`; 14 | 2. Enable using `dos/panas13.lzh/panasnd.exe`, it should start responding on `0x0388-0x038b`; 15 | 3. Run `dos/oplclone.zip/oplclone.exe`, it should produce ~460Hz sine. 16 | 4. Under Windows 95 and 98, `win9x` contains the proto-driver that only enables the port. 17 | 18 | ## PCBs 19 | ![Card](https://raw.githubusercontent.com/yottatsa/card_barker/main/pc_card/pc_card-render.png) 20 | ![devboard](https://github.com/yottatsa/card_barker/raw/main/devboard/devboard-render.png) 21 | ![pod adapter](https://github.com/yottatsa/card_barker/raw/main/devboard/fpchp-assembled.png) 22 | 23 | ## Related projects 24 | 25 | * [FMC-98 reverse engineering](https://github.com/AL-255/A2P1) 26 | 27 | ## License 28 | 29 | Code, designs, and original research: CERN Open Hardware Licence Version 2 - Strongly Reciprocal 30 | Supporting materials: fair use (archived to be protected from bitrot) 31 | -------------------------------------------------------------------------------- /fw/SIEMENS_CP5511_flags.txt: -------------------------------------------------------------------------------- 1 | SIEMENS_CP5511.BIN (compared with FMC-98_C56M1_9509_IC3.BIN) 2 | 00h: 3Ah ICR0.EN_CTR_IRQ|EN_RDY_BSY|EN_OVERIDE3|CLOCK1 (ICR0.EN_ATA_BHE|EN_CTR_IRQ|EN_RDY_BSY|EN_OVERIDE3|CLOCK_IN|CLOCK1|CLOCK0) 3 | 01h: 00h IER.UNSET 4 | 02h: 00h ICR1.UNSET (ICR1.EN_SPKR) 5 | 03h: 07h ICR2.EN_ATT_MODE|EN_INDP_MODE|EN_MEM_MODE (ICR2.EN_ATT_MODE|EN_INDP_MODE) 6 | 04h: 00h ICR3.UNSET 7 | 05h: 20h CCRBaseAddress.EN_CRR_A9 8 | 06h: 00h EEPROM.RO 9 | 07h: 00h EEPROM.RO 10 | 08h: 00h EEPROM.RO 11 | 09h: 00h EEPROM.RO 12 | 0Ah: 00h CCR0.UNSET 13 | 0Bh: 00h CCR1.UNSET 14 | 0Ch: 00h CCR2.UNSET 15 | 0Dh: 00h CCR3.UNSET 16 | 0Eh: 00h Special.RESERVED 17 | 0Fh: 00h Special.RESERVED 18 | 10h: 02h W1CR.EN_PAC1_MEM (W1CR.X7T|NRWAIT7|NRWAIT6|EN_PAC1_ADDR_COMP) 19 | 11h: 00h (88h) 20 | 12h: 00h W1SRAM.UNSET (W1SRAM.B8) 21 | 13h: 00h (08h) 22 | 14h: 01h W2CR.DIS_PAC2 23 | 15h: 00h 24 | 16h: 00h W2SRAM.UNSET 25 | 17h: 00h 26 | 18h: 01h W3CR.DIS_PAC3 27 | 19h: 00h 28 | 1Ah: 00h W3SRAM.UNSET 29 | 1Bh: 00h 30 | 1Ch: 00h Special.RESERVED 31 | 1Dh: 00h Special.RESERVED 32 | 1Eh: 1Ch EEPROM.VALID 33 | 1Fh: 00h CCR4.UNSET 34 | 20h: 00h EEPROM.RO 35 | 21h: 00h EEPROM.RO 36 | 22h: 00h EEPROM.RO 37 | 23h: 10h RevisionControl.BA 38 | 24h: 00h 39 | 25h: 00h Special.RESERVED 40 | 26h: 00h 41 | 27h: 00h 42 | 28h: 00h DDCR.UNSET 43 | 29h: 00h Special.RESERVED 44 | 2Ah: 00h 45 | 2Bh: 00h PMCR.UNSET (PMCR.EN_8BIT_MODE) 46 | 2Ch: 00h ICR4.UNSET (ICR4.TSTCLK0_B1) 47 | 2Dh: 00h CICR1.UNSET 48 | 2Eh: 00h CICR2.UNSET (CICR2.EN_IO_INDP_INDX|IO_INDP_INDX4|EN_MEM_INDX) 49 | 2Fh: 00h BCR2.UNSET (BCR2.EN_DIV_ADDR) 50 | -------------------------------------------------------------------------------- /fw/HSC_flags.txt: -------------------------------------------------------------------------------- 1 | hsc-cis.bin 2 | 00h: 1Ah ICR0.EN_RDY_BSY|EN_OVERIDE3|CLOCK1 (ICR0.EN_ATA_BHE|EN_CTR_IRQ|EN_RDY_BSY|EN_OVERIDE3|CLOCK_IN|CLOCK1|CLOCK0) 3 | 01h: 00h IER.UNSET 4 | 02h: 00h ICR1.UNSET (ICR1.EN_SPKR) 5 | 03h: 05h ICR2.EN_ATT_MODE|EN_MEM_MODE (ICR2.PCMCIA_IO8) 6 | 04h: 00h ICR3.UNSET 7 | 05h: 20h CCRBaseAddress.EN_CRR_A9 8 | 06h: 00h EEPROM.RO 9 | 07h: 00h EEPROM.RO 10 | 08h: 00h EEPROM.RO 11 | 09h: 00h EEPROM.RO 12 | 0Ah: 00h CCR0.UNSET 13 | 0Bh: 00h CCR1.UNSET 14 | 0Ch: 00h CCR2.UNSET 15 | 0Dh: 00h CCR3.UNSET 16 | 0Eh: 00h Special.RESERVED 17 | 0Fh: 00h Special.RESERVED 18 | 10h: 16h W1CR.EN_PAC1_ADDR_COMP|EN_PAC1_16|EN_PAC1_MEM (W1CR.X7T|NRWAIT7|NRWAIT6|EN_PAC1_ADDR_COMP) 19 | 11h: 00h (88h) 20 | 12h: 00h W1SRAM.UNSET (W1SRAM.B8) 21 | 13h: 07h (08h) 22 | 14h: 32h W2CR.EN_PAC2_HCS|EN_PAC2_ADDR_COMP|EN_PAC2_MEM (W2CR.DIS_PAC2) 23 | 15h: 10h (00h) 24 | 16h: 00h W2SRAM.UNSET 25 | 17h: 07h (00h) 26 | 18h: 01h W3CR.DIS_PAC3 27 | 19h: 00h 28 | 1Ah: 00h W3SRAM.UNSET 29 | 1Bh: 00h 30 | 1Ch: 00h Special.RESERVED 31 | 1Dh: 00h Special.RESERVED 32 | 1Eh: 1Ch EEPROM.VALID 33 | 1Fh: 00h CCR4.UNSET 34 | 20h: 00h EEPROM.RO 35 | 21h: 00h EEPROM.RO 36 | 22h: 00h EEPROM.RO 37 | 23h: 00h RevisionControl.UNSET (RevisionControl.BA) 38 | 24h: 00h 39 | 25h: 00h Special.RESERVED 40 | 26h: 00h 41 | 27h: 00h 42 | 28h: 00h DDCR.UNSET 43 | 29h: 00h Special.RESERVED 44 | 2Ah: 00h 45 | 2Bh: 00h PMCR.UNSET (PMCR.EN_8BIT_MODE) 46 | 2Ch: 00h ICR4.UNSET (ICR4.TSTCLK0_B1) 47 | 2Dh: 00h CICR1.UNSET 48 | 2Eh: 00h CICR2.UNSET (CICR2.EN_IO_INDP_INDX|IO_INDP_INDX4|EN_MEM_INDX) 49 | 2Fh: 00h BCR2.UNSET (BCR2.EN_DIV_ADDR) 50 | -------------------------------------------------------------------------------- /fw/SIEMENS_CP5511_cis.txt: -------------------------------------------------------------------------------- 1 | offset 0x02, tuple 0x01, link 0x03 2 | d1 0c ff 3 | dev_info 4 | fn_specific 250ns, 256kb 5 | 6 | offset 0x07, tuple 0x00, link 0x17 7 | 03 69 00 ff 00 20 04 c1 00 02 00 21 02 06 00 15 8 | 29 04 01 53 49 45 4d 9 | parse error: Success 10 | 11 | offset 0x20, tuple 0x45, link 0x4e 12 | 53 00 43 50 20 35 35 31 31 00 53 49 4e 45 43 20 13 | 4c 32 00 41 55 54 20 39 33 33 20 20 20 20 20 00 14 | ff 1a 06 02 01 00 02 00 1f 1b 0b e0 81 15 01 55 15 | e0 33 0e 30 24 9e 1b 0b 20 60 f0 00 04 00 00 00 16 | 00 f8 ff 00 00 1b 0b 21 60 f0 00 04 00 00 17 | parse error: Success 18 | 19 | offset 0x70, tuple 0x00, link 0x00 20 | parse error: Success 21 | 22 | offset 0x72, tuple 0xf0, link 0xff 23 | 00 00 1b 09 22 60 d0 00 04 00 00 00 f8 1b 09 23 24 | 60 d0 00 04 00 00 00 f0 1b 04 24 20 00 04 1b 04 25 | 25 20 00 01 1b 04 26 20 80 00 1b 04 27 20 40 00 26 | 1b 04 28 20 20 00 14 00 ff ff ff ff ff ff ff ff 27 | ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 28 | ff ff ff ff ff ff ff ff ff ff ff ff ff ff 00 00 29 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 31 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 32 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 33 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 34 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 35 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 36 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 37 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 38 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 39 | parse error: Success 40 | 41 | -------------------------------------------------------------------------------- /devboard/fpchp.kicad_prl: -------------------------------------------------------------------------------- 1 | { 2 | "board": { 3 | "active_layer": 0, 4 | "active_layer_preset": "", 5 | "auto_track_width": true, 6 | "hidden_netclasses": [], 7 | "hidden_nets": [], 8 | "high_contrast_mode": 1, 9 | "net_color_mode": 1, 10 | "opacity": { 11 | "images": 0.6, 12 | "pads": 1.0, 13 | "tracks": 1.0, 14 | "vias": 1.0, 15 | "zones": 0.6 16 | }, 17 | "selection_filter": { 18 | "dimensions": true, 19 | "footprints": true, 20 | "graphics": true, 21 | "keepouts": true, 22 | "lockedItems": false, 23 | "otherItems": true, 24 | "pads": true, 25 | "text": true, 26 | "tracks": true, 27 | "vias": true, 28 | "zones": true 29 | }, 30 | "visible_items": [ 31 | 0, 32 | 1, 33 | 2, 34 | 3, 35 | 4, 36 | 5, 37 | 8, 38 | 9, 39 | 10, 40 | 11, 41 | 12, 42 | 13, 43 | 15, 44 | 16, 45 | 17, 46 | 18, 47 | 19, 48 | 20, 49 | 21, 50 | 22, 51 | 23, 52 | 24, 53 | 25, 54 | 26, 55 | 27, 56 | 28, 57 | 29, 58 | 30, 59 | 32, 60 | 33, 61 | 34, 62 | 35, 63 | 36, 64 | 39, 65 | 40 66 | ], 67 | "visible_layers": "ffeffff_ffffffff", 68 | "zone_display_mode": 1 69 | }, 70 | "git": { 71 | "repo_password": "", 72 | "repo_type": "", 73 | "repo_username": "", 74 | "ssh_key": "" 75 | }, 76 | "meta": { 77 | "filename": "fpchp.kicad_prl", 78 | "version": 3 79 | }, 80 | "project": { 81 | "files": [] 82 | } 83 | } 84 | -------------------------------------------------------------------------------- /pc_card/pc_card.kicad_prl: -------------------------------------------------------------------------------- 1 | { 2 | "board": { 3 | "active_layer": 0, 4 | "active_layer_preset": "", 5 | "auto_track_width": true, 6 | "hidden_netclasses": [], 7 | "hidden_nets": [], 8 | "high_contrast_mode": 1, 9 | "net_color_mode": 1, 10 | "opacity": { 11 | "images": 0.6, 12 | "pads": 1.0, 13 | "tracks": 1.0, 14 | "vias": 1.0, 15 | "zones": 0.6 16 | }, 17 | "selection_filter": { 18 | "dimensions": true, 19 | "footprints": true, 20 | "graphics": true, 21 | "keepouts": true, 22 | "lockedItems": false, 23 | "otherItems": true, 24 | "pads": true, 25 | "text": true, 26 | "tracks": true, 27 | "vias": true, 28 | "zones": true 29 | }, 30 | "visible_items": [ 31 | 0, 32 | 1, 33 | 2, 34 | 3, 35 | 4, 36 | 5, 37 | 6, 38 | 8, 39 | 9, 40 | 10, 41 | 11, 42 | 12, 43 | 13, 44 | 14, 45 | 15, 46 | 16, 47 | 17, 48 | 18, 49 | 19, 50 | 20, 51 | 21, 52 | 22, 53 | 23, 54 | 24, 55 | 25, 56 | 26, 57 | 27, 58 | 28, 59 | 29, 60 | 30, 61 | 32, 62 | 33, 63 | 34, 64 | 35, 65 | 36, 66 | 39, 67 | 40 68 | ], 69 | "visible_layers": "fffffff_ffffffff", 70 | "zone_display_mode": 0 71 | }, 72 | "git": { 73 | "repo_password": "", 74 | "repo_type": "", 75 | "repo_username": "", 76 | "ssh_key": "" 77 | }, 78 | "meta": { 79 | "filename": "pc_card.kicad_prl", 80 | "version": 3 81 | }, 82 | "project": { 83 | "files": [] 84 | } 85 | } 86 | -------------------------------------------------------------------------------- /devboard/devboard.kicad_prl: -------------------------------------------------------------------------------- 1 | { 2 | "board": { 3 | "active_layer": 36, 4 | "active_layer_preset": "", 5 | "auto_track_width": true, 6 | "hidden_netclasses": [], 7 | "hidden_nets": [], 8 | "high_contrast_mode": 1, 9 | "net_color_mode": 1, 10 | "opacity": { 11 | "images": 0.6299999952316284, 12 | "pads": 1.0, 13 | "tracks": 1.0, 14 | "vias": 1.0, 15 | "zones": 0.5899999737739563 16 | }, 17 | "selection_filter": { 18 | "dimensions": true, 19 | "footprints": true, 20 | "graphics": true, 21 | "keepouts": true, 22 | "lockedItems": false, 23 | "otherItems": true, 24 | "pads": true, 25 | "text": true, 26 | "tracks": true, 27 | "vias": true, 28 | "zones": true 29 | }, 30 | "visible_items": [ 31 | 0, 32 | 1, 33 | 2, 34 | 3, 35 | 4, 36 | 5, 37 | 6, 38 | 7, 39 | 8, 40 | 9, 41 | 10, 42 | 11, 43 | 12, 44 | 13, 45 | 14, 46 | 15, 47 | 16, 48 | 17, 49 | 18, 50 | 19, 51 | 20, 52 | 21, 53 | 22, 54 | 23, 55 | 24, 56 | 25, 57 | 26, 58 | 27, 59 | 28, 60 | 29, 61 | 30, 62 | 32, 63 | 33, 64 | 34, 65 | 35, 66 | 36, 67 | 39, 68 | 40 69 | ], 70 | "visible_layers": "fffffff_ffffffff", 71 | "zone_display_mode": 0 72 | }, 73 | "git": { 74 | "repo_password": "", 75 | "repo_type": "", 76 | "repo_username": "", 77 | "ssh_key": "" 78 | }, 79 | "meta": { 80 | "filename": "devboard.kicad_prl", 81 | "version": 3 82 | }, 83 | "project": { 84 | "files": [] 85 | } 86 | } 87 | -------------------------------------------------------------------------------- /fw/FMC-98_C56M1_9509_IC3_cis.txt: -------------------------------------------------------------------------------- 1 | offset 0x02, tuple 0x01, link 0x02 2 | 00 ff 3 | dev_info 4 | no_info 5 | 6 | offset 0x06, tuple 0x17, link 0x03 7 | 49 00 ff 8 | attr_dev_info 9 | EEPROM 250ns, 512b 10 | 11 | offset 0x0b, tuple 0x15, link 0x0e 12 | 04 02 43 54 49 00 46 4d 43 2d 39 38 00 ff 13 | vers_1 4.2, "CTI", "FMC-98" 14 | 15 | offset 0x1b, tuple 0x20, link 0x04 16 | e2 01 00 01 17 | manfid 0x01e2, 0x0100 18 | 19 | offset 0x21, tuple 0x1a, link 0x05 20 | 01 01 00 02 07 21 | config base 0x0200 mask 0x0007 last_index 0x01 22 | 23 | offset 0x28, tuple 0x1b, link 0x0e 24 | c1 c1 99 01 55 b0 60 88 01 07 30 00 10 08 25 | cftable_entry 0x01 [default] 26 | [rdybsy] [mwait] [audio] 27 | Vcc Vnom 5V 28 | io 0x0188-0x018f [lines=16] [8bit] [range] 29 | irq mask 0x1000 [level] 30 | 31 | offset 0x38, tuple 0xff, link 0xff 32 | ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 33 | ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 34 | ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 35 | ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 36 | ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 37 | ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 38 | ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 39 | ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 40 | ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 41 | ff ff ff ff ff ff ff ff 00 00 00 00 00 00 00 00 42 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 43 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 44 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 45 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 46 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 47 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 | parse error: Success 49 | 50 | -------------------------------------------------------------------------------- /fw/HSC_cis.txt: -------------------------------------------------------------------------------- 1 | HSC_cis.txtoffset 0x02, tuple 0x01, link 0x03 2 | d1 01 ff 3 | dev_info 4 | fn_specific 250ns, 2kb 5 | 6 | offset 0x07, tuple 0x15, link 0x3d 7 | 04 01 41 63 63 75 72 69 74 65 20 54 65 63 68 6e 8 | 6f 6c 6f 67 69 65 73 20 49 6e 63 2e 00 48 65 61 9 | 64 73 74 61 72 74 43 61 72 64 00 56 65 72 73 69 10 | 6f 6e 20 31 2e 30 00 31 39 39 35 00 ff 11 | vers_1 4.1, "Accurite Technologies Inc.", "HeadstartCard", "Version 1.0", 12 | "1995" 13 | 14 | offset 0x46, tuple 0x20, link 0x04 15 | 4a 01 00 01 16 | manfid 0x014a, 0x0100 17 | 18 | offset 0x4c, tuple 0x1a, link 0x05 19 | 00 00 00 00 00 20 | config base 0x0000 mask 0x0000 last_index 0x00 21 | 1 bytes in subtuples 22 | 23 | offset 0x53, tuple 0x1b, link 0x09 24 | c0 00 01 00 0f 55 4d 5d 1e 25 | cftable_entry 0x00 [default] 26 | 5 bytes in subtuples 27 | 28 | offset 0x5e, tuple 0x14, link 0x00 29 | no_long_link 30 | 31 | offset 0x60, tuple 0xff, link 0xff 32 | ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 33 | ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 34 | ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 35 | ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 36 | ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 37 | ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 38 | ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 39 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 41 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 42 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 43 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 44 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 45 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 46 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 47 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 | parse error: Success 49 | -------------------------------------------------------------------------------- /pc_card/TPA152DR/TPA152DR.mod: -------------------------------------------------------------------------------- 1 | PCBNEW-LibModule-V1 2021-11-22 01:24:52 2 | # encoding utf-8 3 | Units mm 4 | $INDEX 5 | SOIC127P600X175-8N 6 | $EndINDEX 7 | $MODULE SOIC127P600X175-8N 8 | Po 0 0 0 15 619af164 00000000 ~~ 9 | Li SOIC127P600X175-8N 10 | Cd D0008A_9 11 | Kw Integrated Circuit 12 | Sc 0 13 | At SMD 14 | AR 15 | Op 0 0 0 16 | T0 0 0 1.27 1.27 0 0.254 N V 21 N "IC**" 17 | T1 0 0 1.27 1.27 0 0.254 N I 21 N "SOIC127P600X175-8N" 18 | DS -3.725 -2.75 3.725 -2.75 0.05 24 19 | DS 3.725 -2.75 3.725 2.75 0.05 24 20 | DS 3.725 2.75 -3.725 2.75 0.05 24 21 | DS -3.725 2.75 -3.725 -2.75 0.05 24 22 | DS -1.948 -2.452 1.948 -2.452 0.1 24 23 | DS 1.948 -2.452 1.948 2.452 0.1 24 24 | DS 1.948 2.452 -1.948 2.452 0.1 24 25 | DS -1.948 2.452 -1.948 -2.452 0.1 24 26 | DS -1.948 -1.182 -0.678 -2.452 0.1 24 27 | DS -1.598 -2.452 1.598 -2.452 0.2 21 28 | DS 1.598 -2.452 1.598 2.452 0.2 21 29 | DS 1.598 2.452 -1.598 2.452 0.2 21 30 | DS -1.598 2.452 -1.598 -2.452 0.2 21 31 | DS -3.475 -2.58 -1.948 -2.58 0.2 21 32 | $PAD 33 | Po -2.711 -1.905 34 | Sh "1" R 0.65 1.528 0 0 900 35 | At SMD N 00888000 36 | Ne 0 "" 37 | $EndPAD 38 | $PAD 39 | Po -2.711 -0.635 40 | Sh "2" R 0.65 1.528 0 0 900 41 | At SMD N 00888000 42 | Ne 0 "" 43 | $EndPAD 44 | $PAD 45 | Po -2.711 0.635 46 | Sh "3" R 0.65 1.528 0 0 900 47 | At SMD N 00888000 48 | Ne 0 "" 49 | $EndPAD 50 | $PAD 51 | Po -2.711 1.905 52 | Sh "4" R 0.65 1.528 0 0 900 53 | At SMD N 00888000 54 | Ne 0 "" 55 | $EndPAD 56 | $PAD 57 | Po 2.711 1.905 58 | Sh "5" R 0.65 1.528 0 0 900 59 | At SMD N 00888000 60 | Ne 0 "" 61 | $EndPAD 62 | $PAD 63 | Po 2.711 0.635 64 | Sh "6" R 0.65 1.528 0 0 900 65 | At SMD N 00888000 66 | Ne 0 "" 67 | $EndPAD 68 | $PAD 69 | Po 2.711 -0.635 70 | Sh "7" R 0.65 1.528 0 0 900 71 | At SMD N 00888000 72 | Ne 0 "" 73 | $EndPAD 74 | $PAD 75 | Po 2.711 -1.905 76 | Sh "8" R 0.65 1.528 0 0 900 77 | At SMD N 00888000 78 | Ne 0 "" 79 | $EndPAD 80 | $EndMODULE SOIC127P600X175-8N 81 | $EndLIBRARY 82 | -------------------------------------------------------------------------------- /fw/FMC-98_C56M1_9509_IC3_flags.txt: -------------------------------------------------------------------------------- 1 | FMC-98_C56M1_9509_IC3.BIN 2 | 00h: BBh ICR0.EN_ATA_BHE|EN_CTR_IRQ|EN_RDY_BSY|EN_OVERIDE3|CLOCK_IN|CLOCK1|CLOCK0 3 | 01h: 00h IER.UNSET 4 | 02h: 20h ICR1.EN_SPKR 5 | 03h: 06h ICR2.PCMCIA_IO8 6 | 04h: 00h ICR3.UNSET 7 | 05h: 20h CCRBaseAddress.EN_CRR_A9 8 | 06h: 00h EEPROM.RO 9 | 07h: 00h EEPROM.RO 10 | 08h: 00h EEPROM.RO 11 | 09h: 00h EEPROM.RO 12 | 0Ah: 00h CCR0.UNSET 13 | 0Bh: 00h CCR1.UNSET 14 | 0Ch: 00h CCR2.UNSET 15 | 0Dh: 00h CCR3.UNSET 16 | 0Eh: 00h Special.RESERVED 17 | 0Fh: 00h Special.RESERVED 18 | 10h: D0h W1CR.X7T|NRWAIT7|NRWAIT6|EN_PAC1_ADDR_COMP 19 | 11h: 88h 20 | 12h: 01h W1SRAM.B8 21 | 13h: 08h 22 | 14h: 01h W2CR.DIS_PAC2 23 | 15h: 00h 24 | 16h: 00h W2SRAM.UNSET 25 | 17h: 00h 26 | 18h: 01h W3CR.DIS_PAC3 27 | 19h: 00h 28 | 1Ah: 00h W3SRAM.UNSET 29 | 1Bh: 00h 30 | 1Ch: 00h Special.RESERVED 31 | 1Dh: 00h Special.RESERVED 32 | 1Eh: 1Ch EEPROM.VALID 33 | 1Fh: 00h CCR4.UNSET 34 | 20h: 00h EEPROM.RO 35 | 21h: 00h EEPROM.RO 36 | 22h: 00h EEPROM.RO 37 | 23h: 10h RevisionControl.BA 38 | 24h: 00h 39 | 25h: 00h Special.RESERVED 40 | 26h: 00h 41 | 27h: 00h 42 | 28h: 00h DDCR.UNSET 43 | 29h: 00h Special.RESERVED 44 | 2Ah: 00h 45 | 2Bh: 01h PMCR.EN_8BIT_MODE 46 | 2Ch: 02h ICR4.TSTCLK0_B1 47 | 2Dh: 00h CICR1.UNSET 48 | 2Eh: 98h CICR2.EN_IO_INDP_INDX|IO_INDP_INDX4|EN_MEM_INDX 49 | 2Fh: 04h BCR2.EN_DIV_ADDR 50 | 51 | CISTPL_DEVICE(device_type=) 52 | 01 02 53 | 00 FF 54 | CISTPL_DEVICE_A(device_info=[73, 0]) 55 | 17 03 56 | 49 00 FF 57 | CISTPL_VERS_1(manufacturer=b'CTI', product_name=b'FMC-98', lot_number=b'', additional=b'', major=4, minor=2) 58 | 15 0E 59 | 04 02 43 54 49 00 46 4D 43 2D 39 38 00 FF 60 | CISTPL_MANFID(manufacturer_code=57857, manufacturer_info=1) 61 | 20 04 62 | E2 01 00 01 63 | CISTPL_CONFIG(last_index=1, cr_base_address=512, presence_mask=7) 64 | 1A 05 65 | 01 01 00 02 07 66 | CISTPL_CFTABLE_ENTRY(vcc=(1, 85), vpp1=(), vpp2=(), iospace=(176, 96, 136, 1, 7), irq=(48, 0, 16), membase=(), misc=(8,), cf=[], entry_number=1, default=True, interface=) 67 | 1B 0E 68 | C1 C1 99 01 55 B0 60 88 01 07 30 00 10 08 69 | -------------------------------------------------------------------------------- /pc_card/TPA152DR/SOIC127P600X175-8N.kicad_mod: -------------------------------------------------------------------------------- 1 | (module "SOIC127P600X175-8N" (layer F.Cu) 2 | (descr "D0008A_9") 3 | (tags "Integrated Circuit") 4 | (attr smd) 5 | (fp_text reference IC** (at 0 0) (layer F.SilkS) 6 | (effects (font (size 1.27 1.27) (thickness 0.254))) 7 | ) 8 | (fp_text user %R (at 0 0) (layer F.Fab) 9 | (effects (font (size 1.27 1.27) (thickness 0.254))) 10 | ) 11 | (fp_text value "SOIC127P600X175-8N" (at 0 0) (layer F.SilkS) hide 12 | (effects (font (size 1.27 1.27) (thickness 0.254))) 13 | ) 14 | (fp_line (start -3.725 -2.75) (end 3.725 -2.75) (layer F.CrtYd) (width 0.05)) 15 | (fp_line (start 3.725 -2.75) (end 3.725 2.75) (layer F.CrtYd) (width 0.05)) 16 | (fp_line (start 3.725 2.75) (end -3.725 2.75) (layer F.CrtYd) (width 0.05)) 17 | (fp_line (start -3.725 2.75) (end -3.725 -2.75) (layer F.CrtYd) (width 0.05)) 18 | (fp_line (start -1.948 -2.452) (end 1.948 -2.452) (layer F.Fab) (width 0.1)) 19 | (fp_line (start 1.948 -2.452) (end 1.948 2.452) (layer F.Fab) (width 0.1)) 20 | (fp_line (start 1.948 2.452) (end -1.948 2.452) (layer F.Fab) (width 0.1)) 21 | (fp_line (start -1.948 2.452) (end -1.948 -2.452) (layer F.Fab) (width 0.1)) 22 | (fp_line (start -1.948 -1.182) (end -0.678 -2.452) (layer F.Fab) (width 0.1)) 23 | (fp_line (start -1.598 -2.452) (end 1.598 -2.452) (layer F.SilkS) (width 0.2)) 24 | (fp_line (start 1.598 -2.452) (end 1.598 2.452) (layer F.SilkS) (width 0.2)) 25 | (fp_line (start 1.598 2.452) (end -1.598 2.452) (layer F.SilkS) (width 0.2)) 26 | (fp_line (start -1.598 2.452) (end -1.598 -2.452) (layer F.SilkS) (width 0.2)) 27 | (fp_line (start -3.475 -2.58) (end -1.948 -2.58) (layer F.SilkS) (width 0.2)) 28 | (pad 1 smd rect (at -2.711 -1.905 90) (size 0.65 1.528) (layers F.Cu F.Paste F.Mask)) 29 | (pad 2 smd rect (at -2.711 -0.635 90) (size 0.65 1.528) (layers F.Cu F.Paste F.Mask)) 30 | (pad 3 smd rect (at -2.711 0.635 90) (size 0.65 1.528) (layers F.Cu F.Paste F.Mask)) 31 | (pad 4 smd rect (at -2.711 1.905 90) (size 0.65 1.528) (layers F.Cu F.Paste F.Mask)) 32 | (pad 5 smd rect (at 2.711 1.905 90) (size 0.65 1.528) (layers F.Cu F.Paste F.Mask)) 33 | (pad 6 smd rect (at 2.711 0.635 90) (size 0.65 1.528) (layers F.Cu F.Paste F.Mask)) 34 | (pad 7 smd rect (at 2.711 -0.635 90) (size 0.65 1.528) (layers F.Cu F.Paste F.Mask)) 35 | (pad 8 smd rect (at 2.711 -1.905 90) (size 0.65 1.528) (layers F.Cu F.Paste F.Mask)) 36 | (model TPA152DR.stp 37 | (at (xyz 0 0 0)) 38 | (scale (xyz 1 1 1)) 39 | (rotate (xyz 0 0 0)) 40 | ) 41 | ) 42 | -------------------------------------------------------------------------------- /fw/vew211_cis.txt: -------------------------------------------------------------------------------- 1 | offset 0x02, tuple 0x01, link 0x02 2 | 00 ff 3 | dev_info 4 | no_info 5 | 6 | offset 0x06, tuple 0x17, link 0x02 7 | d1 ff 8 | attr_dev_info 9 | no_info 10 | 11 | offset 0x0a, tuple 0x15, link 0x64 12 | 04 01 4d 61 74 73 75 73 68 69 74 61 20 45 6c 65 13 | 63 74 72 69 63 20 49 6e 64 75 73 74 72 69 61 6c 14 | 20 43 6f 2e 2c 20 4c 74 64 2e 00 50 61 6e 61 73 15 | 6f 6e 69 63 20 53 6f 75 6e 64 20 43 61 72 64 00 16 | 43 46 2d 56 45 57 32 31 31 00 56 65 72 73 69 6f 17 | 6e 20 31 2e 31 20 41 70 6c 2e 20 32 35 2c 31 39 18 | 39 34 00 ff 19 | vers_1 4.1, "Matsushita Electric Industrial Co., Ltd.", 20 | "Panasonic Sound Card", "CF-VEW211", "Version 1.1 Apl. 25,1994" 21 | 22 | offset 0x70, tuple 0x1a, link 0x05 23 | 01 23 00 02 03 24 | config base 0x0200 mask 0x0003 last_index 0x23 25 | 26 | offset 0x77, tuple 0x1b, link 0x14 27 | e0 81 9d 11 55 1e fc 23 ac 61 30 05 09 88 03 03 28 | 30 80 0e 08 29 | cftable_entry 0x20 [default] 30 | [mwait] [audio] 31 | Vcc Vnom 5V Iavg 150mA 32 | timing wait 1500ns 33 | io 0x0530-0x0539, 0x0388-0x038b [lines=12] [8bit] [range] 34 | irq mask 0x0e80 [level] 35 | 36 | offset 0x8d, tuple 0x1b, link 0x0a 37 | 21 08 ac 61 80 0e 09 88 03 03 38 | cftable_entry 0x21 39 | io 0x0e80-0x0e89, 0x0388-0x038b [lines=12] [8bit] [range] 40 | 41 | offset 0x99, tuple 0x1b, link 0x0a 42 | 22 08 ac 61 40 0f 09 88 03 03 43 | cftable_entry 0x22 44 | io 0x0f40-0x0f49, 0x0388-0x038b [lines=12] [8bit] [range] 45 | 46 | offset 0xa5, tuple 0x1b, link 0x0a 47 | 23 08 ac 61 04 06 09 88 03 03 48 | cftable_entry 0x23 49 | io 0x0604-0x060d, 0x0388-0x038b [lines=12] [8bit] [range] 50 | 51 | offset 0xb1, tuple 0x20, link 0x04 52 | 32 00 01 00 53 | manfid 0x0032, 0x0001 54 | 55 | offset 0xb7, tuple 0x21, link 0x02 56 | ff 00 57 | funcid unknown 58 | 59 | offset 0xbb, tuple 0x10, link 0x05 60 | 47 ff b9 00 c9 61 | checksum 0x0000-0x00b8 = 0xc9 62 | 63 | offset 0xc2, tuple 0x14, link 0x00 64 | no_long_link 65 | 66 | offset 0xc4, tuple 0xff, link 0xc3 67 | 50 72 6f 64 75 63 74 69 6f 6e 20 44 61 74 65 3a 68 | cb 07 02 0d 01 54 69 6d 65 3a 14 20 30 2b 00 00 69 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70 | 00 00 00 00 00 00 00 00 00 00 00 00 c0 00 00 00 71 | 00 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 72 | ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 73 | ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 74 | ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 75 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 76 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 77 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 78 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 79 | 00 00 00 80 | parse error: Success 81 | 82 | -------------------------------------------------------------------------------- /pc_card/Yamaha/YMF_YAC.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # YAC516-E 5 | # 6 | DEF YAC516-E U 0 40 Y Y 1 F N 7 | F0 "U" 0 0 50 H V C CNN 8 | F1 "YAC516-E" 0 100 50 H V C CNN 9 | F2 "Package_SO:TSSOP-24_6.1x7.8mm_P0.65mm" 0 -1100 50 H I C CNN 10 | F3 "" 0 0 50 H I C CNN 11 | DRAW 12 | S -300 -50 300 -1050 0 1 0 N 13 | X TST1 1 -400 -150 100 R 50 50 1 1 O 14 | X LRCK 10 400 -150 100 L 50 50 1 1 I 15 | X AOTR 15 400 -250 100 L 50 50 1 1 O 16 | X AOTL 16 400 -350 100 L 50 50 1 1 O 17 | X VCOM 17 400 -450 100 L 50 50 1 1 w 18 | X AVDD 18 400 -550 100 L 50 50 1 1 W 19 | X AGND 19 400 -650 100 L 50 50 1 1 w 20 | X DVDD 2 -400 -250 100 R 50 50 1 1 W 21 | X VREFH 22 400 -750 100 L 50 50 1 1 I 22 | X VREFL 23 400 -850 100 L 50 50 1 1 I 23 | X TST2 24 400 -950 100 L 50 50 1 1 O 24 | X DGND 3 -400 -350 100 R 50 50 1 1 w 25 | X /PDIN 4 -400 -450 100 R 50 50 1 1 I 26 | X /IC 5 -400 -550 100 R 50 50 1 1 I 27 | X MCLK 6 -400 -650 100 R 50 50 1 1 I 28 | X CKS 7 -400 -750 100 R 50 50 1 1 I 29 | X BICK 8 -400 -850 100 R 50 50 1 1 I 30 | X SDATA 9 -400 -950 100 R 50 50 1 1 I 31 | ENDDRAW 32 | ENDDEF 33 | # 34 | # YMF289B-S 35 | # 36 | DEF YMF289B-S U 0 40 Y Y 1 F N 37 | F0 "U" 0 200 50 H V C CNN 38 | F1 "YMF289B-S" 0 100 50 H V C CNN 39 | F2 "Package_QFP:TQFP-48_7x7mm_P0.5mm" 150 -1750 50 H I C CNN 40 | F3 "" 0 200 50 H I C CNN 41 | DRAW 42 | S -400 0 400 -1700 0 1 0 N 43 | X XI 1 -500 -100 100 R 50 50 1 1 I C 44 | X D5 10 -500 -900 100 R 50 50 1 1 B 45 | X D5 11 -500 -1000 100 R 50 50 1 1 B 46 | X D7 12 -500 -1100 100 R 50 50 1 1 B 47 | X /CS 13 -500 -1200 100 R 50 50 1 1 I 48 | X /RD 14 -500 -1300 100 R 50 50 1 1 I 49 | X /WR 15 -500 -1400 100 R 50 50 1 1 I 50 | X /IRQ 16 -500 -1500 100 R 50 50 1 1 O 51 | X VSS 17 -500 -1600 100 R 50 50 1 1 w 52 | X XO 2 -500 -200 100 R 50 50 1 1 O C 53 | X /IC 24 500 -100 100 L 50 50 1 1 I 54 | X A0 25 500 -200 100 L 50 50 1 1 I 55 | X A1 26 500 -300 100 L 50 50 1 1 I 56 | X /TEST1 27 500 -400 100 L 50 50 1 1 I 57 | X /PDO 28 500 -500 100 L 50 50 1 1 O 58 | X /TEST2 29 500 -600 100 L 50 50 1 1 I 59 | X VSS 3 -500 -300 100 R 50 50 1 1 w 60 | X /TEST3 31 500 -700 100 L 50 50 1 1 I 61 | X LRO 32 500 -800 100 L 50 50 1 1 O 62 | X DO 33 500 -900 100 L 50 50 1 1 O 63 | X WCO 34 500 -1000 100 L 50 50 1 1 O 64 | X BCO 35 500 -1100 100 L 50 50 1 1 O 65 | X CLKO 36 500 -1200 100 L 50 50 1 1 O C 66 | X VSS 37 500 -1300 100 L 50 50 1 1 w 67 | X D0 4 -500 -400 100 R 50 50 1 1 B 68 | X VDD 47 500 -1400 100 L 50 50 1 1 W 69 | X 5V/3V 48 500 -1500 100 L 50 50 1 1 I 70 | X D1 5 -500 -500 100 R 50 50 1 1 B 71 | X D2 6 -500 -600 100 R 50 50 1 1 B 72 | X D3 8 -500 -700 100 R 50 50 1 1 B 73 | X D4 9 -500 -800 100 R 50 50 1 1 B 74 | ENDDRAW 75 | ENDDEF 76 | # 77 | #End Library 78 | -------------------------------------------------------------------------------- /pc_card/Hirose/IC1F-68RD-1.27SF_52.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # IC1F-68RD-1.27SF(52) 5 | # 6 | DEF IC1F-68RD-1.27SF(52) J 0 40 Y Y 1 F N 7 | F0 "J" -300 1750 50 H V L BNN 8 | F1 "IC1F-68RD-1.27SF(52)" -300 -1850 50 H V L BNN 9 | F2 "" -50 -1950 50 H I L BNN 10 | F3 "" -50 -1950 50 H I L BNN 11 | DRAW 12 | S -300 -1800 300 1700 0 0 10 f 13 | X GND 1 -500 1600 200 R 40 40 0 0 w 14 | X A11 10 -500 700 200 R 40 40 0 0 I 15 | X A9 11 -500 600 200 R 40 40 0 0 I 16 | X A8 12 -500 500 200 R 40 40 0 0 I 17 | X A13 13 -500 400 200 R 40 40 0 0 I 18 | X A14 14 -500 300 200 R 40 40 0 0 I 19 | X WE# 15 -500 200 200 R 40 40 0 0 I 20 | X IREQ# 16 -500 100 200 R 40 40 0 0 O 21 | X VCC 17 -500 0 200 R 40 40 0 0 W 22 | X VPP 18 -500 -100 200 R 40 40 0 0 W 23 | X A16 19 -500 -200 200 R 40 40 0 0 I 24 | X D3 2 -500 1500 200 R 40 40 0 0 B 25 | X A15 20 -500 -300 200 R 40 40 0 0 I 26 | X A12 21 -500 -400 200 R 40 40 0 0 I 27 | X A7 22 -500 -500 200 R 40 40 0 0 I 28 | X A6 23 -500 -600 200 R 40 40 0 0 I 29 | X A5 24 -500 -700 200 R 40 40 0 0 I 30 | X A4 25 -500 -800 200 R 40 40 0 0 I 31 | X A3 26 -500 -900 200 R 40 40 0 0 I 32 | X A2 27 -500 -1000 200 R 40 40 0 0 I 33 | X A1 28 -500 -1100 200 R 40 40 0 0 I 34 | X A0 29 -500 -1200 200 R 40 40 0 0 I 35 | X D4 3 -500 1400 200 R 40 40 0 0 B 36 | X D0 30 -500 -1300 200 R 40 40 0 0 B 37 | X D1 31 -500 -1400 200 R 40 40 0 0 B 38 | X D2 32 -500 -1500 200 R 40 40 0 0 B 39 | X IOIS16# 33 -500 -1600 200 R 40 40 0 0 O 40 | X GND 34 -500 -1700 200 R 40 40 0 0 w 41 | X GND 35 500 1600 200 L 40 40 0 0 w 42 | X CD1# 36 500 1500 200 L 40 40 0 0 O 43 | X D11 37 500 1400 200 L 40 40 0 0 B 44 | X D12 38 500 1300 200 L 40 40 0 0 B 45 | X D13 39 500 1200 200 L 40 40 0 0 B 46 | X D5 4 -500 1300 200 R 40 40 0 0 B 47 | X D14 40 500 1100 200 L 40 40 0 0 B 48 | X D15 41 500 1000 200 L 40 40 0 0 B 49 | X CE2# 42 500 900 200 L 40 40 0 0 I 50 | X VS1# 43 500 800 200 L 40 40 0 0 O 51 | X IORD# 44 500 700 200 L 40 40 0 0 B 52 | X IOWR# 45 500 600 200 L 40 40 0 0 B 53 | X A17 46 500 500 200 L 40 40 0 0 I 54 | X A18 47 500 400 200 L 40 40 0 0 I 55 | X A19 48 500 300 200 L 40 40 0 0 I 56 | X A20 49 500 200 200 L 40 40 0 0 I 57 | X D6 5 -500 1200 200 R 40 40 0 0 B 58 | X A21 50 500 100 200 L 40 40 0 0 I 59 | X VCC 51 500 0 200 L 40 40 0 0 W 60 | X VPP 52 500 -100 200 L 40 40 0 0 W 61 | X A22 53 500 -200 200 L 40 40 0 0 I 62 | X A23 54 500 -300 200 L 40 40 0 0 I 63 | X A24 55 500 -400 200 L 40 40 0 0 I 64 | X A25 56 500 -500 200 L 40 40 0 0 I 65 | X VS2# 57 500 -600 200 L 40 40 0 0 O 66 | X RESET 58 500 -700 200 L 40 40 0 0 I 67 | X WAIT# 59 500 -800 200 L 40 40 0 0 O 68 | X D7 6 -500 1100 200 R 40 40 0 0 B 69 | X INPACK# 60 500 -900 200 L 40 40 0 0 O 70 | X REG# 61 500 -1000 200 L 40 40 0 0 I 71 | X SPKR# 62 500 -1100 200 L 40 40 0 0 O 72 | X STSCHG# 63 500 -1200 200 L 40 40 0 0 O 73 | X D8 64 500 -1300 200 L 40 40 0 0 P 74 | X D9 65 500 -1400 200 L 40 40 0 0 P 75 | X D10 66 500 -1500 200 L 40 40 0 0 P 76 | X CD2# 67 500 -1600 200 L 40 40 0 0 O 77 | X GND 68 500 -1700 200 L 40 40 0 0 w 78 | X CE1# 7 -500 1000 200 R 40 40 0 0 I 79 | X A10 8 -500 900 200 R 40 40 0 0 I 80 | X OE# 9 -500 800 200 R 40 40 0 0 I 81 | ENDDRAW 82 | ENDDEF 83 | # 84 | #End Library 85 | -------------------------------------------------------------------------------- /devboard/92140-010LF/92140-010LF.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 2 | #encoding utf-8 3 | #SamacSys ECAD Model 92140-010LF 4 | #/2894198/601420/2.49/68/4/Connector 5 | DEF 92140-010LF J 0 30 Y Y 1 F N 6 | F0 "J" 750 300 50 H V L CNN 7 | F1 "92140-010LF" 750 200 50 H V L CNN 8 | F2 "92140010LF" 750 100 50 H I L CNN 9 | F3 "https://cdn.amphenol-icc.com/media/wysiwyg/files/drawing/92140.pdf" 750 0 50 H I L CNN 10 | F4 "Header, Top Mount, S/D(68Pins), R/A, 5V, 4mm s/o" 750 -100 50 H I L CNN "Description" 11 | F5 "5.8" 750 -200 50 H I L CNN "Height" 12 | F6 "649-92140-010LF" 750 -300 50 H I L CNN "Mouser Part Number" 13 | F7 "https://www.mouser.co.uk/ProductDetail/Amphenol-FCI/92140-010LF/?qs=S7cSk136QBGr8%252BBNYNafTg%3D%3D" 750 -400 50 H I L CNN "Mouser Price/Stock" 14 | F8 "Amphenol" 750 -500 50 H I L CNN "Manufacturer_Name" 15 | F9 "92140-010LF" 750 -600 50 H I L CNN "Manufacturer_Part_Number" 16 | DRAW 17 | X 1 1 0 0 200 R 50 50 0 0 P 18 | X 2 2 0 -100 200 R 50 50 0 0 P 19 | X 3 3 0 -200 200 R 50 50 0 0 P 20 | X 4 4 0 -300 200 R 50 50 0 0 P 21 | X 5 5 0 -400 200 R 50 50 0 0 P 22 | X 6 6 0 -500 200 R 50 50 0 0 P 23 | X 7 7 0 -600 200 R 50 50 0 0 P 24 | X 8 8 0 -700 200 R 50 50 0 0 P 25 | X 9 9 0 -800 200 R 50 50 0 0 P 26 | X 10 10 0 -900 200 R 50 50 0 0 P 27 | X 11 11 0 -1000 200 R 50 50 0 0 P 28 | X 12 12 0 -1100 200 R 50 50 0 0 P 29 | X 13 13 0 -1200 200 R 50 50 0 0 P 30 | X 14 14 0 -1300 200 R 50 50 0 0 P 31 | X 15 15 0 -1400 200 R 50 50 0 0 P 32 | X 16 16 0 -1500 200 R 50 50 0 0 P 33 | X 17 17 0 -1600 200 R 50 50 0 0 P 34 | X 18 18 0 -1700 200 R 50 50 0 0 P 35 | X 19 19 0 -1800 200 R 50 50 0 0 P 36 | X 20 20 0 -1900 200 R 50 50 0 0 P 37 | X 21 21 0 -2000 200 R 50 50 0 0 P 38 | X 22 22 0 -2100 200 R 50 50 0 0 P 39 | X 23 23 0 -2200 200 R 50 50 0 0 P 40 | X 24 24 0 -2300 200 R 50 50 0 0 P 41 | X 25 25 0 -2400 200 R 50 50 0 0 P 42 | X 26 26 0 -2500 200 R 50 50 0 0 P 43 | X 27 27 0 -2600 200 R 50 50 0 0 P 44 | X 28 28 0 -2700 200 R 50 50 0 0 P 45 | X 29 29 0 -2800 200 R 50 50 0 0 P 46 | X 30 30 0 -2900 200 R 50 50 0 0 P 47 | X 31 31 0 -3000 200 R 50 50 0 0 P 48 | X 32 32 0 -3100 200 R 50 50 0 0 P 49 | X 33 33 0 -3200 200 R 50 50 0 0 P 50 | X 34 34 0 -3300 200 R 50 50 0 0 P 51 | X 35 35 900 0 200 L 50 50 0 0 P 52 | X 36 36 900 -100 200 L 50 50 0 0 P 53 | X 37 37 900 -200 200 L 50 50 0 0 P 54 | X 38 38 900 -300 200 L 50 50 0 0 P 55 | X 39 39 900 -400 200 L 50 50 0 0 P 56 | X 40 40 900 -500 200 L 50 50 0 0 P 57 | X 41 41 900 -600 200 L 50 50 0 0 P 58 | X 42 42 900 -700 200 L 50 50 0 0 P 59 | X 43 43 900 -800 200 L 50 50 0 0 P 60 | X 44 44 900 -900 200 L 50 50 0 0 P 61 | X 45 45 900 -1000 200 L 50 50 0 0 P 62 | X 46 46 900 -1100 200 L 50 50 0 0 P 63 | X 47 47 900 -1200 200 L 50 50 0 0 P 64 | X 48 48 900 -1300 200 L 50 50 0 0 P 65 | X 49 49 900 -1400 200 L 50 50 0 0 P 66 | X 50 50 900 -1500 200 L 50 50 0 0 P 67 | X 51 51 900 -1600 200 L 50 50 0 0 P 68 | X 52 52 900 -1700 200 L 50 50 0 0 P 69 | X 53 53 900 -1800 200 L 50 50 0 0 P 70 | X 54 54 900 -1900 200 L 50 50 0 0 P 71 | X 55 55 900 -2000 200 L 50 50 0 0 P 72 | X 56 56 900 -2100 200 L 50 50 0 0 P 73 | X 57 57 900 -2200 200 L 50 50 0 0 P 74 | X 58 58 900 -2300 200 L 50 50 0 0 P 75 | X 59 59 900 -2400 200 L 50 50 0 0 P 76 | X 60 60 900 -2500 200 L 50 50 0 0 P 77 | X 61 61 900 -2600 200 L 50 50 0 0 P 78 | X 62 62 900 -2700 200 L 50 50 0 0 P 79 | X 63 63 900 -2800 200 L 50 50 0 0 P 80 | X 64 64 900 -2900 200 L 50 50 0 0 P 81 | X 65 65 900 -3000 200 L 50 50 0 0 P 82 | X 66 66 900 -3100 200 L 50 50 0 0 P 83 | X 67 67 900 -3200 200 L 50 50 0 0 P 84 | X 68 68 900 -3300 200 L 50 50 0 0 P 85 | P 5 0 1 6 200 100 700 100 700 -3400 200 -3400 200 100 N 86 | ENDDRAW 87 | ENDDEF 88 | # 89 | #End Library 90 | -------------------------------------------------------------------------------- /dos/ena86r/io_tstmp.txt: -------------------------------------------------------------------------------- 1 | Copyright(C) 1994,1995,1996,1997 Terumasa KODAKA , Takeshi KONO 2 | 3 | 4 | ■タイムスタンパ，ハードウェアウェイト 5 | 対象 PC-H98シリーズ,486以上のCPU搭載機種,その他 6 | 解説 o タイムスタンパまたはハードウェアウェイトのポートを使用すると、 7 | CPU速度に依存しないウェイト時間を得ることができる。 8 | ハードウェアウェイト機能は、ペリフェラルデバイスに対するリカバリ 9 | タイムを確保するようなごく短時間のウェイトが必要なときに使用 10 | する。タイムスタンパは、それよりも長い時間のウェイトが必要なときに 11 | 使用する。 12 | o タイムスタンパ，ハードウェアウェイトの機能は、全てのPC-9800が 13 | 備えているわけではない。機能の有無は以下の方法で判定できる。 14 | ----------------------+-------------------------------------------- 15 | 機能 |判定方法 16 | ----------------------+-------------------------------------------- 17 | タイムスタンパ機能あり|(0000:0458h bit 7=1) or (0000:045Bh bit 2=1) 18 | ﾊｰﾄﾞｳｪｱｳｪｲﾄ機能あり |(0000:0458h bit 7=1) or (0000:045Bh bit 7=1) 19 | ----------------------+-------------------------------------------- 20 | * 0000:0458h bit 7はPC-H98判定ビット、0000:045Bh bit 2はタイムスタンパ 21 | 機能サポートフラグ、0000:045Bh bit 7はハードウェアウェイト機能 22 | サポートフラグ 23 | o タイムスタンパ，ハードウェアウェイトで使用するI/Oポートは以下の通り。 24 | -----------+----+---+-------------------------------------------------- 25 | I/Oアドレス|幅 |R/W|内容 26 | -----------+----+---+-------------------------------------------------- 27 | 005Ch |WORD| R |高分解能ARTICポート 28 | 005Eh |WORD| R |低分解能ARTICポート 29 | 005Fh |BYTE| W |0.6μs以上のハードウェアウェイト 30 | 045Fh |BYTE|R/W|ウェイトタイミング調整 31 | -----------+----+---+-------------------------------------------------- 32 | 関連 0000:0458h bit 7 33 | 0000:045Bh bit 7 34 | 0000:045Bh bit 2 35 | 36 | 37 | I/O 005Ch,005Eh 38 | 名前 タイムスタンパ 39 | 対象 タイムスタンパ機能を備えた機種 40 | 機能 41 | -----------+----+---+-------------------------------------------------- 42 | I/Oアドレス|幅 |R/W|内容 43 | -----------+----+---+-------------------------------------------------- 44 | 005Ch |WORD| R |高分解能ARTICポート 45 | 005Eh |WORD| R |低分解能ARTICポート 46 | -----------+----+---+-------------------------------------------------- 47 | ●005Ch,Read: 高分解能ARTICポート 48 | bit 15〜0: タイムスタンプカウンタのbit 15〜0 49 | * 分解能: 約3.26μs 50 | 最大値: 約213ms 51 | ●005Eh,Read: 低分解能ARTICポート 52 | bit 15〜0: タイムスタンプカウンタのbit 23〜8 53 | * 分解能: 約833μs 54 | 最大値: 約54.6s 55 | 解説 o 307.2kHzでカウントアップする24bitバイナリカウンタ(ARTIC=A Relative 56 | Time Indication Counter)のカウント値を示す。FFFFFFhまでカウントした 57 | あとは、000000hにラップアラウンドする。 58 | o I/O 005Eh(低分解能ARTICポート)の上位8ビットは、ハードウェアウェイトの 59 | ポートも兼ねている。つまり、リード時はARTICポートとして働き、ライト時 60 | はハードウェアウェイトのポートとして働く。 61 | u テクニカルデータブックの一部には、低分解能ARTICポートの分解能と 62 | 最大値の記述が実機と異なるものがある。 63 | u リセット時、カウンタは0からスタートする。 64 | u 奇数番地からのアクセスも可能。 65 | 関連 0000:0458h bit 7 66 | 0000:045Bh bit 2 67 | 68 | 69 | I/O 005Fh 70 | 名前 ハードウェアウェイト 71 | 対象 ハードウェアウェイト機能を備えた機種 72 | 機能 73 | ●Write: 0.6μs以上のハードウェアウェイト 74 | bit 7〜0: 任意の値 75 | 解説 o I/O 005Fhに任意の値を出力すると、ハードウェアにより0.6μs以上の 76 | ウェイトが掛けられる。ペリフェラルデバイスに対するリカバリタイムを 77 | 確保する場合などに使用する。 78 | o I/O 005Fhは、タイムスタンパのポートも兼ねている。つまり、ライト時は 79 | ハードウェアウェイトのポートとして働き、リード時はARTICポート(上位 80 | 8ビット)として働く。 81 | u ハードウェアウェイト機能を明示的にサポートしていない機種(サポート 82 | フラグが0の機種)でも、I/Oインターフェース回路が同等の機能を持って 83 | いるため、実質的にこの機能が働く。PC-9801VX21･RA21でタイミングを 84 | 測定して確認した。 85 | ただし、PC-9801初代･E･F･Mでは、このポート番号と内蔵の2D FDD I/Fの 86 | デコードイメージが重複しているため、ウェイトのためにこのアドレスに 87 | OUTすることは避けなければならない。 88 | 関連 0000:0458h bit 7 89 | 0000:045Bh bit 7 90 | I/O 005Ch 91 | I/O 045Fh 92 | 93 | 94 | I/O 045Fh 95 | 名前 ウェイトタイミング調整 96 | Undocumented 97 | 対象 486以上のCPUを搭載したウェイトポート搭載機種(PC-H98,PC-9801FAを除く) 98 | 機能 99 | [READ/WRITE] 100 | bit 7〜1: 設定ウェイトクロック数(単位:CPUクロック数) 101 | bit 0: OUT 5Fh,ALウェイト挿入 102 | 1= 挿入する 103 | 0= 挿入しない 104 | 解説 o PC-H98,PC-9801FAを除く、486以上のCPUを搭載したウェイトポート搭載機 105 | では、OUT 5Fh,ALでCPUにかかるウェイトの長さを調整することができる。 106 | o OUT 5Fh,AL実行時のウェイト時間は、CPUの外部クロック周波数× 107 | 設定ウェイトクロック数(このポートのbit 7〜1に出力する値)で決まる。 108 | u このI/Oに対して不適当な値を書き込むと、マシンの動作が不安定になる 109 | 可能性がある。 110 | 111 | 関連 0000:045Bh bit 7 112 | I/O 005Fh 113 | 114 | 115 | -------------------------------------------------------------------------------- /pc_card/Z8601720ASG/Z8601720ASG.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 2 | #encoding utf-8 3 | #(c) SnapEDA 2016 (snapeda.com) 4 | #This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License (CC BY-SA) with Design Exception 1.0 5 | # 6 | # Z8601720ASG 7 | # 8 | DEF Z8601720ASG U 0 40 Y Y 1 L N 9 | F0 "U" -1200 2735 50 H V L BNN 10 | F1 "Z8601720ASG" -1200 -2900 50 H V L BNN 11 | F2 "QFP50P1600X1600X160-100N" 0 0 50 H I L BNN 12 | F3 "" 0 0 50 H I L BNN 13 | F4 "IPC-7351B" 0 0 50 H I L BNN "STANDARD" 14 | F5 "Zilog" 0 0 50 H I L BNN "MANUFACTURER" 15 | F6 "Jan, 2005" 0 0 50 H I L BNN "PARTREV" 16 | F7 "1.60mm" 0 0 50 H I L BNN "MAXIMUM_PACKAGE_HEIGHT" 17 | DRAW 18 | S -1200 -2800 1200 2700 0 0 10 f 19 | X PC_HA0 1 -1400 700 200 R 40 40 0 0 I 20 | X ~PC~_BVD1/~STSCHG~/~PDIAG 2 -1400 -1600 200 R 40 40 0 0 B 21 | X PC_DATA0 3 -1400 2400 200 R 40 40 0 0 B 22 | X PC_DATA8 4 -1400 1600 200 R 40 40 0 0 B 23 | X VSS 5 1400 -2700 200 L 40 40 0 0 W 24 | X VSS 15 1400 -2700 200 L 40 40 0 0 W 25 | X VSS 20 1400 -2700 200 L 40 40 0 0 W 26 | X VSS 32 1400 -2700 200 L 40 40 0 0 W 27 | X VSS 44 1400 -2700 200 L 40 40 0 0 W 28 | X VSS 68 1400 -2700 200 L 40 40 0 0 W 29 | X VSS 77 1400 -2700 200 L 40 40 0 0 W 30 | X VSS 88 1400 -2700 200 L 40 40 0 0 W 31 | X PC_DATA1 6 -1400 2300 200 R 40 40 0 0 B 32 | X PC_DATA9 7 -1400 1500 200 R 40 40 0 0 B 33 | X PC_DATA2 8 -1400 2200 200 R 40 40 0 0 B 34 | X PC_DATA10 9 -1400 1400 200 R 40 40 0 0 B 35 | X PC_WP/~IOIS16~/~IOCS16 10 -1400 -1700 200 R 40 40 0 0 O 36 | X ~ATA~_HRESET 11 1400 -800 200 L 40 40 0 0 O 37 | X ATA_DATA7 12 1400 1700 200 L 40 40 0 0 B 38 | X ATA_DATA8/RES1 13 1400 1600 200 L 40 40 0 0 B 39 | X VDD 14 1400 2600 200 L 40 40 0 0 W 40 | X VDD 24 1400 2600 200 L 40 40 0 0 W 41 | X VDD 38 1400 2600 200 L 40 40 0 0 W 42 | X VDD 62 1400 2600 200 L 40 40 0 0 W 43 | X VDD 73 1400 2600 200 L 40 40 0 0 W 44 | X VDD 82 1400 2600 200 L 40 40 0 0 W 45 | X VDD 93 1400 2600 200 L 40 40 0 0 W 46 | X ATA_DATA6 16 1400 1800 200 L 40 40 0 0 B 47 | X ATA_DATA9/PACK_IN 17 1400 1500 200 L 40 40 0 0 B 48 | X ATA_DATA5 18 1400 1900 200 L 40 40 0 0 B 49 | X ATA_DATA10 19 1400 1400 200 L 40 40 0 0 B 50 | X ATA_DATA4 21 1400 2000 200 L 40 40 0 0 B 51 | X ATA_DATA11 22 1400 1300 200 L 40 40 0 0 B 52 | X ATA_DATA3 23 1400 2100 200 L 40 40 0 0 B 53 | X ATA_DATA12 25 1400 1200 200 L 40 40 0 0 B 54 | X ATA_DATA2 26 1400 2200 200 L 40 40 0 0 B 55 | X ATA_DATA13 27 1400 1100 200 L 40 40 0 0 B 56 | X ATA_DATA1 28 1400 2300 200 L 40 40 0 0 B 57 | X ATA_DATA14 29 1400 1000 200 L 40 40 0 0 B 58 | X ATA_DATA0 30 1400 2400 200 L 40 40 0 0 B 59 | X ATA_DATA15 31 1400 900 200 L 40 40 0 0 B 60 | X ~ATA~_HIOW 33 1400 -100 200 L 40 40 0 0 O 61 | X ~ATA~_HIOR 34 1400 0 200 L 40 40 0 0 O 62 | X ATA_IOCHRDY 35 1400 -500 200 L 40 40 0 0 I 63 | X ATA_IREQ 36 1400 -600 200 L 40 40 0 0 I 64 | X ~ATA~_IOCS16 37 1400 -700 200 L 40 40 0 0 I 65 | X ATA_HA1 39 1400 300 200 L 40 40 0 0 O 66 | X ATA_HA2 41 1400 200 200 L 40 40 0 0 O 67 | X ATA_HA0 40 1400 400 200 L 40 40 0 0 O 68 | X ~ATA~_HCS0 42 1400 700 200 L 40 40 0 0 O 69 | X ~ATA~_HCS1 43 1400 600 200 L 40 40 0 0 O 70 | X ~ATA~_PDIAG/ATA_BHE/RING_IN 45 1400 -1100 200 L 40 40 0 0 B 71 | X ~ATA~_PDASP/EXTP_WP 46 1400 -1000 200 L 40 40 0 0 B 72 | X ~ATA~_DACK/BVD2 47 1400 -1200 200 L 40 40 0 0 B 73 | X ~ATA~_DREQ/BVD1 48 1400 -900 200 L 40 40 0 0 I 74 | X ~ATA~_MRD 49 1400 -300 200 L 40 40 0 0 O 75 | X EE_CS 52 1400 -2000 200 L 40 40 0 0 B 76 | X EE_DO 53 1400 -2400 200 L 40 40 0 0 O 77 | X EE_DI 54 1400 -2200 200 L 40 40 0 0 I 78 | X ~ATA~_MWR 55 1400 -400 200 L 40 40 0 0 O 79 | X ~POR 56 1400 -1900 200 L 40 40 0 0 I 80 | X M_PINT 57 1400 -2500 200 L 40 40 0 0 O 81 | X PC_MCLK_IN 58 1400 -1800 200 L 40 40 0 0 I C 82 | X ~PC~_BVD2/~SPKR~/~DASP~/DREQ 100 -1400 -1800 200 R 40 40 0 0 B 83 | X PC_HA1 99 -1400 600 200 R 40 40 0 0 I 84 | X ~PC~_REG/~DACK 98 -1400 -1300 200 R 40 40 0 0 I 85 | X PC_HA2 97 -1400 500 200 R 40 40 0 0 I 86 | X ~PC~_INPACK/DREQ 96 -1400 -1900 200 R 40 40 0 0 O 87 | X PC_HA3 95 -1400 400 200 R 40 40 0 0 I 88 | X ~PC~_WAIT/IOCHRDY 94 -1400 -600 200 R 40 40 0 0 O 89 | X PC_HRESET/~HRESET 92 -1400 -1400 200 R 40 40 0 0 I 90 | X PC_HA4 91 -1400 300 200 R 40 40 0 0 I 91 | X PC_HA5 90 -1400 200 200 R 40 40 0 0 I 92 | X PC_HA6 89 -1400 100 200 R 40 40 0 0 I 93 | X PC_HA7 87 -1400 0 200 R 40 40 0 0 I 94 | X PC_RDY/~BSY~/~IREQ~/HINT 86 -1400 -500 200 R 40 40 0 0 O 95 | X ~PC~_HWE 85 -1400 -1200 200 R 40 40 0 0 I 96 | X PC_HA8 84 -1400 -100 200 R 40 40 0 0 I 97 | X PC_HA9 83 -1400 -200 200 R 40 40 0 0 I 98 | X ~PC~_HIOW 81 -1400 -1100 200 R 40 40 0 0 I 99 | X ~PC~_HIOR 80 -1400 -1000 200 R 40 40 0 0 I 100 | X ~PC~_ATA/~HOE 79 -1400 -900 200 R 40 40 0 0 I 101 | X ~PC~_HCE2/~HCS1 78 -1400 -800 200 R 40 40 0 0 I 102 | X PC_DATA15 75 -1400 900 200 R 40 40 0 0 B 103 | X PC_HA10 76 -1400 -300 200 R 40 40 0 0 I 104 | X ~PC~_HCE1/~HCS0 74 -1400 -700 200 R 40 40 0 0 I 105 | X PC_DATA14 72 -1400 1000 200 R 40 40 0 0 B 106 | X PC_DATA7 71 -1400 1700 200 R 40 40 0 0 B 107 | X PC_DATA13 70 -1400 1100 200 R 40 40 0 0 B 108 | X PC_DATA6 69 -1400 1800 200 R 40 40 0 0 B 109 | X PC_DATA12 67 -1400 1200 200 R 40 40 0 0 B 110 | X PC_DATA5 66 -1400 1900 200 R 40 40 0 0 B 111 | X PC_DATA11 65 -1400 1300 200 R 40 40 0 0 B 112 | X PC_DATA4 64 -1400 2000 200 R 40 40 0 0 B 113 | X PC_DATA3 63 -1400 2100 200 R 40 40 0 0 B 114 | X EXTP_STSCHG/RES2 61 1400 -1600 200 L 40 40 0 0 I 115 | X EXTP_AUDIO 60 1400 -1500 200 L 40 40 0 0 I 116 | X EXTP_PWDN 59 1400 -1400 200 L 40 40 0 0 O 117 | X EE_SK 50 1400 -2100 200 L 40 40 0 0 B C 118 | X EE_MASTER 51 1400 -2300 200 L 40 40 0 0 I 119 | ENDDRAW 120 | ENDDEF 121 | # 122 | # End Library -------------------------------------------------------------------------------- /devboard/92140-010LF/95622003LF.kicad_mod: -------------------------------------------------------------------------------- 1 | (module pcmcia (layer F.Cu) (tedit 5CFD6007) 2 | (attr smd) 3 | (fp_text reference X1 (at 0 1.27) (layer F.SilkS) hide 4 | (effects (font (size 1 1) (thickness 0.15))) 5 | ) 6 | (fp_text value "PCMCIA female" (at 0.0508 -5.9928) (layer F.Fab) 7 | (effects (font (size 1 1) (thickness 0.15))) 8 | ) 9 | (fp_line (start -25.4 -4.5) (end 25.4 -4.5) (layer F.SilkS) (width 0.15)) 10 | (fp_circle (center 24.01 -2.7) (end 24.61 -2.7) (layer F.SilkS) (width 0.15)) 11 | (fp_circle (center -24 -2.7) (end -23.4 -2.7) (layer F.SilkS) (width 0.15)) 12 | (fp_circle (center 24.01 -2.7) (end 25.26 -2.7) (layer B.SilkS) (width 0.15)) 13 | (fp_circle (center -24 -2.7) (end -22.75 -2.7) (layer B.SilkS) (width 0.15)) 14 | (fp_line (start -25.4 0) (end -25.4 -4.5) (layer F.SilkS) (width 0.15)) 15 | (fp_line (start 25.4 0) (end 25.4 -4.5) (layer F.SilkS) (width 0.15)) 16 | (pad 68 smd rect (at 20.96 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 17 | (pad 67 smd rect (at 19.69 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 18 | (pad 66 smd rect (at 18.42 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 19 | (pad 65 smd rect (at 17.15 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 20 | (pad 64 smd rect (at 15.88 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 21 | (pad 63 smd rect (at 14.61 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 22 | (pad 62 smd rect (at 13.34 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 23 | (pad 61 smd rect (at 12.07 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 24 | (pad 60 smd rect (at 10.8 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 25 | (pad 59 smd rect (at 9.53 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 26 | (pad 58 smd rect (at 8.26 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 27 | (pad 57 smd rect (at 6.99 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 28 | (pad 56 smd rect (at 5.72 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 29 | (pad 55 smd rect (at 4.45 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 30 | (pad 54 smd rect (at 3.18 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 31 | (pad 53 smd rect (at 1.91 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 32 | (pad 52 smd rect (at 0.64 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 33 | (pad 51 smd rect (at -0.63 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 34 | (pad 50 smd rect (at -1.9 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 35 | (pad 49 smd rect (at -3.17 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 36 | (pad 48 smd rect (at -4.44 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 37 | (pad 47 smd rect (at -5.71 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 38 | (pad 46 smd rect (at -6.98 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 39 | (pad 45 smd rect (at -8.25 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 40 | (pad 44 smd rect (at -9.52 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 41 | (pad 43 smd rect (at -10.79 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 42 | (pad 42 smd rect (at -12.06 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 43 | (pad 41 smd rect (at -13.33 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 44 | (pad 40 smd rect (at -14.6 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 45 | (pad 39 smd rect (at -15.87 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 46 | (pad 38 smd rect (at -17.14 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 47 | (pad 37 smd rect (at -18.41 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 48 | (pad 36 smd rect (at -19.68 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 49 | (pad 35 smd rect (at -20.95 -2) (size 0.8 4) (layers B.Cu B.Paste B.Mask)) 50 | (pad 34 smd rect (at 20.96 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 51 | (pad 33 smd rect (at 19.69 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 52 | (pad 32 smd rect (at 18.42 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 53 | (pad 31 smd rect (at 17.15 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 54 | (pad 30 smd rect (at 15.88 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 55 | (pad 29 smd rect (at 14.61 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 56 | (pad 28 smd rect (at 13.34 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 57 | (pad 27 smd rect (at 12.07 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 58 | (pad 26 smd rect (at 10.8 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 59 | (pad 25 smd rect (at 9.53 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 60 | (pad 24 smd rect (at 8.26 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 61 | (pad 23 smd rect (at 6.99 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 62 | (pad 22 smd rect (at 5.72 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 63 | (pad 21 smd rect (at 4.45 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 64 | (pad 20 smd rect (at 3.18 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 65 | (pad 19 smd rect (at 1.91 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 66 | (pad 18 smd rect (at 0.64 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 67 | (pad 17 smd rect (at -0.63 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 68 | (pad 16 smd rect (at -1.9 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 69 | (pad 15 smd rect (at -3.17 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 70 | (pad 14 smd rect (at -4.44 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 71 | (pad 13 smd rect (at -5.71 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 72 | (pad 12 smd rect (at -6.98 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 73 | (pad 11 smd rect (at -8.25 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 74 | (pad 10 smd rect (at -9.52 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 75 | (pad 9 smd rect (at -10.79 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 76 | (pad 8 smd rect (at -12.06 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 77 | (pad 7 smd rect (at -13.33 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 78 | (pad 6 smd rect (at -14.6 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 79 | (pad 5 smd rect (at -15.87 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 80 | (pad 4 smd rect (at -17.14 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 81 | (pad 3 smd rect (at -18.41 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 82 | (pad 2 smd rect (at -19.68 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 83 | (pad 1 smd rect (at -20.95 -2) (size 0.8 4) (layers F.Cu F.Paste F.Mask)) 84 | (model ${KISYS3DMOD}/Connector_PinSocket_1.27mm.3dshapes/PinSocket_2x34_P1.27mm_Vertical.wrl 85 | (offset (xyz 21 4.5 0)) 86 | (scale (xyz 1.4 1 1)) 87 | (rotate (xyz 0 90 90)) 88 | ) 89 | ) 90 | -------------------------------------------------------------------------------- /fw/cardinfo.py: -------------------------------------------------------------------------------- 1 | import itertools 2 | from enum import Flag, Enum, auto 3 | from typing import Any, List, Optional, NamedTupleMeta, _NamedTuple, NamedTuple 4 | from types import new_class 5 | 6 | from zconfig import ZilogConfig, CCRBaseAddress 7 | 8 | 9 | class CISTuple(NamedTupleMeta): 10 | def __new__(cls, clsname, bases, attrs, tpl): 11 | attrs["TPL_CODE"] = tpl 12 | attrs["format"] = CISTuple.format 13 | attrs["__iter__"] = CISTuple.__iter__ 14 | return super(CISTuple, cls).__new__(cls, clsname, (_NamedTuple,), attrs) 15 | 16 | def format(self): 17 | payload = self.payload() 18 | return [self.TPL_CODE, len(payload)] + payload 19 | 20 | def __iter__(self): 21 | return self.format().__iter__() 22 | 23 | 24 | class CISTPL_RAW(tuple): 25 | def __new__(cls, val): 26 | return super(CISTPL_RAW, cls).__new__( 27 | cls, (int(nibble, 16) for nibble in val.split()) 28 | ) 29 | 30 | def __str__(self): 31 | return f"{self.__class__.__name__}(...)" 32 | 33 | 34 | class CISTPL_DEVICE(metaclass=CISTuple, tpl=0x01): 35 | EMPTY = b"\x00" 36 | class DeviceType(Enum): 37 | NULL = 0 38 | EEPROM = 4 39 | FUNCSPEC = 0xD 40 | 41 | device_type: DeviceType = DeviceType.NULL 42 | 43 | def payload(self): 44 | device_id = self.device_type.value << 4 45 | if self.device_type == CISTPL_DEVICE.DeviceType.NULL: 46 | return [device_id, 0xFF] 47 | 48 | 49 | class CISTPL_DEVICE(metaclass=CISTuple, tpl=0x01): 50 | EMPTY = b"\x00" 51 | class DeviceType(Enum): 52 | NULL = 0 53 | EEPROM = 4 54 | FUNCSPEC = 0xD 55 | 56 | device_type: DeviceType = DeviceType.NULL 57 | 58 | def payload(self): 59 | device_id = self.device_type.value << 4 60 | if self.device_type == CISTPL_DEVICE.DeviceType.NULL: 61 | return [device_id, 0xFF] 62 | 63 | class CISTPL_DEVICE_A(metaclass=CISTuple, tpl=0x17): 64 | device_info: List[Any] = [] 65 | 66 | def payload(self): 67 | return list( 68 | itertools.chain(self.device_info) 69 | ) + [0xFF] 70 | 71 | 72 | class CISTPL_VERS_1(metaclass=CISTuple, tpl=0x15): 73 | manufacturer: bytes 74 | product_name: bytes 75 | lot_number: bytes = b"" 76 | additional: bytes = b"" 77 | major: int = 0x04 78 | minor: int = 0x02 79 | 80 | def payload(self): 81 | return list( 82 | itertools.chain( 83 | (self.major, self.minor), 84 | self.manufacturer, 85 | (0,), 86 | self.product_name, 87 | (0,), 88 | self.lot_number, 89 | self.lot_number and (0,) or (), 90 | self.additional, 91 | self.additional and (0,), 92 | (0xFF,) 93 | ) 94 | ) 95 | 96 | 97 | class CISTPL_CONFIG(metaclass=CISTuple, tpl=0x1A): 98 | # TPCC_LAST Last Index 99 | # The Index Number of the final entry in the Card Configuration Table (the last entry encountered when scanning the CIS). 100 | # TODO: related to CISTPL_CFTABLE_ENTRY 101 | last_index: int 102 | 103 | # TPCC_RADR/TPCC_RMSK 104 | # is equal to CCRBaseAddress.to_address value on ZILOG 105 | cr_base_address: int = CCRBaseAddress.to_address(ZilogConfig.CCR_BASE) 106 | # Zilog has 4 or 5 (Rev. BA) registers 107 | presence_mask: int = ZilogConfig.REVISION.value and 0b11111 or 0b1111 108 | 109 | def payload(self): 110 | assert 0 < self.last_index < 2 ** 6 111 | if self.cr_base_address > 65535: 112 | rasz = 3 113 | elif self.cr_base_address > 255: 114 | rasz = 2 115 | else: 116 | rasz = 1 117 | rmsz = 1 118 | tpcc_sz = (rasz - 1) + ((rmsz - 1) << 2) 119 | return list( 120 | itertools.chain( 121 | (tpcc_sz, self.last_index), 122 | self.cr_base_address.to_bytes(rasz, "little"), 123 | self.presence_mask.to_bytes(1, "big"), 124 | ) 125 | ) 126 | 127 | 128 | class CISTPL_CFTABLE_ENTRY(metaclass=CISTuple, tpl=0x1B): 129 | class IF(Flag): 130 | """ 131 | Interface Description Field 132 | """ 133 | ITYPE_B0 = auto() 134 | ITYPE_B1 = auto() 135 | ITYPE_B2 = auto() 136 | ITYPE_B3 = auto() 137 | BVDS = auto() 138 | WP = auto() 139 | READY = auto() 140 | MWAIT = auto() 141 | IO_MEM = ITYPE_B0 142 | 143 | class FS(Flag): 144 | POWER_B0 = auto() 145 | POWER_B1 = auto() 146 | TIMING = auto() 147 | IOSPACE = auto() 148 | IRQ = auto() 149 | MEMSPACE_B5 = auto() 150 | MEMSPACE_B6 = auto() 151 | MISC = auto() 152 | VCC = POWER_B0 153 | VPP1 = POWER_B1 154 | VPP2 = POWER_B0 | POWER_B1 155 | MEMBASE = MEMSPACE_B5 156 | MEMBASLEN = MEMSPACE_B6 157 | MEMWINDOW = MEMSPACE_B5 | MEMSPACE_B6 158 | UNSET = 0 159 | 160 | 161 | vcc: Optional[Any] = () 162 | vpp1: Optional[Any] = () 163 | vpp2: Optional[Any] = () 164 | iospace: Optional[Any] = () 165 | irq: Optional[Any] = () 166 | membase: Optional[Any] = () 167 | misc: Optional[Any] = () 168 | cf: List[Any] = [] 169 | entry_number: int = 1 170 | default: bool = True 171 | interface: Optional[IF] = None 172 | 173 | 174 | def payload(self): 175 | index = self.entry_number 176 | if self.default: 177 | index |= 1 << 6 178 | if self.interface: 179 | index |= 1 << 7 180 | fs = self.FS.UNSET 181 | if self.vcc: 182 | fs |= self.FS.VCC 183 | if self.iospace: 184 | fs |= self.FS.IOSPACE 185 | if self.irq: 186 | fs |= self.FS.IRQ 187 | if self.membase: 188 | fs |= self.FS.MEMBASE 189 | if self.misc: 190 | fs |= self.FS.MISC 191 | 192 | return list( 193 | itertools.chain( 194 | (index,), 195 | (self.interface and (self.interface.value,) or ()), 196 | (fs.value,), 197 | self.vcc, 198 | self.iospace, 199 | self.irq, 200 | self.membase, 201 | self.misc, 202 | self.cf, 203 | ) 204 | ) 205 | 206 | 207 | class CISTPL_MANFID(metaclass=CISTuple, tpl=0x20): 208 | manufacturer_code: int 209 | manufacturer_info: int 210 | 211 | def payload(self): 212 | return list( 213 | itertools.chain( 214 | self.manufacturer_code.to_bytes(2, "big"), 215 | self.manufacturer_info.to_bytes(2, "big"), 216 | ) 217 | ) 218 | 219 | 220 | class CISTPL_END(NamedTuple): 221 | body: bytes = b"" 222 | 223 | def format(self): 224 | payload = self.payload() 225 | return [0xff, 0x00] + payload 226 | 227 | def __iter__(self): 228 | return self.format().__iter__() 229 | 230 | def payload(self): 231 | return list(self.body) 232 | 233 | 234 | def gen_cis(): 235 | return [ 236 | CISTPL_DEVICE(), # no common memory device 237 | CISTPL_DEVICE_A( # attribute memory device 238 | device_info=[0x49, 0x00] # eeprom, device is writable, 250ns; 0 x 512B 239 | ), 240 | CISTPL_VERS_1( 241 | manufacturer=b"tilde.gay", 242 | product_name=b"OPL3", 243 | lot_number=b"", 244 | additional=b"", 245 | ), 246 | CISTPL_MANFID(0xe201, 0x0001), 247 | CISTPL_CONFIG(# 1A 05 01 01 00 02 07 248 | last_index=1, # last entry number 249 | presence_mask=0b111, 250 | ), 251 | CISTPL_CFTABLE_ENTRY(# 1B 0E c1 c1 99 01 55 b0 60 88 01 07 30 00 10 08 252 | entry_number=1, 253 | default=True, 254 | interface=CISTPL_CFTABLE_ENTRY.IF.IO_MEM | CISTPL_CFTABLE_ENTRY.IF.READY | CISTPL_CFTABLE_ENTRY.IF.MWAIT, 255 | vcc=(0x01, 0x55), # nominal voltage; no ext, 0xA->5, 10mA/[1V] 256 | iospace=(0xb0, 0x60, ZilogConfig.IOSTART & 0xFF, ZilogConfig.IOSTART >> 8, 0x07), # range; 1 range, 2 byte address, 1 byte length 257 | irq=(0x30, 0x00, 0x10), # mask, level, irqn0 ;;irq12 258 | misc=(0x08,) # audio 259 | ), 260 | CISTPL_END(),#b"yottatsa.name/cardbarker"), 261 | ] 262 | 263 | 264 | if __name__ == "__main__": 265 | cis = gen_cis() 266 | for tpl in cis: 267 | print(tpl) 268 | nibbles = ["%02X" % i for i in tpl] 269 | print(" ".join(nibbles[:2])) 270 | print(" ".join(nibbles[2:])) 271 | -------------------------------------------------------------------------------- /devboard/92140-010LF/92140010LF.kicad_mod: -------------------------------------------------------------------------------- 1 | (module 92140010LF (layer F.Cu) (tedit 61ACD61F) 2 | (descr 92140-010LF-5) 3 | (tags Connector) 4 | (fp_text reference J** (at 20.955 17.215) (layer F.SilkS) 5 | (effects (font (size 1.27 1.27) (thickness 0.254))) 6 | ) 7 | (fp_text value 92140010LF (at 20.955 17.215) (layer F.SilkS) hide 8 | (effects (font (size 1.27 1.27) (thickness 0.254))) 9 | ) 10 | (fp_line (start -9.97 -1.785) (end 51.88 -1.785) (layer Dwgs.User) (width 0.1)) 11 | (fp_line (start 51.88 -1.785) (end 51.88 36.215) (layer Dwgs.User) (width 0.1)) 12 | (fp_line (start 51.88 36.215) (end -9.97 36.215) (layer Dwgs.User) (width 0.1)) 13 | (fp_line (start -9.97 36.215) (end -9.97 -1.785) (layer Dwgs.User) (width 0.1)) 14 | (fp_line (start -8.97 35.215) (end -6.985 35.215) (layer Dwgs.User) (width 0.2)) 15 | (fp_line (start -6.985 35.215) (end -6.985 20.17) (layer Dwgs.User) (width 0.2)) 16 | (fp_line (start -6.985 20.17) (end -3.175 20.17) (layer Dwgs.User) (width 0.2)) 17 | (fp_line (start -3.175 20.17) (end -3.175 16.36) (layer Dwgs.User) (width 0.2)) 18 | (fp_line (start -3.175 16.36) (end 45.085 16.36) (layer Dwgs.User) (width 0.2)) 19 | (fp_line (start 45.085 16.36) (end 45.085 20.17) (layer Dwgs.User) (width 0.2)) 20 | (fp_line (start 45.085 20.17) (end 48.895 20.17) (layer Dwgs.User) (width 0.2)) 21 | (fp_line (start 48.895 20.17) (end 48.895 35.215) (layer Dwgs.User) (width 0.2)) 22 | (fp_line (start 48.895 35.215) (end 50.88 35.215) (layer Dwgs.User) (width 0.2)) 23 | (fp_line (start -8.97 35.215) (end -8.97 -0.785) (layer Dwgs.User) (width 0.2)) 24 | (fp_line (start -8.97 -0.785) (end 50.88 -0.785) (layer Dwgs.User) (width 0.2)) 25 | (fp_line (start 50.88 -0.785) (end 50.88 35.215) (layer Dwgs.User) (width 0.2)) 26 | (fp_line (start -6.985 35.215) (end -8.97 35.215) (layer F.SilkS) (width 0.1)) 27 | (fp_line (start -8.97 35.215) (end -8.97 -0.785) (layer F.SilkS) (width 0.1)) 28 | (fp_line (start -8.97 -0.785) (end 50.88 -0.785) (layer F.SilkS) (width 0.1)) 29 | (fp_line (start 50.88 -0.785) (end 50.88 35.215) (layer F.SilkS) (width 0.1)) 30 | (fp_line (start 50.88 35.215) (end 48.895 35.215) (layer F.SilkS) (width 0.1)) 31 | (fp_line (start 48.895 35.215) (end 48.895 20.17) (layer F.SilkS) (width 0.1)) 32 | (fp_line (start 48.895 20.17) (end 45.085 20.17) (layer F.SilkS) (width 0.1)) 33 | (fp_line (start 45.085 20.17) (end 45.085 16.36) (layer F.SilkS) (width 0.1)) 34 | (fp_line (start 45.085 16.36) (end -3.175 16.36) (layer F.SilkS) (width 0.1)) 35 | (fp_line (start -3.175 16.36) (end -3.175 20.17) (layer F.SilkS) (width 0.1)) 36 | (fp_line (start -3.175 20.17) (end -6.985 20.17) (layer F.SilkS) (width 0.1)) 37 | (fp_line (start -6.985 20.17) (end -6.985 35.215) (layer F.SilkS) (width 0.1)) 38 | (pad 1 thru_hole circle (at 0 0 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 39 | (pad 2 thru_hole circle (at 1.27 1.906 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 40 | (pad 3 thru_hole circle (at 2.54 0 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 41 | (pad 4 thru_hole circle (at 3.81 1.906 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 42 | (pad 5 thru_hole circle (at 5.08 0 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 43 | (pad 6 thru_hole circle (at 6.35 1.906 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 44 | (pad 7 thru_hole circle (at 7.62 0 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 45 | (pad 8 thru_hole circle (at 8.89 1.906 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 46 | (pad 9 thru_hole circle (at 10.16 0 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 47 | (pad 10 thru_hole circle (at 11.43 1.906 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 48 | (pad 11 thru_hole circle (at 12.7 0 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 49 | (pad 12 thru_hole circle (at 13.97 1.906 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 50 | (pad 13 thru_hole circle (at 15.24 0 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 51 | (pad 14 thru_hole circle (at 16.51 1.906 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 52 | (pad 15 thru_hole circle (at 17.78 0 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 53 | (pad 16 thru_hole circle (at 19.05 1.906 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 54 | (pad 17 thru_hole circle (at 20.32 0 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 55 | (pad 18 thru_hole circle (at 21.59 1.906 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 56 | (pad 19 thru_hole circle (at 22.86 0 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 57 | (pad 20 thru_hole circle (at 24.13 1.906 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 58 | (pad 21 thru_hole circle (at 25.4 0 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 59 | (pad 22 thru_hole circle (at 26.67 1.906 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 60 | (pad 23 thru_hole circle (at 27.94 0 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 61 | (pad 24 thru_hole circle (at 29.21 1.906 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 62 | (pad 25 thru_hole circle (at 30.48 0 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 63 | (pad 26 thru_hole circle (at 31.75 1.906 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 64 | (pad 27 thru_hole circle (at 33.02 0 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 65 | (pad 28 thru_hole circle (at 34.29 1.906 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 66 | (pad 29 thru_hole circle (at 35.56 0 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 67 | (pad 30 thru_hole circle (at 36.83 1.906 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 68 | (pad 31 thru_hole circle (at 38.1 0 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 69 | (pad 32 thru_hole circle (at 39.37 1.906 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 70 | (pad 33 thru_hole circle (at 40.64 0 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 71 | (pad 34 thru_hole circle (at 41.91 1.906 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 72 | (pad 35 thru_hole circle (at 0 3.81 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 73 | (pad 36 thru_hole circle (at 1.27 5.715 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 74 | (pad 37 thru_hole circle (at 2.54 3.81 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 75 | (pad 38 thru_hole circle (at 3.81 5.715 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 76 | (pad 39 thru_hole circle (at 5.08 3.81 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 77 | (pad 40 thru_hole circle (at 6.35 5.715 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 78 | (pad 41 thru_hole circle (at 7.62 3.81 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 79 | (pad 42 thru_hole circle (at 8.89 5.715 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 80 | (pad 43 thru_hole circle (at 10.16 3.81 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 81 | (pad 44 thru_hole circle (at 11.43 5.715 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 82 | (pad 45 thru_hole circle (at 12.7 3.81 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 83 | (pad 46 thru_hole circle (at 13.97 5.715 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 84 | (pad 47 thru_hole circle (at 15.24 3.81 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 85 | (pad 48 thru_hole circle (at 16.51 5.715 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 86 | (pad 49 thru_hole circle (at 17.78 3.81 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 87 | (pad 50 thru_hole circle (at 19.05 5.715 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 88 | (pad 51 thru_hole circle (at 20.32 3.81 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 89 | (pad 52 thru_hole circle (at 21.59 5.715 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 90 | (pad 53 thru_hole circle (at 22.86 3.81 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 91 | (pad 54 thru_hole circle (at 24.13 5.715 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 92 | (pad 55 thru_hole circle (at 25.4 3.81 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 93 | (pad 56 thru_hole circle (at 26.67 5.715 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 94 | (pad 57 thru_hole circle (at 27.94 3.81 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 95 | (pad 58 thru_hole circle (at 29.21 5.715 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 96 | (pad 59 thru_hole circle (at 30.48 3.81 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 97 | (pad 60 thru_hole circle (at 31.75 5.715 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 98 | (pad 61 thru_hole circle (at 33.02 3.81 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 99 | (pad 62 thru_hole circle (at 34.29 5.715 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 100 | (pad 63 thru_hole circle (at 35.56 3.81 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 101 | (pad 64 thru_hole circle (at 36.83 5.715 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 102 | (pad 65 thru_hole circle (at 38.1 3.81 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 103 | (pad 66 thru_hole circle (at 39.37 5.715 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 104 | (pad 67 thru_hole circle (at 40.64 3.81 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 105 | (pad 68 thru_hole circle (at 41.91 5.715 90) (size 1.1 1.1) (drill 0.67) (layers *.Cu *.Mask)) 106 | (pad MH1 thru_hole circle (at 46.99 5.015 90) (size 1.1 1.1) (drill 2.2) (layers *.Cu *.Mask F.SilkS)) 107 | (pad MH2 thru_hole circle (at -5.08 5.015 90) (size 1.1 1.1) (drill 2.2) (layers *.Cu *.Mask F.SilkS)) 108 | ) 109 | -------------------------------------------------------------------------------- /devboard/92140-010LF/92140-010LF.mod: -------------------------------------------------------------------------------- 1 | PCBNEW-LibModule-V1 2021-12-05 12:59:15 2 | # encoding utf-8 3 | Units mm 4 | $INDEX 5 | 92140010LF 6 | $EndINDEX 7 | $MODULE 92140010LF 8 | Po 0 0 0 15 61acb7a3 00000000 ~~ 9 | Li 92140010LF 10 | Cd 92140-010LF-5 11 | Kw Connector 12 | Sc 0 13 | At STD 14 | AR 15 | Op 0 0 0 16 | T0 20.955 17.215 1.27 1.27 0 0.254 N V 21 N "J**" 17 | T1 20.955 17.215 1.27 1.27 0 0.254 N I 21 N "92140010LF" 18 | DS -9.97 -1.785 51.88 -1.785 0.1 24 19 | DS 51.88 -1.785 51.88 36.215 0.1 24 20 | DS 51.88 36.215 -9.97 36.215 0.1 24 21 | DS -9.97 36.215 -9.97 -1.785 0.1 24 22 | DS -8.97 35.215 -6.985 35.215 0.2 24 23 | DS -6.985 35.215 -6.985 20.17 0.2 24 24 | DS -6.985 20.17 -3.175 20.17 0.2 24 25 | DS -3.175 20.17 -3.175 16.36 0.2 24 26 | DS -3.175 16.36 45.085 16.36 0.2 24 27 | DS 45.085 16.36 45.085 20.17 0.2 24 28 | DS 45.085 20.17 48.895 20.17 0.2 24 29 | DS 48.895 20.17 48.895 35.215 0.2 24 30 | DS 48.895 35.215 50.88 35.215 0.2 24 31 | DS -8.97 35.215 -8.97 -0.785 0.2 24 32 | DS -8.97 -0.785 50.88 -0.785 0.2 24 33 | DS 50.88 -0.785 50.88 35.215 0.2 24 34 | DS -6.985 35.215 -8.97 35.215 0.1 21 35 | DS -8.97 35.215 -8.97 -0.785 0.1 21 36 | DS -8.97 -0.785 50.88 -0.785 0.1 21 37 | DS 50.88 -0.785 50.88 35.215 0.1 21 38 | DS 50.88 35.215 48.895 35.215 0.1 21 39 | DS 48.895 35.215 48.895 20.17 0.1 21 40 | DS 48.895 20.17 45.085 20.17 0.1 21 41 | DS 45.085 20.17 45.085 16.36 0.1 21 42 | DS 45.085 16.36 -3.175 16.36 0.1 21 43 | DS -3.175 16.36 -3.175 20.17 0.1 21 44 | DS -3.175 20.17 -6.985 20.17 0.1 21 45 | DS -6.985 20.17 -6.985 35.215 0.1 21 46 | $PAD 47 | Po 0.000 -0 48 | Sh "1" C 1.100 1.100 0 0 900 49 | Dr 0.67 0 0 50 | At STD N 00E0FFFF 51 | Ne 0 "" 52 | $EndPAD 53 | $PAD 54 | Po 1.270 1.906 55 | Sh "2" C 1.100 1.100 0 0 900 56 | Dr 0.67 0 0 57 | At STD N 00E0FFFF 58 | Ne 0 "" 59 | $EndPAD 60 | $PAD 61 | Po 2.540 -0 62 | Sh "3" C 1.100 1.100 0 0 900 63 | Dr 0.67 0 0 64 | At STD N 00E0FFFF 65 | Ne 0 "" 66 | $EndPAD 67 | $PAD 68 | Po 3.810 1.906 69 | Sh "4" C 1.100 1.100 0 0 900 70 | Dr 0.67 0 0 71 | At STD N 00E0FFFF 72 | Ne 0 "" 73 | $EndPAD 74 | $PAD 75 | Po 5.080 -0 76 | Sh "5" C 1.100 1.100 0 0 900 77 | Dr 0.67 0 0 78 | At STD N 00E0FFFF 79 | Ne 0 "" 80 | $EndPAD 81 | $PAD 82 | Po 6.350 1.906 83 | Sh "6" C 1.100 1.100 0 0 900 84 | Dr 0.67 0 0 85 | At STD N 00E0FFFF 86 | Ne 0 "" 87 | $EndPAD 88 | $PAD 89 | Po 7.620 -0 90 | Sh "7" C 1.100 1.100 0 0 900 91 | Dr 0.67 0 0 92 | At STD N 00E0FFFF 93 | Ne 0 "" 94 | $EndPAD 95 | $PAD 96 | Po 8.890 1.906 97 | Sh "8" C 1.100 1.100 0 0 900 98 | Dr 0.67 0 0 99 | At STD N 00E0FFFF 100 | Ne 0 "" 101 | $EndPAD 102 | $PAD 103 | Po 10.160 -0 104 | Sh "9" C 1.100 1.100 0 0 900 105 | Dr 0.67 0 0 106 | At STD N 00E0FFFF 107 | Ne 0 "" 108 | $EndPAD 109 | $PAD 110 | Po 11.430 1.906 111 | Sh "10" C 1.100 1.100 0 0 900 112 | Dr 0.67 0 0 113 | At STD N 00E0FFFF 114 | Ne 0 "" 115 | $EndPAD 116 | $PAD 117 | Po 12.700 -0 118 | Sh "11" C 1.100 1.100 0 0 900 119 | Dr 0.67 0 0 120 | At STD N 00E0FFFF 121 | Ne 0 "" 122 | $EndPAD 123 | $PAD 124 | Po 13.970 1.906 125 | Sh "12" C 1.100 1.100 0 0 900 126 | Dr 0.67 0 0 127 | At STD N 00E0FFFF 128 | Ne 0 "" 129 | $EndPAD 130 | $PAD 131 | Po 15.240 -0 132 | Sh "13" C 1.100 1.100 0 0 900 133 | Dr 0.67 0 0 134 | At STD N 00E0FFFF 135 | Ne 0 "" 136 | $EndPAD 137 | $PAD 138 | Po 16.510 1.906 139 | Sh "14" C 1.100 1.100 0 0 900 140 | Dr 0.67 0 0 141 | At STD N 00E0FFFF 142 | Ne 0 "" 143 | $EndPAD 144 | $PAD 145 | Po 17.780 -0 146 | Sh "15" C 1.100 1.100 0 0 900 147 | Dr 0.67 0 0 148 | At STD N 00E0FFFF 149 | Ne 0 "" 150 | $EndPAD 151 | $PAD 152 | Po 19.050 1.906 153 | Sh "16" C 1.100 1.100 0 0 900 154 | Dr 0.67 0 0 155 | At STD N 00E0FFFF 156 | Ne 0 "" 157 | $EndPAD 158 | $PAD 159 | Po 20.320 -0 160 | Sh "17" C 1.100 1.100 0 0 900 161 | Dr 0.67 0 0 162 | At STD N 00E0FFFF 163 | Ne 0 "" 164 | $EndPAD 165 | $PAD 166 | Po 21.590 1.906 167 | Sh "18" C 1.100 1.100 0 0 900 168 | Dr 0.67 0 0 169 | At STD N 00E0FFFF 170 | Ne 0 "" 171 | $EndPAD 172 | $PAD 173 | Po 22.860 -0 174 | Sh "19" C 1.100 1.100 0 0 900 175 | Dr 0.67 0 0 176 | At STD N 00E0FFFF 177 | Ne 0 "" 178 | $EndPAD 179 | $PAD 180 | Po 24.130 1.906 181 | Sh "20" C 1.100 1.100 0 0 900 182 | Dr 0.67 0 0 183 | At STD N 00E0FFFF 184 | Ne 0 "" 185 | $EndPAD 186 | $PAD 187 | Po 25.400 -0 188 | Sh "21" C 1.100 1.100 0 0 900 189 | Dr 0.67 0 0 190 | At STD N 00E0FFFF 191 | Ne 0 "" 192 | $EndPAD 193 | $PAD 194 | Po 26.670 1.906 195 | Sh "22" C 1.100 1.100 0 0 900 196 | Dr 0.67 0 0 197 | At STD N 00E0FFFF 198 | Ne 0 "" 199 | $EndPAD 200 | $PAD 201 | Po 27.940 -0 202 | Sh "23" C 1.100 1.100 0 0 900 203 | Dr 0.67 0 0 204 | At STD N 00E0FFFF 205 | Ne 0 "" 206 | $EndPAD 207 | $PAD 208 | Po 29.210 1.906 209 | Sh "24" C 1.100 1.100 0 0 900 210 | Dr 0.67 0 0 211 | At STD N 00E0FFFF 212 | Ne 0 "" 213 | $EndPAD 214 | $PAD 215 | Po 30.480 -0 216 | Sh "25" C 1.100 1.100 0 0 900 217 | Dr 0.67 0 0 218 | At STD N 00E0FFFF 219 | Ne 0 "" 220 | $EndPAD 221 | $PAD 222 | Po 31.750 1.906 223 | Sh "26" C 1.100 1.100 0 0 900 224 | Dr 0.67 0 0 225 | At STD N 00E0FFFF 226 | Ne 0 "" 227 | $EndPAD 228 | $PAD 229 | Po 33.020 -0 230 | Sh "27" C 1.100 1.100 0 0 900 231 | Dr 0.67 0 0 232 | At STD N 00E0FFFF 233 | Ne 0 "" 234 | $EndPAD 235 | $PAD 236 | Po 34.290 1.906 237 | Sh "28" C 1.100 1.100 0 0 900 238 | Dr 0.67 0 0 239 | At STD N 00E0FFFF 240 | Ne 0 "" 241 | $EndPAD 242 | $PAD 243 | Po 35.560 -0 244 | Sh "29" C 1.100 1.100 0 0 900 245 | Dr 0.67 0 0 246 | At STD N 00E0FFFF 247 | Ne 0 "" 248 | $EndPAD 249 | $PAD 250 | Po 36.830 1.906 251 | Sh "30" C 1.100 1.100 0 0 900 252 | Dr 0.67 0 0 253 | At STD N 00E0FFFF 254 | Ne 0 "" 255 | $EndPAD 256 | $PAD 257 | Po 38.100 -0 258 | Sh "31" C 1.100 1.100 0 0 900 259 | Dr 0.67 0 0 260 | At STD N 00E0FFFF 261 | Ne 0 "" 262 | $EndPAD 263 | $PAD 264 | Po 39.370 1.906 265 | Sh "32" C 1.100 1.100 0 0 900 266 | Dr 0.67 0 0 267 | At STD N 00E0FFFF 268 | Ne 0 "" 269 | $EndPAD 270 | $PAD 271 | Po 40.640 -0 272 | Sh "33" C 1.100 1.100 0 0 900 273 | Dr 0.67 0 0 274 | At STD N 00E0FFFF 275 | Ne 0 "" 276 | $EndPAD 277 | $PAD 278 | Po 41.910 1.906 279 | Sh "34" C 1.100 1.100 0 0 900 280 | Dr 0.67 0 0 281 | At STD N 00E0FFFF 282 | Ne 0 "" 283 | $EndPAD 284 | $PAD 285 | Po 0.000 3.81 286 | Sh "35" C 1.100 1.100 0 0 900 287 | Dr 0.67 0 0 288 | At STD N 00E0FFFF 289 | Ne 0 "" 290 | $EndPAD 291 | $PAD 292 | Po 1.270 5.715 293 | Sh "36" C 1.100 1.100 0 0 900 294 | Dr 0.67 0 0 295 | At STD N 00E0FFFF 296 | Ne 0 "" 297 | $EndPAD 298 | $PAD 299 | Po 2.540 3.81 300 | Sh "37" C 1.100 1.100 0 0 900 301 | Dr 0.67 0 0 302 | At STD N 00E0FFFF 303 | Ne 0 "" 304 | $EndPAD 305 | $PAD 306 | Po 3.810 5.715 307 | Sh "38" C 1.100 1.100 0 0 900 308 | Dr 0.67 0 0 309 | At STD N 00E0FFFF 310 | Ne 0 "" 311 | $EndPAD 312 | $PAD 313 | Po 5.080 3.81 314 | Sh "39" C 1.100 1.100 0 0 900 315 | Dr 0.67 0 0 316 | At STD N 00E0FFFF 317 | Ne 0 "" 318 | $EndPAD 319 | $PAD 320 | Po 6.350 5.715 321 | Sh "40" C 1.100 1.100 0 0 900 322 | Dr 0.67 0 0 323 | At STD N 00E0FFFF 324 | Ne 0 "" 325 | $EndPAD 326 | $PAD 327 | Po 7.620 3.81 328 | Sh "41" C 1.100 1.100 0 0 900 329 | Dr 0.67 0 0 330 | At STD N 00E0FFFF 331 | Ne 0 "" 332 | $EndPAD 333 | $PAD 334 | Po 8.890 5.715 335 | Sh "42" C 1.100 1.100 0 0 900 336 | Dr 0.67 0 0 337 | At STD N 00E0FFFF 338 | Ne 0 "" 339 | $EndPAD 340 | $PAD 341 | Po 10.160 3.81 342 | Sh "43" C 1.100 1.100 0 0 900 343 | Dr 0.67 0 0 344 | At STD N 00E0FFFF 345 | Ne 0 "" 346 | $EndPAD 347 | $PAD 348 | Po 11.430 5.715 349 | Sh "44" C 1.100 1.100 0 0 900 350 | Dr 0.67 0 0 351 | At STD N 00E0FFFF 352 | Ne 0 "" 353 | $EndPAD 354 | $PAD 355 | Po 12.700 3.81 356 | Sh "45" C 1.100 1.100 0 0 900 357 | Dr 0.67 0 0 358 | At STD N 00E0FFFF 359 | Ne 0 "" 360 | $EndPAD 361 | $PAD 362 | Po 13.970 5.715 363 | Sh "46" C 1.100 1.100 0 0 900 364 | Dr 0.67 0 0 365 | At STD N 00E0FFFF 366 | Ne 0 "" 367 | $EndPAD 368 | $PAD 369 | Po 15.240 3.81 370 | Sh "47" C 1.100 1.100 0 0 900 371 | Dr 0.67 0 0 372 | At STD N 00E0FFFF 373 | Ne 0 "" 374 | $EndPAD 375 | $PAD 376 | Po 16.510 5.715 377 | Sh "48" C 1.100 1.100 0 0 900 378 | Dr 0.67 0 0 379 | At STD N 00E0FFFF 380 | Ne 0 "" 381 | $EndPAD 382 | $PAD 383 | Po 17.780 3.81 384 | Sh "49" C 1.100 1.100 0 0 900 385 | Dr 0.67 0 0 386 | At STD N 00E0FFFF 387 | Ne 0 "" 388 | $EndPAD 389 | $PAD 390 | Po 19.050 5.715 391 | Sh "50" C 1.100 1.100 0 0 900 392 | Dr 0.67 0 0 393 | At STD N 00E0FFFF 394 | Ne 0 "" 395 | $EndPAD 396 | $PAD 397 | Po 20.320 3.81 398 | Sh "51" C 1.100 1.100 0 0 900 399 | Dr 0.67 0 0 400 | At STD N 00E0FFFF 401 | Ne 0 "" 402 | $EndPAD 403 | $PAD 404 | Po 21.590 5.715 405 | Sh "52" C 1.100 1.100 0 0 900 406 | Dr 0.67 0 0 407 | At STD N 00E0FFFF 408 | Ne 0 "" 409 | $EndPAD 410 | $PAD 411 | Po 22.860 3.81 412 | Sh "53" C 1.100 1.100 0 0 900 413 | Dr 0.67 0 0 414 | At STD N 00E0FFFF 415 | Ne 0 "" 416 | $EndPAD 417 | $PAD 418 | Po 24.130 5.715 419 | Sh "54" C 1.100 1.100 0 0 900 420 | Dr 0.67 0 0 421 | At STD N 00E0FFFF 422 | Ne 0 "" 423 | $EndPAD 424 | $PAD 425 | Po 25.400 3.81 426 | Sh "55" C 1.100 1.100 0 0 900 427 | Dr 0.67 0 0 428 | At STD N 00E0FFFF 429 | Ne 0 "" 430 | $EndPAD 431 | $PAD 432 | Po 26.670 5.715 433 | Sh "56" C 1.100 1.100 0 0 900 434 | Dr 0.67 0 0 435 | At STD N 00E0FFFF 436 | Ne 0 "" 437 | $EndPAD 438 | $PAD 439 | Po 27.940 3.81 440 | Sh "57" C 1.100 1.100 0 0 900 441 | Dr 0.67 0 0 442 | At STD N 00E0FFFF 443 | Ne 0 "" 444 | $EndPAD 445 | $PAD 446 | Po 29.210 5.715 447 | Sh "58" C 1.100 1.100 0 0 900 448 | Dr 0.67 0 0 449 | At STD N 00E0FFFF 450 | Ne 0 "" 451 | $EndPAD 452 | $PAD 453 | Po 30.480 3.81 454 | Sh "59" C 1.100 1.100 0 0 900 455 | Dr 0.67 0 0 456 | At STD N 00E0FFFF 457 | Ne 0 "" 458 | $EndPAD 459 | $PAD 460 | Po 31.750 5.715 461 | Sh "60" C 1.100 1.100 0 0 900 462 | Dr 0.67 0 0 463 | At STD N 00E0FFFF 464 | Ne 0 "" 465 | $EndPAD 466 | $PAD 467 | Po 33.020 3.81 468 | Sh "61" C 1.100 1.100 0 0 900 469 | Dr 0.67 0 0 470 | At STD N 00E0FFFF 471 | Ne 0 "" 472 | $EndPAD 473 | $PAD 474 | Po 34.290 5.715 475 | Sh "62" C 1.100 1.100 0 0 900 476 | Dr 0.67 0 0 477 | At STD N 00E0FFFF 478 | Ne 0 "" 479 | $EndPAD 480 | $PAD 481 | Po 35.560 3.81 482 | Sh "63" C 1.100 1.100 0 0 900 483 | Dr 0.67 0 0 484 | At STD N 00E0FFFF 485 | Ne 0 "" 486 | $EndPAD 487 | $PAD 488 | Po 36.830 5.715 489 | Sh "64" C 1.100 1.100 0 0 900 490 | Dr 0.67 0 0 491 | At STD N 00E0FFFF 492 | Ne 0 "" 493 | $EndPAD 494 | $PAD 495 | Po 38.100 3.81 496 | Sh "65" C 1.100 1.100 0 0 900 497 | Dr 0.67 0 0 498 | At STD N 00E0FFFF 499 | Ne 0 "" 500 | $EndPAD 501 | $PAD 502 | Po 39.370 5.715 503 | Sh "66" C 1.100 1.100 0 0 900 504 | Dr 0.67 0 0 505 | At STD N 00E0FFFF 506 | Ne 0 "" 507 | $EndPAD 508 | $PAD 509 | Po 40.640 3.81 510 | Sh "67" C 1.100 1.100 0 0 900 511 | Dr 0.67 0 0 512 | At STD N 00E0FFFF 513 | Ne 0 "" 514 | $EndPAD 515 | $PAD 516 | Po 41.910 5.715 517 | Sh "68" C 1.100 1.100 0 0 900 518 | Dr 0.67 0 0 519 | At STD N 00E0FFFF 520 | Ne 0 "" 521 | $EndPAD 522 | $PAD 523 | Po 46.990 5.015 524 | Sh "MH1" C 1.100 1.100 0 0 900 525 | Dr 2.2 0 0 526 | At STD N 00E0FFFF 527 | Ne 0 "" 528 | $EndPAD 529 | $PAD 530 | Po -5.080 5.015 531 | Sh "MH2" C 1.100 1.100 0 0 900 532 | Dr 2.2 0 0 533 | At STD N 00E0FFFF 534 | Ne 0 "" 535 | $EndPAD 536 | $EndMODULE 92140010LF 537 | $EndLIBRARY 538 | -------------------------------------------------------------------------------- /fw/zconfig.py: -------------------------------------------------------------------------------- 1 | import sys 2 | from enum import Enum, Flag, auto 3 | 4 | 5 | 6 | def rbyte(b): 7 | return b 8 | nib = list(bin(b).split("b", 2)[1].zfill(8)) 9 | nib.reverse() 10 | return int("".join(nib), 2) 11 | 12 | 13 | """ 14 | Z86017/Z16017 PCMCIA Interface Solution 15 | 16 | Registers and chip config 17 | """ 18 | 19 | 20 | 21 | class ICR0(Flag): 22 | """ 23 | 00h Interface Configuration Register 0 24 | """ 25 | 26 | CLOCK0 = auto() 27 | CLOCK1 = auto() 28 | EN_OVERIDE2 = auto() 29 | EN_OVERIDE3 = auto() 30 | EN_RDY_BSY = auto() 31 | EN_CTR_IRQ = auto() 32 | EN_INT_POL = auto() 33 | EN_ATA_BHE = auto() 34 | 35 | CLOCK_IN = CLOCK0 | CLOCK1 36 | FORCE_PCMCIA = EN_OVERIDE3 37 | 38 | 39 | class IER(Flag): 40 | """ 41 | 01h Interrupt Enable Register 42 | """ 43 | 44 | EN_PC_INT0 = auto() 45 | EN_PC_INT1 = auto() 46 | EN_PC_INT2 = auto() 47 | EN_PC_INT3 = auto() 48 | EN_PC_INT4 = auto() 49 | EN_EXTP_WP = auto() 50 | CCR0_OVERIDE = auto() 51 | EN_INPACK = auto() 52 | UNSET = 0 53 | 54 | 55 | class ICR1(Flag): 56 | """ 57 | 02h Interface Configuration Register 1 58 | """ 59 | 60 | PDIAG_SET = auto() 61 | EN_PDIAG = auto() 62 | PDASP_SET = auto() 63 | EN_DASP = auto() 64 | EN_OR_CS01 = auto() 65 | EN_SPKR = auto() 66 | EN_DASP_INT = auto() 67 | EN_DASP_EXT = auto() 68 | UNSET = 0 69 | 70 | 71 | class ICR2(Flag): 72 | """ 73 | 03h Interface Configuration Register 2 74 | """ 75 | 76 | EN_MEM_MODE = auto() 77 | EN_INDP_MODE = auto() 78 | EN_ATT_MODE = auto() 79 | EN_INVERT_HCS0 = auto() 80 | EN_INVERT_HCS1 = auto() 81 | EN_INVERT_ATRST = auto() 82 | EN_IO_MODE = auto() # enables IO in 000-00Fh range 83 | _R7 = auto() 84 | PCMCIA_IO8 = EN_INDP_MODE | EN_ATT_MODE 85 | 86 | 87 | class ICR3(Flag): 88 | """ 89 | 04h Interface Configuration Register 3 90 | """ 91 | 92 | SEL_PRIMARY_1x = auto() 93 | SEL_PRIMARY_3x = auto() 94 | SEL_SECOND_1x = auto() 95 | SEL_SECOND_3x = auto() 96 | STR_RST = auto() 97 | EN_DIS_RST = auto() 98 | EN_PDIAG_INT = auto() 99 | EN_PDIAG_EXT = auto() 100 | UNSET = 0 101 | 102 | 103 | class CCRBaseAddress(Flag): 104 | """ 105 | 05h BCMCIA CCR Base Address Register 106 | Matches CISTPL_CONFIG and points to CCR0 107 | """ 108 | 109 | EN_CRR_A4 = auto() 110 | EN_CRR_A5 = auto() 111 | EN_CRR_A6 = auto() 112 | EN_CRR_A7 = auto() 113 | EN_CRR_A8 = auto() 114 | EN_CRR_A9 = auto() 115 | EN_CRR_A10 = auto() 116 | DIS_CRR_MODE = auto() 117 | NONE = DIS_CRR_MODE 118 | 119 | @classmethod 120 | def to_address(cls, flag): 121 | base = (flag.value & 0x7F) << 4 122 | return base 123 | 124 | 125 | class CCR0(Flag): 126 | """ 127 | 0Ah PCMCIA Configuration Option Register 128 | XX0h 129 | """ 130 | 131 | B0 = auto() 132 | B1 = auto() 133 | B2 = auto() 134 | B3 = auto() 135 | B4 = auto() 136 | B5 = auto() 137 | LEVEL_REQUEST = auto() 138 | SRESET = auto() 139 | UNSET = 0 140 | PCMCIA_IO8 = B5 141 | 142 | 143 | class CCR1(Flag): 144 | """ 145 | 0Bh Card Configuration and Status Register 146 | XX2h 147 | """ 148 | 149 | _R0 = auto() 150 | INTERRUPT_STATE = auto() 151 | POWER_DOWN = auto() 152 | AUDIO = auto() 153 | _R4 = auto() 154 | IOIS8 = auto() 155 | SIGCHG = auto() 156 | _C7 = auto() 157 | UNSET = 0 158 | PCMCIA_IO8 = IOIS8 159 | 160 | 161 | class CCR2(Flag): 162 | """ 163 | 0Ch Pin Replacement Register 164 | XX4h 165 | """ 166 | 167 | RWPROT = auto() 168 | RRDY_BSY = auto() 169 | RBVD2 = auto() 170 | RBVD1 = auto() 171 | CWPROT = auto() 172 | CRDY_BSY = auto() 173 | CBVD2 = auto() 174 | CBVD1 = auto() 175 | UNSET = 0 176 | 177 | 178 | class CCR3(Flag): 179 | """ 180 | 0Dh Socket and Copy 181 | XX6h 182 | """ 183 | 184 | UNSET = 0 185 | 186 | 187 | class W1CR(Flag): 188 | DIS_PAC1 = auto() 189 | EN_PAC1_MEM = auto() 190 | EN_PAC1_16 = auto() 191 | READ_PROTECT = auto() 192 | EN_PAC1_ADDR_COMP = auto() 193 | EN_PAC1_HCS = auto() 194 | NRWAIT6 = auto() 195 | NRWAIT7 = auto() 196 | DISABLED = DIS_PAC1 197 | X7T = NRWAIT7 | NRWAIT6 198 | X5T = NRWAIT7 199 | X3T = NRWAIT6 200 | UNSET = 0 201 | 202 | 203 | class W1SRAM(Flag): 204 | B8 = auto() 205 | B9 = auto() 206 | B10 = auto() 207 | EN_WRITE_PROTECT = auto() 208 | _B8 = auto() 209 | _B9 = auto() 210 | _B10 = auto() 211 | EN_DMA_ASK = auto() 212 | UNSET = 0 213 | 214 | 215 | class W2CR(Flag): 216 | DIS_PAC2 = auto() 217 | EN_PAC2_MEM = auto() 218 | EN_PAC2_16 = auto() 219 | READ_PROTECT = auto() 220 | EN_PAC2_ADDR_COMP = auto() 221 | EN_PAC2_HCS = auto() 222 | NRWAIT6 = auto() 223 | NRWAIT7 = auto() 224 | DISABLED = DIS_PAC2 225 | X7T = NRWAIT7 & NRWAIT6 226 | X5T = NRWAIT7 227 | X3T = NRWAIT6 228 | UNSET = 0 229 | 230 | 231 | class W2SRAM(Flag): 232 | UNSET = 0 233 | 234 | 235 | class W3CR(Flag): 236 | DIS_PAC3 = auto() 237 | EN_PAC3_MEM = auto() 238 | EN_PAC3_16P = auto() 239 | READ_PROTECT = auto() 240 | EN_PAC3_ADDR_COMP = auto() 241 | EN_PAC3_HCS = auto() 242 | NRWAIT6 = auto() 243 | NRWAIT7 = auto() 244 | DISABLED = DIS_PAC3 245 | X7T = NRWAIT7 & NRWAIT6 246 | X5T = NRWAIT7 247 | X3T = NRWAIT6 248 | UNSET = 0 249 | 250 | 251 | class W3SRAM(Flag): 252 | UNSET = 0 253 | 254 | 255 | class CCR4(Flag): 256 | """ 257 | 1Fh PCMCIA I/O Event Indication CCR4 258 | XX h 259 | """ 260 | 261 | UNSET = 0 262 | 263 | 264 | class RevisionControl(Enum): 265 | UNSET = 0 266 | BA = 0x10 267 | 268 | 269 | class DDCR(Flag): 270 | UNSET = 0 271 | 272 | 273 | class PMCR(Flag): 274 | EN_8BIT_MODE = auto() 275 | EN_MODEM_ALT = auto() 276 | EN_CLK = auto() 277 | EN_PADS1 = auto() 278 | EN_TIMER = auto() 279 | EN_PM_RDY = auto() 280 | EN_EXT_PD = auto() 281 | EN_EXPD_POL = auto() 282 | UNSET = 0 283 | PCMCIA_IO8 = EN_8BIT_MODE 284 | 285 | 286 | class ICR4(Flag): 287 | TSTCLK0_B0 = auto() 288 | TSTCLK0_B1 = auto() 289 | TSTCLK0_B2 = auto() 290 | DISABLE_PM_COUNTER = TSTCLK0_B1 291 | UNSET = 0 292 | 293 | 294 | class CICR1(Flag): 295 | UNSET = 0 296 | 297 | 298 | class CICR2(Flag): 299 | MEM_INDX0 = auto() 300 | MEM_INDX1 = auto() 301 | MEM_INDX2 = auto() 302 | EN_MEM_INDX = auto() 303 | IO_INDP_INDX4 = auto() 304 | IO_INDP_INDX5 = auto() 305 | IO_INDP_INDX6 = auto() 306 | EN_IO_INDP_INDX = auto() 307 | PCMCIA_IO8 = EN_IO_INDP_INDX 308 | UNSET = 0 309 | 310 | 311 | class BCR2(Flag): 312 | EN_BHE_POL = auto() 313 | EN_16_DUECE = auto() 314 | EN_DIV_ADDR = auto() # iA1 -> lA0, BHE 315 | EN_MAP_IO_MEM = auto() 316 | DUECE_WIDTH4 = auto() 317 | DUECE_WIDTH5 = auto() 318 | DUECE_ACCESS_DLY6 = auto() 319 | DUECE_ACCESS_DLY7 = auto() 320 | UNSET = 0 321 | PCMCIA_IO8 = 0 # fixme 322 | 323 | 324 | class EEPROM(Flag): 325 | RO = 0 326 | VALID = 0x1c 327 | 328 | class Special(Flag): 329 | RESERVED = 0 330 | 331 | 332 | class ZilogConfig(object): 333 | EEPROM = EEPROM.RO 334 | RESERVED = Special.RESERVED 335 | REVISION = RevisionControl.BA 336 | Z16017_ONLY = 0 337 | CCR_BASE = CCRBaseAddress.EN_CRR_A9 338 | IOSTART = 0x388 339 | IORANGE = 0x4 340 | PM_TIMER_VAL = 0 341 | TEMPLATE = ( 342 | # configured from FMC-98_C56M1_9509_IC3.BIN 343 | 344 | # 00 345 | ICR0.CLOCK_IN | ICR0.FORCE_PCMCIA | ICR0.EN_RDY_BSY | ICR0.EN_CTR_IRQ, 346 | IER.UNSET, 347 | ICR1.EN_SPKR, # ICT1.UNSET 348 | ICR2.PCMCIA_IO8, 349 | 350 | # 04 351 | ICR3.UNSET, 352 | CCR_BASE, 353 | EEPROM, 354 | EEPROM, 355 | 356 | # 08 357 | EEPROM, 358 | EEPROM, 359 | CCR0.UNSET, # Configuration Option 360 | CCR1.UNSET, # CCR1.PCMCIA_IO8, # Card Configuration and Status 361 | 362 | # 0C 363 | CCR2.UNSET, 364 | CCR3.UNSET, 365 | RESERVED, 366 | RESERVED, 367 | 368 | # 10 369 | W1CR.X7T | W1CR.EN_PAC1_ADDR_COMP, # W1CR.DISABLED, 370 | IOSTART & 0xff, 371 | W1SRAM(IOSTART >> 8), 372 | IORANGE, 373 | 374 | # 14 375 | W2CR.DISABLED, 376 | 0, 377 | W2SRAM.UNSET, 378 | 0, 379 | 380 | # 18 381 | W3CR.DISABLED, 382 | 0, 383 | W3SRAM.UNSET, 384 | 0, 385 | 386 | # 1C 387 | RESERVED, 388 | RESERVED, 389 | EEPROM.VALID, 390 | CCR4.UNSET, 391 | 392 | # 20 393 | EEPROM, 394 | EEPROM, 395 | EEPROM, 396 | REVISION, 397 | 398 | # 24 399 | 0, # Revision Number, 400 | RESERVED, 401 | Z16017_ONLY, 402 | Z16017_ONLY, 403 | 404 | # 28 405 | DDCR.UNSET, 406 | RESERVED, 407 | PM_TIMER_VAL, 408 | PMCR.PCMCIA_IO8, 409 | 410 | # 2C 411 | ICR4.DISABLE_PM_COUNTER, # ICR4.UNSET, 412 | CICR1.UNSET, 413 | CICR2.EN_MEM_INDX | CICR2.IO_INDP_INDX4 | CICR2.EN_IO_INDP_INDX, # CICR2.PCMCIA_IO8, 414 | BCR2.PCMCIA_IO8, 415 | 416 | #2F 417 | ) 418 | 419 | @classmethod 420 | def from_bytes(cls, b, debug=True, diff=True): 421 | config = [] 422 | for num, conf in enumerate(zip(cls.TEMPLATE, b)): 423 | tpl, val = conf 424 | if isinstance(tpl, Flag) or isinstance(tpl, Enum): 425 | val = rbyte(val) 426 | flag = tpl.__class__(val) 427 | config.append(flag) 428 | if not debug: 429 | continue 430 | if diff and tpl != flag: 431 | print("%02Xh: %02Xh %s (%s)" % (num, val, flag, tpl)) 432 | else: 433 | print("%02Xh: %02Xh %s" % (num, val, flag)) 434 | else: 435 | config.append(val) 436 | if not debug: 437 | continue 438 | if diff and tpl != val: 439 | print("%02Xh: %02Xh (%02Xh)" % (num, val, tpl)) 440 | else: 441 | print("%02Xh: %02Xh" % (num, val)) 442 | 443 | return cls(*config) 444 | 445 | def pprint(self): 446 | res = [] 447 | for i in self.config: 448 | if type(i) is int: 449 | res.append("%02Xh" % (i)) 450 | elif isinstance(i, Flag): 451 | res.append("<%02Xh: %s>" % (i.value, i.__str__())) 452 | else: 453 | res.append(i.__repr__()) 454 | print("[" + ", ".join(res) + "]") 455 | 456 | 457 | def __init__(self, *config): 458 | assert not config or len(config) == len(self.TEMPLATE) 459 | if len(config) == len(self.TEMPLATE): 460 | self.config = config 461 | else: 462 | self.config = list(self.TEMPLATE) 463 | 464 | 465 | if __name__ == "__main__": 466 | argv = sys.argv[1:] 467 | if argv: 468 | for fname in argv: 469 | print(fname) 470 | with open(fname, "rb+") as f: 471 | b = f.read(len(ZilogConfig.TEMPLATE)) 472 | zc = ZilogConfig.from_bytes(b) 473 | #zc.pprint() 474 | 475 | else: 476 | zc = ZilogConfig() 477 | zc.pprint() 478 | -------------------------------------------------------------------------------- /dos/opl3ena.asm: -------------------------------------------------------------------------------- 1 | p386n 2 | 3 | ; ═══════════════════════════════════════════════════════════════════════════ 4 | 5 | ; Segment type: Pure code 6 | seg000 segment byte public 'CODE' use16 7 | assume cs:seg000 8 | org 100h 9 | assume es:nothing, ss:nothing, ds:seg000, fs:nothing, gs:nothing 10 | 11 | ; ███████████████ S U B R O U T I N E ███████████████████████████████████████ 12 | 13 | 14 | public start 15 | start proc near 16 | mov dx, offset aEna86rCard86R9 ; "ENA86R - Card86-R/98 Enabler Version 1"... 17 | mov ah, 9 18 | int 21h ; DOS - PRINT STRING 19 | ; DS:DX -> string terminated by "$" 20 | call getSocketNum 21 | mov al, cs:socketNum 22 | cmp al, 0FFh 23 | jnz loc_10115 24 | jmp printHelpExit 25 | ; ─────────────────────────────────────────────────────────────────────────── 26 | 27 | loc_10115: ; CODE XREF: start+10j 28 | mov dx, offset aSocket ; "\r\nSocket #$" 29 | mov ah, 9 30 | int 21h ; DOS - PRINT STRING 31 | ; DS:DX -> string terminated by "$" 32 | mov dl, cs:socketNum 33 | add dl, '0' 34 | mov ah, 2 35 | int 21h ; DOS - DISPLAY OUTPUT 36 | ; DL = character to send to standard output 37 | mov al, cs:socketNum 38 | ror al, 1 39 | ror al, 1 40 | and al, 0C0h 41 | mov cs:regOffset, al 42 | mov ax, 270h ; PCMCIA reg 02 val 70: card power on 43 | xchg ah, al 44 | mov dx, 3E0h 45 | or al, cs:regOffset 46 | out dx, al 47 | xchg ah, al 48 | mov dx, 3E1h 49 | out dx, al 50 | mov ax, 320h ; PCMCIA reg 03 val 20: io card 51 | xchg ah, al 52 | mov dx, 3E0h 53 | or al, cs:regOffset 54 | out dx, al 55 | xchg ah, al 56 | mov dx, 3E1h 57 | out dx, al 58 | call sleepPC98 59 | mov ax, 360h ; PCMCIA reg 03 val 60: io card & reset 60 | xchg ah, al 61 | mov dx, 3E0h 62 | or al, cs:regOffset 63 | out dx, al 64 | xchg ah, al 65 | mov dx, 3E1h 66 | out dx, al 67 | mov ax, 2F0h ; PCMCIA reg 02 val F0: 68 | xchg ah, al 69 | mov dx, 3E0h 70 | or al, cs:regOffset 71 | out dx, al 72 | xchg ah, al 73 | mov dx, 3E1h 74 | out dx, al 75 | mov ax, 10E0h ; PCMCIA reg 10 val E0: 76 | xchg ah, al 77 | mov dx, 3E0h 78 | or al, cs:regOffset 79 | out dx, al 80 | xchg ah, al 81 | mov dx, 3E1h 82 | out dx, al 83 | mov ax, 1100h ; PCMCIA reg 11 val 00 84 | ; mem window 0 mapped to E0000h 85 | xchg ah, al 86 | mov dx, 3E0h 87 | or al, cs:regOffset 88 | out dx, al 89 | xchg ah, al 90 | mov dx, 3E1h 91 | out dx, al 92 | mov ax, 12E0h ; PCMCIA reg 12 val E0 93 | xchg ah, al 94 | mov dx, 3E0h 95 | or al, cs:regOffset 96 | out dx, al 97 | xchg ah, al 98 | mov dx, 3E1h 99 | out dx, al 100 | mov ax, 1300h ; PCMCIA reg 13 val 00 101 | ; mem window 0 end is E0000h + 4096 = E1000h 102 | xchg ah, al 103 | mov dx, 3E0h 104 | or al, cs:regOffset 105 | out dx, al 106 | xchg ah, al 107 | mov dx, 3E1h 108 | out dx, al 109 | mov ax, 1400h ; PCMCIA reg 14 val 00 110 | xchg ah, al 111 | mov dx, 3E0h 112 | or al, cs:regOffset 113 | out dx, al 114 | xchg ah, al 115 | mov dx, 3E1h 116 | out dx, al 117 | mov ax, 1540h ; PCMCIA reg 15 val 40: accessing attrib memory 118 | xchg ah, al 119 | mov dx, 3E0h 120 | or al, cs:regOffset 121 | out dx, al 122 | xchg ah, al 123 | mov dx, 3E1h 124 | out dx, al 125 | mov dx, 9A0h ; reg 9A0: Read various graphics-related status 126 | mov al, 4 127 | out dx, al ; reg 9A0 val 4: read palette mode 128 | in al, dx 129 | mov bl, al ; bl = stored palette mode 130 | xor al, al 131 | out 6Ah, al ; reg 6A val 0: enable digital palette mode 132 | mov ax, 601h ; PCMCIA reg 06 val 01: mem window 0 enable 133 | xchg ah, al 134 | mov dx, 3E0h 135 | or al, cs:regOffset 136 | out dx, al 137 | xchg ah, al 138 | mov dx, 3E1h 139 | out dx, al 140 | mov ax, seg attrib 141 | mov es, ax 142 | assume es:attrib 143 | mov ax, 888h ; PCMCIA reg 08 val 88 144 | xchg ah, al 145 | mov dx, 3E0h 146 | or al, cs:regOffset 147 | out dx, al 148 | xchg ah, al 149 | mov dx, 3E1h 150 | out dx, al 151 | mov ax, 903h ; PCMCIA reg 09 val 03 152 | ; io window 0 is 388h 153 | xchg ah, al 154 | mov dx, 3E0h 155 | or al, cs:regOffset 156 | out dx, al 157 | xchg ah, al 158 | mov dx, 3E1h 159 | out dx, al 160 | mov ax, 0A8Bh ; PCMCIA reg 0A val 8B 161 | xchg ah, al 162 | mov dx, 3E0h 163 | or al, cs:regOffset 164 | out dx, al 165 | xchg ah, al 166 | mov dx, 3E1h 167 | out dx, al 168 | mov ax, 0B03h ; PCMCIA reg 0B val 03 169 | ; io window 0 ends at 38Bh 170 | xchg ah, al 171 | mov dx, 3E0h 172 | or al, cs:regOffset 173 | out dx, al 174 | xchg ah, al 175 | mov dx, 3E1h 176 | out dx, al 177 | mov ax, 0C60h ; PCMCIA reg 0C val 60 178 | xchg ah, al 179 | mov dx, 3E0h 180 | or al, cs:regOffset 181 | out dx, al 182 | xchg ah, al 183 | mov dx, 3E1h 184 | out dx, al 185 | mov ax, 0DA4h ; PCMCIA reg 0D val A4 186 | xchg ah, al 187 | mov dx, 3E0h 188 | or al, cs:regOffset 189 | out dx, al 190 | xchg ah, al 191 | mov dx, 3E1h 192 | out dx, al 193 | mov ax, 0E6Eh ; PCMCIA reg 0E val 6E 194 | xchg ah, al 195 | mov dx, 3E0h 196 | or al, cs:regOffset 197 | out dx, al 198 | xchg ah, al 199 | mov dx, 3E1h 200 | out dx, al 201 | mov ax, 0FA4h ; PCMCIA reg 0F val A4 202 | ; io window 1 A460-A46E 203 | xchg ah, al 204 | mov dx, 3E0h 205 | or al, cs:regOffset 206 | out dx, al 207 | xchg ah, al 208 | mov dx, 3E1h 209 | out dx, al 210 | mov ax, 700h ; PCMCIA reg 07 val 0 211 | ; configure io to 8bit and wait-state 212 | xchg ah, al 213 | mov dx, 3E0h 214 | or al, cs:regOffset 215 | out dx, al 216 | xchg ah, al 217 | mov dx, 3E1h 218 | out dx, al 219 | mov ah, 3 ; reg 3 val 00 -> xC: reset, irq12 220 | xchg ah, al 221 | mov dx, 3E0h 222 | or al, cs:regOffset 223 | out dx, al 224 | mov ah, al 225 | mov dx, 3E1h 226 | in al, dx 227 | and al, 0F0h 228 | or al, 0Ch 229 | xchg ah, al 230 | mov dx, 3E0h 231 | or al, cs:regOffset 232 | out dx, al 233 | xchg ah, al 234 | mov dx, 3E1h 235 | out dx, al 236 | call sleepPC98 237 | mov si, offset CCR0 238 | mov es:(CCR0 - CCR0)[si], 1100000b ; level irq, fci 100000b 239 | mov es:(CCR1+2 - CCR1)[si], 0 240 | mov ax, 6C0h ; PCMCIA reg 06 val C0: enable both io windows 241 | xchg ah, al 242 | mov dx, 3E0h 243 | or al, cs:regOffset 244 | out dx, al 245 | xchg ah, al 246 | mov dx, 3E1h 247 | out dx, al 248 | mov al, bl ; bl is old palette mode 249 | and al, 1 ; in bit 0 250 | out 6Ah, al ; set old palette mode 251 | mov dx, offset a___enabled ; "...Enabled!\r\n$" 252 | mov ah, 9 253 | int 21h ; DOS - PRINT STRING 254 | ; DS:DX -> string terminated by "$" 255 | mov ax, 4C00h 256 | int 21h ; DOS - 2+ - QUIT WITH EXIT CODE (EXIT) 257 | start endp ; AL = exit code 258 | 259 | 260 | ; ███████████████ S U B R O U T I N E ███████████████████████████████████████ 261 | 262 | ; sleeps for 0.12s 263 | sleepPC98 proc near ; CODE XREF: start+5Ep start+203p 264 | mov cx, 50000 265 | 266 | loc_1033B: ; CODE XREF: sleepPC98+Bj 267 | out 5Fh, al ; sleeps for 0.6μs after every instruction 268 | out 5Fh, al 269 | out 5Fh, al 270 | out 5Fh, al 271 | loop loc_1033B 272 | retn 273 | sleepPC98 endp 274 | 275 | ; ─────────────────────────────────────────────────────────────────────────── 276 | 277 | printHelpExit: ; CODE XREF: start+12j 278 | mov dx, offset aUsageEna86rSxX ; "\r\nUsage: ENA86R [/Sx] x=Socket(0-3)"... 279 | mov ah, 9 280 | int 21h ; DOS - PRINT STRING 281 | ; DS:DX -> string terminated by "$" 282 | mov ax, 4CFFh 283 | int 21h ; DOS - 2+ - QUIT WITH EXIT CODE (EXIT) 284 | ; AL = exit code 285 | 286 | ; ███████████████ S U B R O U T I N E ███████████████████████████████████████ 287 | 288 | 289 | getSocketNum proc near ; CODE XREF: start+7p 290 | mov si, 81h 291 | mov cl, es:80h ; Program Segment Prefix:80h command line tail length, 292 | ; starting from 81h 293 | xor ch, ch 294 | 295 | loc_1035C: ; CODE XREF: getSocketNum+26j 296 | ; getSocketNum+50j ... 297 | call cmdlineAdvance 298 | test al, al 299 | jz locret_10372 300 | cmp al, 2Fh ; '/' 301 | jz loc_10373 302 | cmp al, 2Dh ; '-' 303 | jz loc_10373 304 | mov cs:socketNum, 0FFh 305 | nop 306 | 307 | locret_10372: ; CODE XREF: getSocketNum+Fj 308 | ; getSocketNum+37j 309 | retn 310 | ; ─────────────────────────────────────────────────────────────────────────── 311 | 312 | loc_10373: ; CODE XREF: getSocketNum+13j 313 | ; getSocketNum+17j 314 | call cmdlineAdvance 315 | test al, al 316 | jz loc_1035C 317 | cmp al, 'S' 318 | jz loc_1038B 319 | cmp al, 's' 320 | jz loc_1038B 321 | mov cs:socketNum, 0FFh 322 | nop 323 | jmp short locret_10372 324 | ; ─────────────────────────────────────────────────────────────────────────── 325 | 326 | loc_1038B: ; CODE XREF: getSocketNum+2Aj 327 | ; getSocketNum+2Ej 328 | mov bx, si 329 | call atoi 330 | jb loc_1039B 331 | sub bx, si 332 | add cx, bx 333 | cmp ax, 3 334 | jbe loc_103A4 335 | 336 | loc_1039B: ; CODE XREF: getSocketNum+3Ej 337 | mov cs:socketNum, 0FFh 338 | nop 339 | jmp short loc_1035C 340 | ; ─────────────────────────────────────────────────────────────────────────── 341 | 342 | loc_103A4: ; CODE XREF: getSocketNum+47j 343 | mov cs:socketNum, al 344 | jmp short loc_1035C 345 | getSocketNum endp 346 | 347 | 348 | ; ███████████████ S U B R O U T I N E ███████████████████████████████████████ 349 | 350 | 351 | cmdlineAdvance proc near ; CODE XREF: getSocketNum+Ap 352 | ; getSocketNum+21p ... 353 | test cx, cx 354 | jz loc_103BD 355 | mov al, es:[si] 356 | inc si 357 | dec cx 358 | test al, al 359 | jz loc_103BD 360 | cmp al, 20h ; ' ' 361 | jbe cmdlineAdvance 362 | clc 363 | retn 364 | ; ─────────────────────────────────────────────────────────────────────────── 365 | 366 | loc_103BD: ; CODE XREF: cmdlineAdvance+2j 367 | ; cmdlineAdvance+Bj 368 | xor al, al 369 | stc 370 | retn 371 | cmdlineAdvance endp 372 | 373 | 374 | ; ███████████████ S U B R O U T I N E ███████████████████████████████████████ 375 | 376 | 377 | atoi proc near ; CODE XREF: getSocketNum+3Bp 378 | push bx 379 | push si 380 | xor ax, ax 381 | 382 | loc_103C5: ; CODE XREF: atoi+2Bj 383 | mov bl, [si] 384 | cmp bl, '0' 385 | jb loc_103FB 386 | cmp bl, '9' 387 | ja loc_103FB 388 | cmp ax, 1999h 389 | ja loc_103EE 390 | add ax, ax 391 | mov bx, ax 392 | add ax, ax 393 | add ax, ax 394 | add ax, bx 395 | mov bl, [si] 396 | inc si 397 | xor bh, bh 398 | sub bl, '0' 399 | add ax, bx 400 | jb loc_103EE 401 | jmp short loc_103C5 402 | ; ─────────────────────────────────────────────────────────────────────────── 403 | 404 | loc_103EE: ; CODE XREF: atoi+13j atoi+29j 405 | mov ax, 0FFFFh 406 | stc 407 | pop si 408 | jmp short loc_10401 409 | ; ─────────────────────────────────────────────────────────────────────────── 410 | 411 | loc_103F5: ; CODE XREF: atoi+3Dj 412 | mov ax, 0 413 | stc 414 | jmp short loc_10401 415 | ; ─────────────────────────────────────────────────────────────────────────── 416 | 417 | loc_103FB: ; CODE XREF: atoi+9j atoi+Ej 418 | pop bx 419 | cmp si, bx 420 | jz loc_103F5 421 | clc 422 | 423 | loc_10401: ; CODE XREF: atoi+32j atoi+38j 424 | pop bx 425 | retn 426 | atoi endp 427 | 428 | ; ─────────────────────────────────────────────────────────────────────────── 429 | aEna86rCard86R9 db 'OPL3ENA - Generic OPL3 Enabler Version 1.0',0Dh,0Ah ; DATA XREF: starto 430 | db 'Based on ENA86R 1.11 (C) 1999-2002 By XEXYZA_7773',0Dh,0Ah, 431 | db 'Atsuko Ito, 2025',0Dh,0Ah,'$' 432 | a___enabled db '...Enabled!',0Dh,0Ah,'$' ; DATA XREF: start+22Co 433 | aUsageEna86rSxX db 0Dh,0Ah ; DATA XREF: seg000:0346o 434 | db 'Usage: OPL3ENA [/Sx] x=Socket(0-3)',0Dh,0Ah,'$' 435 | aSocket db 0Dh,0Ah ; DATA XREF: start+15o 436 | db 'Socket #$' 437 | db 0Dh,0Ah,'$' 438 | socketNum db 0 ; DATA XREF: start+Ar start+1Cr ... 439 | regOffset db 0 ; DATA XREF: start+32w start+3Er ... 440 | seg000 ends 441 | 442 | ; ═══════════════════════════════════════════════════════════════════════════ 443 | 444 | ; Segment type: Regular 445 | attrib segment byte public '' use16 446 | assume cs:attrib 447 | assume es:nothing, ss:nothing, ds:nothing, fs:nothing, gs:nothing 448 | org E0200h 449 | CCR0 db ? ; DATA XREF: start+206o start+209o 450 | db ? ; unexplored 451 | CCR1 db ? ; DATA XREF: start+20Do 452 | attrib ends 453 | 454 | 455 | end start 456 | -------------------------------------------------------------------------------- /pc_card/Z8601720ASG/QFP50P1600X1600X160-100N.kicad_mod: -------------------------------------------------------------------------------- 1 | 2 | (module QFP50P1600X1600X160-100N (layer F.Cu) (tedit 618EA0CE) 3 | (descr "") 4 | (fp_text reference REF** (at -6.42 -10.32 0) (layer F.SilkS) 5 | (effects (font (size 1.0 1.0) (thickness 0.15))) 6 | ) 7 | (fp_text value QFP50P1600X1600X160-100N (at 5.645 10.32 0) (layer F.Fab) 8 | (effects (font (size 1.0 1.0) (thickness 0.15))) 9 | ) 10 | (pad 26 smd roundrect (at -6.0 7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 11 | (pad 27 smd roundrect (at -5.5 7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 12 | (pad 28 smd roundrect (at -5.0 7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 13 | (pad 29 smd roundrect (at -4.5 7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 14 | (pad 30 smd roundrect (at -4.0 7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 15 | (pad 31 smd roundrect (at -3.5 7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 16 | (pad 32 smd roundrect (at -3.0 7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 17 | (pad 33 smd roundrect (at -2.5 7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 18 | (pad 34 smd roundrect (at -2.0 7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 19 | (pad 35 smd roundrect (at -1.5 7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 20 | (pad 36 smd roundrect (at -1.0 7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 21 | (pad 37 smd roundrect (at -0.5 7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 22 | (pad 38 smd roundrect (at 0.0 7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 23 | (pad 39 smd roundrect (at 0.5 7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 24 | (pad 40 smd roundrect (at 1.0 7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 25 | (pad 41 smd roundrect (at 1.5 7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 26 | (pad 42 smd roundrect (at 2.0 7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 27 | (pad 43 smd roundrect (at 2.5 7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 28 | (pad 44 smd roundrect (at 3.0 7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 29 | (pad 45 smd roundrect (at 3.5 7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 30 | (pad 46 smd roundrect (at 4.0 7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 31 | (pad 47 smd roundrect (at 4.5 7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 32 | (pad 48 smd roundrect (at 5.0 7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 33 | (pad 49 smd roundrect (at 5.5 7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 34 | (pad 50 smd roundrect (at 6.0 7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 35 | (pad 76 smd roundrect (at 6.0 -7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 36 | (pad 77 smd roundrect (at 5.5 -7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 37 | (pad 78 smd roundrect (at 5.0 -7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 38 | (pad 79 smd roundrect (at 4.5 -7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 39 | (pad 80 smd roundrect (at 4.0 -7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 40 | (pad 81 smd roundrect (at 3.5 -7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 41 | (pad 82 smd roundrect (at 3.0 -7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 42 | (pad 83 smd roundrect (at 2.5 -7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 43 | (pad 84 smd roundrect (at 2.0 -7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 44 | (pad 85 smd roundrect (at 1.5 -7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 45 | (pad 86 smd roundrect (at 1.0 -7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 46 | (pad 87 smd roundrect (at 0.5 -7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 47 | (pad 88 smd roundrect (at 0.0 -7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 48 | (pad 89 smd roundrect (at -0.5 -7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 49 | (pad 90 smd roundrect (at -1.0 -7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 50 | (pad 91 smd roundrect (at -1.5 -7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 51 | (pad 92 smd roundrect (at -2.0 -7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 52 | (pad 93 smd roundrect (at -2.5 -7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 53 | (pad 94 smd roundrect (at -3.0 -7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 54 | (pad 95 smd roundrect (at -3.5 -7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 55 | (pad 96 smd roundrect (at -4.0 -7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 56 | (pad 97 smd roundrect (at -4.5 -7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 57 | (pad 98 smd roundrect (at -5.0 -7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 58 | (pad 99 smd roundrect (at -5.5 -7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 59 | (pad 100 smd roundrect (at -6.0 -7.675) (roundrect_rratio 0.19) (size 0.27 1.52) (layers F.Cu F.Mask F.Paste)) 60 | (pad 1 smd roundrect (at -7.675 -6.0) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 61 | (pad 2 smd roundrect (at -7.675 -5.5) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 62 | (pad 3 smd roundrect (at -7.675 -5.0) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 63 | (pad 4 smd roundrect (at -7.675 -4.5) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 64 | (pad 5 smd roundrect (at -7.675 -4.0) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 65 | (pad 6 smd roundrect (at -7.675 -3.5) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 66 | (pad 7 smd roundrect (at -7.675 -3.0) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 67 | (pad 8 smd roundrect (at -7.675 -2.5) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 68 | (pad 9 smd roundrect (at -7.675 -2.0) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 69 | (pad 10 smd roundrect (at -7.675 -1.5) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 70 | (pad 11 smd roundrect (at -7.675 -1.0) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 71 | (pad 12 smd roundrect (at -7.675 -0.5) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 72 | (pad 13 smd roundrect (at -7.675 0.0) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 73 | (pad 14 smd roundrect (at -7.675 0.5) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 74 | (pad 15 smd roundrect (at -7.675 1.0) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 75 | (pad 16 smd roundrect (at -7.675 1.5) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 76 | (pad 17 smd roundrect (at -7.675 2.0) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 77 | (pad 18 smd roundrect (at -7.675 2.5) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 78 | (pad 19 smd roundrect (at -7.675 3.0) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 79 | (pad 20 smd roundrect (at -7.675 3.5) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 80 | (pad 21 smd roundrect (at -7.675 4.0) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 81 | (pad 22 smd roundrect (at -7.675 4.5) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 82 | (pad 23 smd roundrect (at -7.675 5.0) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 83 | (pad 24 smd roundrect (at -7.675 5.5) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 84 | (pad 25 smd roundrect (at -7.675 6.0) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 85 | (pad 51 smd roundrect (at 7.675 6.0) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 86 | (pad 52 smd roundrect (at 7.675 5.5) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 87 | (pad 53 smd roundrect (at 7.675 5.0) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 88 | (pad 54 smd roundrect (at 7.675 4.5) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 89 | (pad 55 smd roundrect (at 7.675 4.0) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 90 | (pad 56 smd roundrect (at 7.675 3.5) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 91 | (pad 57 smd roundrect (at 7.675 3.0) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 92 | (pad 58 smd roundrect (at 7.675 2.5) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 93 | (pad 59 smd roundrect (at 7.675 2.0) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 94 | (pad 60 smd roundrect (at 7.675 1.5) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 95 | (pad 61 smd roundrect (at 7.675 1.0) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 96 | (pad 62 smd roundrect (at 7.675 0.5) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 97 | (pad 63 smd roundrect (at 7.675 0.0) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 98 | (pad 64 smd roundrect (at 7.675 -0.5) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 99 | (pad 65 smd roundrect (at 7.675 -1.0) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 100 | (pad 66 smd roundrect (at 7.675 -1.5) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 101 | (pad 67 smd roundrect (at 7.675 -2.0) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 102 | (pad 68 smd roundrect (at 7.675 -2.5) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 103 | (pad 69 smd roundrect (at 7.675 -3.0) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 104 | (pad 70 smd roundrect (at 7.675 -3.5) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 105 | (pad 71 smd roundrect (at 7.675 -4.0) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 106 | (pad 72 smd roundrect (at 7.675 -4.5) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 107 | (pad 73 smd roundrect (at 7.675 -5.0) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 108 | (pad 74 smd roundrect (at 7.675 -5.5) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 109 | (pad 75 smd roundrect (at 7.675 -6.0) (roundrect_rratio 0.03) (size 1.52 0.27) (layers F.Cu F.Mask F.Paste)) 110 | (fp_circle (center -9.395 -6.0) (end -9.295 -6.0) (layer F.SilkS) (width 0.2)) 111 | (fp_circle (center -9.395 -6.0) (end -9.295 -6.0) (layer F.Fab) (width 0.2)) 112 | (fp_line (start 7.0 7.0) (end -7.0 7.0) (layer F.Fab) (width 0.127)) 113 | (fp_line (start 7.0 -7.0) (end -7.0 -7.0) (layer F.Fab) (width 0.127)) 114 | (fp_line (start 7.0 7.0) (end 7.0 -7.0) (layer F.Fab) (width 0.127)) 115 | (fp_line (start -7.0 7.0) (end -7.0 -7.0) (layer F.Fab) (width 0.127)) 116 | (fp_line (start 7.0 7.0) (end 6.455 7.0) (layer F.SilkS) (width 0.127)) 117 | (fp_line (start 7.0 -7.0) (end 6.455 -7.0) (layer F.SilkS) (width 0.127)) 118 | (fp_line (start -7.0 7.0) (end -6.455 7.0) (layer F.SilkS) (width 0.127)) 119 | (fp_line (start -7.0 -7.0) (end -6.455 -7.0) (layer F.SilkS) (width 0.127)) 120 | (fp_line (start 7.0 7.0) (end 7.0 6.455) (layer F.SilkS) (width 0.127)) 121 | (fp_line (start 7.0 -7.0) (end 7.0 -6.455) (layer F.SilkS) (width 0.127)) 122 | (fp_line (start -7.0 7.0) (end -7.0 6.455) (layer F.SilkS) (width 0.127)) 123 | (fp_line (start -7.0 -7.0) (end -7.0 -6.455) (layer F.SilkS) (width 0.127)) 124 | (fp_line (start -8.685 8.685) (end 8.685 8.685) (layer F.CrtYd) (width 0.05)) 125 | (fp_line (start -8.685 -8.685) (end 8.685 -8.685) (layer F.CrtYd) (width 0.05)) 126 | (fp_line (start -8.685 8.685) (end -8.685 -8.685) (layer F.CrtYd) (width 0.05)) 127 | (fp_line (start 8.685 8.685) (end 8.685 -8.685) (layer F.CrtYd) (width 0.05)) 128 | ) -------------------------------------------------------------------------------- /cern_ohl_s_v2.txt: -------------------------------------------------------------------------------- 1 | CERN Open Hardware Licence Version 2 - Strongly Reciprocal 2 | 3 | 4 | Preamble 5 | 6 | CERN has developed this licence to promote collaboration among 7 | hardware designers and to provide a legal tool which supports the 8 | freedom to use, study, modify, share and distribute hardware designs 9 | and products based on those designs. Version 2 of the CERN Open 10 | Hardware Licence comes in three variants: CERN-OHL-P (permissive); and 11 | two reciprocal licences: CERN-OHL-W (weakly reciprocal) and this 12 | licence, CERN-OHL-S (strongly reciprocal). 13 | 14 | The CERN-OHL-S is copyright CERN 2020. Anyone is welcome to use it, in 15 | unmodified form only. 16 | 17 | Use of this Licence does not imply any endorsement by CERN of any 18 | Licensor or their designs nor does it imply any involvement by CERN in 19 | their development. 20 | 21 | 22 | 1 Definitions 23 | 24 | 1.1 'Licence' means this CERN-OHL-S. 25 | 26 | 1.2 'Compatible Licence' means 27 | 28 | a) any earlier version of the CERN Open Hardware licence, or 29 | 30 | b) any version of the CERN-OHL-S, or 31 | 32 | c) any licence which permits You to treat the Source to which 33 | it applies as licensed under CERN-OHL-S provided that on 34 | Conveyance of any such Source, or any associated Product You 35 | treat the Source in question as being licensed under 36 | CERN-OHL-S. 37 | 38 | 1.3 'Source' means information such as design materials or digital 39 | code which can be applied to Make or test a Product or to 40 | prepare a Product for use, Conveyance or sale, regardless of its 41 | medium or how it is expressed. It may include Notices. 42 | 43 | 1.4 'Covered Source' means Source that is explicitly made available 44 | under this Licence. 45 | 46 | 1.5 'Product' means any device, component, work or physical object, 47 | whether in finished or intermediate form, arising from the use, 48 | application or processing of Covered Source. 49 | 50 | 1.6 'Make' means to create or configure something, whether by 51 | manufacture, assembly, compiling, loading or applying Covered 52 | Source or another Product or otherwise. 53 | 54 | 1.7 'Available Component' means any part, sub-assembly, library or 55 | code which: 56 | 57 | a) is licensed to You as Complete Source under a Compatible 58 | Licence; or 59 | 60 | b) is available, at the time a Product or the Source containing 61 | it is first Conveyed, to You and any other prospective 62 | licensees 63 | 64 | i) as a physical part with sufficient rights and 65 | information (including any configuration and 66 | programming files and information about its 67 | characteristics and interfaces) to enable it either to 68 | be Made itself, or to be sourced and used to Make the 69 | Product; or 70 | ii) as part of the normal distribution of a tool used to 71 | design or Make the Product. 72 | 73 | 1.8 'Complete Source' means the set of all Source necessary to Make 74 | a Product, in the preferred form for making modifications, 75 | including necessary installation and interfacing information 76 | both for the Product, and for any included Available Components. 77 | If the format is proprietary, it must also be made available in 78 | a format (if the proprietary tool can create it) which is 79 | viewable with a tool available to potential licensees and 80 | licensed under a licence approved by the Free Software 81 | Foundation or the Open Source Initiative. Complete Source need 82 | not include the Source of any Available Component, provided that 83 | You include in the Complete Source sufficient information to 84 | enable a recipient to Make or source and use the Available 85 | Component to Make the Product. 86 | 87 | 1.9 'Source Location' means a location where a Licensor has placed 88 | Covered Source, and which that Licensor reasonably believes will 89 | remain easily accessible for at least three years for anyone to 90 | obtain a digital copy. 91 | 92 | 1.10 'Notice' means copyright, acknowledgement and trademark notices, 93 | Source Location references, modification notices (subsection 94 | 3.3(b)) and all notices that refer to this Licence and to the 95 | disclaimer of warranties that are included in the Covered 96 | Source. 97 | 98 | 1.11 'Licensee' or 'You' means any person exercising rights under 99 | this Licence. 100 | 101 | 1.12 'Licensor' means a natural or legal person who creates or 102 | modifies Covered Source. A person may be a Licensee and a 103 | Licensor at the same time. 104 | 105 | 1.13 'Convey' means to communicate to the public or distribute. 106 | 107 | 108 | 2 Applicability 109 | 110 | 2.1 This Licence governs the use, copying, modification, Conveying 111 | of Covered Source and Products, and the Making of Products. By 112 | exercising any right granted under this Licence, You irrevocably 113 | accept these terms and conditions. 114 | 115 | 2.2 This Licence is granted by the Licensor directly to You, and 116 | shall apply worldwide and without limitation in time. 117 | 118 | 2.3 You shall not attempt to restrict by contract or otherwise the 119 | rights granted under this Licence to other Licensees. 120 | 121 | 2.4 This Licence is not intended to restrict fair use, fair dealing, 122 | or any other similar right. 123 | 124 | 125 | 3 Copying, Modifying and Conveying Covered Source 126 | 127 | 3.1 You may copy and Convey verbatim copies of Covered Source, in 128 | any medium, provided You retain all Notices. 129 | 130 | 3.2 You may modify Covered Source, other than Notices, provided that 131 | You irrevocably undertake to make that modified Covered Source 132 | available from a Source Location should You Convey a Product in 133 | circumstances where the recipient does not otherwise receive a 134 | copy of the modified Covered Source. In each case subsection 3.3 135 | shall apply. 136 | 137 | You may only delete Notices if they are no longer applicable to 138 | the corresponding Covered Source as modified by You and You may 139 | add additional Notices applicable to Your modifications. 140 | Including Covered Source in a larger work is modifying the 141 | Covered Source, and the larger work becomes modified Covered 142 | Source. 143 | 144 | 3.3 You may Convey modified Covered Source (with the effect that You 145 | shall also become a Licensor) provided that You: 146 | 147 | a) retain Notices as required in subsection 3.2; 148 | 149 | b) add a Notice to the modified Covered Source stating that You 150 | have modified it, with the date and brief description of how 151 | You have modified it; 152 | 153 | c) add a Source Location Notice for the modified Covered Source 154 | if You Convey in circumstances where the recipient does not 155 | otherwise receive a copy of the modified Covered Source; and 156 | 157 | d) license the modified Covered Source under the terms and 158 | conditions of this Licence (or, as set out in subsection 159 | 8.3, a later version, if permitted by the licence of the 160 | original Covered Source). Such modified Covered Source must 161 | be licensed as a whole, but excluding Available Components 162 | contained in it, which remain licensed under their own 163 | applicable licences. 164 | 165 | 166 | 4 Making and Conveying Products 167 | 168 | You may Make Products, and/or Convey them, provided that You either 169 | provide each recipient with a copy of the Complete Source or ensure 170 | that each recipient is notified of the Source Location of the Complete 171 | Source. That Complete Source is Covered Source, and You must 172 | accordingly satisfy Your obligations set out in subsection 3.3. If 173 | specified in a Notice, the Product must visibly and securely display 174 | the Source Location on it or its packaging or documentation in the 175 | manner specified in that Notice. 176 | 177 | 178 | 5 Research and Development 179 | 180 | You may Convey Covered Source, modified Covered Source or Products to 181 | a legal entity carrying out development, testing or quality assurance 182 | work on Your behalf provided that the work is performed on terms which 183 | prevent the entity from both using the Source or Products for its own 184 | internal purposes and Conveying the Source or Products or any 185 | modifications to them to any person other than You. Any modifications 186 | made by the entity shall be deemed to be made by You pursuant to 187 | subsection 3.2. 188 | 189 | 190 | 6 DISCLAIMER AND LIABILITY 191 | 192 | 6.1 DISCLAIMER OF WARRANTY -- The Covered Source and any Products 193 | are provided 'as is' and any express or implied warranties, 194 | including, but not limited to, implied warranties of 195 | merchantability, of satisfactory quality, non-infringement of 196 | third party rights, and fitness for a particular purpose or use 197 | are disclaimed in respect of any Source or Product to the 198 | maximum extent permitted by law. The Licensor makes no 199 | representation that any Source or Product does not or will not 200 | infringe any patent, copyright, trade secret or other 201 | proprietary right. The entire risk as to the use, quality, and 202 | performance of any Source or Product shall be with You and not 203 | the Licensor. This disclaimer of warranty is an essential part 204 | of this Licence and a condition for the grant of any rights 205 | granted under this Licence. 206 | 207 | 6.2 EXCLUSION AND LIMITATION OF LIABILITY -- The Licensor shall, to 208 | the maximum extent permitted by law, have no liability for 209 | direct, indirect, special, incidental, consequential, exemplary, 210 | punitive or other damages of any character including, without 211 | limitation, procurement of substitute goods or services, loss of 212 | use, data or profits, or business interruption, however caused 213 | and on any theory of contract, warranty, tort (including 214 | negligence), product liability or otherwise, arising in any way 215 | in relation to the Covered Source, modified Covered Source 216 | and/or the Making or Conveyance of a Product, even if advised of 217 | the possibility of such damages, and You shall hold the 218 | Licensor(s) free and harmless from any liability, costs, 219 | damages, fees and expenses, including claims by third parties, 220 | in relation to such use. 221 | 222 | 223 | 7 Patents 224 | 225 | 7.1 Subject to the terms and conditions of this Licence, each 226 | Licensor hereby grants to You a perpetual, worldwide, 227 | non-exclusive, no-charge, royalty-free, irrevocable (except as 228 | stated in subsections 7.2 and 8.4) patent licence to Make, have 229 | Made, use, offer to sell, sell, import, and otherwise transfer 230 | the Covered Source and Products, where such licence applies only 231 | to those patent claims licensable by such Licensor that are 232 | necessarily infringed by exercising rights under the Covered 233 | Source as Conveyed by that Licensor. 234 | 235 | 7.2 If You institute patent litigation against any entity (including 236 | a cross-claim or counterclaim in a lawsuit) alleging that the 237 | Covered Source or a Product constitutes direct or contributory 238 | patent infringement, or You seek any declaration that a patent 239 | licensed to You under this Licence is invalid or unenforceable 240 | then any rights granted to You under this Licence shall 241 | terminate as of the date such process is initiated. 242 | 243 | 244 | 8 General 245 | 246 | 8.1 If any provisions of this Licence are or subsequently become 247 | invalid or unenforceable for any reason, the remaining 248 | provisions shall remain effective. 249 | 250 | 8.2 You shall not use any of the name (including acronyms and 251 | abbreviations), image, or logo by which the Licensor or CERN is 252 | known, except where needed to comply with section 3, or where 253 | the use is otherwise allowed by law. Any such permitted use 254 | shall be factual and shall not be made so as to suggest any kind 255 | of endorsement or implication of involvement by the Licensor or 256 | its personnel. 257 | 258 | 8.3 CERN may publish updated versions and variants of this Licence 259 | which it considers to be in the spirit of this version, but may 260 | differ in detail to address new problems or concerns. New 261 | versions will be published with a unique version number and a 262 | variant identifier specifying the variant. If the Licensor has 263 | specified that a given variant applies to the Covered Source 264 | without specifying a version, You may treat that Covered Source 265 | as being released under any version of the CERN-OHL with that 266 | variant. If no variant is specified, the Covered Source shall be 267 | treated as being released under CERN-OHL-S. The Licensor may 268 | also specify that the Covered Source is subject to a specific 269 | version of the CERN-OHL or any later version in which case You 270 | may apply this or any later version of CERN-OHL with the same 271 | variant identifier published by CERN. 272 | 273 | 8.4 This Licence shall terminate with immediate effect if You fail 274 | to comply with any of its terms and conditions. 275 | 276 | 8.5 However, if You cease all breaches of this Licence, then Your 277 | Licence from any Licensor is reinstated unless such Licensor has 278 | terminated this Licence by giving You, while You remain in 279 | breach, a notice specifying the breach and requiring You to cure 280 | it within 30 days, and You have failed to come into compliance 281 | in all material respects by the end of the 30 day period. Should 282 | You repeat the breach after receipt of a cure notice and 283 | subsequent reinstatement, this Licence will terminate 284 | immediately and permanently. Section 6 shall continue to apply 285 | after any termination. 286 | 287 | 8.6 This Licence shall not be enforceable except by a Licensor 288 | acting as such, and third party beneficiary rights are 289 | specifically excluded. 290 | -------------------------------------------------------------------------------- /devboard/fpchp.kicad_pro: -------------------------------------------------------------------------------- 1 | { 2 | "board": { 3 | "3dviewports": [], 4 | "design_settings": { 5 | "defaults": { 6 | "apply_defaults_to_fp_fields": false, 7 | "apply_defaults_to_fp_shapes": false, 8 | "apply_defaults_to_fp_text": false, 9 | "board_outline_line_width": 0.05, 10 | "copper_line_width": 0.2, 11 | "copper_text_italic": false, 12 | "copper_text_size_h": 1.5, 13 | "copper_text_size_v": 1.5, 14 | "copper_text_thickness": 0.3, 15 | "copper_text_upright": false, 16 | "courtyard_line_width": 0.05, 17 | "dimension_precision": 4, 18 | "dimension_units": 3, 19 | "dimensions": { 20 | "arrow_length": 1270000, 21 | "extension_offset": 500000, 22 | "keep_text_aligned": true, 23 | "suppress_zeroes": false, 24 | "text_position": 0, 25 | "units_format": 1 26 | }, 27 | "fab_line_width": 0.1, 28 | "fab_text_italic": false, 29 | "fab_text_size_h": 1.0, 30 | "fab_text_size_v": 1.0, 31 | "fab_text_thickness": 0.15, 32 | "fab_text_upright": false, 33 | "other_line_width": 0.1, 34 | "other_text_italic": false, 35 | "other_text_size_h": 1.0, 36 | "other_text_size_v": 1.0, 37 | "other_text_thickness": 0.15, 38 | "other_text_upright": false, 39 | "pads": { 40 | "drill": 0.762, 41 | "height": 1.524, 42 | "width": 1.524 43 | }, 44 | "silk_line_width": 0.1, 45 | "silk_text_italic": false, 46 | "silk_text_size_h": 1.0, 47 | "silk_text_size_v": 1.0, 48 | "silk_text_thickness": 0.1, 49 | "silk_text_upright": false, 50 | "zones": { 51 | "min_clearance": 0.2 52 | } 53 | }, 54 | "diff_pair_dimensions": [ 55 | { 56 | "gap": 0.0, 57 | "via_gap": 0.0, 58 | "width": 0.0 59 | } 60 | ], 61 | "drc_exclusions": [], 62 | "meta": { 63 | "version": 2 64 | }, 65 | "rule_severities": { 66 | "annular_width": "error", 67 | "clearance": "error", 68 | "connection_width": "warning", 69 | "copper_edge_clearance": "error", 70 | "copper_sliver": "warning", 71 | "courtyards_overlap": "error", 72 | "diff_pair_gap_out_of_range": "error", 73 | "diff_pair_uncoupled_length_too_long": "error", 74 | "drill_out_of_range": "error", 75 | "duplicate_footprints": "warning", 76 | "extra_footprint": "warning", 77 | "footprint": "error", 78 | "footprint_symbol_mismatch": "warning", 79 | "footprint_type_mismatch": "ignore", 80 | "hole_clearance": "error", 81 | "hole_near_hole": "error", 82 | "holes_co_located": "warning", 83 | "invalid_outline": "error", 84 | "isolated_copper": "warning", 85 | "item_on_disabled_layer": "error", 86 | "items_not_allowed": "error", 87 | "length_out_of_range": "error", 88 | "lib_footprint_issues": "warning", 89 | "lib_footprint_mismatch": "warning", 90 | "malformed_courtyard": "error", 91 | "microvia_drill_out_of_range": "error", 92 | "missing_courtyard": "ignore", 93 | "missing_footprint": "warning", 94 | "net_conflict": "warning", 95 | "npth_inside_courtyard": "ignore", 96 | "padstack": "warning", 97 | "pth_inside_courtyard": "ignore", 98 | "shorting_items": "error", 99 | "silk_edge_clearance": "warning", 100 | "silk_over_copper": "warning", 101 | "silk_overlap": "warning", 102 | "skew_out_of_range": "error", 103 | "solder_mask_bridge": "error", 104 | "starved_thermal": "error", 105 | "text_height": "warning", 106 | "text_thickness": "warning", 107 | "through_hole_pad_without_hole": "error", 108 | "too_many_vias": "error", 109 | "track_dangling": "warning", 110 | "track_width": "error", 111 | "tracks_crossing": "error", 112 | "unconnected_items": "error", 113 | "unresolved_variable": "error", 114 | "via_dangling": "warning", 115 | "zones_intersect": "error" 116 | }, 117 | "rules": { 118 | "max_error": 0.005, 119 | "min_clearance": 0.0, 120 | "min_connection": 0.0, 121 | "min_copper_edge_clearance": 0.5, 122 | "min_hole_clearance": 0.25, 123 | "min_hole_to_hole": 0.25, 124 | "min_microvia_diameter": 0.2, 125 | "min_microvia_drill": 0.1, 126 | "min_resolved_spokes": 2, 127 | "min_silk_clearance": 0.0, 128 | "min_text_height": 0.8, 129 | "min_text_thickness": 0.08, 130 | "min_through_hole_diameter": 0.3, 131 | "min_track_width": 0.0, 132 | "min_via_annular_width": 0.1, 133 | "min_via_diameter": 0.5, 134 | "solder_mask_to_copper_clearance": 0.0, 135 | "use_height_for_length_calcs": true 136 | }, 137 | "teardrop_options": [ 138 | { 139 | "td_onpadsmd": true, 140 | "td_onroundshapesonly": false, 141 | "td_ontrackend": false, 142 | "td_onviapad": true 143 | } 144 | ], 145 | "teardrop_parameters": [ 146 | { 147 | "td_allow_use_two_tracks": true, 148 | "td_curve_segcount": 0, 149 | "td_height_ratio": 1.0, 150 | "td_length_ratio": 0.5, 151 | "td_maxheight": 2.0, 152 | "td_maxlen": 1.0, 153 | "td_on_pad_in_zone": false, 154 | "td_target_name": "td_round_shape", 155 | "td_width_to_size_filter_ratio": 0.9 156 | }, 157 | { 158 | "td_allow_use_two_tracks": true, 159 | "td_curve_segcount": 0, 160 | "td_height_ratio": 1.0, 161 | "td_length_ratio": 0.5, 162 | "td_maxheight": 2.0, 163 | "td_maxlen": 1.0, 164 | "td_on_pad_in_zone": false, 165 | "td_target_name": "td_rect_shape", 166 | "td_width_to_size_filter_ratio": 0.9 167 | }, 168 | { 169 | "td_allow_use_two_tracks": true, 170 | "td_curve_segcount": 0, 171 | "td_height_ratio": 1.0, 172 | "td_length_ratio": 0.5, 173 | "td_maxheight": 2.0, 174 | "td_maxlen": 1.0, 175 | "td_on_pad_in_zone": false, 176 | "td_target_name": "td_track_end", 177 | "td_width_to_size_filter_ratio": 0.9 178 | } 179 | ], 180 | "track_widths": [ 181 | 0.0 182 | ], 183 | "tuning_pattern_settings": { 184 | "diff_pair_defaults": { 185 | "corner_radius_percentage": 80, 186 | "corner_style": 1, 187 | "max_amplitude": 1.0, 188 | "min_amplitude": 0.2, 189 | "single_sided": false, 190 | "spacing": 1.0 191 | }, 192 | "diff_pair_skew_defaults": { 193 | "corner_radius_percentage": 80, 194 | "corner_style": 1, 195 | "max_amplitude": 1.0, 196 | "min_amplitude": 0.2, 197 | "single_sided": false, 198 | "spacing": 0.6 199 | }, 200 | "single_track_defaults": { 201 | "corner_radius_percentage": 80, 202 | "corner_style": 1, 203 | "max_amplitude": 1.0, 204 | "min_amplitude": 0.2, 205 | "single_sided": false, 206 | "spacing": 0.6 207 | } 208 | }, 209 | "via_dimensions": [ 210 | { 211 | "diameter": 0.0, 212 | "drill": 0.0 213 | } 214 | ], 215 | "zones_allow_external_fillets": false 216 | }, 217 | "ipc2581": { 218 | "dist": "", 219 | "distpn": "", 220 | "internal_id": "", 221 | "mfg": "", 222 | "mpn": "" 223 | }, 224 | "layer_presets": [], 225 | "viewports": [] 226 | }, 227 | "boards": [], 228 | "cvpcb": { 229 | "equivalence_files": [] 230 | }, 231 | "erc": { 232 | "erc_exclusions": [], 233 | "meta": { 234 | "version": 0 235 | }, 236 | "pin_map": [ 237 | [ 238 | 0, 239 | 0, 240 | 0, 241 | 0, 242 | 0, 243 | 0, 244 | 1, 245 | 0, 246 | 0, 247 | 0, 248 | 0, 249 | 2 250 | ], 251 | [ 252 | 0, 253 | 2, 254 | 0, 255 | 1, 256 | 0, 257 | 0, 258 | 1, 259 | 0, 260 | 2, 261 | 2, 262 | 2, 263 | 2 264 | ], 265 | [ 266 | 0, 267 | 0, 268 | 0, 269 | 0, 270 | 0, 271 | 0, 272 | 1, 273 | 0, 274 | 1, 275 | 0, 276 | 1, 277 | 2 278 | ], 279 | [ 280 | 0, 281 | 1, 282 | 0, 283 | 0, 284 | 0, 285 | 0, 286 | 1, 287 | 1, 288 | 2, 289 | 1, 290 | 1, 291 | 2 292 | ], 293 | [ 294 | 0, 295 | 0, 296 | 0, 297 | 0, 298 | 0, 299 | 0, 300 | 1, 301 | 0, 302 | 0, 303 | 0, 304 | 0, 305 | 2 306 | ], 307 | [ 308 | 0, 309 | 0, 310 | 0, 311 | 0, 312 | 0, 313 | 0, 314 | 0, 315 | 0, 316 | 0, 317 | 0, 318 | 0, 319 | 2 320 | ], 321 | [ 322 | 1, 323 | 1, 324 | 1, 325 | 1, 326 | 1, 327 | 0, 328 | 1, 329 | 1, 330 | 1, 331 | 1, 332 | 1, 333 | 2 334 | ], 335 | [ 336 | 0, 337 | 0, 338 | 0, 339 | 1, 340 | 0, 341 | 0, 342 | 1, 343 | 0, 344 | 0, 345 | 0, 346 | 0, 347 | 2 348 | ], 349 | [ 350 | 0, 351 | 2, 352 | 1, 353 | 2, 354 | 0, 355 | 0, 356 | 1, 357 | 0, 358 | 2, 359 | 2, 360 | 2, 361 | 2 362 | ], 363 | [ 364 | 0, 365 | 2, 366 | 0, 367 | 1, 368 | 0, 369 | 0, 370 | 1, 371 | 0, 372 | 2, 373 | 0, 374 | 0, 375 | 2 376 | ], 377 | [ 378 | 0, 379 | 2, 380 | 1, 381 | 1, 382 | 0, 383 | 0, 384 | 1, 385 | 0, 386 | 2, 387 | 0, 388 | 0, 389 | 2 390 | ], 391 | [ 392 | 2, 393 | 2, 394 | 2, 395 | 2, 396 | 2, 397 | 2, 398 | 2, 399 | 2, 400 | 2, 401 | 2, 402 | 2, 403 | 2 404 | ] 405 | ], 406 | "rule_severities": { 407 | "bus_definition_conflict": "error", 408 | "bus_entry_needed": "error", 409 | "bus_to_bus_conflict": "error", 410 | "bus_to_net_conflict": "error", 411 | "conflicting_netclasses": "error", 412 | "different_unit_footprint": "error", 413 | "different_unit_net": "error", 414 | "duplicate_reference": "error", 415 | "duplicate_sheet_names": "error", 416 | "endpoint_off_grid": "warning", 417 | "extra_units": "error", 418 | "global_label_dangling": "warning", 419 | "hier_label_mismatch": "error", 420 | "label_dangling": "error", 421 | "lib_symbol_issues": "warning", 422 | "missing_bidi_pin": "warning", 423 | "missing_input_pin": "warning", 424 | "missing_power_pin": "error", 425 | "missing_unit": "warning", 426 | "multiple_net_names": "warning", 427 | "net_not_bus_member": "warning", 428 | "no_connect_connected": "warning", 429 | "no_connect_dangling": "warning", 430 | "pin_not_connected": "error", 431 | "pin_not_driven": "error", 432 | "pin_to_pin": "error", 433 | "power_pin_not_driven": "error", 434 | "similar_labels": "warning", 435 | "simulation_model_issue": "ignore", 436 | "unannotated": "error", 437 | "unit_value_mismatch": "error", 438 | "unresolved_variable": "error", 439 | "wire_dangling": "error" 440 | } 441 | }, 442 | "libraries": { 443 | "pinned_footprint_libs": [], 444 | "pinned_symbol_libs": [] 445 | }, 446 | "meta": { 447 | "filename": "fpchp.kicad_pro", 448 | "version": 1 449 | }, 450 | "net_settings": { 451 | "classes": [ 452 | { 453 | "bus_width": 12, 454 | "clearance": 0.2, 455 | "diff_pair_gap": 0.25, 456 | "diff_pair_via_gap": 0.25, 457 | "diff_pair_width": 0.2, 458 | "line_style": 0, 459 | "microvia_diameter": 0.3, 460 | "microvia_drill": 0.1, 461 | "name": "Default", 462 | "pcb_color": "rgba(0, 0, 0, 0.000)", 463 | "schematic_color": "rgba(0, 0, 0, 0.000)", 464 | "track_width": 0.2, 465 | "via_diameter": 0.6, 466 | "via_drill": 0.3, 467 | "wire_width": 6 468 | } 469 | ], 470 | "meta": { 471 | "version": 3 472 | }, 473 | "net_colors": null, 474 | "netclass_assignments": null, 475 | "netclass_patterns": [] 476 | }, 477 | "pcbnew": { 478 | "last_paths": { 479 | "gencad": "", 480 | "idf": "", 481 | "netlist": "", 482 | "plot": "fpc-hp/", 483 | "pos_files": "placement", 484 | "specctra_dsn": "", 485 | "step": "fpchp.step", 486 | "svg": "", 487 | "vrml": "" 488 | }, 489 | "page_layout_descr_file": "" 490 | }, 491 | "schematic": { 492 | "annotate_start_num": 0, 493 | "bom_export_filename": "", 494 | "bom_fmt_presets": [], 495 | "bom_fmt_settings": { 496 | "field_delimiter": ",", 497 | "keep_line_breaks": false, 498 | "keep_tabs": false, 499 | "name": "CSV", 500 | "ref_delimiter": ",", 501 | "ref_range_delimiter": "", 502 | "string_delimiter": "\"" 503 | }, 504 | "bom_presets": [], 505 | "bom_settings": { 506 | "exclude_dnp": false, 507 | "fields_ordered": [ 508 | { 509 | "group_by": false, 510 | "label": "Reference", 511 | "name": "Reference", 512 | "show": true 513 | }, 514 | { 515 | "group_by": true, 516 | "label": "Value", 517 | "name": "Value", 518 | "show": true 519 | }, 520 | { 521 | "group_by": false, 522 | "label": "Datasheet", 523 | "name": "Datasheet", 524 | "show": true 525 | }, 526 | { 527 | "group_by": false, 528 | "label": "Footprint", 529 | "name": "Footprint", 530 | "show": true 531 | }, 532 | { 533 | "group_by": false, 534 | "label": "Qty", 535 | "name": "${QUANTITY}", 536 | "show": true 537 | }, 538 | { 539 | "group_by": true, 540 | "label": "DNP", 541 | "name": "${DNP}", 542 | "show": true 543 | }, 544 | { 545 | "group_by": false, 546 | "label": "#", 547 | "name": "${ITEM_NUMBER}", 548 | "show": false 549 | }, 550 | { 551 | "group_by": false, 552 | "label": "Manufacturer_Part_Number", 553 | "name": "Manufacturer_Part_Number", 554 | "show": false 555 | }, 556 | { 557 | "group_by": false, 558 | "label": "Mouser Part Number", 559 | "name": "Mouser Part Number", 560 | "show": false 561 | }, 562 | { 563 | "group_by": false, 564 | "label": "Description", 565 | "name": "Description", 566 | "show": false 567 | } 568 | ], 569 | "filter_string": "", 570 | "group_symbols": true, 571 | "name": "", 572 | "sort_asc": true, 573 | "sort_field": "Reference" 574 | }, 575 | "connection_grid_size": 50.0, 576 | "drawing": { 577 | "dashed_lines_dash_length_ratio": 12.0, 578 | "dashed_lines_gap_length_ratio": 3.0, 579 | "default_line_thickness": 6.0, 580 | "default_text_size": 50.0, 581 | "field_names": [], 582 | "intersheets_ref_own_page": false, 583 | "intersheets_ref_prefix": "", 584 | "intersheets_ref_short": false, 585 | "intersheets_ref_show": false, 586 | "intersheets_ref_suffix": "", 587 | "junction_size_choice": 3, 588 | "label_size_ratio": 0.375, 589 | "operating_point_overlay_i_precision": 3, 590 | "operating_point_overlay_i_range": "~A", 591 | "operating_point_overlay_v_precision": 3, 592 | "operating_point_overlay_v_range": "~V", 593 | "overbar_offset_ratio": 1.23, 594 | "pin_symbol_size": 25.0, 595 | "text_offset_ratio": 0.15 596 | }, 597 | "legacy_lib_dir": "", 598 | "legacy_lib_list": [], 599 | "meta": { 600 | "version": 1 601 | }, 602 | "net_format_name": "", 603 | "page_layout_descr_file": "", 604 | "plot_directory": "", 605 | "spice_current_sheet_as_root": false, 606 | "spice_external_command": "spice \"%I\"", 607 | "spice_model_current_sheet_as_root": true, 608 | "spice_save_all_currents": false, 609 | "spice_save_all_dissipations": false, 610 | "spice_save_all_voltages": false, 611 | "subpart_first_id": 65, 612 | "subpart_id_separator": 0 613 | }, 614 | "sheets": [ 615 | [ 616 | "faab817f-b6ec-4c9a-89e4-4a245e864441", 617 | "Root" 618 | ], 619 | [ 620 | "d8e66c7b-3e47-400d-8a75-fb9ee73461d7", 621 | "POD1" 622 | ], 623 | [ 624 | "3a1caf83-9504-46fe-a528-6e71e042d356", 625 | "terminator1" 626 | ], 627 | [ 628 | "33155913-8fd2-4681-9849-95e8dafc8267", 629 | "terminator2" 630 | ], 631 | [ 632 | "fcbf96ed-c5f3-45c1-9f81-e8ea562ba186", 633 | "terminator3" 634 | ], 635 | [ 636 | "24aab49d-b0d2-4e2b-be24-3c33c339ab8f", 637 | "terminator4" 638 | ], 639 | [ 640 | "e7ea7a52-32ce-4def-97cd-3a14e8370647", 641 | "terminator5" 642 | ], 643 | [ 644 | "e3a7335a-4b2c-4c0f-9274-07de399d069f", 645 | "terminator6" 646 | ], 647 | [ 648 | "cca65fe9-7f17-46a9-851b-55b8e9d228df", 649 | "terminator7" 650 | ], 651 | [ 652 | "c028d75e-864c-4154-88e8-773059836fb2", 653 | "terminator8" 654 | ], 655 | [ 656 | "bf344a03-38fe-49c1-963c-7072219c9df0", 657 | "terminator9" 658 | ] 659 | ], 660 | "text_variables": {} 661 | } 662 | -------------------------------------------------------------------------------- /pc_card/Hirose/IC1F-68RD-1.27SF_52.pretty/IC1F-68RD-1.27SF(52).kicad_mod: -------------------------------------------------------------------------------- 1 | (footprint "IC1F-68RD-1.27SF(52)" 2 | (version 20240108) 3 | (generator "pcbnew") 4 | (generator_version "8.0") 5 | (layer "F.Cu") 6 | (descr "IC1F-68RD-1.27SF(52)") 7 | (tags "Connector") 8 | (property "Reference" "J**" 9 | (at 0.04 7.75 0) 10 | (layer "F.SilkS") 11 | (uuid "f5dba8e0-c893-4aff-8fe3-fae889cd1ecd") 12 | (effects 13 | (font 14 | (size 1.27 1.27) 15 | (thickness 0.254) 16 | ) 17 | ) 18 | ) 19 | (property "Value" "IC1F-68RD-1.27SF(52)" 20 | (at 0.04 5.26 0) 21 | (layer "F.Fab") 22 | (hide yes) 23 | (uuid "73117afa-5aa8-4917-ad9c-6c47e415ffeb") 24 | (effects 25 | (font 26 | (size 1.27 1.27) 27 | (thickness 0.254) 28 | ) 29 | ) 30 | ) 31 | (property "Footprint" "" 32 | (at -21.255 -4.745 0) 33 | (layer "F.Fab") 34 | (hide yes) 35 | (uuid "78674d86-2456-4a59-aae9-21ef0a27478c") 36 | (effects 37 | (font 38 | (size 1.27 1.27) 39 | (thickness 0.15) 40 | ) 41 | ) 42 | ) 43 | (property "Datasheet" "" 44 | (at -21.255 -4.745 0) 45 | (layer "F.Fab") 46 | (hide yes) 47 | (uuid "eb48f3d7-2e54-4e07-a1a3-127da328057d") 48 | (effects 49 | (font 50 | (size 1.27 1.27) 51 | (thickness 0.15) 52 | ) 53 | ) 54 | ) 55 | (property "Description" "" 56 | (at -21.255 -4.745 0) 57 | (layer "F.Fab") 58 | (hide yes) 59 | (uuid "0e4dfbbc-707c-4244-ba04-19e13c3c7cd0") 60 | (effects 61 | (font 62 | (size 1.27 1.27) 63 | (thickness 0.15) 64 | ) 65 | ) 66 | ) 67 | (attr smd) 68 | (fp_circle 69 | (center -22.525 -5.142) 70 | (end -22.425 -5.142) 71 | (stroke 72 | (width 0.12) 73 | (type solid) 74 | ) 75 | (fill none) 76 | (layer "F.SilkS") 77 | (uuid "1d2352a0-f056-419d-a4c7-eaca1b466580") 78 | ) 79 | (fp_rect 80 | (start -22.23 -2.492) 81 | (end 22.23 3.508) 82 | (stroke 83 | (width 0.1) 84 | (type solid) 85 | ) 86 | (fill solid) 87 | (layer "Dwgs.User") 88 | (uuid "0a93b1fa-8751-445f-8692-75ef19c2d252") 89 | ) 90 | (fp_rect 91 | (start -23.755 -4.495) 92 | (end 23.705 3.535) 93 | (stroke 94 | (width 0.05) 95 | (type default) 96 | ) 97 | (fill none) 98 | (layer "F.CrtYd") 99 | (uuid "932b9a65-050a-4822-8c41-34ca0f17a752") 100 | ) 101 | (fp_line 102 | (start -22.525 -6.269) 103 | (end 21.925 -6.269) 104 | (stroke 105 | (width 0.1524) 106 | (type solid) 107 | ) 108 | (layer "F.Fab") 109 | (uuid "a7367e24-17ec-4914-b5b5-f69209cb4be9") 110 | ) 111 | (fp_line 112 | (start -22.525 -0.935) 113 | (end 21.925 -0.935) 114 | (stroke 115 | (width 0.1524) 116 | (type solid) 117 | ) 118 | (layer "F.Fab") 119 | (uuid "5835b0a9-16ff-4ab7-b852-673059818fe1") 120 | ) 121 | (dimension 122 | (type orthogonal) 123 | (layer "Dwgs.User") 124 | (uuid "03b0d8d0-e52f-4ee2-b594-f879c90e5560") 125 | (pts 126 | (xy -22.23 3.508) (xy 22.23 3.508) 127 | ) 128 | (height -8.143) 129 | (orientation 0) 130 | (gr_text "44.4600 mm" 131 | (at 0 -5.785 0) 132 | (layer "Dwgs.User") 133 | (uuid "03b0d8d0-e52f-4ee2-b594-f879c90e5560") 134 | (effects 135 | (font 136 | (size 1 1) 137 | (thickness 0.15) 138 | ) 139 | ) 140 | ) 141 | (format 142 | (prefix "") 143 | (suffix "") 144 | (units 3) 145 | (units_format 1) 146 | (precision 4) 147 | ) 148 | (style 149 | (thickness 0.1) 150 | (arrow_length 1.27) 151 | (text_position_mode 0) 152 | (extension_height 0.58642) 153 | (extension_offset 0.5) keep_text_aligned) 154 | ) 155 | (dimension 156 | (type orthogonal) 157 | (layer "Dwgs.User") 158 | (uuid "15b7d602-175d-4746-8b26-22a76e45a03b") 159 | (pts 160 | (xy -22.23 -3.692) (xy -22.23 -2.492) 161 | ) 162 | (height -5.96) 163 | (orientation 1) 164 | (gr_text "1.2000 mm" 165 | (at -29.89 -4.972 90) 166 | (layer "Dwgs.User") 167 | (uuid "15b7d602-175d-4746-8b26-22a76e45a03b") 168 | (effects 169 | (font 170 | (size 1 1) 171 | (thickness 0.15) 172 | ) 173 | ) 174 | ) 175 | (format 176 | (prefix "") 177 | (suffix "") 178 | (units 3) 179 | (units_format 1) 180 | (precision 4) 181 | ) 182 | (style 183 | (thickness 0.1) 184 | (arrow_length 1.27) 185 | (text_position_mode 2) 186 | (extension_height 0.58642) 187 | (extension_offset 0.5) keep_text_aligned) 188 | ) 189 | (dimension 190 | (type orthogonal) 191 | (layer "Dwgs.User") 192 | (uuid "2138e132-5036-4764-b8f4-c52fc6384b80") 193 | (pts 194 | (xy -22.23 -4.492) (xy -22.23 -3.692) 195 | ) 196 | (height 10.31) 197 | (orientation 1) 198 | (gr_text "0.8000 mm" 199 | (at -11.96 -9.602 90) 200 | (layer "Dwgs.User") 201 | (uuid "2138e132-5036-4764-b8f4-c52fc6384b80") 202 | (effects 203 | (font 204 | (size 1 1) 205 | (thickness 0.15) 206 | ) 207 | ) 208 | ) 209 | (format 210 | (prefix "") 211 | (suffix "") 212 | (units 3) 213 | (units_format 1) 214 | (precision 4) 215 | ) 216 | (style 217 | (thickness 0.1) 218 | (arrow_length 1.27) 219 | (text_position_mode 2) 220 | (extension_height 0.58642) 221 | (extension_offset 0.5) keep_text_aligned) 222 | ) 223 | (dimension 224 | (type orthogonal) 225 | (layer "Dwgs.User") 226 | (uuid "6bdcca03-21f7-4b81-903e-0fe3f43a81ce") 227 | (pts 228 | (xy -22.23 -2.492) (xy -21.255 -4.237) 229 | ) 230 | (height -7.02) 231 | (orientation 0) 232 | (gr_text "0.9750 mm" 233 | (at -21.7425 -10.662 0) 234 | (layer "Dwgs.User") 235 | (uuid "6bdcca03-21f7-4b81-903e-0fe3f43a81ce") 236 | (effects 237 | (font 238 | (size 1 1) 239 | (thickness 0.15) 240 | ) 241 | ) 242 | ) 243 | (format 244 | (prefix "") 245 | (suffix "") 246 | (units 3) 247 | (units_format 1) 248 | (precision 4) 249 | ) 250 | (style 251 | (thickness 0.1) 252 | (arrow_length 1.27) 253 | (text_position_mode 0) 254 | (extension_height 0.58642) 255 | (extension_offset 0.5) keep_text_aligned) 256 | ) 257 | (dimension 258 | (type orthogonal) 259 | (layer "Dwgs.User") 260 | (uuid "91d18aa8-f165-471b-8ed1-2aafe09ed0a4") 261 | (pts 262 | (xy -22.23 -2.492) (xy -22.23 3.508) 263 | ) 264 | (height -5.96) 265 | (orientation 1) 266 | (gr_text "6.0000 mm" 267 | (at -26.05 2.688 90) 268 | (layer "Dwgs.User") 269 | (uuid "91d18aa8-f165-471b-8ed1-2aafe09ed0a4") 270 | (effects 271 | (font 272 | (size 1 1) 273 | (thickness 0.15) 274 | ) 275 | ) 276 | ) 277 | (format 278 | (prefix "") 279 | (suffix "") 280 | (units 3) 281 | (units_format 1) 282 | (precision 4) 283 | ) 284 | (style 285 | (thickness 0.1) 286 | (arrow_length 1.27) 287 | (text_position_mode 2) 288 | (extension_height 0.58642) 289 | (extension_offset 0.5) keep_text_aligned) 290 | ) 291 | (pad "1" smd rect 292 | (at -21.255 -4.8085) 293 | (size 0.3048 2.667) 294 | (layers "F.Cu" "F.Paste" "F.Mask") 295 | (uuid "d3e3fc46-0610-4ec9-86a3-189fd99fae92") 296 | ) 297 | (pad "2" smd rect 298 | (at -19.985 -4.8085) 299 | (size 0.3048 2.667) 300 | (layers "F.Cu" "F.Paste" "F.Mask") 301 | (uuid "22cc2dae-3504-48ad-90d3-44c6c109034e") 302 | ) 303 | (pad "3" smd rect 304 | (at -18.715 -4.8085) 305 | (size 0.3048 2.667) 306 | (layers "F.Cu" "F.Paste" "F.Mask") 307 | (uuid "c352601c-059e-4df4-8eab-156e05971acd") 308 | ) 309 | (pad "4" smd rect 310 | (at -17.445 -4.8085) 311 | (size 0.3048 2.667) 312 | (layers "F.Cu" "F.Paste" "F.Mask") 313 | (uuid "041a6604-52ee-4467-8f8d-5687dac3634e") 314 | ) 315 | (pad "5" smd rect 316 | (at -16.175 -4.8085) 317 | (size 0.3048 2.667) 318 | (layers "F.Cu" "F.Paste" "F.Mask") 319 | (uuid "ffc69174-6c8d-4119-b267-516daa03398e") 320 | ) 321 | (pad "6" smd rect 322 | (at -14.905 -4.8085) 323 | (size 0.3048 2.667) 324 | (layers "F.Cu" "F.Paste" "F.Mask") 325 | (uuid "1bf917cc-d948-46bd-bae4-32a8637e63eb") 326 | ) 327 | (pad "7" smd rect 328 | (at -13.635 -4.8085) 329 | (size 0.3048 2.667) 330 | (layers "F.Cu" "F.Paste" "F.Mask") 331 | (uuid "d8dc578e-462f-4b13-aee5-0fa6775c3770") 332 | ) 333 | (pad "8" smd rect 334 | (at -12.365 -4.8085) 335 | (size 0.3048 2.667) 336 | (layers "F.Cu" "F.Paste" "F.Mask") 337 | (uuid "79d2c501-4a19-4e04-8e3c-e293664f921b") 338 | ) 339 | (pad "9" smd rect 340 | (at -11.095 -4.8085) 341 | (size 0.3048 2.667) 342 | (layers "F.Cu" "F.Paste" "F.Mask") 343 | (uuid "79cb1a88-b92c-4a84-86ed-c68cdc6f23ff") 344 | ) 345 | (pad "10" smd rect 346 | (at -9.825 -4.8085) 347 | (size 0.3048 2.667) 348 | (layers "F.Cu" "F.Paste" "F.Mask") 349 | (uuid "a540f55f-2257-4c2e-bedc-e676838efa13") 350 | ) 351 | (pad "11" smd rect 352 | (at -8.555 -4.8085) 353 | (size 0.3048 2.667) 354 | (layers "F.Cu" "F.Paste" "F.Mask") 355 | (uuid "5c2f6009-7bad-4f6d-9869-5ed7344ea332") 356 | ) 357 | (pad "12" smd rect 358 | (at -7.285 -4.8085) 359 | (size 0.3048 2.667) 360 | (layers "F.Cu" "F.Paste" "F.Mask") 361 | (uuid "f2614bc8-7041-441e-82ef-706619974905") 362 | ) 363 | (pad "13" smd rect 364 | (at -6.015 -4.8085) 365 | (size 0.3048 2.667) 366 | (layers "F.Cu" "F.Paste" "F.Mask") 367 | (uuid "949ca37a-ebf6-43c2-988c-3b624003c893") 368 | ) 369 | (pad "14" smd rect 370 | (at -4.745 -4.8085) 371 | (size 0.3048 2.667) 372 | (layers "F.Cu" "F.Paste" "F.Mask") 373 | (uuid "67c486b6-d35f-4299-8f7f-fa9397931813") 374 | ) 375 | (pad "15" smd rect 376 | (at -3.475 -4.8085) 377 | (size 0.3048 2.667) 378 | (layers "F.Cu" "F.Paste" "F.Mask") 379 | (uuid "f15bf030-75b5-4553-972c-02b6b74d1bd4") 380 | ) 381 | (pad "16" smd rect 382 | (at -2.205 -4.8085) 383 | (size 0.3048 2.667) 384 | (layers "F.Cu" "F.Paste" "F.Mask") 385 | (uuid "86e9785d-da3b-4010-b6e5-062d576aab1a") 386 | ) 387 | (pad "17" smd rect 388 | (at -0.935 -4.8085) 389 | (size 0.3048 2.667) 390 | (layers "F.Cu" "F.Paste" "F.Mask") 391 | (uuid "b717611d-f5df-4818-9e9c-567f19d8d10b") 392 | ) 393 | (pad "18" smd rect 394 | (at 0.335 -4.8085) 395 | (size 0.3048 2.667) 396 | (layers "F.Cu" "F.Paste" "F.Mask") 397 | (uuid "a59b5019-f9e8-4cab-8679-a23e0af2280c") 398 | ) 399 | (pad "19" smd rect 400 | (at 1.605 -4.8085) 401 | (size 0.3048 2.667) 402 | (layers "F.Cu" "F.Paste" "F.Mask") 403 | (uuid "c0caab3b-7efb-4afb-8291-312cb59c74d6") 404 | ) 405 | (pad "20" smd rect 406 | (at 2.875 -4.8085) 407 | (size 0.3048 2.667) 408 | (layers "F.Cu" "F.Paste" "F.Mask") 409 | (uuid "5941bb10-8199-483c-ad4a-03151a096b01") 410 | ) 411 | (pad "21" smd rect 412 | (at 4.145 -4.8085) 413 | (size 0.3048 2.667) 414 | (layers "F.Cu" "F.Paste" "F.Mask") 415 | (uuid "9bd2494c-1f18-416e-9fd9-1b2cfde47722") 416 | ) 417 | (pad "22" smd rect 418 | (at 5.415 -4.8085) 419 | (size 0.3048 2.667) 420 | (layers "F.Cu" "F.Paste" "F.Mask") 421 | (uuid "99a4def1-7c68-4c5b-8d56-3f7b2b08d385") 422 | ) 423 | (pad "23" smd rect 424 | (at 6.685 -4.8085) 425 | (size 0.3048 2.667) 426 | (layers "F.Cu" "F.Paste" "F.Mask") 427 | (uuid "15f2f740-e6e6-4636-ac2c-fb4cd8ea838e") 428 | ) 429 | (pad "24" smd rect 430 | (at 7.955 -4.8085) 431 | (size 0.3048 2.667) 432 | (layers "F.Cu" "F.Paste" "F.Mask") 433 | (uuid "924bd961-ee04-4570-8280-65c22d8d9a5e") 434 | ) 435 | (pad "25" smd rect 436 | (at 9.225 -4.8085) 437 | (size 0.3048 2.667) 438 | (layers "F.Cu" "F.Paste" "F.Mask") 439 | (uuid "a4fba335-1eba-4a3d-b261-613cbae06bc3") 440 | ) 441 | (pad "26" smd rect 442 | (at 10.495 -4.8085) 443 | (size 0.3048 2.667) 444 | (layers "F.Cu" "F.Paste" "F.Mask") 445 | (uuid "e9dac23f-ce58-416e-822c-afa4d4ee644b") 446 | ) 447 | (pad "27" smd rect 448 | (at 11.765 -4.8085) 449 | (size 0.3048 2.667) 450 | (layers "F.Cu" "F.Paste" "F.Mask") 451 | (uuid "b176180a-40e3-4737-ab4c-3285d7a9279e") 452 | ) 453 | (pad "28" smd rect 454 | (at 13.035 -4.8085) 455 | (size 0.3048 2.667) 456 | (layers "F.Cu" "F.Paste" "F.Mask") 457 | (uuid "6aa71d43-724d-463d-8f22-c5f0efa66443") 458 | ) 459 | (pad "29" smd rect 460 | (at 14.305 -4.8085) 461 | (size 0.3048 2.667) 462 | (layers "F.Cu" "F.Paste" "F.Mask") 463 | (uuid "6856c02e-5139-4ce6-ac4b-7fd90b7f3f87") 464 | ) 465 | (pad "30" smd rect 466 | (at 15.575 -4.8085) 467 | (size 0.3048 2.667) 468 | (layers "F.Cu" "F.Paste" "F.Mask") 469 | (uuid "9281ce97-6c76-4ff7-a34f-ed56ca6cb3aa") 470 | ) 471 | (pad "31" smd rect 472 | (at 16.845 -4.8085) 473 | (size 0.3048 2.667) 474 | (layers "F.Cu" "F.Paste" "F.Mask") 475 | (uuid "5d9d1fcb-1ae1-489f-8fd9-c64386cee718") 476 | ) 477 | (pad "32" smd rect 478 | (at 18.115 -4.8085) 479 | (size 0.3048 2.667) 480 | (layers "F.Cu" "F.Paste" "F.Mask") 481 | (uuid "fc8df5a6-1d57-4629-962c-7a56424760e7") 482 | ) 483 | (pad "33" smd rect 484 | (at 19.385 -4.8085) 485 | (size 0.3048 2.667) 486 | (layers "F.Cu" "F.Paste" "F.Mask") 487 | (uuid "3b801822-ed66-42e9-b00f-5f02feb6dd81") 488 | ) 489 | (pad "34" smd rect 490 | (at 20.655 -4.8085) 491 | (size 0.3048 2.667) 492 | (layers "F.Cu" "F.Paste" "F.Mask") 493 | (uuid "fe005aa9-07c2-472a-bbe8-91a25386b395") 494 | ) 495 | (pad "35" smd rect 496 | (at -20.62 -4.8085) 497 | (size 0.3048 2.667) 498 | (layers "F.Cu" "F.Paste" "F.Mask") 499 | (uuid "ab199b94-9c35-4978-9a4b-a78b8801495c") 500 | ) 501 | (pad "36" smd rect 502 | (at -19.35 -4.8085) 503 | (size 0.3048 2.667) 504 | (layers "F.Cu" "F.Paste" "F.Mask") 505 | (uuid "233465e5-9812-446f-928e-1da8c33b6821") 506 | ) 507 | (pad "37" smd rect 508 | (at -18.08 -4.8085) 509 | (size 0.3048 2.667) 510 | (layers "F.Cu" "F.Paste" "F.Mask") 511 | (uuid "3b4c45fa-2d76-4b21-831e-2f62df1eed1c") 512 | ) 513 | (pad "38" smd rect 514 | (at -16.81 -4.8085) 515 | (size 0.3048 2.667) 516 | (layers "F.Cu" "F.Paste" "F.Mask") 517 | (uuid "781ff5b8-1afd-4945-81fa-23e365068000") 518 | ) 519 | (pad "39" smd rect 520 | (at -15.54 -4.8085) 521 | (size 0.3048 2.667) 522 | (layers "F.Cu" "F.Paste" "F.Mask") 523 | (uuid "c84c067b-1a81-4aba-a32d-4466a25b1ad4") 524 | ) 525 | (pad "40" smd rect 526 | (at -14.27 -4.8085) 527 | (size 0.3048 2.667) 528 | (layers "F.Cu" "F.Paste" "F.Mask") 529 | (uuid "96081c7f-f6f5-4353-b62a-df0582b64f5c") 530 | ) 531 | (pad "41" smd rect 532 | (at -13 -4.8085) 533 | (size 0.3048 2.667) 534 | (layers "F.Cu" "F.Paste" "F.Mask") 535 | (uuid "42a95579-13b0-4909-8c22-47bf157b7246") 536 | ) 537 | (pad "42" smd rect 538 | (at -11.73 -4.8085) 539 | (size 0.3048 2.667) 540 | (layers "F.Cu" "F.Paste" "F.Mask") 541 | (uuid "384b0131-176c-429c-acc9-ea019807ba4b") 542 | ) 543 | (pad "43" smd rect 544 | (at -10.46 -4.8085) 545 | (size 0.3048 2.667) 546 | (layers "F.Cu" "F.Paste" "F.Mask") 547 | (uuid "d25681d5-19e7-42ab-ba83-3a71ae082799") 548 | ) 549 | (pad "44" smd rect 550 | (at -9.19 -4.8085) 551 | (size 0.3048 2.667) 552 | (layers "F.Cu" "F.Paste" "F.Mask") 553 | (uuid "8bbe4352-8aa6-48ec-a688-98b618b52ce7") 554 | ) 555 | (pad "45" smd rect 556 | (at -7.92 -4.8085) 557 | (size 0.3048 2.667) 558 | (layers "F.Cu" "F.Paste" "F.Mask") 559 | (uuid "900f1e16-2894-4c31-9dde-f28ab24bd98c") 560 | ) 561 | (pad "46" smd rect 562 | (at -6.65 -4.8085) 563 | (size 0.3048 2.667) 564 | (layers "F.Cu" "F.Paste" "F.Mask") 565 | (uuid "236c0ff9-ca15-44ef-b219-e9bf90851158") 566 | ) 567 | (pad "47" smd rect 568 | (at -5.38 -4.8085) 569 | (size 0.3048 2.667) 570 | (layers "F.Cu" "F.Paste" "F.Mask") 571 | (uuid "6c8e634f-9e03-4af1-8eec-ff8fd93ebd24") 572 | ) 573 | (pad "48" smd rect 574 | (at -4.11 -4.8085) 575 | (size 0.3048 2.667) 576 | (layers "F.Cu" "F.Paste" "F.Mask") 577 | (uuid "31d89709-ebb5-48b8-bba8-bc0cf434a1a2") 578 | ) 579 | (pad "49" smd rect 580 | (at -2.84 -4.8085) 581 | (size 0.3048 2.667) 582 | (layers "F.Cu" "F.Paste" "F.Mask") 583 | (uuid "c582c3c3-b428-4ff3-8780-a28554f9bd6b") 584 | ) 585 | (pad "50" smd rect 586 | (at -1.57 -4.8085) 587 | (size 0.3048 2.667) 588 | (layers "F.Cu" "F.Paste" "F.Mask") 589 | (uuid "6745711d-6a6d-4022-b923-aaae12b9fd20") 590 | ) 591 | (pad "51" smd rect 592 | (at -0.3 -4.8085) 593 | (size 0.3048 2.667) 594 | (layers "F.Cu" "F.Paste" "F.Mask") 595 | (uuid "65259063-cca5-447f-90a4-77eded0fb994") 596 | ) 597 | (pad "52" smd rect 598 | (at 0.97 -4.8085) 599 | (size 0.3048 2.667) 600 | (layers "F.Cu" "F.Paste" "F.Mask") 601 | (uuid "8336d482-f52d-43ae-a20e-db4ea93558cc") 602 | ) 603 | (pad "53" smd rect 604 | (at 2.24 -4.8085) 605 | (size 0.3048 2.667) 606 | (layers "F.Cu" "F.Paste" "F.Mask") 607 | (uuid "7befe14b-278c-4551-902a-6cc8123f21a8") 608 | ) 609 | (pad "54" smd rect 610 | (at 3.51 -4.8085) 611 | (size 0.3048 2.667) 612 | (layers "F.Cu" "F.Paste" "F.Mask") 613 | (uuid "ddb4d827-c04f-4a12-9374-f48faa3eb9c1") 614 | ) 615 | (pad "55" smd rect 616 | (at 4.78 -4.8085) 617 | (size 0.3048 2.667) 618 | (layers "F.Cu" "F.Paste" "F.Mask") 619 | (uuid "8eb250bc-ca34-455a-85e6-e1dd6e618031") 620 | ) 621 | (pad "56" smd rect 622 | (at 6.05 -4.8085) 623 | (size 0.3048 2.667) 624 | (layers "F.Cu" "F.Paste" "F.Mask") 625 | (uuid "af6c7da4-e54a-490d-8bd9-ac1acaff4aa2") 626 | ) 627 | (pad "57" smd rect 628 | (at 7.32 -4.8085) 629 | (size 0.3048 2.667) 630 | (layers "F.Cu" "F.Paste" "F.Mask") 631 | (uuid "47757042-20a2-41ad-847e-09e283ed80f3") 632 | ) 633 | (pad "58" smd rect 634 | (at 8.59 -4.8085) 635 | (size 0.3048 2.667) 636 | (layers "F.Cu" "F.Paste" "F.Mask") 637 | (uuid "88647418-d093-4ac6-8ae5-3c2ebb027c48") 638 | ) 639 | (pad "59" smd rect 640 | (at 9.86 -4.8085) 641 | (size 0.3048 2.667) 642 | (layers "F.Cu" "F.Paste" "F.Mask") 643 | (uuid "0b133bbf-2784-4c2d-8996-a7793dc44714") 644 | ) 645 | (pad "60" smd rect 646 | (at 11.13 -4.8085) 647 | (size 0.3048 2.667) 648 | (layers "F.Cu" "F.Paste" "F.Mask") 649 | (uuid "f4abc672-4b17-481d-850e-48e349ba75b5") 650 | ) 651 | (pad "61" smd rect 652 | (at 12.4 -4.8085) 653 | (size 0.3048 2.667) 654 | (layers "F.Cu" "F.Paste" "F.Mask") 655 | (uuid "cc0b8767-d13a-4997-bc79-ad5a81f9052d") 656 | ) 657 | (pad "62" smd rect 658 | (at 13.67 -4.8085) 659 | (size 0.3048 2.667) 660 | (layers "F.Cu" "F.Paste" "F.Mask") 661 | (uuid "15671459-b838-4df9-bcf1-6945618e43d7") 662 | ) 663 | (pad "63" smd rect 664 | (at 14.94 -4.8085) 665 | (size 0.3048 2.667) 666 | (layers "F.Cu" "F.Paste" "F.Mask") 667 | (uuid "367cc037-baad-49bf-86d2-33ab397f6a42") 668 | ) 669 | (pad "64" smd rect 670 | (at 16.21 -4.8085) 671 | (size 0.3048 2.667) 672 | (layers "F.Cu" "F.Paste" "F.Mask") 673 | (uuid "3933c60d-f2eb-40f8-9658-5849441cc9d0") 674 | ) 675 | (pad "65" smd rect 676 | (at 17.48 -4.8085) 677 | (size 0.3048 2.667) 678 | (layers "F.Cu" "F.Paste" "F.Mask") 679 | (uuid "553d45e4-824f-4fe0-8fe3-991780e010d5") 680 | ) 681 | (pad "66" smd rect 682 | (at 18.75 -4.8085) 683 | (size 0.3048 2.667) 684 | (layers "F.Cu" "F.Paste" "F.Mask") 685 | (uuid "afd8bb14-df07-4db9-9241-f822b17fa7ab") 686 | ) 687 | (pad "67" smd rect 688 | (at 20.02 -4.8085) 689 | (size 0.3048 2.667) 690 | (layers "F.Cu" "F.Paste" "F.Mask") 691 | (uuid "da09d0e3-0f39-46e4-8c74-a92ba9e0574e") 692 | ) 693 | (pad "68" smd rect 694 | (at 21.29 -4.8085) 695 | (size 0.3048 2.667) 696 | (layers "F.Cu" "F.Paste" "F.Mask") 697 | (uuid "df259ddc-9ee8-4e48-82dc-45c198a9fdd6") 698 | ) 699 | (model "${KIPRJMOD}/TE/5146228-4.stp" 700 | (offset 701 | (xyz 0 -3.255 0) 702 | ) 703 | (scale 704 | (xyz 1 1 1) 705 | ) 706 | (rotate 707 | (xyz -90 0 0) 708 | ) 709 | ) 710 | (model "${KIPRJMOD}/TE/5146547-1.stp" 711 | (hide yes) 712 | (offset 713 | (xyz 21.2 -8 0) 714 | ) 715 | (scale 716 | (xyz 1 1 1) 717 | ) 718 | (rotate 719 | (xyz -90 0 0) 720 | ) 721 | ) 722 | ) 723 | -------------------------------------------------------------------------------- /devboard/devboard.kicad_pro: -------------------------------------------------------------------------------- 1 | { 2 | "board": { 3 | "3dviewports": [], 4 | "design_settings": { 5 | "defaults": { 6 | "apply_defaults_to_fp_fields": false, 7 | "apply_defaults_to_fp_shapes": false, 8 | "apply_defaults_to_fp_text": false, 9 | "board_outline_line_width": 0.05, 10 | "copper_line_width": 0.2, 11 | "copper_text_italic": false, 12 | "copper_text_size_h": 1.5, 13 | "copper_text_size_v": 1.5, 14 | "copper_text_thickness": 0.3, 15 | "copper_text_upright": false, 16 | "courtyard_line_width": 0.05, 17 | "dimension_precision": 4, 18 | "dimension_units": 3, 19 | "dimensions": { 20 | "arrow_length": 1270000, 21 | "extension_offset": 500000, 22 | "keep_text_aligned": true, 23 | "suppress_zeroes": false, 24 | "text_position": 0, 25 | "units_format": 1 26 | }, 27 | "fab_line_width": 0.1, 28 | "fab_text_italic": false, 29 | "fab_text_size_h": 1.0, 30 | "fab_text_size_v": 1.0, 31 | "fab_text_thickness": 0.15, 32 | "fab_text_upright": false, 33 | "other_line_width": 0.1, 34 | "other_text_italic": false, 35 | "other_text_size_h": 1.0, 36 | "other_text_size_v": 1.0, 37 | "other_text_thickness": 0.15, 38 | "other_text_upright": false, 39 | "pads": { 40 | "drill": 2.1, 41 | "height": 1.1, 42 | "width": 1.1 43 | }, 44 | "silk_line_width": 0.12, 45 | "silk_text_italic": false, 46 | "silk_text_size_h": 1.0, 47 | "silk_text_size_v": 1.0, 48 | "silk_text_thickness": 0.15, 49 | "silk_text_upright": false, 50 | "zones": { 51 | "min_clearance": 0.0 52 | } 53 | }, 54 | "diff_pair_dimensions": [ 55 | { 56 | "gap": 0.0, 57 | "via_gap": 0.0, 58 | "width": 0.0 59 | } 60 | ], 61 | "drc_exclusions": [], 62 | "meta": { 63 | "filename": "board_design_settings.json", 64 | "version": 2 65 | }, 66 | "rule_severities": { 67 | "annular_width": "error", 68 | "clearance": "error", 69 | "connection_width": "warning", 70 | "copper_edge_clearance": "error", 71 | "copper_sliver": "warning", 72 | "courtyards_overlap": "error", 73 | "diff_pair_gap_out_of_range": "error", 74 | "diff_pair_uncoupled_length_too_long": "error", 75 | "drill_out_of_range": "error", 76 | "duplicate_footprints": "warning", 77 | "extra_footprint": "warning", 78 | "footprint": "error", 79 | "footprint_symbol_mismatch": "warning", 80 | "footprint_type_mismatch": "ignore", 81 | "hole_clearance": "error", 82 | "hole_near_hole": "error", 83 | "holes_co_located": "warning", 84 | "invalid_outline": "error", 85 | "isolated_copper": "warning", 86 | "item_on_disabled_layer": "error", 87 | "items_not_allowed": "error", 88 | "length_out_of_range": "error", 89 | "lib_footprint_issues": "warning", 90 | "lib_footprint_mismatch": "warning", 91 | "malformed_courtyard": "error", 92 | "microvia_drill_out_of_range": "error", 93 | "missing_courtyard": "ignore", 94 | "missing_footprint": "warning", 95 | "net_conflict": "warning", 96 | "npth_inside_courtyard": "ignore", 97 | "padstack": "warning", 98 | "pth_inside_courtyard": "ignore", 99 | "shorting_items": "error", 100 | "silk_edge_clearance": "warning", 101 | "silk_over_copper": "warning", 102 | "silk_overlap": "warning", 103 | "skew_out_of_range": "error", 104 | "solder_mask_bridge": "error", 105 | "starved_thermal": "error", 106 | "text_height": "warning", 107 | "text_thickness": "warning", 108 | "through_hole_pad_without_hole": "error", 109 | "too_many_vias": "error", 110 | "track_dangling": "warning", 111 | "track_width": "error", 112 | "tracks_crossing": "error", 113 | "unconnected_items": "error", 114 | "unresolved_variable": "error", 115 | "via_dangling": "warning", 116 | "zones_intersect": "error" 117 | }, 118 | "rules": { 119 | "max_error": 0.005, 120 | "min_clearance": 0.0, 121 | "min_connection": 0.0, 122 | "min_copper_edge_clearance": 0.25, 123 | "min_hole_clearance": 0.25, 124 | "min_hole_to_hole": 0.25, 125 | "min_microvia_diameter": 0.2, 126 | "min_microvia_drill": 0.1, 127 | "min_resolved_spokes": 2, 128 | "min_silk_clearance": 0.0, 129 | "min_text_height": 0.8, 130 | "min_text_thickness": 0.08, 131 | "min_through_hole_diameter": 0.3, 132 | "min_track_width": 0.2, 133 | "min_via_annular_width": 0.1, 134 | "min_via_diameter": 0.3, 135 | "solder_mask_to_copper_clearance": 0.0, 136 | "use_height_for_length_calcs": true 137 | }, 138 | "teardrop_options": [ 139 | { 140 | "td_onpadsmd": true, 141 | "td_onroundshapesonly": false, 142 | "td_ontrackend": false, 143 | "td_onviapad": true 144 | } 145 | ], 146 | "teardrop_parameters": [ 147 | { 148 | "td_allow_use_two_tracks": true, 149 | "td_curve_segcount": 0, 150 | "td_height_ratio": 1.0, 151 | "td_length_ratio": 0.5, 152 | "td_maxheight": 2.0, 153 | "td_maxlen": 1.0, 154 | "td_on_pad_in_zone": false, 155 | "td_target_name": "td_round_shape", 156 | "td_width_to_size_filter_ratio": 0.9 157 | }, 158 | { 159 | "td_allow_use_two_tracks": true, 160 | "td_curve_segcount": 0, 161 | "td_height_ratio": 1.0, 162 | "td_length_ratio": 0.5, 163 | "td_maxheight": 2.0, 164 | "td_maxlen": 1.0, 165 | "td_on_pad_in_zone": false, 166 | "td_target_name": "td_rect_shape", 167 | "td_width_to_size_filter_ratio": 0.9 168 | }, 169 | { 170 | "td_allow_use_two_tracks": true, 171 | "td_curve_segcount": 0, 172 | "td_height_ratio": 1.0, 173 | "td_length_ratio": 0.5, 174 | "td_maxheight": 2.0, 175 | "td_maxlen": 1.0, 176 | "td_on_pad_in_zone": false, 177 | "td_target_name": "td_track_end", 178 | "td_width_to_size_filter_ratio": 0.9 179 | } 180 | ], 181 | "track_widths": [ 182 | 0.0 183 | ], 184 | "tuning_pattern_settings": { 185 | "diff_pair_defaults": { 186 | "corner_radius_percentage": 80, 187 | "corner_style": 1, 188 | "max_amplitude": 1.0, 189 | "min_amplitude": 0.2, 190 | "single_sided": false, 191 | "spacing": 1.0 192 | }, 193 | "diff_pair_skew_defaults": { 194 | "corner_radius_percentage": 80, 195 | "corner_style": 1, 196 | "max_amplitude": 1.0, 197 | "min_amplitude": 0.2, 198 | "single_sided": false, 199 | "spacing": 0.6 200 | }, 201 | "single_track_defaults": { 202 | "corner_radius_percentage": 80, 203 | "corner_style": 1, 204 | "max_amplitude": 1.0, 205 | "min_amplitude": 0.2, 206 | "single_sided": false, 207 | "spacing": 0.6 208 | } 209 | }, 210 | "via_dimensions": [ 211 | { 212 | "diameter": 0.0, 213 | "drill": 0.0 214 | } 215 | ], 216 | "zones_allow_external_fillets": false 217 | }, 218 | "ipc2581": { 219 | "dist": "", 220 | "distpn": "", 221 | "internal_id": "", 222 | "mfg": "", 223 | "mpn": "" 224 | }, 225 | "layer_presets": [], 226 | "viewports": [] 227 | }, 228 | "boards": [], 229 | "cvpcb": { 230 | "equivalence_files": [] 231 | }, 232 | "erc": { 233 | "erc_exclusions": [], 234 | "meta": { 235 | "version": 0 236 | }, 237 | "pin_map": [ 238 | [ 239 | 0, 240 | 0, 241 | 0, 242 | 0, 243 | 0, 244 | 0, 245 | 1, 246 | 0, 247 | 0, 248 | 0, 249 | 0, 250 | 2 251 | ], 252 | [ 253 | 0, 254 | 2, 255 | 0, 256 | 1, 257 | 0, 258 | 0, 259 | 1, 260 | 0, 261 | 2, 262 | 2, 263 | 2, 264 | 2 265 | ], 266 | [ 267 | 0, 268 | 0, 269 | 0, 270 | 0, 271 | 0, 272 | 0, 273 | 1, 274 | 0, 275 | 1, 276 | 0, 277 | 1, 278 | 2 279 | ], 280 | [ 281 | 0, 282 | 1, 283 | 0, 284 | 0, 285 | 0, 286 | 0, 287 | 1, 288 | 1, 289 | 2, 290 | 1, 291 | 1, 292 | 2 293 | ], 294 | [ 295 | 0, 296 | 0, 297 | 0, 298 | 0, 299 | 0, 300 | 0, 301 | 1, 302 | 0, 303 | 0, 304 | 0, 305 | 0, 306 | 2 307 | ], 308 | [ 309 | 0, 310 | 0, 311 | 0, 312 | 0, 313 | 0, 314 | 0, 315 | 0, 316 | 0, 317 | 0, 318 | 0, 319 | 0, 320 | 2 321 | ], 322 | [ 323 | 1, 324 | 1, 325 | 1, 326 | 1, 327 | 1, 328 | 0, 329 | 1, 330 | 1, 331 | 1, 332 | 1, 333 | 1, 334 | 2 335 | ], 336 | [ 337 | 0, 338 | 0, 339 | 0, 340 | 1, 341 | 0, 342 | 0, 343 | 1, 344 | 0, 345 | 0, 346 | 0, 347 | 0, 348 | 2 349 | ], 350 | [ 351 | 0, 352 | 2, 353 | 1, 354 | 2, 355 | 0, 356 | 0, 357 | 1, 358 | 0, 359 | 2, 360 | 2, 361 | 2, 362 | 2 363 | ], 364 | [ 365 | 0, 366 | 2, 367 | 0, 368 | 1, 369 | 0, 370 | 0, 371 | 1, 372 | 0, 373 | 2, 374 | 0, 375 | 0, 376 | 2 377 | ], 378 | [ 379 | 0, 380 | 2, 381 | 1, 382 | 1, 383 | 0, 384 | 0, 385 | 1, 386 | 0, 387 | 2, 388 | 0, 389 | 0, 390 | 2 391 | ], 392 | [ 393 | 2, 394 | 2, 395 | 2, 396 | 2, 397 | 2, 398 | 2, 399 | 2, 400 | 2, 401 | 2, 402 | 2, 403 | 2, 404 | 2 405 | ] 406 | ], 407 | "rule_severities": { 408 | "bus_definition_conflict": "error", 409 | "bus_entry_needed": "error", 410 | "bus_to_bus_conflict": "error", 411 | "bus_to_net_conflict": "error", 412 | "conflicting_netclasses": "error", 413 | "different_unit_footprint": "error", 414 | "different_unit_net": "error", 415 | "duplicate_reference": "error", 416 | "duplicate_sheet_names": "error", 417 | "endpoint_off_grid": "warning", 418 | "extra_units": "error", 419 | "global_label_dangling": "warning", 420 | "hier_label_mismatch": "error", 421 | "label_dangling": "error", 422 | "lib_symbol_issues": "warning", 423 | "missing_bidi_pin": "warning", 424 | "missing_input_pin": "warning", 425 | "missing_power_pin": "error", 426 | "missing_unit": "warning", 427 | "multiple_net_names": "warning", 428 | "net_not_bus_member": "warning", 429 | "no_connect_connected": "warning", 430 | "no_connect_dangling": "warning", 431 | "pin_not_connected": "error", 432 | "pin_not_driven": "error", 433 | "pin_to_pin": "warning", 434 | "power_pin_not_driven": "error", 435 | "similar_labels": "warning", 436 | "simulation_model_issue": "ignore", 437 | "unannotated": "error", 438 | "unit_value_mismatch": "error", 439 | "unresolved_variable": "error", 440 | "wire_dangling": "error" 441 | } 442 | }, 443 | "libraries": { 444 | "pinned_footprint_libs": [], 445 | "pinned_symbol_libs": [] 446 | }, 447 | "meta": { 448 | "filename": "devboard.kicad_pro", 449 | "version": 1 450 | }, 451 | "net_settings": { 452 | "classes": [ 453 | { 454 | "bus_width": 12, 455 | "clearance": 0.2, 456 | "diff_pair_gap": 0.25, 457 | "diff_pair_via_gap": 0.25, 458 | "diff_pair_width": 0.2, 459 | "line_style": 0, 460 | "microvia_diameter": 0.3, 461 | "microvia_drill": 0.1, 462 | "name": "Default", 463 | "pcb_color": "rgba(0, 0, 0, 0.000)", 464 | "schematic_color": "rgba(0, 0, 0, 0.000)", 465 | "track_width": 0.25, 466 | "via_diameter": 0.5, 467 | "via_drill": 0.3, 468 | "wire_width": 6 469 | } 470 | ], 471 | "meta": { 472 | "version": 3 473 | }, 474 | "net_colors": null, 475 | "netclass_assignments": null, 476 | "netclass_patterns": [ 477 | { 478 | "netclass": "Default", 479 | "pattern": "/A0" 480 | }, 481 | { 482 | "netclass": "Default", 483 | "pattern": "/A1" 484 | }, 485 | { 486 | "netclass": "Default", 487 | "pattern": "/A10" 488 | }, 489 | { 490 | "netclass": "Default", 491 | "pattern": "/A11" 492 | }, 493 | { 494 | "netclass": "Default", 495 | "pattern": "/A12" 496 | }, 497 | { 498 | "netclass": "Default", 499 | "pattern": "/A13" 500 | }, 501 | { 502 | "netclass": "Default", 503 | "pattern": "/A14" 504 | }, 505 | { 506 | "netclass": "Default", 507 | "pattern": "/A15" 508 | }, 509 | { 510 | "netclass": "Default", 511 | "pattern": "/A16" 512 | }, 513 | { 514 | "netclass": "Default", 515 | "pattern": "/A17" 516 | }, 517 | { 518 | "netclass": "Default", 519 | "pattern": "/A18" 520 | }, 521 | { 522 | "netclass": "Default", 523 | "pattern": "/A19" 524 | }, 525 | { 526 | "netclass": "Default", 527 | "pattern": "/A2" 528 | }, 529 | { 530 | "netclass": "Default", 531 | "pattern": "/A20" 532 | }, 533 | { 534 | "netclass": "Default", 535 | "pattern": "/A21" 536 | }, 537 | { 538 | "netclass": "Default", 539 | "pattern": "/A22" 540 | }, 541 | { 542 | "netclass": "Default", 543 | "pattern": "/A23" 544 | }, 545 | { 546 | "netclass": "Default", 547 | "pattern": "/A24" 548 | }, 549 | { 550 | "netclass": "Default", 551 | "pattern": "/A25" 552 | }, 553 | { 554 | "netclass": "Default", 555 | "pattern": "/A3" 556 | }, 557 | { 558 | "netclass": "Default", 559 | "pattern": "/A4" 560 | }, 561 | { 562 | "netclass": "Default", 563 | "pattern": "/A5" 564 | }, 565 | { 566 | "netclass": "Default", 567 | "pattern": "/A6" 568 | }, 569 | { 570 | "netclass": "Default", 571 | "pattern": "/A7" 572 | }, 573 | { 574 | "netclass": "Default", 575 | "pattern": "/A8" 576 | }, 577 | { 578 | "netclass": "Default", 579 | "pattern": "/A9" 580 | }, 581 | { 582 | "netclass": "Default", 583 | "pattern": "/CD1" 584 | }, 585 | { 586 | "netclass": "Default", 587 | "pattern": "/CD2" 588 | }, 589 | { 590 | "netclass": "Default", 591 | "pattern": "/CE1" 592 | }, 593 | { 594 | "netclass": "Default", 595 | "pattern": "/CE2" 596 | }, 597 | { 598 | "netclass": "Default", 599 | "pattern": "/D0" 600 | }, 601 | { 602 | "netclass": "Default", 603 | "pattern": "/D1" 604 | }, 605 | { 606 | "netclass": "Default", 607 | "pattern": "/D10" 608 | }, 609 | { 610 | "netclass": "Default", 611 | "pattern": "/D11" 612 | }, 613 | { 614 | "netclass": "Default", 615 | "pattern": "/D12" 616 | }, 617 | { 618 | "netclass": "Default", 619 | "pattern": "/D13" 620 | }, 621 | { 622 | "netclass": "Default", 623 | "pattern": "/D14" 624 | }, 625 | { 626 | "netclass": "Default", 627 | "pattern": "/D15" 628 | }, 629 | { 630 | "netclass": "Default", 631 | "pattern": "/D2" 632 | }, 633 | { 634 | "netclass": "Default", 635 | "pattern": "/D3" 636 | }, 637 | { 638 | "netclass": "Default", 639 | "pattern": "/D4" 640 | }, 641 | { 642 | "netclass": "Default", 643 | "pattern": "/D5" 644 | }, 645 | { 646 | "netclass": "Default", 647 | "pattern": "/D6" 648 | }, 649 | { 650 | "netclass": "Default", 651 | "pattern": "/D7" 652 | }, 653 | { 654 | "netclass": "Default", 655 | "pattern": "/D8" 656 | }, 657 | { 658 | "netclass": "Default", 659 | "pattern": "/D9" 660 | }, 661 | { 662 | "netclass": "Default", 663 | "pattern": "/GND" 664 | }, 665 | { 666 | "netclass": "Default", 667 | "pattern": "/INPACK" 668 | }, 669 | { 670 | "netclass": "Default", 671 | "pattern": "/IOIS16" 672 | }, 673 | { 674 | "netclass": "Default", 675 | "pattern": "/IORD" 676 | }, 677 | { 678 | "netclass": "Default", 679 | "pattern": "/IOWR" 680 | }, 681 | { 682 | "netclass": "Default", 683 | "pattern": "/IREQ" 684 | }, 685 | { 686 | "netclass": "Default", 687 | "pattern": "/OE" 688 | }, 689 | { 690 | "netclass": "Default", 691 | "pattern": "/REG" 692 | }, 693 | { 694 | "netclass": "Default", 695 | "pattern": "/RESET" 696 | }, 697 | { 698 | "netclass": "Default", 699 | "pattern": "/SPKR" 700 | }, 701 | { 702 | "netclass": "Default", 703 | "pattern": "/STSHG" 704 | }, 705 | { 706 | "netclass": "Default", 707 | "pattern": "/VCC" 708 | }, 709 | { 710 | "netclass": "Default", 711 | "pattern": "/VPP" 712 | }, 713 | { 714 | "netclass": "Default", 715 | "pattern": "/VS1" 716 | }, 717 | { 718 | "netclass": "Default", 719 | "pattern": "/VS2" 720 | }, 721 | { 722 | "netclass": "Default", 723 | "pattern": "/WAIT" 724 | }, 725 | { 726 | "netclass": "Default", 727 | "pattern": "/WE" 728 | }, 729 | { 730 | "netclass": "Default", 731 | "pattern": "GND" 732 | } 733 | ] 734 | }, 735 | "pcbnew": { 736 | "last_paths": { 737 | "gencad": "", 738 | "idf": "", 739 | "netlist": "", 740 | "plot": "pcmcia/", 741 | "pos_files": "", 742 | "specctra_dsn": "", 743 | "step": "devboard.step", 744 | "svg": "", 745 | "vrml": "" 746 | }, 747 | "page_layout_descr_file": "" 748 | }, 749 | "schematic": { 750 | "annotate_start_num": 0, 751 | "bom_export_filename": "", 752 | "bom_fmt_presets": [], 753 | "bom_fmt_settings": { 754 | "field_delimiter": ",", 755 | "keep_line_breaks": false, 756 | "keep_tabs": false, 757 | "name": "CSV", 758 | "ref_delimiter": ",", 759 | "ref_range_delimiter": "", 760 | "string_delimiter": "\"" 761 | }, 762 | "bom_presets": [], 763 | "bom_settings": { 764 | "exclude_dnp": false, 765 | "fields_ordered": [ 766 | { 767 | "group_by": false, 768 | "label": "Reference", 769 | "name": "Reference", 770 | "show": true 771 | }, 772 | { 773 | "group_by": true, 774 | "label": "Value", 775 | "name": "Value", 776 | "show": true 777 | }, 778 | { 779 | "group_by": false, 780 | "label": "Datasheet", 781 | "name": "Datasheet", 782 | "show": true 783 | }, 784 | { 785 | "group_by": false, 786 | "label": "Footprint", 787 | "name": "Footprint", 788 | "show": true 789 | }, 790 | { 791 | "group_by": false, 792 | "label": "Qty", 793 | "name": "${QUANTITY}", 794 | "show": true 795 | }, 796 | { 797 | "group_by": true, 798 | "label": "DNP", 799 | "name": "${DNP}", 800 | "show": true 801 | } 802 | ], 803 | "filter_string": "", 804 | "group_symbols": true, 805 | "name": "Grouped By Value", 806 | "sort_asc": true, 807 | "sort_field": "Reference" 808 | }, 809 | "connection_grid_size": 50.0, 810 | "drawing": { 811 | "dashed_lines_dash_length_ratio": 12.0, 812 | "dashed_lines_gap_length_ratio": 3.0, 813 | "default_line_thickness": 6.0, 814 | "default_text_size": 50.0, 815 | "field_names": [], 816 | "intersheets_ref_own_page": false, 817 | "intersheets_ref_prefix": "", 818 | "intersheets_ref_short": false, 819 | "intersheets_ref_show": false, 820 | "intersheets_ref_suffix": "", 821 | "junction_size_choice": 3, 822 | "label_size_ratio": 0.25, 823 | "operating_point_overlay_i_precision": 3, 824 | "operating_point_overlay_i_range": "~A", 825 | "operating_point_overlay_v_precision": 3, 826 | "operating_point_overlay_v_range": "~V", 827 | "overbar_offset_ratio": 1.23, 828 | "pin_symbol_size": 0.0, 829 | "text_offset_ratio": 0.08 830 | }, 831 | "legacy_lib_dir": "", 832 | "legacy_lib_list": [], 833 | "meta": { 834 | "version": 1 835 | }, 836 | "net_format_name": "", 837 | "page_layout_descr_file": "", 838 | "plot_directory": "", 839 | "spice_current_sheet_as_root": false, 840 | "spice_external_command": "spice \"%I\"", 841 | "spice_model_current_sheet_as_root": true, 842 | "spice_save_all_currents": false, 843 | "spice_save_all_dissipations": false, 844 | "spice_save_all_voltages": false, 845 | "subpart_first_id": 65, 846 | "subpart_id_separator": 0 847 | }, 848 | "sheets": [ 849 | [ 850 | "faa55760-cb03-4d07-a56c-933314735a7e", 851 | "Root" 852 | ] 853 | ], 854 | "text_variables": {} 855 | } 856 | --------------------------------------------------------------------------------