├── .cproject
├── .gitignore
├── .project
├── .settings
├── language.settings.xml
├── org.eclipse.core.resources.prefs
└── stm32cubeide.project.prefs
├── Core
├── Inc
│ ├── ds18b20.h
│ ├── main.h
│ ├── stm32_assert.h
│ ├── stm32l4xx_hal_conf.h
│ └── stm32l4xx_it.h
├── Src
│ ├── ds18b20.c
│ ├── main.c
│ ├── stm32l4xx_hal_msp.c
│ ├── stm32l4xx_it.c
│ ├── syscalls.c
│ ├── sysmem.c
│ └── system_stm32l4xx.c
└── Startup
│ └── startup_stm32l431rctx.s
├── DPV10008.gsd
├── Drivers
├── CMSIS
│ ├── Device
│ │ └── ST
│ │ │ └── STM32L4xx
│ │ │ ├── Include
│ │ │ ├── stm32l431xx.h
│ │ │ ├── stm32l4xx.h
│ │ │ └── system_stm32l4xx.h
│ │ │ ├── LICENSE.txt
│ │ │ └── License.md
│ ├── Include
│ │ ├── cmsis_armcc.h
│ │ ├── cmsis_armclang.h
│ │ ├── cmsis_armclang_ltm.h
│ │ ├── cmsis_compiler.h
│ │ ├── cmsis_gcc.h
│ │ ├── cmsis_iccarm.h
│ │ ├── cmsis_version.h
│ │ ├── core_armv81mml.h
│ │ ├── core_armv8mbl.h
│ │ ├── core_armv8mml.h
│ │ ├── core_cm0.h
│ │ ├── core_cm0plus.h
│ │ ├── core_cm1.h
│ │ ├── core_cm23.h
│ │ ├── core_cm3.h
│ │ ├── core_cm33.h
│ │ ├── core_cm35p.h
│ │ ├── core_cm4.h
│ │ ├── core_cm7.h
│ │ ├── core_sc000.h
│ │ ├── core_sc300.h
│ │ ├── mpu_armv7.h
│ │ ├── mpu_armv8.h
│ │ └── tz_context.h
│ └── LICENSE.txt
└── STM32L4xx_HAL_Driver
│ ├── Inc
│ ├── Legacy
│ │ └── stm32_hal_legacy.h
│ ├── stm32l4xx_hal.h
│ ├── stm32l4xx_hal_cortex.h
│ ├── stm32l4xx_hal_def.h
│ ├── stm32l4xx_hal_dma.h
│ ├── stm32l4xx_hal_dma_ex.h
│ ├── stm32l4xx_hal_exti.h
│ ├── stm32l4xx_hal_flash.h
│ ├── stm32l4xx_hal_flash_ex.h
│ ├── stm32l4xx_hal_flash_ramfunc.h
│ ├── stm32l4xx_hal_gpio.h
│ ├── stm32l4xx_hal_gpio_ex.h
│ ├── stm32l4xx_hal_i2c.h
│ ├── stm32l4xx_hal_i2c_ex.h
│ ├── stm32l4xx_hal_pwr.h
│ ├── stm32l4xx_hal_pwr_ex.h
│ ├── stm32l4xx_hal_rcc.h
│ ├── stm32l4xx_hal_rcc_ex.h
│ ├── stm32l4xx_hal_spi.h
│ ├── stm32l4xx_hal_spi_ex.h
│ ├── stm32l4xx_hal_tim.h
│ ├── stm32l4xx_hal_tim_ex.h
│ ├── stm32l4xx_hal_uart.h
│ ├── stm32l4xx_hal_uart_ex.h
│ ├── stm32l4xx_ll_bus.h
│ ├── stm32l4xx_ll_cortex.h
│ ├── stm32l4xx_ll_crs.h
│ ├── stm32l4xx_ll_dma.h
│ ├── stm32l4xx_ll_dmamux.h
│ ├── stm32l4xx_ll_exti.h
│ ├── stm32l4xx_ll_gpio.h
│ ├── stm32l4xx_ll_i2c.h
│ ├── stm32l4xx_ll_lpuart.h
│ ├── stm32l4xx_ll_pwr.h
│ ├── stm32l4xx_ll_rcc.h
│ ├── stm32l4xx_ll_system.h
│ ├── stm32l4xx_ll_tim.h
│ ├── stm32l4xx_ll_usart.h
│ └── stm32l4xx_ll_utils.h
│ ├── LICENSE.txt
│ ├── License.md
│ └── Src
│ ├── stm32l4xx_hal.c
│ ├── stm32l4xx_hal_cortex.c
│ ├── stm32l4xx_hal_dma.c
│ ├── stm32l4xx_hal_dma_ex.c
│ ├── stm32l4xx_hal_exti.c
│ ├── stm32l4xx_hal_flash.c
│ ├── stm32l4xx_hal_flash_ex.c
│ ├── stm32l4xx_hal_flash_ramfunc.c
│ ├── stm32l4xx_hal_gpio.c
│ ├── stm32l4xx_hal_i2c.c
│ ├── stm32l4xx_hal_i2c_ex.c
│ ├── stm32l4xx_hal_pwr.c
│ ├── stm32l4xx_hal_pwr_ex.c
│ ├── stm32l4xx_hal_rcc.c
│ ├── stm32l4xx_hal_rcc_ex.c
│ ├── stm32l4xx_hal_spi.c
│ ├── stm32l4xx_hal_spi_ex.c
│ ├── stm32l4xx_hal_tim.c
│ ├── stm32l4xx_hal_tim_ex.c
│ ├── stm32l4xx_hal_uart.c
│ ├── stm32l4xx_hal_uart_ex.c
│ ├── stm32l4xx_ll_dma.c
│ ├── stm32l4xx_ll_exti.c
│ ├── stm32l4xx_ll_gpio.c
│ ├── stm32l4xx_ll_i2c.c
│ ├── stm32l4xx_ll_tim.c
│ └── stm32l4xx_ll_utils.c
├── README.md
├── RTT
├── SEGGER_RTT.c
├── SEGGER_RTT.h
├── SEGGER_RTT_Conf.h
├── SEGGER_RTT_printf.c
├── platformDebug.h
└── platformDebugOpt.h
├── Releaselib
└── libdppa.a
├── STM32L431RCTX_FLASH.ld
├── STM32L431RCTX_FLASH_APP.ld
├── STM32L431RCTX_FLASH_RELEASE.ld
├── doc
├── DP-softStack V1.1.png
└── Schematic_profibusDP-stm.pdf
├── profibus_DP_PA_soft.ioc
├── src
├── DpCfg.h
├── README.md
├── dp_App.h
├── dp_demo.c
├── dp_port.c
├── dp_port.h
└── pa_demo.c
└── stack
├── .gitignore
├── PA
├── PA.h
└── PA_map.h
├── dp.h
└── dpl_list.h
/.gitignore:
--------------------------------------------------------------------------------
1 | # Compiled Object files
2 | *.slo
3 | *.lo
4 | *.o
5 | *.obj
6 | *.mk
7 | *.list
8 | *.map
9 | *.d
10 | *.su
11 |
12 | makefile
13 |
14 |
15 | # Compiled Dynamic libraries
16 | # *.so
17 | # *.dylib
18 | # *.dll
19 |
20 | # Compiled Static libraries
21 | # *.lai
22 | # *.la
23 | # *.a
24 | # *.lib
25 |
26 | # Executables
27 | *.exe
28 | *.out
29 | *.app
30 | *.elf
31 |
32 | /Debug/
33 | /Debug_Boot/
34 | /Release/
35 | /ReleaseApp/
36 |
--------------------------------------------------------------------------------
/.project:
--------------------------------------------------------------------------------
1 |
2 |
3 | profibus_DP_PA_soft
4 |
5 |
6 |
7 |
8 |
9 | org.eclipse.cdt.managedbuilder.core.genmakebuilder
10 | clean,full,incremental,
11 |
12 |
13 |
14 |
15 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
16 | full,incremental,
17 |
18 |
19 |
20 |
21 |
22 | com.st.stm32cube.ide.mcu.MCUProjectNature
23 | org.eclipse.cdt.core.cnature
24 | com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAev2ProjectNature
25 | com.st.stm32cube.ide.mcu.MCUCubeProjectNature
26 | com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature
27 | com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature
28 | com.st.stm32cube.ide.mcu.MCURootProjectNature
29 | org.eclipse.cdt.managedbuilder.core.managedBuildNature
30 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
31 |
32 |
33 |
--------------------------------------------------------------------------------
/.settings/language.settings.xml:
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1 |
2 |
3 |
4 |
5 |
6 |
7 |
8 |
9 |
10 |
11 |
12 |
13 |
14 |
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/.settings/org.eclipse.core.resources.prefs:
--------------------------------------------------------------------------------
1 | eclipse.preferences.version=1
2 | encoding//src/DpCfg.h=GBK
3 | encoding//src/dp_demo.c=GBK
4 | encoding//src/dp_port.c=GBK
5 | encoding//src/dp_port.h=GBK
6 | encoding//src/pa_demo.c=GBK
7 | encoding//stack/crc_common.c=UTF-8
8 | encoding//stack/crc_common.h=UTF-8
9 | encoding//stack/dp.h=UTF-8
10 | encoding/stack=GBK
11 |
--------------------------------------------------------------------------------
/.settings/stm32cubeide.project.prefs:
--------------------------------------------------------------------------------
1 | 2F62501ED4689FB349E356AB974DBE57=69F63AA1B93EEEF42F2492CE63F12AED
2 | 8DF89ED150041C4CBC7CB9A9CAA90856=69F63AA1B93EEEF42F2492CE63F12AED
3 | DC22A860405A8BF2F2C095E5B6529F12=C1ADC3C076B702F0994996F5B22158A3
4 | eclipse.preferences.version=1
5 |
--------------------------------------------------------------------------------
/Core/Inc/ds18b20.h:
--------------------------------------------------------------------------------
1 | /*
2 | * ds18b20.h
3 | *
4 | * Created on: Aug 27, 2022
5 | * Author: fred
6 | */
7 |
8 | #ifndef INC_ds18B20_H_
9 | #define INC_ds18B20_H_
10 |
11 |
12 | #include
13 |
14 | uint8_t ds18B20_Init(void); //初始化ds18B20
15 | short ds18B20_Get_Temp(void); //获取温度
16 | void ds18B20_Start(void); //开始温度转换
17 | void ds18B20_Write_Byte(uint8_t dat);//写入一个字节
18 | uint8_t ds18B20_Read_Byte(void); //读出一个字节
19 | uint8_t ds18B20_Read_Bit(void); //读出一个位
20 | uint8_t ds18B20_Check(void); //检测是否存在ds18B20
21 | void ds18B20_Rst(void); //复位ds18B20
22 | float single_point_Read_Temperature_12bit(int(*delayFuction)(uint32_t));
23 | float single_point_Read_Temperature_14bit(int(*delayFuction)(uint32_t));
24 |
25 |
26 | #endif /* INC_ds18B20_H_ */
27 |
--------------------------------------------------------------------------------
/Core/Inc/main.h:
--------------------------------------------------------------------------------
1 | /* USER CODE BEGIN Header */
2 | /**
3 | ******************************************************************************
4 | * @file : main.h
5 | * @brief : Header for main.c file.
6 | * This file contains the common defines of the application.
7 | ******************************************************************************
8 | * @attention
9 | *
10 | * © Copyright (c) 2021 STMicroelectronics.
11 | * All rights reserved.
12 | *
13 | * This software component is licensed by ST under BSD 3-Clause license,
14 | * the "License"; You may not use this file except in compliance with the
15 | * License. You may obtain a copy of the License at:
16 | * opensource.org/licenses/BSD-3-Clause
17 | *
18 | ******************************************************************************
19 | */
20 | /* USER CODE END Header */
21 |
22 | /* Define to prevent recursive inclusion -------------------------------------*/
23 | #ifndef __MAIN_H
24 | #define __MAIN_H
25 |
26 | #ifdef __cplusplus
27 | extern "C" {
28 | #endif
29 |
30 | /* Includes ------------------------------------------------------------------*/
31 | #include "stm32l4xx_hal.h"
32 | #include "stm32l4xx_ll_i2c.h"
33 | #include "stm32l4xx_ll_tim.h"
34 | #include "stm32l4xx_ll_bus.h"
35 | #include "stm32l4xx_ll_cortex.h"
36 | #include "stm32l4xx_ll_rcc.h"
37 | #include "stm32l4xx_ll_system.h"
38 | #include "stm32l4xx_ll_utils.h"
39 | #include "stm32l4xx_ll_pwr.h"
40 | #include "stm32l4xx_ll_gpio.h"
41 | #include "stm32l4xx_ll_dma.h"
42 |
43 | #include "stm32l4xx_ll_exti.h"
44 |
45 | /* Private includes ----------------------------------------------------------*/
46 | /* USER CODE BEGIN Includes */
47 |
48 | /* USER CODE END Includes */
49 |
50 | /* Exported types ------------------------------------------------------------*/
51 | /* USER CODE BEGIN ET */
52 | #define DEMO_NUM_RESULTS 6
53 | #define MSP_SPI_MSG_LENGTH sizeof(LSDemo_ChirpData)
54 | /**
55 | * @brief
56 | * Chirp output data
57 | *
58 | * @details
59 | * The structure is contains the processed chirp data that will be transmitted
60 | * from the IWR1443 to the MSP432.
61 | */
62 |
63 | typedef struct LSDemo_ChirpData_t
64 | {
65 | /*! * @brief The top N distances captured by the radar chirp. */
66 | float distance[DEMO_NUM_RESULTS];
67 |
68 | /*! @brief The raw power (squared) of the frequency bin. */
69 | uint32_t power_sqr[DEMO_NUM_RESULTS];
70 | /*! @brief IWR1443 measurement error code. */
71 | int32_t err;
72 | int32_t pad;
73 | } __attribute((aligned (4))) LSDemo_ChirpData;
74 |
75 |
76 |
77 |
78 | /* USER CODE END ET */
79 |
80 | /* Exported constants --------------------------------------------------------*/
81 | /* USER CODE BEGIN EC */
82 |
83 | /* USER CODE END EC */
84 |
85 | /* Exported macro ------------------------------------------------------------*/
86 | /* USER CODE BEGIN EM */
87 |
88 | /* USER CODE END EM */
89 |
90 | /* Exported functions prototypes ---------------------------------------------*/
91 | void Error_Handler(void);
92 |
93 | /* USER CODE BEGIN EFP */
94 | void gpio_PGD24V_offpower(void);
95 | void gpio_PGD24V_onpower(void);
96 | void do_fmcw(void);
97 | void output_measure(LSDemo_ChirpData *chirp_data);
98 | void gpio_set_gpio1(uint32_t value);
99 | void gpio_enter_ir1443_reset(void);
100 | void gpio_release_ir1443_reset(void);
101 | int32_t gpio_wait_on_ir14xx_gpio0(uint32_t pend_value);
102 | LSDemo_ChirpData *perform_measurement(void);
103 | void spi_swap_data(uint8_t *buffer, uint32_t length);
104 | void *spi_get_transfer(uint32_t size);
105 |
106 | /* USER CODE END EFP */
107 |
108 | /* Private defines -----------------------------------------------------------*/
109 | #define IO_18B20_Pin GPIO_PIN_2
110 | #define IO_18B20_GPIO_Port GPIOA
111 | #define ADDR3_Pin GPIO_PIN_4
112 | #define ADDR3_GPIO_Port GPIOA
113 | #define ADDR2_Pin GPIO_PIN_5
114 | #define ADDR2_GPIO_Port GPIOA
115 | #define ADDR1_Pin GPIO_PIN_6
116 | #define ADDR1_GPIO_Port GPIOA
117 | #define ADDR0_Pin GPIO_PIN_7
118 | #define ADDR0_GPIO_Port GPIOA
119 | #define KEY3_Pin GPIO_PIN_0
120 | #define KEY3_GPIO_Port GPIOB
121 | #define HOTTING_Pin GPIO_PIN_1
122 | #define HOTTING_GPIO_Port GPIOB
123 | #define COOLING_Pin GPIO_PIN_2
124 | #define COOLING_GPIO_Port GPIOB
125 | #define HOTSET_Pin GPIO_PIN_10
126 | #define HOTSET_GPIO_Port GPIOB
127 | #define COOLSET_Pin GPIO_PIN_11
128 | #define COOLSET_GPIO_Port GPIOB
129 | #define LED_DEX_Pin GPIO_PIN_8
130 | #define LED_DEX_GPIO_Port GPIOC
131 | #define LED_RUN_Pin GPIO_PIN_9
132 | #define LED_RUN_GPIO_Port GPIOC
133 | #define UART1_RTS_Pin GPIO_PIN_11
134 | #define UART1_RTS_GPIO_Port GPIOA
135 | #define SPI_WP_Pin GPIO_PIN_6
136 | #define SPI_WP_GPIO_Port GPIOB
137 | #define SPI_HOLD_Pin GPIO_PIN_7
138 | #define SPI_HOLD_GPIO_Port GPIOB
139 | /* USER CODE BEGIN Private defines */
140 | //#define selfdeside 1 //self deside the top power
141 | #define otherdeside 1 //other MCU deside the top power
142 | /* USER CODE END Private defines */
143 |
144 | #ifdef __cplusplus
145 | }
146 | #endif
147 |
148 | #endif /* __MAIN_H */
149 |
--------------------------------------------------------------------------------
/Core/Inc/stm32_assert.h:
--------------------------------------------------------------------------------
1 | /* USER CODE BEGIN Header */
2 | /**
3 | ******************************************************************************
4 | * @file stm32_assert.h
5 | * @brief STM32 assert file.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * Copyright (c) 2018 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software is licensed under terms that can be found in the LICENSE file
13 | * in the root directory of this software component.
14 | * If no LICENSE file comes with this software, it is provided AS-IS.
15 | *
16 | ******************************************************************************
17 | */
18 | /* USER CODE END Header */
19 |
20 | /* Define to prevent recursive inclusion -------------------------------------*/
21 | #ifndef __STM32_ASSERT_H
22 | #define __STM32_ASSERT_H
23 |
24 | #ifdef __cplusplus
25 | extern "C" {
26 | #endif
27 |
28 | /* Exported types ------------------------------------------------------------*/
29 | /* Exported constants --------------------------------------------------------*/
30 | /* Includes ------------------------------------------------------------------*/
31 | /* Exported macro ------------------------------------------------------------*/
32 | #ifdef USE_FULL_ASSERT
33 | /**
34 | * @brief The assert_param macro is used for function's parameters check.
35 | * @param expr: If expr is false, it calls assert_failed function
36 | * which reports the name of the source file and the source
37 | * line number of the call that failed.
38 | * If expr is true, it returns no value.
39 | * @retval None
40 | */
41 | #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
42 | /* Exported functions ------------------------------------------------------- */
43 | void assert_failed(uint8_t* file, uint32_t line);
44 | #else
45 | #define assert_param(expr) ((void)0U)
46 | #endif /* USE_FULL_ASSERT */
47 |
48 | #ifdef __cplusplus
49 | }
50 | #endif
51 |
52 | #endif /* __STM32_ASSERT_H */
53 |
54 |
--------------------------------------------------------------------------------
/Core/Inc/stm32l4xx_it.h:
--------------------------------------------------------------------------------
1 | /* USER CODE BEGIN Header */
2 | /**
3 | ******************************************************************************
4 | * @file stm32l4xx_it.h
5 | * @brief This file contains the headers of the interrupt handlers.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2021 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 | /* USER CODE END Header */
20 |
21 | /* Define to prevent recursive inclusion -------------------------------------*/
22 | #ifndef __STM32L4xx_IT_H
23 | #define __STM32L4xx_IT_H
24 |
25 | #ifdef __cplusplus
26 | extern "C" {
27 | #endif
28 |
29 | /* Private includes ----------------------------------------------------------*/
30 | /* USER CODE BEGIN Includes */
31 |
32 | /* USER CODE END Includes */
33 |
34 | /* Exported types ------------------------------------------------------------*/
35 | /* USER CODE BEGIN ET */
36 |
37 | /* USER CODE END ET */
38 |
39 | /* Exported constants --------------------------------------------------------*/
40 | /* USER CODE BEGIN EC */
41 |
42 | /* USER CODE END EC */
43 |
44 | /* Exported macro ------------------------------------------------------------*/
45 | /* USER CODE BEGIN EM */
46 |
47 | /* USER CODE END EM */
48 |
49 | /* Exported functions prototypes ---------------------------------------------*/
50 | void NMI_Handler(void);
51 | void HardFault_Handler(void);
52 | void MemManage_Handler(void);
53 | void BusFault_Handler(void);
54 | void UsageFault_Handler(void);
55 | void SVC_Handler(void);
56 | void DebugMon_Handler(void);
57 | void PendSV_Handler(void);
58 | void SysTick_Handler(void);
59 | void DMA1_Channel4_IRQHandler(void);
60 | void DMA1_Channel5_IRQHandler(void);
61 | void USART1_IRQHandler(void);
62 | /* USER CODE BEGIN EFP */
63 |
64 | /* USER CODE END EFP */
65 |
66 | #ifdef __cplusplus
67 | }
68 | #endif
69 |
70 | #endif /* __STM32L4xx_IT_H */
71 |
--------------------------------------------------------------------------------
/Core/Src/ds18b20.c:
--------------------------------------------------------------------------------
1 | /*
2 | * ds18b20.c
3 | *
4 | * Created on: Aug 27, 2022
5 | * Author: fred
6 | */
7 |
8 |
9 | #include "ds18b20.h"
10 | //#include "tim.h"
11 | #include "main.h"
12 |
13 | //
14 | //void GPIO_AFSet(GPIO_TypeDef *gpio, uint32_t pin, uint8_t dat)
15 | //{
16 | // if (pin < 8)
17 | // {
18 | // gpio->AFR[0] &= ~(0X07 << (4uL * pin));
19 | // gpio->AFR[0] |= dat << (4uL * pin);
20 | // }
21 | // else
22 | // {
23 | // pin -= 8;
24 | // gpio->AFR[1] &= ~(0X07 << (4uL * pin));
25 | // gpio->AFR[1] |= dat << (4uL * pin);
26 | // }
27 | //}
28 | //void GPIO_Set(GPIO_TypeDef *gpio,uint32_t pin, uint8_t mode,uint8_t oty,uint8_t pup,uint8_t speed)
29 | //{
30 | // uint32_t tmp;
31 | //
32 | // tmp = ~(0X03 << (pin * 2uL));
33 | //
34 | // gpio->MODER &= tmp;
35 | // gpio->MODER |= mode << (pin * 2uL);
36 | //
37 | // gpio->PUPDR &= tmp;
38 | // gpio->PUPDR |= pup << (pin * 2uL);
39 | //
40 | // gpio->OSPEEDR &= tmp;
41 | // gpio->OSPEEDR |= speed << (pin * 2uL);
42 | //
43 | // tmp = ~(0X01 << pin);
44 | // gpio->OTYPER |= oty << pin;
45 | //}
46 | //
47 | //
48 | //void GPIO_Out(GPIO_TypeDef *gpio, uint32_t pin, uint32_t out)
49 | //{
50 | // if (out == 1)
51 | // {
52 | // gpio->ODR |= 1uL << pin;
53 | // }
54 | // else
55 | // {
56 | // gpio->ODR &= ~(1uL << pin);
57 | // }
58 | //}
59 | //GPIO_PinState GPIO_In(GPIO_TypeDef *gpio,uint32_t pin)
60 | //{
61 | // if(((1uL << pin)&gpio->IDR) != 0)
62 | // {
63 | // return GPIO_PIN_SET;
64 | // }
65 | //
66 | // return GPIO_PIN_RESET;
67 | //}
68 | /**
69 | * 此延时函数代码适用于HAL库
70 | */
71 | static void delay_us(uint32_t delayUs)
72 | {
73 | TIM6->SR &= ~TIM_SR_UIF;
74 | TIM6->ARR = delayUs + 1;
75 | TIM6->CR1 |= (TIM_CR1_CEN|TIM_CR1_URS);
76 | TIM6->CNT = 0 ;
77 | while(!(TIM6->SR & TIM_SR_UIF));
78 | TIM6->CR1 &= ~(TIM_CR1_CEN);
79 | TIM6->SR &= ~TIM_SR_UIF;
80 | }
81 |
82 | static void ds18B20_IO_OUT(void)
83 | {
84 | GPIO_InitTypeDef GPIO_InitStruct = {0};
85 |
86 | GPIO_InitStruct.Pin = IO_18B20_Pin;
87 | GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD;
88 | GPIO_InitStruct.Pull = GPIO_NOPULL;
89 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
90 | HAL_GPIO_Init(IO_18B20_GPIO_Port, &GPIO_InitStruct);
91 |
92 | //GPIO_Set(IO_18B20_GPIO_Port,10,MODE_OUTPUT,1,GPIO_NOPULL,GPIO_SPEED_FREQ_LOW);
93 | }
94 |
95 | static void ds18B20_IO_IN(void)
96 | {
97 | GPIO_InitTypeDef GPIO_InitStruct = {0};
98 |
99 | GPIO_InitStruct.Pin = IO_18B20_Pin;
100 | GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
101 | GPIO_InitStruct.Pull = GPIO_NOPULL;
102 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
103 | HAL_GPIO_Init(IO_18B20_GPIO_Port, &GPIO_InitStruct);
104 |
105 | // GPIO_Set(IO_18B20_GPIO_Port,10,MODE_INPUT,1,GPIO_NOPULL,GPIO_SPEED_FREQ_LOW);
106 | }
107 |
108 | static void ds18B20_DQ_OUT(int state)
109 | {
110 | HAL_GPIO_WritePin(IO_18B20_GPIO_Port, IO_18B20_Pin, state ? GPIO_PIN_SET : GPIO_PIN_RESET);
111 | // GPIO_Out(IO_18B20_GPIO_Port,10,state ? GPIO_PIN_SET : GPIO_PIN_RESET);
112 | }
113 |
114 | static int ds18B20_DQ_IN(void)
115 | {
116 | return HAL_GPIO_ReadPin(IO_18B20_GPIO_Port, IO_18B20_Pin) == GPIO_PIN_SET ? 1 : 0;
117 | }
118 |
119 |
120 | /**
121 | **********************************************************************************************
122 | *
123 | * ds18B20驱动
124 | *
125 | */
126 |
127 |
128 | //复位ds18B20
129 | void ds18B20_Rst(void)
130 | {
131 | #if 1
132 | ds18B20_IO_OUT(); //SET PA0 OUTPUT
133 | ds18B20_DQ_OUT(0); //拉低DQ
134 | delay_us(490); //拉低750us
135 | ds18B20_DQ_OUT(1); //DQ=1
136 | delay_us(28); //15US
137 | #else
138 | uint16_t i;
139 | uint8_t tmp = 0;
140 |
141 | ds18B20_DQ_OUT(0);
142 | ds18B20_IO_OUT();
143 |
144 | delay_us(480);//480us
145 | //ds18B20_DQ_OUT(1);
146 | delay_us(60);//60us
147 | ds18B20_IO_IN();
148 | delay_us(30);//60us
149 | for(i = 0;i != 2000;i++) //判断从机是否拉低
150 | {
151 | if(ds18B20_DQ_IN() == 0)
152 | {
153 | tmp = 0;
154 | break;
155 | }
156 | }
157 |
158 | for(i = 0;i != 2000;i++) //判断从机是否释放
159 | {
160 | if(ds18B20_DQ_IN() == 1)
161 | {
162 | break;
163 | }
164 | }
165 | delay_us(2);//
166 | #endif
167 | }
168 |
169 | //等待ds18B20的回应
170 | //返回1:未检测到ds18B20的存在
171 | //返回0:存在
172 | uint8_t ds18B20_Check(void)
173 | {
174 | uint8_t retry=0;
175 | ds18B20_IO_IN();//SET PA0 INPUT
176 | while (ds18B20_DQ_IN() && retry<200)
177 | {
178 | retry++;
179 | delay_us(1);
180 | };
181 | if(retry>=200)return 1;
182 | else retry=0;
183 | while (!ds18B20_DQ_IN()&&retry<240)
184 | {
185 | retry++;
186 | delay_us(1);
187 | };
188 | if(retry>=240)return 1;
189 | return 0;
190 | }
191 | //从ds18B20读取一个位
192 | //返回值：1/0
193 | uint8_t ds18B20_Read_Bit(void) // read one bit
194 | {
195 | #if 1
196 | uint8_t data;
197 | ds18B20_IO_OUT();
198 | ds18B20_DQ_OUT(0);
199 | delay_us(4);
200 | ds18B20_DQ_OUT(1);
201 | ds18B20_IO_IN();
202 | delay_us(2);
203 | if(ds18B20_DQ_IN())data=1;
204 | else data=0;
205 | delay_us(55);
206 | return data;
207 | #else
208 |
209 | #endif
210 | }
211 | void ds18B20_Write_Bit(uint8_t bitVal)//写一位
212 | {
213 | ds18B20_IO_OUT();
214 | ds18B20_DQ_OUT(0);
215 | delay_us(4);
216 | if(bitVal)
217 | {
218 | ds18B20_DQ_OUT(1);
219 | }
220 | else
221 | {
222 | ds18B20_DQ_OUT(0);
223 | }
224 |
225 | delay_us(58);
226 | ds18B20_IO_IN();
227 | delay_us(5);
228 | }
229 | //从ds18B20读取一个字节
230 | //返回值：读到的数据
231 | uint8_t ds18B20_Read_Byte(void) // read one byte
232 | {
233 | volatile uint8_t i,j,dat;
234 | dat=0;
235 | for (i=1;i<=8;i++)
236 | {
237 | j=ds18B20_Read_Bit();
238 | dat=(j<<7)|(dat>>1);
239 | }
240 | return dat;
241 | }
242 | //写一个字节到ds18B20
243 | //dat：要写入的字节
244 | void ds18B20_Write_Byte(uint8_t dat)
245 | {
246 | #if 0
247 | uint8_t j;
248 | uint8_t testb;
249 | ds18B20_IO_OUT();//SET PA0 OUTPUT;
250 | for (j=1;j<=8;j++)
251 | {
252 | testb=dat&0x01;
253 | dat=dat>>1;
254 | if (testb)
255 | {
256 | ds18B20_DQ_OUT(0);// Write 1
257 | delay_us(8);
258 | ds18B20_DQ_OUT(1);
259 | delay_us(58);
260 | ds18B20_IO_IN();
261 | delay_us(5);
262 | }
263 | else
264 | {
265 | ds18B20_DQ_OUT(0);// Write 0
266 | delay_us(8);
267 | ds18B20_DQ_OUT(0);
268 | delay_us(58);
269 | ds18B20_IO_IN();
270 | delay_us(5);
271 | }
272 | }
273 | #else
274 | unsigned char i;
275 | volatile unsigned char temp;
276 | for (i = 0; i < 8; i++)
277 | {
278 | temp = dat >> i;
279 | temp &= 0x01; // 低位先行
280 | ds18B20_Write_Bit(temp);
281 | }
282 | #endif
283 | }
284 |
285 |
286 | //开始温度转换
287 | void ds18B20_Start(void)// ds1820 start convert
288 | {
289 | ds18B20_Rst();
290 | ds18B20_Check();
291 | ds18B20_Write_Byte(0xcc);// skip rom
292 | ds18B20_Write_Byte(0x44);// convert
293 | }
294 |
295 |
296 |
297 | //初始化ds18B20的IO口 DQ 同时检测DS的存在
298 | //返回1:不存在
299 | //返回0:存在
300 | uint8_t ds18B20_Init(void)
301 | {
302 | //TIM3 for delay,1 uS
303 | __HAL_RCC_TIM6_CLK_ENABLE();
304 | TIM6->CR1 = 0X00 ;
305 | //TIM3->CR1 |= TIM_CR1_ARPE ;
306 | TIM6->PSC = HAL_RCC_GetPCLK1Freq()/1000000-1; //频率
307 | //TIM3->ARR = 0XFFFF;
308 | TIM6->CR1 |= TIM_CR1_CEN;
309 |
310 | ds18B20_Rst();
311 | return ds18B20_Check();
312 | }
313 |
314 | //从ds18b20得到温度值
315 | //精度：0.1C
316 | //返回值：温度值 （-550~1250）
317 | short ds18B20_Get_Temp(void)
318 | {
319 | uint8_t temp;
320 | uint8_t TL,TH;
321 | short tem;
322 | ds18B20_Start (); // ds1820 start convert
323 | ds18B20_Rst();
324 | ds18B20_Check();
325 | ds18B20_Write_Byte(0xcc);// skip rom
326 | ds18B20_Write_Byte(0xbe);// convert
327 | TL=ds18B20_Read_Byte(); // LSB
328 | TH=ds18B20_Read_Byte(); // MSB
329 | if(TH>7)
330 | {
331 | TH=~TH;
332 | TL=~TL;
333 | temp=0;//温度为负
334 | }else temp=1;//温度为正
335 | tem=TH; //获得高八位
336 | tem<<=8;
337 | tem+=TL;//获得底八位
338 | tem=(float)tem*0.625;//转换
339 | if(temp)return tem; //返回温度值
340 | else return -tem;
341 | }
342 |
343 | // 计算字节序列的校验和
344 | static uint8_t CRC8MY(uint8_t *serial, uint8_t length)
345 | {
346 | uint8_t result = 0x00;
347 | uint8_t pDataBuf;
348 | uint8_t i;
349 |
350 | while(length--) {
351 | pDataBuf = *serial++;
352 | for(i=0; i<8; i++) {
353 | if((result^(pDataBuf))&0x01) {
354 | result ^= 0x18;
355 | result >>= 1;
356 | result |= 0x80;
357 | }
358 | else {
359 | result >>= 1;
360 | }
361 | pDataBuf >>= 1;
362 | }
363 | }
364 | return result; //返回校验和
365 | }
366 |
367 | float single_point_Read_Temperature_12bit(int(*delayFuction)(uint32_t)) {
368 | uint8_t get[9];
369 | unsigned i;
370 | float f_tem = -100000;
371 |
372 | ds18B20_Rst();
373 | ds18B20_Check();
374 | ds18B20_Write_Byte(0xCC); //Skip ROM，或使用匹配ROM序列号（见后文）
375 | ds18B20_Write_Byte(0x44); // 转换温度
376 | if(delayFuction)
377 | delayFuction(10);
378 | else
379 | delay_us(10 * 1000);
380 | // 温度转换时间，应根据配置选择10ms，114ms或500ms。
381 |
382 | ds18B20_Rst();
383 | ds18B20_Check();
384 | ds18B20_Write_Byte(0xCC); // Skip ROM，或使用匹配ROM序列号（见后文）
385 | ds18B20_Write_Byte(0xBE); // 读取Scratch Pad中数值
386 |
387 | for (i = 0; i < 9; i++)
388 | get[i] = ds18B20_Read_Byte();
389 |
390 | if (get[8] != CRC8MY(get, 8)) {
391 | // printf("\nCRC Error\n");
392 | } else {
393 | f_tem = (float) (get[1] << 8 | get[0]) / 16.0;
394 | // printf( "\nTempF= %f degrees C\n", f_tem); //打印摄氏温度
395 | }
396 | return f_tem;
397 | }
398 |
399 | float single_point_Read_Temperature_14bit(int(*delayFuction)(uint32_t))
400 | {
401 | uint8_t get[9];
402 | uint8_t tpmsb, tplsb, i;
403 | short s_tem, temp;
404 | float f_tem = -10000;
405 | uint16_t lsb_tem;
406 | ds18B20_Rst();
407 | ds18B20_Check();
408 | ds18B20_Write_Byte(0xCC); //Skip ROM，或使用匹配ROM序列号（见后文）
409 | ds18B20_Write_Byte(0x44); // 转换温度
410 | if(delayFuction)
411 | delayFuction(20);
412 | else
413 | delay_us(20 * 1000);
414 | // 温度转换时间，应根据配置选择20ms或114ms。
415 |
416 | ds18B20_Rst();
417 | ds18B20_Check();
418 | ds18B20_Write_Byte(0xCC); // Skip ROM，或使用匹配ROM序列号（见后文）
419 | ds18B20_Write_Byte(0xBE); // 读取Scratch Pad中数值
420 |
421 | for (i = 0; i < 9; i++)
422 | get[i] = ds18B20_Read_Byte();
423 |
424 | if (get[8] != CRC8MY(get, 8)) {
425 | //printf("\nCRC Error\n");
426 | } else {
427 | tpmsb = get[1]; // 温度高字节
428 | tplsb = get[0]; // 温度低字节
429 | s_tem = tpmsb << 8;
430 | s_tem = s_tem | tplsb;
431 | lsb_tem = s_tem & 49152;
432 | lsb_tem = lsb_tem >> 14;
433 |
434 | s_tem = s_tem & 4095;
435 | temp = s_tem << 2;
436 | s_tem = temp | lsb_tem;
437 | if ((s_tem & 8192) == 8192) {
438 | s_tem = (s_tem ^ 16383) & 16383;
439 | f_tem = -1 * (s_tem + 1) * 0.015625; //温度为负值
440 | } else
441 | f_tem = s_tem * 0.015625;
442 | // printf( "\nTempF= %f degrees C\n", f_tem); //打印摄氏温度
443 | }
444 | return f_tem;
445 | }
446 | /*
447 |
448 | 代码使用示例：
449 |
450 | int main()
451 | {
452 | short temp;
453 |
454 | while(ds18B20_Init())
455 | {
456 | printf(" ds18b20 init failed ! \r\n");
457 | HAL_Delay(1000);
458 | }
459 |
460 | while(1)
461 | {
462 | temp = ds18B20_Get_Temp();
463 | printf("当前温度:%0.2f \r\n", (float)temp / 10);
464 | HAL_Delay(1000);
465 | }
466 | }
467 |
468 | */
469 |
470 |
471 |
--------------------------------------------------------------------------------
/Core/Src/stm32l4xx_hal_msp.c:
--------------------------------------------------------------------------------
1 | /* USER CODE BEGIN Header */
2 | /**
3 | ******************************************************************************
4 | * @file stm32l4xx_hal_msp.c
5 | * @brief This file provides code for the MSP Initialization
6 | * and de-Initialization codes.
7 | ******************************************************************************
8 | * @attention
9 | *
10 | * © Copyright (c) 2021 STMicroelectronics.
11 | * All rights reserved.
12 | *
13 | * This software component is licensed by ST under BSD 3-Clause license,
14 | * the "License"; You may not use this file except in compliance with the
15 | * License. You may obtain a copy of the License at:
16 | * opensource.org/licenses/BSD-3-Clause
17 | *
18 | ******************************************************************************
19 | */
20 | /* USER CODE END Header */
21 |
22 | /* Includes ------------------------------------------------------------------*/
23 | #include "main.h"
24 | /* USER CODE BEGIN Includes */
25 |
26 | /* USER CODE END Includes */
27 | extern DMA_HandleTypeDef hdma_usart1_rx;
28 |
29 | extern DMA_HandleTypeDef hdma_usart1_tx;
30 |
31 | /* Private typedef -----------------------------------------------------------*/
32 | /* USER CODE BEGIN TD */
33 |
34 | /* USER CODE END TD */
35 |
36 | /* Private define ------------------------------------------------------------*/
37 | /* USER CODE BEGIN Define */
38 |
39 | /* USER CODE END Define */
40 |
41 | /* Private macro -------------------------------------------------------------*/
42 | /* USER CODE BEGIN Macro */
43 |
44 | /* USER CODE END Macro */
45 |
46 | /* Private variables ---------------------------------------------------------*/
47 | /* USER CODE BEGIN PV */
48 |
49 | /* USER CODE END PV */
50 |
51 | /* Private function prototypes -----------------------------------------------*/
52 | /* USER CODE BEGIN PFP */
53 |
54 | /* USER CODE END PFP */
55 |
56 | /* External functions --------------------------------------------------------*/
57 | /* USER CODE BEGIN ExternalFunctions */
58 |
59 | /* USER CODE END ExternalFunctions */
60 |
61 | /* USER CODE BEGIN 0 */
62 |
63 | /* USER CODE END 0 */
64 | /**
65 | * Initializes the Global MSP.
66 | */
67 | void HAL_MspInit(void)
68 | {
69 | /* USER CODE BEGIN MspInit 0 */
70 |
71 | /* USER CODE END MspInit 0 */
72 |
73 | __HAL_RCC_SYSCFG_CLK_ENABLE();
74 | __HAL_RCC_PWR_CLK_ENABLE();
75 |
76 | /* System interrupt init*/
77 |
78 | /* USER CODE BEGIN MspInit 1 */
79 |
80 | /* USER CODE END MspInit 1 */
81 | }
82 |
83 | /**
84 | * @brief SPI MSP Initialization
85 | * This function configures the hardware resources used in this example
86 | * @param hspi: SPI handle pointer
87 | * @retval None
88 | */
89 | void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
90 | {
91 | GPIO_InitTypeDef GPIO_InitStruct = {0};
92 | if(hspi->Instance==SPI1)
93 | {
94 | /* USER CODE BEGIN SPI1_MspInit 0 */
95 |
96 | /* USER CODE END SPI1_MspInit 0 */
97 | /* Peripheral clock enable */
98 | __HAL_RCC_SPI1_CLK_ENABLE();
99 |
100 | __HAL_RCC_GPIOA_CLK_ENABLE();
101 | __HAL_RCC_GPIOB_CLK_ENABLE();
102 | /**SPI1 GPIO Configuration
103 | PA15 (JTDI) ------> SPI1_NSS
104 | PB3 (JTDO-TRACESWO) ------> SPI1_SCK
105 | PB4 (NJTRST) ------> SPI1_MISO
106 | PB5 ------> SPI1_MOSI
107 | */
108 | GPIO_InitStruct.Pin = GPIO_PIN_15;
109 | GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
110 | GPIO_InitStruct.Pull = GPIO_NOPULL;
111 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
112 | GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
113 | HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
114 |
115 | GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5;
116 | GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
117 | GPIO_InitStruct.Pull = GPIO_NOPULL;
118 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
119 | GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
120 | HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
121 |
122 | /* USER CODE BEGIN SPI1_MspInit 1 */
123 |
124 | /* USER CODE END SPI1_MspInit 1 */
125 | }
126 |
127 | }
128 |
129 | /**
130 | * @brief SPI MSP De-Initialization
131 | * This function freeze the hardware resources used in this example
132 | * @param hspi: SPI handle pointer
133 | * @retval None
134 | */
135 | void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
136 | {
137 | if(hspi->Instance==SPI1)
138 | {
139 | /* USER CODE BEGIN SPI1_MspDeInit 0 */
140 |
141 | /* USER CODE END SPI1_MspDeInit 0 */
142 | /* Peripheral clock disable */
143 | __HAL_RCC_SPI1_CLK_DISABLE();
144 |
145 | /**SPI1 GPIO Configuration
146 | PA15 (JTDI) ------> SPI1_NSS
147 | PB3 (JTDO-TRACESWO) ------> SPI1_SCK
148 | PB4 (NJTRST) ------> SPI1_MISO
149 | PB5 ------> SPI1_MOSI
150 | */
151 | HAL_GPIO_DeInit(GPIOA, GPIO_PIN_15);
152 |
153 | HAL_GPIO_DeInit(GPIOB, GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5);
154 |
155 | /* USER CODE BEGIN SPI1_MspDeInit 1 */
156 |
157 | /* USER CODE END SPI1_MspDeInit 1 */
158 | }
159 |
160 | }
161 |
162 | /**
163 | * @brief UART MSP Initialization
164 | * This function configures the hardware resources used in this example
165 | * @param huart: UART handle pointer
166 | * @retval None
167 | */
168 | void HAL_UART_MspInit(UART_HandleTypeDef* huart)
169 | {
170 | GPIO_InitTypeDef GPIO_InitStruct = {0};
171 | RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
172 | if(huart->Instance==USART1)
173 | {
174 | /* USER CODE BEGIN USART1_MspInit 0 */
175 |
176 | /* USER CODE END USART1_MspInit 0 */
177 |
178 | /** Initializes the peripherals clock
179 | */
180 | PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1;
181 | PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
182 | if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
183 | {
184 | Error_Handler();
185 | }
186 |
187 | /* Peripheral clock enable */
188 | __HAL_RCC_USART1_CLK_ENABLE();
189 |
190 | __HAL_RCC_GPIOA_CLK_ENABLE();
191 | /**USART1 GPIO Configuration
192 | PA9 ------> USART1_TX
193 | PA10 ------> USART1_RX
194 | PA12 ------> USART1_DE
195 | */
196 | GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_12;
197 | GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
198 | GPIO_InitStruct.Pull = GPIO_NOPULL;
199 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
200 | GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
201 | HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
202 |
203 | /* USART1 DMA Init */
204 | /* USART1_RX Init */
205 | hdma_usart1_rx.Instance = DMA1_Channel5;
206 | hdma_usart1_rx.Init.Request = DMA_REQUEST_2;
207 | hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
208 | hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
209 | hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE;
210 | hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
211 | hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
212 | hdma_usart1_rx.Init.Mode = DMA_NORMAL;
213 | hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW;
214 | if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK)
215 | {
216 | Error_Handler();
217 | }
218 |
219 | __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx);
220 |
221 | /* USART1_TX Init */
222 | hdma_usart1_tx.Instance = DMA1_Channel4;
223 | hdma_usart1_tx.Init.Request = DMA_REQUEST_2;
224 | hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
225 | hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
226 | hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE;
227 | hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
228 | hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
229 | hdma_usart1_tx.Init.Mode = DMA_NORMAL;
230 | hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW;
231 | if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
232 | {
233 | Error_Handler();
234 | }
235 |
236 | __HAL_LINKDMA(huart,hdmatx,hdma_usart1_tx);
237 |
238 | /* USART1 interrupt Init */
239 | HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
240 | HAL_NVIC_EnableIRQ(USART1_IRQn);
241 | /* USER CODE BEGIN USART1_MspInit 1 */
242 |
243 | /* USER CODE END USART1_MspInit 1 */
244 | }
245 | else if(huart->Instance==USART3)
246 | {
247 | /* USER CODE BEGIN USART3_MspInit 0 */
248 |
249 | /* USER CODE END USART3_MspInit 0 */
250 |
251 | /** Initializes the peripherals clock
252 | */
253 | PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART3;
254 | PeriphClkInit.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1;
255 | if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
256 | {
257 | Error_Handler();
258 | }
259 |
260 | /* Peripheral clock enable */
261 | __HAL_RCC_USART3_CLK_ENABLE();
262 |
263 | __HAL_RCC_GPIOC_CLK_ENABLE();
264 | /**USART3 GPIO Configuration
265 | PC10 ------> USART3_TX
266 | PC11 ------> USART3_RX
267 | */
268 | GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11;
269 | GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
270 | GPIO_InitStruct.Pull = GPIO_NOPULL;
271 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
272 | GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
273 | HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
274 |
275 | /* USER CODE BEGIN USART3_MspInit 1 */
276 |
277 | /* USER CODE END USART3_MspInit 1 */
278 | }
279 |
280 | }
281 |
282 | /**
283 | * @brief UART MSP De-Initialization
284 | * This function freeze the hardware resources used in this example
285 | * @param huart: UART handle pointer
286 | * @retval None
287 | */
288 | void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
289 | {
290 | if(huart->Instance==USART1)
291 | {
292 | /* USER CODE BEGIN USART1_MspDeInit 0 */
293 |
294 | /* USER CODE END USART1_MspDeInit 0 */
295 | /* Peripheral clock disable */
296 | __HAL_RCC_USART1_CLK_DISABLE();
297 |
298 | /**USART1 GPIO Configuration
299 | PA9 ------> USART1_TX
300 | PA10 ------> USART1_RX
301 | PA12 ------> USART1_DE
302 | */
303 | HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_12);
304 |
305 | /* USART1 DMA DeInit */
306 | HAL_DMA_DeInit(huart->hdmarx);
307 | HAL_DMA_DeInit(huart->hdmatx);
308 |
309 | /* USART1 interrupt DeInit */
310 | HAL_NVIC_DisableIRQ(USART1_IRQn);
311 | /* USER CODE BEGIN USART1_MspDeInit 1 */
312 |
313 | /* USER CODE END USART1_MspDeInit 1 */
314 | }
315 | else if(huart->Instance==USART3)
316 | {
317 | /* USER CODE BEGIN USART3_MspDeInit 0 */
318 |
319 | /* USER CODE END USART3_MspDeInit 0 */
320 | /* Peripheral clock disable */
321 | __HAL_RCC_USART3_CLK_DISABLE();
322 |
323 | /**USART3 GPIO Configuration
324 | PC10 ------> USART3_TX
325 | PC11 ------> USART3_RX
326 | */
327 | HAL_GPIO_DeInit(GPIOC, GPIO_PIN_10|GPIO_PIN_11);
328 |
329 | /* USER CODE BEGIN USART3_MspDeInit 1 */
330 |
331 | /* USER CODE END USART3_MspDeInit 1 */
332 | }
333 |
334 | }
335 |
336 | /* USER CODE BEGIN 1 */
337 |
338 | /* USER CODE END 1 */
339 |
--------------------------------------------------------------------------------
/Core/Src/stm32l4xx_it.c:
--------------------------------------------------------------------------------
1 | /* USER CODE BEGIN Header */
2 | /**
3 | ******************************************************************************
4 | * @file stm32l4xx_it.c
5 | * @brief Interrupt Service Routines.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2021 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 | /* USER CODE END Header */
20 |
21 | /* Includes ------------------------------------------------------------------*/
22 | #include "main.h"
23 | #include "stm32l4xx_it.h"
24 | /* Private includes ----------------------------------------------------------*/
25 | /* USER CODE BEGIN Includes */
26 | /* USER CODE END Includes */
27 |
28 | /* Private typedef -----------------------------------------------------------*/
29 | /* USER CODE BEGIN TD */
30 |
31 | /* USER CODE END TD */
32 |
33 | /* Private define ------------------------------------------------------------*/
34 | /* USER CODE BEGIN PD */
35 |
36 | /* USER CODE END PD */
37 |
38 | /* Private macro -------------------------------------------------------------*/
39 | /* USER CODE BEGIN PM */
40 |
41 | /* USER CODE END PM */
42 |
43 | /* Private variables ---------------------------------------------------------*/
44 | /* USER CODE BEGIN PV */
45 |
46 | /* USER CODE END PV */
47 |
48 | /* Private function prototypes -----------------------------------------------*/
49 | /* USER CODE BEGIN PFP */
50 |
51 | /* USER CODE END PFP */
52 |
53 | /* Private user code ---------------------------------------------------------*/
54 | /* USER CODE BEGIN 0 */
55 |
56 | /* USER CODE END 0 */
57 |
58 | /* External variables --------------------------------------------------------*/
59 | extern DMA_HandleTypeDef hdma_usart1_rx;
60 | extern DMA_HandleTypeDef hdma_usart1_tx;
61 | extern UART_HandleTypeDef huart1;
62 | /* USER CODE BEGIN EV */
63 |
64 | /* USER CODE END EV */
65 |
66 | /******************************************************************************/
67 | /* Cortex-M4 Processor Interruption and Exception Handlers */
68 | /******************************************************************************/
69 | /**
70 | * @brief This function handles Non maskable interrupt.
71 | */
72 | void NMI_Handler(void)
73 | {
74 | /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
75 |
76 | /* USER CODE END NonMaskableInt_IRQn 0 */
77 | /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
78 | while (1)
79 | {
80 | }
81 | /* USER CODE END NonMaskableInt_IRQn 1 */
82 | }
83 |
84 | /**
85 | * @brief This function handles Hard fault interrupt.
86 | */
87 | void HardFault_Handler(void)
88 | {
89 | /* USER CODE BEGIN HardFault_IRQn 0 */
90 |
91 | /* USER CODE END HardFault_IRQn 0 */
92 | while (1)
93 | {
94 | /* USER CODE BEGIN W1_HardFault_IRQn 0 */
95 | /* USER CODE END W1_HardFault_IRQn 0 */
96 | }
97 | }
98 |
99 | /**
100 | * @brief This function handles Memory management fault.
101 | */
102 | void MemManage_Handler(void)
103 | {
104 | /* USER CODE BEGIN MemoryManagement_IRQn 0 */
105 |
106 | /* USER CODE END MemoryManagement_IRQn 0 */
107 | while (1)
108 | {
109 | /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
110 | /* USER CODE END W1_MemoryManagement_IRQn 0 */
111 | }
112 | }
113 |
114 | /**
115 | * @brief This function handles Prefetch fault, memory access fault.
116 | */
117 | void BusFault_Handler(void)
118 | {
119 | /* USER CODE BEGIN BusFault_IRQn 0 */
120 |
121 | /* USER CODE END BusFault_IRQn 0 */
122 | while (1)
123 | {
124 | /* USER CODE BEGIN W1_BusFault_IRQn 0 */
125 | /* USER CODE END W1_BusFault_IRQn 0 */
126 | }
127 | }
128 |
129 | /**
130 | * @brief This function handles Undefined instruction or illegal state.
131 | */
132 | void UsageFault_Handler(void)
133 | {
134 | /* USER CODE BEGIN UsageFault_IRQn 0 */
135 |
136 | /* USER CODE END UsageFault_IRQn 0 */
137 | while (1)
138 | {
139 | /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
140 | /* USER CODE END W1_UsageFault_IRQn 0 */
141 | }
142 | }
143 |
144 | /**
145 | * @brief This function handles System service call via SWI instruction.
146 | */
147 | void SVC_Handler(void)
148 | {
149 | /* USER CODE BEGIN SVCall_IRQn 0 */
150 |
151 | /* USER CODE END SVCall_IRQn 0 */
152 | /* USER CODE BEGIN SVCall_IRQn 1 */
153 |
154 | /* USER CODE END SVCall_IRQn 1 */
155 | }
156 |
157 | /**
158 | * @brief This function handles Debug monitor.
159 | */
160 | void DebugMon_Handler(void)
161 | {
162 | /* USER CODE BEGIN DebugMonitor_IRQn 0 */
163 |
164 | /* USER CODE END DebugMonitor_IRQn 0 */
165 | /* USER CODE BEGIN DebugMonitor_IRQn 1 */
166 |
167 | /* USER CODE END DebugMonitor_IRQn 1 */
168 | }
169 |
170 | /**
171 | * @brief This function handles Pendable request for system service.
172 | */
173 | void PendSV_Handler(void)
174 | {
175 | /* USER CODE BEGIN PendSV_IRQn 0 */
176 |
177 | /* USER CODE END PendSV_IRQn 0 */
178 | /* USER CODE BEGIN PendSV_IRQn 1 */
179 |
180 | /* USER CODE END PendSV_IRQn 1 */
181 | }
182 |
183 | /**
184 | * @brief This function handles System tick timer.
185 | */
186 | void SysTick_Handler(void)
187 | {
188 | /* USER CODE BEGIN SysTick_IRQn 0 */
189 |
190 | /* USER CODE END SysTick_IRQn 0 */
191 | HAL_IncTick();
192 | /* USER CODE BEGIN SysTick_IRQn 1 */
193 |
194 | /* USER CODE END SysTick_IRQn 1 */
195 | }
196 |
197 | /******************************************************************************/
198 | /* STM32L4xx Peripheral Interrupt Handlers */
199 | /* Add here the Interrupt Handlers for the used peripherals. */
200 | /* For the available peripheral interrupt handler names, */
201 | /* please refer to the startup file (startup_stm32l4xx.s). */
202 | /******************************************************************************/
203 |
204 | /**
205 | * @brief This function handles DMA1 channel4 global interrupt.
206 | */
207 | void DMA1_Channel4_IRQHandler(void)
208 | {
209 | /* USER CODE BEGIN DMA1_Channel4_IRQn 0 */
210 |
211 | /* USER CODE END DMA1_Channel4_IRQn 0 */
212 | HAL_DMA_IRQHandler(&hdma_usart1_tx);
213 | /* USER CODE BEGIN DMA1_Channel4_IRQn 1 */
214 |
215 | /* USER CODE END DMA1_Channel4_IRQn 1 */
216 | }
217 |
218 | /**
219 | * @brief This function handles DMA1 channel5 global interrupt.
220 | */
221 | void DMA1_Channel5_IRQHandler(void)
222 | {
223 | /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */
224 |
225 | /* USER CODE END DMA1_Channel5_IRQn 0 */
226 | HAL_DMA_IRQHandler(&hdma_usart1_rx);
227 | /* USER CODE BEGIN DMA1_Channel5_IRQn 1 */
228 |
229 | /* USER CODE END DMA1_Channel5_IRQn 1 */
230 | }
231 |
232 | /**
233 | * @brief This function handles USART1 global interrupt.
234 | */
235 | void USART1_IRQHandler(void)
236 | {
237 | /* USER CODE BEGIN USART1_IRQn 0 */
238 |
239 | /* USER CODE END USART1_IRQn 0 */
240 | HAL_UART_IRQHandler(&huart1);
241 | /* USER CODE BEGIN USART1_IRQn 1 */
242 |
243 | /* USER CODE END USART1_IRQn 1 */
244 | }
245 |
246 | /* USER CODE BEGIN 1 */
247 |
248 | /* USER CODE END 1 */
249 |
--------------------------------------------------------------------------------
/Core/Src/syscalls.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file syscalls.c
4 | * @author Auto-generated by STM32CubeIDE
5 | * @brief STM32CubeIDE Minimal System calls file
6 | *
7 | * For more information about which c-functions
8 | * need which of these lowlevel functions
9 | * please consult the Newlib libc-manual
10 | ******************************************************************************
11 | * @attention
12 | *
13 | * © Copyright (c) 2020 STMicroelectronics.
14 | * All rights reserved.
15 | *
16 | * This software component is licensed by ST under BSD 3-Clause license,
17 | * the "License"; You may not use this file except in compliance with the
18 | * License. You may obtain a copy of the License at:
19 | * opensource.org/licenses/BSD-3-Clause
20 | *
21 | ******************************************************************************
22 | */
23 |
24 | /* Includes */
25 | #include
26 | #include
27 | #include
28 | #include
29 | #include
30 | #include
31 | #include
32 | #include
33 |
34 |
35 | /* Variables */
36 | extern int __io_putchar(int ch) __attribute__((weak));
37 | extern int __io_getchar(void) __attribute__((weak));
38 |
39 |
40 | char *__env[1] = { 0 };
41 | char **environ = __env;
42 |
43 |
44 | /* Functions */
45 | void initialise_monitor_handles()
46 | {
47 | }
48 |
49 | int _getpid(void)
50 | {
51 | return 1;
52 | }
53 |
54 | int _kill(int pid, int sig)
55 | {
56 | errno = EINVAL;
57 | return -1;
58 | }
59 |
60 | void _exit (int status)
61 | {
62 | _kill(status, -1);
63 | while (1) {} /* Make sure we hang here */
64 | }
65 |
66 | __attribute__((weak)) int _read(int file, char *ptr, int len)
67 | {
68 | int DataIdx;
69 |
70 | for (DataIdx = 0; DataIdx < len; DataIdx++)
71 | {
72 | *ptr++ = __io_getchar();
73 | }
74 |
75 | return len;
76 | }
77 |
78 | __attribute__((weak)) int _write(int file, char *ptr, int len)
79 | {
80 | int DataIdx;
81 |
82 | for (DataIdx = 0; DataIdx < len; DataIdx++)
83 | {
84 | __io_putchar(*ptr++);
85 | }
86 | return len;
87 | }
88 |
89 | int _close(int file)
90 | {
91 | return -1;
92 | }
93 |
94 |
95 | int _fstat(int file, struct stat *st)
96 | {
97 | st->st_mode = S_IFCHR;
98 | return 0;
99 | }
100 |
101 | int _isatty(int file)
102 | {
103 | return 1;
104 | }
105 |
106 | int _lseek(int file, int ptr, int dir)
107 | {
108 | return 0;
109 | }
110 |
111 | int _open(char *path, int flags, ...)
112 | {
113 | /* Pretend like we always fail */
114 | return -1;
115 | }
116 |
117 | int _wait(int *status)
118 | {
119 | errno = ECHILD;
120 | return -1;
121 | }
122 |
123 | int _unlink(char *name)
124 | {
125 | errno = ENOENT;
126 | return -1;
127 | }
128 |
129 | int _times(struct tms *buf)
130 | {
131 | return -1;
132 | }
133 |
134 | int _stat(char *file, struct stat *st)
135 | {
136 | st->st_mode = S_IFCHR;
137 | return 0;
138 | }
139 |
140 | int _link(char *old, char *new)
141 | {
142 | errno = EMLINK;
143 | return -1;
144 | }
145 |
146 | int _fork(void)
147 | {
148 | errno = EAGAIN;
149 | return -1;
150 | }
151 |
152 | int _execve(char *name, char **argv, char **env)
153 | {
154 | errno = ENOMEM;
155 | return -1;
156 | }
157 |
--------------------------------------------------------------------------------
/Core/Src/sysmem.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file sysmem.c
4 | * @author Generated by STM32CubeIDE
5 | * @brief STM32CubeIDE System Memory calls file
6 | *
7 | * For more information about which C functions
8 | * need which of these lowlevel functions
9 | * please consult the newlib libc manual
10 | ******************************************************************************
11 | * @attention
12 | *
13 | * © Copyright (c) 2020 STMicroelectronics.
14 | * All rights reserved.
15 | *
16 | * This software component is licensed by ST under BSD 3-Clause license,
17 | * the "License"; You may not use this file except in compliance with the
18 | * License. You may obtain a copy of the License at:
19 | * opensource.org/licenses/BSD-3-Clause
20 | *
21 | ******************************************************************************
22 | */
23 |
24 | /* Includes */
25 | #include
26 | #include
27 |
28 | /**
29 | * Pointer to the current high watermark of the heap usage
30 | */
31 | static uint8_t *__sbrk_heap_end = NULL;
32 |
33 | /**
34 | * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
35 | * and others from the C library
36 | *
37 | * @verbatim
38 | * ############################################################################
39 | * # .data # .bss # newlib heap # MSP stack #
40 | * # # # # Reserved by _Min_Stack_Size #
41 | * ############################################################################
42 | * ^-- RAM start ^-- _end _estack, RAM end --^
43 | * @endverbatim
44 | *
45 | * This implementation starts allocating at the '_end' linker symbol
46 | * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
47 | * The implementation considers '_estack' linker symbol to be RAM end
48 | * NOTE: If the MSP stack, at any point during execution, grows larger than the
49 | * reserved size, please increase the '_Min_Stack_Size'.
50 | *
51 | * @param incr Memory size
52 | * @return Pointer to allocated memory
53 | */
54 | void *_sbrk(ptrdiff_t incr)
55 | {
56 | extern uint8_t _end; /* Symbol defined in the linker script */
57 | extern uint8_t _estack; /* Symbol defined in the linker script */
58 | extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
59 | const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
60 | const uint8_t *max_heap = (uint8_t *)stack_limit;
61 | uint8_t *prev_heap_end;
62 |
63 | /* Initialize heap end at first call */
64 | if (NULL == __sbrk_heap_end)
65 | {
66 | __sbrk_heap_end = &_end;
67 | }
68 |
69 | /* Protect heap from growing into the reserved MSP stack */
70 | if (__sbrk_heap_end + incr > max_heap)
71 | {
72 | errno = ENOMEM;
73 | return (void *)-1;
74 | }
75 |
76 | prev_heap_end = __sbrk_heap_end;
77 | __sbrk_heap_end += incr;
78 |
79 | return (void *)prev_heap_end;
80 | }
81 |
--------------------------------------------------------------------------------
/DPV10008.gsd:
--------------------------------------------------------------------------------
1 | ;
2 | ;********************* GSD for pbsoftstack Demo application **************************
3 | ;* ================================================================================ *
4 | ;* *
5 | ;* Vendor: schtiot *
6 | ;* https://schtiot.com:8000 *
7 | ;* Tel. : +86-13350849615 *
8 | ;* eMail: xuji.zhao@foxmail.com *
9 | ;* *
10 | ;* ================================================================================ *
11 | ;* *
12 | ;* Function: Demo for pbsoftstack Software *
13 | ;* *
14 | ;* *
15 | ;* Order Number : PBSSV1-GD *
16 | ;* *
17 | ;* -------------------------------------------------------------------------------- *
18 | ;* author: xuji.zhao *
19 | ;* *
20 | ;* Tel. : +86-13350849615 *
21 | ;* eMail: xuji.zhao@foxmail.com *
22 | ;* -------------------------------------------------------------------------------- *
23 | ;* *
24 | ;* history *
25 | ;* ================================================================================ *
26 | ;* 10.10.2021 [V1.00] first version *
27 | ;* *
28 | ;* -------------------------------------------------------------------------------- *
29 | ;* *
30 | ;************************************************************************************
31 |
32 |
33 | #Profibus_DP
34 |
35 |
36 | ;====================================================================================
37 | ;==== Prm-Text-Def-List =============================================================
38 | ;====================================================================================
39 |
40 | PrmText=1
41 | Text(0) = "disable"
42 | Text(1)="enable"
43 | EndPrmText
44 |
45 | ;=====================================================================================
46 | ;==== Ext-User-Prm-Data-Def-List =====================================================
47 | ;=====================================================================================
48 |
49 | ExtUserPrmData=1 "[SlotNumber]"
50 | Unsigned8 0 0-32
51 | EndExtUserPrmData
52 |
53 | ExtUserPrmData=2 "Diagnostic Alarm"
54 | Bit(0) 0 0-1
55 | Prm_Text_Ref=1
56 | EndExtUserPrmData
57 |
58 | ExtUserPrmData=3 "hot control enable"
59 | Bit(0) 0 0-1
60 | Prm_Text_Ref=1
61 | EndExtUserPrmData
62 |
63 | ExtUserPrmData=4 "cool control enable"
64 | Bit(1) 0 0-1
65 | Prm_Text_Ref=1
66 | EndExtUserPrmData
67 |
68 | ExtUserPrmData=5 "temperature high-limit"
69 | Unsigned16 0x1f40 0x0000-0xffff
70 | EndExtUserPrmData
71 |
72 | ExtUserPrmData=6 "temperature low-limit"
73 | Unsigned16 0xf060 0x0000-0xFFFF
74 | EndExtUserPrmData
75 |
76 |
77 | ;=====================================================================================
78 | ;==== General DP Keywords ============================================================
79 | ;=====================================================================================
80 |
81 | GSD_Revision = 5
82 | Vendor_Name = "SCHTIOT"
83 | Model_Name = "DPV10008"
84 | Revision = "1.00"
85 | Ident_Number = 0x0008
86 | Protocol_Ident = 0
87 | Station_Type = 0
88 | FMS_supp = 0
89 | Hardware_Release = "V1.00"
90 | Software_Release = "V1.00"
91 | Redundancy = 0
92 | Repeater_Ctrl_Sig = 2
93 | 24V_Pins = 0
94 |
95 |
96 | ;==============================================================================
97 | ;==== Supported baudrates =====================================================
98 | ;==============================================================================
99 |
100 | 9.6_supp = 1
101 | 19.2_supp = 1
102 | 45.45_supp = 1
103 | 93.75_supp = 1
104 | 187.5_supp = 1
105 | 500_supp = 1
106 | 1.5M_supp = 1
107 | 3M_supp = 1
108 | 6M_supp = 0
109 | 12M_supp = 0
110 |
111 | MaxTsdr_9.6=15
112 | MaxTsdr_19.2=15
113 | MaxTsdr_45.45=15
114 | MaxTsdr_93.75=15
115 | MaxTsdr_187.5=15
116 | MaxTsdr_500=15
117 | MaxTsdr_1.5M=20
118 | MaxTsdr_3M=35
119 | MaxTsdr_6M=50
120 | MaxTsdr_12M=95
121 |
122 |
123 |
124 | ;==============================================================================
125 | ;==== Slave specific values ===================================================
126 | ;==============================================================================
127 |
128 | OrderNumber="PBSSV1-GD"
129 | Slave_Family = 3@schtiot@PBSSV1-GD
130 | Implementation_Type = "Soft"
131 | Info_Text="SCHTIOT: PROFIBUS DPV1 - slave, (PB soft stack, modular system, max 3 modules"
132 | Bitmap_Device = "DPV1_1N"
133 | Bitmap_SF="DPV1_1S"
134 |
135 | Freeze_Mode_supp=1
136 | Sync_Mode_supp=1
137 | Fail_Safe=1
138 | Auto_Baud_supp=0
139 | Set_Slave_Add_supp=1
140 |
141 | Min_Slave_Intervall=6
142 |
143 | Modular_Station=1
144 | Max_Module=3
145 | Modul_Offset=1
146 | Max_Input_Len=3
147 | Max_Output_Len=1
148 | Max_Data_Len=4
149 | Max_Diag_Data_Len=13
150 |
151 |
152 | ;==============================================================================
153 | ;==== User-Prm-Data ===========================================================
154 | ;==============================================================================
155 |
156 | Max_User_Prm_Data_Len = 15
157 | Ext_User_Prm_Data_Const(0)= 0x00,0x00,0x00
158 |
159 | ;==============================================================================
160 | ;==== Modulstatus =============================================================
161 | ;==============================================================================
162 |
163 | UnitDiagType=1
164 | X_Unit_Diag_Area = 24 - 24
165 | X_Value(1)= "Slot 1: high-limit"
166 | X_Unit_Diag_Area_End
167 | X_Unit_Diag_Area = 25 - 25
168 | X_Value(1)= "Slot 1: low-limit"
169 | X_Unit_Diag_Area_End
170 | EndUnitDiagType
171 |
172 |
173 | ;==============================================================================
174 | ;==== Module-Definition-List ==================================================
175 | ;==============================================================================
176 |
177 | Module="AI16 (temperature) " 0x50
178 | 1
179 | Ext_Module_Prm_Data_Len=4
180 | Ext_User_Prm_Data_Const(0)=0x1F,0x40,0xF0,0X60
181 | Ext_User_Prm_Data_Ref(0)=5 ;temperature high-limit
182 | Ext_User_Prm_Data_Ref(2)=6 ;temperature low-limit
183 | Info_Text="SCHTIOT: temperature limit supported"
184 | EndModule
185 |
186 | Module="DI8 (enable-status) " 0x10
187 | 2
188 | EndModule
189 |
190 | Module="DO8 (enable-ctr)" 0x20
191 | 3
192 | Ext_Module_Prm_Data_Len=1
193 | Ext_User_Prm_Data_Const(0)=0x03
194 | Ext_User_Prm_Data_Ref(0)=3 ;hot control enable
195 | Ext_User_Prm_Data_Ref(0)=4 ;cool control enable
196 | Info_Text="SCHTIOT: hot and cool control supported"
197 | EndModule
198 |
199 | ;==============================================================================
200 | ;==== DPV1 KEY WORDS ==========================================================
201 | ;==============================================================================
202 |
203 | DPV1_Slave = 1
204 | C1_Read_Write_supp = 1
205 | C1_Max_Data_Len = 240 ;The parameter specifies the maximum length of user data excluding
206 | ;Function_Num, Slot_number, Index, Length, transferred on the
207 | ;MSAC_1 communication channel.
208 | ;Type: Unsigned8 (0 .. 240)
209 | C1_Response_Timeout = 300
210 | Diagnostic_Alarm_supp = 1
211 | Process_Alarm_supp = 1
212 | Alarm_Type_Mode_supp = 1
213 | WD_Base_1ms_supp = 1
214 | Publisher_supp = 1
215 |
216 | C2_Read_Write_supp = 1
217 | C2_Max_Data_Len = 240 ;The parameter specifies the maximum length of user data excluding
218 | ;Function_Num, Slot_number, Index, Length, transferred on the
219 | ;MSAC_2 communication channel.
220 | ;Type: Unsigned8 (0,48 .. 240)
221 | C2_Response_Timeout = 300
222 | C2_Max_Count_Channels = 3
223 | Max_Initiate_PDU_Length = 52 ;The parameter specifies the maximum length of an Initiate Request
224 | ;PDU including the Function_Num to the Resource Manager.
225 | ;Type: Unsigned8 (0,52.. 244)
226 | DPV1_Data_Types = 0
227 |
228 | Ident_Maintenance_supp = 1 ;I&M fuctions supported
229 |
230 |
231 | SlotDefinition
232 | Slot(1) = "Slot 1" 1 1
233 | Slot(2) = "Slot 2" 2 2
234 | Slot(3) = "Slot 3" 3 3
235 | EndSlotDefinition
236 |
237 |
238 |
239 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32l4xx.h
4 | * @author MCD Application Team
5 | * @brief CMSIS STM32L4xx Device Peripheral Access Layer Header File.
6 | *
7 | * The file is the unique include file that the application programmer
8 | * is using in the C source code, usually in main.c. This file contains:
9 | * - Configuration section that allows to select:
10 | * - The STM32L4xx device used in the target application
11 | * - To use or not the peripheral's drivers in application code(i.e.
12 | * code will be based on direct access to peripheral's registers
13 | * rather than drivers API), this option is controlled by
14 | * "#define USE_HAL_DRIVER"
15 | *
16 | ******************************************************************************
17 | * @attention
18 | *
19 | * Copyright (c) 2017 STMicroelectronics.
20 | * All rights reserved.
21 | *
22 | * This software is licensed under terms that can be found in the LICENSE file
23 | * in the root directory of this software component.
24 | * If no LICENSE file comes with this software, it is provided AS-IS.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /** @addtogroup CMSIS
30 | * @{
31 | */
32 |
33 | /** @addtogroup stm32l4xx
34 | * @{
35 | */
36 |
37 | #ifndef __STM32L4xx_H
38 | #define __STM32L4xx_H
39 |
40 | #ifdef __cplusplus
41 | extern "C" {
42 | #endif /* __cplusplus */
43 |
44 | /** @addtogroup Library_configuration_section
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief STM32 Family
50 | */
51 | #if !defined (STM32L4)
52 | #define STM32L4
53 | #endif /* STM32L4 */
54 |
55 | /* Uncomment the line below according to the target STM32L4 device used in your
56 | application
57 | */
58 |
59 | #if !defined (STM32L412xx) && !defined (STM32L422xx) && \
60 | !defined (STM32L431xx) && !defined (STM32L432xx) && !defined (STM32L433xx) && !defined (STM32L442xx) && !defined (STM32L443xx) && \
61 | !defined (STM32L451xx) && !defined (STM32L452xx) && !defined (STM32L462xx) && \
62 | !defined (STM32L471xx) && !defined (STM32L475xx) && !defined (STM32L476xx) && !defined (STM32L485xx) && !defined (STM32L486xx) && \
63 | !defined (STM32L496xx) && !defined (STM32L4A6xx) && \
64 | !defined (STM32L4P5xx) && !defined (STM32L4Q5xx) && \
65 | !defined (STM32L4R5xx) && !defined (STM32L4R7xx) && !defined (STM32L4R9xx) && !defined (STM32L4S5xx) && !defined (STM32L4S7xx) && !defined (STM32L4S9xx)
66 | /* #define STM32L412xx */ /*!< STM32L412xx Devices */
67 | /* #define STM32L422xx */ /*!< STM32L422xx Devices */
68 | /* #define STM32L431xx */ /*!< STM32L431xx Devices */
69 | /* #define STM32L432xx */ /*!< STM32L432xx Devices */
70 | /* #define STM32L433xx */ /*!< STM32L433xx Devices */
71 | /* #define STM32L442xx */ /*!< STM32L442xx Devices */
72 | /* #define STM32L443xx */ /*!< STM32L443xx Devices */
73 | /* #define STM32L451xx */ /*!< STM32L451xx Devices */
74 | /* #define STM32L452xx */ /*!< STM32L452xx Devices */
75 | /* #define STM32L462xx */ /*!< STM32L462xx Devices */
76 | /* #define STM32L471xx */ /*!< STM32L471xx Devices */
77 | /* #define STM32L475xx */ /*!< STM32L475xx Devices */
78 | /* #define STM32L476xx */ /*!< STM32L476xx Devices */
79 | /* #define STM32L485xx */ /*!< STM32L485xx Devices */
80 | /* #define STM32L486xx */ /*!< STM32L486xx Devices */
81 | /* #define STM32L496xx */ /*!< STM32L496xx Devices */
82 | /* #define STM32L4A6xx */ /*!< STM32L4A6xx Devices */
83 | /* #define STM32L4P5xx */ /*!< STM32L4Q5xx Devices */
84 | /* #define STM32L4R5xx */ /*!< STM32L4R5xx Devices */
85 | /* #define STM32L4R7xx */ /*!< STM32L4R7xx Devices */
86 | /* #define STM32L4R9xx */ /*!< STM32L4R9xx Devices */
87 | /* #define STM32L4S5xx */ /*!< STM32L4S5xx Devices */
88 | /* #define STM32L4S7xx */ /*!< STM32L4S7xx Devices */
89 | /* #define STM32L4S9xx */ /*!< STM32L4S9xx Devices */
90 | #endif
91 |
92 | /* Tip: To avoid modifying this file each time you need to switch between these
93 | devices, you can define the device in your toolchain compiler preprocessor.
94 | */
95 | #if !defined (USE_HAL_DRIVER)
96 | /**
97 | * @brief Comment the line below if you will not use the peripherals drivers.
98 | In this case, these drivers will not be included and the application code will
99 | be based on direct access to peripherals registers
100 | */
101 | /*#define USE_HAL_DRIVER */
102 | #endif /* USE_HAL_DRIVER */
103 |
104 | /**
105 | * @brief CMSIS Device version number
106 | */
107 | #define __STM32L4_CMSIS_VERSION_MAIN (0x01) /*!< [31:24] main version */
108 | #define __STM32L4_CMSIS_VERSION_SUB1 (0x07) /*!< [23:16] sub1 version */
109 | #define __STM32L4_CMSIS_VERSION_SUB2 (0x02) /*!< [15:8] sub2 version */
110 | #define __STM32L4_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */
111 | #define __STM32L4_CMSIS_VERSION ((__STM32L4_CMSIS_VERSION_MAIN << 24)\
112 | |(__STM32L4_CMSIS_VERSION_SUB1 << 16)\
113 | |(__STM32L4_CMSIS_VERSION_SUB2 << 8 )\
114 | |(__STM32L4_CMSIS_VERSION_RC))
115 |
116 | /**
117 | * @}
118 | */
119 |
120 | /** @addtogroup Device_Included
121 | * @{
122 | */
123 |
124 | #if defined(STM32L412xx)
125 | #include "stm32l412xx.h"
126 | #elif defined(STM32L422xx)
127 | #include "stm32l422xx.h"
128 | #elif defined(STM32L431xx)
129 | #include "stm32l431xx.h"
130 | #elif defined(STM32L432xx)
131 | #include "stm32l432xx.h"
132 | #elif defined(STM32L433xx)
133 | #include "stm32l433xx.h"
134 | #elif defined(STM32L442xx)
135 | #include "stm32l442xx.h"
136 | #elif defined(STM32L443xx)
137 | #include "stm32l443xx.h"
138 | #elif defined(STM32L451xx)
139 | #include "stm32l451xx.h"
140 | #elif defined(STM32L452xx)
141 | #include "stm32l452xx.h"
142 | #elif defined(STM32L462xx)
143 | #include "stm32l462xx.h"
144 | #elif defined(STM32L471xx)
145 | #include "stm32l471xx.h"
146 | #elif defined(STM32L475xx)
147 | #include "stm32l475xx.h"
148 | #elif defined(STM32L476xx)
149 | #include "stm32l476xx.h"
150 | #elif defined(STM32L485xx)
151 | #include "stm32l485xx.h"
152 | #elif defined(STM32L486xx)
153 | #include "stm32l486xx.h"
154 | #elif defined(STM32L496xx)
155 | #include "stm32l496xx.h"
156 | #elif defined(STM32L4A6xx)
157 | #include "stm32l4a6xx.h"
158 | #elif defined(STM32L4P5xx)
159 | #include "stm32l4p5xx.h"
160 | #elif defined(STM32L4Q5xx)
161 | #include "stm32l4q5xx.h"
162 | #elif defined(STM32L4R5xx)
163 | #include "stm32l4r5xx.h"
164 | #elif defined(STM32L4R7xx)
165 | #include "stm32l4r7xx.h"
166 | #elif defined(STM32L4R9xx)
167 | #include "stm32l4r9xx.h"
168 | #elif defined(STM32L4S5xx)
169 | #include "stm32l4s5xx.h"
170 | #elif defined(STM32L4S7xx)
171 | #include "stm32l4s7xx.h"
172 | #elif defined(STM32L4S9xx)
173 | #include "stm32l4s9xx.h"
174 | #else
175 | #error "Please select first the target STM32L4xx device used in your application (in stm32l4xx.h file)"
176 | #endif
177 |
178 | /**
179 | * @}
180 | */
181 |
182 | /** @addtogroup Exported_types
183 | * @{
184 | */
185 | typedef enum
186 | {
187 | RESET = 0,
188 | SET = !RESET
189 | } FlagStatus, ITStatus;
190 |
191 | typedef enum
192 | {
193 | DISABLE = 0,
194 | ENABLE = !DISABLE
195 | } FunctionalState;
196 | #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
197 |
198 | typedef enum
199 | {
200 | SUCCESS = 0,
201 | ERROR = !SUCCESS
202 | } ErrorStatus;
203 |
204 | /**
205 | * @}
206 | */
207 |
208 |
209 | /** @addtogroup Exported_macros
210 | * @{
211 | */
212 | #define SET_BIT(REG, BIT) ((REG) |= (BIT))
213 |
214 | #define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
215 |
216 | #define READ_BIT(REG, BIT) ((REG) & (BIT))
217 |
218 | #define CLEAR_REG(REG) ((REG) = (0x0))
219 |
220 | #define WRITE_REG(REG, VAL) ((REG) = (VAL))
221 |
222 | #define READ_REG(REG) ((REG))
223 |
224 | #define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
225 |
226 | /* Use of CMSIS compiler intrinsics for register exclusive access */
227 | /* Atomic 32-bit register access macro to set one or several bits */
228 | #define ATOMIC_SET_BIT(REG, BIT) \
229 | do { \
230 | uint32_t val; \
231 | do { \
232 | val = __LDREXW((__IO uint32_t *)&(REG)) | (BIT); \
233 | } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
234 | } while(0)
235 |
236 | /* Atomic 32-bit register access macro to clear one or several bits */
237 | #define ATOMIC_CLEAR_BIT(REG, BIT) \
238 | do { \
239 | uint32_t val; \
240 | do { \
241 | val = __LDREXW((__IO uint32_t *)&(REG)) & ~(BIT); \
242 | } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
243 | } while(0)
244 |
245 | /* Atomic 32-bit register access macro to clear and set one or several bits */
246 | #define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \
247 | do { \
248 | uint32_t val; \
249 | do { \
250 | val = (__LDREXW((__IO uint32_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
251 | } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
252 | } while(0)
253 |
254 | /* Atomic 16-bit register access macro to set one or several bits */
255 | #define ATOMIC_SETH_BIT(REG, BIT) \
256 | do { \
257 | uint16_t val; \
258 | do { \
259 | val = __LDREXH((__IO uint16_t *)&(REG)) | (BIT); \
260 | } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
261 | } while(0)
262 |
263 | /* Atomic 16-bit register access macro to clear one or several bits */
264 | #define ATOMIC_CLEARH_BIT(REG, BIT) \
265 | do { \
266 | uint16_t val; \
267 | do { \
268 | val = __LDREXH((__IO uint16_t *)&(REG)) & ~(BIT); \
269 | } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
270 | } while(0)
271 |
272 | /* Atomic 16-bit register access macro to clear and set one or several bits */
273 | #define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) \
274 | do { \
275 | uint16_t val; \
276 | do { \
277 | val = (__LDREXH((__IO uint16_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
278 | } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
279 | } while(0)
280 |
281 | #define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))
282 |
283 | /**
284 | * @}
285 | */
286 |
287 | #if defined (USE_HAL_DRIVER)
288 | #include "stm32l4xx_hal.h"
289 | #endif /* USE_HAL_DRIVER */
290 |
291 | #ifdef __cplusplus
292 | }
293 | #endif /* __cplusplus */
294 |
295 | #endif /* __STM32L4xx_H */
296 | /**
297 | * @}
298 | */
299 |
300 | /**
301 | * @}
302 | */
303 |
304 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file system_stm32l4xx.h
4 | * @author MCD Application Team
5 | * @brief CMSIS Cortex-M4 Device System Source File for STM32L4xx devices.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * Copyright (c) 2017 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software is licensed under terms that can be found in the LICENSE file
13 | * in the root directory of this software component.
14 | * If no LICENSE file comes with this software, it is provided AS-IS.
15 | *
16 | ******************************************************************************
17 | */
18 |
19 | /** @addtogroup CMSIS
20 | * @{
21 | */
22 |
23 | /** @addtogroup stm32l4xx_system
24 | * @{
25 | */
26 |
27 | /**
28 | * @brief Define to prevent recursive inclusion
29 | */
30 | #ifndef __SYSTEM_STM32L4XX_H
31 | #define __SYSTEM_STM32L4XX_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /** @addtogroup STM32L4xx_System_Includes
38 | * @{
39 | */
40 |
41 | /**
42 | * @}
43 | */
44 |
45 |
46 | /** @addtogroup STM32L4xx_System_Exported_Variables
47 | * @{
48 | */
49 | /* The SystemCoreClock variable is updated in three ways:
50 | 1) by calling CMSIS function SystemCoreClockUpdate()
51 | 2) by calling HAL API function HAL_RCC_GetSysClockFreq()
52 | 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
53 | Note: If you use this function to configure the system clock; then there
54 | is no need to call the 2 first functions listed above, since SystemCoreClock
55 | variable is updated automatically.
56 | */
57 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
58 |
59 | extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */
60 | extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */
61 | extern const uint32_t MSIRangeTable[12]; /*!< MSI ranges table values */
62 |
63 | /**
64 | * @}
65 | */
66 |
67 | /** @addtogroup STM32L4xx_System_Exported_Constants
68 | * @{
69 | */
70 |
71 | /**
72 | * @}
73 | */
74 |
75 | /** @addtogroup STM32L4xx_System_Exported_Macros
76 | * @{
77 | */
78 |
79 | /**
80 | * @}
81 | */
82 |
83 | /** @addtogroup STM32L4xx_System_Exported_Functions
84 | * @{
85 | */
86 |
87 | extern void SystemInit(void);
88 | extern void SystemCoreClockUpdate(void);
89 | /**
90 | * @}
91 | */
92 |
93 | #ifdef __cplusplus
94 | }
95 | #endif
96 |
97 | #endif /*__SYSTEM_STM32L4XX_H */
98 |
99 | /**
100 | * @}
101 | */
102 |
103 | /**
104 | * @}
105 | */
106 |
107 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/Device/ST/STM32L4xx/LICENSE.txt:
--------------------------------------------------------------------------------
1 | This software component is provided to you as part of a software package and
2 | applicable license terms are in the Package_license file. If you received this
3 | software component outside of a package or without applicable license terms,
4 | the terms of the Apache-2.0 license shall apply.
5 | You may obtain a copy of the Apache-2.0 at:
6 | https://opensource.org/licenses/Apache-2.0
7 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/Device/ST/STM32L4xx/License.md:
--------------------------------------------------------------------------------
1 | Apache License
2 | Version 2.0, January 2004
3 | http://www.apache.org/licenses/
4 |
5 | TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
6 |
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66 |
67 | END OF TERMS AND CONDITIONS
68 |
69 | APPENDIX:
70 |
71 | Copyright [2019] [STMicroelectronics]
72 |
73 | Licensed under the Apache License, Version 2.0 (the "License");
74 | you may not use this file except in compliance with the License.
75 | You may obtain a copy of the License at
76 |
77 | http://www.apache.org/licenses/LICENSE-2.0
78 |
79 | Unless required by applicable law or agreed to in writing, software
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82 | See the License for the specific language governing permissions and
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84 |
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/Drivers/CMSIS/Include/cmsis_compiler.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file cmsis_compiler.h
3 | * @brief CMSIS compiler generic header file
4 | * @version V5.1.0
5 | * @date 09. October 2018
6 | ******************************************************************************/
7 | /*
8 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
9 | *
10 | * SPDX-License-Identifier: Apache-2.0
11 | *
12 | * Licensed under the Apache License, Version 2.0 (the License); you may
13 | * not use this file except in compliance with the License.
14 | * You may obtain a copy of the License at
15 | *
16 | * www.apache.org/licenses/LICENSE-2.0
17 | *
18 | * Unless required by applicable law or agreed to in writing, software
19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21 | * See the License for the specific language governing permissions and
22 | * limitations under the License.
23 | */
24 |
25 | #ifndef __CMSIS_COMPILER_H
26 | #define __CMSIS_COMPILER_H
27 |
28 | #include
29 |
30 | /*
31 | * Arm Compiler 4/5
32 | */
33 | #if defined ( __CC_ARM )
34 | #include "cmsis_armcc.h"
35 |
36 |
37 | /*
38 | * Arm Compiler 6.6 LTM (armclang)
39 | */
40 | #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100)
41 | #include "cmsis_armclang_ltm.h"
42 |
43 | /*
44 | * Arm Compiler above 6.10.1 (armclang)
45 | */
46 | #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)
47 | #include "cmsis_armclang.h"
48 |
49 |
50 | /*
51 | * GNU Compiler
52 | */
53 | #elif defined ( __GNUC__ )
54 | #include "cmsis_gcc.h"
55 |
56 |
57 | /*
58 | * IAR Compiler
59 | */
60 | #elif defined ( __ICCARM__ )
61 | #include
62 |
63 |
64 | /*
65 | * TI Arm Compiler
66 | */
67 | #elif defined ( __TI_ARM__ )
68 | #include
69 |
70 | #ifndef __ASM
71 | #define __ASM __asm
72 | #endif
73 | #ifndef __INLINE
74 | #define __INLINE inline
75 | #endif
76 | #ifndef __STATIC_INLINE
77 | #define __STATIC_INLINE static inline
78 | #endif
79 | #ifndef __STATIC_FORCEINLINE
80 | #define __STATIC_FORCEINLINE __STATIC_INLINE
81 | #endif
82 | #ifndef __NO_RETURN
83 | #define __NO_RETURN __attribute__((noreturn))
84 | #endif
85 | #ifndef __USED
86 | #define __USED __attribute__((used))
87 | #endif
88 | #ifndef __WEAK
89 | #define __WEAK __attribute__((weak))
90 | #endif
91 | #ifndef __PACKED
92 | #define __PACKED __attribute__((packed))
93 | #endif
94 | #ifndef __PACKED_STRUCT
95 | #define __PACKED_STRUCT struct __attribute__((packed))
96 | #endif
97 | #ifndef __PACKED_UNION
98 | #define __PACKED_UNION union __attribute__((packed))
99 | #endif
100 | #ifndef __UNALIGNED_UINT32 /* deprecated */
101 | struct __attribute__((packed)) T_UINT32 { uint32_t v; };
102 | #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
103 | #endif
104 | #ifndef __UNALIGNED_UINT16_WRITE
105 | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
106 | #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
107 | #endif
108 | #ifndef __UNALIGNED_UINT16_READ
109 | __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
110 | #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
111 | #endif
112 | #ifndef __UNALIGNED_UINT32_WRITE
113 | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
114 | #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
115 | #endif
116 | #ifndef __UNALIGNED_UINT32_READ
117 | __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
118 | #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
119 | #endif
120 | #ifndef __ALIGNED
121 | #define __ALIGNED(x) __attribute__((aligned(x)))
122 | #endif
123 | #ifndef __RESTRICT
124 | #define __RESTRICT __restrict
125 | #endif
126 | #ifndef __COMPILER_BARRIER
127 | #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
128 | #define __COMPILER_BARRIER() (void)0
129 | #endif
130 |
131 |
132 | /*
133 | * TASKING Compiler
134 | */
135 | #elif defined ( __TASKING__ )
136 | /*
137 | * The CMSIS functions have been implemented as intrinsics in the compiler.
138 | * Please use "carm -?i" to get an up to date list of all intrinsics,
139 | * Including the CMSIS ones.
140 | */
141 |
142 | #ifndef __ASM
143 | #define __ASM __asm
144 | #endif
145 | #ifndef __INLINE
146 | #define __INLINE inline
147 | #endif
148 | #ifndef __STATIC_INLINE
149 | #define __STATIC_INLINE static inline
150 | #endif
151 | #ifndef __STATIC_FORCEINLINE
152 | #define __STATIC_FORCEINLINE __STATIC_INLINE
153 | #endif
154 | #ifndef __NO_RETURN
155 | #define __NO_RETURN __attribute__((noreturn))
156 | #endif
157 | #ifndef __USED
158 | #define __USED __attribute__((used))
159 | #endif
160 | #ifndef __WEAK
161 | #define __WEAK __attribute__((weak))
162 | #endif
163 | #ifndef __PACKED
164 | #define __PACKED __packed__
165 | #endif
166 | #ifndef __PACKED_STRUCT
167 | #define __PACKED_STRUCT struct __packed__
168 | #endif
169 | #ifndef __PACKED_UNION
170 | #define __PACKED_UNION union __packed__
171 | #endif
172 | #ifndef __UNALIGNED_UINT32 /* deprecated */
173 | struct __packed__ T_UINT32 { uint32_t v; };
174 | #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
175 | #endif
176 | #ifndef __UNALIGNED_UINT16_WRITE
177 | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
178 | #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
179 | #endif
180 | #ifndef __UNALIGNED_UINT16_READ
181 | __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
182 | #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
183 | #endif
184 | #ifndef __UNALIGNED_UINT32_WRITE
185 | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
186 | #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
187 | #endif
188 | #ifndef __UNALIGNED_UINT32_READ
189 | __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
190 | #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
191 | #endif
192 | #ifndef __ALIGNED
193 | #define __ALIGNED(x) __align(x)
194 | #endif
195 | #ifndef __RESTRICT
196 | #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
197 | #define __RESTRICT
198 | #endif
199 | #ifndef __COMPILER_BARRIER
200 | #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
201 | #define __COMPILER_BARRIER() (void)0
202 | #endif
203 |
204 |
205 | /*
206 | * COSMIC Compiler
207 | */
208 | #elif defined ( __CSMC__ )
209 | #include
210 |
211 | #ifndef __ASM
212 | #define __ASM _asm
213 | #endif
214 | #ifndef __INLINE
215 | #define __INLINE inline
216 | #endif
217 | #ifndef __STATIC_INLINE
218 | #define __STATIC_INLINE static inline
219 | #endif
220 | #ifndef __STATIC_FORCEINLINE
221 | #define __STATIC_FORCEINLINE __STATIC_INLINE
222 | #endif
223 | #ifndef __NO_RETURN
224 | // NO RETURN is automatically detected hence no warning here
225 | #define __NO_RETURN
226 | #endif
227 | #ifndef __USED
228 | #warning No compiler specific solution for __USED. __USED is ignored.
229 | #define __USED
230 | #endif
231 | #ifndef __WEAK
232 | #define __WEAK __weak
233 | #endif
234 | #ifndef __PACKED
235 | #define __PACKED @packed
236 | #endif
237 | #ifndef __PACKED_STRUCT
238 | #define __PACKED_STRUCT @packed struct
239 | #endif
240 | #ifndef __PACKED_UNION
241 | #define __PACKED_UNION @packed union
242 | #endif
243 | #ifndef __UNALIGNED_UINT32 /* deprecated */
244 | @packed struct T_UINT32 { uint32_t v; };
245 | #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
246 | #endif
247 | #ifndef __UNALIGNED_UINT16_WRITE
248 | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
249 | #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
250 | #endif
251 | #ifndef __UNALIGNED_UINT16_READ
252 | __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
253 | #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
254 | #endif
255 | #ifndef __UNALIGNED_UINT32_WRITE
256 | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
257 | #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
258 | #endif
259 | #ifndef __UNALIGNED_UINT32_READ
260 | __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
261 | #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
262 | #endif
263 | #ifndef __ALIGNED
264 | #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
265 | #define __ALIGNED(x)
266 | #endif
267 | #ifndef __RESTRICT
268 | #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
269 | #define __RESTRICT
270 | #endif
271 | #ifndef __COMPILER_BARRIER
272 | #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
273 | #define __COMPILER_BARRIER() (void)0
274 | #endif
275 |
276 |
277 | #else
278 | #error Unknown compiler.
279 | #endif
280 |
281 |
282 | #endif /* __CMSIS_COMPILER_H */
283 |
284 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/Include/cmsis_version.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file cmsis_version.h
3 | * @brief CMSIS Core(M) Version definitions
4 | * @version V5.0.3
5 | * @date 24. June 2019
6 | ******************************************************************************/
7 | /*
8 | * Copyright (c) 2009-2019 ARM Limited. All rights reserved.
9 | *
10 | * SPDX-License-Identifier: Apache-2.0
11 | *
12 | * Licensed under the Apache License, Version 2.0 (the License); you may
13 | * not use this file except in compliance with the License.
14 | * You may obtain a copy of the License at
15 | *
16 | * www.apache.org/licenses/LICENSE-2.0
17 | *
18 | * Unless required by applicable law or agreed to in writing, software
19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21 | * See the License for the specific language governing permissions and
22 | * limitations under the License.
23 | */
24 |
25 | #if defined ( __ICCARM__ )
26 | #pragma system_include /* treat file as system include file for MISRA check */
27 | #elif defined (__clang__)
28 | #pragma clang system_header /* treat file as system include file */
29 | #endif
30 |
31 | #ifndef __CMSIS_VERSION_H
32 | #define __CMSIS_VERSION_H
33 |
34 | /* CMSIS Version definitions */
35 | #define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */
36 | #define __CM_CMSIS_VERSION_SUB ( 3U) /*!< [15:0] CMSIS Core(M) sub version */
37 | #define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \
38 | __CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */
39 | #endif
40 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/Include/tz_context.h:
--------------------------------------------------------------------------------
1 | /******************************************************************************
2 | * @file tz_context.h
3 | * @brief Context Management for Armv8-M TrustZone
4 | * @version V1.0.1
5 | * @date 10. January 2018
6 | ******************************************************************************/
7 | /*
8 | * Copyright (c) 2017-2018 Arm Limited. All rights reserved.
9 | *
10 | * SPDX-License-Identifier: Apache-2.0
11 | *
12 | * Licensed under the Apache License, Version 2.0 (the License); you may
13 | * not use this file except in compliance with the License.
14 | * You may obtain a copy of the License at
15 | *
16 | * www.apache.org/licenses/LICENSE-2.0
17 | *
18 | * Unless required by applicable law or agreed to in writing, software
19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21 | * See the License for the specific language governing permissions and
22 | * limitations under the License.
23 | */
24 |
25 | #if defined ( __ICCARM__ )
26 | #pragma system_include /* treat file as system include file for MISRA check */
27 | #elif defined (__clang__)
28 | #pragma clang system_header /* treat file as system include file */
29 | #endif
30 |
31 | #ifndef TZ_CONTEXT_H
32 | #define TZ_CONTEXT_H
33 |
34 | #include
35 |
36 | #ifndef TZ_MODULEID_T
37 | #define TZ_MODULEID_T
38 | /// \details Data type that identifies secure software modules called by a process.
39 | typedef uint32_t TZ_ModuleId_t;
40 | #endif
41 |
42 | /// \details TZ Memory ID identifies an allocated memory slot.
43 | typedef uint32_t TZ_MemoryId_t;
44 |
45 | /// Initialize secure context memory system
46 | /// \return execution status (1: success, 0: error)
47 | uint32_t TZ_InitContextSystem_S (void);
48 |
49 | /// Allocate context memory for calling secure software modules in TrustZone
50 | /// \param[in] module identifies software modules called from non-secure mode
51 | /// \return value != 0 id TrustZone memory slot identifier
52 | /// \return value 0 no memory available or internal error
53 | TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module);
54 |
55 | /// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
56 | /// \param[in] id TrustZone memory slot identifier
57 | /// \return execution status (1: success, 0: error)
58 | uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id);
59 |
60 | /// Load secure context (called on RTOS thread context switch)
61 | /// \param[in] id TrustZone memory slot identifier
62 | /// \return execution status (1: success, 0: error)
63 | uint32_t TZ_LoadContext_S (TZ_MemoryId_t id);
64 |
65 | /// Store secure context (called on RTOS thread context switch)
66 | /// \param[in] id TrustZone memory slot identifier
67 | /// \return execution status (1: success, 0: error)
68 | uint32_t TZ_StoreContext_S (TZ_MemoryId_t id);
69 |
70 | #endif // TZ_CONTEXT_H
71 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/LICENSE.txt:
--------------------------------------------------------------------------------
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--------------------------------------------------------------------------------
/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32l4xx_hal_def.h
4 | * @author MCD Application Team
5 | * @brief This file contains HAL common defines, enumeration, macros and
6 | * structures definitions.
7 | ******************************************************************************
8 | * @attention
9 | *
10 | * Copyright (c) 2017 STMicroelectronics.
11 | * All rights reserved.
12 | *
13 | * This software is licensed under terms that can be found in the LICENSE file
14 | * in the root directory of this software component.
15 | * If no LICENSE file comes with this software, it is provided AS-IS.
16 | *
17 | ******************************************************************************
18 | */
19 |
20 | /* Define to prevent recursive inclusion -------------------------------------*/
21 | #ifndef STM32L4xx_HAL_DEF_H
22 | #define STM32L4xx_HAL_DEF_H
23 |
24 | #ifdef __cplusplus
25 | extern "C" {
26 | #endif
27 |
28 | /* Includes ------------------------------------------------------------------*/
29 | #include "stm32l4xx.h"
30 | #include "Legacy/stm32_hal_legacy.h" /* Aliases file for old names compatibility */
31 | #include
32 |
33 | /* Exported types ------------------------------------------------------------*/
34 |
35 | /**
36 | * @brief HAL Status structures definition
37 | */
38 | typedef enum
39 | {
40 | HAL_OK = 0x00,
41 | HAL_ERROR = 0x01,
42 | HAL_BUSY = 0x02,
43 | HAL_TIMEOUT = 0x03
44 | } HAL_StatusTypeDef;
45 |
46 | /**
47 | * @brief HAL Lock structures definition
48 | */
49 | typedef enum
50 | {
51 | HAL_UNLOCKED = 0x00,
52 | HAL_LOCKED = 0x01
53 | } HAL_LockTypeDef;
54 |
55 | /* Exported macros -----------------------------------------------------------*/
56 |
57 | #define UNUSED(X) (void)X /* To avoid gcc/g++ warnings */
58 |
59 | #define HAL_MAX_DELAY 0xFFFFFFFFU
60 |
61 | #define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) == (BIT))
62 | #define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == 0U)
63 |
64 | #define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__) \
65 | do{ \
66 | (__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); \
67 | (__DMA_HANDLE__).Parent = (__HANDLE__); \
68 | } while(0)
69 |
70 | /** @brief Reset the Handle's State field.
71 | * @param __HANDLE__: specifies the Peripheral Handle.
72 | * @note This macro can be used for the following purpose:
73 | * - When the Handle is declared as local variable; before passing it as parameter
74 | * to HAL_PPP_Init() for the first time, it is mandatory to use this macro
75 | * to set to 0 the Handle's "State" field.
76 | * Otherwise, "State" field may have any random value and the first time the function
77 | * HAL_PPP_Init() is called, the low level hardware initialization will be missed
78 | * (i.e. HAL_PPP_MspInit() will not be executed).
79 | * - When there is a need to reconfigure the low level hardware: instead of calling
80 | * HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init().
81 | * In this later function, when the Handle's "State" field is set to 0, it will execute the function
82 | * HAL_PPP_MspInit() which will reconfigure the low level hardware.
83 | * @retval None
84 | */
85 | #define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0)
86 |
87 | #if (USE_RTOS == 1)
88 | /* Reserved for future use */
89 | #error " USE_RTOS should be 0 in the current HAL release "
90 | #else
91 | #define __HAL_LOCK(__HANDLE__) \
92 | do{ \
93 | if((__HANDLE__)->Lock == HAL_LOCKED) \
94 | { \
95 | return HAL_BUSY; \
96 | } \
97 | else \
98 | { \
99 | (__HANDLE__)->Lock = HAL_LOCKED; \
100 | } \
101 | }while (0)
102 |
103 | #define __HAL_UNLOCK(__HANDLE__) \
104 | do{ \
105 | (__HANDLE__)->Lock = HAL_UNLOCKED; \
106 | }while (0)
107 | #endif /* USE_RTOS */
108 |
109 |
110 | #if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler V6 */
111 | #ifndef __weak
112 | #define __weak __attribute__((weak))
113 | #endif
114 | #ifndef __packed
115 | #define __packed __attribute__((packed))
116 | #endif
117 | #elif defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */
118 | #ifndef __weak
119 | #define __weak __attribute__((weak))
120 | #endif /* __weak */
121 | #ifndef __packed
122 | #define __packed __attribute__((__packed__))
123 | #endif /* __packed */
124 | #endif /* __GNUC__ */
125 |
126 |
127 | /* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */
128 | #if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler V6 */
129 | #ifndef __ALIGN_BEGIN
130 | #define __ALIGN_BEGIN
131 | #endif
132 | #ifndef __ALIGN_END
133 | #define __ALIGN_END __attribute__ ((aligned (4)))
134 | #endif
135 | #elif defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */
136 | #ifndef __ALIGN_END
137 | #define __ALIGN_END __attribute__ ((aligned (4)))
138 | #endif /* __ALIGN_END */
139 | #ifndef __ALIGN_BEGIN
140 | #define __ALIGN_BEGIN
141 | #endif /* __ALIGN_BEGIN */
142 | #else
143 | #ifndef __ALIGN_END
144 | #define __ALIGN_END
145 | #endif /* __ALIGN_END */
146 | #ifndef __ALIGN_BEGIN
147 | #if defined (__CC_ARM) /* ARM Compiler V5 */
148 | #define __ALIGN_BEGIN __align(4)
149 | #elif defined (__ICCARM__) /* IAR Compiler */
150 | #define __ALIGN_BEGIN
151 | #endif /* __CC_ARM */
152 | #endif /* __ALIGN_BEGIN */
153 | #endif /* __GNUC__ */
154 |
155 | /**
156 | * @brief __RAM_FUNC definition
157 | */
158 | #if defined ( __CC_ARM ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
159 | /* ARM Compiler V4/V5 and V6
160 | --------------------------
161 | RAM functions are defined using the toolchain options.
162 | Functions that are executed in RAM should reside in a separate source module.
163 | Using the 'Options for File' dialog you can simply change the 'Code / Const'
164 | area of a module to a memory space in physical RAM.
165 | Available memory areas are declared in the 'Target' tab of the 'Options for Target'
166 | dialog.
167 | */
168 | #define __RAM_FUNC
169 |
170 | #elif defined ( __ICCARM__ )
171 | /* ICCARM Compiler
172 | ---------------
173 | RAM functions are defined using a specific toolchain keyword "__ramfunc".
174 | */
175 | #define __RAM_FUNC __ramfunc
176 |
177 | #elif defined ( __GNUC__ )
178 | /* GNU Compiler
179 | ------------
180 | RAM functions are defined using a specific toolchain attribute
181 | "__attribute__((section(".RamFunc")))".
182 | */
183 | #define __RAM_FUNC __attribute__((section(".RamFunc")))
184 |
185 | #endif
186 |
187 | /**
188 | * @brief __NOINLINE definition
189 | */
190 | #if defined ( __CC_ARM ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) || defined ( __GNUC__ )
191 | /* ARM V4/V5 and V6 & GNU Compiler
192 | -------------------------------
193 | */
194 | #define __NOINLINE __attribute__ ( (noinline) )
195 |
196 | #elif defined ( __ICCARM__ )
197 | /* ICCARM Compiler
198 | ---------------
199 | */
200 | #define __NOINLINE _Pragma("optimize = no_inline")
201 |
202 | #endif
203 |
204 |
205 | #ifdef __cplusplus
206 | }
207 | #endif
208 |
209 | #endif /* STM32L4xx_HAL_DEF_H */
210 |
--------------------------------------------------------------------------------
/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32l4xx_hal_flash_ex.h
4 | * @author MCD Application Team
5 | * @brief Header file of FLASH HAL Extended module.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * Copyright (c) 2017 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software is licensed under terms that can be found in the LICENSE file in
13 | * the root directory of this software component.
14 | * If no LICENSE file comes with this software, it is provided AS-IS.
15 | ******************************************************************************
16 | */
17 |
18 | /* Define to prevent recursive inclusion -------------------------------------*/
19 | #ifndef STM32L4xx_HAL_FLASH_EX_H
20 | #define STM32L4xx_HAL_FLASH_EX_H
21 |
22 | #ifdef __cplusplus
23 | extern "C" {
24 | #endif
25 |
26 | /* Includes ------------------------------------------------------------------*/
27 | #include "stm32l4xx_hal_def.h"
28 |
29 | /** @addtogroup STM32L4xx_HAL_Driver
30 | * @{
31 | */
32 |
33 | /** @addtogroup FLASHEx
34 | * @{
35 | */
36 |
37 | /* Exported types ------------------------------------------------------------*/
38 |
39 | /* Exported constants --------------------------------------------------------*/
40 | #if defined (FLASH_CFGR_LVEN)
41 | /** @addtogroup FLASHEx_Exported_Constants
42 | * @{
43 | */
44 | /** @defgroup FLASHEx_LVE_PIN_CFG FLASHEx LVE pin configuration
45 | * @{
46 | */
47 | #define FLASH_LVE_PIN_CTRL 0x00000000U /*!< LVE FLASH pin controlled by power controller */
48 | #define FLASH_LVE_PIN_FORCED FLASH_CFGR_LVEN /*!< LVE FLASH pin enforced to low (external SMPS used) */
49 | /**
50 | * @}
51 | */
52 |
53 | /**
54 | * @}
55 | */
56 | #endif /* FLASH_CFGR_LVEN */
57 |
58 | /* Exported macro ------------------------------------------------------------*/
59 |
60 | /* Exported functions --------------------------------------------------------*/
61 | /** @addtogroup FLASHEx_Exported_Functions
62 | * @{
63 | */
64 |
65 | /* Extended Program operation functions *************************************/
66 | /** @addtogroup FLASHEx_Exported_Functions_Group1
67 | * @{
68 | */
69 | HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError);
70 | HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit);
71 | HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit);
72 | void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit);
73 | /**
74 | * @}
75 | */
76 |
77 | #if defined (FLASH_CFGR_LVEN)
78 | /** @addtogroup FLASHEx_Exported_Functions_Group2
79 | * @{
80 | */
81 | HAL_StatusTypeDef HAL_FLASHEx_ConfigLVEPin(uint32_t ConfigLVE);
82 | /**
83 | * @}
84 | */
85 | #endif /* FLASH_CFGR_LVEN */
86 |
87 | /**
88 | * @}
89 | */
90 |
91 | /* Private function ----------------------------------------------------------*/
92 | /** @addtogroup FLASHEx_Private_Functions FLASHEx Private Functions
93 | * @{
94 | */
95 | void FLASH_PageErase(uint32_t Page, uint32_t Banks);
96 | void FLASH_FlushCaches(void);
97 | /**
98 | * @}
99 | */
100 |
101 | /* Private macros ------------------------------------------------------------*/
102 | /**
103 | @cond 0
104 | */
105 | #if defined (FLASH_CFGR_LVEN)
106 | #define IS_FLASH_LVE_PIN(CFG) (((CFG) == FLASH_LVE_PIN_CTRL) || ((CFG) == FLASH_LVE_PIN_FORCED))
107 | #endif /* FLASH_CFGR_LVEN */
108 | /**
109 | @endcond
110 | */
111 |
112 | /**
113 | * @}
114 | */
115 |
116 | /**
117 | * @}
118 | */
119 |
120 | #ifdef __cplusplus
121 | }
122 | #endif
123 |
124 | #endif /* STM32L4xx_HAL_FLASH_EX_H */
125 |
126 |
--------------------------------------------------------------------------------
/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32l4xx_hal_flash_ramfunc.h
4 | * @author MCD Application Team
5 | * @brief Header file of FLASH RAMFUNC driver.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * Copyright (c) 2017 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software is licensed under terms that can be found in the LICENSE file in
13 | * the root directory of this software component.
14 | * If no LICENSE file comes with this software, it is provided AS-IS.
15 | ******************************************************************************
16 | */
17 |
18 | /* Define to prevent recursive inclusion -------------------------------------*/
19 | #ifndef STM32L4xx_FLASH_RAMFUNC_H
20 | #define STM32L4xx_FLASH_RAMFUNC_H
21 |
22 | #ifdef __cplusplus
23 | extern "C" {
24 | #endif
25 |
26 | /* Includes ------------------------------------------------------------------*/
27 | #include "stm32l4xx_hal_def.h"
28 |
29 | /** @addtogroup STM32L4xx_HAL_Driver
30 | * @{
31 | */
32 |
33 | /** @addtogroup FLASH_RAMFUNC
34 | * @{
35 | */
36 |
37 | /* Exported types ------------------------------------------------------------*/
38 | /* Exported macro ------------------------------------------------------------*/
39 | /* Exported functions --------------------------------------------------------*/
40 | /** @addtogroup FLASH_RAMFUNC_Exported_Functions
41 | * @{
42 | */
43 |
44 | /** @addtogroup FLASH_RAMFUNC_Exported_Functions_Group1
45 | * @{
46 | */
47 | /* Peripheral Control functions ************************************************/
48 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EnableRunPowerDown(void);
49 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DisableRunPowerDown(void);
50 | #if defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)
51 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_OB_DBankConfig(uint32_t DBankConfig);
52 | #endif
53 | /**
54 | * @}
55 | */
56 |
57 | /**
58 | * @}
59 | */
60 |
61 | /**
62 | * @}
63 | */
64 |
65 | /**
66 | * @}
67 | */
68 |
69 | #ifdef __cplusplus
70 | }
71 | #endif
72 |
73 | #endif /* STM32L4xx_FLASH_RAMFUNC_H */
74 |
75 |
--------------------------------------------------------------------------------
/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32l4xx_hal_i2c_ex.h
4 | * @author MCD Application Team
5 | * @brief Header file of I2C HAL Extended module.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * Copyright (c) 2017 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software is licensed under terms that can be found in the LICENSE file
13 | * in the root directory of this software component.
14 | * If no LICENSE file comes with this software, it is provided AS-IS.
15 | *
16 | ******************************************************************************
17 | */
18 |
19 | /* Define to prevent recursive inclusion -------------------------------------*/
20 | #ifndef STM32L4xx_HAL_I2C_EX_H
21 | #define STM32L4xx_HAL_I2C_EX_H
22 |
23 | #ifdef __cplusplus
24 | extern "C" {
25 | #endif
26 |
27 | /* Includes ------------------------------------------------------------------*/
28 | #include "stm32l4xx_hal_def.h"
29 |
30 | /** @addtogroup STM32L4xx_HAL_Driver
31 | * @{
32 | */
33 |
34 | /** @addtogroup I2CEx
35 | * @{
36 | */
37 |
38 | /* Exported types ------------------------------------------------------------*/
39 | /* Exported constants --------------------------------------------------------*/
40 | /** @defgroup I2CEx_Exported_Constants I2C Extended Exported Constants
41 | * @{
42 | */
43 |
44 | /** @defgroup I2CEx_Analog_Filter I2C Extended Analog Filter
45 | * @{
46 | */
47 | #define I2C_ANALOGFILTER_ENABLE 0x00000000U
48 | #define I2C_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF
49 | /**
50 | * @}
51 | */
52 |
53 | /** @defgroup I2CEx_FastModePlus I2C Extended Fast Mode Plus
54 | * @{
55 | */
56 | #define I2C_FMP_NOT_SUPPORTED 0xAAAA0000U /*!< Fast Mode Plus not supported */
57 | #define I2C_FASTMODEPLUS_PB6 SYSCFG_CFGR1_I2C_PB6_FMP /*!< Enable Fast Mode Plus on PB6 */
58 | #define I2C_FASTMODEPLUS_PB7 SYSCFG_CFGR1_I2C_PB7_FMP /*!< Enable Fast Mode Plus on PB7 */
59 | #if defined(SYSCFG_CFGR1_I2C_PB8_FMP)
60 | #define I2C_FASTMODEPLUS_PB8 SYSCFG_CFGR1_I2C_PB8_FMP /*!< Enable Fast Mode Plus on PB8 */
61 | #define I2C_FASTMODEPLUS_PB9 SYSCFG_CFGR1_I2C_PB9_FMP /*!< Enable Fast Mode Plus on PB9 */
62 | #else
63 | #define I2C_FASTMODEPLUS_PB8 (uint32_t)(0x00000010U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus PB8 not supported */
64 | #define I2C_FASTMODEPLUS_PB9 (uint32_t)(0x00000012U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus PB9 not supported */
65 | #endif /* SYSCFG_CFGR1_I2C_PB8_FMP */
66 | #define I2C_FASTMODEPLUS_I2C1 SYSCFG_CFGR1_I2C1_FMP /*!< Enable Fast Mode Plus on I2C1 pins */
67 | #if defined(SYSCFG_CFGR1_I2C2_FMP)
68 | #define I2C_FASTMODEPLUS_I2C2 SYSCFG_CFGR1_I2C2_FMP /*!< Enable Fast Mode Plus on I2C2 pins */
69 | #else
70 | #define I2C_FASTMODEPLUS_I2C2 (uint32_t)(0x00000200U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C2 not supported */
71 | #endif /* SYSCFG_CFGR1_I2C2_FMP */
72 | #define I2C_FASTMODEPLUS_I2C3 SYSCFG_CFGR1_I2C3_FMP /*!< Enable Fast Mode Plus on I2C3 pins */
73 | #if defined(SYSCFG_CFGR1_I2C4_FMP)
74 | #define I2C_FASTMODEPLUS_I2C4 SYSCFG_CFGR1_I2C4_FMP /*!< Enable Fast Mode Plus on I2C4 pins */
75 | #else
76 | #define I2C_FASTMODEPLUS_I2C4 (uint32_t)(0x00000800U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C4 not supported */
77 | #endif /* SYSCFG_CFGR1_I2C4_FMP */
78 | /**
79 | * @}
80 | */
81 |
82 | /**
83 | * @}
84 | */
85 |
86 | /* Exported macro ------------------------------------------------------------*/
87 | /** @defgroup I2CEx_Exported_Macros I2C Extended Exported Macros
88 | * @{
89 | */
90 |
91 | /**
92 | * @}
93 | */
94 |
95 | /* Exported functions --------------------------------------------------------*/
96 | /** @addtogroup I2CEx_Exported_Functions I2C Extended Exported Functions
97 | * @{
98 | */
99 |
100 | /** @addtogroup I2CEx_Exported_Functions_Group1 Filter Mode Functions
101 | * @{
102 | */
103 | /* Peripheral Control functions ************************************************/
104 | HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter);
105 | HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter);
106 | /**
107 | * @}
108 | */
109 |
110 | /** @addtogroup I2CEx_Exported_Functions_Group2 WakeUp Mode Functions
111 | * @{
112 | */
113 | HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c);
114 | HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c);
115 | /**
116 | * @}
117 | */
118 |
119 | /** @addtogroup I2CEx_Exported_Functions_Group3 Fast Mode Plus Functions
120 | * @{
121 | */
122 | void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus);
123 | void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus);
124 | /**
125 | * @}
126 | */
127 |
128 | /**
129 | * @}
130 | */
131 |
132 | /* Private constants ---------------------------------------------------------*/
133 | /** @defgroup I2CEx_Private_Constants I2C Extended Private Constants
134 | * @{
135 | */
136 |
137 | /**
138 | * @}
139 | */
140 |
141 | /* Private macros ------------------------------------------------------------*/
142 | /** @defgroup I2CEx_Private_Macro I2C Extended Private Macros
143 | * @{
144 | */
145 | #define IS_I2C_ANALOG_FILTER(FILTER) (((FILTER) == I2C_ANALOGFILTER_ENABLE) || \
146 | ((FILTER) == I2C_ANALOGFILTER_DISABLE))
147 |
148 | #define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000FU)
149 |
150 | #define IS_I2C_FASTMODEPLUS(__CONFIG__) ((((__CONFIG__) & I2C_FMP_NOT_SUPPORTED) != I2C_FMP_NOT_SUPPORTED) && \
151 | ((((__CONFIG__) & (I2C_FASTMODEPLUS_PB6)) == I2C_FASTMODEPLUS_PB6) || \
152 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PB7)) == I2C_FASTMODEPLUS_PB7) || \
153 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PB8)) == I2C_FASTMODEPLUS_PB8) || \
154 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PB9)) == I2C_FASTMODEPLUS_PB9) || \
155 | (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C1)) == I2C_FASTMODEPLUS_I2C1) || \
156 | (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C2)) == I2C_FASTMODEPLUS_I2C2) || \
157 | (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C3)) == I2C_FASTMODEPLUS_I2C3) || \
158 | (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C4)) == I2C_FASTMODEPLUS_I2C4)))
159 | /**
160 | * @}
161 | */
162 |
163 | /* Private Functions ---------------------------------------------------------*/
164 | /** @defgroup I2CEx_Private_Functions I2C Extended Private Functions
165 | * @{
166 | */
167 | /* Private functions are defined in stm32l4xx_hal_i2c_ex.c file */
168 | /**
169 | * @}
170 | */
171 |
172 | /**
173 | * @}
174 | */
175 |
176 | /**
177 | * @}
178 | */
179 |
180 | #ifdef __cplusplus
181 | }
182 | #endif
183 |
184 | #endif /* STM32L4xx_HAL_I2C_EX_H */
185 |
--------------------------------------------------------------------------------
/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32l4xx_hal_spi_ex.h
4 | * @author MCD Application Team
5 | * @brief Header file of SPI HAL Extended module.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * Copyright (c) 2017 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software is licensed under terms that can be found in the LICENSE file
13 | * in the root directory of this software component.
14 | * If no LICENSE file comes with this software, it is provided AS-IS.
15 | *
16 | ******************************************************************************
17 | */
18 |
19 | /* Define to prevent recursive inclusion -------------------------------------*/
20 | #ifndef STM32L4xx_HAL_SPI_EX_H
21 | #define STM32L4xx_HAL_SPI_EX_H
22 |
23 | #ifdef __cplusplus
24 | extern "C" {
25 | #endif
26 |
27 | /* Includes ------------------------------------------------------------------*/
28 | #include "stm32l4xx_hal_def.h"
29 |
30 | /** @addtogroup STM32L4xx_HAL_Driver
31 | * @{
32 | */
33 |
34 | /** @addtogroup SPIEx
35 | * @{
36 | */
37 |
38 | /* Exported types ------------------------------------------------------------*/
39 | /* Exported constants --------------------------------------------------------*/
40 | /* Exported macros -----------------------------------------------------------*/
41 | /* Exported functions --------------------------------------------------------*/
42 | /** @addtogroup SPIEx_Exported_Functions
43 | * @{
44 | */
45 |
46 | /* Initialization and de-initialization functions ****************************/
47 | /* IO operation functions *****************************************************/
48 | /** @addtogroup SPIEx_Exported_Functions_Group1
49 | * @{
50 | */
51 | HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(SPI_HandleTypeDef *hspi);
52 | /**
53 | * @}
54 | */
55 |
56 | /**
57 | * @}
58 | */
59 |
60 | /**
61 | * @}
62 | */
63 |
64 | /**
65 | * @}
66 | */
67 |
68 | #ifdef __cplusplus
69 | }
70 | #endif
71 |
72 | #endif /* STM32L4xx_HAL_SPI_EX_H */
73 |
74 |
--------------------------------------------------------------------------------
/Drivers/STM32L4xx_HAL_Driver/LICENSE.txt:
--------------------------------------------------------------------------------
1 | This software component is provided to you as part of a software package and
2 | applicable license terms are in the Package_license file. If you received this
3 | software component outside of a package or without applicable license terms,
4 | the terms of the BSD-3-Clause license shall apply.
5 | You may obtain a copy of the BSD-3-Clause at:
6 | https://opensource.org/licenses/BSD-3-Clause
7 |
--------------------------------------------------------------------------------
/Drivers/STM32L4xx_HAL_Driver/License.md:
--------------------------------------------------------------------------------
1 | # Copyright (c) 2017 STMicroelectronics
2 |
3 | This software component is licensed by STMicroelectronics under the **BSD 3-Clause** license. You may not use this file except in compliance with this license. You may obtain a copy of the license [here](https://opensource.org/licenses/BSD-3-Clause).
--------------------------------------------------------------------------------
/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32l4xx_hal_dma_ex.c
4 | * @author MCD Application Team
5 | * @brief DMA Extension HAL module driver
6 | * This file provides firmware functions to manage the following
7 | * functionalities of the DMA Extension peripheral:
8 | * + Extended features functions
9 | *
10 | ******************************************************************************
11 | * @attention
12 | *
13 | * Copyright (c) 2017 STMicroelectronics.
14 | * All rights reserved.
15 | *
16 | * This software is licensed under terms that can be found in the LICENSE file
17 | * in the root directory of this software component.
18 | * If no LICENSE file comes with this software, it is provided AS-IS.
19 | *
20 | ******************************************************************************
21 | @verbatim
22 | ==============================================================================
23 | ##### How to use this driver #####
24 | ==============================================================================
25 | [..]
26 | The DMA Extension HAL driver can be used as follows:
27 |
28 | (+) Configure the DMA_MUX Synchronization Block using HAL_DMAEx_ConfigMuxSync function.
29 | (+) Configure the DMA_MUX Request Generator Block using HAL_DMAEx_ConfigMuxRequestGenerator function.
30 | Functions HAL_DMAEx_EnableMuxRequestGenerator and HAL_DMAEx_DisableMuxRequestGenerator can then be used
31 | to respectively enable/disable the request generator.
32 |
33 | (+) To handle the DMAMUX Interrupts, the function HAL_DMAEx_MUX_IRQHandler should be called from
34 | the DMAMUX IRQ handler i.e DMAMUX1_OVR_IRQHandler.
35 | As only one interrupt line is available for all DMAMUX channels and request generators , HAL_DMAEx_MUX_IRQHandler should be
36 | called with, as parameter, the appropriate DMA handle as many as used DMAs in the user project
37 | (exception done if a given DMA is not using the DMAMUX SYNC block neither a request generator)
38 |
39 | -@- In Memory-to-Memory transfer mode, Multi (Double) Buffer mode is not allowed.
40 | -@- When Multi (Double) Buffer mode is enabled, the transfer is circular by default.
41 | -@- In Multi (Double) buffer mode, it is possible to update the base address for
42 | the AHB memory port on the fly (DMA_CM0ARx or DMA_CM1ARx) when the channel is enabled.
43 |
44 |
45 | @endverbatim
46 | ******************************************************************************
47 | */
48 |
49 | /* Includes ------------------------------------------------------------------*/
50 | #include "stm32l4xx_hal.h"
51 |
52 | #if defined(DMAMUX1)
53 |
54 | /** @addtogroup STM32L4xx_HAL_Driver
55 | * @{
56 | */
57 |
58 | /** @defgroup DMAEx DMAEx
59 | * @brief DMA Extended HAL module driver
60 | * @{
61 | */
62 |
63 | #ifdef HAL_DMA_MODULE_ENABLED
64 |
65 | /* Private typedef -----------------------------------------------------------*/
66 | /* Private define ------------------------------------------------------------*/
67 | /* Private macro -------------------------------------------------------------*/
68 | /* Private variables ---------------------------------------------------------*/
69 | /* Private Constants ---------------------------------------------------------*/
70 | /* Private function prototypes -----------------------------------------------*/
71 | /* Private functions ---------------------------------------------------------*/
72 |
73 |
74 | /** @defgroup DMAEx_Exported_Functions DMAEx Exported Functions
75 | * @{
76 | */
77 |
78 | /** @defgroup DMAEx_Exported_Functions_Group1 DMAEx Extended features functions
79 | * @brief Extended features functions
80 | *
81 | @verbatim
82 | ===============================================================================
83 | ##### Extended features functions #####
84 | ===============================================================================
85 | [..] This section provides functions allowing to:
86 |
87 | (+) Configure the DMAMUX Synchronization Block using HAL_DMAEx_ConfigMuxSync function.
88 | (+) Configure the DMAMUX Request Generator Block using HAL_DMAEx_ConfigMuxRequestGenerator function.
89 | Functions HAL_DMAEx_EnableMuxRequestGenerator and HAL_DMAEx_DisableMuxRequestGenerator can then be used
90 | to respectively enable/disable the request generator.
91 |
92 | @endverbatim
93 | * @{
94 | */
95 |
96 |
97 | /**
98 | * @brief Configure the DMAMUX synchronization parameters for a given DMA channel (instance).
99 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains
100 | * the configuration information for the specified DMA channel.
101 | * @param pSyncConfig : pointer to HAL_DMA_MuxSyncConfigTypeDef : contains the DMAMUX synchronization parameters
102 | * @retval HAL status
103 | */
104 | HAL_StatusTypeDef HAL_DMAEx_ConfigMuxSync(DMA_HandleTypeDef *hdma, HAL_DMA_MuxSyncConfigTypeDef *pSyncConfig)
105 | {
106 | /* Check the parameters */
107 | assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
108 |
109 | assert_param(IS_DMAMUX_SYNC_SIGNAL_ID(pSyncConfig->SyncSignalID));
110 |
111 | assert_param(IS_DMAMUX_SYNC_POLARITY(pSyncConfig-> SyncPolarity));
112 | assert_param(IS_DMAMUX_SYNC_STATE(pSyncConfig->SyncEnable));
113 | assert_param(IS_DMAMUX_SYNC_EVENT(pSyncConfig->EventEnable));
114 | assert_param(IS_DMAMUX_SYNC_REQUEST_NUMBER(pSyncConfig->RequestNumber));
115 |
116 | /*Check if the DMA state is ready */
117 | if(hdma->State == HAL_DMA_STATE_READY)
118 | {
119 | /* Process Locked */
120 | __HAL_LOCK(hdma);
121 |
122 | /* Set the new synchronization parameters (and keep the request ID filled during the Init)*/
123 | MODIFY_REG( hdma->DMAmuxChannel->CCR, \
124 | (~DMAMUX_CxCR_DMAREQ_ID) , \
125 | ((pSyncConfig->SyncSignalID) << DMAMUX_CxCR_SYNC_ID_Pos) | ((pSyncConfig->RequestNumber - 1U) << DMAMUX_CxCR_NBREQ_Pos) | \
126 | pSyncConfig->SyncPolarity | ((uint32_t)pSyncConfig->SyncEnable << DMAMUX_CxCR_SE_Pos) | \
127 | ((uint32_t)pSyncConfig->EventEnable << DMAMUX_CxCR_EGE_Pos));
128 |
129 | /* Process UnLocked */
130 | __HAL_UNLOCK(hdma);
131 |
132 | return HAL_OK;
133 | }
134 | else
135 | {
136 | /*DMA State not Ready*/
137 | return HAL_ERROR;
138 | }
139 | }
140 |
141 | /**
142 | * @brief Configure the DMAMUX request generator block used by the given DMA channel (instance).
143 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains
144 | * the configuration information for the specified DMA channel.
145 | * @param pRequestGeneratorConfig : pointer to HAL_DMA_MuxRequestGeneratorConfigTypeDef :
146 | * contains the request generator parameters.
147 | *
148 | * @retval HAL status
149 | */
150 | HAL_StatusTypeDef HAL_DMAEx_ConfigMuxRequestGenerator (DMA_HandleTypeDef *hdma, HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRequestGeneratorConfig)
151 | {
152 | /* Check the parameters */
153 | assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
154 |
155 | assert_param(IS_DMAMUX_REQUEST_GEN_SIGNAL_ID(pRequestGeneratorConfig->SignalID));
156 |
157 | assert_param(IS_DMAMUX_REQUEST_GEN_POLARITY(pRequestGeneratorConfig->Polarity));
158 | assert_param(IS_DMAMUX_REQUEST_GEN_REQUEST_NUMBER(pRequestGeneratorConfig->RequestNumber));
159 |
160 | /* check if the DMA state is ready
161 | and DMA is using a DMAMUX request generator block
162 | */
163 | if((hdma->State == HAL_DMA_STATE_READY) && (hdma->DMAmuxRequestGen != 0U))
164 | {
165 | /* Process Locked */
166 | __HAL_LOCK(hdma);
167 |
168 | /* Set the request generator new parameters */
169 | hdma->DMAmuxRequestGen->RGCR = pRequestGeneratorConfig->SignalID | \
170 | ((pRequestGeneratorConfig->RequestNumber - 1U) << DMAMUX_RGxCR_GNBREQ_Pos)| \
171 | pRequestGeneratorConfig->Polarity;
172 | /* Process UnLocked */
173 | __HAL_UNLOCK(hdma);
174 |
175 | return HAL_OK;
176 | }
177 | else
178 | {
179 | return HAL_ERROR;
180 | }
181 | }
182 |
183 | /**
184 | * @brief Enable the DMAMUX request generator block used by the given DMA channel (instance).
185 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains
186 | * the configuration information for the specified DMA channel.
187 | * @retval HAL status
188 | */
189 | HAL_StatusTypeDef HAL_DMAEx_EnableMuxRequestGenerator (DMA_HandleTypeDef *hdma)
190 | {
191 | /* Check the parameters */
192 | assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
193 |
194 | /* check if the DMA state is ready
195 | and DMA is using a DMAMUX request generator block
196 | */
197 | if((hdma->State != HAL_DMA_STATE_RESET) && (hdma->DMAmuxRequestGen != 0))
198 | {
199 |
200 | /* Enable the request generator*/
201 | hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_GE;
202 |
203 | return HAL_OK;
204 | }
205 | else
206 | {
207 | return HAL_ERROR;
208 | }
209 | }
210 |
211 | /**
212 | * @brief Disable the DMAMUX request generator block used by the given DMA channel (instance).
213 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains
214 | * the configuration information for the specified DMA channel.
215 | * @retval HAL status
216 | */
217 | HAL_StatusTypeDef HAL_DMAEx_DisableMuxRequestGenerator (DMA_HandleTypeDef *hdma)
218 | {
219 | /* Check the parameters */
220 | assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
221 |
222 | /* check if the DMA state is ready
223 | and DMA is using a DMAMUX request generator block
224 | */
225 | if((hdma->State != HAL_DMA_STATE_RESET) && (hdma->DMAmuxRequestGen != 0))
226 | {
227 |
228 | /* Disable the request generator*/
229 | hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_GE;
230 |
231 | return HAL_OK;
232 | }
233 | else
234 | {
235 | return HAL_ERROR;
236 | }
237 | }
238 |
239 | /**
240 | * @brief Handles DMAMUX interrupt request.
241 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains
242 | * the configuration information for the specified DMA channel.
243 | * @retval None
244 | */
245 | void HAL_DMAEx_MUX_IRQHandler(DMA_HandleTypeDef *hdma)
246 | {
247 | /* Check for DMAMUX Synchronization overrun */
248 | if((hdma->DMAmuxChannelStatus->CSR & hdma->DMAmuxChannelStatusMask) != 0U)
249 | {
250 | /* Disable the synchro overrun interrupt */
251 | hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE;
252 |
253 | /* Clear the DMAMUX synchro overrun flag */
254 | hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
255 |
256 | /* Update error code */
257 | hdma->ErrorCode |= HAL_DMA_ERROR_SYNC;
258 |
259 | if(hdma->XferErrorCallback != NULL)
260 | {
261 | /* Transfer error callback */
262 | hdma->XferErrorCallback(hdma);
263 | }
264 | }
265 |
266 | if(hdma->DMAmuxRequestGen != 0)
267 | {
268 | /* if using a DMAMUX request generator block Check for DMAMUX request generator overrun */
269 | if((hdma->DMAmuxRequestGenStatus->RGSR & hdma->DMAmuxRequestGenStatusMask) != 0U)
270 | {
271 | /* Disable the request gen overrun interrupt */
272 | hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE;
273 |
274 | /* Clear the DMAMUX request generator overrun flag */
275 | hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
276 |
277 | /* Update error code */
278 | hdma->ErrorCode |= HAL_DMA_ERROR_REQGEN;
279 |
280 | if(hdma->XferErrorCallback != NULL)
281 | {
282 | /* Transfer error callback */
283 | hdma->XferErrorCallback(hdma);
284 | }
285 | }
286 | }
287 | }
288 |
289 | /**
290 | * @}
291 | */
292 |
293 | /**
294 | * @}
295 | */
296 |
297 | #endif /* HAL_DMA_MODULE_ENABLED */
298 |
299 | /**
300 | * @}
301 | */
302 |
303 | /**
304 | * @}
305 | */
306 |
307 | #endif /* DMAMUX1 */
308 |
--------------------------------------------------------------------------------
/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32l4xx_hal_flash_ramfunc.c
4 | * @author MCD Application Team
5 | * @brief FLASH RAMFUNC driver.
6 | * This file provides a Flash firmware functions which should be
7 | * executed from internal SRAM
8 | * + FLASH HalfPage Programming
9 | * + FLASH Power Down in Run mode
10 | *
11 | * @verbatim
12 | ==============================================================================
13 | ##### Flash RAM functions #####
14 | ==============================================================================
15 |
16 | *** ARM Compiler ***
17 | --------------------
18 | [..] RAM functions are defined using the toolchain options.
19 | Functions that are executed in RAM should reside in a separate
20 | source module. Using the 'Options for File' dialog you can simply change
21 | the 'Code / Const' area of a module to a memory space in physical RAM.
22 | Available memory areas are declared in the 'Target' tab of the
23 | Options for Target' dialog.
24 |
25 | *** ICCARM Compiler ***
26 | -----------------------
27 | [..] RAM functions are defined using a specific toolchain keyword "__ramfunc".
28 |
29 | *** GNU Compiler ***
30 | --------------------
31 | [..] RAM functions are defined using a specific toolchain attribute
32 | "__attribute__((section(".RamFunc")))".
33 |
34 | @endverbatim
35 | ******************************************************************************
36 | * @attention
37 | *
38 | * Copyright (c) 2017 STMicroelectronics.
39 | * All rights reserved.
40 | *
41 | * This software is licensed under terms that can be found in the LICENSE file in
42 | * the root directory of this software component.
43 | * If no LICENSE file comes with this software, it is provided AS-IS.
44 | ******************************************************************************
45 | */
46 |
47 | /* Includes ------------------------------------------------------------------*/
48 | #include "stm32l4xx_hal.h"
49 |
50 | /** @addtogroup STM32L4xx_HAL_Driver
51 | * @{
52 | */
53 |
54 | /** @defgroup FLASH_RAMFUNC FLASH_RAMFUNC
55 | * @brief FLASH functions executed from RAM
56 | * @{
57 | */
58 |
59 | #ifdef HAL_FLASH_MODULE_ENABLED
60 |
61 | /* Private typedef -----------------------------------------------------------*/
62 | /* Private define ------------------------------------------------------------*/
63 | /* Private macro -------------------------------------------------------------*/
64 | /* Private variables ---------------------------------------------------------*/
65 | /* Private function prototypes -----------------------------------------------*/
66 | /* Exported functions -------------------------------------------------------*/
67 |
68 | /** @defgroup FLASH_RAMFUNC_Exported_Functions FLASH in RAM function Exported Functions
69 | * @{
70 | */
71 |
72 | /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group1 Peripheral features functions
73 | * @brief Data transfers functions
74 | *
75 | @verbatim
76 | ===============================================================================
77 | ##### ramfunc functions #####
78 | ===============================================================================
79 | [..]
80 | This subsection provides a set of functions that should be executed from RAM.
81 |
82 | @endverbatim
83 | * @{
84 | */
85 |
86 | /**
87 | * @brief Enable the Power down in Run Mode
88 | * @note This function should be called and executed from SRAM memory
89 | * @retval HAL status
90 | */
91 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EnableRunPowerDown(void)
92 | {
93 | /* Enable the Power Down in Run mode*/
94 | __HAL_FLASH_POWER_DOWN_ENABLE();
95 |
96 | return HAL_OK;
97 |
98 | }
99 |
100 | /**
101 | * @brief Disable the Power down in Run Mode
102 | * @note This function should be called and executed from SRAM memory
103 | * @retval HAL status
104 | */
105 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DisableRunPowerDown(void)
106 | {
107 | /* Disable the Power Down in Run mode*/
108 | __HAL_FLASH_POWER_DOWN_DISABLE();
109 |
110 | return HAL_OK;
111 | }
112 |
113 | #if defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)
114 | /**
115 | * @brief Program the FLASH DBANK User Option Byte.
116 | *
117 | * @note To configure the user option bytes, the option lock bit OPTLOCK must
118 | * be cleared with the call of the HAL_FLASH_OB_Unlock() function.
119 | * @note To modify the DBANK option byte, no PCROP region should be defined.
120 | * To deactivate PCROP, user should perform RDP changing
121 | *
122 | * @param DBankConfig The FLASH DBANK User Option Byte value.
123 | * This parameter can be one of the following values:
124 | * @arg OB_DBANK_128_BITS: Single-bank with 128-bits data
125 | * @arg OB_DBANK_64_BITS: Dual-bank with 64-bits data
126 | *
127 | * @retval HAL status
128 | */
129 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_OB_DBankConfig(uint32_t DBankConfig)
130 | {
131 | uint32_t count, reg;
132 | HAL_StatusTypeDef status = HAL_ERROR;
133 |
134 | /* Process Locked */
135 | __HAL_LOCK(&pFlash);
136 |
137 | /* Check if the PCROP is disabled */
138 | reg = FLASH->PCROP1SR;
139 | if (reg > FLASH->PCROP1ER)
140 | {
141 | reg = FLASH->PCROP2SR;
142 | if (reg > FLASH->PCROP2ER)
143 | {
144 | /* Disable Flash prefetch */
145 | __HAL_FLASH_PREFETCH_BUFFER_DISABLE();
146 |
147 | if (READ_BIT(FLASH->ACR, FLASH_ACR_ICEN) != 0U)
148 | {
149 | /* Disable Flash instruction cache */
150 | __HAL_FLASH_INSTRUCTION_CACHE_DISABLE();
151 |
152 | /* Flush Flash instruction cache */
153 | __HAL_FLASH_INSTRUCTION_CACHE_RESET();
154 | }
155 |
156 | if (READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != 0U)
157 | {
158 | /* Disable Flash data cache */
159 | __HAL_FLASH_DATA_CACHE_DISABLE();
160 |
161 | /* Flush Flash data cache */
162 | __HAL_FLASH_DATA_CACHE_RESET();
163 | }
164 |
165 | /* Disable WRP zone 1 of 1st bank if needed */
166 | reg = FLASH->WRP1AR;
167 | if (((reg & FLASH_WRP1AR_WRP1A_STRT) >> FLASH_WRP1AR_WRP1A_STRT_Pos) <=
168 | ((reg & FLASH_WRP1AR_WRP1A_END) >> FLASH_WRP1AR_WRP1A_END_Pos))
169 | {
170 | MODIFY_REG(FLASH->WRP1AR, (FLASH_WRP1AR_WRP1A_STRT | FLASH_WRP1AR_WRP1A_END), FLASH_WRP1AR_WRP1A_STRT);
171 | }
172 |
173 | /* Disable WRP zone 2 of 1st bank if needed */
174 | reg = FLASH->WRP1BR;
175 | if (((reg & FLASH_WRP1BR_WRP1B_STRT) >> FLASH_WRP1BR_WRP1B_STRT_Pos) <=
176 | ((reg & FLASH_WRP1BR_WRP1B_END) >> FLASH_WRP1BR_WRP1B_END_Pos))
177 | {
178 | MODIFY_REG(FLASH->WRP1BR, (FLASH_WRP1BR_WRP1B_STRT | FLASH_WRP1BR_WRP1B_END), FLASH_WRP1BR_WRP1B_STRT);
179 | }
180 |
181 | /* Disable WRP zone 1 of 2nd bank if needed */
182 | reg = FLASH->WRP2AR;
183 | if (((reg & FLASH_WRP2AR_WRP2A_STRT) >> FLASH_WRP2AR_WRP2A_STRT_Pos) <=
184 | ((reg & FLASH_WRP2AR_WRP2A_END) >> FLASH_WRP2AR_WRP2A_END_Pos))
185 | {
186 | MODIFY_REG(FLASH->WRP2AR, (FLASH_WRP2AR_WRP2A_STRT | FLASH_WRP2AR_WRP2A_END), FLASH_WRP2AR_WRP2A_STRT);
187 | }
188 |
189 | /* Disable WRP zone 2 of 2nd bank if needed */
190 | reg = FLASH->WRP2BR;
191 | if (((reg & FLASH_WRP2BR_WRP2B_STRT) >> FLASH_WRP2BR_WRP2B_STRT_Pos) <=
192 | ((reg & FLASH_WRP2BR_WRP2B_END) >> FLASH_WRP2BR_WRP2B_END_Pos))
193 | {
194 | MODIFY_REG(FLASH->WRP2BR, (FLASH_WRP2BR_WRP2B_STRT | FLASH_WRP2BR_WRP2B_END), FLASH_WRP2BR_WRP2B_STRT);
195 | }
196 |
197 | /* Modify the DBANK user option byte */
198 | MODIFY_REG(FLASH->OPTR, FLASH_OPTR_DBANK, DBankConfig);
199 |
200 | /* Set OPTSTRT Bit */
201 | SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT);
202 |
203 | /* Wait for last operation to be completed */
204 | /* 8 is the number of required instruction cycles for the below loop statement (timeout expressed in ms) */
205 | count = FLASH_TIMEOUT_VALUE * (SystemCoreClock / 8U / 1000U);
206 | do
207 | {
208 | if (count == 0U)
209 | {
210 | break;
211 | }
212 | count--;
213 | } while (__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY) != RESET);
214 |
215 | /* If the option byte program operation is completed, disable the OPTSTRT Bit */
216 | CLEAR_BIT(FLASH->CR, FLASH_CR_OPTSTRT);
217 |
218 | /* Set the bit to force the option byte reloading */
219 | SET_BIT(FLASH->CR, FLASH_CR_OBL_LAUNCH);
220 | }
221 | }
222 |
223 | /* Process Unlocked */
224 | __HAL_UNLOCK(&pFlash);
225 |
226 | return status;
227 | }
228 | #endif
229 |
230 | /**
231 | * @}
232 | */
233 |
234 | /**
235 | * @}
236 | */
237 | #endif /* HAL_FLASH_MODULE_ENABLED */
238 |
239 |
240 |
241 | /**
242 | * @}
243 | */
244 |
245 | /**
246 | * @}
247 | */
248 |
249 |
250 |
251 |
252 |
--------------------------------------------------------------------------------
/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32l4xx_hal_spi_ex.c
4 | * @author MCD Application Team
5 | * @brief Extended SPI HAL module driver.
6 | * This file provides firmware functions to manage the following
7 | * SPI peripheral extended functionalities :
8 | * + IO operation functions
9 | *
10 | ******************************************************************************
11 | * @attention
12 | *
13 | * Copyright (c) 2017 STMicroelectronics.
14 | * All rights reserved.
15 | *
16 | * This software is licensed under terms that can be found in the LICENSE file
17 | * in the root directory of this software component.
18 | * If no LICENSE file comes with this software, it is provided AS-IS.
19 | *
20 | ******************************************************************************
21 | */
22 |
23 | /* Includes ------------------------------------------------------------------*/
24 | #include "stm32l4xx_hal.h"
25 |
26 | /** @addtogroup STM32L4xx_HAL_Driver
27 | * @{
28 | */
29 |
30 | /** @defgroup SPIEx SPIEx
31 | * @brief SPI Extended HAL module driver
32 | * @{
33 | */
34 | #ifdef HAL_SPI_MODULE_ENABLED
35 |
36 | /* Private typedef -----------------------------------------------------------*/
37 | /* Private defines -----------------------------------------------------------*/
38 | /** @defgroup SPIEx_Private_Constants SPIEx Private Constants
39 | * @{
40 | */
41 | #define SPI_FIFO_SIZE 4UL
42 | /**
43 | * @}
44 | */
45 |
46 | /* Private macros ------------------------------------------------------------*/
47 | /* Private variables ---------------------------------------------------------*/
48 | /* Private function prototypes -----------------------------------------------*/
49 | /* Exported functions --------------------------------------------------------*/
50 |
51 | /** @defgroup SPIEx_Exported_Functions SPIEx Exported Functions
52 | * @{
53 | */
54 |
55 | /** @defgroup SPIEx_Exported_Functions_Group1 IO operation functions
56 | * @brief Data transfers functions
57 | *
58 | @verbatim
59 | ==============================================================================
60 | ##### IO operation functions #####
61 | ===============================================================================
62 | [..]
63 | This subsection provides a set of extended functions to manage the SPI
64 | data transfers.
65 |
66 | (#) Rx data flush function:
67 | (++) HAL_SPIEx_FlushRxFifo()
68 |
69 | @endverbatim
70 | * @{
71 | */
72 |
73 | /**
74 | * @brief Flush the RX fifo.
75 | * @param hspi pointer to a SPI_HandleTypeDef structure that contains
76 | * the configuration information for the specified SPI module.
77 | * @retval HAL status
78 | */
79 | HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(SPI_HandleTypeDef *hspi)
80 | {
81 | __IO uint32_t tmpreg;
82 | uint8_t count = 0U;
83 | while ((hspi->Instance->SR & SPI_FLAG_FRLVL) != SPI_FRLVL_EMPTY)
84 | {
85 | count++;
86 | tmpreg = hspi->Instance->DR;
87 | UNUSED(tmpreg); /* To avoid GCC warning */
88 | if (count == SPI_FIFO_SIZE)
89 | {
90 | return HAL_TIMEOUT;
91 | }
92 | }
93 | return HAL_OK;
94 | }
95 |
96 | /**
97 | * @}
98 | */
99 |
100 | /**
101 | * @}
102 | */
103 |
104 | #endif /* HAL_SPI_MODULE_ENABLED */
105 |
106 | /**
107 | * @}
108 | */
109 |
110 | /**
111 | * @}
112 | */
113 |
--------------------------------------------------------------------------------
/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32l4xx_ll_exti.c
4 | * @author MCD Application Team
5 | * @brief EXTI LL module driver.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * Copyright (c) 2017 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software is licensed under terms that can be found in the LICENSE file
13 | * in the root directory of this software component.
14 | * If no LICENSE file comes with this software, it is provided AS-IS.
15 | *
16 | ******************************************************************************
17 | */
18 | #if defined(USE_FULL_LL_DRIVER)
19 |
20 | /* Includes ------------------------------------------------------------------*/
21 | #include "stm32l4xx_ll_exti.h"
22 | #ifdef USE_FULL_ASSERT
23 | #include "stm32_assert.h"
24 | #else
25 | #define assert_param(expr) ((void)0U)
26 | #endif
27 |
28 | /** @addtogroup STM32L4xx_LL_Driver
29 | * @{
30 | */
31 |
32 | #if defined (EXTI)
33 |
34 | /** @defgroup EXTI_LL EXTI
35 | * @{
36 | */
37 |
38 | /* Private types -------------------------------------------------------------*/
39 | /* Private variables ---------------------------------------------------------*/
40 | /* Private constants ---------------------------------------------------------*/
41 | /* Private macros ------------------------------------------------------------*/
42 | /** @addtogroup EXTI_LL_Private_Macros
43 | * @{
44 | */
45 |
46 | #define IS_LL_EXTI_LINE_0_31(__VALUE__) (((__VALUE__) & ~LL_EXTI_LINE_ALL_0_31) == 0x00000000U)
47 | #define IS_LL_EXTI_LINE_32_63(__VALUE__) (((__VALUE__) & ~LL_EXTI_LINE_ALL_32_63) == 0x00000000U)
48 |
49 | #define IS_LL_EXTI_MODE(__VALUE__) (((__VALUE__) == LL_EXTI_MODE_IT) \
50 | || ((__VALUE__) == LL_EXTI_MODE_EVENT) \
51 | || ((__VALUE__) == LL_EXTI_MODE_IT_EVENT))
52 |
53 |
54 | #define IS_LL_EXTI_TRIGGER(__VALUE__) (((__VALUE__) == LL_EXTI_TRIGGER_NONE) \
55 | || ((__VALUE__) == LL_EXTI_TRIGGER_RISING) \
56 | || ((__VALUE__) == LL_EXTI_TRIGGER_FALLING) \
57 | || ((__VALUE__) == LL_EXTI_TRIGGER_RISING_FALLING))
58 |
59 | /**
60 | * @}
61 | */
62 |
63 | /* Private function prototypes -----------------------------------------------*/
64 |
65 | /* Exported functions --------------------------------------------------------*/
66 | /** @addtogroup EXTI_LL_Exported_Functions
67 | * @{
68 | */
69 |
70 | /** @addtogroup EXTI_LL_EF_Init
71 | * @{
72 | */
73 |
74 | /**
75 | * @brief De-initialize the EXTI registers to their default reset values.
76 | * @retval An ErrorStatus enumeration value:
77 | * - 0x00: EXTI registers are de-initialized
78 | */
79 | uint32_t LL_EXTI_DeInit(void)
80 | {
81 | /* Interrupt mask register set to default reset values */
82 | LL_EXTI_WriteReg(IMR1, 0xFF820000U);
83 | /* Event mask register set to default reset values */
84 | LL_EXTI_WriteReg(EMR1, 0x00000000U);
85 | /* Rising Trigger selection register set to default reset values */
86 | LL_EXTI_WriteReg(RTSR1, 0x00000000U);
87 | /* Falling Trigger selection register set to default reset values */
88 | LL_EXTI_WriteReg(FTSR1, 0x00000000U);
89 | /* Software interrupt event register set to default reset values */
90 | LL_EXTI_WriteReg(SWIER1, 0x00000000U);
91 | /* Pending register clear */
92 | LL_EXTI_WriteReg(PR1, 0x007DFFFFU);
93 |
94 | /* Interrupt mask register 2 set to default reset values */
95 | #if defined(LL_EXTI_LINE_40)
96 | LL_EXTI_WriteReg(IMR2, 0x00000187U);
97 | #else
98 | LL_EXTI_WriteReg(IMR2, 0x00000087U);
99 | #endif
100 | /* Event mask register 2 set to default reset values */
101 | LL_EXTI_WriteReg(EMR2, 0x00000000U);
102 | /* Rising Trigger selection register 2 set to default reset values */
103 | LL_EXTI_WriteReg(RTSR2, 0x00000000U);
104 | /* Falling Trigger selection register 2 set to default reset values */
105 | LL_EXTI_WriteReg(FTSR2, 0x00000000U);
106 | /* Software interrupt event register 2 set to default reset values */
107 | LL_EXTI_WriteReg(SWIER2, 0x00000000U);
108 | /* Pending register 2 clear */
109 | LL_EXTI_WriteReg(PR2, 0x00000078U);
110 |
111 | return 0x00u;
112 | }
113 |
114 | /**
115 | * @brief Initialize the EXTI registers according to the specified parameters in EXTI_InitStruct.
116 | * @param EXTI_InitStruct pointer to a @ref LL_EXTI_InitTypeDef structure.
117 | * @retval An ErrorStatus enumeration value:
118 | * - 0x00: EXTI registers are initialized
119 | * - any other value : wrong configuration
120 | */
121 | uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct)
122 | {
123 | uint32_t status = 0x00u;
124 |
125 | /* Check the parameters */
126 | assert_param(IS_LL_EXTI_LINE_0_31(EXTI_InitStruct->Line_0_31));
127 | assert_param(IS_LL_EXTI_LINE_32_63(EXTI_InitStruct->Line_32_63));
128 | assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->LineCommand));
129 | assert_param(IS_LL_EXTI_MODE(EXTI_InitStruct->Mode));
130 |
131 | /* ENABLE LineCommand */
132 | if (EXTI_InitStruct->LineCommand != DISABLE)
133 | {
134 | assert_param(IS_LL_EXTI_TRIGGER(EXTI_InitStruct->Trigger));
135 |
136 | /* Configure EXTI Lines in range from 0 to 31 */
137 | if (EXTI_InitStruct->Line_0_31 != LL_EXTI_LINE_NONE)
138 | {
139 | switch (EXTI_InitStruct->Mode)
140 | {
141 | case LL_EXTI_MODE_IT:
142 | /* First Disable Event on provided Lines */
143 | LL_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31);
144 | /* Then Enable IT on provided Lines */
145 | LL_EXTI_EnableIT_0_31(EXTI_InitStruct->Line_0_31);
146 | break;
147 | case LL_EXTI_MODE_EVENT:
148 | /* First Disable IT on provided Lines */
149 | LL_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31);
150 | /* Then Enable Event on provided Lines */
151 | LL_EXTI_EnableEvent_0_31(EXTI_InitStruct->Line_0_31);
152 | break;
153 | case LL_EXTI_MODE_IT_EVENT:
154 | /* Directly Enable IT & Event on provided Lines */
155 | LL_EXTI_EnableIT_0_31(EXTI_InitStruct->Line_0_31);
156 | LL_EXTI_EnableEvent_0_31(EXTI_InitStruct->Line_0_31);
157 | break;
158 | default:
159 | status = 0x01u;
160 | break;
161 | }
162 | if (EXTI_InitStruct->Trigger != LL_EXTI_TRIGGER_NONE)
163 | {
164 | switch (EXTI_InitStruct->Trigger)
165 | {
166 | case LL_EXTI_TRIGGER_RISING:
167 | /* First Disable Falling Trigger on provided Lines */
168 | LL_EXTI_DisableFallingTrig_0_31(EXTI_InitStruct->Line_0_31);
169 | /* Then Enable Rising Trigger on provided Lines */
170 | LL_EXTI_EnableRisingTrig_0_31(EXTI_InitStruct->Line_0_31);
171 | break;
172 | case LL_EXTI_TRIGGER_FALLING:
173 | /* First Disable Rising Trigger on provided Lines */
174 | LL_EXTI_DisableRisingTrig_0_31(EXTI_InitStruct->Line_0_31);
175 | /* Then Enable Falling Trigger on provided Lines */
176 | LL_EXTI_EnableFallingTrig_0_31(EXTI_InitStruct->Line_0_31);
177 | break;
178 | case LL_EXTI_TRIGGER_RISING_FALLING:
179 | LL_EXTI_EnableRisingTrig_0_31(EXTI_InitStruct->Line_0_31);
180 | LL_EXTI_EnableFallingTrig_0_31(EXTI_InitStruct->Line_0_31);
181 | break;
182 | default:
183 | status |= 0x02u;
184 | break;
185 | }
186 | }
187 | }
188 | /* Configure EXTI Lines in range from 32 to 63 */
189 | if (EXTI_InitStruct->Line_32_63 != LL_EXTI_LINE_NONE)
190 | {
191 | switch (EXTI_InitStruct->Mode)
192 | {
193 | case LL_EXTI_MODE_IT:
194 | /* First Disable Event on provided Lines */
195 | LL_EXTI_DisableEvent_32_63(EXTI_InitStruct->Line_32_63);
196 | /* Then Enable IT on provided Lines */
197 | LL_EXTI_EnableIT_32_63(EXTI_InitStruct->Line_32_63);
198 | break;
199 | case LL_EXTI_MODE_EVENT:
200 | /* First Disable IT on provided Lines */
201 | LL_EXTI_DisableIT_32_63(EXTI_InitStruct->Line_32_63);
202 | /* Then Enable Event on provided Lines */
203 | LL_EXTI_EnableEvent_32_63(EXTI_InitStruct->Line_32_63);
204 | break;
205 | case LL_EXTI_MODE_IT_EVENT:
206 | /* Directly Enable IT & Event on provided Lines */
207 | LL_EXTI_EnableIT_32_63(EXTI_InitStruct->Line_32_63);
208 | LL_EXTI_EnableEvent_32_63(EXTI_InitStruct->Line_32_63);
209 | break;
210 | default:
211 | status |= 0x04u;
212 | break;
213 | }
214 | if (EXTI_InitStruct->Trigger != LL_EXTI_TRIGGER_NONE)
215 | {
216 | switch (EXTI_InitStruct->Trigger)
217 | {
218 | case LL_EXTI_TRIGGER_RISING:
219 | /* First Disable Falling Trigger on provided Lines */
220 | LL_EXTI_DisableFallingTrig_32_63(EXTI_InitStruct->Line_32_63);
221 | /* Then Enable IT on provided Lines */
222 | LL_EXTI_EnableRisingTrig_32_63(EXTI_InitStruct->Line_32_63);
223 | break;
224 | case LL_EXTI_TRIGGER_FALLING:
225 | /* First Disable Rising Trigger on provided Lines */
226 | LL_EXTI_DisableRisingTrig_32_63(EXTI_InitStruct->Line_32_63);
227 | /* Then Enable Falling Trigger on provided Lines */
228 | LL_EXTI_EnableFallingTrig_32_63(EXTI_InitStruct->Line_32_63);
229 | break;
230 | case LL_EXTI_TRIGGER_RISING_FALLING:
231 | LL_EXTI_EnableRisingTrig_32_63(EXTI_InitStruct->Line_32_63);
232 | LL_EXTI_EnableFallingTrig_32_63(EXTI_InitStruct->Line_32_63);
233 | break;
234 | default:
235 | status = ERROR;
236 | break;
237 | }
238 | }
239 | }
240 | }
241 | /* DISABLE LineCommand */
242 | else
243 | {
244 | /* De-configure EXTI Lines in range from 0 to 31 */
245 | LL_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31);
246 | LL_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31);
247 | /* De-configure EXTI Lines in range from 32 to 63 */
248 | LL_EXTI_DisableIT_32_63(EXTI_InitStruct->Line_32_63);
249 | LL_EXTI_DisableEvent_32_63(EXTI_InitStruct->Line_32_63);
250 | }
251 |
252 | return status;
253 | }
254 |
255 | /**
256 | * @brief Set each @ref LL_EXTI_InitTypeDef field to default value.
257 | * @param EXTI_InitStruct Pointer to a @ref LL_EXTI_InitTypeDef structure.
258 | * @retval None
259 | */
260 | void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct)
261 | {
262 | EXTI_InitStruct->Line_0_31 = LL_EXTI_LINE_NONE;
263 | EXTI_InitStruct->Line_32_63 = LL_EXTI_LINE_NONE;
264 | EXTI_InitStruct->LineCommand = DISABLE;
265 | EXTI_InitStruct->Mode = LL_EXTI_MODE_IT;
266 | EXTI_InitStruct->Trigger = LL_EXTI_TRIGGER_FALLING;
267 | }
268 |
269 | /**
270 | * @}
271 | */
272 |
273 | /**
274 | * @}
275 | */
276 |
277 | /**
278 | * @}
279 | */
280 |
281 | #endif /* defined (EXTI) */
282 |
283 | /**
284 | * @}
285 | */
286 |
287 | #endif /* USE_FULL_LL_DRIVER */
288 |
289 |
--------------------------------------------------------------------------------
/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32l4xx_ll_gpio.c
4 | * @author MCD Application Team
5 | * @brief GPIO LL module driver.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * Copyright (c) 2017 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software is licensed under terms that can be found in the LICENSE file
13 | * in the root directory of this software component.
14 | * If no LICENSE file comes with this software, it is provided AS-IS.
15 | *
16 | ******************************************************************************
17 | */
18 | #if defined(USE_FULL_LL_DRIVER)
19 |
20 | /* Includes ------------------------------------------------------------------*/
21 | #include "stm32l4xx_ll_gpio.h"
22 | #include "stm32l4xx_ll_bus.h"
23 | #ifdef USE_FULL_ASSERT
24 | #include "stm32_assert.h"
25 | #else
26 | #define assert_param(expr) ((void)0U)
27 | #endif
28 |
29 | /** @addtogroup STM32L4xx_LL_Driver
30 | * @{
31 | */
32 |
33 | #if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) || defined (GPIOH) || defined (GPIOI)
34 |
35 | /** @addtogroup GPIO_LL
36 | * @{
37 | */
38 | /** MISRA C:2012 deviation rule has been granted for following rules:
39 | * Rule-12.2 - Medium: RHS argument is in interval [0,INF] which is out of
40 | * range of the shift operator in following API :
41 | * LL_GPIO_Init
42 | */
43 |
44 | /* Private types -------------------------------------------------------------*/
45 | /* Private variables ---------------------------------------------------------*/
46 | /* Private constants ---------------------------------------------------------*/
47 | /* Private macros ------------------------------------------------------------*/
48 | /** @addtogroup GPIO_LL_Private_Macros
49 | * @{
50 | */
51 | #define IS_LL_GPIO_PIN(__VALUE__) (((0x00u) < (__VALUE__)) && ((__VALUE__) <= (LL_GPIO_PIN_ALL)))
52 |
53 | #define IS_LL_GPIO_MODE(__VALUE__) (((__VALUE__) == LL_GPIO_MODE_INPUT) ||\
54 | ((__VALUE__) == LL_GPIO_MODE_OUTPUT) ||\
55 | ((__VALUE__) == LL_GPIO_MODE_ALTERNATE) ||\
56 | ((__VALUE__) == LL_GPIO_MODE_ANALOG))
57 |
58 | #define IS_LL_GPIO_OUTPUT_TYPE(__VALUE__) (((__VALUE__) == LL_GPIO_OUTPUT_PUSHPULL) ||\
59 | ((__VALUE__) == LL_GPIO_OUTPUT_OPENDRAIN))
60 |
61 | #define IS_LL_GPIO_SPEED(__VALUE__) (((__VALUE__) == LL_GPIO_SPEED_FREQ_LOW) ||\
62 | ((__VALUE__) == LL_GPIO_SPEED_FREQ_MEDIUM) ||\
63 | ((__VALUE__) == LL_GPIO_SPEED_FREQ_HIGH) ||\
64 | ((__VALUE__) == LL_GPIO_SPEED_FREQ_VERY_HIGH))
65 |
66 | #define IS_LL_GPIO_PULL(__VALUE__) (((__VALUE__) == LL_GPIO_PULL_NO) ||\
67 | ((__VALUE__) == LL_GPIO_PULL_UP) ||\
68 | ((__VALUE__) == LL_GPIO_PULL_DOWN))
69 |
70 | #define IS_LL_GPIO_ALTERNATE(__VALUE__) (((__VALUE__) == LL_GPIO_AF_0 ) ||\
71 | ((__VALUE__) == LL_GPIO_AF_1 ) ||\
72 | ((__VALUE__) == LL_GPIO_AF_2 ) ||\
73 | ((__VALUE__) == LL_GPIO_AF_3 ) ||\
74 | ((__VALUE__) == LL_GPIO_AF_4 ) ||\
75 | ((__VALUE__) == LL_GPIO_AF_5 ) ||\
76 | ((__VALUE__) == LL_GPIO_AF_6 ) ||\
77 | ((__VALUE__) == LL_GPIO_AF_7 ) ||\
78 | ((__VALUE__) == LL_GPIO_AF_8 ) ||\
79 | ((__VALUE__) == LL_GPIO_AF_9 ) ||\
80 | ((__VALUE__) == LL_GPIO_AF_10 ) ||\
81 | ((__VALUE__) == LL_GPIO_AF_11 ) ||\
82 | ((__VALUE__) == LL_GPIO_AF_12 ) ||\
83 | ((__VALUE__) == LL_GPIO_AF_13 ) ||\
84 | ((__VALUE__) == LL_GPIO_AF_14 ) ||\
85 | ((__VALUE__) == LL_GPIO_AF_15 ))
86 | /**
87 | * @}
88 | */
89 |
90 | /* Private function prototypes -----------------------------------------------*/
91 |
92 | /* Exported functions --------------------------------------------------------*/
93 | /** @addtogroup GPIO_LL_Exported_Functions
94 | * @{
95 | */
96 |
97 | /** @addtogroup GPIO_LL_EF_Init
98 | * @{
99 | */
100 |
101 | /**
102 | * @brief De-initialize GPIO registers (Registers restored to their default values).
103 | * @param GPIOx GPIO Port
104 | * @retval An ErrorStatus enumeration value:
105 | * - SUCCESS: GPIO registers are de-initialized
106 | * - ERROR: Wrong GPIO Port
107 | */
108 | ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx)
109 | {
110 | ErrorStatus status = SUCCESS;
111 |
112 | /* Check the parameters */
113 | assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
114 |
115 | /* Force and Release reset on clock of GPIOx Port */
116 | if (GPIOx == GPIOA)
117 | {
118 | LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOA);
119 | LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOA);
120 | }
121 | else if (GPIOx == GPIOB)
122 | {
123 | LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOB);
124 | LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOB);
125 | }
126 | else if (GPIOx == GPIOC)
127 | {
128 | LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOC);
129 | LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOC);
130 | }
131 | #if defined(GPIOD)
132 | else if (GPIOx == GPIOD)
133 | {
134 | LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOD);
135 | LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOD);
136 | }
137 | #endif /* GPIOD */
138 | #if defined(GPIOE)
139 | else if (GPIOx == GPIOE)
140 | {
141 | LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOE);
142 | LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOE);
143 | }
144 | #endif /* GPIOE */
145 | #if defined(GPIOF)
146 | else if (GPIOx == GPIOF)
147 | {
148 | LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOF);
149 | LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOF);
150 | }
151 | #endif /* GPIOF */
152 | #if defined(GPIOG)
153 | else if (GPIOx == GPIOG)
154 | {
155 | LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOG);
156 | LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOG);
157 | }
158 | #endif /* GPIOG */
159 | #if defined(GPIOH)
160 | else if (GPIOx == GPIOH)
161 | {
162 | LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOH);
163 | LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOH);
164 | }
165 | #endif /* GPIOH */
166 | #if defined(GPIOI)
167 | else if (GPIOx == GPIOI)
168 | {
169 | LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOI);
170 | LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOI);
171 | }
172 | #endif /* GPIOI */
173 | else
174 | {
175 | status = ERROR;
176 | }
177 |
178 | return (status);
179 | }
180 |
181 | /**
182 | * @brief Initialize GPIO registers according to the specified parameters in GPIO_InitStruct.
183 | * @param GPIOx GPIO Port
184 | * @param GPIO_InitStruct pointer to a @ref LL_GPIO_InitTypeDef structure
185 | * that contains the configuration information for the specified GPIO peripheral.
186 | * @retval An ErrorStatus enumeration value:
187 | * - SUCCESS: GPIO registers are initialized according to GPIO_InitStruct content
188 | * - ERROR: Not applicable
189 | */
190 | ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct)
191 | {
192 | uint32_t pinpos;
193 | uint32_t currentpin;
194 |
195 | /* Check the parameters */
196 | assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
197 | assert_param(IS_LL_GPIO_PIN(GPIO_InitStruct->Pin));
198 | assert_param(IS_LL_GPIO_MODE(GPIO_InitStruct->Mode));
199 | assert_param(IS_LL_GPIO_PULL(GPIO_InitStruct->Pull));
200 |
201 | /* ------------------------- Configure the port pins ---------------- */
202 | /* Initialize pinpos on first pin set */
203 | pinpos = POSITION_VAL(GPIO_InitStruct->Pin);
204 |
205 | /* Configure the port pins */
206 | while (((GPIO_InitStruct->Pin) >> pinpos) != 0x00u)
207 | {
208 | /* Get current io position */
209 | currentpin = (GPIO_InitStruct->Pin) & (0x00000001uL << pinpos);
210 |
211 | if (currentpin != 0x00u)
212 | {
213 | if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE))
214 | {
215 | /* Check Speed mode parameters */
216 | assert_param(IS_LL_GPIO_SPEED(GPIO_InitStruct->Speed));
217 |
218 | /* Speed mode configuration */
219 | LL_GPIO_SetPinSpeed(GPIOx, currentpin, GPIO_InitStruct->Speed);
220 |
221 | /* Check Output mode parameters */
222 | assert_param(IS_LL_GPIO_OUTPUT_TYPE(GPIO_InitStruct->OutputType));
223 |
224 | /* Output mode configuration*/
225 | LL_GPIO_SetPinOutputType(GPIOx, GPIO_InitStruct->Pin, GPIO_InitStruct->OutputType);
226 | }
227 |
228 | /* Pull-up Pull down resistor configuration*/
229 | LL_GPIO_SetPinPull(GPIOx, currentpin, GPIO_InitStruct->Pull);
230 |
231 | if (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE)
232 | {
233 | /* Check Alternate parameter */
234 | assert_param(IS_LL_GPIO_ALTERNATE(GPIO_InitStruct->Alternate));
235 |
236 | /* Speed mode configuration */
237 | if (currentpin < LL_GPIO_PIN_8)
238 | {
239 | LL_GPIO_SetAFPin_0_7(GPIOx, currentpin, GPIO_InitStruct->Alternate);
240 | }
241 | else
242 | {
243 | LL_GPIO_SetAFPin_8_15(GPIOx, currentpin, GPIO_InitStruct->Alternate);
244 | }
245 | }
246 |
247 | /* Pin Mode configuration */
248 | LL_GPIO_SetPinMode(GPIOx, currentpin, GPIO_InitStruct->Mode);
249 | }
250 | pinpos++;
251 | }
252 |
253 | return (SUCCESS);
254 | }
255 |
256 | /**
257 | * @brief Set each @ref LL_GPIO_InitTypeDef field to default value.
258 | * @param GPIO_InitStruct pointer to a @ref LL_GPIO_InitTypeDef structure
259 | * whose fields will be set to default values.
260 | * @retval None
261 | */
262 |
263 | void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct)
264 | {
265 | /* Reset GPIO init structure parameters values */
266 | GPIO_InitStruct->Pin = LL_GPIO_PIN_ALL;
267 | GPIO_InitStruct->Mode = LL_GPIO_MODE_ANALOG;
268 | GPIO_InitStruct->Speed = LL_GPIO_SPEED_FREQ_LOW;
269 | GPIO_InitStruct->OutputType = LL_GPIO_OUTPUT_PUSHPULL;
270 | GPIO_InitStruct->Pull = LL_GPIO_PULL_NO;
271 | GPIO_InitStruct->Alternate = LL_GPIO_AF_0;
272 | }
273 |
274 | /**
275 | * @}
276 | */
277 |
278 | /**
279 | * @}
280 | */
281 |
282 | /**
283 | * @}
284 | */
285 |
286 | #endif /* defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) || defined (GPIOH) || defined (GPIOI) */
287 |
288 | /**
289 | * @}
290 | */
291 |
292 | #endif /* USE_FULL_LL_DRIVER */
293 |
294 |
--------------------------------------------------------------------------------
/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_i2c.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32l4xx_ll_i2c.c
4 | * @author MCD Application Team
5 | * @brief I2C LL module driver.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * Copyright (c) 2017 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software is licensed under terms that can be found in the LICENSE file
13 | * in the root directory of this software component.
14 | * If no LICENSE file comes with this software, it is provided AS-IS.
15 | *
16 | ******************************************************************************
17 | */
18 | #if defined(USE_FULL_LL_DRIVER)
19 |
20 | /* Includes ------------------------------------------------------------------*/
21 | #include "stm32l4xx_ll_i2c.h"
22 | #include "stm32l4xx_ll_bus.h"
23 | #ifdef USE_FULL_ASSERT
24 | #include "stm32_assert.h"
25 | #else
26 | #define assert_param(expr) ((void)0U)
27 | #endif /* USE_FULL_ASSERT */
28 |
29 | /** @addtogroup STM32L4xx_LL_Driver
30 | * @{
31 | */
32 |
33 | #if defined (I2C1) || defined (I2C2) || defined (I2C3) || defined (I2C4)
34 |
35 | /** @defgroup I2C_LL I2C
36 | * @{
37 | */
38 |
39 | /* Private types -------------------------------------------------------------*/
40 | /* Private variables ---------------------------------------------------------*/
41 | /* Private constants ---------------------------------------------------------*/
42 | /* Private macros ------------------------------------------------------------*/
43 | /** @addtogroup I2C_LL_Private_Macros
44 | * @{
45 | */
46 |
47 | #define IS_LL_I2C_PERIPHERAL_MODE(__VALUE__) (((__VALUE__) == LL_I2C_MODE_I2C) || \
48 | ((__VALUE__) == LL_I2C_MODE_SMBUS_HOST) || \
49 | ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE) || \
50 | ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE_ARP))
51 |
52 | #define IS_LL_I2C_ANALOG_FILTER(__VALUE__) (((__VALUE__) == LL_I2C_ANALOGFILTER_ENABLE) || \
53 | ((__VALUE__) == LL_I2C_ANALOGFILTER_DISABLE))
54 |
55 | #define IS_LL_I2C_DIGITAL_FILTER(__VALUE__) ((__VALUE__) <= 0x0000000FU)
56 |
57 | #define IS_LL_I2C_OWN_ADDRESS1(__VALUE__) ((__VALUE__) <= 0x000003FFU)
58 |
59 | #define IS_LL_I2C_TYPE_ACKNOWLEDGE(__VALUE__) (((__VALUE__) == LL_I2C_ACK) || \
60 | ((__VALUE__) == LL_I2C_NACK))
61 |
62 | #define IS_LL_I2C_OWN_ADDRSIZE(__VALUE__) (((__VALUE__) == LL_I2C_OWNADDRESS1_7BIT) || \
63 | ((__VALUE__) == LL_I2C_OWNADDRESS1_10BIT))
64 | /**
65 | * @}
66 | */
67 |
68 | /* Private function prototypes -----------------------------------------------*/
69 |
70 | /* Exported functions --------------------------------------------------------*/
71 | /** @addtogroup I2C_LL_Exported_Functions
72 | * @{
73 | */
74 |
75 | /** @addtogroup I2C_LL_EF_Init
76 | * @{
77 | */
78 |
79 | /**
80 | * @brief De-initialize the I2C registers to their default reset values.
81 | * @param I2Cx I2C Instance.
82 | * @retval An ErrorStatus enumeration value:
83 | * - SUCCESS: I2C registers are de-initialized
84 | * - ERROR: I2C registers are not de-initialized
85 | */
86 | ErrorStatus LL_I2C_DeInit(I2C_TypeDef *I2Cx)
87 | {
88 | ErrorStatus status = SUCCESS;
89 |
90 | /* Check the I2C Instance I2Cx */
91 | assert_param(IS_I2C_ALL_INSTANCE(I2Cx));
92 |
93 | if (I2Cx == I2C1)
94 | {
95 | /* Force reset of I2C clock */
96 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C1);
97 |
98 | /* Release reset of I2C clock */
99 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C1);
100 | }
101 | #if defined(I2C2)
102 | else if (I2Cx == I2C2)
103 | {
104 | /* Force reset of I2C clock */
105 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C2);
106 |
107 | /* Release reset of I2C clock */
108 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C2);
109 |
110 | }
111 | #endif /* I2C2 */
112 | else if (I2Cx == I2C3)
113 | {
114 | /* Force reset of I2C clock */
115 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C3);
116 |
117 | /* Release reset of I2C clock */
118 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C3);
119 | }
120 | #if defined(I2C4)
121 | else if (I2Cx == I2C4)
122 | {
123 | /* Force reset of I2C clock */
124 | LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_I2C4);
125 |
126 | /* Release reset of I2C clock */
127 | LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_I2C4);
128 | }
129 | #endif /* I2C4 */
130 | else
131 | {
132 | status = ERROR;
133 | }
134 |
135 | return status;
136 | }
137 |
138 | /**
139 | * @brief Initialize the I2C registers according to the specified parameters in I2C_InitStruct.
140 | * @param I2Cx I2C Instance.
141 | * @param I2C_InitStruct pointer to a @ref LL_I2C_InitTypeDef structure.
142 | * @retval An ErrorStatus enumeration value:
143 | * - SUCCESS: I2C registers are initialized
144 | * - ERROR: Not applicable
145 | */
146 | ErrorStatus LL_I2C_Init(I2C_TypeDef *I2Cx, LL_I2C_InitTypeDef *I2C_InitStruct)
147 | {
148 | /* Check the I2C Instance I2Cx */
149 | assert_param(IS_I2C_ALL_INSTANCE(I2Cx));
150 |
151 | /* Check the I2C parameters from I2C_InitStruct */
152 | assert_param(IS_LL_I2C_PERIPHERAL_MODE(I2C_InitStruct->PeripheralMode));
153 | assert_param(IS_LL_I2C_ANALOG_FILTER(I2C_InitStruct->AnalogFilter));
154 | assert_param(IS_LL_I2C_DIGITAL_FILTER(I2C_InitStruct->DigitalFilter));
155 | assert_param(IS_LL_I2C_OWN_ADDRESS1(I2C_InitStruct->OwnAddress1));
156 | assert_param(IS_LL_I2C_TYPE_ACKNOWLEDGE(I2C_InitStruct->TypeAcknowledge));
157 | assert_param(IS_LL_I2C_OWN_ADDRSIZE(I2C_InitStruct->OwnAddrSize));
158 |
159 | /* Disable the selected I2Cx Peripheral */
160 | LL_I2C_Disable(I2Cx);
161 |
162 | /*---------------------------- I2Cx CR1 Configuration ------------------------
163 | * Configure the analog and digital noise filters with parameters :
164 | * - AnalogFilter: I2C_CR1_ANFOFF bit
165 | * - DigitalFilter: I2C_CR1_DNF[3:0] bits
166 | */
167 | LL_I2C_ConfigFilters(I2Cx, I2C_InitStruct->AnalogFilter, I2C_InitStruct->DigitalFilter);
168 |
169 | /*---------------------------- I2Cx TIMINGR Configuration --------------------
170 | * Configure the SDA setup, hold time and the SCL high, low period with parameter :
171 | * - Timing: I2C_TIMINGR_PRESC[3:0], I2C_TIMINGR_SCLDEL[3:0], I2C_TIMINGR_SDADEL[3:0],
172 | * I2C_TIMINGR_SCLH[7:0] and I2C_TIMINGR_SCLL[7:0] bits
173 | */
174 | LL_I2C_SetTiming(I2Cx, I2C_InitStruct->Timing);
175 |
176 | /* Enable the selected I2Cx Peripheral */
177 | LL_I2C_Enable(I2Cx);
178 |
179 | /*---------------------------- I2Cx OAR1 Configuration -----------------------
180 | * Disable, Configure and Enable I2Cx device own address 1 with parameters :
181 | * - OwnAddress1: I2C_OAR1_OA1[9:0] bits
182 | * - OwnAddrSize: I2C_OAR1_OA1MODE bit
183 | */
184 | LL_I2C_DisableOwnAddress1(I2Cx);
185 | LL_I2C_SetOwnAddress1(I2Cx, I2C_InitStruct->OwnAddress1, I2C_InitStruct->OwnAddrSize);
186 |
187 | /* OwnAdress1 == 0 is reserved for General Call address */
188 | if (I2C_InitStruct->OwnAddress1 != 0U)
189 | {
190 | LL_I2C_EnableOwnAddress1(I2Cx);
191 | }
192 |
193 | /*---------------------------- I2Cx MODE Configuration -----------------------
194 | * Configure I2Cx peripheral mode with parameter :
195 | * - PeripheralMode: I2C_CR1_SMBDEN and I2C_CR1_SMBHEN bits
196 | */
197 | LL_I2C_SetMode(I2Cx, I2C_InitStruct->PeripheralMode);
198 |
199 | /*---------------------------- I2Cx CR2 Configuration ------------------------
200 | * Configure the ACKnowledge or Non ACKnowledge condition
201 | * after the address receive match code or next received byte with parameter :
202 | * - TypeAcknowledge: I2C_CR2_NACK bit
203 | */
204 | LL_I2C_AcknowledgeNextData(I2Cx, I2C_InitStruct->TypeAcknowledge);
205 |
206 | return SUCCESS;
207 | }
208 |
209 | /**
210 | * @brief Set each @ref LL_I2C_InitTypeDef field to default value.
211 | * @param I2C_InitStruct Pointer to a @ref LL_I2C_InitTypeDef structure.
212 | * @retval None
213 | */
214 | void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct)
215 | {
216 | /* Set I2C_InitStruct fields to default values */
217 | I2C_InitStruct->PeripheralMode = LL_I2C_MODE_I2C;
218 | I2C_InitStruct->Timing = 0U;
219 | I2C_InitStruct->AnalogFilter = LL_I2C_ANALOGFILTER_ENABLE;
220 | I2C_InitStruct->DigitalFilter = 0U;
221 | I2C_InitStruct->OwnAddress1 = 0U;
222 | I2C_InitStruct->TypeAcknowledge = LL_I2C_NACK;
223 | I2C_InitStruct->OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT;
224 | }
225 |
226 | /**
227 | * @}
228 | */
229 |
230 | /**
231 | * @}
232 | */
233 |
234 | /**
235 | * @}
236 | */
237 |
238 | #endif /* I2C1 || I2C2 || I2C3 || I2C4 */
239 |
240 | /**
241 | * @}
242 | */
243 |
244 | #endif /* USE_FULL_LL_DRIVER */
245 |
--------------------------------------------------------------------------------
/README.md:
--------------------------------------------------------------------------------
1 | # profibus_DP_PA_soft
2 | profibus DP and PA protocol stacks based on MCU.
3 |
4 | 1、协议栈基于cortex-M4 GD32F30x、STM32L系列实现，协议栈和用户应用程序可共享一颗MCU资源。
5 | 2、协议栈占用FLASH小于48K，RAM占用小于12K，占用一个UART、TIMER、I2C资源。
6 | 3、支持DPV0 、DPV1 、PA全部功能，支持自适应波特率，STM32系列最大波特率3Mbps。基于此可开发DP 从站、冗余从站、PA设备、PROFIsafe设备。
7 | 4、你可以试用Releaselib/libdppa.a,但不得修改、商用，如有需要联系作者。
8 | 5、如需demo硬件、移植到其它平台、更详尽资料请联系作者. email: xuji.zhao@foxmail.com , Wechat: fredzxj。
9 |
10 | ## DP-V1 demo 介绍
11 |
12 | 该Demo模拟了一个恒温控制从站,功能说明如下。
13 |
14 | 从站为模块化DP-V1从站（逻辑的）。
15 |
16 | - 模块1：具备实时采集环境温度（int16_t）,模拟输入AI，温度值实时返回给主控器PLC，16位温度值定义： 实际温度扩大100倍. (int16_t) temp_trans = (int16_t)((float)temp * 100.0) 。如10.01℃ ，用十进制 1001 表示。；
17 |
18 | - 模块2：具备加热制冷状态开关监测，并将状态实时反馈给主控器PLC，数字输入DI， bit 0 : 加热开关状态，0 关闭，1 开启；bit 1: 制冷开关状态，0 关闭，1 开启。
19 |
20 | - 模块3：具备对加热制冷设备控制驱动能力，控制信号来自主控PLC，数字输出DO，bit 4 : 加热开关控制，0 关闭，1 开启；bit 5: 制冷开关控制，0 关闭，1 开启。
21 |
22 | 主控PLC根据从站的温度值和当前加热制冷控制状态，完成PID控制算法运算后，响从站发出加热或制冷控制指令。
23 |
24 | 从站具备温度超温和低温报警功能，最低下限-40℃，最高上限80℃。
25 |
26 | ### 从站资源定义
27 |
28 | #### 从站IO定义
29 |
30 | | 模块号 | 资源定义 | 配置标识字 |
31 | | :----: | :----: | :----: |
32 | | slot 1 | 温度值AI,2字节 | 0x50 |
33 | | slot 2 | 控制状态DI,1字节 | 0x10 |
34 | | slot 3 | 控制信号DO,1字节 | 0x20 |
35 |
36 | #### 从站参数定义
37 |
38 | | 模块号 | 资源定义 | 参数标识字(偏移) |
39 | | :----: | :----: | :----: |
40 | | slot 1 | 温度值上限,2字节，举例：80 ℃，取值：8000 | 0x1F 0x40 (11) |
41 | | slot 1 | 温度值下限,2字节，举例：-40 ℃，取值：-4000 | 0xF0 0X60 (13) |
42 | | slot 3 | 控制信号使能,1字节，bit4:加热，bit5:制冷 | 0x03 (15) |
43 |
44 | #### 从站报警定义
45 |
46 | | 模块号 | 资源定义 | 报警标识字(偏移) |
47 | | :----: | :----: | :----: |
48 | | slot 1 | 温度超上限,用户字段3字节，出现 | 0x06 0x01 0x01 0x05 0x01 0x1F 0x43(7)|
49 | | slot 1 | 温度超上限,用户字段3字节，消失 | 0x06 0x01 0x01 0x06 0x00 0x1F 0x00(7)|
50 | | slot 1 | 温度超下限,用户字段3字节，出现 | 0x06 0x01 0x01 0x05 0x02 0xF0 0X68(7)|
51 | | slot 1 | 温度超下限,用户字段3字节，消失 | 0x06 0x01 0x01 0x06 0x00 0xF0 0x00(7)|
52 |
53 | #### 从站DPV1支持
54 | 可通过DPV1的非周期性读写功能实现如下功能：
55 | - 重设从站参数
56 | - 设备I&M，I&M功能的主要目的是识别设备，并在设备生命周期的各种场景中提供附加信息，如配置、调试、参数化、诊断、维护、修复、固件更新、资产管理、审计跟踪等，以支持终端用户。
57 |
58 | | 模块号 | 索引 | 资源定义 |
59 | | :----: | :----: |:----: |
60 | | slot 1 | index 2 | 温度值上限,RW |
61 | | slot 1 | index 3 | 温度值下限,RW |
62 | | slot 2 | index 2 | 控制信号使能,RW |
63 | | slot 0 |index 255 | I&M ,RW |
64 | | slot 0 |index 240 | 固件下载 ,MSAC2_Doata_Transport |
65 | | slot 0 |index 241 | 固件信息获取 ,RO |
66 | | slot 0 |index 242 | 固件信息更新 ,MSAC2_Doata_Transport |
67 | | slot 0 |index 243 | 执行固件升级 ,WO |
68 |
69 | ### 操作指南
--------------------------------------------------------------------------------
/RTT/platformDebug.h:
--------------------------------------------------------------------------------
1 | /*
2 | *
3 | */
4 | #ifndef __PLATFORM_DEBUG_H__
5 | #define __PLATFORM_DEBUG_H__
6 |
7 | #include "platformDebugOpt.h"
8 | #include
9 | #include
10 | #include
11 | #include "SEGGER_RTT.h"
12 |
13 |
14 | #define PLTF_DEBUG
15 | #define PLTF_ENABLE_SMALL_PRINTF 1
16 |
17 | #define MAX_PRINT_STR_SIZE (128)
18 |
19 | /** lower two bits indicate debug level
20 | * - 0 all
21 | * - 1 warning
22 | * - 2 serious
23 | * - 3 severe
24 | */
25 | #define PLTF_DBG_LEVEL_ALL 0x00
26 | #define PLTF_DBG_LEVEL_OFF PLTF_DBG_LEVEL_ALL /* compatibility define only */
27 | #define PLTF_DBG_LEVEL_WARNING 0x01 /* bad checksums, dropped packets, ... */
28 | #define PLTF_DBG_LEVEL_SERIOUS 0x02 /* memory allocation failures, ... */
29 | #define PLTF_DBG_LEVEL_SEVERE 0x03
30 | #define PLTF_DBG_MASK_LEVEL 0x03
31 |
32 | //API
33 | #if 0
34 | #define dbg_warning(format,...)
35 | #define dbg_infor(format,...)
36 | #define dbg_infor_(format,...)
37 | #define dbg_error(format,...)
38 | #define dbg_infor_ble(format,...)
39 | #else
40 | #define dbg_warning(format,...) SEGGER_RTT_printf(0,RTT_CTRL_TEXT_BRIGHT_YELLOW"warning: "format""RTT_CTRL_RESET"\r\n", ##__VA_ARGS__)
41 | #define dbg_infor(format,...) SEGGER_RTT_printf(0,"\ninfor: "format"\r\n", ##__VA_ARGS__)
42 | #define dbg_infor_(format,...) SEGGER_RTT_printf(0,""format" ", ##__VA_ARGS__)
43 | #define dbg_error(format,...) do { \
44 | SEGGER_RTT_printf(0,RTT_CTRL_TEXT_BRIGHT_RED"error: "format""RTT_CTRL_RESET"\r\n", ##__VA_ARGS__); \
45 | } while(1)
46 | #endif
47 | #endif /* __PLTF_DEBUG_H__ */
48 |
49 |
--------------------------------------------------------------------------------
/RTT/platformDebugOpt.h:
--------------------------------------------------------------------------------
1 | /*
2 | * platformDebugOpt.h
3 | *
4 | * Created on: 2014��9��13��
5 | * Author: zhaoxuji-pc
6 | */
7 |
8 | #ifndef PLATFORMDEBUGOPT_H_
9 | #define PLATFORMDEBUGOPT_H_
10 |
11 |
12 | //#define PLTF_DECL_PROTECT(x) OS_CPU_SR cpu_sr
13 | //#define PLTF_PROTECT(x) OS_ENTER_CRITICAL()
14 | //#define PLTF_UNPROTECT(x) OS_EXIT_CRITICAL()
15 |
16 | #endif /* PLATFORMDEBUGOPT_H_ */
17 |
--------------------------------------------------------------------------------
/Releaselib/libdppa.a:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/zhaoxuji/profibus_DP_PA_soft/81433ded7c8ebc38731fc8f2e9abda4761f4058b/Releaselib/libdppa.a
--------------------------------------------------------------------------------
/STM32L431RCTX_FLASH.ld:
--------------------------------------------------------------------------------
1 | /*
2 | ******************************************************************************
3 | **
4 | ** @file : LinkerScript.ld
5 | **
6 | ** @author : Auto-generated by STM32CubeIDE
7 | **
8 | ** @brief : Linker script for STM32L431RCTx Device from STM32L4 series
9 | ** 256Kbytes FLASH
10 | ** 64Kbytes RAM
11 | ** 16Kbytes RAM2
12 | **
13 | ** Set heap size, stack size and stack location according
14 | ** to application requirements.
15 | **
16 | ** Set memory bank area and size if external memory is used
17 | **
18 | ** Target : STMicroelectronics STM32
19 | **
20 | ** Distribution: The file is distributed as is, without any warranty
21 | ** of any kind.
22 | **
23 | ******************************************************************************
24 | ** @attention
25 | **
26 | ** Copyright (c) 2022 STMicroelectronics.
27 | ** All rights reserved.
28 | **
29 | ** This software is licensed under terms that can be found in the LICENSE file
30 | ** in the root directory of this software component.
31 | ** If no LICENSE file comes with this software, it is provided AS-IS.
32 | **
33 | ******************************************************************************
34 | */
35 |
36 | /* Entry Point */
37 | ENTRY(Reset_Handler)
38 |
39 | /* Highest address of the user mode stack */
40 | _estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
41 |
42 | _Min_Heap_Size = 0x200 ; /* required amount of heap */
43 | _Min_Stack_Size = 0x400 ; /* required amount of stack */
44 |
45 | /* Memories definition */
46 | MEMORY
47 | {
48 | RAM2 (xrw) : ORIGIN = 0x10000000, LENGTH = 16K
49 |
50 | FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 100K
51 | FLASH_DP (rx) : ORIGIN = 0x08000000+100K , LENGTH = 192K
52 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K
53 | RAM_DP (xrw) : ORIGIN = 0x20000000+32K, LENGTH = 32K
54 | }
55 |
56 | /* Sections */
57 | SECTIONS
58 | {
59 | /* The startup code into "FLASH" Rom type memory */
60 | .isr_vector :
61 | {
62 | . = ALIGN(4);
63 | KEEP(*(.isr_vector)) /* Startup code */
64 | . = ALIGN(4);
65 | } >FLASH
66 |
67 | .DPtext :
68 | {
69 | . = ALIGN(4);
70 | __DPtext_Start = .;
71 | KEEP(*(.ExportFunctions))
72 | ./stack/*.o(.text*)
73 | ./stack/*.o(.rodata*)
74 | ./stack/*.o(.ARM.attributes)
75 | . = ALIGN(4);
76 | __DPtext_End = .;
77 | __DPtext_Size = __DPtext_End - __DPtext_Start;
78 | } >FLASH_DP
79 |
80 | /* The program code and other data into "FLASH" Rom type memory */
81 | .text :
82 | {
83 | . = ALIGN(4);
84 | *(.text) /* .text sections (code) */
85 | *(.text*) /* .text* sections (code) */
86 | *(.glue_7) /* glue arm to thumb code */
87 | *(.glue_7t) /* glue thumb to arm code */
88 | *(.eh_frame)
89 |
90 | KEEP (*(.init))
91 | KEEP (*(.fini))
92 |
93 | . = ALIGN(4);
94 | _etext = .; /* define a global symbols at end of code */
95 | } >FLASH
96 |
97 | /* Constant data into "FLASH" Rom type memory */
98 | .rodata :
99 | {
100 | . = ALIGN(4);
101 | *(.rodata) /* .rodata sections (constants, strings, etc.) */
102 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
103 | . = ALIGN(4);
104 | } >FLASH
105 |
106 | .ARM.extab : {
107 | . = ALIGN(4);
108 | *(.ARM.extab* .gnu.linkonce.armextab.*)
109 | . = ALIGN(4);
110 | } >FLASH
111 |
112 | .ARM : {
113 | . = ALIGN(4);
114 | __exidx_start = .;
115 | *(.ARM.exidx*)
116 | __exidx_end = .;
117 | . = ALIGN(4);
118 | } >FLASH
119 |
120 | .preinit_array :
121 | {
122 | . = ALIGN(4);
123 | PROVIDE_HIDDEN (__preinit_array_start = .);
124 | KEEP (*(.preinit_array*))
125 | PROVIDE_HIDDEN (__preinit_array_end = .);
126 | . = ALIGN(4);
127 | } >FLASH
128 |
129 | .init_array :
130 | {
131 | . = ALIGN(4);
132 | PROVIDE_HIDDEN (__init_array_start = .);
133 | KEEP (*(SORT(.init_array.*)))
134 | KEEP (*(.init_array*))
135 | PROVIDE_HIDDEN (__init_array_end = .);
136 | . = ALIGN(4);
137 | } >FLASH
138 |
139 | .fini_array :
140 | {
141 | . = ALIGN(4);
142 | PROVIDE_HIDDEN (__fini_array_start = .);
143 | KEEP (*(SORT(.fini_array.*)))
144 | KEEP (*(.fini_array*))
145 | PROVIDE_HIDDEN (__fini_array_end = .);
146 | . = ALIGN(4);
147 | } >FLASH
148 |
149 | _sdpidata = LOADADDR(.DPdata);
150 | .DPdata :
151 | {
152 | . = ALIGN(4);
153 | _sdpdata = .;
154 | ./stack/*.o(.data)
155 | ./stack/*.o(.data*)
156 | . = ALIGN(4);
157 | _edpdata = .;
158 | } >RAM_DP AT> FLASH_DP
159 | .DPbss :
160 | {
161 | . = ALIGN(4);
162 | _sDPbss = .;
163 | __DPbss_start__ = _sDPbss;
164 | ./stack/*.o(.bss)
165 | ./stack/*.o(.bss*)
166 | ./stack/*.o(COMMON)
167 | . = ALIGN(4);
168 | _eDPbss = .;
169 | __DPbss_end__ = _eDPbss;
170 | } >RAM_DP
171 |
172 | /* Used by the startup to initialize data */
173 | _sidata = LOADADDR(.data);
174 |
175 | /* Initialized data sections into "RAM" Ram type memory */
176 | .data :
177 | {
178 | . = ALIGN(4);
179 | _sdata = .; /* create a global symbol at data start */
180 | *(.RTT) /* .data sections */
181 | *(.data) /* .data sections */
182 | *(.data*) /* .data* sections */
183 | *(.RamFunc) /* .RamFunc sections */
184 | *(.RamFunc*) /* .RamFunc* sections */
185 |
186 | . = ALIGN(4);
187 | _edata = .; /* define a global symbol at data end */
188 |
189 | } >RAM AT> FLASH
190 |
191 | /* Uninitialized data section into "RAM" Ram type memory */
192 | . = ALIGN(4);
193 | .bss :
194 | {
195 | /* This is used by the startup in order to initialize the .bss section */
196 | _sbss = .; /* define a global symbol at bss start */
197 | __bss_start__ = _sbss;
198 | *(.bss)
199 | *(.bss*)
200 | *(COMMON)
201 |
202 | . = ALIGN(4);
203 | _ebss = .; /* define a global symbol at bss end */
204 | __bss_end__ = _ebss;
205 | } >RAM
206 |
207 | /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
208 | ._user_heap_stack :
209 | {
210 | . = ALIGN(8);
211 | PROVIDE ( end = . );
212 | PROVIDE ( _end = . );
213 | . = . + _Min_Heap_Size;
214 | . = . + _Min_Stack_Size;
215 | . = ALIGN(8);
216 | } >RAM
217 |
218 | /* Remove information from the compiler libraries */
219 | /DISCARD/ :
220 | {
221 | libc.a ( * )
222 | libm.a ( * )
223 | libgcc.a ( * )
224 | }
225 |
226 | .ARM.attributes 0 : { *(.ARM.attributes) }
227 | }
228 |
--------------------------------------------------------------------------------
/STM32L431RCTX_FLASH_APP.ld:
--------------------------------------------------------------------------------
1 | /*
2 | ******************************************************************************
3 | **
4 | ** @file : LinkerScript.ld
5 | **
6 | ** @author : Auto-generated by STM32CubeIDE
7 | **
8 | ** @brief : Linker script for STM32L431RCTx Device from STM32L4 series
9 | ** 256Kbytes FLASH
10 | ** 64Kbytes RAM
11 | ** 16Kbytes RAM2
12 | **
13 | ** Set heap size, stack size and stack location according
14 | ** to application requirements.
15 | **
16 | ** Set memory bank area and size if external memory is used
17 | **
18 | ** Target : STMicroelectronics STM32
19 | **
20 | ** Distribution: The file is distributed as is, without any warranty
21 | ** of any kind.
22 | **
23 | ******************************************************************************
24 | ** @attention
25 | **
26 | ** Copyright (c) 2022 STMicroelectronics.
27 | ** All rights reserved.
28 | **
29 | ** This software is licensed under terms that can be found in the LICENSE file
30 | ** in the root directory of this software component.
31 | ** If no LICENSE file comes with this software, it is provided AS-IS.
32 | **
33 | ******************************************************************************
34 | */
35 |
36 | /* Entry Point */
37 | ENTRY(Reset_Handler)
38 |
39 | /* Highest address of the user mode stack */
40 | _estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
41 |
42 | _Min_Heap_Size = 0x200 ; /* required amount of heap */
43 | _Min_Stack_Size = 0x400 ; /* required amount of stack */
44 |
45 | /* Memories definition */
46 | MEMORY
47 | {
48 | RAM2 (xrw) : ORIGIN = 0x10000000, LENGTH = 16K
49 |
50 | FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 208K
51 | FLASH_DP (rx) : ORIGIN = 0x08000000+208K , LENGTH = 48K
52 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 52K
53 | RAM_DP (xrw) : ORIGIN = 0x20000000+52K, LENGTH = 12K
54 | }
55 |
56 | /* Sections */
57 | SECTIONS
58 | {
59 | /* The startup code into "FLASH" Rom type memory */
60 | .isr_vector :
61 | {
62 | . = ALIGN(4);
63 | KEEP(*(.isr_vector)) /* Startup code */
64 | . = ALIGN(4);
65 | } >FLASH
66 |
67 | .DPtext :
68 | {
69 | . = ALIGN(4);
70 | __DPtext_Start = .;
71 | KEEP(*(.ExportFunctions))
72 | ./stack/*.o(.text*)
73 | ./stack/*.o(.rodata*)
74 | ./stack/*.o(.ARM.attributes)
75 | . = ALIGN(4);
76 | __DPtext_End = .;
77 | __DPtext_Size = __DPtext_End - __DPtext_Start;
78 | } >FLASH_DP
79 |
80 | /* The program code and other data into "FLASH" Rom type memory */
81 | .text :
82 | {
83 | . = ALIGN(4);
84 | *(.text) /* .text sections (code) */
85 | *(.text*) /* .text* sections (code) */
86 | *(.glue_7) /* glue arm to thumb code */
87 | *(.glue_7t) /* glue thumb to arm code */
88 | *(.eh_frame)
89 |
90 | KEEP (*(.init))
91 | KEEP (*(.fini))
92 |
93 | . = ALIGN(4);
94 | _etext = .; /* define a global symbols at end of code */
95 | } >FLASH
96 |
97 | /* Constant data into "FLASH" Rom type memory */
98 | .rodata :
99 | {
100 | . = ALIGN(4);
101 | *(.rodata) /* .rodata sections (constants, strings, etc.) */
102 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
103 | . = ALIGN(4);
104 | } >FLASH
105 |
106 | .ARM.extab : {
107 | . = ALIGN(4);
108 | *(.ARM.extab* .gnu.linkonce.armextab.*)
109 | . = ALIGN(4);
110 | } >FLASH
111 |
112 | .ARM : {
113 | . = ALIGN(4);
114 | __exidx_start = .;
115 | *(.ARM.exidx*)
116 | __exidx_end = .;
117 | . = ALIGN(4);
118 | } >FLASH
119 |
120 | .preinit_array :
121 | {
122 | . = ALIGN(4);
123 | PROVIDE_HIDDEN (__preinit_array_start = .);
124 | KEEP (*(.preinit_array*))
125 | PROVIDE_HIDDEN (__preinit_array_end = .);
126 | . = ALIGN(4);
127 | } >FLASH
128 |
129 | .init_array :
130 | {
131 | . = ALIGN(4);
132 | PROVIDE_HIDDEN (__init_array_start = .);
133 | KEEP (*(SORT(.init_array.*)))
134 | KEEP (*(.init_array*))
135 | PROVIDE_HIDDEN (__init_array_end = .);
136 | . = ALIGN(4);
137 | } >FLASH
138 |
139 | .fini_array :
140 | {
141 | . = ALIGN(4);
142 | PROVIDE_HIDDEN (__fini_array_start = .);
143 | KEEP (*(SORT(.fini_array.*)))
144 | KEEP (*(.fini_array*))
145 | PROVIDE_HIDDEN (__fini_array_end = .);
146 | . = ALIGN(4);
147 | } >FLASH
148 |
149 | _sdpidata = LOADADDR(.DPdata);
150 | .DPdata :
151 | {
152 | . = ALIGN(4);
153 | _sdpdata = .;
154 | ./stack/*.o(.data)
155 | ./stack/*.o(.data*)
156 | . = ALIGN(4);
157 | _edpdata = .;
158 | } >RAM_DP AT> FLASH_DP
159 | .DPbss :
160 | {
161 | . = ALIGN(4);
162 | _sDPbss = .;
163 | __DPbss_start__ = _sDPbss;
164 | ./stack/*.o(.bss)
165 | ./stack/*.o(.bss*)
166 | ./stack/*.o(COMMON)
167 | . = ALIGN(4);
168 | _eDPbss = .;
169 | __DPbss_end__ = _eDPbss;
170 | } >RAM_DP
171 |
172 | /* Used by the startup to initialize data */
173 | _sidata = LOADADDR(.data);
174 |
175 | /* Initialized data sections into "RAM" Ram type memory */
176 | .data :
177 | {
178 | . = ALIGN(4);
179 | _sdata = .; /* create a global symbol at data start */
180 | *(.data) /* .data sections */
181 | *(.data*) /* .data* sections */
182 | *(.RamFunc) /* .RamFunc sections */
183 | *(.RamFunc*) /* .RamFunc* sections */
184 |
185 | . = ALIGN(4);
186 | _edata = .; /* define a global symbol at data end */
187 |
188 | } >RAM AT> FLASH
189 |
190 | /* Uninitialized data section into "RAM" Ram type memory */
191 | . = ALIGN(4);
192 | .bss :
193 | {
194 | /* This is used by the startup in order to initialize the .bss section */
195 | _sbss = .; /* define a global symbol at bss start */
196 | __bss_start__ = _sbss;
197 | *(.bss)
198 | *(.bss*)
199 | *(COMMON)
200 |
201 | . = ALIGN(4);
202 | _ebss = .; /* define a global symbol at bss end */
203 | __bss_end__ = _ebss;
204 | } >RAM
205 |
206 | /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
207 | ._user_heap_stack :
208 | {
209 | . = ALIGN(8);
210 | PROVIDE ( end = . );
211 | PROVIDE ( _end = . );
212 | . = . + _Min_Heap_Size;
213 | . = . + _Min_Stack_Size;
214 | . = ALIGN(8);
215 | } >RAM
216 |
217 | /* Remove information from the compiler libraries */
218 | /DISCARD/ :
219 | {
220 | libc.a ( * )
221 | libm.a ( * )
222 | libgcc.a ( * )
223 | }
224 |
225 | .ARM.attributes 0 : { *(.ARM.attributes) }
226 | }
227 |
--------------------------------------------------------------------------------
/STM32L431RCTX_FLASH_RELEASE.ld:
--------------------------------------------------------------------------------
1 | /*
2 | ******************************************************************************
3 | **
4 | ** @file : LinkerScript.ld
5 | **
6 | ** @author : Auto-generated by STM32CubeIDE
7 | **
8 | ** @brief : Linker script for STM32L431RCTx Device from STM32L4 series
9 | ** 256Kbytes FLASH
10 | ** 64Kbytes RAM
11 | ** 16Kbytes RAM2
12 | **
13 | ** Set heap size, stack size and stack location according
14 | ** to application requirements.
15 | **
16 | ** Set memory bank area and size if external memory is used
17 | **
18 | ** Target : STMicroelectronics STM32
19 | **
20 | ** Distribution: The file is distributed as is, without any warranty
21 | ** of any kind.
22 | **
23 | ******************************************************************************
24 | ** @attention
25 | **
26 | ** Copyright (c) 2022 STMicroelectronics.
27 | ** All rights reserved.
28 | **
29 | ** This software is licensed under terms that can be found in the LICENSE file
30 | ** in the root directory of this software component.
31 | ** If no LICENSE file comes with this software, it is provided AS-IS.
32 | **
33 | ******************************************************************************
34 | */
35 |
36 | /* Entry Point */
37 | ENTRY(Reset_Handler)
38 |
39 | /* Highest address of the user mode stack */
40 | _estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
41 |
42 | _Min_Heap_Size = 0x200 ; /* required amount of heap */
43 | _Min_Stack_Size = 0x400 ; /* required amount of stack */
44 |
45 | /* Memories definition */
46 | MEMORY
47 | {
48 | RAM2 (xrw) : ORIGIN = 0x10000000, LENGTH = 16K
49 |
50 | FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 208K
51 | FLASH_DP (rx) : ORIGIN = 0x08000000+208K , LENGTH = 48K
52 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 52K
53 | RAM_DP (xrw) : ORIGIN = 0x20000000+52K, LENGTH = 12K
54 | }
55 |
56 | /* Sections */
57 | SECTIONS
58 | {
59 | /* The startup code into "FLASH" Rom type memory */
60 | .isr_vector :
61 | {
62 | . = ALIGN(4);
63 | KEEP(*(.isr_vector)) /* Startup code */
64 | . = ALIGN(4);
65 | } >FLASH
66 |
67 | .DPtext :
68 | {
69 | . = ALIGN(4);
70 | __DPtext_Start = .;
71 | KEEP(*(.ExportFunctions))
72 | ./stack/*.o(.text*)
73 | ./stack/*.o(.rodata*)
74 | ./stack/*.o(.ARM.attributes)
75 | . = ALIGN(4);
76 | __DPtext_End = .;
77 | __DPtext_Size = __DPtext_End - __DPtext_Start;
78 | } >FLASH_DP
79 |
80 | /* The program code and other data into "FLASH" Rom type memory */
81 | .text :
82 | {
83 | . = ALIGN(4);
84 | *(.text) /* .text sections (code) */
85 | *(.text*) /* .text* sections (code) */
86 | *(.glue_7) /* glue arm to thumb code */
87 | *(.glue_7t) /* glue thumb to arm code */
88 | *(.eh_frame)
89 |
90 | KEEP (*(.init))
91 | KEEP (*(.fini))
92 |
93 | . = ALIGN(4);
94 | _etext = .; /* define a global symbols at end of code */
95 | } >FLASH
96 |
97 | /* Constant data into "FLASH" Rom type memory */
98 | .rodata :
99 | {
100 | . = ALIGN(4);
101 | *(.rodata) /* .rodata sections (constants, strings, etc.) */
102 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
103 | . = ALIGN(4);
104 | } >FLASH
105 |
106 | .ARM.extab : {
107 | . = ALIGN(4);
108 | *(.ARM.extab* .gnu.linkonce.armextab.*)
109 | . = ALIGN(4);
110 | } >FLASH
111 |
112 | .ARM : {
113 | . = ALIGN(4);
114 | __exidx_start = .;
115 | *(.ARM.exidx*)
116 | __exidx_end = .;
117 | . = ALIGN(4);
118 | } >FLASH
119 |
120 | .preinit_array :
121 | {
122 | . = ALIGN(4);
123 | PROVIDE_HIDDEN (__preinit_array_start = .);
124 | KEEP (*(.preinit_array*))
125 | PROVIDE_HIDDEN (__preinit_array_end = .);
126 | . = ALIGN(4);
127 | } >FLASH
128 |
129 | .init_array :
130 | {
131 | . = ALIGN(4);
132 | PROVIDE_HIDDEN (__init_array_start = .);
133 | KEEP (*(SORT(.init_array.*)))
134 | KEEP (*(.init_array*))
135 | PROVIDE_HIDDEN (__init_array_end = .);
136 | . = ALIGN(4);
137 | } >FLASH
138 |
139 | .fini_array :
140 | {
141 | . = ALIGN(4);
142 | PROVIDE_HIDDEN (__fini_array_start = .);
143 | KEEP (*(SORT(.fini_array.*)))
144 | KEEP (*(.fini_array*))
145 | PROVIDE_HIDDEN (__fini_array_end = .);
146 | . = ALIGN(4);
147 | } >FLASH
148 |
149 | _sdpidata = LOADADDR(.DPdata);
150 | .DPdata :
151 | {
152 | . = ALIGN(4);
153 | _sdpdata = .;
154 | ./stack/*.o(.data)
155 | ./stack/*.o(.data*)
156 | . = ALIGN(4);
157 | _edpdata = .;
158 | } >RAM_DP AT> FLASH_DP
159 | .DPbss :
160 | {
161 | . = ALIGN(4);
162 | _sDPbss = .;
163 | __DPbss_start__ = _sDPbss;
164 | ./stack/*.o(.bss)
165 | ./stack/*.o(.bss*)
166 | ./stack/*.o(COMMON)
167 | . = ALIGN(4);
168 | _eDPbss = .;
169 | __DPbss_end__ = _eDPbss;
170 | } >RAM_DP
171 |
172 | /* Used by the startup to initialize data */
173 | _sidata = LOADADDR(.data);
174 |
175 | /* Initialized data sections into "RAM" Ram type memory */
176 | .data :
177 | {
178 | . = ALIGN(4);
179 | _sdata = .; /* create a global symbol at data start */
180 | *(.data) /* .data sections */
181 | *(.data*) /* .data* sections */
182 | *(.RamFunc) /* .RamFunc sections */
183 | *(.RamFunc*) /* .RamFunc* sections */
184 |
185 | . = ALIGN(4);
186 | _edata = .; /* define a global symbol at data end */
187 |
188 | } >RAM AT> FLASH
189 |
190 | /* Uninitialized data section into "RAM" Ram type memory */
191 | . = ALIGN(4);
192 | .bss :
193 | {
194 | /* This is used by the startup in order to initialize the .bss section */
195 | _sbss = .; /* define a global symbol at bss start */
196 | __bss_start__ = _sbss;
197 | *(.bss)
198 | *(.bss*)
199 | *(COMMON)
200 |
201 | . = ALIGN(4);
202 | _ebss = .; /* define a global symbol at bss end */
203 | __bss_end__ = _ebss;
204 | } >RAM
205 |
206 | /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
207 | ._user_heap_stack :
208 | {
209 | . = ALIGN(8);
210 | PROVIDE ( end = . );
211 | PROVIDE ( _end = . );
212 | . = . + _Min_Heap_Size;
213 | . = . + _Min_Stack_Size;
214 | . = ALIGN(8);
215 | } >RAM
216 |
217 | /* Remove information from the compiler libraries */
218 | /DISCARD/ :
219 | {
220 | libc.a ( * )
221 | libm.a ( * )
222 | libgcc.a ( * )
223 | }
224 |
225 | .ARM.attributes 0 : { *(.ARM.attributes) }
226 | }
227 |
--------------------------------------------------------------------------------
/doc/DP-softStack V1.1.png:
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/doc/Schematic_profibusDP-stm.pdf:
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/src/DpCfg.h:
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/src/README.md:
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1 | ## DP-V1 demo 介绍
2 |
3 | 该Demo模拟了一个恒温控制从站,功能说明如下。
4 |
5 | 从站为模块化DP-V1从站（逻辑的）。
6 |
7 | - 模块1：具备实时采集环境温度（int16_t）,模拟输入AI，温度值实时返回给主控器PLC，16位温度值定义： 实际温度扩大100倍. (int16_t) temp_trans = (int16_t)((float)temp * 100.0) 。如10.01℃ ，用十进制 1001 表示。；
8 |
9 | - 模块2：具备加热制冷状态开关监测，并将状态实时反馈给主控器PLC，数字输入DI， bit 0 : 加热开关状态，0 关闭，1 开启；bit 1: 制冷开关状态，0 关闭，1 开启。
10 |
11 | - 模块3：具备对加热制冷设备控制驱动能力，控制信号来自主控PLC，数字输出DO，bit 4 : 加热开关控制，0 关闭，1 开启；bit 5: 制冷开关控制，0 关闭，1 开启。
12 |
13 | 主控PLC根据从站的温度值和当前加热制冷控制状态，完成PID控制算法运算后，响从站发出加热或制冷控制指令。
14 |
15 | 从站具备温度超温和低温报警功能，最低下限-40℃，最高上限80℃。
16 |
17 | ### 从站资源定义
18 |
19 | #### 从站IO定义
20 |
21 | | 模块号 | 资源定义 | 配置标识字 |
22 | | :----: | :----: | :----: |
23 | | slot 1 | 温度值AI,2字节 | 0x50 |
24 | | slot 2 | 控制状态DI,1字节 | 0x10 |
25 | | slot 3 | 控制信号DO,1字节 | 0x20 |
26 |
27 | #### 从站参数定义
28 |
29 | | 模块号 | 资源定义 | 参数标识字(偏移) |
30 | | :----: | :----: | :----: |
31 | | slot 1 | 温度值上限,2字节，举例：80 ℃，取值：8000 | 0x1F 0x40 (11) |
32 | | slot 1 | 温度值下限,2字节，举例：-40 ℃，取值：-4000 | 0xF0 0X60 (13) |
33 | | slot 3 | 控制信号使能,1字节，bit4:加热，bit5:制冷 | 0x03 (15) |
34 |
35 | #### 从站报警定义
36 |
37 | | 模块号 | 资源定义 | 报警标识字(偏移) |
38 | | :----: | :----: | :----: |
39 | | slot 1 | 温度超上限,用户字段3字节，出现 | 0x06 0x01 0x01 0x05 0x01 0x1F 0x43(7)|
40 | | slot 1 | 温度超上限,用户字段3字节，消失 | 0x06 0x01 0x01 0x06 0x00 0x1F 0x00(7)|
41 | | slot 1 | 温度超下限,用户字段3字节，出现 | 0x06 0x01 0x01 0x05 0x02 0xF0 0X68(7)|
42 | | slot 1 | 温度超下限,用户字段3字节，消失 | 0x06 0x01 0x01 0x06 0x00 0xF0 0x00(7)|
43 |
44 | #### 从站DPV1支持
45 | 可通过DPV1的非周期性读写功能实现如下功能：
46 | - 重设从站参数
47 | - 设备I&M，I&M功能的主要目的是识别设备，并在设备生命周期的各种场景中提供附加信息，如配置、调试、参数化、诊断、维护、修复、固件更新、资产管理、审计跟踪等，以支持终端用户。
48 |
49 | | 模块号 | 索引 | 资源定义 |
50 | | :----: | :----: |:----: |
51 | | slot 1 | index 2 | 温度值上限,RW |
52 | | slot 1 | index 3 | 温度值下限,RW |
53 | | slot 2 | index 2 | 控制信号使能,RW |
54 | | slot 0 |index 255 | I&M ,RW |
55 | | slot 0 |index 240 | 固件下载 ,MSAC2_Doata_Transport |
56 | | slot 0 |index 241 | 固件信息获取 ,RO |
57 | | slot 0 |index 242 | 固件信息更新 ,MSAC2_Doata_Transport |
58 | | slot 0 |index 243 | 执行固件升级 ,WO |
59 |
60 | ### 操作指南
61 |
--------------------------------------------------------------------------------
/src/dp_App.h:
--------------------------------------------------------------------------------
1 | /*
2 | * dpApp.h
3 | *
4 | * Created on: 2022年9月21日
5 | * Author: fred
6 | */
7 |
8 | #ifndef DP_APP_H_
9 | #define DP_APP_H_
10 |
11 |
12 | #include "dp.h"
13 | #include "dp_port.h"
14 |
15 |
16 | #if !PA_PROFILE_ENABLE
17 | #define _toUser_(format,...) //SEGGER_RTT_printf(0,""format"\n", ##__VA_ARGS__)
18 |
19 | typedef struct
20 | {
21 | union {
22 | uint8_t b;
23 | struct {
24 | uint8_t hot:1;
25 | uint8_t cool:1;
26 | uint8_t resv:2;
27 | uint8_t cool_e:1;
28 | uint8_t hot_e:1;
29 | }sbit;
30 | }enable;
31 | }_PACKED_ prm_control_t;
32 |
33 | typedef struct
34 | {
35 | uint16_t upper_limit;
36 | uint16_t lower_limit;
37 | prm_control_t control;
38 | }_PACKED_ user_prm_t;
39 |
40 | typedef struct
41 | {
42 | prm_control_t ctrl;
43 | }_PACKED_ output_t;
44 |
45 | typedef struct
46 | {
47 | uint16_t temperature;
48 | prm_control_t ctrlStatus;
49 | }_PACKED_ input_t;
50 |
51 | #define SLOT_TEMPLIMIT 1
52 | #define INDEX_TEMPLIMIT_UPPER 2
53 | #define INDEX_TEMPLIMIT_LOWER 3
54 |
55 | #define SLOT_CONTROL 2
56 | #define INDEX_CONTROL 2
57 |
58 | typedef struct{
59 | union {
60 | uint8_t b;
61 | struct {
62 | uint8_t upper:1;
63 | uint8_t lower:1;
64 | }sbit;
65 | }envent;
66 | uint16_t curTemperature; //当前curTemperature
67 | }_PACKED_ alarmEnvent_t;
68 |
69 | typedef struct
70 | {
71 | uint8_t NrOfModules;
72 |
73 | uint8_t userUpdateInput; //用户将输入数据更新到input中的通知
74 | uint8_t alarm_sn;//报警序号
75 | uint8_t alarmType_send;//已经发送的报警的报警类型,0: 没有上报的报警
76 | alarmEnvent_t alarmEvent_send;//已经发送的报警的事件
77 |
78 | input_t input;
79 | output_t output;
80 | user_prm_t prm;
81 |
82 | uint8_t dpv1_rw_buffer[ C1_LEN ];
83 | #ifdef DPV1_IM_SUPP
84 | uint16_t awImIndex[0x10];
85 |
86 | sIM0 sIM_0;
87 |
88 | #ifdef IM1_SUPP
89 | sIM1 sIM_1;
90 | #endif//#ifdef IM1_SUPP
91 |
92 | #ifdef IM2_SUPP
93 | sIM1 sIM_2;
94 | #endif//#ifdef IM2_SUPP
95 |
96 | #ifdef IM3_SUPP
97 | sIM1 sIM_3;
98 | #endif//#ifdef IM3_SUPP
99 |
100 | #ifdef IM4_SUPP
101 | sIM1 sIM_4;
102 | #endif//#ifdef IM4_SUPP
103 | #endif//#ifdef DPV1_IM_SUPP
104 |
105 | }user_opt_t;
106 |
107 | extern user_opt_t user;
108 |
109 |
110 | #else
111 |
112 | #include "PA.h"
113 |
114 | typedef struct
115 | {
116 | PA_Prm_Structure_t prmcmd;
117 | }_PACKED_ user_prm_t;
118 |
119 |
120 | typedef struct
121 | {
122 | uint8_t NrOfModules;
123 |
124 | uint8_t userUpdateInput; //用户将输入数据更新到input中的通知
125 | //uint8_t alarm_sn;//报警序号
126 | //uint8_t alarmType_send;//已经发送的报警的报警类型,0: 没有上报的报警
127 | //alarmEnvent_t alarmEvent_send;//已经发送的报警的事件
128 |
129 | uint8_t input[PA_DIN_BUFSIZE];
130 | uint8_t output[PA_DOUT_BUFSIZE];
131 | user_prm_t prm;
132 |
133 | uint8_t dpv1_rw_buffer[ C1_LEN ];
134 | #ifdef DPV1_IM_SUPP
135 | uint16_t awImIndex[0x10];
136 |
137 | sIM0 sIM_0;
138 |
139 | #ifdef IM1_SUPP
140 | sIM1 sIM_1;
141 | #endif//#ifdef IM1_SUPP
142 |
143 | #ifdef IM2_SUPP
144 | sIM1 sIM_2;
145 | #endif//#ifdef IM2_SUPP
146 |
147 | #ifdef IM3_SUPP
148 | sIM1 sIM_3;
149 | #endif//#ifdef IM3_SUPP
150 |
151 | #ifdef IM4_SUPP
152 | sIM1 sIM_4;
153 | #endif//#ifdef IM4_SUPP
154 | #endif//#ifdef DPV1_IM_SUPP
155 |
156 | }user_opt_t;
157 |
158 | extern user_opt_t user;
159 | extern PA_DEV_t pa_Dev;
160 |
161 | #endif
162 |
163 | void Process_main(void);
164 |
165 | #endif /* DP_APP_H_ */
166 |
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/src/dp_port.c:
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/src/pa_demo.c:
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