├── Libraries
├── CMSIS
│ ├── BasicMathFunctions
│ │ ├── arm_abs_f32.c
│ │ ├── arm_abs_q15.c
│ │ ├── arm_abs_q31.c
│ │ ├── arm_abs_q7.c
│ │ ├── arm_add_f32.c
│ │ ├── arm_add_q15.c
│ │ ├── arm_add_q31.c
│ │ ├── arm_add_q7.c
│ │ ├── arm_dot_prod_f32.c
│ │ ├── arm_dot_prod_q15.c
│ │ ├── arm_dot_prod_q31.c
│ │ ├── arm_dot_prod_q7.c
│ │ ├── arm_mult_f32.c
│ │ ├── arm_mult_q15.c
│ │ ├── arm_mult_q31.c
│ │ ├── arm_mult_q7.c
│ │ ├── arm_negate_f32.c
│ │ ├── arm_negate_q15.c
│ │ ├── arm_negate_q31.c
│ │ ├── arm_negate_q7.c
│ │ ├── arm_offset_f32.c
│ │ ├── arm_offset_q15.c
│ │ ├── arm_offset_q31.c
│ │ ├── arm_offset_q7.c
│ │ ├── arm_scale_f32.c
│ │ ├── arm_scale_q15.c
│ │ ├── arm_scale_q31.c
│ │ ├── arm_scale_q7.c
│ │ ├── arm_shift_q15.c
│ │ ├── arm_shift_q31.c
│ │ ├── arm_shift_q7.c
│ │ ├── arm_sub_f32.c
│ │ ├── arm_sub_q15.c
│ │ ├── arm_sub_q31.c
│ │ └── arm_sub_q7.c
│ ├── CommonTables
│ │ └── arm_common_tables.c
│ ├── ComplexMathFunctions
│ │ ├── arm_cmplx_conj_f32.c
│ │ ├── arm_cmplx_conj_q15.c
│ │ ├── arm_cmplx_conj_q31.c
│ │ ├── arm_cmplx_dot_prod_f32.c
│ │ ├── arm_cmplx_dot_prod_q15.c
│ │ ├── arm_cmplx_dot_prod_q31.c
│ │ ├── arm_cmplx_mag_f32.c
│ │ ├── arm_cmplx_mag_q15.c
│ │ ├── arm_cmplx_mag_q31.c
│ │ ├── arm_cmplx_mag_squared_f32.c
│ │ ├── arm_cmplx_mag_squared_q15.c
│ │ ├── arm_cmplx_mag_squared_q31.c
│ │ ├── arm_cmplx_mult_cmplx_f32.c
│ │ ├── arm_cmplx_mult_cmplx_q15.c
│ │ ├── arm_cmplx_mult_cmplx_q31.c
│ │ ├── arm_cmplx_mult_real_f32.c
│ │ ├── arm_cmplx_mult_real_q15.c
│ │ └── arm_cmplx_mult_real_q31.c
│ ├── ControllerFunctions
│ │ ├── arm_pid_init_f32.c
│ │ ├── arm_pid_init_q15.c
│ │ ├── arm_pid_init_q31.c
│ │ ├── arm_pid_reset_f32.c
│ │ ├── arm_pid_reset_q15.c
│ │ ├── arm_pid_reset_q31.c
│ │ ├── arm_sin_cos_f32.c
│ │ └── arm_sin_cos_q31.c
│ ├── FastMathFunctions
│ │ ├── arm_cos_f32.c
│ │ ├── arm_cos_q15.c
│ │ ├── arm_cos_q31.c
│ │ ├── arm_sin_f32.c
│ │ ├── arm_sin_q15.c
│ │ ├── arm_sin_q31.c
│ │ ├── arm_sqrt_q15.c
│ │ └── arm_sqrt_q31.c
│ ├── FilteringFunctions
│ │ ├── arm_biquad_cascade_df1_32x64_init_q31.c
│ │ ├── arm_biquad_cascade_df1_32x64_q31.c
│ │ ├── arm_biquad_cascade_df1_f32.c
│ │ ├── arm_biquad_cascade_df1_fast_q15.c
│ │ ├── arm_biquad_cascade_df1_fast_q31.c
│ │ ├── arm_biquad_cascade_df1_init_f32.c
│ │ ├── arm_biquad_cascade_df1_init_q15.c
│ │ ├── arm_biquad_cascade_df1_init_q31.c
│ │ ├── arm_biquad_cascade_df1_q15.c
│ │ ├── arm_biquad_cascade_df1_q31.c
│ │ ├── arm_biquad_cascade_df2T_f32.c
│ │ ├── arm_biquad_cascade_df2T_init_f32.c
│ │ ├── arm_conv_f32.c
│ │ ├── arm_conv_fast_opt_q15.c
│ │ ├── arm_conv_fast_q15.c
│ │ ├── arm_conv_fast_q31.c
│ │ ├── arm_conv_opt_q15.c
│ │ ├── arm_conv_opt_q7.c
│ │ ├── arm_conv_partial_f32.c
│ │ ├── arm_conv_partial_fast_opt_q15.c
│ │ ├── arm_conv_partial_fast_q15.c
│ │ ├── arm_conv_partial_fast_q31.c
│ │ ├── arm_conv_partial_opt_q15.c
│ │ ├── arm_conv_partial_opt_q7.c
│ │ ├── arm_conv_partial_q15.c
│ │ ├── arm_conv_partial_q31.c
│ │ ├── arm_conv_partial_q7.c
│ │ ├── arm_conv_q15.c
│ │ ├── arm_conv_q31.c
│ │ ├── arm_conv_q7.c
│ │ ├── arm_correlate_f32.c
│ │ ├── arm_correlate_fast_opt_q15.c
│ │ ├── arm_correlate_fast_q15.c
│ │ ├── arm_correlate_fast_q31.c
│ │ ├── arm_correlate_opt_q15.c
│ │ ├── arm_correlate_opt_q7.c
│ │ ├── arm_correlate_q15.c
│ │ ├── arm_correlate_q31.c
│ │ ├── arm_correlate_q7.c
│ │ ├── arm_fir_decimate_f32.c
│ │ ├── arm_fir_decimate_fast_q15.c
│ │ ├── arm_fir_decimate_fast_q31.c
│ │ ├── arm_fir_decimate_init_f32.c
│ │ ├── arm_fir_decimate_init_q15.c
│ │ ├── arm_fir_decimate_init_q31.c
│ │ ├── arm_fir_decimate_q15.c
│ │ ├── arm_fir_decimate_q31.c
│ │ ├── arm_fir_f32.c
│ │ ├── arm_fir_fast_q15.c
│ │ ├── arm_fir_fast_q31.c
│ │ ├── arm_fir_init_f32.c
│ │ ├── arm_fir_init_q15.c
│ │ ├── arm_fir_init_q31.c
│ │ ├── arm_fir_init_q7.c
│ │ ├── arm_fir_interpolate_f32.c
│ │ ├── arm_fir_interpolate_init_f32.c
│ │ ├── arm_fir_interpolate_init_q15.c
│ │ ├── arm_fir_interpolate_init_q31.c
│ │ ├── arm_fir_interpolate_q15.c
│ │ ├── arm_fir_interpolate_q31.c
│ │ ├── arm_fir_lattice_f32.c
│ │ ├── arm_fir_lattice_init_f32.c
│ │ ├── arm_fir_lattice_init_q15.c
│ │ ├── arm_fir_lattice_init_q31.c
│ │ ├── arm_fir_lattice_q15.c
│ │ ├── arm_fir_lattice_q31.c
│ │ ├── arm_fir_q15.c
│ │ ├── arm_fir_q31.c
│ │ ├── arm_fir_q7.c
│ │ ├── arm_fir_sparse_f32.c
│ │ ├── arm_fir_sparse_init_f32.c
│ │ ├── arm_fir_sparse_init_q15.c
│ │ ├── arm_fir_sparse_init_q31.c
│ │ ├── arm_fir_sparse_init_q7.c
│ │ ├── arm_fir_sparse_q15.c
│ │ ├── arm_fir_sparse_q31.c
│ │ ├── arm_fir_sparse_q7.c
│ │ ├── arm_iir_lattice_f32.c
│ │ ├── arm_iir_lattice_init_f32.c
│ │ ├── arm_iir_lattice_init_q15.c
│ │ ├── arm_iir_lattice_init_q31.c
│ │ ├── arm_iir_lattice_q15.c
│ │ ├── arm_iir_lattice_q31.c
│ │ ├── arm_lms_f32.c
│ │ ├── arm_lms_init_f32.c
│ │ ├── arm_lms_init_q15.c
│ │ ├── arm_lms_init_q31.c
│ │ ├── arm_lms_norm_f32.c
│ │ ├── arm_lms_norm_init_f32.c
│ │ ├── arm_lms_norm_init_q15.c
│ │ ├── arm_lms_norm_init_q31.c
│ │ ├── arm_lms_norm_q15.c
│ │ ├── arm_lms_norm_q31.c
│ │ ├── arm_lms_q15.c
│ │ └── arm_lms_q31.c
│ ├── MatrixFunctions
│ │ ├── arm_mat_add_f32.c
│ │ ├── arm_mat_add_q15.c
│ │ ├── arm_mat_add_q31.c
│ │ ├── arm_mat_init_f32.c
│ │ ├── arm_mat_init_q15.c
│ │ ├── arm_mat_init_q31.c
│ │ ├── arm_mat_inverse_f32.c
│ │ ├── arm_mat_mult_f32.c
│ │ ├── arm_mat_mult_fast_q15.c
│ │ ├── arm_mat_mult_fast_q31.c
│ │ ├── arm_mat_mult_q15.c
│ │ ├── arm_mat_mult_q31.c
│ │ ├── arm_mat_scale_f32.c
│ │ ├── arm_mat_scale_q15.c
│ │ ├── arm_mat_scale_q31.c
│ │ ├── arm_mat_sub_f32.c
│ │ ├── arm_mat_sub_q15.c
│ │ ├── arm_mat_sub_q31.c
│ │ ├── arm_mat_trans_f32.c
│ │ ├── arm_mat_trans_q15.c
│ │ └── arm_mat_trans_q31.c
│ ├── StatisticsFunctions
│ │ ├── arm_max_f32.c
│ │ ├── arm_max_q15.c
│ │ ├── arm_max_q31.c
│ │ ├── arm_max_q7.c
│ │ ├── arm_mean_f32.c
│ │ ├── arm_mean_q15.c
│ │ ├── arm_mean_q31.c
│ │ ├── arm_mean_q7.c
│ │ ├── arm_min_f32.c
│ │ ├── arm_min_q15.c
│ │ ├── arm_min_q31.c
│ │ ├── arm_min_q7.c
│ │ ├── arm_power_f32.c
│ │ ├── arm_power_q15.c
│ │ ├── arm_power_q31.c
│ │ ├── arm_power_q7.c
│ │ ├── arm_rms_f32.c
│ │ ├── arm_rms_q15.c
│ │ ├── arm_rms_q31.c
│ │ ├── arm_std_f32.c
│ │ ├── arm_std_q15.c
│ │ ├── arm_std_q31.c
│ │ ├── arm_var_f32.c
│ │ ├── arm_var_q15.c
│ │ └── arm_var_q31.c
│ ├── SupportFunctions
│ │ ├── arm_copy_f32.c
│ │ ├── arm_copy_q15.c
│ │ ├── arm_copy_q31.c
│ │ ├── arm_copy_q7.c
│ │ ├── arm_fill_f32.c
│ │ ├── arm_fill_q15.c
│ │ ├── arm_fill_q31.c
│ │ ├── arm_fill_q7.c
│ │ ├── arm_float_to_q15.c
│ │ ├── arm_float_to_q31.c
│ │ ├── arm_float_to_q7.c
│ │ ├── arm_q15_to_float.c
│ │ ├── arm_q15_to_q31.c
│ │ ├── arm_q15_to_q7.c
│ │ ├── arm_q31_to_float.c
│ │ ├── arm_q31_to_q15.c
│ │ ├── arm_q31_to_q7.c
│ │ ├── arm_q7_to_float.c
│ │ ├── arm_q7_to_q15.c
│ │ └── arm_q7_to_q31.c
│ ├── TransformFunctions
│ │ ├── arm_bitreversal.c
│ │ ├── arm_bitreversal2.S
│ │ ├── arm_cfft_f32.c
│ │ ├── arm_cfft_radix2_f32.c
│ │ ├── arm_cfft_radix2_init_f32.c
│ │ ├── arm_cfft_radix2_init_q15.c
│ │ ├── arm_cfft_radix2_init_q31.c
│ │ ├── arm_cfft_radix2_q15.c
│ │ ├── arm_cfft_radix2_q31.c
│ │ ├── arm_cfft_radix4_f32.c
│ │ ├── arm_cfft_radix4_init_f32.c
│ │ ├── arm_cfft_radix4_init_q15.c
│ │ ├── arm_cfft_radix4_init_q31.c
│ │ ├── arm_cfft_radix4_q15.c
│ │ ├── arm_cfft_radix4_q31.c
│ │ ├── arm_cfft_radix8_f32.c
│ │ ├── arm_dct4_f32.c
│ │ ├── arm_dct4_init_f32.c
│ │ ├── arm_dct4_init_q15.c
│ │ ├── arm_dct4_init_q31.c
│ │ ├── arm_dct4_q15.c
│ │ ├── arm_dct4_q31.c
│ │ ├── arm_rfft_f32.c
│ │ ├── arm_rfft_fast_f32.c
│ │ ├── arm_rfft_fast_init_f32.c
│ │ ├── arm_rfft_init_f32.c
│ │ ├── arm_rfft_init_q15.c
│ │ ├── arm_rfft_init_q31.c
│ │ ├── arm_rfft_q15.c
│ │ └── arm_rfft_q31.c
│ ├── arm_common_tables.h
│ ├── arm_const_structs.h
│ ├── arm_math.h
│ ├── core_cm4.h
│ ├── core_cm4_simd.h
│ ├── core_cmFunc.h
│ ├── core_cmInstr.h
│ ├── startup_stm32f40xx.s
│ ├── stm32f4xx.h
│ ├── system_stm32f4xx.c
│ └── system_stm32f4xx.h
├── STM32F4xx_StdPeriph_Driver
│ ├── Release_Notes.html
│ ├── inc
│ │ ├── misc.h
│ │ ├── stm32f4xx_adc.h
│ │ ├── stm32f4xx_can.h
│ │ ├── stm32f4xx_crc.h
│ │ ├── stm32f4xx_cryp.h
│ │ ├── stm32f4xx_dac.h
│ │ ├── stm32f4xx_dbgmcu.h
│ │ ├── stm32f4xx_dcmi.h
│ │ ├── stm32f4xx_dma.h
│ │ ├── stm32f4xx_dma2d.h
│ │ ├── stm32f4xx_exti.h
│ │ ├── stm32f4xx_flash.h
│ │ ├── stm32f4xx_fmc.h
│ │ ├── stm32f4xx_fsmc.h
│ │ ├── stm32f4xx_gpio.h
│ │ ├── stm32f4xx_hash.h
│ │ ├── stm32f4xx_i2c.h
│ │ ├── stm32f4xx_iwdg.h
│ │ ├── stm32f4xx_ltdc.h
│ │ ├── stm32f4xx_pwr.h
│ │ ├── stm32f4xx_rcc.h
│ │ ├── stm32f4xx_rng.h
│ │ ├── stm32f4xx_rtc.h
│ │ ├── stm32f4xx_sai.h
│ │ ├── stm32f4xx_sdio.h
│ │ ├── stm32f4xx_spi.h
│ │ ├── stm32f4xx_syscfg.h
│ │ ├── stm32f4xx_tim.h
│ │ ├── stm32f4xx_usart.h
│ │ └── stm32f4xx_wwdg.h
│ └── src
│ │ ├── misc.c
│ │ ├── stm32f4xx_adc.c
│ │ ├── stm32f4xx_can.c
│ │ ├── stm32f4xx_crc.c
│ │ ├── stm32f4xx_cryp.c
│ │ ├── stm32f4xx_cryp_aes.c
│ │ ├── stm32f4xx_cryp_des.c
│ │ ├── stm32f4xx_cryp_tdes.c
│ │ ├── stm32f4xx_dac.c
│ │ ├── stm32f4xx_dbgmcu.c
│ │ ├── stm32f4xx_dcmi.c
│ │ ├── stm32f4xx_dma.c
│ │ ├── stm32f4xx_dma2d.c
│ │ ├── stm32f4xx_exti.c
│ │ ├── stm32f4xx_flash.c
│ │ ├── stm32f4xx_fmc.c
│ │ ├── stm32f4xx_fsmc.c
│ │ ├── stm32f4xx_gpio.c
│ │ ├── stm32f4xx_hash.c
│ │ ├── stm32f4xx_hash_md5.c
│ │ ├── stm32f4xx_hash_sha1.c
│ │ ├── stm32f4xx_i2c.c
│ │ ├── stm32f4xx_iwdg.c
│ │ ├── stm32f4xx_ltdc.c
│ │ ├── stm32f4xx_pwr.c
│ │ ├── stm32f4xx_rcc.c
│ │ ├── stm32f4xx_rng.c
│ │ ├── stm32f4xx_rtc.c
│ │ ├── stm32f4xx_sai.c
│ │ ├── stm32f4xx_sdio.c
│ │ ├── stm32f4xx_spi.c
│ │ ├── stm32f4xx_syscfg.c
│ │ ├── stm32f4xx_tim.c
│ │ ├── stm32f4xx_usart.c
│ │ └── stm32f4xx_wwdg.c
└── arm_cortexM4lf_math.lib
├── Project
├── ClearFile.bat
├── EventRecorderStub.scvd
├── JLinkLog.txt
├── JLinkSettings.ini
├── List
│ ├── STM32F405RGT.map
│ └── startup_stm32f40xx.lst
├── Obj
│ ├── ExtDll.iex
│ ├── Program_STM32_STM32F405RGT.dep
│ ├── STM32F405RGT.axf
│ ├── STM32F405RGT.build_log.htm
│ ├── STM32F405RGT.hex
│ ├── STM32F405RGT.htm
│ ├── STM32F405RGT.lnp
│ ├── STM32F405RGT.sct
│ ├── adc.crf
│ ├── adc.d
│ ├── adc.o
│ ├── bsp.crf
│ ├── bsp.d
│ ├── bsp.o
│ ├── main.crf
│ ├── main.d
│ ├── main.o
│ ├── misc.crf
│ ├── misc.d
│ ├── misc.o
│ ├── motor_control.crf
│ ├── motor_control.d
│ ├── motor_control.o
│ ├── mpu6500.crf
│ ├── mpu6500.d
│ ├── mpu6500.o
│ ├── startup_stm32f40xx.d
│ ├── startup_stm32f40xx.o
│ ├── stm32f4xx_adc.crf
│ ├── stm32f4xx_adc.d
│ ├── stm32f4xx_adc.o
│ ├── stm32f4xx_dma.crf
│ ├── stm32f4xx_dma.d
│ ├── stm32f4xx_dma.o
│ ├── stm32f4xx_flash.crf
│ ├── stm32f4xx_flash.d
│ ├── stm32f4xx_flash.o
│ ├── stm32f4xx_fsmc.crf
│ ├── stm32f4xx_fsmc.d
│ ├── stm32f4xx_fsmc.o
│ ├── stm32f4xx_gpio.crf
│ ├── stm32f4xx_gpio.d
│ ├── stm32f4xx_gpio.o
│ ├── stm32f4xx_i2c.crf
│ ├── stm32f4xx_i2c.d
│ ├── stm32f4xx_i2c.o
│ ├── stm32f4xx_it.crf
│ ├── stm32f4xx_it.d
│ ├── stm32f4xx_it.o
│ ├── stm32f4xx_rcc.crf
│ ├── stm32f4xx_rcc.d
│ ├── stm32f4xx_rcc.o
│ ├── stm32f4xx_spi.crf
│ ├── stm32f4xx_spi.d
│ ├── stm32f4xx_spi.o
│ ├── stm32f4xx_tim.crf
│ ├── stm32f4xx_tim.d
│ ├── stm32f4xx_tim.o
│ ├── stm32f4xx_usart.crf
│ ├── stm32f4xx_usart.d
│ ├── stm32f4xx_usart.o
│ ├── system_stm32f4xx.crf
│ ├── system_stm32f4xx.d
│ ├── system_stm32f4xx.o
│ ├── tim.crf
│ ├── tim.d
│ ├── tim.o
│ ├── usart.crf
│ ├── usart.d
│ └── usart.o
├── Program_STM32.uvgui.Hom
├── Program_STM32.uvgui.t
├── Program_STM32.uvgui.xw
├── Program_STM32.uvgui.ztw
├── Program_STM32.uvopt
└── Program_STM32.uvproj
├── user
├── adc.c
├── adc.h
├── bsp.c
├── bsp.h
├── main.c
├── motor_control.c
├── motor_control.h
├── mpu6500.c
├── mpu6500.h
├── stm32f4_system.h
├── stm32f4xx_conf.h
├── stm32f4xx_it.c
├── tim.c
├── tim.h
├── usart.c
└── usart.h
└── 无刷V2原理图.pdf
/Libraries/CMSIS/BasicMathFunctions/arm_negate_q7.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_negate_q7.c
9 | *
10 | * Description: Negates Q7 vectors.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupMath
45 | */
46 |
47 | /**
48 | * @addtogroup negate
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Negates the elements of a Q7 vector.
54 | * @param[in] *pSrc points to the input vector
55 | * @param[out] *pDst points to the output vector
56 | * @param[in] blockSize number of samples in the vector
57 | * @return none.
58 | *
59 | * Scaling and Overflow Behavior:
60 | * \par
61 | * The function uses saturating arithmetic.
62 | * The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.
63 | */
64 |
65 | void arm_negate_q7(
66 | q7_t * pSrc,
67 | q7_t * pDst,
68 | uint32_t blockSize)
69 | {
70 | uint32_t blkCnt; /* loop counter */
71 | q7_t in;
72 |
73 | #ifndef ARM_MATH_CM0_FAMILY
74 |
75 | /* Run the below code for Cortex-M4 and Cortex-M3 */
76 | q31_t input; /* Input values1-4 */
77 | q31_t zero = 0x00000000;
78 |
79 |
80 | /*loop Unrolling */
81 | blkCnt = blockSize >> 2u;
82 |
83 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
84 | ** a second loop below computes the remaining 1 to 3 samples. */
85 | while(blkCnt > 0u)
86 | {
87 | /* C = -A */
88 | /* Read four inputs */
89 | input = *__SIMD32(pSrc)++;
90 |
91 | /* Store the Negated results in the destination buffer in a single cycle by packing the results */
92 | *__SIMD32(pDst)++ = __QSUB8(zero, input);
93 |
94 | /* Decrement the loop counter */
95 | blkCnt--;
96 | }
97 |
98 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
99 | ** No loop unrolling is used. */
100 | blkCnt = blockSize % 0x4u;
101 |
102 | #else
103 |
104 | /* Run the below code for Cortex-M0 */
105 |
106 | /* Initialize blkCnt with number of samples */
107 | blkCnt = blockSize;
108 |
109 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
110 |
111 | while(blkCnt > 0u)
112 | {
113 | /* C = -A */
114 | /* Negate and then store the results in the destination buffer. */ \
115 | in = *pSrc++;
116 | *pDst++ = (in == (q7_t) 0x80) ? 0x7f : -in;
117 |
118 | /* Decrement the loop counter */
119 | blkCnt--;
120 | }
121 | }
122 |
123 | /**
124 | * @} end of negate group
125 | */
126 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/ControllerFunctions/arm_pid_init_f32.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_init_f32.c
9 | *
10 | * Description: Floating-point PID Control initialization function
11 | *
12 | *
13 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
14 | *
15 | * Redistribution and use in source and binary forms, with or without
16 | * modification, are permitted provided that the following conditions
17 | * are met:
18 | * - Redistributions of source code must retain the above copyright
19 | * notice, this list of conditions and the following disclaimer.
20 | * - Redistributions in binary form must reproduce the above copyright
21 | * notice, this list of conditions and the following disclaimer in
22 | * the documentation and/or other materials provided with the
23 | * distribution.
24 | * - Neither the name of ARM LIMITED nor the names of its contributors
25 | * may be used to endorse or promote products derived from this
26 | * software without specific prior written permission.
27 | *
28 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
31 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
32 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
33 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
34 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
35 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
36 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
38 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39 | * POSSIBILITY OF SUCH DAMAGE.
40 | * ------------------------------------------------------------------- */
41 |
42 | #include "arm_math.h"
43 |
44 | /**
45 | * @addtogroup PID
46 | * @{
47 | */
48 |
49 | /**
50 | * @brief Initialization function for the floating-point PID Control.
51 | * @param[in,out] *S points to an instance of the PID structure.
52 | * @param[in] resetStateFlag flag to reset the state. 0 = no change in state & 1 = reset the state.
53 | * @return none.
54 | * \par Description:
55 | * \par
56 | * The resetStateFlag specifies whether to set state to zero or not. \n
57 | * The function computes the structure fields: A0, A1 A2
58 | * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
59 | * also sets the state variables to all zeros.
60 | */
61 |
62 | void arm_pid_init_f32(
63 | arm_pid_instance_f32 * S,
64 | int32_t resetStateFlag)
65 | {
66 |
67 | /* Derived coefficient A0 */
68 | S->A0 = S->Kp + S->Ki + S->Kd;
69 |
70 | /* Derived coefficient A1 */
71 | S->A1 = (-S->Kp) - ((float32_t) 2.0 * S->Kd);
72 |
73 | /* Derived coefficient A2 */
74 | S->A2 = S->Kd;
75 |
76 | /* Check whether state needs reset or not */
77 | if(resetStateFlag)
78 | {
79 | /* Clear the state buffer. The size will be always 3 samples */
80 | memset(S->state, 0, 3u * sizeof(float32_t));
81 | }
82 |
83 | }
84 |
85 | /**
86 | * @} end of PID group
87 | */
88 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/ControllerFunctions/arm_pid_init_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_init_q15.c
9 | *
10 | * Description: Q15 PID Control initialization function
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup PID
45 | * @{
46 | */
47 |
48 | /**
49 | * @details
50 | * @param[in,out] *S points to an instance of the Q15 PID structure.
51 | * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
52 | * @return none.
53 | * \par Description:
54 | * \par
55 | * The resetStateFlag specifies whether to set state to zero or not. \n
56 | * The function computes the structure fields: A0, A1 A2
57 | * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
58 | * also sets the state variables to all zeros.
59 | */
60 |
61 | void arm_pid_init_q15(
62 | arm_pid_instance_q15 * S,
63 | int32_t resetStateFlag)
64 | {
65 |
66 | #ifndef ARM_MATH_CM0_FAMILY
67 |
68 | /* Run the below code for Cortex-M4 and Cortex-M3 */
69 |
70 | /* Derived coefficient A0 */
71 | S->A0 = __QADD16(__QADD16(S->Kp, S->Ki), S->Kd);
72 |
73 | /* Derived coefficients and pack into A1 */
74 |
75 | #ifndef ARM_MATH_BIG_ENDIAN
76 |
77 | S->A1 = __PKHBT(-__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), S->Kd, 16);
78 |
79 | #else
80 |
81 | S->A1 = __PKHBT(S->Kd, -__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), 16);
82 |
83 | #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
84 |
85 | /* Check whether state needs reset or not */
86 | if(resetStateFlag)
87 | {
88 | /* Clear the state buffer. The size will be always 3 samples */
89 | memset(S->state, 0, 3u * sizeof(q15_t));
90 | }
91 |
92 | #else
93 |
94 | /* Run the below code for Cortex-M0 */
95 |
96 | q31_t temp; /*to store the sum */
97 |
98 | /* Derived coefficient A0 */
99 | temp = S->Kp + S->Ki + S->Kd;
100 | S->A0 = (q15_t) __SSAT(temp, 16);
101 |
102 | /* Derived coefficients and pack into A1 */
103 | temp = -(S->Kd + S->Kd + S->Kp);
104 | S->A1 = (q15_t) __SSAT(temp, 16);
105 | S->A2 = S->Kd;
106 |
107 |
108 |
109 | /* Check whether state needs reset or not */
110 | if(resetStateFlag)
111 | {
112 | /* Clear the state buffer. The size will be always 3 samples */
113 | memset(S->state, 0, 3u * sizeof(q15_t));
114 | }
115 |
116 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
117 |
118 | }
119 |
120 | /**
121 | * @} end of PID group
122 | */
123 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/ControllerFunctions/arm_pid_init_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_init_q31.c
9 | *
10 | * Description: Q31 PID Control initialization function
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup PID
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Initialization function for the Q31 PID Control.
50 | * @param[in,out] *S points to an instance of the Q31 PID structure.
51 | * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
52 | * @return none.
53 | * \par Description:
54 | * \par
55 | * The resetStateFlag specifies whether to set state to zero or not. \n
56 | * The function computes the structure fields: A0, A1 A2
57 | * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
58 | * also sets the state variables to all zeros.
59 | */
60 |
61 | void arm_pid_init_q31(
62 | arm_pid_instance_q31 * S,
63 | int32_t resetStateFlag)
64 | {
65 |
66 | #ifndef ARM_MATH_CM0_FAMILY
67 |
68 | /* Run the below code for Cortex-M4 and Cortex-M3 */
69 |
70 | /* Derived coefficient A0 */
71 | S->A0 = __QADD(__QADD(S->Kp, S->Ki), S->Kd);
72 |
73 | /* Derived coefficient A1 */
74 | S->A1 = -__QADD(__QADD(S->Kd, S->Kd), S->Kp);
75 |
76 |
77 | #else
78 |
79 | /* Run the below code for Cortex-M0 */
80 |
81 | q31_t temp;
82 |
83 | /* Derived coefficient A0 */
84 | temp = clip_q63_to_q31((q63_t) S->Kp + S->Ki);
85 | S->A0 = clip_q63_to_q31((q63_t) temp + S->Kd);
86 |
87 | /* Derived coefficient A1 */
88 | temp = clip_q63_to_q31((q63_t) S->Kd + S->Kd);
89 | S->A1 = -clip_q63_to_q31((q63_t) temp + S->Kp);
90 |
91 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
92 |
93 | /* Derived coefficient A2 */
94 | S->A2 = S->Kd;
95 |
96 | /* Check whether state needs reset or not */
97 | if(resetStateFlag)
98 | {
99 | /* Clear the state buffer. The size will be always 3 samples */
100 | memset(S->state, 0, 3u * sizeof(q31_t));
101 | }
102 |
103 | }
104 |
105 | /**
106 | * @} end of PID group
107 | */
108 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/ControllerFunctions/arm_pid_reset_f32.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_reset_f32.c
9 | *
10 | * Description: Floating-point PID Control reset function
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup PID
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Reset function for the floating-point PID Control.
50 | * @param[in] *S Instance pointer of PID control data structure.
51 | * @return none.
52 | * \par Description:
53 | * The function resets the state buffer to zeros.
54 | */
55 | void arm_pid_reset_f32(
56 | arm_pid_instance_f32 * S)
57 | {
58 |
59 | /* Clear the state buffer. The size will be always 3 samples */
60 | memset(S->state, 0, 3u * sizeof(float32_t));
61 | }
62 |
63 | /**
64 | * @} end of PID group
65 | */
66 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/ControllerFunctions/arm_pid_reset_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_reset_q15.c
9 | *
10 | * Description: Q15 PID Control reset function
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup PID
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Reset function for the Q15 PID Control.
50 | * @param[in] *S Instance pointer of PID control data structure.
51 | * @return none.
52 | * \par Description:
53 | * The function resets the state buffer to zeros.
54 | */
55 | void arm_pid_reset_q15(
56 | arm_pid_instance_q15 * S)
57 | {
58 | /* Reset state to zero, The size will be always 3 samples */
59 | memset(S->state, 0, 3u * sizeof(q15_t));
60 | }
61 |
62 | /**
63 | * @} end of PID group
64 | */
65 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/ControllerFunctions/arm_pid_reset_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_reset_q31.c
9 | *
10 | * Description: Q31 PID Control reset function
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup PID
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Reset function for the Q31 PID Control.
50 | * @param[in] *S Instance pointer of PID control data structure.
51 | * @return none.
52 | * \par Description:
53 | * The function resets the state buffer to zeros.
54 | */
55 | void arm_pid_reset_q31(
56 | arm_pid_instance_q31 * S)
57 | {
58 |
59 | /* Clear the state buffer. The size will be always 3 samples */
60 | memset(S->state, 0, 3u * sizeof(q31_t));
61 | }
62 |
63 | /**
64 | * @} end of PID group
65 | */
66 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/FilteringFunctions/arm_fir_init_f32.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_init_f32.c
9 | *
10 | * Description: Floating-point FIR filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR
49 | * @{
50 | */
51 |
52 | /**
53 | * @details
54 | *
55 | * @param[in,out] *S points to an instance of the floating-point FIR filter structure.
56 | * @param[in] numTaps Number of filter coefficients in the filter.
57 | * @param[in] *pCoeffs points to the filter coefficients buffer.
58 | * @param[in] *pState points to the state buffer.
59 | * @param[in] blockSize number of samples that are processed per call.
60 | * @return none.
61 | *
62 | * Description:
63 | * \par
64 | * pCoeffs points to the array of filter coefficients stored in time reversed order:
65 | *
66 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
67 | *
68 | * \par
69 | * pState points to the array of state variables.
70 | * pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_f32().
71 | */
72 |
73 | void arm_fir_init_f32(
74 | arm_fir_instance_f32 * S,
75 | uint16_t numTaps,
76 | float32_t * pCoeffs,
77 | float32_t * pState,
78 | uint32_t blockSize)
79 | {
80 | /* Assign filter taps */
81 | S->numTaps = numTaps;
82 |
83 | /* Assign coefficient pointer */
84 | S->pCoeffs = pCoeffs;
85 |
86 | /* Clear state buffer and the size of state buffer is (blockSize + numTaps - 1) */
87 | memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(float32_t));
88 |
89 | /* Assign state pointer */
90 | S->pState = pState;
91 |
92 | }
93 |
94 | /**
95 | * @} end of FIR group
96 | */
97 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/FilteringFunctions/arm_fir_init_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_init_q31.c
9 | *
10 | * Description: Q31 FIR filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR
49 | * @{
50 | */
51 |
52 | /**
53 | * @details
54 | *
55 | * @param[in,out] *S points to an instance of the Q31 FIR filter structure.
56 | * @param[in] numTaps Number of filter coefficients in the filter.
57 | * @param[in] *pCoeffs points to the filter coefficients buffer.
58 | * @param[in] *pState points to the state buffer.
59 | * @param[in] blockSize number of samples that are processed per call.
60 | * @return none.
61 | *
62 | * Description:
63 | * \par
64 | * pCoeffs points to the array of filter coefficients stored in time reversed order:
65 | *
66 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
67 | *
68 | * \par
69 | * pState points to the array of state variables.
70 | * pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_q31().
71 | */
72 |
73 | void arm_fir_init_q31(
74 | arm_fir_instance_q31 * S,
75 | uint16_t numTaps,
76 | q31_t * pCoeffs,
77 | q31_t * pState,
78 | uint32_t blockSize)
79 | {
80 | /* Assign filter taps */
81 | S->numTaps = numTaps;
82 |
83 | /* Assign coefficient pointer */
84 | S->pCoeffs = pCoeffs;
85 |
86 | /* Clear state buffer and state array size is (blockSize + numTaps - 1) */
87 | memset(pState, 0, (blockSize + ((uint32_t) numTaps - 1u)) * sizeof(q31_t));
88 |
89 | /* Assign state pointer */
90 | S->pState = pState;
91 |
92 | }
93 |
94 | /**
95 | * @} end of FIR group
96 | */
97 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/FilteringFunctions/arm_fir_init_q7.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_init_q7.c
9 | *
10 | * Description: Q7 FIR filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR
49 | * @{
50 | */
51 | /**
52 | * @param[in,out] *S points to an instance of the Q7 FIR filter structure.
53 | * @param[in] numTaps Number of filter coefficients in the filter.
54 | * @param[in] *pCoeffs points to the filter coefficients buffer.
55 | * @param[in] *pState points to the state buffer.
56 | * @param[in] blockSize number of samples that are processed per call.
57 | * @return none
58 | *
59 | * Description:
60 | * \par
61 | * pCoeffs points to the array of filter coefficients stored in time reversed order:
62 | *
63 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
64 | *
65 | * \par
66 | * pState points to the array of state variables.
67 | * pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_q7().
68 | */
69 |
70 | void arm_fir_init_q7(
71 | arm_fir_instance_q7 * S,
72 | uint16_t numTaps,
73 | q7_t * pCoeffs,
74 | q7_t * pState,
75 | uint32_t blockSize)
76 | {
77 |
78 | /* Assign filter taps */
79 | S->numTaps = numTaps;
80 |
81 | /* Assign coefficient pointer */
82 | S->pCoeffs = pCoeffs;
83 |
84 | /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */
85 | memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q7_t));
86 |
87 | /* Assign state pointer */
88 | S->pState = pState;
89 |
90 | }
91 |
92 | /**
93 | * @} end of FIR group
94 | */
95 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/FilteringFunctions/arm_fir_lattice_init_f32.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_lattice_init_f32.c
9 | *
10 | * Description: Floating-point FIR Lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the floating-point FIR lattice filter.
54 | * @param[in] *S points to an instance of the floating-point FIR lattice structure.
55 | * @param[in] numStages number of filter stages.
56 | * @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
57 | * @param[in] *pState points to the state buffer. The array is of length numStages.
58 | * @return none.
59 | */
60 |
61 | void arm_fir_lattice_init_f32(
62 | arm_fir_lattice_instance_f32 * S,
63 | uint16_t numStages,
64 | float32_t * pCoeffs,
65 | float32_t * pState)
66 | {
67 | /* Assign filter taps */
68 | S->numStages = numStages;
69 |
70 | /* Assign coefficient pointer */
71 | S->pCoeffs = pCoeffs;
72 |
73 | /* Clear state buffer and size is always numStages */
74 | memset(pState, 0, (numStages) * sizeof(float32_t));
75 |
76 | /* Assign state pointer */
77 | S->pState = pState;
78 |
79 | }
80 |
81 | /**
82 | * @} end of FIR_Lattice group
83 | */
84 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/FilteringFunctions/arm_fir_lattice_init_q15.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_lattice_init_q15.c
9 | *
10 | * Description: Q15 FIR Lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q15 FIR lattice filter.
54 | * @param[in] *S points to an instance of the Q15 FIR lattice structure.
55 | * @param[in] numStages number of filter stages.
56 | * @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
57 | * @param[in] *pState points to the state buffer. The array is of length numStages.
58 | * @return none.
59 | */
60 |
61 | void arm_fir_lattice_init_q15(
62 | arm_fir_lattice_instance_q15 * S,
63 | uint16_t numStages,
64 | q15_t * pCoeffs,
65 | q15_t * pState)
66 | {
67 | /* Assign filter taps */
68 | S->numStages = numStages;
69 |
70 | /* Assign coefficient pointer */
71 | S->pCoeffs = pCoeffs;
72 |
73 | /* Clear state buffer and size is always numStages */
74 | memset(pState, 0, (numStages) * sizeof(q15_t));
75 |
76 | /* Assign state pointer */
77 | S->pState = pState;
78 |
79 | }
80 |
81 | /**
82 | * @} end of FIR_Lattice group
83 | */
84 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/FilteringFunctions/arm_fir_lattice_init_q31.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_lattice_init_q31.c
9 | *
10 | * Description: Q31 FIR lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q31 FIR lattice filter.
54 | * @param[in] *S points to an instance of the Q31 FIR lattice structure.
55 | * @param[in] numStages number of filter stages.
56 | * @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
57 | * @param[in] *pState points to the state buffer. The array is of length numStages.
58 | * @return none.
59 | */
60 |
61 | void arm_fir_lattice_init_q31(
62 | arm_fir_lattice_instance_q31 * S,
63 | uint16_t numStages,
64 | q31_t * pCoeffs,
65 | q31_t * pState)
66 | {
67 | /* Assign filter taps */
68 | S->numStages = numStages;
69 |
70 | /* Assign coefficient pointer */
71 | S->pCoeffs = pCoeffs;
72 |
73 | /* Clear state buffer and size is always numStages */
74 | memset(pState, 0, (numStages) * sizeof(q31_t));
75 |
76 | /* Assign state pointer */
77 | S->pState = pState;
78 |
79 | }
80 |
81 | /**
82 | * @} end of FIR_Lattice group
83 | */
84 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/FilteringFunctions/arm_fir_sparse_init_f32.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_sparse_init_f32.c
9 | *
10 | * Description: Floating-point sparse FIR filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR_Sparse
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the floating-point sparse FIR filter.
54 | * @param[in,out] *S points to an instance of the floating-point sparse FIR structure.
55 | * @param[in] numTaps number of nonzero coefficients in the filter.
56 | * @param[in] *pCoeffs points to the array of filter coefficients.
57 | * @param[in] *pState points to the state buffer.
58 | * @param[in] *pTapDelay points to the array of offset times.
59 | * @param[in] maxDelay maximum offset time supported.
60 | * @param[in] blockSize number of samples that will be processed per block.
61 | * @return none
62 | *
63 | * Description:
64 | * \par
65 | * pCoeffs holds the filter coefficients and has length numTaps.
66 | * pState holds the filter's state variables and must be of length
67 | * maxDelay + blockSize, where maxDelay
68 | * is the maximum number of delay line values.
69 | * blockSize is the
70 | * number of samples processed by the arm_fir_sparse_f32() function.
71 | */
72 |
73 | void arm_fir_sparse_init_f32(
74 | arm_fir_sparse_instance_f32 * S,
75 | uint16_t numTaps,
76 | float32_t * pCoeffs,
77 | float32_t * pState,
78 | int32_t * pTapDelay,
79 | uint16_t maxDelay,
80 | uint32_t blockSize)
81 | {
82 | /* Assign filter taps */
83 | S->numTaps = numTaps;
84 |
85 | /* Assign coefficient pointer */
86 | S->pCoeffs = pCoeffs;
87 |
88 | /* Assign TapDelay pointer */
89 | S->pTapDelay = pTapDelay;
90 |
91 | /* Assign MaxDelay */
92 | S->maxDelay = maxDelay;
93 |
94 | /* reset the stateIndex to 0 */
95 | S->stateIndex = 0u;
96 |
97 | /* Clear state buffer and size is always maxDelay + blockSize */
98 | memset(pState, 0, (maxDelay + blockSize) * sizeof(float32_t));
99 |
100 | /* Assign state pointer */
101 | S->pState = pState;
102 |
103 | }
104 |
105 | /**
106 | * @} end of FIR_Sparse group
107 | */
108 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/FilteringFunctions/arm_fir_sparse_init_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_sparse_init_q15.c
9 | *
10 | * Description: Q15 sparse FIR filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR_Sparse
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q15 sparse FIR filter.
54 | * @param[in,out] *S points to an instance of the Q15 sparse FIR structure.
55 | * @param[in] numTaps number of nonzero coefficients in the filter.
56 | * @param[in] *pCoeffs points to the array of filter coefficients.
57 | * @param[in] *pState points to the state buffer.
58 | * @param[in] *pTapDelay points to the array of offset times.
59 | * @param[in] maxDelay maximum offset time supported.
60 | * @param[in] blockSize number of samples that will be processed per block.
61 | * @return none
62 | *
63 | * Description:
64 | * \par
65 | * pCoeffs holds the filter coefficients and has length numTaps.
66 | * pState holds the filter's state variables and must be of length
67 | * maxDelay + blockSize, where maxDelay
68 | * is the maximum number of delay line values.
69 | * blockSize is the
70 | * number of words processed by arm_fir_sparse_q15() function.
71 | */
72 |
73 | void arm_fir_sparse_init_q15(
74 | arm_fir_sparse_instance_q15 * S,
75 | uint16_t numTaps,
76 | q15_t * pCoeffs,
77 | q15_t * pState,
78 | int32_t * pTapDelay,
79 | uint16_t maxDelay,
80 | uint32_t blockSize)
81 | {
82 | /* Assign filter taps */
83 | S->numTaps = numTaps;
84 |
85 | /* Assign coefficient pointer */
86 | S->pCoeffs = pCoeffs;
87 |
88 | /* Assign TapDelay pointer */
89 | S->pTapDelay = pTapDelay;
90 |
91 | /* Assign MaxDelay */
92 | S->maxDelay = maxDelay;
93 |
94 | /* reset the stateIndex to 0 */
95 | S->stateIndex = 0u;
96 |
97 | /* Clear state buffer and size is always maxDelay + blockSize */
98 | memset(pState, 0, (maxDelay + blockSize) * sizeof(q15_t));
99 |
100 | /* Assign state pointer */
101 | S->pState = pState;
102 |
103 | }
104 |
105 | /**
106 | * @} end of FIR_Sparse group
107 | */
108 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/FilteringFunctions/arm_fir_sparse_init_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_sparse_init_q31.c
9 | *
10 | * Description: Q31 sparse FIR filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR_Sparse
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q31 sparse FIR filter.
54 | * @param[in,out] *S points to an instance of the Q31 sparse FIR structure.
55 | * @param[in] numTaps number of nonzero coefficients in the filter.
56 | * @param[in] *pCoeffs points to the array of filter coefficients.
57 | * @param[in] *pState points to the state buffer.
58 | * @param[in] *pTapDelay points to the array of offset times.
59 | * @param[in] maxDelay maximum offset time supported.
60 | * @param[in] blockSize number of samples that will be processed per block.
61 | * @return none
62 | *
63 | * Description:
64 | * \par
65 | * pCoeffs holds the filter coefficients and has length numTaps.
66 | * pState holds the filter's state variables and must be of length
67 | * maxDelay + blockSize, where maxDelay
68 | * is the maximum number of delay line values.
69 | * blockSize is the number of words processed by arm_fir_sparse_q31() function.
70 | */
71 |
72 | void arm_fir_sparse_init_q31(
73 | arm_fir_sparse_instance_q31 * S,
74 | uint16_t numTaps,
75 | q31_t * pCoeffs,
76 | q31_t * pState,
77 | int32_t * pTapDelay,
78 | uint16_t maxDelay,
79 | uint32_t blockSize)
80 | {
81 | /* Assign filter taps */
82 | S->numTaps = numTaps;
83 |
84 | /* Assign coefficient pointer */
85 | S->pCoeffs = pCoeffs;
86 |
87 | /* Assign TapDelay pointer */
88 | S->pTapDelay = pTapDelay;
89 |
90 | /* Assign MaxDelay */
91 | S->maxDelay = maxDelay;
92 |
93 | /* reset the stateIndex to 0 */
94 | S->stateIndex = 0u;
95 |
96 | /* Clear state buffer and size is always maxDelay + blockSize */
97 | memset(pState, 0, (maxDelay + blockSize) * sizeof(q31_t));
98 |
99 | /* Assign state pointer */
100 | S->pState = pState;
101 |
102 | }
103 |
104 | /**
105 | * @} end of FIR_Sparse group
106 | */
107 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/FilteringFunctions/arm_fir_sparse_init_q7.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_sparse_init_q7.c
9 | *
10 | * Description: Q7 sparse FIR filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR_Sparse
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q7 sparse FIR filter.
54 | * @param[in,out] *S points to an instance of the Q7 sparse FIR structure.
55 | * @param[in] numTaps number of nonzero coefficients in the filter.
56 | * @param[in] *pCoeffs points to the array of filter coefficients.
57 | * @param[in] *pState points to the state buffer.
58 | * @param[in] *pTapDelay points to the array of offset times.
59 | * @param[in] maxDelay maximum offset time supported.
60 | * @param[in] blockSize number of samples that will be processed per block.
61 | * @return none
62 | *
63 | * Description:
64 | * \par
65 | * pCoeffs holds the filter coefficients and has length numTaps.
66 | * pState holds the filter's state variables and must be of length
67 | * maxDelay + blockSize, where maxDelay
68 | * is the maximum number of delay line values.
69 | * blockSize is the
70 | * number of samples processed by the arm_fir_sparse_q7() function.
71 | */
72 |
73 | void arm_fir_sparse_init_q7(
74 | arm_fir_sparse_instance_q7 * S,
75 | uint16_t numTaps,
76 | q7_t * pCoeffs,
77 | q7_t * pState,
78 | int32_t * pTapDelay,
79 | uint16_t maxDelay,
80 | uint32_t blockSize)
81 | {
82 | /* Assign filter taps */
83 | S->numTaps = numTaps;
84 |
85 | /* Assign coefficient pointer */
86 | S->pCoeffs = pCoeffs;
87 |
88 | /* Assign TapDelay pointer */
89 | S->pTapDelay = pTapDelay;
90 |
91 | /* Assign MaxDelay */
92 | S->maxDelay = maxDelay;
93 |
94 | /* reset the stateIndex to 0 */
95 | S->stateIndex = 0u;
96 |
97 | /* Clear state buffer and size is always maxDelay + blockSize */
98 | memset(pState, 0, (maxDelay + blockSize) * sizeof(q7_t));
99 |
100 | /* Assign state pointer */
101 | S->pState = pState;
102 |
103 | }
104 |
105 | /**
106 | * @} end of FIR_Sparse group
107 | */
108 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/FilteringFunctions/arm_iir_lattice_init_f32.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_iir_lattice_init_f32.c
9 | *
10 | * Description: Floating-point IIR lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup IIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the floating-point IIR lattice filter.
54 | * @param[in] *S points to an instance of the floating-point IIR lattice structure.
55 | * @param[in] numStages number of stages in the filter.
56 | * @param[in] *pkCoeffs points to the reflection coefficient buffer. The array is of length numStages.
57 | * @param[in] *pvCoeffs points to the ladder coefficient buffer. The array is of length numStages+1.
58 | * @param[in] *pState points to the state buffer. The array is of length numStages+blockSize.
59 | * @param[in] blockSize number of samples to process.
60 | * @return none.
61 | */
62 |
63 | void arm_iir_lattice_init_f32(
64 | arm_iir_lattice_instance_f32 * S,
65 | uint16_t numStages,
66 | float32_t * pkCoeffs,
67 | float32_t * pvCoeffs,
68 | float32_t * pState,
69 | uint32_t blockSize)
70 | {
71 | /* Assign filter taps */
72 | S->numStages = numStages;
73 |
74 | /* Assign reflection coefficient pointer */
75 | S->pkCoeffs = pkCoeffs;
76 |
77 | /* Assign ladder coefficient pointer */
78 | S->pvCoeffs = pvCoeffs;
79 |
80 | /* Clear state buffer and size is always blockSize + numStages */
81 | memset(pState, 0, (numStages + blockSize) * sizeof(float32_t));
82 |
83 | /* Assign state pointer */
84 | S->pState = pState;
85 |
86 |
87 | }
88 |
89 | /**
90 | * @} end of IIR_Lattice group
91 | */
92 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/FilteringFunctions/arm_iir_lattice_init_q15.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_iir_lattice_init_q15.c
9 | *
10 | * Description: Q15 IIR lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup IIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q15 IIR lattice filter.
54 | * @param[in] *S points to an instance of the Q15 IIR lattice structure.
55 | * @param[in] numStages number of stages in the filter.
56 | * @param[in] *pkCoeffs points to reflection coefficient buffer. The array is of length numStages.
57 | * @param[in] *pvCoeffs points to ladder coefficient buffer. The array is of length numStages+1.
58 | * @param[in] *pState points to state buffer. The array is of length numStages+blockSize.
59 | * @param[in] blockSize number of samples to process per call.
60 | * @return none.
61 | */
62 |
63 | void arm_iir_lattice_init_q15(
64 | arm_iir_lattice_instance_q15 * S,
65 | uint16_t numStages,
66 | q15_t * pkCoeffs,
67 | q15_t * pvCoeffs,
68 | q15_t * pState,
69 | uint32_t blockSize)
70 | {
71 | /* Assign filter taps */
72 | S->numStages = numStages;
73 |
74 | /* Assign reflection coefficient pointer */
75 | S->pkCoeffs = pkCoeffs;
76 |
77 | /* Assign ladder coefficient pointer */
78 | S->pvCoeffs = pvCoeffs;
79 |
80 | /* Clear state buffer and size is always blockSize + numStages */
81 | memset(pState, 0, (numStages + blockSize) * sizeof(q15_t));
82 |
83 | /* Assign state pointer */
84 | S->pState = pState;
85 |
86 |
87 | }
88 |
89 | /**
90 | * @} end of IIR_Lattice group
91 | */
92 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/FilteringFunctions/arm_iir_lattice_init_q31.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_iir_lattice_init_q31.c
9 | *
10 | * Description: Initialization function for the Q31 IIR lattice filter.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup IIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q31 IIR lattice filter.
54 | * @param[in] *S points to an instance of the Q31 IIR lattice structure.
55 | * @param[in] numStages number of stages in the filter.
56 | * @param[in] *pkCoeffs points to the reflection coefficient buffer. The array is of length numStages.
57 | * @param[in] *pvCoeffs points to the ladder coefficient buffer. The array is of length numStages+1.
58 | * @param[in] *pState points to the state buffer. The array is of length numStages+blockSize.
59 | * @param[in] blockSize number of samples to process.
60 | * @return none.
61 | */
62 |
63 | void arm_iir_lattice_init_q31(
64 | arm_iir_lattice_instance_q31 * S,
65 | uint16_t numStages,
66 | q31_t * pkCoeffs,
67 | q31_t * pvCoeffs,
68 | q31_t * pState,
69 | uint32_t blockSize)
70 | {
71 | /* Assign filter taps */
72 | S->numStages = numStages;
73 |
74 | /* Assign reflection coefficient pointer */
75 | S->pkCoeffs = pkCoeffs;
76 |
77 | /* Assign ladder coefficient pointer */
78 | S->pvCoeffs = pvCoeffs;
79 |
80 | /* Clear state buffer and size is always blockSize + numStages */
81 | memset(pState, 0, (numStages + blockSize) * sizeof(q31_t));
82 |
83 | /* Assign state pointer */
84 | S->pState = pState;
85 |
86 |
87 | }
88 |
89 | /**
90 | * @} end of IIR_Lattice group
91 | */
92 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/FilteringFunctions/arm_lms_init_f32.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_lms_init_f32.c
9 | *
10 | * Description: Floating-point LMS filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup LMS
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Initialization function for floating-point LMS filter.
50 | * @param[in] *S points to an instance of the floating-point LMS filter structure.
51 | * @param[in] numTaps number of filter coefficients.
52 | * @param[in] *pCoeffs points to the coefficient buffer.
53 | * @param[in] *pState points to state buffer.
54 | * @param[in] mu step size that controls filter coefficient updates.
55 | * @param[in] blockSize number of samples to process.
56 | * @return none.
57 | */
58 |
59 | /**
60 | * \par Description:
61 | * pCoeffs points to the array of filter coefficients stored in time reversed order:
62 | *
63 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
64 | *
65 | * The initial filter coefficients serve as a starting point for the adaptive filter.
66 | * pState points to an array of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_lms_f32().
67 | */
68 |
69 | void arm_lms_init_f32(
70 | arm_lms_instance_f32 * S,
71 | uint16_t numTaps,
72 | float32_t * pCoeffs,
73 | float32_t * pState,
74 | float32_t mu,
75 | uint32_t blockSize)
76 | {
77 | /* Assign filter taps */
78 | S->numTaps = numTaps;
79 |
80 | /* Assign coefficient pointer */
81 | S->pCoeffs = pCoeffs;
82 |
83 | /* Clear state buffer and size is always blockSize + numTaps */
84 | memset(pState, 0, (numTaps + (blockSize - 1)) * sizeof(float32_t));
85 |
86 | /* Assign state pointer */
87 | S->pState = pState;
88 |
89 | /* Assign Step size value */
90 | S->mu = mu;
91 | }
92 |
93 | /**
94 | * @} end of LMS group
95 | */
96 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/FilteringFunctions/arm_lms_init_q15.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_lms_init_q15.c
9 | *
10 | * Description: Q15 LMS filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup LMS
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q15 LMS filter.
54 | * @param[in] *S points to an instance of the Q15 LMS filter structure.
55 | * @param[in] numTaps number of filter coefficients.
56 | * @param[in] *pCoeffs points to the coefficient buffer.
57 | * @param[in] *pState points to the state buffer.
58 | * @param[in] mu step size that controls filter coefficient updates.
59 | * @param[in] blockSize number of samples to process.
60 | * @param[in] postShift bit shift applied to coefficients.
61 | * @return none.
62 | *
63 | * \par Description:
64 | * pCoeffs points to the array of filter coefficients stored in time reversed order:
65 | *
66 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
67 | *
68 | * The initial filter coefficients serve as a starting point for the adaptive filter.
69 | * pState points to the array of state variables and size of array is
70 | * numTaps+blockSize-1 samples, where blockSize is the number of
71 | * input samples processed by each call to arm_lms_q15().
72 | */
73 |
74 | void arm_lms_init_q15(
75 | arm_lms_instance_q15 * S,
76 | uint16_t numTaps,
77 | q15_t * pCoeffs,
78 | q15_t * pState,
79 | q15_t mu,
80 | uint32_t blockSize,
81 | uint32_t postShift)
82 | {
83 | /* Assign filter taps */
84 | S->numTaps = numTaps;
85 |
86 | /* Assign coefficient pointer */
87 | S->pCoeffs = pCoeffs;
88 |
89 | /* Clear state buffer and size is always blockSize + numTaps - 1 */
90 | memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
91 |
92 | /* Assign state pointer */
93 | S->pState = pState;
94 |
95 | /* Assign Step size value */
96 | S->mu = mu;
97 |
98 | /* Assign postShift value to be applied */
99 | S->postShift = postShift;
100 |
101 | }
102 |
103 | /**
104 | * @} end of LMS group
105 | */
106 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/FilteringFunctions/arm_lms_init_q31.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_lms_init_q31.c
9 | *
10 | * Description: Q31 LMS filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup LMS
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for Q31 LMS filter.
54 | * @param[in] *S points to an instance of the Q31 LMS filter structure.
55 | * @param[in] numTaps number of filter coefficients.
56 | * @param[in] *pCoeffs points to coefficient buffer.
57 | * @param[in] *pState points to state buffer.
58 | * @param[in] mu step size that controls filter coefficient updates.
59 | * @param[in] blockSize number of samples to process.
60 | * @param[in] postShift bit shift applied to coefficients.
61 | * @return none.
62 | *
63 | * \par Description:
64 | * pCoeffs points to the array of filter coefficients stored in time reversed order:
65 | *
66 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
67 | *
68 | * The initial filter coefficients serve as a starting point for the adaptive filter.
69 | * pState points to an array of length numTaps+blockSize-1 samples,
70 | * where blockSize is the number of input samples processed by each call to
71 | * arm_lms_q31().
72 | */
73 |
74 | void arm_lms_init_q31(
75 | arm_lms_instance_q31 * S,
76 | uint16_t numTaps,
77 | q31_t * pCoeffs,
78 | q31_t * pState,
79 | q31_t mu,
80 | uint32_t blockSize,
81 | uint32_t postShift)
82 | {
83 | /* Assign filter taps */
84 | S->numTaps = numTaps;
85 |
86 | /* Assign coefficient pointer */
87 | S->pCoeffs = pCoeffs;
88 |
89 | /* Clear state buffer and size is always blockSize + numTaps - 1 */
90 | memset(pState, 0, ((uint32_t) numTaps + (blockSize - 1u)) * sizeof(q31_t));
91 |
92 | /* Assign state pointer */
93 | S->pState = pState;
94 |
95 | /* Assign Step size value */
96 | S->mu = mu;
97 |
98 | /* Assign postShift value to be applied */
99 | S->postShift = postShift;
100 |
101 | }
102 |
103 | /**
104 | * @} end of LMS group
105 | */
106 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/FilteringFunctions/arm_lms_norm_init_f32.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_lms_norm_init_f32.c
9 | *
10 | * Description: Floating-point NLMS filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup LMS_NORM
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for floating-point normalized LMS filter.
54 | * @param[in] *S points to an instance of the floating-point LMS filter structure.
55 | * @param[in] numTaps number of filter coefficients.
56 | * @param[in] *pCoeffs points to coefficient buffer.
57 | * @param[in] *pState points to state buffer.
58 | * @param[in] mu step size that controls filter coefficient updates.
59 | * @param[in] blockSize number of samples to process.
60 | * @return none.
61 | *
62 | * \par Description:
63 | * pCoeffs points to the array of filter coefficients stored in time reversed order:
64 | *
65 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
66 | *
67 | * The initial filter coefficients serve as a starting point for the adaptive filter.
68 | * pState points to an array of length numTaps+blockSize-1 samples,
69 | * where blockSize is the number of input samples processed by each call to arm_lms_norm_f32().
70 | */
71 |
72 | void arm_lms_norm_init_f32(
73 | arm_lms_norm_instance_f32 * S,
74 | uint16_t numTaps,
75 | float32_t * pCoeffs,
76 | float32_t * pState,
77 | float32_t mu,
78 | uint32_t blockSize)
79 | {
80 | /* Assign filter taps */
81 | S->numTaps = numTaps;
82 |
83 | /* Assign coefficient pointer */
84 | S->pCoeffs = pCoeffs;
85 |
86 | /* Clear state buffer and size is always blockSize + numTaps - 1 */
87 | memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(float32_t));
88 |
89 | /* Assign state pointer */
90 | S->pState = pState;
91 |
92 | /* Assign Step size value */
93 | S->mu = mu;
94 |
95 | /* Initialise Energy to zero */
96 | S->energy = 0.0f;
97 |
98 | /* Initialise x0 to zero */
99 | S->x0 = 0.0f;
100 |
101 | }
102 |
103 | /**
104 | * @} end of LMS_NORM group
105 | */
106 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/MatrixFunctions/arm_mat_init_f32.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_mat_init_f32.c
9 | *
10 | * Description: Floating-point matrix initialization.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupMatrix
45 | */
46 |
47 | /**
48 | * @defgroup MatrixInit Matrix Initialization
49 | *
50 | * Initializes the underlying matrix data structure.
51 | * The functions set the numRows,
52 | * numCols, and pData fields
53 | * of the matrix data structure.
54 | */
55 |
56 | /**
57 | * @addtogroup MatrixInit
58 | * @{
59 | */
60 |
61 | /**
62 | * @brief Floating-point matrix initialization.
63 | * @param[in,out] *S points to an instance of the floating-point matrix structure.
64 | * @param[in] nRows number of rows in the matrix.
65 | * @param[in] nColumns number of columns in the matrix.
66 | * @param[in] *pData points to the matrix data array.
67 | * @return none
68 | */
69 |
70 | void arm_mat_init_f32(
71 | arm_matrix_instance_f32 * S,
72 | uint16_t nRows,
73 | uint16_t nColumns,
74 | float32_t * pData)
75 | {
76 | /* Assign Number of Rows */
77 | S->numRows = nRows;
78 |
79 | /* Assign Number of Columns */
80 | S->numCols = nColumns;
81 |
82 | /* Assign Data pointer */
83 | S->pData = pData;
84 | }
85 |
86 | /**
87 | * @} end of MatrixInit group
88 | */
89 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/MatrixFunctions/arm_mat_init_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_mat_init_q15.c
9 | *
10 | * Description: Q15 matrix initialization.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------------- */
40 |
41 |
42 | #include "arm_math.h"
43 |
44 | /**
45 | * @ingroup groupMatrix
46 | */
47 |
48 | /**
49 | * @addtogroup MatrixInit
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Q15 matrix initialization.
55 | * @param[in,out] *S points to an instance of the floating-point matrix structure.
56 | * @param[in] nRows number of rows in the matrix.
57 | * @param[in] nColumns number of columns in the matrix.
58 | * @param[in] *pData points to the matrix data array.
59 | * @return none
60 | */
61 |
62 | void arm_mat_init_q15(
63 | arm_matrix_instance_q15 * S,
64 | uint16_t nRows,
65 | uint16_t nColumns,
66 | q15_t * pData)
67 | {
68 | /* Assign Number of Rows */
69 | S->numRows = nRows;
70 |
71 | /* Assign Number of Columns */
72 | S->numCols = nColumns;
73 |
74 | /* Assign Data pointer */
75 | S->pData = pData;
76 | }
77 |
78 | /**
79 | * @} end of MatrixInit group
80 | */
81 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/MatrixFunctions/arm_mat_init_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_mat_init_q31.c
9 | *
10 | * Description: Q31 matrix initialization.
11 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
12 | *
13 | * Redistribution and use in source and binary forms, with or without
14 | * modification, are permitted provided that the following conditions
15 | * are met:
16 | * - Redistributions of source code must retain the above copyright
17 | * notice, this list of conditions and the following disclaimer.
18 | * - Redistributions in binary form must reproduce the above copyright
19 | * notice, this list of conditions and the following disclaimer in
20 | * the documentation and/or other materials provided with the
21 | * distribution.
22 | * - Neither the name of ARM LIMITED nor the names of its contributors
23 | * may be used to endorse or promote products derived from this
24 | * software without specific prior written permission.
25 | *
26 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
29 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
30 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
31 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
32 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
33 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
34 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
36 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 | * POSSIBILITY OF SUCH DAMAGE.
38 | * -------------------------------------------------------------------------- */
39 |
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupMatrix
45 | */
46 |
47 | /**
48 | * @defgroup MatrixInit Matrix Initialization
49 | *
50 | */
51 |
52 | /**
53 | * @addtogroup MatrixInit
54 | * @{
55 | */
56 |
57 | /**
58 | * @brief Q31 matrix initialization.
59 | * @param[in,out] *S points to an instance of the floating-point matrix structure.
60 | * @param[in] nRows number of rows in the matrix.
61 | * @param[in] nColumns number of columns in the matrix.
62 | * @param[in] *pData points to the matrix data array.
63 | * @return none
64 | */
65 |
66 | void arm_mat_init_q31(
67 | arm_matrix_instance_q31 * S,
68 | uint16_t nRows,
69 | uint16_t nColumns,
70 | q31_t * pData)
71 | {
72 | /* Assign Number of Rows */
73 | S->numRows = nRows;
74 |
75 | /* Assign Number of Columns */
76 | S->numCols = nColumns;
77 |
78 | /* Assign Data pointer */
79 | S->pData = pData;
80 | }
81 |
82 | /**
83 | * @} end of MatrixInit group
84 | */
85 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/SupportFunctions/arm_copy_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_copy_q15.c
9 | *
10 | * Description: Copies the elements of a Q15 vector.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupSupport
45 | */
46 |
47 | /**
48 | * @addtogroup copy
49 | * @{
50 | */
51 | /**
52 | * @brief Copies the elements of a Q15 vector.
53 | * @param[in] *pSrc points to input vector
54 | * @param[out] *pDst points to output vector
55 | * @param[in] blockSize length of the input vector
56 | * @return none.
57 | *
58 | */
59 |
60 | void arm_copy_q15(
61 | q15_t * pSrc,
62 | q15_t * pDst,
63 | uint32_t blockSize)
64 | {
65 | uint32_t blkCnt; /* loop counter */
66 |
67 | #ifndef ARM_MATH_CM0_FAMILY
68 |
69 | /* Run the below code for Cortex-M4 and Cortex-M3 */
70 |
71 | /*loop Unrolling */
72 | blkCnt = blockSize >> 2u;
73 |
74 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
75 | ** a second loop below computes the remaining 1 to 3 samples. */
76 | while(blkCnt > 0u)
77 | {
78 | /* C = A */
79 | /* Read two inputs */
80 | *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
81 | *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
82 |
83 | /* Decrement the loop counter */
84 | blkCnt--;
85 | }
86 |
87 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
88 | ** No loop unrolling is used. */
89 | blkCnt = blockSize % 0x4u;
90 |
91 |
92 | #else
93 |
94 | /* Run the below code for Cortex-M0 */
95 |
96 | /* Loop over blockSize number of values */
97 | blkCnt = blockSize;
98 |
99 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
100 |
101 | while(blkCnt > 0u)
102 | {
103 | /* C = A */
104 | /* Copy and then store the value in the destination buffer */
105 | *pDst++ = *pSrc++;
106 |
107 | /* Decrement the loop counter */
108 | blkCnt--;
109 | }
110 | }
111 |
112 | /**
113 | * @} end of BasicCopy group
114 | */
115 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/SupportFunctions/arm_copy_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_copy_q31.c
9 | *
10 | * Description: Copies the elements of a Q31 vector.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupSupport
45 | */
46 |
47 | /**
48 | * @addtogroup copy
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Copies the elements of a Q31 vector.
54 | * @param[in] *pSrc points to input vector
55 | * @param[out] *pDst points to output vector
56 | * @param[in] blockSize length of the input vector
57 | * @return none.
58 | *
59 | */
60 |
61 | void arm_copy_q31(
62 | q31_t * pSrc,
63 | q31_t * pDst,
64 | uint32_t blockSize)
65 | {
66 | uint32_t blkCnt; /* loop counter */
67 |
68 |
69 | #ifndef ARM_MATH_CM0_FAMILY
70 |
71 | /* Run the below code for Cortex-M4 and Cortex-M3 */
72 | q31_t in1, in2, in3, in4;
73 |
74 | /*loop Unrolling */
75 | blkCnt = blockSize >> 2u;
76 |
77 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
78 | ** a second loop below computes the remaining 1 to 3 samples. */
79 | while(blkCnt > 0u)
80 | {
81 | /* C = A */
82 | /* Copy and then store the values in the destination buffer */
83 | in1 = *pSrc++;
84 | in2 = *pSrc++;
85 | in3 = *pSrc++;
86 | in4 = *pSrc++;
87 |
88 | *pDst++ = in1;
89 | *pDst++ = in2;
90 | *pDst++ = in3;
91 | *pDst++ = in4;
92 |
93 | /* Decrement the loop counter */
94 | blkCnt--;
95 | }
96 |
97 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
98 | ** No loop unrolling is used. */
99 | blkCnt = blockSize % 0x4u;
100 |
101 | #else
102 |
103 | /* Run the below code for Cortex-M0 */
104 |
105 | /* Loop over blockSize number of values */
106 | blkCnt = blockSize;
107 |
108 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
109 |
110 | while(blkCnt > 0u)
111 | {
112 | /* C = A */
113 | /* Copy and then store the value in the destination buffer */
114 | *pDst++ = *pSrc++;
115 |
116 | /* Decrement the loop counter */
117 | blkCnt--;
118 | }
119 | }
120 |
121 | /**
122 | * @} end of BasicCopy group
123 | */
124 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/SupportFunctions/arm_copy_q7.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_copy_q7.c
9 | *
10 | * Description: Copies the elements of a Q7 vector.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupSupport
45 | */
46 |
47 | /**
48 | * @addtogroup copy
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Copies the elements of a Q7 vector.
54 | * @param[in] *pSrc points to input vector
55 | * @param[out] *pDst points to output vector
56 | * @param[in] blockSize length of the input vector
57 | * @return none.
58 | *
59 | */
60 |
61 | void arm_copy_q7(
62 | q7_t * pSrc,
63 | q7_t * pDst,
64 | uint32_t blockSize)
65 | {
66 | uint32_t blkCnt; /* loop counter */
67 |
68 | #ifndef ARM_MATH_CM0_FAMILY
69 |
70 | /* Run the below code for Cortex-M4 and Cortex-M3 */
71 |
72 | /*loop Unrolling */
73 | blkCnt = blockSize >> 2u;
74 |
75 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
76 | ** a second loop below computes the remaining 1 to 3 samples. */
77 | while(blkCnt > 0u)
78 | {
79 | /* C = A */
80 | /* Copy and then store the results in the destination buffer */
81 | /* 4 samples are copied and stored at a time using SIMD */
82 | *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
83 |
84 | /* Decrement the loop counter */
85 | blkCnt--;
86 | }
87 |
88 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
89 | ** No loop unrolling is used. */
90 | blkCnt = blockSize % 0x4u;
91 |
92 | #else
93 |
94 | /* Run the below code for Cortex-M0 */
95 |
96 | /* Loop over blockSize number of values */
97 | blkCnt = blockSize;
98 |
99 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
100 |
101 |
102 | while(blkCnt > 0u)
103 | {
104 | /* C = A */
105 | /* Copy and then store the results in the destination buffer */
106 | *pDst++ = *pSrc++;
107 |
108 | /* Decrement the loop counter */
109 | blkCnt--;
110 | }
111 | }
112 |
113 | /**
114 | * @} end of BasicCopy group
115 | */
116 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/SupportFunctions/arm_fill_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fill_q15.c
9 | *
10 | * Description: Fills a constant value into a Q15 vector.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupSupport
45 | */
46 |
47 | /**
48 | * @addtogroup Fill
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Fills a constant value into a Q15 vector.
54 | * @param[in] value input value to be filled
55 | * @param[out] *pDst points to output vector
56 | * @param[in] blockSize length of the output vector
57 | * @return none.
58 | *
59 | */
60 |
61 | void arm_fill_q15(
62 | q15_t value,
63 | q15_t * pDst,
64 | uint32_t blockSize)
65 | {
66 | uint32_t blkCnt; /* loop counter */
67 |
68 | #ifndef ARM_MATH_CM0_FAMILY
69 |
70 | /* Run the below code for Cortex-M4 and Cortex-M3 */
71 |
72 | q31_t packedValue; /* value packed to 32 bits */
73 |
74 |
75 | /*loop Unrolling */
76 | blkCnt = blockSize >> 2u;
77 |
78 | /* Packing two 16 bit values to 32 bit value in order to use SIMD */
79 | packedValue = __PKHBT(value, value, 16u);
80 |
81 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
82 | ** a second loop below computes the remaining 1 to 3 samples. */
83 | while(blkCnt > 0u)
84 | {
85 | /* C = value */
86 | /* Fill the value in the destination buffer */
87 | *__SIMD32(pDst)++ = packedValue;
88 | *__SIMD32(pDst)++ = packedValue;
89 |
90 | /* Decrement the loop counter */
91 | blkCnt--;
92 | }
93 |
94 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
95 | ** No loop unrolling is used. */
96 | blkCnt = blockSize % 0x4u;
97 |
98 | #else
99 |
100 | /* Run the below code for Cortex-M0 */
101 |
102 | /* Loop over blockSize number of values */
103 | blkCnt = blockSize;
104 |
105 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
106 |
107 | while(blkCnt > 0u)
108 | {
109 | /* C = value */
110 | /* Fill the value in the destination buffer */
111 | *pDst++ = value;
112 |
113 | /* Decrement the loop counter */
114 | blkCnt--;
115 | }
116 | }
117 |
118 | /**
119 | * @} end of Fill group
120 | */
121 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/SupportFunctions/arm_fill_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fill_q31.c
9 | *
10 | * Description: Fills a constant value into a Q31 vector.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupSupport
45 | */
46 |
47 | /**
48 | * @addtogroup Fill
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Fills a constant value into a Q31 vector.
54 | * @param[in] value input value to be filled
55 | * @param[out] *pDst points to output vector
56 | * @param[in] blockSize length of the output vector
57 | * @return none.
58 | *
59 | */
60 |
61 | void arm_fill_q31(
62 | q31_t value,
63 | q31_t * pDst,
64 | uint32_t blockSize)
65 | {
66 | uint32_t blkCnt; /* loop counter */
67 |
68 |
69 | #ifndef ARM_MATH_CM0_FAMILY
70 |
71 | /* Run the below code for Cortex-M4 and Cortex-M3 */
72 | q31_t in1 = value;
73 | q31_t in2 = value;
74 | q31_t in3 = value;
75 | q31_t in4 = value;
76 |
77 | /*loop Unrolling */
78 | blkCnt = blockSize >> 2u;
79 |
80 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
81 | ** a second loop below computes the remaining 1 to 3 samples. */
82 | while(blkCnt > 0u)
83 | {
84 | /* C = value */
85 | /* Fill the value in the destination buffer */
86 | *pDst++ = in1;
87 | *pDst++ = in2;
88 | *pDst++ = in3;
89 | *pDst++ = in4;
90 |
91 | /* Decrement the loop counter */
92 | blkCnt--;
93 | }
94 |
95 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
96 | ** No loop unrolling is used. */
97 | blkCnt = blockSize % 0x4u;
98 |
99 | #else
100 |
101 | /* Run the below code for Cortex-M0 */
102 |
103 | /* Loop over blockSize number of values */
104 | blkCnt = blockSize;
105 |
106 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
107 |
108 | while(blkCnt > 0u)
109 | {
110 | /* C = value */
111 | /* Fill the value in the destination buffer */
112 | *pDst++ = value;
113 |
114 | /* Decrement the loop counter */
115 | blkCnt--;
116 | }
117 | }
118 |
119 | /**
120 | * @} end of Fill group
121 | */
122 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/SupportFunctions/arm_fill_q7.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fill_q7.c
9 | *
10 | * Description: Fills a constant value into a Q7 vector.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupSupport
45 | */
46 |
47 | /**
48 | * @addtogroup Fill
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Fills a constant value into a Q7 vector.
54 | * @param[in] value input value to be filled
55 | * @param[out] *pDst points to output vector
56 | * @param[in] blockSize length of the output vector
57 | * @return none.
58 | *
59 | */
60 |
61 | void arm_fill_q7(
62 | q7_t value,
63 | q7_t * pDst,
64 | uint32_t blockSize)
65 | {
66 | uint32_t blkCnt; /* loop counter */
67 |
68 | #ifndef ARM_MATH_CM0_FAMILY
69 |
70 | /* Run the below code for Cortex-M4 and Cortex-M3 */
71 |
72 | q31_t packedValue; /* value packed to 32 bits */
73 |
74 | /*loop Unrolling */
75 | blkCnt = blockSize >> 2u;
76 |
77 | /* Packing four 8 bit values to 32 bit value in order to use SIMD */
78 | packedValue = __PACKq7(value, value, value, value);
79 |
80 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
81 | ** a second loop below computes the remaining 1 to 3 samples. */
82 | while(blkCnt > 0u)
83 | {
84 | /* C = value */
85 | /* Fill the value in the destination buffer */
86 | *__SIMD32(pDst)++ = packedValue;
87 |
88 | /* Decrement the loop counter */
89 | blkCnt--;
90 | }
91 |
92 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
93 | ** No loop unrolling is used. */
94 | blkCnt = blockSize % 0x4u;
95 |
96 | #else
97 |
98 | /* Run the below code for Cortex-M0 */
99 |
100 | /* Loop over blockSize number of values */
101 | blkCnt = blockSize;
102 |
103 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
104 |
105 | while(blkCnt > 0u)
106 | {
107 | /* C = value */
108 | /* Fill the value in the destination buffer */
109 | *pDst++ = value;
110 |
111 | /* Decrement the loop counter */
112 | blkCnt--;
113 | }
114 | }
115 |
116 | /**
117 | * @} end of Fill group
118 | */
119 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/arm_const_structs.h:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_const_structs.h
9 | *
10 | * Description: This file has constant structs that are initialized for
11 | * user convenience. For example, some can be given as
12 | * arguments to the arm_cfft_f32() function.
13 | *
14 | * Target Processor: Cortex-M4/Cortex-M3
15 | *
16 | * Redistribution and use in source and binary forms, with or without
17 | * modification, are permitted provided that the following conditions
18 | * are met:
19 | * - Redistributions of source code must retain the above copyright
20 | * notice, this list of conditions and the following disclaimer.
21 | * - Redistributions in binary form must reproduce the above copyright
22 | * notice, this list of conditions and the following disclaimer in
23 | * the documentation and/or other materials provided with the
24 | * distribution.
25 | * - Neither the name of ARM LIMITED nor the names of its contributors
26 | * may be used to endorse or promote products derived from this
27 | * software without specific prior written permission.
28 | *
29 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
32 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
33 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
34 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
35 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
36 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
37 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
38 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
39 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
40 | * POSSIBILITY OF SUCH DAMAGE.
41 | * -------------------------------------------------------------------- */
42 |
43 | #ifndef _ARM_CONST_STRUCTS_H
44 | #define _ARM_CONST_STRUCTS_H
45 |
46 | #include "arm_math.h"
47 | #include "arm_common_tables.h"
48 |
49 | const arm_cfft_instance_f32 arm_cfft_sR_f32_len16 = {
50 | 16, twiddleCoef_16, armBitRevIndexTable16, ARMBITREVINDEXTABLE__16_TABLE_LENGTH
51 | };
52 |
53 | const arm_cfft_instance_f32 arm_cfft_sR_f32_len32 = {
54 | 32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE__32_TABLE_LENGTH
55 | };
56 |
57 | const arm_cfft_instance_f32 arm_cfft_sR_f32_len64 = {
58 | 64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE__64_TABLE_LENGTH
59 | };
60 |
61 | const arm_cfft_instance_f32 arm_cfft_sR_f32_len128 = {
62 | 128, twiddleCoef_128, armBitRevIndexTable128, ARMBITREVINDEXTABLE_128_TABLE_LENGTH
63 | };
64 |
65 | const arm_cfft_instance_f32 arm_cfft_sR_f32_len256 = {
66 | 256, twiddleCoef_256, armBitRevIndexTable256, ARMBITREVINDEXTABLE_256_TABLE_LENGTH
67 | };
68 |
69 | const arm_cfft_instance_f32 arm_cfft_sR_f32_len512 = {
70 | 512, twiddleCoef_512, armBitRevIndexTable512, ARMBITREVINDEXTABLE_512_TABLE_LENGTH
71 | };
72 |
73 | const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024 = {
74 | 1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE1024_TABLE_LENGTH
75 | };
76 |
77 | const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048 = {
78 | 2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE2048_TABLE_LENGTH
79 | };
80 |
81 | const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096 = {
82 | 4096, twiddleCoef_4096, armBitRevIndexTable4096, ARMBITREVINDEXTABLE4096_TABLE_LENGTH
83 | };
84 |
85 | #endif
86 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/stm32f4xx.h:
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https://raw.githubusercontent.com/zhutongwen/BLDCM_sine_wave/38fbe51fc5b4b9c8220bf42bd0751e328585845b/Libraries/CMSIS/stm32f4xx.h
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/Libraries/CMSIS/system_stm32f4xx.h:
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1 | /**
2 | ******************************************************************************
3 | * @file system_stm32f4xx.h
4 | * @author MCD Application Team
5 | * @version V1.3.0
6 | * @date 08-November-2013
7 | * @brief CMSIS Cortex-M4 Device System Source File for STM32F4xx devices.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2013 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /** @addtogroup CMSIS
29 | * @{
30 | */
31 |
32 | /** @addtogroup stm32f4xx_system
33 | * @{
34 | */
35 |
36 | /**
37 | * @brief Define to prevent recursive inclusion
38 | */
39 | #ifndef __SYSTEM_STM32F4XX_H
40 | #define __SYSTEM_STM32F4XX_H
41 |
42 | #ifdef __cplusplus
43 | extern "C" {
44 | #endif
45 |
46 | /** @addtogroup STM32F4xx_System_Includes
47 | * @{
48 | */
49 |
50 | /**
51 | * @}
52 | */
53 |
54 |
55 | /** @addtogroup STM32F4xx_System_Exported_types
56 | * @{
57 | */
58 |
59 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
60 |
61 |
62 | /**
63 | * @}
64 | */
65 |
66 | /** @addtogroup STM32F4xx_System_Exported_Constants
67 | * @{
68 | */
69 |
70 | /**
71 | * @}
72 | */
73 |
74 | /** @addtogroup STM32F4xx_System_Exported_Macros
75 | * @{
76 | */
77 |
78 | /**
79 | * @}
80 | */
81 |
82 | /** @addtogroup STM32F4xx_System_Exported_Functions
83 | * @{
84 | */
85 |
86 | extern void SystemInit(void);
87 | extern void SystemCoreClockUpdate(void);
88 | /**
89 | * @}
90 | */
91 |
92 | #ifdef __cplusplus
93 | }
94 | #endif
95 |
96 | #endif /*__SYSTEM_STM32F4XX_H */
97 |
98 | /**
99 | * @}
100 | */
101 |
102 | /**
103 | * @}
104 | */
105 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
106 |
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/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_crc.h:
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1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_crc.h
4 | * @author MCD Application Team
5 | * @version V1.3.0
6 | * @date 08-November-2013
7 | * @brief This file contains all the functions prototypes for the CRC firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2013 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F4xx_CRC_H
31 | #define __STM32F4xx_CRC_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f4xx.h"
39 |
40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup CRC
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 | /* Exported constants --------------------------------------------------------*/
50 |
51 | /** @defgroup CRC_Exported_Constants
52 | * @{
53 | */
54 |
55 | /**
56 | * @}
57 | */
58 |
59 | /* Exported macro ------------------------------------------------------------*/
60 | /* Exported functions --------------------------------------------------------*/
61 |
62 | void CRC_ResetDR(void);
63 | uint32_t CRC_CalcCRC(uint32_t Data);
64 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength);
65 | uint32_t CRC_GetCRC(void);
66 | void CRC_SetIDRegister(uint8_t IDValue);
67 | uint8_t CRC_GetIDRegister(void);
68 |
69 | #ifdef __cplusplus
70 | }
71 | #endif
72 |
73 | #endif /* __STM32F4xx_CRC_H */
74 |
75 | /**
76 | * @}
77 | */
78 |
79 | /**
80 | * @}
81 | */
82 |
83 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
84 |
--------------------------------------------------------------------------------
/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_rng.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_rng.h
4 | * @author MCD Application Team
5 | * @version V1.3.0
6 | * @date 08-November-2013
7 | * @brief This file contains all the functions prototypes for the Random
8 | * Number Generator(RNG) firmware library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2013 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F4xx_RNG_H
31 | #define __STM32F4xx_RNG_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f4xx.h"
39 |
40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup RNG
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 | /* Exported constants --------------------------------------------------------*/
50 |
51 | /** @defgroup RNG_Exported_Constants
52 | * @{
53 | */
54 |
55 | /** @defgroup RNG_flags_definition
56 | * @{
57 | */
58 | #define RNG_FLAG_DRDY ((uint8_t)0x0001) /*!< Data ready */
59 | #define RNG_FLAG_CECS ((uint8_t)0x0002) /*!< Clock error current status */
60 | #define RNG_FLAG_SECS ((uint8_t)0x0004) /*!< Seed error current status */
61 |
62 | #define IS_RNG_GET_FLAG(RNG_FLAG) (((RNG_FLAG) == RNG_FLAG_DRDY) || \
63 | ((RNG_FLAG) == RNG_FLAG_CECS) || \
64 | ((RNG_FLAG) == RNG_FLAG_SECS))
65 | #define IS_RNG_CLEAR_FLAG(RNG_FLAG) (((RNG_FLAG) == RNG_FLAG_CECS) || \
66 | ((RNG_FLAG) == RNG_FLAG_SECS))
67 | /**
68 | * @}
69 | */
70 |
71 | /** @defgroup RNG_interrupts_definition
72 | * @{
73 | */
74 | #define RNG_IT_CEI ((uint8_t)0x20) /*!< Clock error interrupt */
75 | #define RNG_IT_SEI ((uint8_t)0x40) /*!< Seed error interrupt */
76 |
77 | #define IS_RNG_IT(IT) ((((IT) & (uint8_t)0x9F) == 0x00) && ((IT) != 0x00))
78 | #define IS_RNG_GET_IT(RNG_IT) (((RNG_IT) == RNG_IT_CEI) || ((RNG_IT) == RNG_IT_SEI))
79 | /**
80 | * @}
81 | */
82 |
83 | /**
84 | * @}
85 | */
86 |
87 | /* Exported macro ------------------------------------------------------------*/
88 | /* Exported functions --------------------------------------------------------*/
89 |
90 | /* Function used to set the RNG configuration to the default reset state *****/
91 | void RNG_DeInit(void);
92 |
93 | /* Configuration function *****************************************************/
94 | void RNG_Cmd(FunctionalState NewState);
95 |
96 | /* Get 32 bit Random number function ******************************************/
97 | uint32_t RNG_GetRandomNumber(void);
98 |
99 | /* Interrupts and flags management functions **********************************/
100 | void RNG_ITConfig(FunctionalState NewState);
101 | FlagStatus RNG_GetFlagStatus(uint8_t RNG_FLAG);
102 | void RNG_ClearFlag(uint8_t RNG_FLAG);
103 | ITStatus RNG_GetITStatus(uint8_t RNG_IT);
104 | void RNG_ClearITPendingBit(uint8_t RNG_IT);
105 |
106 | #ifdef __cplusplus
107 | }
108 | #endif
109 |
110 | #endif /*__STM32F4xx_RNG_H */
111 |
112 | /**
113 | * @}
114 | */
115 |
116 | /**
117 | * @}
118 | */
119 |
120 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
121 |
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/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_wwdg.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_wwdg.h
4 | * @author MCD Application Team
5 | * @version V1.3.0
6 | * @date 08-November-2013
7 | * @brief This file contains all the functions prototypes for the WWDG firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2013 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F4xx_WWDG_H
31 | #define __STM32F4xx_WWDG_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f4xx.h"
39 |
40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup WWDG
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 | /* Exported constants --------------------------------------------------------*/
50 |
51 | /** @defgroup WWDG_Exported_Constants
52 | * @{
53 | */
54 |
55 | /** @defgroup WWDG_Prescaler
56 | * @{
57 | */
58 |
59 | #define WWDG_Prescaler_1 ((uint32_t)0x00000000)
60 | #define WWDG_Prescaler_2 ((uint32_t)0x00000080)
61 | #define WWDG_Prescaler_4 ((uint32_t)0x00000100)
62 | #define WWDG_Prescaler_8 ((uint32_t)0x00000180)
63 | #define IS_WWDG_PRESCALER(PRESCALER) (((PRESCALER) == WWDG_Prescaler_1) || \
64 | ((PRESCALER) == WWDG_Prescaler_2) || \
65 | ((PRESCALER) == WWDG_Prescaler_4) || \
66 | ((PRESCALER) == WWDG_Prescaler_8))
67 | #define IS_WWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0x7F)
68 | #define IS_WWDG_COUNTER(COUNTER) (((COUNTER) >= 0x40) && ((COUNTER) <= 0x7F))
69 |
70 | /**
71 | * @}
72 | */
73 |
74 | /**
75 | * @}
76 | */
77 |
78 | /* Exported macro ------------------------------------------------------------*/
79 | /* Exported functions --------------------------------------------------------*/
80 |
81 | /* Function used to set the WWDG configuration to the default reset state ****/
82 | void WWDG_DeInit(void);
83 |
84 | /* Prescaler, Refresh window and Counter configuration functions **************/
85 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler);
86 | void WWDG_SetWindowValue(uint8_t WindowValue);
87 | void WWDG_EnableIT(void);
88 | void WWDG_SetCounter(uint8_t Counter);
89 |
90 | /* WWDG activation function ***************************************************/
91 | void WWDG_Enable(uint8_t Counter);
92 |
93 | /* Interrupts and flags management functions **********************************/
94 | FlagStatus WWDG_GetFlagStatus(void);
95 | void WWDG_ClearFlag(void);
96 |
97 | #ifdef __cplusplus
98 | }
99 | #endif
100 |
101 | #endif /* __STM32F4xx_WWDG_H */
102 |
103 | /**
104 | * @}
105 | */
106 |
107 | /**
108 | * @}
109 | */
110 |
111 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
112 |
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/Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_crc.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_crc.c
4 | * @author MCD Application Team
5 | * @version V1.3.0
6 | * @date 08-November-2013
7 | * @brief This file provides all the CRC firmware functions.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2013 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /* Includes ------------------------------------------------------------------*/
29 | #include "stm32f4xx_crc.h"
30 |
31 | /** @addtogroup STM32F4xx_StdPeriph_Driver
32 | * @{
33 | */
34 |
35 | /** @defgroup CRC
36 | * @brief CRC driver modules
37 | * @{
38 | */
39 |
40 | /* Private typedef -----------------------------------------------------------*/
41 | /* Private define ------------------------------------------------------------*/
42 | /* Private macro -------------------------------------------------------------*/
43 | /* Private variables ---------------------------------------------------------*/
44 | /* Private function prototypes -----------------------------------------------*/
45 | /* Private functions ---------------------------------------------------------*/
46 |
47 | /** @defgroup CRC_Private_Functions
48 | * @{
49 | */
50 |
51 | /**
52 | * @brief Resets the CRC Data register (DR).
53 | * @param None
54 | * @retval None
55 | */
56 | void CRC_ResetDR(void)
57 | {
58 | /* Reset CRC generator */
59 | CRC->CR = CRC_CR_RESET;
60 | }
61 |
62 | /**
63 | * @brief Computes the 32-bit CRC of a given data word(32-bit).
64 | * @param Data: data word(32-bit) to compute its CRC
65 | * @retval 32-bit CRC
66 | */
67 | uint32_t CRC_CalcCRC(uint32_t Data)
68 | {
69 | CRC->DR = Data;
70 |
71 | return (CRC->DR);
72 | }
73 |
74 | /**
75 | * @brief Computes the 32-bit CRC of a given buffer of data word(32-bit).
76 | * @param pBuffer: pointer to the buffer containing the data to be computed
77 | * @param BufferLength: length of the buffer to be computed
78 | * @retval 32-bit CRC
79 | */
80 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength)
81 | {
82 | uint32_t index = 0;
83 |
84 | for(index = 0; index < BufferLength; index++)
85 | {
86 | CRC->DR = pBuffer[index];
87 | }
88 | return (CRC->DR);
89 | }
90 |
91 | /**
92 | * @brief Returns the current CRC value.
93 | * @param None
94 | * @retval 32-bit CRC
95 | */
96 | uint32_t CRC_GetCRC(void)
97 | {
98 | return (CRC->DR);
99 | }
100 |
101 | /**
102 | * @brief Stores a 8-bit data in the Independent Data(ID) register.
103 | * @param IDValue: 8-bit value to be stored in the ID register
104 | * @retval None
105 | */
106 | void CRC_SetIDRegister(uint8_t IDValue)
107 | {
108 | CRC->IDR = IDValue;
109 | }
110 |
111 | /**
112 | * @brief Returns the 8-bit data stored in the Independent Data(ID) register
113 | * @param None
114 | * @retval 8-bit value of the ID register
115 | */
116 | uint8_t CRC_GetIDRegister(void)
117 | {
118 | return (CRC->IDR);
119 | }
120 |
121 | /**
122 | * @}
123 | */
124 |
125 | /**
126 | * @}
127 | */
128 |
129 | /**
130 | * @}
131 | */
132 |
133 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
134 |
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/Project/ClearFile.bat:
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1 | del *.bak /s
2 | del *.ddk /s
3 | del *.edk /s
4 | del *.lst /s
5 | del *.lnp /s
6 | del *.mpf /s
7 | del *.mpj /s
8 | del *.obj /s
9 | del *.omf /s
10 | del *.opt /s
11 | del *.plg /s
12 | del *.rpt /s
13 | del *.tmp /s
14 | del *.__i /s
15 | del *.crf /s
16 | del *.o /s
17 | del *.d /s
18 | del *.axf /s
19 | del *.tra /s
20 | del *.dep /s
21 | del JLinkLog.txt /s
22 |
23 | del *.iex /s
24 | del *.htm /s
25 | del *.sct /s
26 | del *.hex /s
27 | del *.map /s
28 | del JLinkSettings.ini /s
29 | exit
30 |
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/Project/EventRecorderStub.scvd:
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1 |
2 |
3 |
4 |
5 |
6 |
7 |
8 |
9 |
10 |
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/Project/JLinkLog.txt:
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/Project/JLinkSettings.ini:
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1 | [BREAKPOINTS]
2 | ForceImpTypeAny = 0
3 | ShowInfoWin = 1
4 | EnableFlashBP = 2
5 | BPDuringExecution = 0
6 | [CFI]
7 | CFISize = 0x00
8 | CFIAddr = 0x00
9 | [CPU]
10 | OverrideMemMap = 0
11 | AllowSimulation = 1
12 | ScriptFile=""
13 | [FLASH]
14 | CacheExcludeSize = 0x00
15 | CacheExcludeAddr = 0x00
16 | MinNumBytesFlashDL = 0
17 | SkipProgOnCRCMatch = 1
18 | VerifyDownload = 1
19 | AllowCaching = 1
20 | EnableFlashDL = 2
21 | Override = 0
22 | Device="UNSPECIFIED"
23 | [GENERAL]
24 | WorkRAMSize = 0x00
25 | WorkRAMAddr = 0x00
26 | RAMUsageLimit = 0x00
27 | [SWO]
28 | SWOLogFile=""
29 | [MEM]
30 | RdOverrideOrMask = 0x00
31 | RdOverrideAndMask = 0xFFFFFFFF
32 | RdOverrideAddr = 0xFFFFFFFF
33 | WrOverrideOrMask = 0x00
34 | WrOverrideAndMask = 0xFFFFFFFF
35 | WrOverrideAddr = 0xFFFFFFFF
36 |
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/Project/Obj/ExtDll.iex:
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1 | [EXTDLL]
2 | Count=0
3 |
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/Project/Obj/STM32F405RGT.axf:
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/Project/Obj/STM32F405RGT.build_log.htm:
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/Project/Obj/STM32F405RGT.lnp:
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1 | --cpu=Cortex-M4.fp
2 | ".\obj\startup_stm32f40xx.o"
3 | ".\obj\system_stm32f4xx.o"
4 | ".\obj\misc.o"
5 | ".\obj\stm32f4xx_rcc.o"
6 | ".\obj\stm32f4xx_dma.o"
7 | ".\obj\stm32f4xx_flash.o"
8 | ".\obj\stm32f4xx_gpio.o"
9 | ".\obj\stm32f4xx_usart.o"
10 | ".\obj\stm32f4xx_tim.o"
11 | ".\obj\stm32f4xx_spi.o"
12 | ".\obj\stm32f4xx_i2c.o"
13 | ".\obj\stm32f4xx_fsmc.o"
14 | ".\obj\stm32f4xx_adc.o"
15 | "..\Libraries\arm_cortexM4lf_math.lib"
16 | ".\obj\motor_control.o"
17 | ".\obj\stm32f4xx_it.o"
18 | ".\obj\main.o"
19 | ".\obj\adc.o"
20 | ".\obj\tim.o"
21 | ".\obj\usart.o"
22 | ".\obj\bsp.o"
23 | ".\obj\mpu6500.o"
24 | --library_type=microlib --strict --scatter ".\Obj\STM32F405RGT.sct"
25 | --summary_stderr --info summarysizes --map --xref --callgraph --symbols
26 | --info sizes --info totals --info unused --info veneers
27 | --list ".\List\STM32F405RGT.map" -o .\Obj\STM32F405RGT.axf
--------------------------------------------------------------------------------
/Project/Obj/STM32F405RGT.sct:
--------------------------------------------------------------------------------
1 | ; *************************************************************
2 | ; *** Scatter-Loading Description File generated by uVision ***
3 | ; *************************************************************
4 |
5 | LR_IROM1 0x08000000 0x00100000 { ; load region size_region
6 | ER_IROM1 0x08000000 0x00100000 { ; load address = execution address
7 | *.o (RESET, +First)
8 | *(InRoot$$Sections)
9 | .ANY (+RO)
10 | }
11 | RW_IRAM1 0x20000000 0x00020000 { ; RW data
12 | .ANY (+RW +ZI)
13 | }
14 | }
15 |
16 |
--------------------------------------------------------------------------------
/Project/Obj/adc.crf:
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https://raw.githubusercontent.com/zhutongwen/BLDCM_sine_wave/38fbe51fc5b4b9c8220bf42bd0751e328585845b/Project/Obj/adc.crf
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/Project/Obj/adc.d:
--------------------------------------------------------------------------------
1 | .\obj\adc.o: ..\user\adc.c
2 | .\obj\adc.o: ..\user\stm32f4_system.h
3 | .\obj\adc.o: ..\Libraries\CMSIS\stm32f4xx.h
4 | .\obj\adc.o: ..\Libraries\CMSIS\core_cm4.h
5 | .\obj\adc.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
6 | .\obj\adc.o: ..\Libraries\CMSIS\core_cmInstr.h
7 | .\obj\adc.o: ..\Libraries\CMSIS\core_cmFunc.h
8 | .\obj\adc.o: ..\Libraries\CMSIS\core_cm4_simd.h
9 | .\obj\adc.o: ..\Libraries\CMSIS\system_stm32f4xx.h
10 | .\obj\adc.o: ..\user\stm32f4xx_conf.h
11 | .\obj\adc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\misc.h
12 | .\obj\adc.o: ..\Libraries\CMSIS\stm32f4xx.h
13 | .\obj\adc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_dma.h
14 | .\obj\adc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_flash.h
15 | .\obj\adc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_gpio.h
16 | .\obj\adc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_i2c.h
17 | .\obj\adc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_rcc.h
18 | .\obj\adc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_spi.h
19 | .\obj\adc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_syscfg.h
20 | .\obj\adc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_tim.h
21 | .\obj\adc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_usart.h
22 | .\obj\adc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_adc.h
23 | .\obj\adc.o: ..\user\adc.h
24 |
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/Project/Obj/adc.o:
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/Project/Obj/bsp.crf:
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https://raw.githubusercontent.com/zhutongwen/BLDCM_sine_wave/38fbe51fc5b4b9c8220bf42bd0751e328585845b/Project/Obj/bsp.crf
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/Project/Obj/bsp.d:
--------------------------------------------------------------------------------
1 | .\obj\bsp.o: ..\user\bsp.c
2 | .\obj\bsp.o: ..\user\stm32f4_system.h
3 | .\obj\bsp.o: ..\Libraries\CMSIS\stm32f4xx.h
4 | .\obj\bsp.o: ..\Libraries\CMSIS\core_cm4.h
5 | .\obj\bsp.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
6 | .\obj\bsp.o: ..\Libraries\CMSIS\core_cmInstr.h
7 | .\obj\bsp.o: ..\Libraries\CMSIS\core_cmFunc.h
8 | .\obj\bsp.o: ..\Libraries\CMSIS\core_cm4_simd.h
9 | .\obj\bsp.o: ..\Libraries\CMSIS\system_stm32f4xx.h
10 | .\obj\bsp.o: ..\user\stm32f4xx_conf.h
11 | .\obj\bsp.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\misc.h
12 | .\obj\bsp.o: ..\Libraries\CMSIS\stm32f4xx.h
13 | .\obj\bsp.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_dma.h
14 | .\obj\bsp.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_flash.h
15 | .\obj\bsp.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_gpio.h
16 | .\obj\bsp.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_i2c.h
17 | .\obj\bsp.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_rcc.h
18 | .\obj\bsp.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_spi.h
19 | .\obj\bsp.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_syscfg.h
20 | .\obj\bsp.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_tim.h
21 | .\obj\bsp.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_usart.h
22 | .\obj\bsp.o: ..\user\bsp.h
23 |
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/Project/Obj/bsp.o:
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/Project/Obj/main.crf:
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/Project/Obj/main.d:
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1 | .\obj\main.o: ..\user\main.c
2 | .\obj\main.o: ..\user\stm32f4_system.h
3 | .\obj\main.o: ..\Libraries\CMSIS\stm32f4xx.h
4 | .\obj\main.o: ..\Libraries\CMSIS\core_cm4.h
5 | .\obj\main.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
6 | .\obj\main.o: ..\Libraries\CMSIS\core_cmInstr.h
7 | .\obj\main.o: ..\Libraries\CMSIS\core_cmFunc.h
8 | .\obj\main.o: ..\Libraries\CMSIS\core_cm4_simd.h
9 | .\obj\main.o: ..\Libraries\CMSIS\system_stm32f4xx.h
10 | .\obj\main.o: ..\user\stm32f4xx_conf.h
11 | .\obj\main.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\misc.h
12 | .\obj\main.o: ..\Libraries\CMSIS\stm32f4xx.h
13 | .\obj\main.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_dma.h
14 | .\obj\main.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_flash.h
15 | .\obj\main.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_gpio.h
16 | .\obj\main.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_i2c.h
17 | .\obj\main.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_rcc.h
18 | .\obj\main.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_spi.h
19 | .\obj\main.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_syscfg.h
20 | .\obj\main.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_tim.h
21 | .\obj\main.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_usart.h
22 | .\obj\main.o: ..\user\bsp.h
23 | .\obj\main.o: ..\user\usart.h
24 | .\obj\main.o: ..\user\adc.h
25 | .\obj\main.o: ..\user\tim.h
26 | .\obj\main.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\math.h
27 | .\obj\main.o: ..\user\motor_control.h
28 | .\obj\main.o: ..\user\mpu6500.h
29 | .\obj\main.o: ..\Libraries\CMSIS\arm_math.h
30 | .\obj\main.o: ..\Libraries\CMSIS\core_cm4.h
31 | .\obj\main.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
32 |
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/Project/Obj/main.o:
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/Project/Obj/misc.crf:
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/Project/Obj/misc.d:
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1 | .\obj\misc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\src\misc.c
2 | .\obj\misc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\misc.h
3 | .\obj\misc.o: ..\Libraries\CMSIS\stm32f4xx.h
4 | .\obj\misc.o: ..\Libraries\CMSIS\core_cm4.h
5 | .\obj\misc.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
6 | .\obj\misc.o: ..\Libraries\CMSIS\core_cmInstr.h
7 | .\obj\misc.o: ..\Libraries\CMSIS\core_cmFunc.h
8 | .\obj\misc.o: ..\Libraries\CMSIS\core_cm4_simd.h
9 | .\obj\misc.o: ..\Libraries\CMSIS\system_stm32f4xx.h
10 | .\obj\misc.o: ..\user\stm32f4xx_conf.h
11 | .\obj\misc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\misc.h
12 | .\obj\misc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_dma.h
13 | .\obj\misc.o: ..\Libraries\CMSIS\stm32f4xx.h
14 | .\obj\misc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_flash.h
15 | .\obj\misc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_gpio.h
16 | .\obj\misc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_i2c.h
17 | .\obj\misc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_rcc.h
18 | .\obj\misc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_spi.h
19 | .\obj\misc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_syscfg.h
20 | .\obj\misc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_tim.h
21 | .\obj\misc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_usart.h
22 |
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/Project/Obj/misc.o:
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/Project/Obj/motor_control.crf:
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/Project/Obj/motor_control.d:
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1 | .\obj\motor_control.o: ..\user\motor_control.c
2 | .\obj\motor_control.o: ..\user\motor_control.h
3 | .\obj\motor_control.o: ..\Libraries\CMSIS\stm32f4xx.h
4 | .\obj\motor_control.o: ..\Libraries\CMSIS\core_cm4.h
5 | .\obj\motor_control.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
6 | .\obj\motor_control.o: ..\Libraries\CMSIS\core_cmInstr.h
7 | .\obj\motor_control.o: ..\Libraries\CMSIS\core_cmFunc.h
8 | .\obj\motor_control.o: ..\Libraries\CMSIS\core_cm4_simd.h
9 | .\obj\motor_control.o: ..\Libraries\CMSIS\system_stm32f4xx.h
10 | .\obj\motor_control.o: ..\user\stm32f4xx_conf.h
11 | .\obj\motor_control.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\misc.h
12 | .\obj\motor_control.o: ..\Libraries\CMSIS\stm32f4xx.h
13 | .\obj\motor_control.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_dma.h
14 | .\obj\motor_control.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_flash.h
15 | .\obj\motor_control.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_gpio.h
16 | .\obj\motor_control.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_i2c.h
17 | .\obj\motor_control.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_rcc.h
18 | .\obj\motor_control.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_spi.h
19 | .\obj\motor_control.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_syscfg.h
20 | .\obj\motor_control.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_tim.h
21 | .\obj\motor_control.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_usart.h
22 | .\obj\motor_control.o: ..\user\bsp.h
23 | .\obj\motor_control.o: ..\user\stm32f4_system.h
24 | .\obj\motor_control.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\math.h
25 | .\obj\motor_control.o: ..\user\adc.h
26 | .\obj\motor_control.o: ..\Libraries\CMSIS\arm_math.h
27 | .\obj\motor_control.o: ..\Libraries\CMSIS\core_cm4.h
28 | .\obj\motor_control.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
29 |
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/Project/Obj/motor_control.o:
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/Project/Obj/mpu6500.crf:
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/Project/Obj/mpu6500.d:
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1 | .\obj\mpu6500.o: ..\user\mpu6500.c
2 | .\obj\mpu6500.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_spi.h
3 | .\obj\mpu6500.o: ..\Libraries\CMSIS\stm32f4xx.h
4 | .\obj\mpu6500.o: ..\Libraries\CMSIS\core_cm4.h
5 | .\obj\mpu6500.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
6 | .\obj\mpu6500.o: ..\Libraries\CMSIS\core_cmInstr.h
7 | .\obj\mpu6500.o: ..\Libraries\CMSIS\core_cmFunc.h
8 | .\obj\mpu6500.o: ..\Libraries\CMSIS\core_cm4_simd.h
9 | .\obj\mpu6500.o: ..\Libraries\CMSIS\system_stm32f4xx.h
10 | .\obj\mpu6500.o: ..\user\stm32f4xx_conf.h
11 | .\obj\mpu6500.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\misc.h
12 | .\obj\mpu6500.o: ..\Libraries\CMSIS\stm32f4xx.h
13 | .\obj\mpu6500.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_dma.h
14 | .\obj\mpu6500.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_flash.h
15 | .\obj\mpu6500.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_gpio.h
16 | .\obj\mpu6500.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_i2c.h
17 | .\obj\mpu6500.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_rcc.h
18 | .\obj\mpu6500.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_spi.h
19 | .\obj\mpu6500.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_syscfg.h
20 | .\obj\mpu6500.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_tim.h
21 | .\obj\mpu6500.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_usart.h
22 | .\obj\mpu6500.o: ..\user\mpu6500.h
23 | .\obj\mpu6500.o: ..\user\stm32f4_system.h
24 |
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/Project/Obj/mpu6500.o:
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/Project/Obj/startup_stm32f40xx.d:
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1 | .\obj\startup_stm32f40xx.o: ..\Libraries\CMSIS\startup_stm32f40xx.s
2 |
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/Project/Obj/startup_stm32f40xx.o:
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/Project/Obj/stm32f4xx_adc.crf:
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/Project/Obj/stm32f4xx_adc.d:
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1 | .\obj\stm32f4xx_adc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_adc.c
2 | .\obj\stm32f4xx_adc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_adc.h
3 | .\obj\stm32f4xx_adc.o: ..\Libraries\CMSIS\stm32f4xx.h
4 | .\obj\stm32f4xx_adc.o: ..\Libraries\CMSIS\core_cm4.h
5 | .\obj\stm32f4xx_adc.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
6 | .\obj\stm32f4xx_adc.o: ..\Libraries\CMSIS\core_cmInstr.h
7 | .\obj\stm32f4xx_adc.o: ..\Libraries\CMSIS\core_cmFunc.h
8 | .\obj\stm32f4xx_adc.o: ..\Libraries\CMSIS\core_cm4_simd.h
9 | .\obj\stm32f4xx_adc.o: ..\Libraries\CMSIS\system_stm32f4xx.h
10 | .\obj\stm32f4xx_adc.o: ..\user\stm32f4xx_conf.h
11 | .\obj\stm32f4xx_adc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\misc.h
12 | .\obj\stm32f4xx_adc.o: ..\Libraries\CMSIS\stm32f4xx.h
13 | .\obj\stm32f4xx_adc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_dma.h
14 | .\obj\stm32f4xx_adc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_flash.h
15 | .\obj\stm32f4xx_adc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_gpio.h
16 | .\obj\stm32f4xx_adc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_i2c.h
17 | .\obj\stm32f4xx_adc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_rcc.h
18 | .\obj\stm32f4xx_adc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_spi.h
19 | .\obj\stm32f4xx_adc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_syscfg.h
20 | .\obj\stm32f4xx_adc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_tim.h
21 | .\obj\stm32f4xx_adc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_usart.h
22 |
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/Project/Obj/stm32f4xx_adc.o:
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/Project/Obj/stm32f4xx_dma.crf:
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/Project/Obj/stm32f4xx_dma.d:
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1 | .\obj\stm32f4xx_dma.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_dma.c
2 | .\obj\stm32f4xx_dma.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_dma.h
3 | .\obj\stm32f4xx_dma.o: ..\Libraries\CMSIS\stm32f4xx.h
4 | .\obj\stm32f4xx_dma.o: ..\Libraries\CMSIS\core_cm4.h
5 | .\obj\stm32f4xx_dma.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
6 | .\obj\stm32f4xx_dma.o: ..\Libraries\CMSIS\core_cmInstr.h
7 | .\obj\stm32f4xx_dma.o: ..\Libraries\CMSIS\core_cmFunc.h
8 | .\obj\stm32f4xx_dma.o: ..\Libraries\CMSIS\core_cm4_simd.h
9 | .\obj\stm32f4xx_dma.o: ..\Libraries\CMSIS\system_stm32f4xx.h
10 | .\obj\stm32f4xx_dma.o: ..\user\stm32f4xx_conf.h
11 | .\obj\stm32f4xx_dma.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\misc.h
12 | .\obj\stm32f4xx_dma.o: ..\Libraries\CMSIS\stm32f4xx.h
13 | .\obj\stm32f4xx_dma.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_dma.h
14 | .\obj\stm32f4xx_dma.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_flash.h
15 | .\obj\stm32f4xx_dma.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_gpio.h
16 | .\obj\stm32f4xx_dma.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_i2c.h
17 | .\obj\stm32f4xx_dma.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_rcc.h
18 | .\obj\stm32f4xx_dma.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_spi.h
19 | .\obj\stm32f4xx_dma.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_syscfg.h
20 | .\obj\stm32f4xx_dma.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_tim.h
21 | .\obj\stm32f4xx_dma.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_usart.h
22 |
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/Project/Obj/stm32f4xx_flash.d:
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1 | .\obj\stm32f4xx_flash.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_flash.c
2 | .\obj\stm32f4xx_flash.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_flash.h
3 | .\obj\stm32f4xx_flash.o: ..\Libraries\CMSIS\stm32f4xx.h
4 | .\obj\stm32f4xx_flash.o: ..\Libraries\CMSIS\core_cm4.h
5 | .\obj\stm32f4xx_flash.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
6 | .\obj\stm32f4xx_flash.o: ..\Libraries\CMSIS\core_cmInstr.h
7 | .\obj\stm32f4xx_flash.o: ..\Libraries\CMSIS\core_cmFunc.h
8 | .\obj\stm32f4xx_flash.o: ..\Libraries\CMSIS\core_cm4_simd.h
9 | .\obj\stm32f4xx_flash.o: ..\Libraries\CMSIS\system_stm32f4xx.h
10 | .\obj\stm32f4xx_flash.o: ..\user\stm32f4xx_conf.h
11 | .\obj\stm32f4xx_flash.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\misc.h
12 | .\obj\stm32f4xx_flash.o: ..\Libraries\CMSIS\stm32f4xx.h
13 | .\obj\stm32f4xx_flash.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_dma.h
14 | .\obj\stm32f4xx_flash.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_flash.h
15 | .\obj\stm32f4xx_flash.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_gpio.h
16 | .\obj\stm32f4xx_flash.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_i2c.h
17 | .\obj\stm32f4xx_flash.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_rcc.h
18 | .\obj\stm32f4xx_flash.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_spi.h
19 | .\obj\stm32f4xx_flash.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_syscfg.h
20 | .\obj\stm32f4xx_flash.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_tim.h
21 | .\obj\stm32f4xx_flash.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_usart.h
22 |
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/Project/Obj/stm32f4xx_fsmc.d:
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1 | .\obj\stm32f4xx_fsmc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_fsmc.c
2 | .\obj\stm32f4xx_fsmc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_fsmc.h
3 | .\obj\stm32f4xx_fsmc.o: ..\Libraries\CMSIS\stm32f4xx.h
4 | .\obj\stm32f4xx_fsmc.o: ..\Libraries\CMSIS\core_cm4.h
5 | .\obj\stm32f4xx_fsmc.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
6 | .\obj\stm32f4xx_fsmc.o: ..\Libraries\CMSIS\core_cmInstr.h
7 | .\obj\stm32f4xx_fsmc.o: ..\Libraries\CMSIS\core_cmFunc.h
8 | .\obj\stm32f4xx_fsmc.o: ..\Libraries\CMSIS\core_cm4_simd.h
9 | .\obj\stm32f4xx_fsmc.o: ..\Libraries\CMSIS\system_stm32f4xx.h
10 | .\obj\stm32f4xx_fsmc.o: ..\user\stm32f4xx_conf.h
11 | .\obj\stm32f4xx_fsmc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\misc.h
12 | .\obj\stm32f4xx_fsmc.o: ..\Libraries\CMSIS\stm32f4xx.h
13 | .\obj\stm32f4xx_fsmc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_dma.h
14 | .\obj\stm32f4xx_fsmc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_flash.h
15 | .\obj\stm32f4xx_fsmc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_gpio.h
16 | .\obj\stm32f4xx_fsmc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_i2c.h
17 | .\obj\stm32f4xx_fsmc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_rcc.h
18 | .\obj\stm32f4xx_fsmc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_spi.h
19 | .\obj\stm32f4xx_fsmc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_syscfg.h
20 | .\obj\stm32f4xx_fsmc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_tim.h
21 | .\obj\stm32f4xx_fsmc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_usart.h
22 |
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/Project/Obj/stm32f4xx_gpio.d:
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1 | .\obj\stm32f4xx_gpio.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_gpio.c
2 | .\obj\stm32f4xx_gpio.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_gpio.h
3 | .\obj\stm32f4xx_gpio.o: ..\Libraries\CMSIS\stm32f4xx.h
4 | .\obj\stm32f4xx_gpio.o: ..\Libraries\CMSIS\core_cm4.h
5 | .\obj\stm32f4xx_gpio.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
6 | .\obj\stm32f4xx_gpio.o: ..\Libraries\CMSIS\core_cmInstr.h
7 | .\obj\stm32f4xx_gpio.o: ..\Libraries\CMSIS\core_cmFunc.h
8 | .\obj\stm32f4xx_gpio.o: ..\Libraries\CMSIS\core_cm4_simd.h
9 | .\obj\stm32f4xx_gpio.o: ..\Libraries\CMSIS\system_stm32f4xx.h
10 | .\obj\stm32f4xx_gpio.o: ..\user\stm32f4xx_conf.h
11 | .\obj\stm32f4xx_gpio.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\misc.h
12 | .\obj\stm32f4xx_gpio.o: ..\Libraries\CMSIS\stm32f4xx.h
13 | .\obj\stm32f4xx_gpio.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_dma.h
14 | .\obj\stm32f4xx_gpio.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_flash.h
15 | .\obj\stm32f4xx_gpio.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_gpio.h
16 | .\obj\stm32f4xx_gpio.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_i2c.h
17 | .\obj\stm32f4xx_gpio.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_rcc.h
18 | .\obj\stm32f4xx_gpio.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_spi.h
19 | .\obj\stm32f4xx_gpio.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_syscfg.h
20 | .\obj\stm32f4xx_gpio.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_tim.h
21 | .\obj\stm32f4xx_gpio.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_usart.h
22 |
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/Project/Obj/stm32f4xx_i2c.d:
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1 | .\obj\stm32f4xx_i2c.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_i2c.c
2 | .\obj\stm32f4xx_i2c.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_i2c.h
3 | .\obj\stm32f4xx_i2c.o: ..\Libraries\CMSIS\stm32f4xx.h
4 | .\obj\stm32f4xx_i2c.o: ..\Libraries\CMSIS\core_cm4.h
5 | .\obj\stm32f4xx_i2c.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
6 | .\obj\stm32f4xx_i2c.o: ..\Libraries\CMSIS\core_cmInstr.h
7 | .\obj\stm32f4xx_i2c.o: ..\Libraries\CMSIS\core_cmFunc.h
8 | .\obj\stm32f4xx_i2c.o: ..\Libraries\CMSIS\core_cm4_simd.h
9 | .\obj\stm32f4xx_i2c.o: ..\Libraries\CMSIS\system_stm32f4xx.h
10 | .\obj\stm32f4xx_i2c.o: ..\user\stm32f4xx_conf.h
11 | .\obj\stm32f4xx_i2c.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\misc.h
12 | .\obj\stm32f4xx_i2c.o: ..\Libraries\CMSIS\stm32f4xx.h
13 | .\obj\stm32f4xx_i2c.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_dma.h
14 | .\obj\stm32f4xx_i2c.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_flash.h
15 | .\obj\stm32f4xx_i2c.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_gpio.h
16 | .\obj\stm32f4xx_i2c.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_i2c.h
17 | .\obj\stm32f4xx_i2c.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_rcc.h
18 | .\obj\stm32f4xx_i2c.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_spi.h
19 | .\obj\stm32f4xx_i2c.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_syscfg.h
20 | .\obj\stm32f4xx_i2c.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_tim.h
21 | .\obj\stm32f4xx_i2c.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_usart.h
22 |
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/Project/Obj/stm32f4xx_it.d:
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1 | .\obj\stm32f4xx_it.o: ..\user\stm32f4xx_it.c
2 | .\obj\stm32f4xx_it.o: ..\user\stm32f4_system.h
3 | .\obj\stm32f4xx_it.o: ..\Libraries\CMSIS\stm32f4xx.h
4 | .\obj\stm32f4xx_it.o: ..\Libraries\CMSIS\core_cm4.h
5 | .\obj\stm32f4xx_it.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
6 | .\obj\stm32f4xx_it.o: ..\Libraries\CMSIS\core_cmInstr.h
7 | .\obj\stm32f4xx_it.o: ..\Libraries\CMSIS\core_cmFunc.h
8 | .\obj\stm32f4xx_it.o: ..\Libraries\CMSIS\core_cm4_simd.h
9 | .\obj\stm32f4xx_it.o: ..\Libraries\CMSIS\system_stm32f4xx.h
10 | .\obj\stm32f4xx_it.o: ..\user\stm32f4xx_conf.h
11 | .\obj\stm32f4xx_it.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\misc.h
12 | .\obj\stm32f4xx_it.o: ..\Libraries\CMSIS\stm32f4xx.h
13 | .\obj\stm32f4xx_it.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_dma.h
14 | .\obj\stm32f4xx_it.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_flash.h
15 | .\obj\stm32f4xx_it.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_gpio.h
16 | .\obj\stm32f4xx_it.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_i2c.h
17 | .\obj\stm32f4xx_it.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_rcc.h
18 | .\obj\stm32f4xx_it.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_spi.h
19 | .\obj\stm32f4xx_it.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_syscfg.h
20 | .\obj\stm32f4xx_it.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_tim.h
21 | .\obj\stm32f4xx_it.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_usart.h
22 |
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/Project/Obj/stm32f4xx_rcc.d:
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1 | .\obj\stm32f4xx_rcc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_rcc.c
2 | .\obj\stm32f4xx_rcc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_rcc.h
3 | .\obj\stm32f4xx_rcc.o: ..\Libraries\CMSIS\stm32f4xx.h
4 | .\obj\stm32f4xx_rcc.o: ..\Libraries\CMSIS\core_cm4.h
5 | .\obj\stm32f4xx_rcc.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
6 | .\obj\stm32f4xx_rcc.o: ..\Libraries\CMSIS\core_cmInstr.h
7 | .\obj\stm32f4xx_rcc.o: ..\Libraries\CMSIS\core_cmFunc.h
8 | .\obj\stm32f4xx_rcc.o: ..\Libraries\CMSIS\core_cm4_simd.h
9 | .\obj\stm32f4xx_rcc.o: ..\Libraries\CMSIS\system_stm32f4xx.h
10 | .\obj\stm32f4xx_rcc.o: ..\user\stm32f4xx_conf.h
11 | .\obj\stm32f4xx_rcc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\misc.h
12 | .\obj\stm32f4xx_rcc.o: ..\Libraries\CMSIS\stm32f4xx.h
13 | .\obj\stm32f4xx_rcc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_dma.h
14 | .\obj\stm32f4xx_rcc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_flash.h
15 | .\obj\stm32f4xx_rcc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_gpio.h
16 | .\obj\stm32f4xx_rcc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_i2c.h
17 | .\obj\stm32f4xx_rcc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_rcc.h
18 | .\obj\stm32f4xx_rcc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_spi.h
19 | .\obj\stm32f4xx_rcc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_syscfg.h
20 | .\obj\stm32f4xx_rcc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_tim.h
21 | .\obj\stm32f4xx_rcc.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_usart.h
22 |
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/Project/Obj/stm32f4xx_spi.d:
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1 | .\obj\stm32f4xx_spi.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_spi.c
2 | .\obj\stm32f4xx_spi.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_spi.h
3 | .\obj\stm32f4xx_spi.o: ..\Libraries\CMSIS\stm32f4xx.h
4 | .\obj\stm32f4xx_spi.o: ..\Libraries\CMSIS\core_cm4.h
5 | .\obj\stm32f4xx_spi.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
6 | .\obj\stm32f4xx_spi.o: ..\Libraries\CMSIS\core_cmInstr.h
7 | .\obj\stm32f4xx_spi.o: ..\Libraries\CMSIS\core_cmFunc.h
8 | .\obj\stm32f4xx_spi.o: ..\Libraries\CMSIS\core_cm4_simd.h
9 | .\obj\stm32f4xx_spi.o: ..\Libraries\CMSIS\system_stm32f4xx.h
10 | .\obj\stm32f4xx_spi.o: ..\user\stm32f4xx_conf.h
11 | .\obj\stm32f4xx_spi.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\misc.h
12 | .\obj\stm32f4xx_spi.o: ..\Libraries\CMSIS\stm32f4xx.h
13 | .\obj\stm32f4xx_spi.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_dma.h
14 | .\obj\stm32f4xx_spi.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_flash.h
15 | .\obj\stm32f4xx_spi.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_gpio.h
16 | .\obj\stm32f4xx_spi.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_i2c.h
17 | .\obj\stm32f4xx_spi.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_rcc.h
18 | .\obj\stm32f4xx_spi.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_spi.h
19 | .\obj\stm32f4xx_spi.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_syscfg.h
20 | .\obj\stm32f4xx_spi.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_tim.h
21 | .\obj\stm32f4xx_spi.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_usart.h
22 |
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https://raw.githubusercontent.com/zhutongwen/BLDCM_sine_wave/38fbe51fc5b4b9c8220bf42bd0751e328585845b/Project/Obj/stm32f4xx_tim.crf
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/Project/Obj/stm32f4xx_tim.d:
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1 | .\obj\stm32f4xx_tim.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_tim.c
2 | .\obj\stm32f4xx_tim.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_tim.h
3 | .\obj\stm32f4xx_tim.o: ..\Libraries\CMSIS\stm32f4xx.h
4 | .\obj\stm32f4xx_tim.o: ..\Libraries\CMSIS\core_cm4.h
5 | .\obj\stm32f4xx_tim.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
6 | .\obj\stm32f4xx_tim.o: ..\Libraries\CMSIS\core_cmInstr.h
7 | .\obj\stm32f4xx_tim.o: ..\Libraries\CMSIS\core_cmFunc.h
8 | .\obj\stm32f4xx_tim.o: ..\Libraries\CMSIS\core_cm4_simd.h
9 | .\obj\stm32f4xx_tim.o: ..\Libraries\CMSIS\system_stm32f4xx.h
10 | .\obj\stm32f4xx_tim.o: ..\user\stm32f4xx_conf.h
11 | .\obj\stm32f4xx_tim.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\misc.h
12 | .\obj\stm32f4xx_tim.o: ..\Libraries\CMSIS\stm32f4xx.h
13 | .\obj\stm32f4xx_tim.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_dma.h
14 | .\obj\stm32f4xx_tim.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_flash.h
15 | .\obj\stm32f4xx_tim.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_gpio.h
16 | .\obj\stm32f4xx_tim.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_i2c.h
17 | .\obj\stm32f4xx_tim.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_rcc.h
18 | .\obj\stm32f4xx_tim.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_spi.h
19 | .\obj\stm32f4xx_tim.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_syscfg.h
20 | .\obj\stm32f4xx_tim.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_tim.h
21 | .\obj\stm32f4xx_tim.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_usart.h
22 |
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https://raw.githubusercontent.com/zhutongwen/BLDCM_sine_wave/38fbe51fc5b4b9c8220bf42bd0751e328585845b/Project/Obj/stm32f4xx_usart.crf
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/Project/Obj/stm32f4xx_usart.d:
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1 | .\obj\stm32f4xx_usart.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_usart.c
2 | .\obj\stm32f4xx_usart.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_usart.h
3 | .\obj\stm32f4xx_usart.o: ..\Libraries\CMSIS\stm32f4xx.h
4 | .\obj\stm32f4xx_usart.o: ..\Libraries\CMSIS\core_cm4.h
5 | .\obj\stm32f4xx_usart.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
6 | .\obj\stm32f4xx_usart.o: ..\Libraries\CMSIS\core_cmInstr.h
7 | .\obj\stm32f4xx_usart.o: ..\Libraries\CMSIS\core_cmFunc.h
8 | .\obj\stm32f4xx_usart.o: ..\Libraries\CMSIS\core_cm4_simd.h
9 | .\obj\stm32f4xx_usart.o: ..\Libraries\CMSIS\system_stm32f4xx.h
10 | .\obj\stm32f4xx_usart.o: ..\user\stm32f4xx_conf.h
11 | .\obj\stm32f4xx_usart.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\misc.h
12 | .\obj\stm32f4xx_usart.o: ..\Libraries\CMSIS\stm32f4xx.h
13 | .\obj\stm32f4xx_usart.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_dma.h
14 | .\obj\stm32f4xx_usart.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_flash.h
15 | .\obj\stm32f4xx_usart.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_gpio.h
16 | .\obj\stm32f4xx_usart.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_i2c.h
17 | .\obj\stm32f4xx_usart.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_rcc.h
18 | .\obj\stm32f4xx_usart.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_spi.h
19 | .\obj\stm32f4xx_usart.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_syscfg.h
20 | .\obj\stm32f4xx_usart.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_tim.h
21 | .\obj\stm32f4xx_usart.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_usart.h
22 |
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/Project/Obj/system_stm32f4xx.d:
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1 | .\obj\system_stm32f4xx.o: ..\Libraries\CMSIS\system_stm32f4xx.c
2 | .\obj\system_stm32f4xx.o: ..\Libraries\CMSIS\stm32f4xx.h
3 | .\obj\system_stm32f4xx.o: ..\Libraries\CMSIS\core_cm4.h
4 | .\obj\system_stm32f4xx.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
5 | .\obj\system_stm32f4xx.o: ..\Libraries\CMSIS\core_cmInstr.h
6 | .\obj\system_stm32f4xx.o: ..\Libraries\CMSIS\core_cmFunc.h
7 | .\obj\system_stm32f4xx.o: ..\Libraries\CMSIS\core_cm4_simd.h
8 | .\obj\system_stm32f4xx.o: ..\Libraries\CMSIS\system_stm32f4xx.h
9 | .\obj\system_stm32f4xx.o: ..\user\stm32f4xx_conf.h
10 | .\obj\system_stm32f4xx.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\misc.h
11 | .\obj\system_stm32f4xx.o: ..\Libraries\CMSIS\stm32f4xx.h
12 | .\obj\system_stm32f4xx.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_dma.h
13 | .\obj\system_stm32f4xx.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_flash.h
14 | .\obj\system_stm32f4xx.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_gpio.h
15 | .\obj\system_stm32f4xx.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_i2c.h
16 | .\obj\system_stm32f4xx.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_rcc.h
17 | .\obj\system_stm32f4xx.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_spi.h
18 | .\obj\system_stm32f4xx.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_syscfg.h
19 | .\obj\system_stm32f4xx.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_tim.h
20 | .\obj\system_stm32f4xx.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_usart.h
21 |
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/Project/Obj/tim.crf:
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/Project/Obj/tim.d:
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1 | .\obj\tim.o: ..\user\tim.c
2 | .\obj\tim.o: ..\user\stm32f4_system.h
3 | .\obj\tim.o: ..\Libraries\CMSIS\stm32f4xx.h
4 | .\obj\tim.o: ..\Libraries\CMSIS\core_cm4.h
5 | .\obj\tim.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
6 | .\obj\tim.o: ..\Libraries\CMSIS\core_cmInstr.h
7 | .\obj\tim.o: ..\Libraries\CMSIS\core_cmFunc.h
8 | .\obj\tim.o: ..\Libraries\CMSIS\core_cm4_simd.h
9 | .\obj\tim.o: ..\Libraries\CMSIS\system_stm32f4xx.h
10 | .\obj\tim.o: ..\user\stm32f4xx_conf.h
11 | .\obj\tim.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\misc.h
12 | .\obj\tim.o: ..\Libraries\CMSIS\stm32f4xx.h
13 | .\obj\tim.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_dma.h
14 | .\obj\tim.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_flash.h
15 | .\obj\tim.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_gpio.h
16 | .\obj\tim.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_i2c.h
17 | .\obj\tim.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_rcc.h
18 | .\obj\tim.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_spi.h
19 | .\obj\tim.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_syscfg.h
20 | .\obj\tim.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_tim.h
21 | .\obj\tim.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_usart.h
22 | .\obj\tim.o: ..\user\tim.h
23 |
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/Project/Obj/tim.o:
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/Project/Obj/usart.crf:
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/Project/Obj/usart.d:
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1 | .\obj\usart.o: ..\user\usart.c
2 | .\obj\usart.o: ..\user\usart.h
3 | .\obj\usart.o: ..\Libraries\CMSIS\stm32f4xx.h
4 | .\obj\usart.o: ..\Libraries\CMSIS\core_cm4.h
5 | .\obj\usart.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
6 | .\obj\usart.o: ..\Libraries\CMSIS\core_cmInstr.h
7 | .\obj\usart.o: ..\Libraries\CMSIS\core_cmFunc.h
8 | .\obj\usart.o: ..\Libraries\CMSIS\core_cm4_simd.h
9 | .\obj\usart.o: ..\Libraries\CMSIS\system_stm32f4xx.h
10 | .\obj\usart.o: ..\user\stm32f4xx_conf.h
11 | .\obj\usart.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\misc.h
12 | .\obj\usart.o: ..\Libraries\CMSIS\stm32f4xx.h
13 | .\obj\usart.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_dma.h
14 | .\obj\usart.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_flash.h
15 | .\obj\usart.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_gpio.h
16 | .\obj\usart.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_i2c.h
17 | .\obj\usart.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_rcc.h
18 | .\obj\usart.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_spi.h
19 | .\obj\usart.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_syscfg.h
20 | .\obj\usart.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_tim.h
21 | .\obj\usart.o: ..\Libraries\STM32F4xx_StdPeriph_Driver\inc\stm32f4xx_usart.h
22 | .\obj\usart.o: ..\user\stm32f4_system.h
23 |
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/Project/Obj/usart.o:
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/user/adc.h:
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1 | #ifndef _ADC_H_
2 | #define _ADC_H_
3 |
4 |
5 | #include "stm32f4xx.h"
6 |
7 | extern vs16 ADC2ConvertedValue[4];
8 | extern vs16 ADC3ConvertedValue[4];
9 |
10 | void Adc1Init(void);//可调电阻电压采样
11 | void Adc2Init(void);//电机A电流采样
12 | void Adc3Init(void);//电机B电流采样
13 |
14 | #endif
15 |
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/user/bsp.c:
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1 | /*=====================================================================================================*/
2 | /*=====================================================================================================*/
3 | #include "stm32f4_system.h"
4 | #include "bsp.h"
5 | /*=====================================================================================================*/
6 | /*=====================================================================================================*
7 | **函數 : LED_Config
8 | **功能 : LED 設定 & 配置
9 | **輸入 : None
10 | **輸出 : None
11 | **使用 : LED_Config();
12 | **=====================================================================================================*/
13 | /*=====================================================================================================*/
14 | void LedInit( void )
15 | {
16 | GPIO_InitTypeDef GPIO_InitStruct;
17 |
18 | RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
19 |
20 |
21 | /* LED_1 PB6 */ /* LED_2 PB5 */
22 | GPIO_InitStruct.GPIO_Pin = GPIO_Pin_6 | GPIO_Pin_5;
23 | GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
24 | GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
25 | GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
26 | GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL;
27 | GPIO_Init(GPIOB, &GPIO_InitStruct);
28 |
29 | LED_1 = 1;
30 | LED_2 = 1;
31 | }
32 | /*=====================================================================================================*/
33 | /*=====================================================================================================*
34 | **函數 : KEY_Config
35 | **功能 : KEY 設定 & 配置
36 | **輸入 : None
37 | **輸出 : None
38 | **使用 : KEY_Config();
39 | **=====================================================================================================*/
40 | /*=====================================================================================================*/
41 | void KeyInit( void )
42 | {
43 | GPIO_InitTypeDef GPIO_InitStruct;
44 |
45 | RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);
46 |
47 | /* KEY1 PD10 */
48 | /* KEY2 PD11 */
49 | /* KEY3 PD9 */
50 | /* KEY4 PD8 */
51 | GPIO_InitStruct.GPIO_Pin = GPIO_Pin_10 | GPIO_Pin_11 | GPIO_Pin_9 | GPIO_Pin_8;
52 | GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN;
53 | GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_UP;
54 | GPIO_Init(GPIOD, &GPIO_InitStruct);
55 | }
56 | /*=====================================================================================================*/
57 | /*=====================================================================================================*/
58 | void NvicInit(void)
59 | {
60 | NVIC_InitTypeDef NVIC_InitStructure;
61 |
62 | NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
63 | NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
64 |
65 | //电机A
66 | NVIC_InitStructure.NVIC_IRQChannel = TIM1_UP_TIM10_IRQn;/*定时器1的中断通道使能*/
67 | NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;/*定时器1的中断通道使能*/
68 | NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;/*抢占优先级*/
69 | NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;/*响应优先级*/
70 | NVIC_Init(&NVIC_InitStructure);/*配置中断分组，并使能中断*/
71 |
72 | //霍尔A
73 | NVIC_InitStructure.NVIC_IRQChannel = TIM5_IRQn;
74 | NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x01;
75 | NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x01;
76 | NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
77 | NVIC_Init(&NVIC_InitStructure);
78 |
79 | //电机B
80 | NVIC_InitStructure.NVIC_IRQChannel = TIM8_UP_TIM13_IRQn;
81 | NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
82 | NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
83 | NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
84 | NVIC_Init(&NVIC_InitStructure);
85 |
86 | //霍尔B
87 | NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQn;
88 | NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x01;
89 | NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x01;
90 | NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
91 | NVIC_Init(&NVIC_InitStructure);
92 | }
93 |
94 |
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/user/bsp.h:
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1 | /* #include "QCopterFC_board.h" */
2 |
3 | #ifndef __COPTERFC_BOARD_H
4 | #define __COPTERFC_BOARD_H
5 |
6 | #include "stm32f4xx.h"
7 | #include "stm32f4_system.h"
8 | /*====================================================================================================*/
9 | /*====================================================================================================*/
10 | #define KEY_1 PDI(10)
11 | #define KEY_2 PDI(11)
12 | #define KEY_3 PDI(9)
13 | #define KEY_4 PDI(8)
14 |
15 | #define LED_1 PBO(5)
16 | #define LED_2 PBO(6)
17 |
18 | /* KEY Define */
19 | #define KEY_ON (1)
20 | #define KEY_OFF (0)
21 | #define KEY_LONG (2)
22 | /*====================================================================================================*/
23 | /*====================================================================================================*/
24 | void LedInit( void );
25 | void KeyInit( void );
26 | void NvicInit(void);
27 | /*====================================================================================================*/
28 | /*====================================================================================================*/
29 | #endif
30 |
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/user/main.c:
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1 | /*=====================================================================================================*/
2 | /*=====================================================================================================*/
3 | #include "stm32f4_system.h"
4 | #include "bsp.h"
5 | #include "usart.h"
6 | #include "adc.h"
7 | #include "tim.h"
8 | #include "math.h"
9 | #include "motor_control.h"
10 | #include "mpu6500.h"
11 | #include "arm_math.h"
12 |
13 |
14 | u8 time_flag_5ms = 0;//在定时器中断中被累加，在IMU滤波是置零。
15 | s16 OutData[5];
16 | float sinf_wave[3600]; //0--60度 正弦波
17 |
18 |
19 |
20 | //生成正弦波
21 | void getSinWave(void)
22 | {
23 | uint32_t i=0;
24 | for(i=0; i<3600; i++)
25 | {
26 | sinf_wave[i] =sinf(i/572.9578);
27 | }
28 | }
29 |
30 |
31 | /*=====================================================================================================*/
32 | /*=====================================================================================================*/
33 | int main(void )
34 | {
35 | s16 adc_data = 0;
36 |
37 | getSinWave();
38 |
39 | LedInit();
40 | KeyInit();
41 | Usart1Init();
42 |
43 | Adc1Init();//可调电阻电压采样
44 |
45 | Adc2Init();//电机A电流采样
46 | Adc3Init();//电机B电流采样
47 |
48 | Timer1Init();//电机A
49 | Timer5Init();//霍尔A
50 |
51 | Timer8Init();//电机B
52 | Timer2Init();//霍尔B
53 |
54 | NvicInit();
55 |
56 | while(1)
57 | {
58 | if(time_flag_5ms == 1)
59 | {
60 | time_flag_5ms = 0;
61 | adc_data = ADC1->DR;
62 |
63 | if(adc_data > 4000)
64 | {
65 | adc_data = 4000;
66 | }
67 | motor_a.set_speed = 2*(2000 - adc_data);
68 |
69 | motor_a.set_speed = ((motor_a.set_speed<300) && (motor_a.set_speed>(-300)))? 0:motor_a.set_speed;
70 |
71 | motor_b.set_speed = -motor_a.set_speed;
72 |
73 | if(!KEY_4)
74 | {
75 | motor_a.set_speed = 0;
76 | motor_b.set_speed = 0;
77 | while(1);
78 | }
79 | }
80 | else if (time_flag_5ms > 1)//5ms没计算完
81 | {
82 | motor_a.set_speed = 0;
83 | motor_b.set_speed = 0;
84 | while(1);
85 | }
86 |
87 | {
88 | float iua = (3300.0/4096)*(ADC2ConvertedValue[1] - ADC2ConvertedValue[0]);
89 | float iwa = (3300.0/4096)*(ADC2ConvertedValue[0] - ADC2ConvertedValue[2]);
90 |
91 | // OutData[0] = (s16)iua;
92 | // OutData[1] = (s16)iwa;
93 | // OutPutData();
94 |
95 | // OutData[0] = (s16)motor_a.current_section;
96 | // OutData[1] = (s16)motor_a.set_speed;
97 | // OutData[2] = (s16)motor_a.current_speed;
98 | // OutData[3] = (s16)motor_a.electrical_angle;
99 | // OutPutData();
100 |
101 | // OutData[0] = (s16)motor_b.current_section;
102 | // OutData[1] = (s16)motor_b.set_speed;
103 | // OutData[2] = (s16)motor_b.current_speed;
104 | // OutData[3] = (s16)motor_b.electrical_angle;
105 | // OutPutData();
106 |
107 | OutData[0] = (s16)motor_a.set_speed ;
108 | OutData[1] = (s16)motor_a.current_speed ;
109 | OutData[2] = (s16)motor_b.set_speed;
110 | OutData[3] = (s16)motor_b.current_speed;
111 | OutPutData();
112 | }
113 | }
114 | }
115 |
--------------------------------------------------------------------------------
/user/motor_control.h:
--------------------------------------------------------------------------------
1 | #ifndef _MOTOR_CONTROL_H
2 | #define _MOTOR_CONTROL_H
3 |
4 | #include "stm32f4xx.h"
5 |
6 | typedef enum
7 | {
8 | INIT = 0,
9 | START,
10 | SQUARE,
11 | SINE,
12 | END
13 | } e_drive_mode;
14 |
15 | typedef struct
16 | {
17 | s16 i_offset; //电流检测直流量。
18 | s16 ia; //相电流 单位 mA
19 | s16 ib;
20 | s16 ic;
21 | u32 i_sum_50ms;//电流和
22 |
23 | u16 electrical_angle; //转子电角度 单位0.1度， 取值范： [0 , 3600)
24 |
25 | s32 set_position; //期望位置，霍尔计数值，
26 | s32 current_position; //当前位置，霍尔计数值
27 |
28 | s16 set_speed; //期望转速 0--3000 转每分钟
29 | s16 current_speed; //当前转速， 单位转每分钟
30 | u32 period; //电机连续转一圈的时间，单位us
31 |
32 | u16 counter_stop;
33 |
34 | e_drive_mode drive_mode;//电机驱动方式
35 |
36 | u8 is_section_chenged; //==1 表示转子象限改变了，用于转子电角度计算
37 | u8 current_section; // {0 1 2 3 4 5} //当前，转子所在的象限
38 | u8 last_section; // {0 1 2 3 4 5} //最近一次变化前，转子所在的象限
39 | s8 last_direction; //电机转向 0:stop 1:forward -1:bzckward
40 |
41 | s16 s16_test; // for test
42 |
43 | }s_motor_info;
44 |
45 |
46 | struct s_remote_info
47 | {
48 | s16 set_speed;
49 | s16 set_speed_difference;
50 | };
51 |
52 |
53 | extern s_motor_info motor_a;
54 | extern s_motor_info motor_b;
55 |
56 |
57 | void motor_init(char a_or_b);//电机参数初始化
58 |
59 | #endif
60 |
--------------------------------------------------------------------------------
/user/mpu6500.c:
--------------------------------------------------------------------------------
1 | #include "stm32f4xx_spi.h"
2 | #include "mpu6500.h"
3 |
4 | s_mpu6500 mpu6500_info;
5 |
6 |
7 | // 函数：delay_ms(uint32_t ms);
8 | // 功能：软件延时
9 | // 输入：ms——延时约多少毫秒
10 | static void delay_ms(uint32_t ms)
11 | {
12 | uint32_t loop;
13 | for(;ms>0;ms--)
14 | {
15 | for(loop=2700*3;loop>0;loop--);
16 | }
17 | }
18 |
19 | void SPI2Init(void)
20 | {
21 | GPIO_InitTypeDef GPIO_InitStructure;
22 | SPI_InitTypeDef SPI_InitStructure;
23 |
24 | RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB,ENABLE); //开启时钟
25 | RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2,ENABLE);
26 |
27 | //片选管脚，由软件控制
28 | SPI_NSS_HIGH;
29 | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
30 | GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
31 | GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
32 | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
33 | GPIO_Init(GPIOB,&GPIO_InitStructure);
34 |
35 | //spi管脚
36 | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
37 | GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
38 | GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
39 | GPIO_Init(GPIOB,&GPIO_InitStructure);
40 |
41 | GPIO_PinAFConfig(GPIOB,GPIO_PinSource13,GPIO_AF_SPI2); //打开引脚的复用功能
42 | GPIO_PinAFConfig(GPIOB,GPIO_PinSource14,GPIO_AF_SPI2);
43 | GPIO_PinAFConfig(GPIOB,GPIO_PinSource15,GPIO_AF_SPI2);
44 |
45 | SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex; //全双工模式
46 | SPI_InitStructure.SPI_Mode = SPI_Mode_Master; //作为主机使用
47 | SPI_InitStructure.SPI_DataSize = SPI_DataSize_16b; //数据长度8
48 | SPI_InitStructure.SPI_CPOL = SPI_CPOL_High;
49 | SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;
50 | SPI_InitStructure.SPI_NSS = SPI_NSS_Soft; //软件设置NSS功能
51 | SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_256;
52 | SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
53 | SPI_InitStructure.SPI_CRCPolynomial = 7;
54 | SPI_Init(SPI2,&SPI_InitStructure);
55 | SPI_Cmd(SPI2,ENABLE);
56 | }
57 |
58 | s16 SpiReadWrite16Bits(s16 TxData)
59 | {
60 | while( (SPI2->SR&0x02) == 0);//等待直到发送寄存器空
61 | SPI2->DR = TxData;
62 | while((SPI2->SR&0x01) == 0);//等待收到数据
63 | return SPI2->DR;
64 | }
65 |
66 | //姿态传感器MPU6500初始化函数
67 | void mpu6500_init(void)
68 | {
69 | delay_ms(500);
70 | SPI2Init();
71 |
72 | SPI_NSS_LOW;
73 | SpiReadWrite16Bits(106<<8|0x10);
74 | SPI_NSS_HIGH;
75 | delay_ms(1);
76 |
77 | SPI_NSS_LOW;
78 | SpiReadWrite16Bits(0x6b<<8|0x00); //向地址x6b写入0x00 //使能温度传感器，使能PLL
79 | SPI_NSS_HIGH;
80 | delay_ms(1);
81 |
82 | SPI_NSS_LOW;
83 | SpiReadWrite16Bits(0x19<<8|0x00); //数据采样速率设为 1KHZ
84 | SPI_NSS_HIGH;
85 | delay_ms(1);
86 |
87 | SPI_NSS_LOW;
88 | SpiReadWrite16Bits(0x1a<<8|0x03);
89 | SPI_NSS_HIGH;
90 | delay_ms(1);
91 |
92 | SPI_NSS_LOW;
93 | SpiReadWrite16Bits(0x1b<<8|0x18); //角速度最大测量值 +-2000/s
94 | SPI_NSS_HIGH;
95 | delay_ms(1);
96 |
97 | SPI_NSS_LOW;
98 | SpiReadWrite16Bits(0x1c<<8|0x10); //加速度最大测量值 +-8g
99 | SPI_NSS_HIGH;
100 | delay_ms(1);
101 | }
102 |
--------------------------------------------------------------------------------
/user/mpu6500.h:
--------------------------------------------------------------------------------
1 | #ifndef _MPU_6500_H_
2 | #define _MPU_6500_H_
3 |
4 | #include "stm32f4_system.h"
5 |
6 | #define SPI_NSS_HIGH GPIO_SetBits(GPIOB, GPIO_Pin_12)
7 | #define SPI_NSS_LOW GPIO_ResetBits(GPIOB, GPIO_Pin_12)
8 |
9 | typedef struct
10 | {
11 | s16 xa; //x轴加速度
12 | s16 ya;
13 | s16 za;
14 | s16 xg; //x轴角速度
15 | s16 yg; //x轴角速度
16 | s16 zg; //x轴角速度
17 |
18 | }s_mpu6500;
19 |
20 |
21 | extern s_mpu6500 mpu6500_info;
22 |
23 |
24 | void mpu6500_init(void);
25 | s16 SpiReadWrite16Bits(s16 TxData);
26 |
27 |
28 | #endif
29 |
--------------------------------------------------------------------------------
/user/stm32f4_system.h:
--------------------------------------------------------------------------------
1 | /* #include "stm32f4_system.h" */
2 |
3 | #ifndef __STM32F4_SYSTEM_H
4 | #define __STM32F4_SYSTEM_H
5 |
6 | #include "stm32f4xx.h"
7 | /*=====================================================================================================*/
8 | /*=====================================================================================================*/
9 | #define Bit_Band(Addr, BitNum) ((Addr & 0xF0000000)+0x2000000+((Addr &0xFFFFF)<<5)+(BitNum<<2))
10 | #define Mem_Addr(Addr) *((vu16 *)(Addr))
11 | #define Bit_Addr(Addr, BitNum) Mem_Addr(Bit_Band(Addr, BitNum))
12 |
13 | #define GPIOA_ODR_Addr (GPIOA_BASE+0x14)
14 | #define GPIOB_ODR_Addr (GPIOB_BASE+0x14)
15 | #define GPIOC_ODR_Addr (GPIOC_BASE+0x14)
16 | #define GPIOD_ODR_Addr (GPIOD_BASE+0x14)
17 | #define GPIOE_ODR_Addr (GPIOE_BASE+0x14)
18 | #define GPIOF_ODR_Addr (GPIOF_BASE+0x14)
19 | #define GPIOG_ODR_Addr (GPIOG_BASE+0x14)
20 | #define GPIOA_IDR_Addr (GPIOA_BASE+0x10)
21 | #define GPIOB_IDR_Addr (GPIOB_BASE+0x10)
22 | #define GPIOC_IDR_Addr (GPIOC_BASE+0x10)
23 | #define GPIOD_IDR_Addr (GPIOD_BASE+0x10)
24 | #define GPIOE_IDR_Addr (GPIOE_BASE+0x10)
25 | #define GPIOF_IDR_Addr (GPIOF_BASE+0x10)
26 | #define GPIOG_IDR_Addr (GPIOG_BASE+0x10)
27 |
28 | #define PAO(Pin) Bit_Addr(GPIOA_ODR_Addr, Pin)
29 | #define PAI(Pin) Bit_Addr(GPIOA_IDR_Addr, Pin)
30 | #define PBO(Pin) Bit_Addr(GPIOB_ODR_Addr, Pin)
31 | #define PBI(Pin) Bit_Addr(GPIOB_IDR_Addr, Pin)
32 | #define PCO(Pin) Bit_Addr(GPIOC_ODR_Addr, Pin)
33 | #define PCI(Pin) Bit_Addr(GPIOC_IDR_Addr, Pin)
34 | #define PDO(Pin) Bit_Addr(GPIOD_ODR_Addr, Pin)
35 | #define PDI(Pin) Bit_Addr(GPIOD_IDR_Addr, Pin)
36 | #define PEO(Pin) Bit_Addr(GPIOE_ODR_Addr, Pin)
37 | #define PEI(Pin) Bit_Addr(GPIOE_IDR_Addr, Pin)
38 | #define PFO(Pin) Bit_Addr(GPIOF_ODR_Addr, Pin)
39 | #define PFI(Pin) Bit_Addr(GPIOF_IDR_Addr, Pin)
40 | #define PGO(Pin) Bit_Addr(GPIOG_ODR_Addr, Pin)
41 | #define PGI(Pin) Bit_Addr(GPIOG_IDR_Addr, Pin)
42 | /*=====================================================================================================*/
43 | /*=====================================================================================================*/
44 | #define U8_MAX ((u8)255)
45 | #define S8_MAX ((s8)127)
46 | #define S8_MIN ((s8)-128)
47 | #define U16_MAX ((u16)65535u)
48 | #define S16_MAX ((s16)32767)
49 | #define S16_MIN ((s16)-32768)
50 | #define U32_MAX ((u32)4294967295uL)
51 | #define S32_MAX ((s32)2147483647)
52 | #define S32_MIN ((s32)-2147483648)
53 |
54 | #define Byte16(ByteH, ByteL) ((u16)(((ByteH)<<8) | (ByteL)))
55 | #define Byte8H(ByteH) ((u8)((ByteH)>>8))
56 | #define Byte8L(ByteL) ((u8)(ByteL))
57 |
58 | #define NULL 0
59 |
60 | typedef float fp32;
61 | typedef double fp64;
62 |
63 | typedef volatile float vfp32;
64 | typedef volatile double vfp64;
65 |
66 | typedef float const fpc32;
67 | typedef double const fpc64;
68 |
69 | typedef enum {FALSE = 0, TRUE = !FALSE} bool;
70 | /*=====================================================================================================*/
71 | /*=====================================================================================================*/
72 | typedef struct {
73 | u8 Bit0:1;
74 | u8 Bit1:1;
75 | u8 Bit2:1;
76 | u8 Bit3:1;
77 | u8 Bit4:1;
78 | u8 Bit5:1;
79 | u8 Bit6:1;
80 | u8 Bit7:1;
81 | } BitField;
82 | typedef struct {
83 | u16 L:8;
84 | u16 H:8;
85 | } HL_Struct;
86 | /*=====================================================================================================*/
87 | /*=====================================================================================================*/
88 | #endif
89 |
--------------------------------------------------------------------------------
/user/stm32f4xx_conf.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_conf.h
4 | * @author MCD Application Team
5 | * @version V1.3.0
6 | * @date 13-November-2013
7 | * @brief Library configuration file.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2013 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /* Define to prevent recursive inclusion -------------------------------------*/
29 | #ifndef __STM32F4xx_CONF_H
30 | #define __STM32F4xx_CONF_H
31 |
32 | /* Includes ------------------------------------------------------------------*/
33 | /* Uncomment the line below to enable peripheral header file inclusion */
34 | #include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
35 | //#include "stm32f4xx_adc.h"
36 | //#include "stm32f4xx_can.h"
37 | //#include "stm32f4xx_crc.h"
38 | //#include "stm32f4xx_cryp.h"
39 | //#include "stm32f4xx_dbgmcu.h"
40 | //#include "stm32f4xx_dac.h"
41 | //#include "stm32f4xx_dcmi.h"
42 | #include "stm32f4xx_dma.h"
43 | //#include "stm32f4xx_dma2d.h"
44 | //#include "stm32f4xx_exti.h"
45 | #include "stm32f4xx_flash.h"
46 | //#include "stm32f4xx_fmc.h"
47 | //#include "stm32f4xx_fsmc.h"
48 | #include "stm32f4xx_gpio.h"
49 | //#include "stm32f4xx_hash.h"
50 | #include "stm32f4xx_i2c.h"
51 | //#include "stm32f4xx_iwdg.h"
52 | //#include "stm32f4xx_ltdc.h"
53 | //#include "stm32f4xx_pwr.h"
54 | #include "stm32f4xx_rcc.h"
55 | //#include "stm32f4xx_rng.h"
56 | //#include "stm32f4xx_rtc.h"
57 | //#include "stm32f4xx_sai.h"
58 | //#include "stm32f4xx_sdio.h"
59 | #include "stm32f4xx_spi.h"
60 | #include "stm32f4xx_syscfg.h"
61 | #include "stm32f4xx_tim.h"
62 | #include "stm32f4xx_usart.h"
63 | //#include "stm32f4xx_wwdg.h"
64 |
65 | /* Exported types ------------------------------------------------------------*/
66 | /* Exported constants --------------------------------------------------------*/
67 |
68 | /* If an external clock source is used, then the value of the following define
69 | should be set to the value of the external clock source, else, if no external
70 | clock is used, keep this define commented */
71 | /*#define I2S_EXTERNAL_CLOCK_VAL 12288000 */ /* Value of the external clock in Hz */
72 |
73 |
74 | /* Uncomment the line below to expanse the "assert_param" macro in the
75 | Standard Peripheral Library drivers code */
76 | /* #define USE_FULL_ASSERT 1 */
77 |
78 | /* Exported macro ------------------------------------------------------------*/
79 | #ifdef USE_FULL_ASSERT
80 |
81 | /**
82 | * @brief The assert_param macro is used for function's parameters check.
83 | * @param expr: If expr is false, it calls assert_failed function
84 | * which reports the name of the source file and the source
85 | * line number of the call that failed.
86 | * If expr is true, it returns no value.
87 | * @retval None
88 | */
89 | #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
90 | /* Exported functions ------------------------------------------------------- */
91 | void assert_failed(uint8_t* file, uint32_t line);
92 | #else
93 | #define assert_param(expr) ((void)0)
94 | #endif /* USE_FULL_ASSERT */
95 |
96 | #endif /* __STM32F4xx_CONF_H */
97 |
98 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
99 |
--------------------------------------------------------------------------------
/user/stm32f4xx_it.c:
--------------------------------------------------------------------------------
1 | /*=====================================================================================================*/
2 | /*=====================================================================================================*/
3 | #include "stm32f4_system.h"
4 |
5 | /*=====================================================================================================*/
6 | /*=====================================================================================================*/
7 |
8 |
9 | /*=====================================================================================================*/
10 | /*=====================================================================================================*/
11 | void SysTick_Handler( void )
12 | {
13 |
14 | }
15 | /*=====================================================================================================*/
16 | /*=====================================================================================================*/
17 | void DMA1_Stream0_IRQHandler( void )
18 | {
19 | //I2C_RX_DMA_IRQ();
20 | }
21 | /*=====================================================================================================*/
22 | /*=====================================================================================================*/
23 | void DMA1_Stream6_IRQHandler( void )
24 | {
25 | //I2C_TX_DMA_IRQ();
26 | }
27 | /*=====================================================================================================*/
28 | /*=====================================================================================================*/
29 | void HardFault_Handler( void )
30 | {
31 | while(1);
32 | }
33 | void MemManage_Handler( void )
34 | {
35 | while(1);
36 | }
37 | void BusFault_Handler( void )
38 | {
39 | while(1);
40 | }
41 | void UsageFault_Handler( void )
42 | {
43 | while(1);
44 | }
45 | void SVC_Handler( void )
46 | {
47 | while(1);
48 | }
49 | void DebugMon_Handler( void )
50 | {
51 | while(1);
52 | }
53 | void PendSV_Handler( void )
54 | {
55 | while(1);
56 | }
57 | void NMI_Handler( void )
58 | {
59 | while(1);
60 | }
61 |
62 |
63 |
64 |
--------------------------------------------------------------------------------
/user/tim.h:
--------------------------------------------------------------------------------
1 | #ifndef _TIM_H_
2 | #define _TIM_H_
3 |
4 | void Timer1Init(void);//电机
5 | void Timer5Init(void);//霍尔
6 |
7 | void Timer8Init(void);//电机
8 | void Timer2Init(void);//霍尔
9 |
10 | #endif
11 |
--------------------------------------------------------------------------------
/user/usart.c:
--------------------------------------------------------------------------------
1 | /*=====================================================================================================*/
2 | /*=====================================================================================================*/
3 |
4 | #include "usart.h"
5 |
6 | extern s16 OutData[5];
7 |
8 | /*=====================================================================================================*/
9 | /*=====================================================================================================*
10 | **函數 : RS232_Config
11 | **功能 :
12 | **輸入 :
13 | **輸出 :
14 | **使用 :
15 | **=====================================================================================================*/
16 | /*=====================================================================================================*/
17 | void Usart1Init( void )
18 | {
19 | GPIO_InitTypeDef GPIO_InitStruct;
20 | USART_InitTypeDef USART_InitStruct;
21 |
22 | RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
23 | RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
24 |
25 | GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_USART1);
26 | GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_USART1);
27 |
28 | /* USART1 Tx PA9 */ /* USART1 Rx PA10 */
29 | GPIO_InitStruct.GPIO_Pin = GPIO_Pin_9 | GPIO_Pin_10;
30 | GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF;
31 | GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
32 | GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_UP;
33 | GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
34 | GPIO_Init(GPIOA, &GPIO_InitStruct);
35 |
36 | // GPIO_InitStruct.GPIO_Pin = GPIO_Pin_10;
37 | // GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN;
38 | // GPIO_InitStruct.GPIO_OType = GPIO_OType_OD;
39 | // GPIO_Init(GPIOA, &GPIO_InitStruct);
40 |
41 |
42 | USART_InitStruct.USART_BaudRate = 115200;
43 | USART_InitStruct.USART_WordLength = USART_WordLength_8b;
44 | USART_InitStruct.USART_StopBits = USART_StopBits_1;
45 | USART_InitStruct.USART_Parity = USART_Parity_No;
46 | USART_InitStruct.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
47 | USART_InitStruct.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
48 | USART_Init(USART1, &USART_InitStruct);
49 | USART_Cmd(USART1, ENABLE);
50 |
51 | USART_ClearFlag(USART1, USART_FLAG_TC);
52 | }
53 |
54 |
55 | //函数功能：数据校验。。详情参考虚拟示波器软件(VisualScope_Cracked.exe)的help
56 | uint16_t CRC_CHECK(short int *Buf, unsigned char CRC_CNT)
57 | {
58 | uint16_t CRC_Temp;
59 | unsigned char i,j;
60 | CRC_Temp = 0xffff;
61 | for (i=0;i>1 ) ^ 0xa001;
68 | else
69 | CRC_Temp = CRC_Temp >> 1;
70 | }
71 | }
72 | return(CRC_Temp);
73 | }
74 |
75 | //函数功能：向上位机发送数据。详情参考虚拟示波器软件(VisualScope_Cracked.exe)的help
76 | void OutPutData(void) //低位在前 ， 高位在后
77 | {
78 | unsigned char i;
79 | OutData[4] = CRC_CHECK(OutData,4);
80 | for(i=0;i<5;i++)
81 | {
82 | while(USART_GetFlagStatus(USART1, USART_FLAG_TXE) == RESET); //判断是否发送完毕
83 | USART_SendData(USART1,OutData[i]);
84 |
85 | while(USART_GetFlagStatus(USART1, USART_FLAG_TXE) == RESET); //判断是否发送完毕
86 | USART_SendData(USART1,OutData[i]>>8);
87 | }
88 | }
89 |
--------------------------------------------------------------------------------
/user/usart.h:
--------------------------------------------------------------------------------
1 | /* #include "module_rs232.h" */
2 |
3 | #ifndef __MODULE_RS232_H
4 | #define __MODULE_RS232_H
5 |
6 | #include "stm32f4xx.h"
7 | #include "stm32f4_system.h"
8 | #include "stm32f4xx_usart.h"
9 | /*=====================================================================================================*/
10 | /*=====================================================================================================*/
11 | void Usart1Init( void );
12 |
13 | void OutPutData(void);
14 |
15 | /*=====================================================================================================*/
16 | /*=====================================================================================================*/
17 | #endif
18 |
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/无刷V2原理图.pdf:
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https://raw.githubusercontent.com/zhutongwen/BLDCM_sine_wave/38fbe51fc5b4b9c8220bf42bd0751e328585845b/无刷V2原理图.pdf
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