├── .gitignore
├── DebugConfig
└── Target_1_STM32F103ZE_1.0.0.dbgconf
├── EventRecorderStub.scvd
├── JLinkSettings.ini
├── LICENSE
├── Libraries
├── CMSIS
│ ├── core_cm3.c
│ ├── core_cm3.h
│ ├── startup_stm32f10x_hd.s
│ ├── system_stm32f10x.c
│ └── system_stm32f10x.h
└── STM32F10x_StdPeriph_Driver
│ ├── inc
│ ├── misc.h
│ ├── stm32f10x_adc.h
│ ├── stm32f10x_bkp.h
│ ├── stm32f10x_can.h
│ ├── stm32f10x_cec.h
│ ├── stm32f10x_crc.h
│ ├── stm32f10x_dac.h
│ ├── stm32f10x_dbgmcu.h
│ ├── stm32f10x_dma.h
│ ├── stm32f10x_exti.h
│ ├── stm32f10x_flash.h
│ ├── stm32f10x_fsmc.h
│ ├── stm32f10x_gpio.h
│ ├── stm32f10x_i2c.h
│ ├── stm32f10x_iwdg.h
│ ├── stm32f10x_pwr.h
│ ├── stm32f10x_rcc.h
│ ├── stm32f10x_rtc.h
│ ├── stm32f10x_sdio.h
│ ├── stm32f10x_spi.h
│ ├── stm32f10x_tim.h
│ ├── stm32f10x_usart.h
│ └── stm32f10x_wwdg.h
│ └── src
│ ├── misc.c
│ ├── stm32f10x_adc.c
│ ├── stm32f10x_bkp.c
│ ├── stm32f10x_can.c
│ ├── stm32f10x_cec.c
│ ├── stm32f10x_crc.c
│ ├── stm32f10x_dac.c
│ ├── stm32f10x_dbgmcu.c
│ ├── stm32f10x_dma.c
│ ├── stm32f10x_exti.c
│ ├── stm32f10x_flash.c
│ ├── stm32f10x_fsmc.c
│ ├── stm32f10x_gpio.c
│ ├── stm32f10x_i2c.c
│ ├── stm32f10x_iwdg.c
│ ├── stm32f10x_pwr.c
│ ├── stm32f10x_rcc.c
│ ├── stm32f10x_rtc.c
│ ├── stm32f10x_sdio.c
│ ├── stm32f10x_spi.c
│ ├── stm32f10x_tim.c
│ ├── stm32f10x_usart.c
│ └── stm32f10x_wwdg.c
├── Public
├── system.c
├── system.h
├── usart.c
└── usart.h
├── README.md
├── app
├── 24Cxx
│ ├── 24cxx.c
│ └── 24cxx.h
├── DHT11
│ ├── dht11.c
│ └── dht11.h
├── DS18B20
│ ├── ds18b20.c
│ └── ds18b20.h
├── RC522
│ ├── RC522.c
│ └── RC522.h
├── Tetris
│ ├── Tetris.c
│ ├── Tetris.h
│ ├── ascii.h
│ └── picture.h
├── adc
│ ├── adc.c
│ └── adc.h
├── adc_temp
│ ├── adc_temp.c
│ └── adc_temp.h
├── ball
│ ├── ball.c
│ ├── ball.h
│ └── picture.h
├── beep
│ ├── beep.c
│ └── beep.h
├── can
│ ├── can.c
│ └── can.h
├── dac
│ ├── dac.c
│ └── dac.h
├── dma
│ ├── dma.c
│ └── dma.h
├── exti
│ ├── exti.c
│ └── exti.h
├── hwjs
│ ├── hwjs.c
│ └── hwjs.h
├── iic
│ ├── iic.c
│ └── iic.h
├── input
│ ├── input.c
│ └── input.h
├── iwdg
│ ├── iwdg.c
│ └── iwdg.h
├── key
│ ├── key.c
│ └── key.h
├── led
│ ├── led.c
│ └── led.h
├── nrf24l01
│ ├── nrf24l01.c
│ └── nrf24l01.h
├── oled
│ ├── oled.c
│ ├── oled.h
│ ├── oledfont.h
│ └── picture.h
├── pwm
│ ├── pwm.c
│ └── pwm.h
├── pwm_dac
│ ├── pwm_dac.c
│ └── pwm_dac.h
├── rs485
│ ├── rs485.c
│ └── rs485.h
├── rtc
│ ├── rtc.c
│ └── rtc.h
├── smg
│ ├── smg.c
│ └── smg.h
├── spi
│ ├── spi.c
│ └── spi.h
├── tftlcd
│ ├── font.h
│ ├── picture.h
│ ├── tftlcd.c
│ └── tftlcd.h
├── time
│ ├── time.c
│ └── time.h
├── touch
│ ├── touch.c
│ └── touch.h
├── touch_key
│ ├── touch_key.c
│ └── touch_key.h
├── wkup
│ ├── wkup.c
│ └── wkup.h
└── wwdg
│ ├── wwdg.c
│ └── wwdg.h
├── awtk-port
├── SysTick.c
├── SysTick.h
├── assert.c
├── awtk_config.h
├── gui_main.c
├── lcd_stm32_raw.c
├── main_loop_stm32_raw.c
└── platform.c
├── awtk.uvoptx
├── awtk.uvprojx
├── docs
└── rtt-port.md
├── format.sh
├── keilkilll.bat
├── rtthread
├── cortex-m3
│ ├── SConscript
│ ├── context_rvds.S
│ └── cpuport.c
├── include
│ ├── libc
│ │ ├── libc_dirent.h
│ │ ├── libc_errno.h
│ │ ├── libc_fcntl.h
│ │ ├── libc_fdset.h
│ │ ├── libc_ioctl.h
│ │ ├── libc_signal.h
│ │ └── libc_stat.h
│ ├── rtdbg.h
│ ├── rtdebug.h
│ ├── rtdef.h
│ ├── rthw.h
│ ├── rtlibc.h
│ ├── rtm.h
│ ├── rtservice.h
│ └── rtthread.h
├── rtconfig.h
└── src
│ ├── Kconfig
│ ├── SConscript
│ ├── clock.c
│ ├── cpu.c
│ ├── device.c
│ ├── idle.c
│ ├── ipc.c
│ ├── irq.c
│ ├── kservice.c
│ ├── mem.c
│ ├── memheap.c
│ ├── mempool.c
│ ├── object.c
│ ├── scheduler.c
│ ├── signal.c
│ ├── slab.c
│ ├── thread.c
│ └── timer.c
└── user
├── real_main.c
├── stm32f10x.h
├── stm32f10x_conf.h
├── stm32f10x_it.c
└── stm32f10x_it.h
/.gitignore:
--------------------------------------------------------------------------------
1 | awtk
2 | obj
3 | tags
4 | user/JLinkLog.txt
5 | awtk.uvguix.Admin
6 |
--------------------------------------------------------------------------------
/DebugConfig/Target_1_STM32F103ZE_1.0.0.dbgconf:
--------------------------------------------------------------------------------
1 | // File: STM32F101_102_103_105_107.dbgconf
2 | // Version: 1.0.0
3 | // Note: refer to STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx Reference manual (RM0008)
4 | // STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx datasheets
5 |
6 | // <<< Use Configuration Wizard in Context Menu >>>
7 |
8 | // Debug MCU configuration register (DBGMCU_CR)
9 | // Reserved bits must be kept at reset value
10 | // DBG_TIM11_STOP TIM11 counter stopped when core is halted
11 | // DBG_TIM10_STOP TIM10 counter stopped when core is halted
12 | // DBG_TIM9_STOP TIM9 counter stopped when core is halted
13 | // DBG_TIM14_STOP TIM14 counter stopped when core is halted
14 | // DBG_TIM13_STOP TIM13 counter stopped when core is halted
15 | // DBG_TIM12_STOP TIM12 counter stopped when core is halted
16 | // DBG_CAN2_STOP Debug CAN2 stopped when core is halted
17 | // DBG_TIM7_STOP TIM7 counter stopped when core is halted
18 | // DBG_TIM6_STOP TIM6 counter stopped when core is halted
19 | // DBG_TIM5_STOP TIM5 counter stopped when core is halted
20 | // DBG_TIM8_STOP TIM8 counter stopped when core is halted
21 | // DBG_I2C2_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted
22 | // DBG_I2C1_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted
23 | // DBG_CAN1_STOP Debug CAN1 stopped when Core is halted
24 | // DBG_TIM4_STOP TIM4 counter stopped when core is halted
25 | // DBG_TIM3_STOP TIM3 counter stopped when core is halted
26 | // DBG_TIM2_STOP TIM2 counter stopped when core is halted
27 | // DBG_TIM1_STOP TIM1 counter stopped when core is halted
28 | // DBG_WWDG_STOP Debug window watchdog stopped when core is halted
29 | // DBG_IWDG_STOP Debug independent watchdog stopped when core is halted
30 | // DBG_STANDBY Debug standby mode
31 | // DBG_STOP Debug stop mode
32 | // DBG_SLEEP Debug sleep mode
33 | //
34 | DbgMCU_CR = 0x00000007;
35 |
36 | // <<< end of configuration section >>>
37 |
--------------------------------------------------------------------------------
/EventRecorderStub.scvd:
--------------------------------------------------------------------------------
1 |
2 |
3 |
4 |
5 |
6 |
7 |
8 |
9 |
10 |
--------------------------------------------------------------------------------
/JLinkSettings.ini:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ForceImpTypeAny = 0
3 | ShowInfoWin = 1
4 | EnableFlashBP = 2
5 | BPDuringExecution = 0
6 | [CFI]
7 | CFISize = 0x00
8 | CFIAddr = 0x00
9 | [CPU]
10 | MonModeVTableAddr = 0xFFFFFFFF
11 | MonModeDebug = 0
12 | MaxNumAPs = 0
13 | LowPowerHandlingMode = 0
14 | OverrideMemMap = 0
15 | AllowSimulation = 1
16 | ScriptFile=""
17 | [FLASH]
18 | CacheExcludeSize = 0x00
19 | CacheExcludeAddr = 0x00
20 | MinNumBytesFlashDL = 0
21 | SkipProgOnCRCMatch = 1
22 | VerifyDownload = 1
23 | AllowCaching = 1
24 | EnableFlashDL = 2
25 | Override = 0
26 | Device="ARM7"
27 | [GENERAL]
28 | WorkRAMSize = 0x00
29 | WorkRAMAddr = 0x00
30 | RAMUsageLimit = 0x00
31 | [SWO]
32 | SWOLogFile=""
33 | [MEM]
34 | RdOverrideOrMask = 0x00
35 | RdOverrideAndMask = 0xFFFFFFFF
36 | RdOverrideAddr = 0xFFFFFFFF
37 | WrOverrideOrMask = 0x00
38 | WrOverrideAndMask = 0xFFFFFFFF
39 | WrOverrideAddr = 0xFFFFFFFF
40 |
--------------------------------------------------------------------------------
/Libraries/CMSIS/system_stm32f10x.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file system_stm32f10x.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /** @addtogroup CMSIS
23 | * @{
24 | */
25 |
26 | /** @addtogroup stm32f10x_system
27 | * @{
28 | */
29 |
30 | /**
31 | * @brief Define to prevent recursive inclusion
32 | */
33 | #ifndef __SYSTEM_STM32F10X_H
34 | #define __SYSTEM_STM32F10X_H
35 |
36 | #ifdef __cplusplus
37 | extern "C" {
38 | #endif
39 |
40 | /** @addtogroup STM32F10x_System_Includes
41 | * @{
42 | */
43 |
44 | /**
45 | * @}
46 | */
47 |
48 |
49 | /** @addtogroup STM32F10x_System_Exported_types
50 | * @{
51 | */
52 |
53 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
54 |
55 | /**
56 | * @}
57 | */
58 |
59 | /** @addtogroup STM32F10x_System_Exported_Constants
60 | * @{
61 | */
62 |
63 | /**
64 | * @}
65 | */
66 |
67 | /** @addtogroup STM32F10x_System_Exported_Macros
68 | * @{
69 | */
70 |
71 | /**
72 | * @}
73 | */
74 |
75 | /** @addtogroup STM32F10x_System_Exported_Functions
76 | * @{
77 | */
78 |
79 | extern void SystemInit(void);
80 | extern void SystemCoreClockUpdate(void);
81 | /**
82 | * @}
83 | */
84 |
85 | #ifdef __cplusplus
86 | }
87 | #endif
88 |
89 | #endif /*__SYSTEM_STM32F10X_H */
90 |
91 | /**
92 | * @}
93 | */
94 |
95 | /**
96 | * @}
97 | */
98 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
99 |
--------------------------------------------------------------------------------
/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_bkp.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_bkp.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file contains all the functions prototypes for the BKP firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Define to prevent recursive inclusion -------------------------------------*/
24 | #ifndef __STM32F10x_BKP_H
25 | #define __STM32F10x_BKP_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | /* Includes ------------------------------------------------------------------*/
32 | #include "stm32f10x.h"
33 |
34 | /** @addtogroup STM32F10x_StdPeriph_Driver
35 | * @{
36 | */
37 |
38 | /** @addtogroup BKP
39 | * @{
40 | */
41 |
42 | /** @defgroup BKP_Exported_Types
43 | * @{
44 | */
45 |
46 | /**
47 | * @}
48 | */
49 |
50 | /** @defgroup BKP_Exported_Constants
51 | * @{
52 | */
53 |
54 | /** @defgroup Tamper_Pin_active_level
55 | * @{
56 | */
57 |
58 | #define BKP_TamperPinLevel_High ((uint16_t)0x0000)
59 | #define BKP_TamperPinLevel_Low ((uint16_t)0x0001)
60 | #define IS_BKP_TAMPER_PIN_LEVEL(LEVEL) (((LEVEL) == BKP_TamperPinLevel_High) || \
61 | ((LEVEL) == BKP_TamperPinLevel_Low))
62 | /**
63 | * @}
64 | */
65 |
66 | /** @defgroup RTC_output_source_to_output_on_the_Tamper_pin
67 | * @{
68 | */
69 |
70 | #define BKP_RTCOutputSource_None ((uint16_t)0x0000)
71 | #define BKP_RTCOutputSource_CalibClock ((uint16_t)0x0080)
72 | #define BKP_RTCOutputSource_Alarm ((uint16_t)0x0100)
73 | #define BKP_RTCOutputSource_Second ((uint16_t)0x0300)
74 | #define IS_BKP_RTC_OUTPUT_SOURCE(SOURCE) (((SOURCE) == BKP_RTCOutputSource_None) || \
75 | ((SOURCE) == BKP_RTCOutputSource_CalibClock) || \
76 | ((SOURCE) == BKP_RTCOutputSource_Alarm) || \
77 | ((SOURCE) == BKP_RTCOutputSource_Second))
78 | /**
79 | * @}
80 | */
81 |
82 | /** @defgroup Data_Backup_Register
83 | * @{
84 | */
85 |
86 | #define BKP_DR1 ((uint16_t)0x0004)
87 | #define BKP_DR2 ((uint16_t)0x0008)
88 | #define BKP_DR3 ((uint16_t)0x000C)
89 | #define BKP_DR4 ((uint16_t)0x0010)
90 | #define BKP_DR5 ((uint16_t)0x0014)
91 | #define BKP_DR6 ((uint16_t)0x0018)
92 | #define BKP_DR7 ((uint16_t)0x001C)
93 | #define BKP_DR8 ((uint16_t)0x0020)
94 | #define BKP_DR9 ((uint16_t)0x0024)
95 | #define BKP_DR10 ((uint16_t)0x0028)
96 | #define BKP_DR11 ((uint16_t)0x0040)
97 | #define BKP_DR12 ((uint16_t)0x0044)
98 | #define BKP_DR13 ((uint16_t)0x0048)
99 | #define BKP_DR14 ((uint16_t)0x004C)
100 | #define BKP_DR15 ((uint16_t)0x0050)
101 | #define BKP_DR16 ((uint16_t)0x0054)
102 | #define BKP_DR17 ((uint16_t)0x0058)
103 | #define BKP_DR18 ((uint16_t)0x005C)
104 | #define BKP_DR19 ((uint16_t)0x0060)
105 | #define BKP_DR20 ((uint16_t)0x0064)
106 | #define BKP_DR21 ((uint16_t)0x0068)
107 | #define BKP_DR22 ((uint16_t)0x006C)
108 | #define BKP_DR23 ((uint16_t)0x0070)
109 | #define BKP_DR24 ((uint16_t)0x0074)
110 | #define BKP_DR25 ((uint16_t)0x0078)
111 | #define BKP_DR26 ((uint16_t)0x007C)
112 | #define BKP_DR27 ((uint16_t)0x0080)
113 | #define BKP_DR28 ((uint16_t)0x0084)
114 | #define BKP_DR29 ((uint16_t)0x0088)
115 | #define BKP_DR30 ((uint16_t)0x008C)
116 | #define BKP_DR31 ((uint16_t)0x0090)
117 | #define BKP_DR32 ((uint16_t)0x0094)
118 | #define BKP_DR33 ((uint16_t)0x0098)
119 | #define BKP_DR34 ((uint16_t)0x009C)
120 | #define BKP_DR35 ((uint16_t)0x00A0)
121 | #define BKP_DR36 ((uint16_t)0x00A4)
122 | #define BKP_DR37 ((uint16_t)0x00A8)
123 | #define BKP_DR38 ((uint16_t)0x00AC)
124 | #define BKP_DR39 ((uint16_t)0x00B0)
125 | #define BKP_DR40 ((uint16_t)0x00B4)
126 | #define BKP_DR41 ((uint16_t)0x00B8)
127 | #define BKP_DR42 ((uint16_t)0x00BC)
128 |
129 | #define IS_BKP_DR(DR) (((DR) == BKP_DR1) || ((DR) == BKP_DR2) || ((DR) == BKP_DR3) || \
130 | ((DR) == BKP_DR4) || ((DR) == BKP_DR5) || ((DR) == BKP_DR6) || \
131 | ((DR) == BKP_DR7) || ((DR) == BKP_DR8) || ((DR) == BKP_DR9) || \
132 | ((DR) == BKP_DR10) || ((DR) == BKP_DR11) || ((DR) == BKP_DR12) || \
133 | ((DR) == BKP_DR13) || ((DR) == BKP_DR14) || ((DR) == BKP_DR15) || \
134 | ((DR) == BKP_DR16) || ((DR) == BKP_DR17) || ((DR) == BKP_DR18) || \
135 | ((DR) == BKP_DR19) || ((DR) == BKP_DR20) || ((DR) == BKP_DR21) || \
136 | ((DR) == BKP_DR22) || ((DR) == BKP_DR23) || ((DR) == BKP_DR24) || \
137 | ((DR) == BKP_DR25) || ((DR) == BKP_DR26) || ((DR) == BKP_DR27) || \
138 | ((DR) == BKP_DR28) || ((DR) == BKP_DR29) || ((DR) == BKP_DR30) || \
139 | ((DR) == BKP_DR31) || ((DR) == BKP_DR32) || ((DR) == BKP_DR33) || \
140 | ((DR) == BKP_DR34) || ((DR) == BKP_DR35) || ((DR) == BKP_DR36) || \
141 | ((DR) == BKP_DR37) || ((DR) == BKP_DR38) || ((DR) == BKP_DR39) || \
142 | ((DR) == BKP_DR40) || ((DR) == BKP_DR41) || ((DR) == BKP_DR42))
143 |
144 | #define IS_BKP_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x7F)
145 | /**
146 | * @}
147 | */
148 |
149 | /**
150 | * @}
151 | */
152 |
153 | /** @defgroup BKP_Exported_Macros
154 | * @{
155 | */
156 |
157 | /**
158 | * @}
159 | */
160 |
161 | /** @defgroup BKP_Exported_Functions
162 | * @{
163 | */
164 |
165 | void BKP_DeInit(void);
166 | void BKP_TamperPinLevelConfig(uint16_t BKP_TamperPinLevel);
167 | void BKP_TamperPinCmd(FunctionalState NewState);
168 | void BKP_ITConfig(FunctionalState NewState);
169 | void BKP_RTCOutputConfig(uint16_t BKP_RTCOutputSource);
170 | void BKP_SetRTCCalibrationValue(uint8_t CalibrationValue);
171 | void BKP_WriteBackupRegister(uint16_t BKP_DR, uint16_t Data);
172 | uint16_t BKP_ReadBackupRegister(uint16_t BKP_DR);
173 | FlagStatus BKP_GetFlagStatus(void);
174 | void BKP_ClearFlag(void);
175 | ITStatus BKP_GetITStatus(void);
176 | void BKP_ClearITPendingBit(void);
177 |
178 | #ifdef __cplusplus
179 | }
180 | #endif
181 |
182 | #endif /* __STM32F10x_BKP_H */
183 | /**
184 | * @}
185 | */
186 |
187 | /**
188 | * @}
189 | */
190 |
191 | /**
192 | * @}
193 | */
194 |
195 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
196 |
--------------------------------------------------------------------------------
/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_cec.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_cec.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file contains all the functions prototypes for the CEC firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Define to prevent recursive inclusion -------------------------------------*/
24 | #ifndef __STM32F10x_CEC_H
25 | #define __STM32F10x_CEC_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | /* Includes ------------------------------------------------------------------*/
32 | #include "stm32f10x.h"
33 |
34 | /** @addtogroup STM32F10x_StdPeriph_Driver
35 | * @{
36 | */
37 |
38 | /** @addtogroup CEC
39 | * @{
40 | */
41 |
42 |
43 | /** @defgroup CEC_Exported_Types
44 | * @{
45 | */
46 |
47 | /**
48 | * @brief CEC Init structure definition
49 | */
50 | typedef struct
51 | {
52 | uint16_t CEC_BitTimingMode; /*!< Configures the CEC Bit Timing Error Mode.
53 | This parameter can be a value of @ref CEC_BitTiming_Mode */
54 | uint16_t CEC_BitPeriodMode; /*!< Configures the CEC Bit Period Error Mode.
55 | This parameter can be a value of @ref CEC_BitPeriod_Mode */
56 | }CEC_InitTypeDef;
57 |
58 | /**
59 | * @}
60 | */
61 |
62 | /** @defgroup CEC_Exported_Constants
63 | * @{
64 | */
65 |
66 | /** @defgroup CEC_BitTiming_Mode
67 | * @{
68 | */
69 | #define CEC_BitTimingStdMode ((uint16_t)0x00) /*!< Bit timing error Standard Mode */
70 | #define CEC_BitTimingErrFreeMode CEC_CFGR_BTEM /*!< Bit timing error Free Mode */
71 |
72 | #define IS_CEC_BIT_TIMING_ERROR_MODE(MODE) (((MODE) == CEC_BitTimingStdMode) || \
73 | ((MODE) == CEC_BitTimingErrFreeMode))
74 | /**
75 | * @}
76 | */
77 |
78 | /** @defgroup CEC_BitPeriod_Mode
79 | * @{
80 | */
81 | #define CEC_BitPeriodStdMode ((uint16_t)0x00) /*!< Bit period error Standard Mode */
82 | #define CEC_BitPeriodFlexibleMode CEC_CFGR_BPEM /*!< Bit period error Flexible Mode */
83 |
84 | #define IS_CEC_BIT_PERIOD_ERROR_MODE(MODE) (((MODE) == CEC_BitPeriodStdMode) || \
85 | ((MODE) == CEC_BitPeriodFlexibleMode))
86 | /**
87 | * @}
88 | */
89 |
90 |
91 | /** @defgroup CEC_interrupts_definition
92 | * @{
93 | */
94 | #define CEC_IT_TERR CEC_CSR_TERR
95 | #define CEC_IT_TBTRF CEC_CSR_TBTRF
96 | #define CEC_IT_RERR CEC_CSR_RERR
97 | #define CEC_IT_RBTF CEC_CSR_RBTF
98 | #define IS_CEC_GET_IT(IT) (((IT) == CEC_IT_TERR) || ((IT) == CEC_IT_TBTRF) || \
99 | ((IT) == CEC_IT_RERR) || ((IT) == CEC_IT_RBTF))
100 | /**
101 | * @}
102 | */
103 |
104 |
105 | /** @defgroup CEC_Own_Address
106 | * @{
107 | */
108 | #define IS_CEC_ADDRESS(ADDRESS) ((ADDRESS) < 0x10)
109 | /**
110 | * @}
111 | */
112 |
113 | /** @defgroup CEC_Prescaler
114 | * @{
115 | */
116 | #define IS_CEC_PRESCALER(PRESCALER) ((PRESCALER) <= 0x3FFF)
117 |
118 | /**
119 | * @}
120 | */
121 |
122 | /** @defgroup CEC_flags_definition
123 | * @{
124 | */
125 |
126 | /**
127 | * @brief ESR register flags
128 | */
129 | #define CEC_FLAG_BTE ((uint32_t)0x10010000)
130 | #define CEC_FLAG_BPE ((uint32_t)0x10020000)
131 | #define CEC_FLAG_RBTFE ((uint32_t)0x10040000)
132 | #define CEC_FLAG_SBE ((uint32_t)0x10080000)
133 | #define CEC_FLAG_ACKE ((uint32_t)0x10100000)
134 | #define CEC_FLAG_LINE ((uint32_t)0x10200000)
135 | #define CEC_FLAG_TBTFE ((uint32_t)0x10400000)
136 |
137 | /**
138 | * @brief CSR register flags
139 | */
140 | #define CEC_FLAG_TEOM ((uint32_t)0x00000002)
141 | #define CEC_FLAG_TERR ((uint32_t)0x00000004)
142 | #define CEC_FLAG_TBTRF ((uint32_t)0x00000008)
143 | #define CEC_FLAG_RSOM ((uint32_t)0x00000010)
144 | #define CEC_FLAG_REOM ((uint32_t)0x00000020)
145 | #define CEC_FLAG_RERR ((uint32_t)0x00000040)
146 | #define CEC_FLAG_RBTF ((uint32_t)0x00000080)
147 |
148 | #define IS_CEC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFF03) == 0x00) && ((FLAG) != 0x00))
149 |
150 | #define IS_CEC_GET_FLAG(FLAG) (((FLAG) == CEC_FLAG_BTE) || ((FLAG) == CEC_FLAG_BPE) || \
151 | ((FLAG) == CEC_FLAG_RBTFE) || ((FLAG)== CEC_FLAG_SBE) || \
152 | ((FLAG) == CEC_FLAG_ACKE) || ((FLAG) == CEC_FLAG_LINE) || \
153 | ((FLAG) == CEC_FLAG_TBTFE) || ((FLAG) == CEC_FLAG_TEOM) || \
154 | ((FLAG) == CEC_FLAG_TERR) || ((FLAG) == CEC_FLAG_TBTRF) || \
155 | ((FLAG) == CEC_FLAG_RSOM) || ((FLAG) == CEC_FLAG_REOM) || \
156 | ((FLAG) == CEC_FLAG_RERR) || ((FLAG) == CEC_FLAG_RBTF))
157 |
158 | /**
159 | * @}
160 | */
161 |
162 | /**
163 | * @}
164 | */
165 |
166 | /** @defgroup CEC_Exported_Macros
167 | * @{
168 | */
169 |
170 | /**
171 | * @}
172 | */
173 |
174 | /** @defgroup CEC_Exported_Functions
175 | * @{
176 | */
177 | void CEC_DeInit(void);
178 | void CEC_Init(CEC_InitTypeDef* CEC_InitStruct);
179 | void CEC_Cmd(FunctionalState NewState);
180 | void CEC_ITConfig(FunctionalState NewState);
181 | void CEC_OwnAddressConfig(uint8_t CEC_OwnAddress);
182 | void CEC_SetPrescaler(uint16_t CEC_Prescaler);
183 | void CEC_SendDataByte(uint8_t Data);
184 | uint8_t CEC_ReceiveDataByte(void);
185 | void CEC_StartOfMessage(void);
186 | void CEC_EndOfMessageCmd(FunctionalState NewState);
187 | FlagStatus CEC_GetFlagStatus(uint32_t CEC_FLAG);
188 | void CEC_ClearFlag(uint32_t CEC_FLAG);
189 | ITStatus CEC_GetITStatus(uint8_t CEC_IT);
190 | void CEC_ClearITPendingBit(uint16_t CEC_IT);
191 |
192 | #ifdef __cplusplus
193 | }
194 | #endif
195 |
196 | #endif /* __STM32F10x_CEC_H */
197 |
198 | /**
199 | * @}
200 | */
201 |
202 | /**
203 | * @}
204 | */
205 |
206 | /**
207 | * @}
208 | */
209 |
210 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
211 |
--------------------------------------------------------------------------------
/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_crc.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_crc.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file contains all the functions prototypes for the CRC firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Define to prevent recursive inclusion -------------------------------------*/
24 | #ifndef __STM32F10x_CRC_H
25 | #define __STM32F10x_CRC_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | /* Includes ------------------------------------------------------------------*/
32 | #include "stm32f10x.h"
33 |
34 | /** @addtogroup STM32F10x_StdPeriph_Driver
35 | * @{
36 | */
37 |
38 | /** @addtogroup CRC
39 | * @{
40 | */
41 |
42 | /** @defgroup CRC_Exported_Types
43 | * @{
44 | */
45 |
46 | /**
47 | * @}
48 | */
49 |
50 | /** @defgroup CRC_Exported_Constants
51 | * @{
52 | */
53 |
54 | /**
55 | * @}
56 | */
57 |
58 | /** @defgroup CRC_Exported_Macros
59 | * @{
60 | */
61 |
62 | /**
63 | * @}
64 | */
65 |
66 | /** @defgroup CRC_Exported_Functions
67 | * @{
68 | */
69 |
70 | void CRC_ResetDR(void);
71 | uint32_t CRC_CalcCRC(uint32_t Data);
72 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength);
73 | uint32_t CRC_GetCRC(void);
74 | void CRC_SetIDRegister(uint8_t IDValue);
75 | uint8_t CRC_GetIDRegister(void);
76 |
77 | #ifdef __cplusplus
78 | }
79 | #endif
80 |
81 | #endif /* __STM32F10x_CRC_H */
82 | /**
83 | * @}
84 | */
85 |
86 | /**
87 | * @}
88 | */
89 |
90 | /**
91 | * @}
92 | */
93 |
94 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
95 |
--------------------------------------------------------------------------------
/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_dbgmcu.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_dbgmcu.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file contains all the functions prototypes for the DBGMCU
8 | * firmware library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Define to prevent recursive inclusion -------------------------------------*/
24 | #ifndef __STM32F10x_DBGMCU_H
25 | #define __STM32F10x_DBGMCU_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | /* Includes ------------------------------------------------------------------*/
32 | #include "stm32f10x.h"
33 |
34 | /** @addtogroup STM32F10x_StdPeriph_Driver
35 | * @{
36 | */
37 |
38 | /** @addtogroup DBGMCU
39 | * @{
40 | */
41 |
42 | /** @defgroup DBGMCU_Exported_Types
43 | * @{
44 | */
45 |
46 | /**
47 | * @}
48 | */
49 |
50 | /** @defgroup DBGMCU_Exported_Constants
51 | * @{
52 | */
53 |
54 | #define DBGMCU_SLEEP ((uint32_t)0x00000001)
55 | #define DBGMCU_STOP ((uint32_t)0x00000002)
56 | #define DBGMCU_STANDBY ((uint32_t)0x00000004)
57 | #define DBGMCU_IWDG_STOP ((uint32_t)0x00000100)
58 | #define DBGMCU_WWDG_STOP ((uint32_t)0x00000200)
59 | #define DBGMCU_TIM1_STOP ((uint32_t)0x00000400)
60 | #define DBGMCU_TIM2_STOP ((uint32_t)0x00000800)
61 | #define DBGMCU_TIM3_STOP ((uint32_t)0x00001000)
62 | #define DBGMCU_TIM4_STOP ((uint32_t)0x00002000)
63 | #define DBGMCU_CAN1_STOP ((uint32_t)0x00004000)
64 | #define DBGMCU_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00008000)
65 | #define DBGMCU_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00010000)
66 | #define DBGMCU_TIM8_STOP ((uint32_t)0x00020000)
67 | #define DBGMCU_TIM5_STOP ((uint32_t)0x00040000)
68 | #define DBGMCU_TIM6_STOP ((uint32_t)0x00080000)
69 | #define DBGMCU_TIM7_STOP ((uint32_t)0x00100000)
70 | #define DBGMCU_CAN2_STOP ((uint32_t)0x00200000)
71 | #define DBGMCU_TIM15_STOP ((uint32_t)0x00400000)
72 | #define DBGMCU_TIM16_STOP ((uint32_t)0x00800000)
73 | #define DBGMCU_TIM17_STOP ((uint32_t)0x01000000)
74 | #define DBGMCU_TIM12_STOP ((uint32_t)0x02000000)
75 | #define DBGMCU_TIM13_STOP ((uint32_t)0x04000000)
76 | #define DBGMCU_TIM14_STOP ((uint32_t)0x08000000)
77 | #define DBGMCU_TIM9_STOP ((uint32_t)0x10000000)
78 | #define DBGMCU_TIM10_STOP ((uint32_t)0x20000000)
79 | #define DBGMCU_TIM11_STOP ((uint32_t)0x40000000)
80 |
81 | #define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0x800000F8) == 0x00) && ((PERIPH) != 0x00))
82 | /**
83 | * @}
84 | */
85 |
86 | /** @defgroup DBGMCU_Exported_Macros
87 | * @{
88 | */
89 |
90 | /**
91 | * @}
92 | */
93 |
94 | /** @defgroup DBGMCU_Exported_Functions
95 | * @{
96 | */
97 |
98 | uint32_t DBGMCU_GetREVID(void);
99 | uint32_t DBGMCU_GetDEVID(void);
100 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState);
101 |
102 | #ifdef __cplusplus
103 | }
104 | #endif
105 |
106 | #endif /* __STM32F10x_DBGMCU_H */
107 | /**
108 | * @}
109 | */
110 |
111 | /**
112 | * @}
113 | */
114 |
115 | /**
116 | * @}
117 | */
118 |
119 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
120 |
--------------------------------------------------------------------------------
/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_exti.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_exti.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file contains all the functions prototypes for the EXTI firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Define to prevent recursive inclusion -------------------------------------*/
24 | #ifndef __STM32F10x_EXTI_H
25 | #define __STM32F10x_EXTI_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | /* Includes ------------------------------------------------------------------*/
32 | #include "stm32f10x.h"
33 |
34 | /** @addtogroup STM32F10x_StdPeriph_Driver
35 | * @{
36 | */
37 |
38 | /** @addtogroup EXTI
39 | * @{
40 | */
41 |
42 | /** @defgroup EXTI_Exported_Types
43 | * @{
44 | */
45 |
46 | /**
47 | * @brief EXTI mode enumeration
48 | */
49 |
50 | typedef enum
51 | {
52 | EXTI_Mode_Interrupt = 0x00,
53 | EXTI_Mode_Event = 0x04
54 | }EXTIMode_TypeDef;
55 |
56 | #define IS_EXTI_MODE(MODE) (((MODE) == EXTI_Mode_Interrupt) || ((MODE) == EXTI_Mode_Event))
57 |
58 | /**
59 | * @brief EXTI Trigger enumeration
60 | */
61 |
62 | typedef enum
63 | {
64 | EXTI_Trigger_Rising = 0x08,
65 | EXTI_Trigger_Falling = 0x0C,
66 | EXTI_Trigger_Rising_Falling = 0x10
67 | }EXTITrigger_TypeDef;
68 |
69 | #define IS_EXTI_TRIGGER(TRIGGER) (((TRIGGER) == EXTI_Trigger_Rising) || \
70 | ((TRIGGER) == EXTI_Trigger_Falling) || \
71 | ((TRIGGER) == EXTI_Trigger_Rising_Falling))
72 | /**
73 | * @brief EXTI Init Structure definition
74 | */
75 |
76 | typedef struct
77 | {
78 | uint32_t EXTI_Line; /*!< Specifies the EXTI lines to be enabled or disabled.
79 | This parameter can be any combination of @ref EXTI_Lines */
80 |
81 | EXTIMode_TypeDef EXTI_Mode; /*!< Specifies the mode for the EXTI lines.
82 | This parameter can be a value of @ref EXTIMode_TypeDef */
83 |
84 | EXTITrigger_TypeDef EXTI_Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
85 | This parameter can be a value of @ref EXTIMode_TypeDef */
86 |
87 | FunctionalState EXTI_LineCmd; /*!< Specifies the new state of the selected EXTI lines.
88 | This parameter can be set either to ENABLE or DISABLE */
89 | }EXTI_InitTypeDef;
90 |
91 | /**
92 | * @}
93 | */
94 |
95 | /** @defgroup EXTI_Exported_Constants
96 | * @{
97 | */
98 |
99 | /** @defgroup EXTI_Lines
100 | * @{
101 | */
102 |
103 | #define EXTI_Line0 ((uint32_t)0x00001) /*!< External interrupt line 0 */
104 | #define EXTI_Line1 ((uint32_t)0x00002) /*!< External interrupt line 1 */
105 | #define EXTI_Line2 ((uint32_t)0x00004) /*!< External interrupt line 2 */
106 | #define EXTI_Line3 ((uint32_t)0x00008) /*!< External interrupt line 3 */
107 | #define EXTI_Line4 ((uint32_t)0x00010) /*!< External interrupt line 4 */
108 | #define EXTI_Line5 ((uint32_t)0x00020) /*!< External interrupt line 5 */
109 | #define EXTI_Line6 ((uint32_t)0x00040) /*!< External interrupt line 6 */
110 | #define EXTI_Line7 ((uint32_t)0x00080) /*!< External interrupt line 7 */
111 | #define EXTI_Line8 ((uint32_t)0x00100) /*!< External interrupt line 8 */
112 | #define EXTI_Line9 ((uint32_t)0x00200) /*!< External interrupt line 9 */
113 | #define EXTI_Line10 ((uint32_t)0x00400) /*!< External interrupt line 10 */
114 | #define EXTI_Line11 ((uint32_t)0x00800) /*!< External interrupt line 11 */
115 | #define EXTI_Line12 ((uint32_t)0x01000) /*!< External interrupt line 12 */
116 | #define EXTI_Line13 ((uint32_t)0x02000) /*!< External interrupt line 13 */
117 | #define EXTI_Line14 ((uint32_t)0x04000) /*!< External interrupt line 14 */
118 | #define EXTI_Line15 ((uint32_t)0x08000) /*!< External interrupt line 15 */
119 | #define EXTI_Line16 ((uint32_t)0x10000) /*!< External interrupt line 16 Connected to the PVD Output */
120 | #define EXTI_Line17 ((uint32_t)0x20000) /*!< External interrupt line 17 Connected to the RTC Alarm event */
121 | #define EXTI_Line18 ((uint32_t)0x40000) /*!< External interrupt line 18 Connected to the USB Device/USB OTG FS
122 | Wakeup from suspend event */
123 | #define EXTI_Line19 ((uint32_t)0x80000) /*!< External interrupt line 19 Connected to the Ethernet Wakeup event */
124 |
125 | #define IS_EXTI_LINE(LINE) ((((LINE) & (uint32_t)0xFFF00000) == 0x00) && ((LINE) != (uint16_t)0x00))
126 | #define IS_GET_EXTI_LINE(LINE) (((LINE) == EXTI_Line0) || ((LINE) == EXTI_Line1) || \
127 | ((LINE) == EXTI_Line2) || ((LINE) == EXTI_Line3) || \
128 | ((LINE) == EXTI_Line4) || ((LINE) == EXTI_Line5) || \
129 | ((LINE) == EXTI_Line6) || ((LINE) == EXTI_Line7) || \
130 | ((LINE) == EXTI_Line8) || ((LINE) == EXTI_Line9) || \
131 | ((LINE) == EXTI_Line10) || ((LINE) == EXTI_Line11) || \
132 | ((LINE) == EXTI_Line12) || ((LINE) == EXTI_Line13) || \
133 | ((LINE) == EXTI_Line14) || ((LINE) == EXTI_Line15) || \
134 | ((LINE) == EXTI_Line16) || ((LINE) == EXTI_Line17) || \
135 | ((LINE) == EXTI_Line18) || ((LINE) == EXTI_Line19))
136 |
137 |
138 | /**
139 | * @}
140 | */
141 |
142 | /**
143 | * @}
144 | */
145 |
146 | /** @defgroup EXTI_Exported_Macros
147 | * @{
148 | */
149 |
150 | /**
151 | * @}
152 | */
153 |
154 | /** @defgroup EXTI_Exported_Functions
155 | * @{
156 | */
157 |
158 | void EXTI_DeInit(void);
159 | void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct);
160 | void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct);
161 | void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line);
162 | FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line);
163 | void EXTI_ClearFlag(uint32_t EXTI_Line);
164 | ITStatus EXTI_GetITStatus(uint32_t EXTI_Line);
165 | void EXTI_ClearITPendingBit(uint32_t EXTI_Line);
166 |
167 | #ifdef __cplusplus
168 | }
169 | #endif
170 |
171 | #endif /* __STM32F10x_EXTI_H */
172 | /**
173 | * @}
174 | */
175 |
176 | /**
177 | * @}
178 | */
179 |
180 | /**
181 | * @}
182 | */
183 |
184 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
185 |
--------------------------------------------------------------------------------
/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_iwdg.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_iwdg.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file contains all the functions prototypes for the IWDG
8 | * firmware library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Define to prevent recursive inclusion -------------------------------------*/
24 | #ifndef __STM32F10x_IWDG_H
25 | #define __STM32F10x_IWDG_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | /* Includes ------------------------------------------------------------------*/
32 | #include "stm32f10x.h"
33 |
34 | /** @addtogroup STM32F10x_StdPeriph_Driver
35 | * @{
36 | */
37 |
38 | /** @addtogroup IWDG
39 | * @{
40 | */
41 |
42 | /** @defgroup IWDG_Exported_Types
43 | * @{
44 | */
45 |
46 | /**
47 | * @}
48 | */
49 |
50 | /** @defgroup IWDG_Exported_Constants
51 | * @{
52 | */
53 |
54 | /** @defgroup IWDG_WriteAccess
55 | * @{
56 | */
57 |
58 | #define IWDG_WriteAccess_Enable ((uint16_t)0x5555)
59 | #define IWDG_WriteAccess_Disable ((uint16_t)0x0000)
60 | #define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \
61 | ((ACCESS) == IWDG_WriteAccess_Disable))
62 | /**
63 | * @}
64 | */
65 |
66 | /** @defgroup IWDG_prescaler
67 | * @{
68 | */
69 |
70 | #define IWDG_Prescaler_4 ((uint8_t)0x00)
71 | #define IWDG_Prescaler_8 ((uint8_t)0x01)
72 | #define IWDG_Prescaler_16 ((uint8_t)0x02)
73 | #define IWDG_Prescaler_32 ((uint8_t)0x03)
74 | #define IWDG_Prescaler_64 ((uint8_t)0x04)
75 | #define IWDG_Prescaler_128 ((uint8_t)0x05)
76 | #define IWDG_Prescaler_256 ((uint8_t)0x06)
77 | #define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4) || \
78 | ((PRESCALER) == IWDG_Prescaler_8) || \
79 | ((PRESCALER) == IWDG_Prescaler_16) || \
80 | ((PRESCALER) == IWDG_Prescaler_32) || \
81 | ((PRESCALER) == IWDG_Prescaler_64) || \
82 | ((PRESCALER) == IWDG_Prescaler_128)|| \
83 | ((PRESCALER) == IWDG_Prescaler_256))
84 | /**
85 | * @}
86 | */
87 |
88 | /** @defgroup IWDG_Flag
89 | * @{
90 | */
91 |
92 | #define IWDG_FLAG_PVU ((uint16_t)0x0001)
93 | #define IWDG_FLAG_RVU ((uint16_t)0x0002)
94 | #define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU))
95 | #define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF)
96 | /**
97 | * @}
98 | */
99 |
100 | /**
101 | * @}
102 | */
103 |
104 | /** @defgroup IWDG_Exported_Macros
105 | * @{
106 | */
107 |
108 | /**
109 | * @}
110 | */
111 |
112 | /** @defgroup IWDG_Exported_Functions
113 | * @{
114 | */
115 |
116 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess);
117 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler);
118 | void IWDG_SetReload(uint16_t Reload);
119 | void IWDG_ReloadCounter(void);
120 | void IWDG_Enable(void);
121 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG);
122 |
123 | #ifdef __cplusplus
124 | }
125 | #endif
126 |
127 | #endif /* __STM32F10x_IWDG_H */
128 | /**
129 | * @}
130 | */
131 |
132 | /**
133 | * @}
134 | */
135 |
136 | /**
137 | * @}
138 | */
139 |
140 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
141 |
--------------------------------------------------------------------------------
/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_pwr.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_pwr.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file contains all the functions prototypes for the PWR firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Define to prevent recursive inclusion -------------------------------------*/
24 | #ifndef __STM32F10x_PWR_H
25 | #define __STM32F10x_PWR_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | /* Includes ------------------------------------------------------------------*/
32 | #include "stm32f10x.h"
33 |
34 | /** @addtogroup STM32F10x_StdPeriph_Driver
35 | * @{
36 | */
37 |
38 | /** @addtogroup PWR
39 | * @{
40 | */
41 |
42 | /** @defgroup PWR_Exported_Types
43 | * @{
44 | */
45 |
46 | /**
47 | * @}
48 | */
49 |
50 | /** @defgroup PWR_Exported_Constants
51 | * @{
52 | */
53 |
54 | /** @defgroup PVD_detection_level
55 | * @{
56 | */
57 |
58 | #define PWR_PVDLevel_2V2 ((uint32_t)0x00000000)
59 | #define PWR_PVDLevel_2V3 ((uint32_t)0x00000020)
60 | #define PWR_PVDLevel_2V4 ((uint32_t)0x00000040)
61 | #define PWR_PVDLevel_2V5 ((uint32_t)0x00000060)
62 | #define PWR_PVDLevel_2V6 ((uint32_t)0x00000080)
63 | #define PWR_PVDLevel_2V7 ((uint32_t)0x000000A0)
64 | #define PWR_PVDLevel_2V8 ((uint32_t)0x000000C0)
65 | #define PWR_PVDLevel_2V9 ((uint32_t)0x000000E0)
66 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_2V2) || ((LEVEL) == PWR_PVDLevel_2V3)|| \
67 | ((LEVEL) == PWR_PVDLevel_2V4) || ((LEVEL) == PWR_PVDLevel_2V5)|| \
68 | ((LEVEL) == PWR_PVDLevel_2V6) || ((LEVEL) == PWR_PVDLevel_2V7)|| \
69 | ((LEVEL) == PWR_PVDLevel_2V8) || ((LEVEL) == PWR_PVDLevel_2V9))
70 | /**
71 | * @}
72 | */
73 |
74 | /** @defgroup Regulator_state_is_STOP_mode
75 | * @{
76 | */
77 |
78 | #define PWR_Regulator_ON ((uint32_t)0x00000000)
79 | #define PWR_Regulator_LowPower ((uint32_t)0x00000001)
80 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_Regulator_ON) || \
81 | ((REGULATOR) == PWR_Regulator_LowPower))
82 | /**
83 | * @}
84 | */
85 |
86 | /** @defgroup STOP_mode_entry
87 | * @{
88 | */
89 |
90 | #define PWR_STOPEntry_WFI ((uint8_t)0x01)
91 | #define PWR_STOPEntry_WFE ((uint8_t)0x02)
92 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE))
93 |
94 | /**
95 | * @}
96 | */
97 |
98 | /** @defgroup PWR_Flag
99 | * @{
100 | */
101 |
102 | #define PWR_FLAG_WU ((uint32_t)0x00000001)
103 | #define PWR_FLAG_SB ((uint32_t)0x00000002)
104 | #define PWR_FLAG_PVDO ((uint32_t)0x00000004)
105 | #define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \
106 | ((FLAG) == PWR_FLAG_PVDO))
107 |
108 | #define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB))
109 | /**
110 | * @}
111 | */
112 |
113 | /**
114 | * @}
115 | */
116 |
117 | /** @defgroup PWR_Exported_Macros
118 | * @{
119 | */
120 |
121 | /**
122 | * @}
123 | */
124 |
125 | /** @defgroup PWR_Exported_Functions
126 | * @{
127 | */
128 |
129 | void PWR_DeInit(void);
130 | void PWR_BackupAccessCmd(FunctionalState NewState);
131 | void PWR_PVDCmd(FunctionalState NewState);
132 | void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel);
133 | void PWR_WakeUpPinCmd(FunctionalState NewState);
134 | void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry);
135 | void PWR_EnterSTANDBYMode(void);
136 | FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG);
137 | void PWR_ClearFlag(uint32_t PWR_FLAG);
138 |
139 | #ifdef __cplusplus
140 | }
141 | #endif
142 |
143 | #endif /* __STM32F10x_PWR_H */
144 | /**
145 | * @}
146 | */
147 |
148 | /**
149 | * @}
150 | */
151 |
152 | /**
153 | * @}
154 | */
155 |
156 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
157 |
--------------------------------------------------------------------------------
/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_rtc.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_rtc.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file contains all the functions prototypes for the RTC firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Define to prevent recursive inclusion -------------------------------------*/
24 | #ifndef __STM32F10x_RTC_H
25 | #define __STM32F10x_RTC_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | /* Includes ------------------------------------------------------------------*/
32 | #include "stm32f10x.h"
33 |
34 | /** @addtogroup STM32F10x_StdPeriph_Driver
35 | * @{
36 | */
37 |
38 | /** @addtogroup RTC
39 | * @{
40 | */
41 |
42 | /** @defgroup RTC_Exported_Types
43 | * @{
44 | */
45 |
46 | /**
47 | * @}
48 | */
49 |
50 | /** @defgroup RTC_Exported_Constants
51 | * @{
52 | */
53 |
54 | /** @defgroup RTC_interrupts_define
55 | * @{
56 | */
57 |
58 | #define RTC_IT_OW ((uint16_t)0x0004) /*!< Overflow interrupt */
59 | #define RTC_IT_ALR ((uint16_t)0x0002) /*!< Alarm interrupt */
60 | #define RTC_IT_SEC ((uint16_t)0x0001) /*!< Second interrupt */
61 | #define IS_RTC_IT(IT) ((((IT) & (uint16_t)0xFFF8) == 0x00) && ((IT) != 0x00))
62 | #define IS_RTC_GET_IT(IT) (((IT) == RTC_IT_OW) || ((IT) == RTC_IT_ALR) || \
63 | ((IT) == RTC_IT_SEC))
64 | /**
65 | * @}
66 | */
67 |
68 | /** @defgroup RTC_interrupts_flags
69 | * @{
70 | */
71 |
72 | #define RTC_FLAG_RTOFF ((uint16_t)0x0020) /*!< RTC Operation OFF flag */
73 | #define RTC_FLAG_RSF ((uint16_t)0x0008) /*!< Registers Synchronized flag */
74 | #define RTC_FLAG_OW ((uint16_t)0x0004) /*!< Overflow flag */
75 | #define RTC_FLAG_ALR ((uint16_t)0x0002) /*!< Alarm flag */
76 | #define RTC_FLAG_SEC ((uint16_t)0x0001) /*!< Second flag */
77 | #define IS_RTC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFFF0) == 0x00) && ((FLAG) != 0x00))
78 | #define IS_RTC_GET_FLAG(FLAG) (((FLAG) == RTC_FLAG_RTOFF) || ((FLAG) == RTC_FLAG_RSF) || \
79 | ((FLAG) == RTC_FLAG_OW) || ((FLAG) == RTC_FLAG_ALR) || \
80 | ((FLAG) == RTC_FLAG_SEC))
81 | #define IS_RTC_PRESCALER(PRESCALER) ((PRESCALER) <= 0xFFFFF)
82 |
83 | /**
84 | * @}
85 | */
86 |
87 | /**
88 | * @}
89 | */
90 |
91 | /** @defgroup RTC_Exported_Macros
92 | * @{
93 | */
94 |
95 | /**
96 | * @}
97 | */
98 |
99 | /** @defgroup RTC_Exported_Functions
100 | * @{
101 | */
102 |
103 | void RTC_ITConfig(uint16_t RTC_IT, FunctionalState NewState);
104 | void RTC_EnterConfigMode(void);
105 | void RTC_ExitConfigMode(void);
106 | uint32_t RTC_GetCounter(void);
107 | void RTC_SetCounter(uint32_t CounterValue);
108 | void RTC_SetPrescaler(uint32_t PrescalerValue);
109 | void RTC_SetAlarm(uint32_t AlarmValue);
110 | uint32_t RTC_GetDivider(void);
111 | void RTC_WaitForLastTask(void);
112 | void RTC_WaitForSynchro(void);
113 | FlagStatus RTC_GetFlagStatus(uint16_t RTC_FLAG);
114 | void RTC_ClearFlag(uint16_t RTC_FLAG);
115 | ITStatus RTC_GetITStatus(uint16_t RTC_IT);
116 | void RTC_ClearITPendingBit(uint16_t RTC_IT);
117 |
118 | #ifdef __cplusplus
119 | }
120 | #endif
121 |
122 | #endif /* __STM32F10x_RTC_H */
123 | /**
124 | * @}
125 | */
126 |
127 | /**
128 | * @}
129 | */
130 |
131 | /**
132 | * @}
133 | */
134 |
135 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
136 |
--------------------------------------------------------------------------------
/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_wwdg.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_wwdg.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file contains all the functions prototypes for the WWDG firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Define to prevent recursive inclusion -------------------------------------*/
24 | #ifndef __STM32F10x_WWDG_H
25 | #define __STM32F10x_WWDG_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | /* Includes ------------------------------------------------------------------*/
32 | #include "stm32f10x.h"
33 |
34 | /** @addtogroup STM32F10x_StdPeriph_Driver
35 | * @{
36 | */
37 |
38 | /** @addtogroup WWDG
39 | * @{
40 | */
41 |
42 | /** @defgroup WWDG_Exported_Types
43 | * @{
44 | */
45 |
46 | /**
47 | * @}
48 | */
49 |
50 | /** @defgroup WWDG_Exported_Constants
51 | * @{
52 | */
53 |
54 | /** @defgroup WWDG_Prescaler
55 | * @{
56 | */
57 |
58 | #define WWDG_Prescaler_1 ((uint32_t)0x00000000)
59 | #define WWDG_Prescaler_2 ((uint32_t)0x00000080)
60 | #define WWDG_Prescaler_4 ((uint32_t)0x00000100)
61 | #define WWDG_Prescaler_8 ((uint32_t)0x00000180)
62 | #define IS_WWDG_PRESCALER(PRESCALER) (((PRESCALER) == WWDG_Prescaler_1) || \
63 | ((PRESCALER) == WWDG_Prescaler_2) || \
64 | ((PRESCALER) == WWDG_Prescaler_4) || \
65 | ((PRESCALER) == WWDG_Prescaler_8))
66 | #define IS_WWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0x7F)
67 | #define IS_WWDG_COUNTER(COUNTER) (((COUNTER) >= 0x40) && ((COUNTER) <= 0x7F))
68 |
69 | /**
70 | * @}
71 | */
72 |
73 | /**
74 | * @}
75 | */
76 |
77 | /** @defgroup WWDG_Exported_Macros
78 | * @{
79 | */
80 | /**
81 | * @}
82 | */
83 |
84 | /** @defgroup WWDG_Exported_Functions
85 | * @{
86 | */
87 |
88 | void WWDG_DeInit(void);
89 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler);
90 | void WWDG_SetWindowValue(uint8_t WindowValue);
91 | void WWDG_EnableIT(void);
92 | void WWDG_SetCounter(uint8_t Counter);
93 | void WWDG_Enable(uint8_t Counter);
94 | FlagStatus WWDG_GetFlagStatus(void);
95 | void WWDG_ClearFlag(void);
96 |
97 | #ifdef __cplusplus
98 | }
99 | #endif
100 |
101 | #endif /* __STM32F10x_WWDG_H */
102 |
103 | /**
104 | * @}
105 | */
106 |
107 | /**
108 | * @}
109 | */
110 |
111 | /**
112 | * @}
113 | */
114 |
115 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
116 |
--------------------------------------------------------------------------------
/Libraries/STM32F10x_StdPeriph_Driver/src/misc.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file misc.c
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file provides all the miscellaneous firmware functions (add-on
8 | * to CMSIS functions).
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Includes ------------------------------------------------------------------*/
24 | #include "misc.h"
25 |
26 | /** @addtogroup STM32F10x_StdPeriph_Driver
27 | * @{
28 | */
29 |
30 | /** @defgroup MISC
31 | * @brief MISC driver modules
32 | * @{
33 | */
34 |
35 | /** @defgroup MISC_Private_TypesDefinitions
36 | * @{
37 | */
38 |
39 | /**
40 | * @}
41 | */
42 |
43 | /** @defgroup MISC_Private_Defines
44 | * @{
45 | */
46 |
47 | #define AIRCR_VECTKEY_MASK ((uint32_t)0x05FA0000)
48 | /**
49 | * @}
50 | */
51 |
52 | /** @defgroup MISC_Private_Macros
53 | * @{
54 | */
55 |
56 | /**
57 | * @}
58 | */
59 |
60 | /** @defgroup MISC_Private_Variables
61 | * @{
62 | */
63 |
64 | /**
65 | * @}
66 | */
67 |
68 | /** @defgroup MISC_Private_FunctionPrototypes
69 | * @{
70 | */
71 |
72 | /**
73 | * @}
74 | */
75 |
76 | /** @defgroup MISC_Private_Functions
77 | * @{
78 | */
79 |
80 | /**
81 | * @brief Configures the priority grouping: pre-emption priority and subpriority.
82 | * @param NVIC_PriorityGroup: specifies the priority grouping bits length.
83 | * This parameter can be one of the following values:
84 | * @arg NVIC_PriorityGroup_0: 0 bits for pre-emption priority
85 | * 4 bits for subpriority
86 | * @arg NVIC_PriorityGroup_1: 1 bits for pre-emption priority
87 | * 3 bits for subpriority
88 | * @arg NVIC_PriorityGroup_2: 2 bits for pre-emption priority
89 | * 2 bits for subpriority
90 | * @arg NVIC_PriorityGroup_3: 3 bits for pre-emption priority
91 | * 1 bits for subpriority
92 | * @arg NVIC_PriorityGroup_4: 4 bits for pre-emption priority
93 | * 0 bits for subpriority
94 | * @retval None
95 | */
96 | void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup)
97 | {
98 | /* Check the parameters */
99 | assert_param(IS_NVIC_PRIORITY_GROUP(NVIC_PriorityGroup));
100 |
101 | /* Set the PRIGROUP[10:8] bits according to NVIC_PriorityGroup value */
102 | SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PriorityGroup;
103 | }
104 |
105 | /**
106 | * @brief Initializes the NVIC peripheral according to the specified
107 | * parameters in the NVIC_InitStruct.
108 | * @param NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains
109 | * the configuration information for the specified NVIC peripheral.
110 | * @retval None
111 | */
112 | void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct)
113 | {
114 | uint32_t tmppriority = 0x00, tmppre = 0x00, tmpsub = 0x0F;
115 |
116 | /* Check the parameters */
117 | assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd));
118 | assert_param(IS_NVIC_PREEMPTION_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority));
119 | assert_param(IS_NVIC_SUB_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelSubPriority));
120 |
121 | if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE)
122 | {
123 | /* Compute the Corresponding IRQ Priority --------------------------------*/
124 | tmppriority = (0x700 - ((SCB->AIRCR) & (uint32_t)0x700))>> 0x08;
125 | tmppre = (0x4 - tmppriority);
126 | tmpsub = tmpsub >> tmppriority;
127 |
128 | tmppriority = (uint32_t)NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority << tmppre;
129 | tmppriority |= NVIC_InitStruct->NVIC_IRQChannelSubPriority & tmpsub;
130 | tmppriority = tmppriority << 0x04;
131 |
132 | NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel] = tmppriority;
133 |
134 | /* Enable the Selected IRQ Channels --------------------------------------*/
135 | NVIC->ISER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
136 | (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
137 | }
138 | else
139 | {
140 | /* Disable the Selected IRQ Channels -------------------------------------*/
141 | NVIC->ICER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
142 | (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
143 | }
144 | }
145 |
146 | /**
147 | * @brief Sets the vector table location and Offset.
148 | * @param NVIC_VectTab: specifies if the vector table is in RAM or FLASH memory.
149 | * This parameter can be one of the following values:
150 | * @arg NVIC_VectTab_RAM
151 | * @arg NVIC_VectTab_FLASH
152 | * @param Offset: Vector Table base offset field. This value must be a multiple
153 | * of 0x200.
154 | * @retval None
155 | */
156 | void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset)
157 | {
158 | /* Check the parameters */
159 | assert_param(IS_NVIC_VECTTAB(NVIC_VectTab));
160 | assert_param(IS_NVIC_OFFSET(Offset));
161 |
162 | SCB->VTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80);
163 | }
164 |
165 | /**
166 | * @brief Selects the condition for the system to enter low power mode.
167 | * @param LowPowerMode: Specifies the new mode for the system to enter low power mode.
168 | * This parameter can be one of the following values:
169 | * @arg NVIC_LP_SEVONPEND
170 | * @arg NVIC_LP_SLEEPDEEP
171 | * @arg NVIC_LP_SLEEPONEXIT
172 | * @param NewState: new state of LP condition. This parameter can be: ENABLE or DISABLE.
173 | * @retval None
174 | */
175 | void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState)
176 | {
177 | /* Check the parameters */
178 | assert_param(IS_NVIC_LP(LowPowerMode));
179 | assert_param(IS_FUNCTIONAL_STATE(NewState));
180 |
181 | if (NewState != DISABLE)
182 | {
183 | SCB->SCR |= LowPowerMode;
184 | }
185 | else
186 | {
187 | SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode);
188 | }
189 | }
190 |
191 | /**
192 | * @brief Configures the SysTick clock source.
193 | * @param SysTick_CLKSource: specifies the SysTick clock source.
194 | * This parameter can be one of the following values:
195 | * @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source.
196 | * @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source.
197 | * @retval None
198 | */
199 | void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource)
200 | {
201 | /* Check the parameters */
202 | assert_param(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource));
203 | if (SysTick_CLKSource == SysTick_CLKSource_HCLK)
204 | {
205 | SysTick->CTRL |= SysTick_CLKSource_HCLK;
206 | }
207 | else
208 | {
209 | SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8;
210 | }
211 | }
212 |
213 | /**
214 | * @}
215 | */
216 |
217 | /**
218 | * @}
219 | */
220 |
221 | /**
222 | * @}
223 | */
224 |
225 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
226 |
--------------------------------------------------------------------------------
/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_crc.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_crc.c
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file provides all the CRC firmware functions.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /* Includes ------------------------------------------------------------------*/
23 | #include "stm32f10x_crc.h"
24 |
25 | /** @addtogroup STM32F10x_StdPeriph_Driver
26 | * @{
27 | */
28 |
29 | /** @defgroup CRC
30 | * @brief CRC driver modules
31 | * @{
32 | */
33 |
34 | /** @defgroup CRC_Private_TypesDefinitions
35 | * @{
36 | */
37 |
38 | /**
39 | * @}
40 | */
41 |
42 | /** @defgroup CRC_Private_Defines
43 | * @{
44 | */
45 |
46 | /**
47 | * @}
48 | */
49 |
50 | /** @defgroup CRC_Private_Macros
51 | * @{
52 | */
53 |
54 | /**
55 | * @}
56 | */
57 |
58 | /** @defgroup CRC_Private_Variables
59 | * @{
60 | */
61 |
62 | /**
63 | * @}
64 | */
65 |
66 | /** @defgroup CRC_Private_FunctionPrototypes
67 | * @{
68 | */
69 |
70 | /**
71 | * @}
72 | */
73 |
74 | /** @defgroup CRC_Private_Functions
75 | * @{
76 | */
77 |
78 | /**
79 | * @brief Resets the CRC Data register (DR).
80 | * @param None
81 | * @retval None
82 | */
83 | void CRC_ResetDR(void)
84 | {
85 | /* Reset CRC generator */
86 | CRC->CR = CRC_CR_RESET;
87 | }
88 |
89 | /**
90 | * @brief Computes the 32-bit CRC of a given data word(32-bit).
91 | * @param Data: data word(32-bit) to compute its CRC
92 | * @retval 32-bit CRC
93 | */
94 | uint32_t CRC_CalcCRC(uint32_t Data)
95 | {
96 | CRC->DR = Data;
97 |
98 | return (CRC->DR);
99 | }
100 |
101 | /**
102 | * @brief Computes the 32-bit CRC of a given buffer of data word(32-bit).
103 | * @param pBuffer: pointer to the buffer containing the data to be computed
104 | * @param BufferLength: length of the buffer to be computed
105 | * @retval 32-bit CRC
106 | */
107 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength)
108 | {
109 | uint32_t index = 0;
110 |
111 | for(index = 0; index < BufferLength; index++)
112 | {
113 | CRC->DR = pBuffer[index];
114 | }
115 | return (CRC->DR);
116 | }
117 |
118 | /**
119 | * @brief Returns the current CRC value.
120 | * @param None
121 | * @retval 32-bit CRC
122 | */
123 | uint32_t CRC_GetCRC(void)
124 | {
125 | return (CRC->DR);
126 | }
127 |
128 | /**
129 | * @brief Stores a 8-bit data in the Independent Data(ID) register.
130 | * @param IDValue: 8-bit value to be stored in the ID register
131 | * @retval None
132 | */
133 | void CRC_SetIDRegister(uint8_t IDValue)
134 | {
135 | CRC->IDR = IDValue;
136 | }
137 |
138 | /**
139 | * @brief Returns the 8-bit data stored in the Independent Data(ID) register
140 | * @param None
141 | * @retval 8-bit value of the ID register
142 | */
143 | uint8_t CRC_GetIDRegister(void)
144 | {
145 | return (CRC->IDR);
146 | }
147 |
148 | /**
149 | * @}
150 | */
151 |
152 | /**
153 | * @}
154 | */
155 |
156 | /**
157 | * @}
158 | */
159 |
160 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
161 |
--------------------------------------------------------------------------------
/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dbgmcu.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_dbgmcu.c
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file provides all the DBGMCU firmware functions.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /* Includes ------------------------------------------------------------------*/
23 | #include "stm32f10x_dbgmcu.h"
24 |
25 | /** @addtogroup STM32F10x_StdPeriph_Driver
26 | * @{
27 | */
28 |
29 | /** @defgroup DBGMCU
30 | * @brief DBGMCU driver modules
31 | * @{
32 | */
33 |
34 | /** @defgroup DBGMCU_Private_TypesDefinitions
35 | * @{
36 | */
37 |
38 | /**
39 | * @}
40 | */
41 |
42 | /** @defgroup DBGMCU_Private_Defines
43 | * @{
44 | */
45 |
46 | #define IDCODE_DEVID_MASK ((uint32_t)0x00000FFF)
47 | /**
48 | * @}
49 | */
50 |
51 | /** @defgroup DBGMCU_Private_Macros
52 | * @{
53 | */
54 |
55 | /**
56 | * @}
57 | */
58 |
59 | /** @defgroup DBGMCU_Private_Variables
60 | * @{
61 | */
62 |
63 | /**
64 | * @}
65 | */
66 |
67 | /** @defgroup DBGMCU_Private_FunctionPrototypes
68 | * @{
69 | */
70 |
71 | /**
72 | * @}
73 | */
74 |
75 | /** @defgroup DBGMCU_Private_Functions
76 | * @{
77 | */
78 |
79 | /**
80 | * @brief Returns the device revision identifier.
81 | * @param None
82 | * @retval Device revision identifier
83 | */
84 | uint32_t DBGMCU_GetREVID(void)
85 | {
86 | return(DBGMCU->IDCODE >> 16);
87 | }
88 |
89 | /**
90 | * @brief Returns the device identifier.
91 | * @param None
92 | * @retval Device identifier
93 | */
94 | uint32_t DBGMCU_GetDEVID(void)
95 | {
96 | return(DBGMCU->IDCODE & IDCODE_DEVID_MASK);
97 | }
98 |
99 | /**
100 | * @brief Configures the specified peripheral and low power mode behavior
101 | * when the MCU under Debug mode.
102 | * @param DBGMCU_Periph: specifies the peripheral and low power mode.
103 | * This parameter can be any combination of the following values:
104 | * @arg DBGMCU_SLEEP: Keep debugger connection during SLEEP mode
105 | * @arg DBGMCU_STOP: Keep debugger connection during STOP mode
106 | * @arg DBGMCU_STANDBY: Keep debugger connection during STANDBY mode
107 | * @arg DBGMCU_IWDG_STOP: Debug IWDG stopped when Core is halted
108 | * @arg DBGMCU_WWDG_STOP: Debug WWDG stopped when Core is halted
109 | * @arg DBGMCU_TIM1_STOP: TIM1 counter stopped when Core is halted
110 | * @arg DBGMCU_TIM2_STOP: TIM2 counter stopped when Core is halted
111 | * @arg DBGMCU_TIM3_STOP: TIM3 counter stopped when Core is halted
112 | * @arg DBGMCU_TIM4_STOP: TIM4 counter stopped when Core is halted
113 | * @arg DBGMCU_CAN1_STOP: Debug CAN2 stopped when Core is halted
114 | * @arg DBGMCU_I2C1_SMBUS_TIMEOUT: I2C1 SMBUS timeout mode stopped when Core is halted
115 | * @arg DBGMCU_I2C2_SMBUS_TIMEOUT: I2C2 SMBUS timeout mode stopped when Core is halted
116 | * @arg DBGMCU_TIM5_STOP: TIM5 counter stopped when Core is halted
117 | * @arg DBGMCU_TIM6_STOP: TIM6 counter stopped when Core is halted
118 | * @arg DBGMCU_TIM7_STOP: TIM7 counter stopped when Core is halted
119 | * @arg DBGMCU_TIM8_STOP: TIM8 counter stopped when Core is halted
120 | * @arg DBGMCU_CAN2_STOP: Debug CAN2 stopped when Core is halted
121 | * @arg DBGMCU_TIM15_STOP: TIM15 counter stopped when Core is halted
122 | * @arg DBGMCU_TIM16_STOP: TIM16 counter stopped when Core is halted
123 | * @arg DBGMCU_TIM17_STOP: TIM17 counter stopped when Core is halted
124 | * @arg DBGMCU_TIM9_STOP: TIM9 counter stopped when Core is halted
125 | * @arg DBGMCU_TIM10_STOP: TIM10 counter stopped when Core is halted
126 | * @arg DBGMCU_TIM11_STOP: TIM11 counter stopped when Core is halted
127 | * @arg DBGMCU_TIM12_STOP: TIM12 counter stopped when Core is halted
128 | * @arg DBGMCU_TIM13_STOP: TIM13 counter stopped when Core is halted
129 | * @arg DBGMCU_TIM14_STOP: TIM14 counter stopped when Core is halted
130 | * @param NewState: new state of the specified peripheral in Debug mode.
131 | * This parameter can be: ENABLE or DISABLE.
132 | * @retval None
133 | */
134 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState)
135 | {
136 | /* Check the parameters */
137 | assert_param(IS_DBGMCU_PERIPH(DBGMCU_Periph));
138 | assert_param(IS_FUNCTIONAL_STATE(NewState));
139 |
140 | if (NewState != DISABLE)
141 | {
142 | DBGMCU->CR |= DBGMCU_Periph;
143 | }
144 | else
145 | {
146 | DBGMCU->CR &= ~DBGMCU_Periph;
147 | }
148 | }
149 |
150 | /**
151 | * @}
152 | */
153 |
154 | /**
155 | * @}
156 | */
157 |
158 | /**
159 | * @}
160 | */
161 |
162 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
163 |
--------------------------------------------------------------------------------
/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_exti.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_exti.c
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file provides all the EXTI firmware functions.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /* Includes ------------------------------------------------------------------*/
23 | #include "stm32f10x_exti.h"
24 |
25 | /** @addtogroup STM32F10x_StdPeriph_Driver
26 | * @{
27 | */
28 |
29 | /** @defgroup EXTI
30 | * @brief EXTI driver modules
31 | * @{
32 | */
33 |
34 | /** @defgroup EXTI_Private_TypesDefinitions
35 | * @{
36 | */
37 |
38 | /**
39 | * @}
40 | */
41 |
42 | /** @defgroup EXTI_Private_Defines
43 | * @{
44 | */
45 |
46 | #define EXTI_LINENONE ((uint32_t)0x00000) /* No interrupt selected */
47 |
48 | /**
49 | * @}
50 | */
51 |
52 | /** @defgroup EXTI_Private_Macros
53 | * @{
54 | */
55 |
56 | /**
57 | * @}
58 | */
59 |
60 | /** @defgroup EXTI_Private_Variables
61 | * @{
62 | */
63 |
64 | /**
65 | * @}
66 | */
67 |
68 | /** @defgroup EXTI_Private_FunctionPrototypes
69 | * @{
70 | */
71 |
72 | /**
73 | * @}
74 | */
75 |
76 | /** @defgroup EXTI_Private_Functions
77 | * @{
78 | */
79 |
80 | /**
81 | * @brief Deinitializes the EXTI peripheral registers to their default reset values.
82 | * @param None
83 | * @retval None
84 | */
85 | void EXTI_DeInit(void)
86 | {
87 | EXTI->IMR = 0x00000000;
88 | EXTI->EMR = 0x00000000;
89 | EXTI->RTSR = 0x00000000;
90 | EXTI->FTSR = 0x00000000;
91 | EXTI->PR = 0x000FFFFF;
92 | }
93 |
94 | /**
95 | * @brief Initializes the EXTI peripheral according to the specified
96 | * parameters in the EXTI_InitStruct.
97 | * @param EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure
98 | * that contains the configuration information for the EXTI peripheral.
99 | * @retval None
100 | */
101 | void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct)
102 | {
103 | uint32_t tmp = 0;
104 |
105 | /* Check the parameters */
106 | assert_param(IS_EXTI_MODE(EXTI_InitStruct->EXTI_Mode));
107 | assert_param(IS_EXTI_TRIGGER(EXTI_InitStruct->EXTI_Trigger));
108 | assert_param(IS_EXTI_LINE(EXTI_InitStruct->EXTI_Line));
109 | assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->EXTI_LineCmd));
110 |
111 | tmp = (uint32_t)EXTI_BASE;
112 |
113 | if (EXTI_InitStruct->EXTI_LineCmd != DISABLE)
114 | {
115 | /* Clear EXTI line configuration */
116 | EXTI->IMR &= ~EXTI_InitStruct->EXTI_Line;
117 | EXTI->EMR &= ~EXTI_InitStruct->EXTI_Line;
118 |
119 | tmp += EXTI_InitStruct->EXTI_Mode;
120 |
121 | *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line;
122 |
123 | /* Clear Rising Falling edge configuration */
124 | EXTI->RTSR &= ~EXTI_InitStruct->EXTI_Line;
125 | EXTI->FTSR &= ~EXTI_InitStruct->EXTI_Line;
126 |
127 | /* Select the trigger for the selected external interrupts */
128 | if (EXTI_InitStruct->EXTI_Trigger == EXTI_Trigger_Rising_Falling)
129 | {
130 | /* Rising Falling edge */
131 | EXTI->RTSR |= EXTI_InitStruct->EXTI_Line;
132 | EXTI->FTSR |= EXTI_InitStruct->EXTI_Line;
133 | }
134 | else
135 | {
136 | tmp = (uint32_t)EXTI_BASE;
137 | tmp += EXTI_InitStruct->EXTI_Trigger;
138 |
139 | *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line;
140 | }
141 | }
142 | else
143 | {
144 | tmp += EXTI_InitStruct->EXTI_Mode;
145 |
146 | /* Disable the selected external lines */
147 | *(__IO uint32_t *) tmp &= ~EXTI_InitStruct->EXTI_Line;
148 | }
149 | }
150 |
151 | /**
152 | * @brief Fills each EXTI_InitStruct member with its reset value.
153 | * @param EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure which will
154 | * be initialized.
155 | * @retval None
156 | */
157 | void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct)
158 | {
159 | EXTI_InitStruct->EXTI_Line = EXTI_LINENONE;
160 | EXTI_InitStruct->EXTI_Mode = EXTI_Mode_Interrupt;
161 | EXTI_InitStruct->EXTI_Trigger = EXTI_Trigger_Falling;
162 | EXTI_InitStruct->EXTI_LineCmd = DISABLE;
163 | }
164 |
165 | /**
166 | * @brief Generates a Software interrupt.
167 | * @param EXTI_Line: specifies the EXTI lines to be enabled or disabled.
168 | * This parameter can be any combination of EXTI_Linex where x can be (0..19).
169 | * @retval None
170 | */
171 | void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line)
172 | {
173 | /* Check the parameters */
174 | assert_param(IS_EXTI_LINE(EXTI_Line));
175 |
176 | EXTI->SWIER |= EXTI_Line;
177 | }
178 |
179 | /**
180 | * @brief Checks whether the specified EXTI line flag is set or not.
181 | * @param EXTI_Line: specifies the EXTI line flag to check.
182 | * This parameter can be:
183 | * @arg EXTI_Linex: External interrupt line x where x(0..19)
184 | * @retval The new state of EXTI_Line (SET or RESET).
185 | */
186 | FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line)
187 | {
188 | FlagStatus bitstatus = RESET;
189 | /* Check the parameters */
190 | assert_param(IS_GET_EXTI_LINE(EXTI_Line));
191 |
192 | if ((EXTI->PR & EXTI_Line) != (uint32_t)RESET)
193 | {
194 | bitstatus = SET;
195 | }
196 | else
197 | {
198 | bitstatus = RESET;
199 | }
200 | return bitstatus;
201 | }
202 |
203 | /**
204 | * @brief Clears the EXTI's line pending flags.
205 | * @param EXTI_Line: specifies the EXTI lines flags to clear.
206 | * This parameter can be any combination of EXTI_Linex where x can be (0..19).
207 | * @retval None
208 | */
209 | void EXTI_ClearFlag(uint32_t EXTI_Line)
210 | {
211 | /* Check the parameters */
212 | assert_param(IS_EXTI_LINE(EXTI_Line));
213 |
214 | EXTI->PR = EXTI_Line;
215 | }
216 |
217 | /**
218 | * @brief Checks whether the specified EXTI line is asserted or not.
219 | * @param EXTI_Line: specifies the EXTI line to check.
220 | * This parameter can be:
221 | * @arg EXTI_Linex: External interrupt line x where x(0..19)
222 | * @retval The new state of EXTI_Line (SET or RESET).
223 | */
224 | ITStatus EXTI_GetITStatus(uint32_t EXTI_Line)
225 | {
226 | ITStatus bitstatus = RESET;
227 | uint32_t enablestatus = 0;
228 | /* Check the parameters */
229 | assert_param(IS_GET_EXTI_LINE(EXTI_Line));
230 |
231 | enablestatus = EXTI->IMR & EXTI_Line;
232 | if (((EXTI->PR & EXTI_Line) != (uint32_t)RESET) && (enablestatus != (uint32_t)RESET))
233 | {
234 | bitstatus = SET;
235 | }
236 | else
237 | {
238 | bitstatus = RESET;
239 | }
240 | return bitstatus;
241 | }
242 |
243 | /**
244 | * @brief Clears the EXTI's line pending bits.
245 | * @param EXTI_Line: specifies the EXTI lines to clear.
246 | * This parameter can be any combination of EXTI_Linex where x can be (0..19).
247 | * @retval None
248 | */
249 | void EXTI_ClearITPendingBit(uint32_t EXTI_Line)
250 | {
251 | /* Check the parameters */
252 | assert_param(IS_EXTI_LINE(EXTI_Line));
253 |
254 | EXTI->PR = EXTI_Line;
255 | }
256 |
257 | /**
258 | * @}
259 | */
260 |
261 | /**
262 | * @}
263 | */
264 |
265 | /**
266 | * @}
267 | */
268 |
269 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
270 |
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/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_flash.c:
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/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_i2c.c:
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/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_iwdg.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_iwdg.c
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file provides all the IWDG firmware functions.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /* Includes ------------------------------------------------------------------*/
23 | #include "stm32f10x_iwdg.h"
24 |
25 | /** @addtogroup STM32F10x_StdPeriph_Driver
26 | * @{
27 | */
28 |
29 | /** @defgroup IWDG
30 | * @brief IWDG driver modules
31 | * @{
32 | */
33 |
34 | /** @defgroup IWDG_Private_TypesDefinitions
35 | * @{
36 | */
37 |
38 | /**
39 | * @}
40 | */
41 |
42 | /** @defgroup IWDG_Private_Defines
43 | * @{
44 | */
45 |
46 | /* ---------------------- IWDG registers bit mask ----------------------------*/
47 |
48 | /* KR register bit mask */
49 | #define KR_KEY_Reload ((uint16_t)0xAAAA)
50 | #define KR_KEY_Enable ((uint16_t)0xCCCC)
51 |
52 | /**
53 | * @}
54 | */
55 |
56 | /** @defgroup IWDG_Private_Macros
57 | * @{
58 | */
59 |
60 | /**
61 | * @}
62 | */
63 |
64 | /** @defgroup IWDG_Private_Variables
65 | * @{
66 | */
67 |
68 | /**
69 | * @}
70 | */
71 |
72 | /** @defgroup IWDG_Private_FunctionPrototypes
73 | * @{
74 | */
75 |
76 | /**
77 | * @}
78 | */
79 |
80 | /** @defgroup IWDG_Private_Functions
81 | * @{
82 | */
83 |
84 | /**
85 | * @brief Enables or disables write access to IWDG_PR and IWDG_RLR registers.
86 | * @param IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers.
87 | * This parameter can be one of the following values:
88 | * @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers
89 | * @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers
90 | * @retval None
91 | */
92 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess)
93 | {
94 | /* Check the parameters */
95 | assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess));
96 | IWDG->KR = IWDG_WriteAccess;
97 | }
98 |
99 | /**
100 | * @brief Sets IWDG Prescaler value.
101 | * @param IWDG_Prescaler: specifies the IWDG Prescaler value.
102 | * This parameter can be one of the following values:
103 | * @arg IWDG_Prescaler_4: IWDG prescaler set to 4
104 | * @arg IWDG_Prescaler_8: IWDG prescaler set to 8
105 | * @arg IWDG_Prescaler_16: IWDG prescaler set to 16
106 | * @arg IWDG_Prescaler_32: IWDG prescaler set to 32
107 | * @arg IWDG_Prescaler_64: IWDG prescaler set to 64
108 | * @arg IWDG_Prescaler_128: IWDG prescaler set to 128
109 | * @arg IWDG_Prescaler_256: IWDG prescaler set to 256
110 | * @retval None
111 | */
112 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler)
113 | {
114 | /* Check the parameters */
115 | assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler));
116 | IWDG->PR = IWDG_Prescaler;
117 | }
118 |
119 | /**
120 | * @brief Sets IWDG Reload value.
121 | * @param Reload: specifies the IWDG Reload value.
122 | * This parameter must be a number between 0 and 0x0FFF.
123 | * @retval None
124 | */
125 | void IWDG_SetReload(uint16_t Reload)
126 | {
127 | /* Check the parameters */
128 | assert_param(IS_IWDG_RELOAD(Reload));
129 | IWDG->RLR = Reload;
130 | }
131 |
132 | /**
133 | * @brief Reloads IWDG counter with value defined in the reload register
134 | * (write access to IWDG_PR and IWDG_RLR registers disabled).
135 | * @param None
136 | * @retval None
137 | */
138 | void IWDG_ReloadCounter(void)
139 | {
140 | IWDG->KR = KR_KEY_Reload;
141 | }
142 |
143 | /**
144 | * @brief Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled).
145 | * @param None
146 | * @retval None
147 | */
148 | void IWDG_Enable(void)
149 | {
150 | IWDG->KR = KR_KEY_Enable;
151 | }
152 |
153 | /**
154 | * @brief Checks whether the specified IWDG flag is set or not.
155 | * @param IWDG_FLAG: specifies the flag to check.
156 | * This parameter can be one of the following values:
157 | * @arg IWDG_FLAG_PVU: Prescaler Value Update on going
158 | * @arg IWDG_FLAG_RVU: Reload Value Update on going
159 | * @retval The new state of IWDG_FLAG (SET or RESET).
160 | */
161 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG)
162 | {
163 | FlagStatus bitstatus = RESET;
164 | /* Check the parameters */
165 | assert_param(IS_IWDG_FLAG(IWDG_FLAG));
166 | if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET)
167 | {
168 | bitstatus = SET;
169 | }
170 | else
171 | {
172 | bitstatus = RESET;
173 | }
174 | /* Return the flag status */
175 | return bitstatus;
176 | }
177 |
178 | /**
179 | * @}
180 | */
181 |
182 | /**
183 | * @}
184 | */
185 |
186 | /**
187 | * @}
188 | */
189 |
190 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
191 |
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/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_wwdg.c:
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1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_wwdg.c
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file provides all the WWDG firmware functions.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /* Includes ------------------------------------------------------------------*/
23 | #include "stm32f10x_wwdg.h"
24 | #include "stm32f10x_rcc.h"
25 |
26 | /** @addtogroup STM32F10x_StdPeriph_Driver
27 | * @{
28 | */
29 |
30 | /** @defgroup WWDG
31 | * @brief WWDG driver modules
32 | * @{
33 | */
34 |
35 | /** @defgroup WWDG_Private_TypesDefinitions
36 | * @{
37 | */
38 |
39 | /**
40 | * @}
41 | */
42 |
43 | /** @defgroup WWDG_Private_Defines
44 | * @{
45 | */
46 |
47 | /* ----------- WWDG registers bit address in the alias region ----------- */
48 | #define WWDG_OFFSET (WWDG_BASE - PERIPH_BASE)
49 |
50 | /* Alias word address of EWI bit */
51 | #define CFR_OFFSET (WWDG_OFFSET + 0x04)
52 | #define EWI_BitNumber 0x09
53 | #define CFR_EWI_BB (PERIPH_BB_BASE + (CFR_OFFSET * 32) + (EWI_BitNumber * 4))
54 |
55 | /* --------------------- WWDG registers bit mask ------------------------ */
56 |
57 | /* CR register bit mask */
58 | #define CR_WDGA_Set ((uint32_t)0x00000080)
59 |
60 | /* CFR register bit mask */
61 | #define CFR_WDGTB_Mask ((uint32_t)0xFFFFFE7F)
62 | #define CFR_W_Mask ((uint32_t)0xFFFFFF80)
63 | #define BIT_Mask ((uint8_t)0x7F)
64 |
65 | /**
66 | * @}
67 | */
68 |
69 | /** @defgroup WWDG_Private_Macros
70 | * @{
71 | */
72 |
73 | /**
74 | * @}
75 | */
76 |
77 | /** @defgroup WWDG_Private_Variables
78 | * @{
79 | */
80 |
81 | /**
82 | * @}
83 | */
84 |
85 | /** @defgroup WWDG_Private_FunctionPrototypes
86 | * @{
87 | */
88 |
89 | /**
90 | * @}
91 | */
92 |
93 | /** @defgroup WWDG_Private_Functions
94 | * @{
95 | */
96 |
97 | /**
98 | * @brief Deinitializes the WWDG peripheral registers to their default reset values.
99 | * @param None
100 | * @retval None
101 | */
102 | void WWDG_DeInit(void)
103 | {
104 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE);
105 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE);
106 | }
107 |
108 | /**
109 | * @brief Sets the WWDG Prescaler.
110 | * @param WWDG_Prescaler: specifies the WWDG Prescaler.
111 | * This parameter can be one of the following values:
112 | * @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1
113 | * @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2
114 | * @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4
115 | * @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8
116 | * @retval None
117 | */
118 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler)
119 | {
120 | uint32_t tmpreg = 0;
121 | /* Check the parameters */
122 | assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler));
123 | /* Clear WDGTB[1:0] bits */
124 | tmpreg = WWDG->CFR & CFR_WDGTB_Mask;
125 | /* Set WDGTB[1:0] bits according to WWDG_Prescaler value */
126 | tmpreg |= WWDG_Prescaler;
127 | /* Store the new value */
128 | WWDG->CFR = tmpreg;
129 | }
130 |
131 | /**
132 | * @brief Sets the WWDG window value.
133 | * @param WindowValue: specifies the window value to be compared to the downcounter.
134 | * This parameter value must be lower than 0x80.
135 | * @retval None
136 | */
137 | void WWDG_SetWindowValue(uint8_t WindowValue)
138 | {
139 | __IO uint32_t tmpreg = 0;
140 |
141 | /* Check the parameters */
142 | assert_param(IS_WWDG_WINDOW_VALUE(WindowValue));
143 | /* Clear W[6:0] bits */
144 |
145 | tmpreg = WWDG->CFR & CFR_W_Mask;
146 |
147 | /* Set W[6:0] bits according to WindowValue value */
148 | tmpreg |= WindowValue & (uint32_t) BIT_Mask;
149 |
150 | /* Store the new value */
151 | WWDG->CFR = tmpreg;
152 | }
153 |
154 | /**
155 | * @brief Enables the WWDG Early Wakeup interrupt(EWI).
156 | * @param None
157 | * @retval None
158 | */
159 | void WWDG_EnableIT(void)
160 | {
161 | *(__IO uint32_t *) CFR_EWI_BB = (uint32_t)ENABLE;
162 | }
163 |
164 | /**
165 | * @brief Sets the WWDG counter value.
166 | * @param Counter: specifies the watchdog counter value.
167 | * This parameter must be a number between 0x40 and 0x7F.
168 | * @retval None
169 | */
170 | void WWDG_SetCounter(uint8_t Counter)
171 | {
172 | /* Check the parameters */
173 | assert_param(IS_WWDG_COUNTER(Counter));
174 | /* Write to T[6:0] bits to configure the counter value, no need to do
175 | a read-modify-write; writing a 0 to WDGA bit does nothing */
176 | WWDG->CR = Counter & BIT_Mask;
177 | }
178 |
179 | /**
180 | * @brief Enables WWDG and load the counter value.
181 | * @param Counter: specifies the watchdog counter value.
182 | * This parameter must be a number between 0x40 and 0x7F.
183 | * @retval None
184 | */
185 | void WWDG_Enable(uint8_t Counter)
186 | {
187 | /* Check the parameters */
188 | assert_param(IS_WWDG_COUNTER(Counter));
189 | WWDG->CR = CR_WDGA_Set | Counter;
190 | }
191 |
192 | /**
193 | * @brief Checks whether the Early Wakeup interrupt flag is set or not.
194 | * @param None
195 | * @retval The new state of the Early Wakeup interrupt flag (SET or RESET)
196 | */
197 | FlagStatus WWDG_GetFlagStatus(void)
198 | {
199 | return (FlagStatus)(WWDG->SR);
200 | }
201 |
202 | /**
203 | * @brief Clears Early Wakeup interrupt flag.
204 | * @param None
205 | * @retval None
206 | */
207 | void WWDG_ClearFlag(void)
208 | {
209 | WWDG->SR = (uint32_t)RESET;
210 | }
211 |
212 | /**
213 | * @}
214 | */
215 |
216 | /**
217 | * @}
218 | */
219 |
220 | /**
221 | * @}
222 | */
223 |
224 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
225 |
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/Public/system.c:
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1 | #include "system.h"
2 |
3 |
4 |
5 |
6 |
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1 | #ifndef __usart_H
2 | #define __usart_H
3 |
4 | #include "system.h"
5 | #include "stdio.h"
6 |
7 | void USART1_Init(u32 bound);
8 |
9 |
10 | #endif
11 |
12 |
13 |
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/README.md:
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1 | # AWTK 针对 RT-Thread(STM32f103ze) 的移植。
2 |
3 | * [AWTK](https://github.com/zlgopen/awtk) 全称 Toolkit AnyWhere，是 [ZLG](http://www.zlg.cn/) 开发的开源 GUI 引擎，旨在为嵌入式系统、WEB、各种小程序、手机和 PC 打造的通用 GUI 引擎，为用户提供一个功能强大、高效可靠、简单易用、可轻松做出炫酷效果的 GUI 引擎。
4 |
5 | * [RT-Thread](https://github.com/RT-Thread/rt-thread) RT-Thread is an open source IoT operating system from China, which has strong scalability: from a tiny kernel running on a tiny core, for example ARM Cortex-M0, or Cortex-M3/4/7, to a rich feature system running on MIPS32, ARM Cortex-A8, ARM Cortex-A9 DualCore etc.
6 |
7 | * [awtk-stm32f103ze-rtthread](https://github.com/zlgopen/awtk-stm32f103ze-rtthread) 是 AWTK 在 [RT-Thread](https://github.com/RT-Thread/rt-thread) 上的移植。
8 |
9 | > 本项目以 [普中科技 STM32F103ZET6 开发实验板](https://item.taobao.com/item.htm?spm=a230r.1.14.1.50a130e8TMKYMC&id=558855281660&ns=1&abbucket=5#detail) 为载体移植，其它开发板可能要做些修改，有问题请请创建 issue。
10 |
11 | ## 编译
12 |
13 | 1. 获取源码
14 |
15 | > 将三个仓库取到同一个目录下：
16 | ```
17 | git clone https://github.com/zlgopen/awtk.git
18 | git clone https://github.com/zlgopen/awtk-demo-app.git
19 | git clone https://github.com/zlgopen/awtk-stm32f103ze-rtthread.git
20 | ```
21 |
22 | 2. 用 keil 打开 user/awtk.uvproj
23 |
24 | ## 文档
25 |
26 | * [AWTK 在 RT-Thread 上的移植笔记](docs/rtt-port.md)
27 |
28 | * [AWTK 在 STM32F103 裸系统上的移植笔记](https://github.com/zlgopen/awtk/blob/master/docs/porting_to_stm32f103ze.md)
29 |
30 | * LCD 控制器
31 |
32 | > 这块板子老版本硬件和新版本硬件使用不同的 LCD 控制器，请根据自己的实际情况，修改 tftlcd.h，定义 LCD 控制器对应的宏：
33 |
34 | 新版本（缺省）
35 |
36 | ```c
37 | #define TFTLCD_R61509VN
38 | ```
39 |
40 | 旧版本
41 |
42 | ```c
43 | #define TFTLCD_HX8357D
44 |
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1 | #ifndef _adc_H
2 | #define _adc_H
3 |
4 | #include "system.h"
5 |
6 | void ADCx_Init(void);
7 | u16 Get_ADC_Value(u8 ch,u8 times);
8 |
9 |
10 | #endif
11 |
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1 | #ifndef _adc_temp_H
2 | #define _adc_temp_H
3 |
4 | #include "system.h"
5 |
6 | void ADC_Temp_Init(void);
7 | u16 Get_ADC_Temp_Value(u8 ch,u8 times);
8 | int Get_Temperture(void);
9 |
10 | #endif
11 |
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1 | #ifndef _exti_H
2 | #define _exti_H
3 |
4 |
5 | #include "system.h"
6 |
7 | void My_EXTI_Init(void);
8 |
9 | #endif
10 |
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1 | #ifndef _pwm_H
2 | #define _pwm_H
3 |
4 | #include "system.h"
5 |
6 | void TIM3_CH1_PWM_Init(u16 per,u16 psc);
7 |
8 | #endif
9 |
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/app/pwm_dac/pwm_dac.h:
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1 | #ifndef _pwm_dac_H
2 | #define _pwm_dac_H
3 |
4 | #include "system.h"
5 |
6 | void TIM4_CH1_PWM_Init(u16 arr,u16 psc);
7 |
8 | #endif
9 |
10 |
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/app/time/time.h:
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1 | #ifndef _time_H
2 | #define _time_H
3 |
4 | #include "system.h"
5 |
6 |
7 | void TIM4_Init(u16 per,u16 psc);
8 | void TIM3_Init(u16 per,u16 psc);
9 | void TIM5_Init(u16 per,u16 psc);
10 | #endif
11 |
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/app/wkup/wkup.h:
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1 | #ifndef _wkup_H
2 | #define _wkup_H
3 |
4 | #include "system.h"
5 |
6 |
7 | void Enter_Standby_Mode(void);
8 |
9 | #endif
10 |
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/app/wwdg/wwdg.h:
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1 | #ifndef _wwdg_H
2 | #define _wwdg_H
3 |
4 |
5 | #include "system.h"
6 |
7 | void WWDG_Init(void);
8 |
9 | #endif
10 |
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/awtk-port/SysTick.c:
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/awtk-port/SysTick.h:
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1 | #ifndef _SysTick_H
2 | #define _SysTick_H
3 |
4 | #include "system.h"
5 |
6 | void SysTick_Init(void);
7 | void delay_ms(u16 nms);
8 | void delay_us(u32 nus);
9 |
10 |
11 |
12 | #endif
13 |
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/awtk-port/assert.c:
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1 | #include "tkc/types_def.h"
2 |
3 | __attribute__((weak, noreturn)) void
4 | __aeabi_assert(const char *expr, const char *file, int line) {
5 | for (;;) {
6 | }
7 | }
8 |
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/awtk-port/awtk_config.h:
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1 |
2 | /**
3 | * File: awtk_config.h
4 | * Author: AWTK Develop Team
5 | * Brief: config
6 | *
7 | * Copyright (c) 2018 - 2019 Guangzhou ZHIYUAN Electronics Co.,Ltd.
8 | *
9 | * This program is distributed in the hope that it will be useful,
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 | * License file for more details.
13 | *
14 | */
15 |
16 | /**
17 | * History:
18 | * ================================================================
19 | * 2018-09-12 Li XianJing created
20 | *
21 | */
22 |
23 | #ifndef AWTK_CONFIG_H
24 | #define AWTK_CONFIG_H
25 |
26 | /**
27 | * 嵌入式系统有自己的main函数时，请定义本宏。
28 | *
29 | */
30 | #define USE_GUI_MAIN 1
31 |
32 | /**
33 | * 如果需要支持预先解码的位图字体，请定义本宏。一般只在RAM极小时，才启用本宏。
34 | */
35 | #define WITH_BITMAP_FONT 1
36 |
37 | /**
38 | * 如果支持png/jpeg图片，请定义本宏
39 | *
40 | * #define WITH_STB_IMAGE 1
41 | */
42 |
43 | /**
44 | * 如果用stb支持Truetype字体，请定义本宏
45 | *
46 | * #define WITH_STB_FONT 1
47 | */
48 |
49 | /**
50 | * 如果用freetype支持Truetype字体，请定义本宏。
51 | *
52 | * #define WITH_FT_FONT 1
53 | */
54 |
55 | /**
56 | * 如果支持从文件系统加载资源，请定义本宏
57 | *
58 | * #define WITH_FS_RES 1
59 | */
60 |
61 | /**
62 | * 如果定义本宏，使用标准的UNICODE换行算法，除非资源极为有限，请定义本宏。
63 | *
64 | */
65 | #define WITH_UNICODE_BREAK 1
66 |
67 | /**
68 | * 如果定义本宏，将图片解码成BGRA8888格式，否则解码成RGBA8888的格式。
69 | * 当硬件的2D加速需要BGRA格式时，请启用本宏。
70 | *
71 | * #define WITH_BITMAP_BGRA 1
72 | */
73 |
74 | /**
75 | * 如果定义本宏，将不透明的PNG图片解码成BGR565格式，建议定义。
76 | * 另外和LCD的格式保存一致，可以大幅度提高性能。
77 | *
78 | * #define WITH_BITMAP_BGR565 1
79 | */
80 |
81 | /**
82 | * 如果不需输入法，请定义本宏
83 | *
84 | */
85 | #define WITH_NULL_IM 1
86 |
87 | /**
88 | * 如果有标准的malloc/free/calloc等函数，请定义本宏
89 | *
90 | * #define HAS_STD_MALLOC 1
91 | */
92 |
93 | /**
94 | * 如果有标准的fopen/fclose等函数，请定义本宏
95 | *
96 | * #define HAS_STDIO 1
97 | */
98 |
99 | /**
100 | * 如果有标准的pthread等函数，请定义本宏
101 | *
102 | * #define HAS_PTHREAD 1
103 | */
104 |
105 | /**
106 | * 如果有优化版本的memcpy函数，请定义本宏
107 | *
108 | * #define HAS_FAST_MEMCPY 1
109 | */
110 |
111 | /**
112 | * 如果出现wcsxxx之类的函数没有定义时，请定义该宏
113 | *
114 | * #define WITH_WCSXXX 1
115 | */
116 | #define WITH_WCSXXX 1
117 |
118 | /**
119 | * 如果启用STM32 G2D硬件加速，请定义本宏
120 | *
121 | * #define WITH_STM32_G2D 1
122 | */
123 |
124 | /**
125 | * 如果启用NXP PXP硬件加速，请定义本宏
126 | *
127 | * #define WITH_PXP_G2D 1
128 | */
129 |
130 | /**
131 | * 在没有GPU时，如果启用agge作为nanovg的后端(较agg作为后端：小，快，图形质量稍差)，请定义本宏。
132 | *
133 | * #define WITH_NANOVG_AGGE 1
134 | */
135 |
136 | /**
137 | * 在没有GPU时，如果启用agg作为nanovg的后端(较agge作为后端：大，慢，图形质量好)，请定义本宏。
138 | * 注意：agg是以GPL协议开源。
139 | *
140 | * #define WITH_NANOVG_AGG 1
141 | */
142 |
143 | /**
144 | * 如果启用鼠标指针，请定义本宏
145 | *
146 | * #define ENABLE_CURSOR 1
147 | */
148 |
149 | /**
150 | * 对于低端平台，如果不使用控件动画，请定义本宏。
151 | *
152 | */
153 | #define WITHOUT_WIDGET_ANIMATORS 1
154 |
155 | /**
156 | * 对于低端平台，如果不使用窗口动画，请定义本宏。
157 | *
158 | */
159 | #define WITHOUT_WINDOW_ANIMATORS 1
160 |
161 | /**
162 | * 对于低端平台，如果不使用对话框高亮策略，请定义本宏。
163 | *
164 | */
165 | #define WITHOUT_DIALOG_HIGHLIGHTER 1
166 |
167 | /**
168 | * 对于低端平台，如果不使用扩展控件，请定义本宏。
169 | *
170 | */
171 | #define WITHOUT_EXT_WIDGETS 1
172 |
173 | /**
174 | * 对于低端平台，如果不使用 fscript 模块，请定义本宏。
175 | *
176 | *
177 | */
178 | #define WITHOUT_FSCRIPT 1
179 |
180 | /**
181 | * 对于低端平台，如果内存不足以提供完整的FrameBuffer，请定义本宏启用局部FrameBuffer，可大幅度提高渲染性能。(单位是像素个数)
182 | *
183 | */
184 | #define FRAGMENT_FRAME_BUFFER_SIZE 8 * 1024
185 |
186 | #endif /*AWTK_CONFIG_H*/
187 |
188 |
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/awtk-port/lcd_stm32_raw.c:
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1 | /**
2 | * File: lcd_stm32_raw.c
3 | * Author: AWTK Develop Team
4 | * Brief: stm32_raw implemented lcd interface
5 | *
6 | * Copyright (c) 2018 - 2018 Guangzhou ZHIYUAN Electronics Co.,Ltd.
7 | *
8 | * This program is distributed in the hope that it will be useful,
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 | * License file for more details.
12 | *
13 | */
14 |
15 | /**
16 | * History:
17 | * ================================================================
18 | * 2018-02-16 Li XianJing created
19 | *
20 | */
21 |
22 | #include "tftlcd.h"
23 | #include "tkc/mem.h"
24 | #include "lcd/lcd_mem_fragment.h"
25 |
26 | typedef uint16_t pixel_t;
27 |
28 | #define LCD_FORMAT BITMAP_FMT_BGR565
29 | #define pixel_from_rgb(r, g, b) \
30 | ((((r) >> 3) << 11) | (((g) >> 2) << 5) | ((b) >> 3))
31 | #define pixel_from_rgba(r, g, b, a) \
32 | ((((r) >> 3) << 11) | (((g) >> 2) << 5) | ((b) >> 3))
33 | #define pixel_to_rgba(p) \
34 | { (0xff & ((p >> 11) << 3)), (0xff & ((p >> 5) << 2)), (0xff & (p << 3)), 0xff }
35 |
36 | #define set_window_func LCD_Set_Window
37 | #define write_data_func LCD_WriteData_Color
38 |
39 | #include "base/pixel.h"
40 | #include "blend/pixel_ops.inc"
41 | #include "lcd/lcd_mem_fragment.inc"
42 |
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/awtk-port/main_loop_stm32_raw.c:
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1 | /**
2 | * File: main_loop_stm32_raw.c
3 | * Author: AWTK Develop Team
4 | * Brief: main loop for stm32
5 | *
6 | * Copyright (c) 2018 - 2018 Guangzhou ZHIYUAN Electronics Co.,Ltd.
7 | *
8 | * this program is distributed in the hope that it will be useful,
9 | * but without any warranty; without even the implied warranty of
10 | * merchantability or fitness for a particular purpose. see the
11 | * license file for more details.
12 | *
13 | */
14 |
15 | /**
16 | * history:
17 | * ================================================================
18 | * 2018-02-17 li xianjing created
19 | *
20 | */
21 |
22 | #include "key.h"
23 | #include "led.h"
24 | #include "rtc.h"
25 | #include "stdlib.h"
26 | #include "tftlcd.h"
27 | #include "touch.h"
28 | #include "usart.h"
29 |
30 |
31 | #include "base/idle.h"
32 | #include "base/timer.h"
33 | #include "tkc/platform.h"
34 | #include "base/main_loop.h"
35 | #include "base/event_queue.h"
36 | #include "base/font_manager.h"
37 | #include "lcd/lcd_mem_fragment.h"
38 | #include "main_loop/main_loop_simple.h"
39 |
40 |
41 | ret_t platform_disaptch_input(main_loop_t *l) { return RET_OK; }
42 |
43 | static lcd_t *platform_create_lcd(wh_t w, wh_t h) {
44 | return lcd_mem_fragment_create(w, h);
45 | }
46 |
47 | void dispatch_input_events(void) {
48 | int key = KEY_Scan(0);
49 |
50 | switch (key) {
51 | case KEY_UP: {
52 | key = TK_KEY_UP;
53 | break;
54 | }
55 | case KEY_DOWN: {
56 | key = TK_KEY_DOWN;
57 | break;
58 | }
59 | case KEY_LEFT: {
60 | key = TK_KEY_RETURN;
61 | break;
62 | }
63 | case KEY_RIGHT: {
64 | key = TK_KEY_BACK;
65 | break;
66 | }
67 | default: { key = 0; }
68 | }
69 |
70 | if (key) {
71 | main_loop_post_key_event(main_loop(), TRUE, key);
72 | } else {
73 | main_loop_post_key_event(main_loop(), FALSE, key);
74 | }
75 |
76 | if (TOUCH_Scan() == 0) {
77 | main_loop_post_pointer_event(main_loop(), TRUE, TouchData.lcdx,
78 | TouchData.lcdy);
79 | } else {
80 | main_loop_post_pointer_event(main_loop(), FALSE, TouchData.lcdx,
81 | TouchData.lcdy);
82 | }
83 | }
84 |
85 | void TIM3_IRQHandler(void) {
86 | if (TIM_GetITStatus(TIM3, TIM_IT_Update) != RESET) {
87 | dispatch_input_events();
88 | TIM_ClearITPendingBit(TIM3, TIM_IT_Update);
89 | }
90 | }
91 |
92 | #include "main_loop/main_loop_raw.inc"
93 |
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/awtk-port/platform.c:
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1 | /**
2 | * File: platform.c
3 | * Author: AWTK Develop Team
4 | * Brief: platform dependent function of stm32
5 | *
6 | * Copyright (c) 2018 - 2018 Guangzhou ZHIYUAN Electronics Co.,Ltd.
7 | *
8 | * this program is distributed in the hope that it will be useful,
9 | * but without any warranty; without even the implied warranty of
10 | * merchantability or fitness for a particular purpose. see the
11 | * license file for more details.
12 | *
13 | */
14 |
15 | /**
16 | * history:
17 | * ================================================================
18 | * 2018-02-17 li xianjing created
19 | *
20 | */
21 |
22 |
23 | #include "tkc/mem.h"
24 | #include "base/timer.h"
25 |
26 | ret_t platform_prepare(void) {
27 | static bool_t inited = FALSE;
28 | static uint32_t s_heam_mem[5000];
29 |
30 | if (!inited) {
31 | inited = TRUE;
32 | tk_mem_init(s_heam_mem, sizeof(s_heam_mem));
33 | }
34 |
35 | return RET_OK;
36 | }
37 |
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/docs/rtt-port.md:
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1 | # AWTK 在 RT-Thread 上的移植笔记
2 |
3 | 本文以 STM32f103ze 为例，介绍了 AWTK 在 RTOS 上移植的经验。与其说移植，倒不如说是集成。所做的事情不过是把 AWTK 放到 RTOS 的一个线程中执行而已。
4 |
5 | ## 1. 加入 RT-Thread 相关文件。
6 |
7 | AWTK 已经移植到 STM32f103ze 裸系统上，为了简单起见，直接在 [awtk-stm32f103ze-raw](https://github.com/zlgopen/awtk-stm32f103ze-raw/) 基础上加入 RT-Thread 支持。
8 |
9 | * 在 Keil 中增加下列文件：
10 |
11 | ```
12 | rtthread/
13 | rtthread/bsp
14 | rtthread/cortex-m3
15 | rtthread/cortex-m3/context_gcc.S
16 | rtthread/cortex-m3/context_iar.S
17 | rtthread/cortex-m3/context_rvds.S
18 | rtthread/cortex-m3/cpuport.c
19 | rtthread/cortex-m3/SConscript
20 | rtthread/include
21 | rtthread/include/libc
22 | rtthread/include/libc/libc_dirent.h
23 | rtthread/include/libc/libc_errno.h
24 | rtthread/include/libc/libc_fcntl.h
25 | rtthread/include/libc/libc_fdset.h
26 | rtthread/include/libc/libc_ioctl.h
27 | rtthread/include/libc/libc_signal.h
28 | rtthread/include/libc/libc_stat.h
29 | rtthread/include/rtdbg.h
30 | rtthread/include/rtdebug.h
31 | rtthread/include/rtdef.h
32 | rtthread/include/rthw.h
33 | rtthread/include/rtlibc.h
34 | rtthread/include/rtm.h
35 | rtthread/include/rtservice.h
36 | rtthread/include/rtthread.h
37 | rtthread/rtconfig.h
38 | rtthread/src
39 | rtthread/src/clock.c
40 | rtthread/src/cpu.c
41 | rtthread/src/device.c
42 | rtthread/src/idle.c
43 | rtthread/src/ipc.c
44 | rtthread/src/irq.c
45 | rtthread/src/Kconfig
46 | rtthread/src/kservice.c
47 | rtthread/src/mem.c
48 | rtthread/src/memheap.c
49 | rtthread/src/mempool.c
50 | rtthread/src/object.c
51 | rtthread/src/scheduler.c
52 | rtthread/src/SConscript
53 | rtthread/src/signal.c
54 | rtthread/src/slab.c
55 | rtthread/src/thread.c
56 | rtthread/src/timer.c
57 | ```
58 |
59 | * 增加 include 的路径
60 |
61 | ```
62 | rtthread
63 | rtthread/include
64 | ```
65 |
66 | * 修改配置文件
67 |
68 | 根据自己的需要修改配置 rtthread/rtconfig.h
69 |
70 | > 一般来说不需要修改，使用官方提供的即可。我用的是 [stm32f103-mini-system](https://github.com/RT-Thread/rt-thread/blob/master/bsp/stm32/stm32f103-mini-system/rtconfig.h) 项目中的。
71 |
72 |
73 | ## 2. 加入针对 RT-Thread 实现的线程和同步的函数。
74 |
75 | ```
76 | src/platforms/rtt/mutex.c
77 | src/platforms/rtt/semaphore.c
78 | src/platforms/rtt/thread.c
79 | src/platforms/common/sys_tick.c
80 | ```
81 |
82 | ## 3. 实现rtos.c。
83 |
84 | > 参考stm32/libraries/HAL\_Drivers/drv\_common.c和components.c修改的。
85 |
86 |
87 | ```
88 | #include "rthw.h"
89 | #include "rtthread.h"
90 |
91 | static bool_t s_kernel_inited = FALSE;
92 |
93 | static bool_t rtos_is_inited(void) {
94 | return s_kernel_inited;
95 | }
96 |
97 | static uint32_t s_heap[4 * 1024];
98 |
99 | ret_t rtos_init(void) {
100 | rt_hw_interrupt_disable();
101 |
102 | /* show version */
103 | rt_show_version();
104 |
105 | #ifdef RT_USING_HEAP
106 | rt_system_heap_init((void*)s_heap, s_heap + sizeof(s_heap) / sizeof(s_heap[0]));
107 | #endif
108 |
109 | /* initialize scheduler system */
110 | rt_system_scheduler_init();
111 |
112 | /* initialize timer */
113 | rt_system_timer_init();
114 |
115 | /* initialize timer thread */
116 | rt_system_timer_thread_init();
117 |
118 | /* initialize idle thread */
119 | rt_thread_idle_init();
120 |
121 | s_kernel_inited = TRUE;
122 |
123 | return RET_OK;
124 | }
125 |
126 | ret_t rtos_start(void) {
127 | /* start scheduler */
128 | rt_system_scheduler_start();
129 |
130 | return RET_OK;
131 | }
132 |
133 | void rtos_tick(void) {
134 | if (rtos_is_inited()) {
135 | rt_interrupt_enter();
136 | rt_tick_increase();
137 | rt_interrupt_leave();
138 | }
139 | }
140 |
141 | void rtos_delay(uint32_t ms) {
142 | rt_thread_delay(ms);
143 | }
144 |
145 | ```
146 |
147 | > 由于线程的栈是由RTT分配的，所以RTT的heap要稍微大一点。
148 |
149 | ## 4. 在线程中启动 AWTK
150 |
151 | ```
152 | extern ret_t platform_prepare(void);
153 | extern void sys_tick_enable(bool_t enable);
154 | extern int gui_app_start(int lcd_w, int lcd_h);
155 |
156 | void* awtk_thread(void* args) {
157 | gui_app_start(tftlcd_data.width, tftlcd_data.height);
158 |
159 | return NULL;
160 | }
161 |
162 | static ret_t awtk_start_ui_thread(void) {
163 | tk_thread_t* ui_thread = tk_thread_create(awtk_thread, NULL);
164 | return_value_if_fail(ui_thread != NULL, RET_BAD_PARAMS);
165 |
166 | tk_thread_set_priority(ui_thread, 3);
167 | tk_thread_set_name(ui_thread, "awtk");
168 | tk_thread_set_stack_size(ui_thread, 8000);
169 |
170 | return tk_thread_start(ui_thread);
171 | }
172 |
173 | void hardware_prepare(void) {
174 | SysTick_Init();
175 | NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
176 | LED_Init();
177 | USART1_Init(9600);
178 | TFTLCD_Init();
179 | KEY_Init();
180 | TOUCH_Init();
181 | TIM3_Init(50,7199);
182 | RTC_Init();
183 | LCD_Clear(RED);
184 | }
185 |
186 | int main() {
187 | hardware_prepare();
188 | platform_prepare();
189 | sys_tick_enable(TRUE);
190 |
191 | rtos_init();
192 | awtk_start_ui_thread();
193 | rtos_start();
194 |
195 | return 0;
196 | }
197 | ```
198 |
199 | 这里与裸系统不同的地方，主要有两个：
200 |
201 | * 1. 在线程中启动 AWTK。
202 | * 2. 要提前调用 platform\_prepare，platform\_prepare 负责初始化内存，放在 tk_init 中就有些晚，需要单独提出来调用。
203 |
204 | 为此 platform\_prepare 函数做了防重复调用的处理。
205 |
206 | ```
207 | ret_t platform_prepare(void) {
208 | static bool_t inited = FALSE;
209 | static uint32_t s_heam_mem[7000];
210 |
211 | if (!inited) {
212 | inited = TRUE;
213 | tk_mem_init(s_heam_mem, sizeof(s_heam_mem));
214 | }
215 |
216 | return RET_OK;
217 | }
218 | ```
219 |
220 | AWTK 集成 RTOS 是非常简单的，以上过程大概花了 2 个小时吧。只要 RTOS 本身好移植，集成 AWTK 和 RTOS 只是分分钟的问题。
221 |
222 |
--------------------------------------------------------------------------------
/format.sh:
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1 | find awtk-port -name \*.c -exec clang-format -i {} \;
2 |
3 |
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/keilkilll.bat:
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https://raw.githubusercontent.com/zlgopen/awtk-stm32f103ze-rtthread/a675a9cca36ed6ce5a7d0876bee783552fa52287/keilkilll.bat
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/rtthread/cortex-m3/SConscript:
--------------------------------------------------------------------------------
1 | # RT-Thread building script for component
2 |
3 | from building import *
4 |
5 | Import('rtconfig')
6 |
7 | cwd = GetCurrentDir()
8 | src = Glob('*.c') + Glob('*.cpp')
9 | CPPPATH = [cwd]
10 |
11 | if rtconfig.PLATFORM == 'armcc':
12 | src += Glob('*_rvds.S')
13 |
14 | if rtconfig.PLATFORM == 'gcc':
15 | src += Glob('*_init.S')
16 | src += Glob('*_gcc.S')
17 |
18 | if rtconfig.PLATFORM == 'iar':
19 | src += Glob('*_iar.S')
20 |
21 | group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH)
22 |
23 | Return('group')
24 |
--------------------------------------------------------------------------------
/rtthread/cortex-m3/context_rvds.S:
--------------------------------------------------------------------------------
1 | ;/*
2 | ; * Copyright (c) 2006-2018, RT-Thread Development Team
3 | ; *
4 | ; * SPDX-License-Identifier: Apache-2.0
5 | ; *
6 | ; * Change Logs:
7 | ; * Date Author Notes
8 | ; * 2009-01-17 Bernard first version
9 | ; * 2013-06-18 aozima add restore MSP feature.
10 | ; * 2013-07-09 aozima enhancement hard fault exception handler.
11 | ; */
12 |
13 | ;/**
14 | ; * @addtogroup CORTEX-M3
15 | ; */
16 | ;/*@{*/
17 |
18 | SCB_VTOR EQU 0xE000ED08 ; Vector Table Offset Register
19 | NVIC_INT_CTRL EQU 0xE000ED04 ; interrupt control state register
20 | NVIC_SYSPRI2 EQU 0xE000ED20 ; system priority register (2)
21 | NVIC_PENDSV_PRI EQU 0x00FF0000 ; PendSV priority value (lowest)
22 | NVIC_PENDSVSET EQU 0x10000000 ; value to trigger PendSV exception
23 |
24 | AREA |.text|, CODE, READONLY, ALIGN=2
25 | THUMB
26 | REQUIRE8
27 | PRESERVE8
28 |
29 | IMPORT rt_thread_switch_interrupt_flag
30 | IMPORT rt_interrupt_from_thread
31 | IMPORT rt_interrupt_to_thread
32 |
33 | ;/*
34 | ; * rt_base_t rt_hw_interrupt_disable();
35 | ; */
36 | rt_hw_interrupt_disable PROC
37 | EXPORT rt_hw_interrupt_disable
38 | MRS r0, PRIMASK
39 | CPSID I
40 | BX LR
41 | ENDP
42 |
43 | ;/*
44 | ; * void rt_hw_interrupt_enable(rt_base_t level);
45 | ; */
46 | rt_hw_interrupt_enable PROC
47 | EXPORT rt_hw_interrupt_enable
48 | MSR PRIMASK, r0
49 | BX LR
50 | ENDP
51 |
52 | ;/*
53 | ; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
54 | ; * r0 --> from
55 | ; * r1 --> to
56 | ; */
57 | rt_hw_context_switch_interrupt
58 | EXPORT rt_hw_context_switch_interrupt
59 | rt_hw_context_switch PROC
60 | EXPORT rt_hw_context_switch
61 |
62 | ; set rt_thread_switch_interrupt_flag to 1
63 | LDR r2, =rt_thread_switch_interrupt_flag
64 | LDR r3, [r2]
65 | CMP r3, #1
66 | BEQ _reswitch
67 | MOV r3, #1
68 | STR r3, [r2]
69 |
70 | LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
71 | STR r0, [r2]
72 |
73 | _reswitch
74 | LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
75 | STR r1, [r2]
76 |
77 | LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
78 | LDR r1, =NVIC_PENDSVSET
79 | STR r1, [r0]
80 | BX LR
81 | ENDP
82 |
83 | ; r0 --> switch from thread stack
84 | ; r1 --> switch to thread stack
85 | ; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
86 | PendSV_Handler PROC
87 | EXPORT PendSV_Handler
88 |
89 | ; disable interrupt to protect context switch
90 | MRS r2, PRIMASK
91 | CPSID I
92 |
93 | ; get rt_thread_switch_interrupt_flag
94 | LDR r0, =rt_thread_switch_interrupt_flag
95 | LDR r1, [r0]
96 | CBZ r1, pendsv_exit ; pendsv already handled
97 |
98 | ; clear rt_thread_switch_interrupt_flag to 0
99 | MOV r1, #0x00
100 | STR r1, [r0]
101 |
102 | LDR r0, =rt_interrupt_from_thread
103 | LDR r1, [r0]
104 | CBZ r1, switch_to_thread ; skip register save at the first time
105 |
106 | MRS r1, psp ; get from thread stack pointer
107 | STMFD r1!, {r4 - r11} ; push r4 - r11 register
108 | LDR r0, [r0]
109 | STR r1, [r0] ; update from thread stack pointer
110 |
111 | switch_to_thread
112 | LDR r1, =rt_interrupt_to_thread
113 | LDR r1, [r1]
114 | LDR r1, [r1] ; load thread stack pointer
115 |
116 | LDMFD r1!, {r4 - r11} ; pop r4 - r11 register
117 | MSR psp, r1 ; update stack pointer
118 |
119 | pendsv_exit
120 | ; restore interrupt
121 | MSR PRIMASK, r2
122 |
123 | ORR lr, lr, #0x04
124 | BX lr
125 | ENDP
126 |
127 | ;/*
128 | ; * void rt_hw_context_switch_to(rt_uint32 to);
129 | ; * r0 --> to
130 | ; * this fucntion is used to perform the first thread switch
131 | ; */
132 | rt_hw_context_switch_to PROC
133 | EXPORT rt_hw_context_switch_to
134 | ; set to thread
135 | LDR r1, =rt_interrupt_to_thread
136 | STR r0, [r1]
137 |
138 | ; set from thread to 0
139 | LDR r1, =rt_interrupt_from_thread
140 | MOV r0, #0x0
141 | STR r0, [r1]
142 |
143 | ; set interrupt flag to 1
144 | LDR r1, =rt_thread_switch_interrupt_flag
145 | MOV r0, #1
146 | STR r0, [r1]
147 |
148 | ; set the PendSV exception priority
149 | LDR r0, =NVIC_SYSPRI2
150 | LDR r1, =NVIC_PENDSV_PRI
151 | LDR.W r2, [r0,#0x00] ; read
152 | ORR r1,r1,r2 ; modify
153 | STR r1, [r0] ; write-back
154 |
155 | ; trigger the PendSV exception (causes context switch)
156 | LDR r0, =NVIC_INT_CTRL
157 | LDR r1, =NVIC_PENDSVSET
158 | STR r1, [r0]
159 |
160 | ; restore MSP
161 | LDR r0, =SCB_VTOR
162 | LDR r0, [r0]
163 | LDR r0, [r0]
164 | MSR msp, r0
165 |
166 | ; enable interrupts at processor level
167 | CPSIE F
168 | CPSIE I
169 |
170 | ; never reach here!
171 | ENDP
172 |
173 | ; compatible with old version
174 | rt_hw_interrupt_thread_switch PROC
175 | EXPORT rt_hw_interrupt_thread_switch
176 | BX lr
177 | ENDP
178 |
179 | IMPORT rt_hw_hard_fault_exception
180 | EXPORT HardFault_Handler
181 | HardFault_Handler PROC
182 |
183 | ; get current context
184 | TST lr, #0x04 ; if(!EXC_RETURN[2])
185 | ITE EQ
186 | MRSEQ r0, msp ; [2]=0 ==> Z=1, get fault context from handler.
187 | MRSNE r0, psp ; [2]=1 ==> Z=0, get fault context from thread.
188 |
189 | STMFD r0!, {r4 - r11} ; push r4 - r11 register
190 | STMFD r0!, {lr} ; push exec_return register
191 |
192 | TST lr, #0x04 ; if(!EXC_RETURN[2])
193 | ITE EQ
194 | MSREQ msp, r0 ; [2]=0 ==> Z=1, update stack pointer to MSP.
195 | MSRNE psp, r0 ; [2]=1 ==> Z=0, update stack pointer to PSP.
196 |
197 | PUSH {lr}
198 | BL rt_hw_hard_fault_exception
199 | POP {lr}
200 |
201 | ORR lr, lr, #0x04
202 | BX lr
203 | ENDP
204 |
205 | ALIGN 4
206 |
207 | END
208 |
--------------------------------------------------------------------------------
/rtthread/include/libc/libc_dirent.h:
--------------------------------------------------------------------------------
1 | /*
2 | * Copyright (c) 2006-2018, RT-Thread Development Team
3 | *
4 | * SPDX-License-Identifier: Apache-2.0
5 | */
6 |
7 | #ifndef LIBC_DIRENT_H__
8 | #define LIBC_DIRENT_H__
9 |
10 | #define DT_UNKNOWN 0x00
11 | #define DT_REG 0x01
12 | #define DT_DIR 0x02
13 |
14 | #endif
15 |
--------------------------------------------------------------------------------
/rtthread/include/libc/libc_errno.h:
--------------------------------------------------------------------------------
1 | /*
2 | * Copyright (c) 2006-2018, RT-Thread Development Team
3 | *
4 | * SPDX-License-Identifier: Apache-2.0
5 | *
6 | * Change Logs:
7 | * Date Author Notes
8 | * 2016-11-12 Bernard The first version
9 | */
10 |
11 | #ifndef LIBC_ERRNO_H__
12 | #define LIBC_ERRNO_H__
13 |
14 | #include
15 |
16 | #if defined(RT_USING_NEWLIB) || defined(_WIN32)
17 | /* use errno.h file in toolchains */
18 | #include
19 | #endif
20 |
21 | #if defined(__CC_ARM)
22 | /*
23 | defined in armcc/errno.h
24 |
25 | #define EDOM 1
26 | #define ERANGE 2
27 | #define EILSEQ 4
28 | #define ESIGNUM 3
29 | #define EINVAL 5
30 | #define ENOMEM 6
31 | */
32 | #define ERROR_BASE_NO 7
33 |
34 | #elif defined(__IAR_SYSTEMS_ICC__)
35 | /* defined in iar/errno.h
36 | #define EDOM 33
37 | #define ERANGE 34
38 | #define EFPOS 35
39 | #define EILSEQ 36
40 | */
41 | #define ERROR_BASE_NO 36
42 |
43 | #else
44 |
45 | #define ERROR_BASE_NO 0
46 | #endif
47 |
48 | #if !defined(RT_USING_NEWLIB) && !defined(_WIN32)
49 |
50 | #define EPERM (ERROR_BASE_NO + 1)
51 | #define ENOENT (ERROR_BASE_NO + 2)
52 | #define ESRCH (ERROR_BASE_NO + 3)
53 | #define EINTR (ERROR_BASE_NO + 4)
54 | #define EIO (ERROR_BASE_NO + 5)
55 | #define ENXIO (ERROR_BASE_NO + 6)
56 | #define E2BIG (ERROR_BASE_NO + 7)
57 | #define ENOEXEC (ERROR_BASE_NO + 8)
58 | #define EBADF (ERROR_BASE_NO + 9)
59 | #define ECHILD (ERROR_BASE_NO + 10)
60 | #define EAGAIN (ERROR_BASE_NO + 11)
61 |
62 | #ifndef ENOMEM
63 | #define ENOMEM (ERROR_BASE_NO + 12)
64 | #endif
65 |
66 | #define EACCES (ERROR_BASE_NO + 13)
67 | #define EFAULT (ERROR_BASE_NO + 14)
68 | #define ENOTBLK (ERROR_BASE_NO + 15)
69 | #define EBUSY (ERROR_BASE_NO + 16)
70 | #define EEXIST (ERROR_BASE_NO + 17)
71 | #define EXDEV (ERROR_BASE_NO + 18)
72 | #define ENODEV (ERROR_BASE_NO + 19)
73 | #define ENOTDIR (ERROR_BASE_NO + 20)
74 | #define EISDIR (ERROR_BASE_NO + 21)
75 |
76 | #ifndef EINVAL
77 | #define EINVAL (ERROR_BASE_NO + 22)
78 | #endif
79 |
80 | #define ENFILE (ERROR_BASE_NO + 23)
81 | #define EMFILE (ERROR_BASE_NO + 24)
82 | #define ENOTTY (ERROR_BASE_NO + 25)
83 | #define ETXTBSY (ERROR_BASE_NO + 26)
84 | #define EFBIG (ERROR_BASE_NO + 27)
85 | #define ENOSPC (ERROR_BASE_NO + 28)
86 | #define ESPIPE (ERROR_BASE_NO + 29)
87 | #define EROFS (ERROR_BASE_NO + 30)
88 | #define EMLINK (ERROR_BASE_NO + 31)
89 | #define EPIPE (ERROR_BASE_NO + 32)
90 |
91 | #ifndef EDOM
92 | #define EDOM (ERROR_BASE_NO + 33)
93 | #endif
94 |
95 | #ifndef ERANGE
96 | #define ERANGE (ERROR_BASE_NO + 34)
97 | #endif
98 |
99 | #define EDEADLK (ERROR_BASE_NO + 35)
100 | #define ENAMETOOLONG (ERROR_BASE_NO + 36)
101 | #define ENOLCK (ERROR_BASE_NO + 37)
102 | #define ENOSYS (ERROR_BASE_NO + 38)
103 | #define ENOTEMPTY (ERROR_BASE_NO + 39)
104 | #define ELOOP (ERROR_BASE_NO + 40)
105 | #define EWOULDBLOCK EAGAIN
106 | #define ENOMSG (ERROR_BASE_NO + 42)
107 | #define EIDRM (ERROR_BASE_NO + 43)
108 | #define ECHRNG (ERROR_BASE_NO + 44)
109 | #define EL2NSYNC (ERROR_BASE_NO + 45)
110 | #define EL3HLT (ERROR_BASE_NO + 46)
111 | #define EL3RST (ERROR_BASE_NO + 47)
112 | #define ELNRNG (ERROR_BASE_NO + 48)
113 | #define EUNATCH (ERROR_BASE_NO + 49)
114 | #define ENOCSI (ERROR_BASE_NO + 50)
115 | #define EL2HLT (ERROR_BASE_NO + 51)
116 | #define EBADE (ERROR_BASE_NO + 52)
117 | #define EBADR (ERROR_BASE_NO + 53)
118 | #define EXFULL (ERROR_BASE_NO + 54)
119 | #define ENOANO (ERROR_BASE_NO + 55)
120 | #define EBADRQC (ERROR_BASE_NO + 56)
121 | #define EBADSLT (ERROR_BASE_NO + 57)
122 | #define EDEADLOCK EDEADLK
123 | #define EBFONT (ERROR_BASE_NO + 59)
124 | #define ENOSTR (ERROR_BASE_NO + 60)
125 | #define ENODATA (ERROR_BASE_NO + 61)
126 | #define ETIME (ERROR_BASE_NO + 62)
127 | #define ENOSR (ERROR_BASE_NO + 63)
128 | #define ENONET (ERROR_BASE_NO + 64)
129 | #define ENOPKG (ERROR_BASE_NO + 65)
130 | #define EREMOTE (ERROR_BASE_NO + 66)
131 | #define ENOLINK (ERROR_BASE_NO + 67)
132 | #define EADV (ERROR_BASE_NO + 68)
133 | #define ESRMNT (ERROR_BASE_NO + 69)
134 | #define ECOMM (ERROR_BASE_NO + 70)
135 | #define EPROTO (ERROR_BASE_NO + 71)
136 | #define EMULTIHOP (ERROR_BASE_NO + 72)
137 | #define EDOTDOT (ERROR_BASE_NO + 73)
138 | #define EBADMSG (ERROR_BASE_NO + 74)
139 | #define EOVERFLOW (ERROR_BASE_NO + 75)
140 | #define ENOTUNIQ (ERROR_BASE_NO + 76)
141 | #define EBADFD (ERROR_BASE_NO + 77)
142 | #define EREMCHG (ERROR_BASE_NO + 78)
143 | #define ELIBACC (ERROR_BASE_NO + 79)
144 | #define ELIBBAD (ERROR_BASE_NO + 80)
145 | #define ELIBSCN (ERROR_BASE_NO + 81)
146 | #define ELIBMAX (ERROR_BASE_NO + 82)
147 | #define ELIBEXEC (ERROR_BASE_NO + 83)
148 |
149 | #ifndef EILSEQ
150 | #define EILSEQ (ERROR_BASE_NO + 84)
151 | #endif
152 |
153 | #define ERESTART (ERROR_BASE_NO + 85)
154 | #define ESTRPIPE (ERROR_BASE_NO + 86)
155 | #define EUSERS (ERROR_BASE_NO + 87)
156 | #define ENOTSOCK (ERROR_BASE_NO + 88)
157 | #define EDESTADDRREQ (ERROR_BASE_NO + 89)
158 | #define EMSGSIZE (ERROR_BASE_NO + 90)
159 | #define EPROTOTYPE (ERROR_BASE_NO + 91)
160 | #define ENOPROTOOPT (ERROR_BASE_NO + 92)
161 | #define EPROTONOSUPPORT (ERROR_BASE_NO + 93)
162 | #define ESOCKTNOSUPPORT (ERROR_BASE_NO + 94)
163 | #define EOPNOTSUPP (ERROR_BASE_NO + 95)
164 | #define ENOTSUP EOPNOTSUPP
165 | #define EPFNOSUPPORT (ERROR_BASE_NO + 96)
166 | #define EAFNOSUPPORT (ERROR_BASE_NO + 97)
167 | #define EADDRINUSE (ERROR_BASE_NO + 98)
168 | #define EADDRNOTAVAIL (ERROR_BASE_NO + 99)
169 | #define ENETDOWN (ERROR_BASE_NO + 100)
170 | #define ENETUNREACH (ERROR_BASE_NO + 101)
171 | #define ENETRESET (ERROR_BASE_NO + 102)
172 | #define ECONNABORTED (ERROR_BASE_NO + 103)
173 | #define ECONNRESET (ERROR_BASE_NO + 104)
174 | #define ENOBUFS (ERROR_BASE_NO + 105)
175 | #define EISCONN (ERROR_BASE_NO + 106)
176 | #define ENOTCONN (ERROR_BASE_NO + 107)
177 | #define ESHUTDOWN (ERROR_BASE_NO + 108)
178 | #define ETOOMANYREFS (ERROR_BASE_NO + 109)
179 | #define ETIMEDOUT (ERROR_BASE_NO + 110)
180 | #define ECONNREFUSED (ERROR_BASE_NO + 111)
181 | #define EHOSTDOWN (ERROR_BASE_NO + 112)
182 | #define EHOSTUNREACH (ERROR_BASE_NO + 113)
183 | #define EALREADY (ERROR_BASE_NO + 114)
184 | #define EINPROGRESS (ERROR_BASE_NO + 115)
185 | #define ESTALE (ERROR_BASE_NO + 116)
186 | #define EUCLEAN (ERROR_BASE_NO + 117)
187 | #define ENOTNAM (ERROR_BASE_NO + 118)
188 | #define ENAVAIL (ERROR_BASE_NO + 119)
189 | #define EISNAM (ERROR_BASE_NO + 120)
190 | #define EREMOTEIO (ERROR_BASE_NO + 121)
191 | #define EDQUOT (ERROR_BASE_NO + 122)
192 | #define ENOMEDIUM (ERROR_BASE_NO + 123)
193 | #define EMEDIUMTYPE (ERROR_BASE_NO + 124)
194 | #define ECANCELED (ERROR_BASE_NO + 125)
195 | #define ENOKEY (ERROR_BASE_NO + 126)
196 | #define EKEYEXPIRED (ERROR_BASE_NO + 127)
197 | #define EKEYREVOKED (ERROR_BASE_NO + 128)
198 | #define EKEYREJECTED (ERROR_BASE_NO + 129)
199 | #define EOWNERDEAD (ERROR_BASE_NO + 130)
200 | #define ENOTRECOVERABLE (ERROR_BASE_NO + 131)
201 | #define ERFKILL (ERROR_BASE_NO + 132)
202 | #define EHWPOISON (ERROR_BASE_NO + 133)
203 |
204 | #endif
205 |
206 | #endif
207 |
--------------------------------------------------------------------------------
/rtthread/include/libc/libc_fcntl.h:
--------------------------------------------------------------------------------
1 | /*
2 | * Copyright (c) 2006-2018, RT-Thread Development Team
3 | *
4 | * SPDX-License-Identifier: Apache-2.0
5 | */
6 |
7 | /*
8 | * File : libc_fcntl.h
9 | *
10 | * Change Logs:
11 | * Date Author Notes
12 | * 2018-02-07 Bernard Add O_DIRECTORY definition in NEWLIB mode.
13 | * 2018-02-09 Bernard Add O_BINARY definition
14 | */
15 |
16 | #ifndef LIBC_FCNTL_H__
17 | #define LIBC_FCNTL_H__
18 |
19 | #if defined(RT_USING_NEWLIB) || defined(_WIN32)
20 | #include
21 |
22 | #ifndef O_NONBLOCK
23 | #define O_NONBLOCK 0x4000
24 | #endif
25 |
26 | #if defined(_WIN32)
27 | #define O_ACCMODE (_O_RDONLY | _O_WRONLY | _O_RDWR)
28 | #endif
29 |
30 | #ifndef F_GETFL
31 | #define F_GETFL 3
32 | #endif
33 | #ifndef F_SETFL
34 | #define F_SETFL 4
35 | #endif
36 |
37 | #ifndef O_DIRECTORY
38 | #define O_DIRECTORY 0x200000
39 | #endif
40 |
41 | #ifndef O_BINARY
42 | #ifdef _O_BINARY
43 | #define O_BINARY _O_BINARY
44 | #else
45 | #define O_BINARY 0
46 | #endif
47 | #endif
48 |
49 | #else
50 | #define O_RDONLY 00
51 | #define O_WRONLY 01
52 | #define O_RDWR 02
53 |
54 | #define O_CREAT 0100
55 | #define O_EXCL 0200
56 | #define O_NOCTTY 0400
57 | #define O_TRUNC 01000
58 | #define O_APPEND 02000
59 | #define O_NONBLOCK 04000
60 | #define O_DSYNC 010000
61 | #define O_SYNC 04010000
62 | #define O_RSYNC 04010000
63 | #define O_BINARY 0100000
64 | #define O_DIRECTORY 0200000
65 | #define O_NOFOLLOW 0400000
66 | #define O_CLOEXEC 02000000
67 |
68 | #define O_ASYNC 020000
69 | #define O_DIRECT 040000
70 | #define O_LARGEFILE 0100000
71 | #define O_NOATIME 01000000
72 | #define O_PATH 010000000
73 | #define O_TMPFILE 020200000
74 | #define O_NDELAY O_NONBLOCK
75 |
76 | #define O_SEARCH O_PATH
77 | #define O_EXEC O_PATH
78 |
79 | #define O_ACCMODE (03|O_SEARCH)
80 |
81 | #define F_DUPFD 0
82 | #define F_GETFD 1
83 | #define F_SETFD 2
84 | #define F_GETFL 3
85 | #define F_SETFL 4
86 |
87 | #define F_SETOWN 8
88 | #define F_GETOWN 9
89 | #define F_SETSIG 10
90 | #define F_GETSIG 11
91 |
92 | #define F_GETLK 12
93 | #define F_SETLK 13
94 | #define F_SETLKW 14
95 |
96 | #define F_SETOWN_EX 15
97 | #define F_GETOWN_EX 16
98 |
99 | #define F_GETOWNER_UIDS 17
100 | #endif
101 |
102 | #endif
103 |
--------------------------------------------------------------------------------
/rtthread/include/libc/libc_fdset.h:
--------------------------------------------------------------------------------
1 | /*
2 | * Copyright (c) 2006-2018, RT-Thread Development Team
3 | *
4 | * SPDX-License-Identifier: Apache-2.0
5 | */
6 |
7 | /*
8 | * File : libc_errno.h
9 | *
10 | * Change Logs:
11 | * Date Author Notes
12 | * 2017-10-30 Bernard The first version
13 | */
14 |
15 | #ifndef LIBC_FDSET_H__
16 | #define LIBC_FDSET_H__
17 |
18 | #include
19 |
20 | #if defined(RT_USING_NEWLIB) || defined(_WIN32)
21 | #include
22 | #if defined(HAVE_SYS_SELECT_H)
23 | #include
24 | #endif
25 |
26 | #else
27 |
28 | #ifdef SAL_USING_POSIX
29 |
30 | #ifdef FD_SETSIZE
31 | #undef FD_SETSIZE
32 | #endif
33 |
34 | #define FD_SETSIZE DFS_FD_MAX
35 | #endif
36 |
37 | # ifndef FD_SETSIZE
38 | # define FD_SETSIZE 32
39 | # endif
40 |
41 | # define NBBY 8 /* number of bits in a byte */
42 |
43 | typedef long fd_mask;
44 | # define NFDBITS (sizeof (fd_mask) * NBBY) /* bits per mask */
45 | # ifndef howmany
46 | # define howmany(x,y) (((x)+((y)-1))/(y))
47 | # endif
48 |
49 | /* We use a macro for fd_set so that including Sockets.h afterwards
50 | can work. */
51 | typedef struct _types_fd_set {
52 | fd_mask fds_bits[howmany(FD_SETSIZE, NFDBITS)];
53 | } _types_fd_set;
54 |
55 | #define fd_set _types_fd_set
56 |
57 | # define FD_SET(n, p) ((p)->fds_bits[(n)/NFDBITS] |= (1L << ((n) % NFDBITS)))
58 | # define FD_CLR(n, p) ((p)->fds_bits[(n)/NFDBITS] &= ~(1L << ((n) % NFDBITS)))
59 | # define FD_ISSET(n, p) ((p)->fds_bits[(n)/NFDBITS] & (1L << ((n) % NFDBITS)))
60 | # define FD_ZERO(p) memset((void*)(p), 0, sizeof(*(p)))
61 |
62 | #endif
63 |
64 | #endif
65 |
--------------------------------------------------------------------------------
/rtthread/include/libc/libc_ioctl.h:
--------------------------------------------------------------------------------
1 | /*
2 | * Copyright (c) 2006-2018, RT-Thread Development Team
3 | *
4 | * SPDX-License-Identifier: Apache-2.0
5 | */
6 |
7 | /*
8 | * File : libc_ioctl.h
9 | *
10 | * Change Logs:
11 | * Date Author Notes
12 | * 2017-01-21 Bernard the first version
13 | */
14 |
15 | #ifndef LIBC_IOCTL_H__
16 | #define LIBC_IOCTL_H__
17 |
18 | #define _IOC(a,b,c,d) ( ((a)<<30) | ((b)<<8) | (c) | ((d)<<16) )
19 | #define _IOC_NONE 0U
20 | #define _IOC_WRITE 1U
21 | #define _IOC_READ 2U
22 |
23 | #ifndef _WIN32
24 | #define _IO(a,b) _IOC(_IOC_NONE,(a),(b),0)
25 | #define _IOW(a,b,c) _IOC(_IOC_WRITE,(a),(b),sizeof(c))
26 | #define _IOR(a,b,c) _IOC(_IOC_READ,(a),(b),sizeof(c))
27 | #define _IOWR(a,b,c) _IOC(_IOC_READ|_IOC_WRITE,(a),(b),sizeof(c))
28 |
29 | #define FIONREAD _IOR('f', 127, int) /* get # bytes to read */
30 | #define FIONBIO _IOW('f', 126, int) /* set/clear non-blocking i/o */
31 | #define FIONWRITE _IOR('f', 121, int) /* get # bytes outstanding
32 | * in send queue. */
33 | #endif
34 |
35 | #define TCGETS 0x5401
36 | #define TCSETS 0x5402
37 | #define TCSETSW 0x5403
38 | #define TCSETSF 0x5404
39 | #define TCGETA 0x5405
40 | #define TCSETA 0x5406
41 | #define TCSETAW 0x5407
42 | #define TCSETAF 0x5408
43 | #define TCSBRK 0x5409
44 | #define TCXONC 0x540A
45 | #define TCFLSH 0x540B
46 | #define TIOCEXCL 0x540C
47 | #define TIOCNXCL 0x540D
48 | #define TIOCSCTTY 0x540E
49 | #define TIOCGPGRP 0x540F
50 | #define TIOCSPGRP 0x5410
51 | #define TIOCOUTQ 0x5411
52 | #define TIOCSTI 0x5412
53 | #define TIOCGWINSZ 0x5413
54 | #define TIOCSWINSZ 0x5414
55 | #define TIOCMGET 0x5415
56 | #define TIOCMBIS 0x5416
57 | #define TIOCMBIC 0x5417
58 | #define TIOCMSET 0x5418
59 | #define TIOCGSOFTCAR 0x5419
60 | #define TIOCSSOFTCAR 0x541A
61 | // #define FIONREAD 0x541B
62 | #define TIOCINQ FIONREAD
63 | #define TIOCLINUX 0x541C
64 | #define TIOCCONS 0x541D
65 | #define TIOCGSERIAL 0x541E
66 | #define TIOCSSERIAL 0x541F
67 | #define TIOCPKT 0x5420
68 | // #define FIONBIO 0x5421
69 | #define TIOCNOTTY 0x5422
70 | #define TIOCSETD 0x5423
71 | #define TIOCGETD 0x5424
72 | #define TCSBRKP 0x5425
73 | #define TIOCSBRK 0x5427
74 | #define TIOCCBRK 0x5428
75 | #define TIOCGSID 0x5429
76 | #define TIOCGRS485 0x542E
77 | #define TIOCSRS485 0x542F
78 | #define TIOCGPTN 0x80045430
79 | #define TIOCSPTLCK 0x40045431
80 | #define TIOCGDEV 0x80045432
81 | #define TCGETX 0x5432
82 | #define TCSETX 0x5433
83 | #define TCSETXF 0x5434
84 | #define TCSETXW 0x5435
85 | #define TIOCSIG 0x40045436
86 | #define TIOCVHANGUP 0x5437
87 | #define TIOCGPKT 0x80045438
88 | #define TIOCGPTLCK 0x80045439
89 | #define TIOCGEXCL 0x80045440
90 |
91 | #define FIONCLEX 0x5450
92 | #define FIOCLEX 0x5451
93 |
94 | #ifndef _WIN32
95 | #define FIOASYNC 0x5452
96 | #endif
97 |
98 | #define TIOCSERCONFIG 0x5453
99 | #define TIOCSERGWILD 0x5454
100 | #define TIOCSERSWILD 0x5455
101 | #define TIOCGLCKTRMIOS 0x5456
102 | #define TIOCSLCKTRMIOS 0x5457
103 | #define TIOCSERGSTRUCT 0x5458
104 | #define TIOCSERGETLSR 0x5459
105 | #define TIOCSERGETMULTI 0x545A
106 | #define TIOCSERSETMULTI 0x545B
107 |
108 | #define TIOCMIWAIT 0x545C
109 | #define TIOCGICOUNT 0x545D
110 | #define FIOQSIZE 0x5460
111 |
112 | #define TIOCPKT_DATA 0
113 | #define TIOCPKT_FLUSHREAD 1
114 | #define TIOCPKT_FLUSHWRITE 2
115 | #define TIOCPKT_STOP 4
116 | #define TIOCPKT_START 8
117 | #define TIOCPKT_NOSTOP 16
118 | #define TIOCPKT_DOSTOP 32
119 | #define TIOCPKT_IOCTL 64
120 |
121 | #define TIOCSER_TEMT 0x01
122 |
123 | struct winsize {
124 | unsigned short ws_row;
125 | unsigned short ws_col;
126 | unsigned short ws_xpixel;
127 | unsigned short ws_ypixel;
128 | };
129 |
130 | #define TIOCM_LE 0x001
131 | #define TIOCM_DTR 0x002
132 | #define TIOCM_RTS 0x004
133 | #define TIOCM_ST 0x008
134 | #define TIOCM_SR 0x010
135 | #define TIOCM_CTS 0x020
136 | #define TIOCM_CAR 0x040
137 | #define TIOCM_RNG 0x080
138 | #define TIOCM_DSR 0x100
139 | #define TIOCM_CD TIOCM_CAR
140 | #define TIOCM_RI TIOCM_RNG
141 | #define TIOCM_OUT1 0x2000
142 | #define TIOCM_OUT2 0x4000
143 | #define TIOCM_LOOP 0x8000
144 |
145 | #define N_TTY 0
146 | #define N_SLIP 1
147 | #define N_MOUSE 2
148 | #define N_PPP 3
149 | #define N_STRIP 4
150 | #define N_AX25 5
151 | #define N_X25 6
152 | #define N_6PACK 7
153 | #define N_MASC 8
154 | #define N_R3964 9
155 | #define N_PROFIBUS_FDL 10
156 | #define N_IRDA 11
157 | #define N_SMSBLOCK 12
158 | #define N_HDLC 13
159 | #define N_SYNC_PPP 14
160 | #define N_HCI 15
161 |
162 | #define FIOSETOWN 0x8901
163 | #define SIOCSPGRP 0x8902
164 | #define FIOGETOWN 0x8903
165 | #define SIOCGPGRP 0x8904
166 | // #define SIOCATMARK 0x8905
167 | #define SIOCGSTAMP 0x8906
168 | #define SIOCGSTAMPNS 0x8907
169 |
170 | #define SIOCADDRT 0x890B
171 | #define SIOCDELRT 0x890C
172 | #define SIOCRTMSG 0x890D
173 |
174 | #define SIOCGIFNAME 0x8910
175 | #define SIOCSIFLINK 0x8911
176 | #define SIOCGIFCONF 0x8912
177 | #define SIOCGIFFLAGS 0x8913
178 | #define SIOCSIFFLAGS 0x8914
179 | #define SIOCGIFADDR 0x8915
180 | #define SIOCSIFADDR 0x8916
181 | #define SIOCGIFDSTADDR 0x8917
182 | #define SIOCSIFDSTADDR 0x8918
183 | #define SIOCGIFBRDADDR 0x8919
184 | #define SIOCSIFBRDADDR 0x891a
185 | #define SIOCGIFNETMASK 0x891b
186 | #define SIOCSIFNETMASK 0x891c
187 | #define SIOCGIFMETRIC 0x891d
188 | #define SIOCSIFMETRIC 0x891e
189 | #define SIOCGIFMEM 0x891f
190 | #define SIOCSIFMEM 0x8920
191 | #define SIOCGIFMTU 0x8921
192 | #define SIOCSIFMTU 0x8922
193 | #define SIOCSIFNAME 0x8923
194 | #define SIOCSIFHWADDR 0x8924
195 | #define SIOCGIFENCAP 0x8925
196 | #define SIOCSIFENCAP 0x8926
197 | #define SIOCGIFHWADDR 0x8927
198 | #define SIOCGIFSLAVE 0x8929
199 | #define SIOCSIFSLAVE 0x8930
200 | #define SIOCADDMULTI 0x8931
201 | #define SIOCDELMULTI 0x8932
202 | #define SIOCGIFINDEX 0x8933
203 | #define SIOGIFINDEX SIOCGIFINDEX
204 | #define SIOCSIFPFLAGS 0x8934
205 | #define SIOCGIFPFLAGS 0x8935
206 | #define SIOCDIFADDR 0x8936
207 | #define SIOCSIFHWBROADCAST 0x8937
208 | #define SIOCGIFCOUNT 0x8938
209 |
210 | #define SIOCGIFBR 0x8940
211 | #define SIOCSIFBR 0x8941
212 |
213 | #define SIOCGIFTXQLEN 0x8942
214 | #define SIOCSIFTXQLEN 0x8943
215 |
216 | #define SIOCDARP 0x8953
217 | #define SIOCGARP 0x8954
218 | #define SIOCSARP 0x8955
219 |
220 | #define SIOCDRARP 0x8960
221 | #define SIOCGRARP 0x8961
222 | #define SIOCSRARP 0x8962
223 |
224 | #define SIOCGIFMAP 0x8970
225 | #define SIOCSIFMAP 0x8971
226 |
227 | #define SIOCADDDLCI 0x8980
228 | #define SIOCDELDLCI 0x8981
229 |
230 | #define SIOCDEVPRIVATE 0x89F0
231 | #define SIOCPROTOPRIVATE 0x89E0
232 |
233 | #endif
234 |
235 |
--------------------------------------------------------------------------------
/rtthread/include/libc/libc_signal.h:
--------------------------------------------------------------------------------
1 | /*
2 | * Copyright (c) 2006-2018, RT-Thread Development Team
3 | *
4 | * SPDX-License-Identifier: Apache-2.0
5 | *
6 | * Change Logs:
7 | * Date Author Notes
8 | * 2017-09-12 Bernard The first version
9 | */
10 |
11 | #ifndef LIBC_SIGNAL_H__
12 | #define LIBC_SIGNAL_H__
13 |
14 | #ifdef __cplusplus
15 | extern "C" {
16 | #endif
17 |
18 | #ifdef HAVE_CCONFIG_H
19 | #include
20 | #endif
21 |
22 | #ifndef HAVE_SIGVAL
23 | /* Signal Generation and Delivery, P1003.1b-1993, p. 63
24 | NOTE: P1003.1c/D10, p. 34 adds sigev_notify_function and
25 | sigev_notify_attributes to the sigevent structure. */
26 |
27 | union sigval
28 | {
29 | int sival_int; /* Integer signal value */
30 | void *sival_ptr; /* Pointer signal value */
31 | };
32 | #endif
33 |
34 | #ifndef HAVE_SIGEVENT
35 | struct sigevent
36 | {
37 | int sigev_notify; /* Notification type */
38 | int sigev_signo; /* Signal number */
39 | union sigval sigev_value; /* Signal value */
40 | void (*sigev_notify_function)( union sigval );
41 | /* Notification function */
42 | void *sigev_notify_attributes; /* Notification Attributes, really pthread_attr_t */
43 | };
44 | #endif
45 |
46 | #ifndef HAVE_SIGINFO
47 | struct siginfo
48 | {
49 | rt_uint16_t si_signo;
50 | rt_uint16_t si_code;
51 |
52 | union sigval si_value;
53 | };
54 | typedef struct siginfo siginfo_t;
55 | #endif
56 |
57 | #define SI_USER 0x01 /* Signal sent by kill(). */
58 | #define SI_QUEUE 0x02 /* Signal sent by sigqueue(). */
59 | #define SI_TIMER 0x03 /* Signal generated by expiration of a
60 | timer set by timer_settime(). */
61 | #define SI_ASYNCIO 0x04 /* Signal generated by completion of an
62 | asynchronous I/O request. */
63 | #define SI_MESGQ 0x05 /* Signal generated by arrival of a
64 | message on an empty message queue. */
65 |
66 | #ifdef RT_USING_NEWLIB
67 | #include
68 | #endif
69 |
70 | #if defined(__CC_ARM) || defined(__CLANG_ARM)
71 | #include
72 | typedef unsigned long sigset_t;
73 |
74 | #define SIGHUP 1
75 | /* #define SIGINT 2 */
76 | #define SIGQUIT 3
77 | /* #define SIGILL 4 */
78 | #define SIGTRAP 5
79 | /* #define SIGABRT 6 */
80 | #define SIGEMT 7
81 | /* #define SIGFPE 8 */
82 | #define SIGKILL 9
83 | #define SIGBUS 10
84 | /* #define SIGSEGV 11 */
85 | #define SIGSYS 12
86 | #define SIGPIPE 13
87 | #define SIGALRM 14
88 | /* #define SIGTERM 15 */
89 | #define SIGURG 16
90 | #define SIGSTOP 17
91 | #define SIGTSTP 18
92 | #define SIGCONT 19
93 | #define SIGCHLD 20
94 | #define SIGTTIN 21
95 | #define SIGTTOU 22
96 | #define SIGPOLL 23
97 | #define SIGWINCH 24
98 | /* #define SIGUSR1 25 */
99 | /* #define SIGUSR2 26 */
100 | #define SIGRTMIN 27
101 | #define SIGRTMAX 31
102 | #define NSIG 32
103 |
104 | #define SIG_SETMASK 0 /* set mask with sigprocmask() */
105 | #define SIG_BLOCK 1 /* set of signals to block */
106 | #define SIG_UNBLOCK 2 /* set of signals to, well, unblock */
107 |
108 | typedef void (*_sig_func_ptr)(int);
109 |
110 | struct sigaction
111 | {
112 | _sig_func_ptr sa_handler;
113 | sigset_t sa_mask;
114 | int sa_flags;
115 | };
116 |
117 | #define sigaddset(what,sig) (*(what) |= (1<<(sig)), 0)
118 | #define sigdelset(what,sig) (*(what) &= ~(1<<(sig)), 0)
119 | #define sigemptyset(what) (*(what) = 0, 0)
120 | #define sigfillset(what) (*(what) = ~(0), 0)
121 | #define sigismember(what,sig) (((*(what)) & (1<<(sig))) != 0)
122 |
123 | int sigprocmask (int how, const sigset_t *set, sigset_t *oset);
124 | int sigaction(int signum, const struct sigaction *act, struct sigaction *oldact);
125 |
126 | #elif defined(__IAR_SYSTEMS_ICC__)
127 | #include
128 | typedef unsigned long sigset_t;
129 |
130 | #define SIGHUP 1
131 | #define SIGINT 2
132 | #define SIGQUIT 3
133 | #define SIGILL 4
134 | #define SIGTRAP 5
135 | /* #define SIGABRT 6 */
136 | #define SIGEMT 7
137 | #define SIGFPE 8
138 | #define SIGKILL 9
139 | #define SIGBUS 10
140 | #define SIGSEGV 11
141 | #define SIGSYS 12
142 | #define SIGPIPE 13
143 | #define SIGALRM 14
144 | #define SIGTERM 15
145 | #define SIGURG 16
146 | #define SIGSTOP 17
147 | #define SIGTSTP 18
148 | #define SIGCONT 19
149 | #define SIGCHLD 20
150 | #define SIGTTIN 21
151 | #define SIGTTOU 22
152 | #define SIGPOLL 23
153 | #define SIGWINCH 24
154 | #define SIGUSR1 25
155 | #define SIGUSR2 26
156 | #define SIGRTMIN 27
157 | #define SIGRTMAX 31
158 | #define NSIG 32
159 |
160 | #define SIG_SETMASK 0 /* set mask with sigprocmask() */
161 | #define SIG_BLOCK 1 /* set of signals to block */
162 | #define SIG_UNBLOCK 2 /* set of signals to, well, unblock */
163 |
164 | typedef void (*_sig_func_ptr)(int);
165 |
166 | struct sigaction
167 | {
168 | _sig_func_ptr sa_handler;
169 | sigset_t sa_mask;
170 | int sa_flags;
171 | };
172 |
173 | #define sigaddset(what,sig) (*(what) |= (1<<(sig)), 0)
174 | #define sigdelset(what,sig) (*(what) &= ~(1<<(sig)), 0)
175 | #define sigemptyset(what) (*(what) = 0, 0)
176 | #define sigfillset(what) (*(what) = ~(0), 0)
177 | #define sigismember(what,sig) (((*(what)) & (1<<(sig))) != 0)
178 |
179 | int sigprocmask (int how, const sigset_t *set, sigset_t *oset);
180 | int sigaction(int signum, const struct sigaction *act, struct sigaction *oldact);
181 | #endif
182 |
183 | #ifdef __cplusplus
184 | }
185 | #endif
186 |
187 | #endif
188 |
189 |
--------------------------------------------------------------------------------
/rtthread/include/libc/libc_stat.h:
--------------------------------------------------------------------------------
1 | /*
2 | * Copyright (c) 2006-2018, RT-Thread Development Team
3 | *
4 | * SPDX-License-Identifier: Apache-2.0
5 | */
6 |
7 | #ifndef LIBC_STAT_H__
8 | #define LIBC_STAT_H__
9 |
10 | #include
11 |
12 | #if defined(RT_USING_NEWLIB)
13 | /* use header file of newlib */
14 | #include
15 |
16 | #elif defined(_WIN32)
17 | #include
18 |
19 | #define S_IRWXU 00700
20 | #define S_IRUSR 00400
21 | #define S_IWUSR 00200
22 | #define S_IXUSR 00100
23 |
24 | #define S_IRWXG 00070
25 | #define S_IRGRP 00040
26 | #define S_IWGRP 00020
27 | #define S_IXGRP 00010
28 |
29 | #define S_IRWXO 00007
30 | #define S_IROTH 00004
31 | #define S_IWOTH 00002
32 | #define S_IXOTH 00001
33 |
34 | #define S_IFSOCK 0140000
35 | #define S_IFLNK 0120000
36 | #define S_IFBLK 0060000
37 | #define S_IFIFO 0010000
38 | #define S_ISUID 0004000
39 | #define S_ISGID 0002000
40 | #define S_ISVTX 0001000
41 |
42 | #define S_ISDIR(m) (((m) & S_IFMT) == S_IFDIR)
43 |
44 | #else
45 | #define S_IFMT 00170000
46 | #define S_IFSOCK 0140000
47 | #define S_IFLNK 0120000
48 | #define S_IFREG 0100000
49 | #define S_IFBLK 0060000
50 | #define S_IFDIR 0040000
51 | #define S_IFCHR 0020000
52 | #define S_IFIFO 0010000
53 | #define S_ISUID 0004000
54 | #define S_ISGID 0002000
55 | #define S_ISVTX 0001000
56 |
57 | #define S_ISLNK(m) (((m) & S_IFMT) == S_IFLNK)
58 | #define S_ISREG(m) (((m) & S_IFMT) == S_IFREG)
59 | #define S_ISDIR(m) (((m) & S_IFMT) == S_IFDIR)
60 | #define S_ISCHR(m) (((m) & S_IFMT) == S_IFCHR)
61 | #define S_ISBLK(m) (((m) & S_IFMT) == S_IFBLK)
62 | #define S_ISFIFO(m) (((m) & S_IFMT) == S_IFIFO)
63 | #define S_ISSOCK(m) (((m) & S_IFMT) == S_IFSOCK)
64 |
65 | #define S_IRWXU 00700
66 | #define S_IRUSR 00400
67 | #define S_IWUSR 00200
68 | #define S_IXUSR 00100
69 |
70 | #define S_IRWXG 00070
71 | #define S_IRGRP 00040
72 | #define S_IWGRP 00020
73 | #define S_IXGRP 00010
74 |
75 | #define S_IRWXO 00007
76 | #define S_IROTH 00004
77 | #define S_IWOTH 00002
78 | #define S_IXOTH 00001
79 |
80 | /* stat structure */
81 | #include
82 | #include
83 |
84 | struct stat
85 | {
86 | struct rt_device *st_dev;
87 | uint16_t st_ino;
88 | uint16_t st_mode;
89 | uint16_t st_nlink;
90 | uint16_t st_uid;
91 | uint16_t st_gid;
92 | struct rt_device *st_rdev;
93 | uint32_t st_size;
94 | time_t st_atime;
95 | long st_spare1;
96 | time_t st_mtime;
97 | long st_spare2;
98 | time_t st_ctime;
99 | long st_spare3;
100 | uint32_t st_blksize;
101 | uint32_t st_blocks;
102 | long st_spare4[2];
103 | };
104 |
105 | #endif
106 |
107 | #endif
108 |
--------------------------------------------------------------------------------
/rtthread/include/rtdbg.h:
--------------------------------------------------------------------------------
1 | /*
2 | * Copyright (c) 2006-2018, RT-Thread Development Team
3 | *
4 | * SPDX-License-Identifier: Apache-2.0
5 | *
6 | * Change Logs:
7 | * Date Author Notes
8 | * 2016-11-12 Bernard The first version
9 | * 2018-05-25 armink Add simple API, such as LOG_D, LOG_E
10 | */
11 |
12 | /*
13 | * The macro definitions for debug
14 | *
15 | * These macros are defined in static. If you want to use debug macro, you can
16 | * use as following code:
17 | *
18 | * In your C/C++ file, enable/disable DEBUG_ENABLE macro, and then include this
19 | * header file.
20 | *
21 | * #define DBG_TAG "MOD_TAG"
22 | * #define DBG_LVL DBG_INFO
23 | * #include // must after of DBG_LVL, DBG_TAG or other options
24 | *
25 | * Then in your C/C++ file, you can use LOG_X macro to print out logs:
26 | * LOG_D("this is a debug log!");
27 | * LOG_E("this is a error log!");
28 | */
29 |
30 | #ifndef RT_DBG_H__
31 | #define RT_DBG_H__
32 |
33 | #include
34 |
35 | /* the debug log will force enable when RT_DEBUG macro is defined */
36 | #if defined(RT_DEBUG) && !defined(DBG_ENABLE)
37 | #define DBG_ENABLE
38 | #endif
39 |
40 | /* it will force output color log when RT_DEBUG_COLOR macro is defined */
41 | #if defined(RT_DEBUG_COLOR) && !defined(DBG_COLOR)
42 | #define DBG_COLOR
43 | #endif
44 |
45 | #if defined(RT_USING_ULOG)
46 | /* using ulog compatible with rtdbg */
47 | #include
48 | #else
49 |
50 | /* DEBUG level */
51 | #define DBG_ERROR 0
52 | #define DBG_WARNING 1
53 | #define DBG_INFO 2
54 | #define DBG_LOG 3
55 |
56 | #ifdef DBG_TAG
57 | #ifndef DBG_SECTION_NAME
58 | #define DBG_SECTION_NAME DBG_TAG
59 | #endif
60 | #else
61 | /* compatible with old version */
62 | #ifndef DBG_SECTION_NAME
63 | #define DBG_SECTION_NAME "DBG"
64 | #endif
65 | #endif /* DBG_TAG */
66 |
67 | #ifdef DBG_ENABLE
68 |
69 | #ifdef DBG_LVL
70 | #ifndef DBG_LEVEL
71 | #define DBG_LEVEL DBG_LVL
72 | #endif
73 | #else
74 | /* compatible with old version */
75 | #ifndef DBG_LEVEL
76 | #define DBG_LEVEL DBG_WARNING
77 | #endif
78 | #endif /* DBG_LVL */
79 |
80 | /*
81 | * The color for terminal (foreground)
82 | * BLACK 30
83 | * RED 31
84 | * GREEN 32
85 | * YELLOW 33
86 | * BLUE 34
87 | * PURPLE 35
88 | * CYAN 36
89 | * WHITE 37
90 | */
91 | #ifdef DBG_COLOR
92 | #define _DBG_COLOR(n) rt_kprintf("\033["#n"m")
93 | #define _DBG_LOG_HDR(lvl_name, color_n) \
94 | rt_kprintf("\033["#color_n"m["lvl_name"/"DBG_SECTION_NAME"] ")
95 | #define _DBG_LOG_X_END \
96 | rt_kprintf("\033[0m\n")
97 | #else
98 | #define _DBG_COLOR(n)
99 | #define _DBG_LOG_HDR(lvl_name, color_n) \
100 | rt_kprintf("["lvl_name"/"DBG_SECTION_NAME"] ")
101 | #define _DBG_LOG_X_END \
102 | rt_kprintf("\n")
103 | #endif /* DBG_COLOR */
104 |
105 | /*
106 | * static debug routine
107 | * NOTE: This is a NOT RECOMMENDED API. Please using LOG_X API.
108 | * It will be DISCARDED later. Because it will take up more resources.
109 | */
110 | #define dbg_log(level, fmt, ...) \
111 | if ((level) <= DBG_LEVEL) \
112 | { \
113 | switch(level) \
114 | { \
115 | case DBG_ERROR: _DBG_LOG_HDR("E", 31); break; \
116 | case DBG_WARNING: _DBG_LOG_HDR("W", 33); break; \
117 | case DBG_INFO: _DBG_LOG_HDR("I", 32); break; \
118 | case DBG_LOG: _DBG_LOG_HDR("D", 0); break; \
119 | default: break; \
120 | } \
121 | rt_kprintf(fmt, ##__VA_ARGS__); \
122 | _DBG_COLOR(0); \
123 | }
124 |
125 | #define dbg_here \
126 | if ((DBG_LEVEL) <= DBG_LOG){ \
127 | rt_kprintf(DBG_SECTION_NAME " Here %s:%d\n", \
128 | __FUNCTION__, __LINE__); \
129 | }
130 |
131 | #define dbg_log_line(lvl, color_n, fmt, ...) \
132 | do \
133 | { \
134 | _DBG_LOG_HDR(lvl, color_n); \
135 | rt_kprintf(fmt, ##__VA_ARGS__); \
136 | _DBG_LOG_X_END; \
137 | } \
138 | while (0)
139 |
140 | #define dbg_raw(...) rt_kprintf(__VA_ARGS__);
141 |
142 | #else
143 | #define dbg_log(level, fmt, ...)
144 | #define dbg_here
145 | #define dbg_enter
146 | #define dbg_exit
147 | #define dbg_log_line(lvl, color_n, fmt, ...)
148 | #define dbg_raw(...)
149 | #endif /* DBG_ENABLE */
150 |
151 | #if (DBG_LEVEL >= DBG_LOG)
152 | #define LOG_D(fmt, ...) dbg_log_line("D", 0, fmt, ##__VA_ARGS__)
153 | #else
154 | #define LOG_D(...)
155 | #endif
156 |
157 | #if (DBG_LEVEL >= DBG_INFO)
158 | #define LOG_I(fmt, ...) dbg_log_line("I", 32, fmt, ##__VA_ARGS__)
159 | #else
160 | #define LOG_I(...)
161 | #endif
162 |
163 | #if (DBG_LEVEL >= DBG_WARNING)
164 | #define LOG_W(fmt, ...) dbg_log_line("W", 33, fmt, ##__VA_ARGS__)
165 | #else
166 | #define LOG_W(...)
167 | #endif
168 |
169 | #if (DBG_LEVEL >= DBG_ERROR)
170 | #define LOG_E(fmt, ...) dbg_log_line("E", 31, fmt, ##__VA_ARGS__)
171 | #else
172 | #define LOG_E(...)
173 | #endif
174 |
175 | #define LOG_RAW(...) dbg_raw(__VA_ARGS__)
176 |
177 | #endif /* defined(RT_USING_ULOG) && define(DBG_ENABLE) */
178 |
179 | #endif /* RT_DBG_H__ */
180 |
--------------------------------------------------------------------------------
/rtthread/include/rtdebug.h:
--------------------------------------------------------------------------------
1 | /*
2 | * Copyright (c) 2006-2018, RT-Thread Development Team
3 | *
4 | * SPDX-License-Identifier: Apache-2.0
5 | */
6 |
7 | #ifndef __RTDEBUG_H__
8 | #define __RTDEBUG_H__
9 |
10 | #include
11 |
12 | /* settings depend check */
13 | #ifdef RT_USING_POSIX
14 | #if !defined(RT_USING_DFS) || !defined(RT_USING_DFS_DEVFS)
15 | #error "POSIX poll/select, stdin need file system(RT_USING_DFS) and device file system(RT_USING_DFS_DEVFS)"
16 | #endif
17 |
18 | #if !defined(RT_USING_LIBC)
19 | #error "POSIX layer need standard C library(RT_USING_LIBC)"
20 | #endif
21 |
22 | #endif
23 |
24 | #ifdef RT_USING_POSIX_TERMIOS
25 | #if !defined(RT_USING_POSIX)
26 | #error "termios need POSIX layer(RT_USING_POSIX)"
27 | #endif
28 | #endif
29 |
30 | /* Using this macro to control all kernel debug features. */
31 | #ifdef RT_DEBUG
32 |
33 | /* Turn on some of these (set to non-zero) to debug kernel */
34 | #ifndef RT_DEBUG_MEM
35 | #define RT_DEBUG_MEM 0
36 | #endif
37 |
38 | #ifndef RT_DEBUG_MEMHEAP
39 | #define RT_DEBUG_MEMHEAP 0
40 | #endif
41 |
42 | #ifndef RT_DEBUG_MODULE
43 | #define RT_DEBUG_MODULE 0
44 | #endif
45 |
46 | #ifndef RT_DEBUG_SCHEDULER
47 | #define RT_DEBUG_SCHEDULER 0
48 | #endif
49 |
50 | #ifndef RT_DEBUG_SLAB
51 | #define RT_DEBUG_SLAB 0
52 | #endif
53 |
54 | #ifndef RT_DEBUG_THREAD
55 | #define RT_DEBUG_THREAD 0
56 | #endif
57 |
58 | #ifndef RT_DEBUG_TIMER
59 | #define RT_DEBUG_TIMER 0
60 | #endif
61 |
62 | #ifndef RT_DEBUG_IRQ
63 | #define RT_DEBUG_IRQ 0
64 | #endif
65 |
66 | #ifndef RT_DEBUG_IPC
67 | #define RT_DEBUG_IPC 0
68 | #endif
69 |
70 | #ifndef RT_DEBUG_INIT
71 | #define RT_DEBUG_INIT 0
72 | #endif
73 |
74 | /* Turn on this to enable context check */
75 | #ifndef RT_DEBUG_CONTEXT_CHECK
76 | #define RT_DEBUG_CONTEXT_CHECK 1
77 | #endif
78 |
79 | #define RT_DEBUG_LOG(type, message) \
80 | do \
81 | { \
82 | if (type) \
83 | rt_kprintf message; \
84 | } \
85 | while (0)
86 |
87 | #define RT_ASSERT(EX) \
88 | if (!(EX)) \
89 | { \
90 | rt_assert_handler(#EX, __FUNCTION__, __LINE__); \
91 | }
92 |
93 | /* Macro to check current context */
94 | #if RT_DEBUG_CONTEXT_CHECK
95 | #define RT_DEBUG_NOT_IN_INTERRUPT \
96 | do \
97 | { \
98 | rt_base_t level; \
99 | level = rt_hw_interrupt_disable(); \
100 | if (rt_interrupt_get_nest() != 0) \
101 | { \
102 | rt_kprintf("Function[%s] shall not be used in ISR\n", __FUNCTION__); \
103 | RT_ASSERT(0) \
104 | } \
105 | rt_hw_interrupt_enable(level); \
106 | } \
107 | while (0)
108 |
109 | /* "In thread context" means:
110 | * 1) the scheduler has been started
111 | * 2) not in interrupt context.
112 | */
113 | #define RT_DEBUG_IN_THREAD_CONTEXT \
114 | do \
115 | { \
116 | rt_base_t level; \
117 | level = rt_hw_interrupt_disable(); \
118 | if (rt_thread_self() == RT_NULL) \
119 | { \
120 | rt_kprintf("Function[%s] shall not be used before scheduler start\n", \
121 | __FUNCTION__); \
122 | RT_ASSERT(0) \
123 | } \
124 | RT_DEBUG_NOT_IN_INTERRUPT; \
125 | rt_hw_interrupt_enable(level); \
126 | } \
127 | while (0)
128 | #else
129 | #define RT_DEBUG_NOT_IN_INTERRUPT
130 | #define RT_DEBUG_IN_THREAD_CONTEXT
131 | #endif
132 |
133 | #else /* RT_DEBUG */
134 |
135 | #define RT_ASSERT(EX)
136 | #define RT_DEBUG_LOG(type, message)
137 | #define RT_DEBUG_NOT_IN_INTERRUPT
138 | #define RT_DEBUG_IN_THREAD_CONTEXT
139 |
140 | #endif /* RT_DEBUG */
141 |
142 | #endif /* __RTDEBUG_H__ */
143 |
--------------------------------------------------------------------------------
/rtthread/include/rthw.h:
--------------------------------------------------------------------------------
1 | /*
2 | * Copyright (c) 2006-2018, RT-Thread Development Team
3 | *
4 | * SPDX-License-Identifier: Apache-2.0
5 | *
6 | * Change Logs:
7 | * Date Author Notes
8 | * 2006-03-18 Bernard the first version
9 | * 2006-04-25 Bernard add rt_hw_context_switch_interrupt declaration
10 | * 2006-09-24 Bernard add rt_hw_context_switch_to declaration
11 | * 2012-12-29 Bernard add rt_hw_exception_install declaration
12 | * 2017-10-17 Hichard add some micros
13 | * 2018-11-17 Jesven add rt_hw_spinlock_t
14 | * add smp support
15 | */
16 |
17 | #ifndef __RT_HW_H__
18 | #define __RT_HW_H__
19 |
20 | #include
21 |
22 | #ifdef __cplusplus
23 | extern "C" {
24 | #endif
25 |
26 | /*
27 | * Some macros define
28 | */
29 | #ifndef HWREG32
30 | #define HWREG32(x) (*((volatile rt_uint32_t *)(x)))
31 | #endif
32 | #ifndef HWREG16
33 | #define HWREG16(x) (*((volatile rt_uint16_t *)(x)))
34 | #endif
35 | #ifndef HWREG8
36 | #define HWREG8(x) (*((volatile rt_uint8_t *)(x)))
37 | #endif
38 |
39 | #ifndef RT_CPU_CACHE_LINE_SZ
40 | #define RT_CPU_CACHE_LINE_SZ 32
41 | #endif
42 |
43 | enum RT_HW_CACHE_OPS
44 | {
45 | RT_HW_CACHE_FLUSH = 0x01,
46 | RT_HW_CACHE_INVALIDATE = 0x02,
47 | };
48 |
49 | /*
50 | * CPU interfaces
51 | */
52 | void rt_hw_cpu_icache_enable(void);
53 | void rt_hw_cpu_icache_disable(void);
54 | rt_base_t rt_hw_cpu_icache_status(void);
55 | void rt_hw_cpu_icache_ops(int ops, void* addr, int size);
56 |
57 | void rt_hw_cpu_dcache_enable(void);
58 | void rt_hw_cpu_dcache_disable(void);
59 | rt_base_t rt_hw_cpu_dcache_status(void);
60 | void rt_hw_cpu_dcache_ops(int ops, void* addr, int size);
61 |
62 | void rt_hw_cpu_reset(void);
63 | void rt_hw_cpu_shutdown(void);
64 |
65 | rt_uint8_t *rt_hw_stack_init(void *entry,
66 | void *parameter,
67 | rt_uint8_t *stack_addr,
68 | void *exit);
69 |
70 | /*
71 | * Interrupt handler definition
72 | */
73 | typedef void (*rt_isr_handler_t)(int vector, void *param);
74 |
75 | struct rt_irq_desc
76 | {
77 | rt_isr_handler_t handler;
78 | void *param;
79 |
80 | #ifdef RT_USING_INTERRUPT_INFO
81 | char name[RT_NAME_MAX];
82 | rt_uint32_t counter;
83 | #endif
84 | };
85 |
86 | /*
87 | * Interrupt interfaces
88 | */
89 | void rt_hw_interrupt_init(void);
90 | void rt_hw_interrupt_mask(int vector);
91 | void rt_hw_interrupt_umask(int vector);
92 | rt_isr_handler_t rt_hw_interrupt_install(int vector,
93 | rt_isr_handler_t handler,
94 | void *param,
95 | const char *name);
96 |
97 | #ifdef RT_USING_SMP
98 | rt_base_t rt_hw_local_irq_disable();
99 | void rt_hw_local_irq_enable(rt_base_t level);
100 |
101 | #define rt_hw_interrupt_disable rt_cpus_lock
102 | #define rt_hw_interrupt_enable rt_cpus_unlock
103 |
104 | #else
105 | rt_base_t rt_hw_interrupt_disable(void);
106 | void rt_hw_interrupt_enable(rt_base_t level);
107 | #endif /*RT_USING_SMP*/
108 |
109 | /*
110 | * Context interfaces
111 | */
112 | #ifdef RT_USING_SMP
113 | void rt_hw_context_switch(rt_ubase_t from, rt_ubase_t to, struct rt_thread *to_thread);
114 | void rt_hw_context_switch_to(rt_ubase_t to, struct rt_thread *to_thread);
115 | void rt_hw_context_switch_interrupt(void *context, rt_ubase_t from, rt_ubase_t to, struct rt_thread *to_thread);
116 | #else
117 | void rt_hw_context_switch(rt_ubase_t from, rt_ubase_t to);
118 | void rt_hw_context_switch_to(rt_ubase_t to);
119 | void rt_hw_context_switch_interrupt(rt_ubase_t from, rt_ubase_t to);
120 | #endif /*RT_USING_SMP*/
121 |
122 | void rt_hw_console_output(const char *str);
123 |
124 | void rt_hw_backtrace(rt_uint32_t *fp, rt_ubase_t thread_entry);
125 | void rt_hw_show_memory(rt_uint32_t addr, rt_size_t size);
126 |
127 | /*
128 | * Exception interfaces
129 | */
130 | void rt_hw_exception_install(rt_err_t (*exception_handle)(void *context));
131 |
132 | /*
133 | * delay interfaces
134 | */
135 | void rt_hw_us_delay(rt_uint32_t us);
136 |
137 | #ifdef RT_USING_SMP
138 | typedef union {
139 | unsigned long slock;
140 | struct __arch_tickets {
141 | unsigned short owner;
142 | unsigned short next;
143 | } tickets;
144 | } rt_hw_spinlock_t;
145 |
146 | struct rt_spinlock
147 | {
148 | rt_hw_spinlock_t lock;
149 | };
150 |
151 | void rt_hw_spin_lock_init(rt_hw_spinlock_t *lock);
152 | void rt_hw_spin_lock(rt_hw_spinlock_t *lock);
153 | void rt_hw_spin_unlock(rt_hw_spinlock_t *lock);
154 |
155 | int rt_hw_cpu_id(void);
156 |
157 | extern rt_hw_spinlock_t _cpus_lock;
158 | extern rt_hw_spinlock_t _rt_critical_lock;
159 |
160 | #define __RT_HW_SPIN_LOCK_INITIALIZER(lockname) {0}
161 |
162 | #define __RT_HW_SPIN_LOCK_UNLOCKED(lockname) \
163 | (rt_hw_spinlock_t) __RT_HW_SPIN_LOCK_INITIALIZER(lockname)
164 |
165 | #define RT_DEFINE_SPINLOCK(x) rt_hw_spinlock_t x = __RT_HW_SPIN_LOCK_UNLOCKED(x)
166 | #define RT_DECLARE_SPINLOCK(x)
167 |
168 | /**
169 | * ipi function
170 | */
171 | void rt_hw_ipi_send(int ipi_vector, unsigned int cpu_mask);
172 |
173 | /**
174 | * boot secondary cpu
175 | */
176 | void rt_hw_secondary_cpu_up(void);
177 |
178 | /**
179 | * secondary cpu idle function
180 | */
181 | void rt_hw_secondary_cpu_idle_exec(void);
182 | #else
183 |
184 | #define RT_DEFINE_SPINLOCK(x)
185 | #define RT_DECLARE_SPINLOCK(x) rt_ubase_t x
186 |
187 | #define rt_hw_spin_lock(lock) *(lock) = rt_hw_interrupt_disable()
188 | #define rt_hw_spin_unlock(lock) rt_hw_interrupt_enable(*(lock))
189 |
190 | #endif
191 |
192 | #ifdef __cplusplus
193 | }
194 | #endif
195 |
196 | #endif
197 |
--------------------------------------------------------------------------------
/rtthread/include/rtlibc.h:
--------------------------------------------------------------------------------
1 | /*
2 | * Copyright (c) 2006-2018, RT-Thread Development Team
3 | *
4 | * SPDX-License-Identifier: Apache-2.0
5 | *
6 | * Change Logs:
7 | * Date Author Notes
8 | * 2017-01-21 Bernard the first version
9 | */
10 |
11 | #ifndef RTLIBC_H__
12 | #define RTLIBC_H__
13 |
14 | /* definitions for libc if toolchain has no these definitions */
15 | #include "libc/libc_stat.h"
16 | #include "libc/libc_errno.h"
17 |
18 | #include "libc/libc_fcntl.h"
19 | #include "libc/libc_ioctl.h"
20 | #include "libc/libc_dirent.h"
21 | #include "libc/libc_signal.h"
22 | #include "libc/libc_fdset.h"
23 |
24 | #if defined(__CC_ARM) || defined(__CLANG_ARM) || defined(__IAR_SYSTEMS_ICC__)
25 | typedef signed long off_t;
26 | typedef int mode_t;
27 | #endif
28 |
29 | #if defined(__MINGW32__) || defined(_WIN32)
30 | typedef signed long off_t;
31 | typedef int mode_t;
32 | #endif
33 |
34 | #endif
35 |
36 |
--------------------------------------------------------------------------------
/rtthread/include/rtm.h:
--------------------------------------------------------------------------------
1 | /*
2 | * Copyright (c) 2006-2018, RT-Thread Development Team
3 | *
4 | * SPDX-License-Identifier: Apache-2.0
5 | */
6 |
7 | #ifndef __RTM_H__
8 | #define __RTM_H__
9 |
10 | #include
11 | #include
12 |
13 | #ifdef RT_USING_MODULE
14 | struct rt_module_symtab
15 | {
16 | void *addr;
17 | const char *name;
18 | };
19 |
20 | #if defined(_MSC_VER)
21 | #pragma section("RTMSymTab$f",read)
22 | #define RTM_EXPORT(symbol) \
23 | __declspec(allocate("RTMSymTab$f"))const char __rtmsym_##symbol##_name[] = "__vs_rtm_"#symbol;
24 | #pragma comment(linker, "/merge:RTMSymTab=mytext")
25 |
26 | #elif defined(__MINGW32__)
27 | #define RTM_EXPORT(symbol)
28 |
29 | #else
30 | #define RTM_EXPORT(symbol) \
31 | const char __rtmsym_##symbol##_name[] SECTION(".rodata.name") = #symbol; \
32 | const struct rt_module_symtab __rtmsym_##symbol SECTION("RTMSymTab")= \
33 | { \
34 | (void *)&symbol, \
35 | __rtmsym_##symbol##_name \
36 | };
37 | #endif
38 |
39 | #else
40 | #define RTM_EXPORT(symbol)
41 | #endif
42 |
43 | #endif
44 |
--------------------------------------------------------------------------------
/rtthread/rtconfig.h:
--------------------------------------------------------------------------------
1 | #ifndef RT_CONFIG_H__
2 | #define RT_CONFIG_H__
3 |
4 | /* Automatically generated file; DO NOT EDIT. */
5 | /* RT-Thread Configuration */
6 |
7 | /* RT-Thread Kernel */
8 |
9 | #define RT_NAME_MAX 8
10 | #define RT_ALIGN_SIZE 4
11 | #define RT_THREAD_PRIORITY_32
12 | #define RT_THREAD_PRIORITY_MAX 32
13 | #define RT_TICK_PER_SECOND 1000
14 | #define RT_USING_OVERFLOW_CHECK
15 | #define RT_USING_HOOK
16 | #define RT_USING_IDLE_HOOK
17 | #define RT_IDLE_HOOK_LIST_SIZE 4
18 | #define IDLE_THREAD_STACK_SIZE 256
19 | #define RT_DEBUG
20 |
21 | /* Inter-Thread communication */
22 |
23 | #define RT_USING_SEMAPHORE
24 | #define RT_USING_MUTEX
25 | #define RT_USING_EVENT
26 | #define RT_USING_MAILBOX
27 | #define RT_USING_MESSAGEQUEUE
28 |
29 | /* Memory Management */
30 |
31 | #define RT_USING_MEMPOOL
32 | #define RT_USING_SMALL_MEM
33 | #define RT_USING_HEAP
34 |
35 | /* Kernel Device Object */
36 |
37 | #define RT_USING_DEVICE
38 | #define RT_USING_CONSOLE
39 | #define RT_CONSOLEBUF_SIZE 128
40 | #define RT_CONSOLE_DEVICE_NAME "uart1"
41 | #define RT_VER_NUM 0x40001
42 | #define ARCH_ARM
43 | #define ARCH_ARM_CORTEX_M
44 | #define ARCH_ARM_CORTEX_M3
45 |
46 | /* RT-Thread Components */
47 |
48 | #define RT_USING_COMPONENTS_INIT
49 | //#define RT_USING_USER_MAIN
50 | #define RT_MAIN_THREAD_STACK_SIZE 2048
51 | #define RT_MAIN_THREAD_PRIORITY 10
52 |
53 | /* C++ features */
54 |
55 |
56 | /* Command shell */
57 |
58 | /* Device virtual file system */
59 |
60 |
61 | /* Device Drivers */
62 |
63 | #define RT_USING_DEVICE_IPC
64 | #define RT_PIPE_BUFSZ 512
65 | #define RT_USING_SERIAL
66 | #define RT_SERIAL_USING_DMA
67 | #define RT_SERIAL_RB_BUFSZ 64
68 | #define RT_USING_PIN
69 |
70 | /* Using WiFi */
71 |
72 |
73 | /* Using USB */
74 |
75 |
76 | /* POSIX layer and C standard library */
77 |
78 |
79 | /* Network */
80 |
81 | /* Socket abstraction layer */
82 |
83 |
84 | /* light weight TCP/IP stack */
85 |
86 |
87 | /* Modbus master and slave stack */
88 |
89 |
90 | /* AT commands */
91 |
92 |
93 | /* VBUS(Virtual Software BUS) */
94 |
95 |
96 | /* Utilities */
97 |
98 |
99 | /* RT-Thread online packages */
100 |
101 | /* IoT - internet of things */
102 |
103 |
104 | /* Wi-Fi */
105 |
106 | /* Marvell WiFi */
107 |
108 |
109 | /* Wiced WiFi */
110 |
111 |
112 | /* IoT Cloud */
113 |
114 |
115 | /* security packages */
116 |
117 |
118 | /* language packages */
119 |
120 |
121 | /* multimedia packages */
122 |
123 |
124 | /* tools packages */
125 |
126 |
127 | /* system packages */
128 |
129 |
130 | /* peripheral libraries and drivers */
131 |
132 |
133 | /* miscellaneous packages */
134 |
135 |
136 | /* sample package */
137 |
138 | /* samples: kernel and components samples */
139 |
140 |
141 | /* example package: hello */
142 |
143 | #define SOC_FAMILY_STM32
144 | #define SOC_SERIES_STM32F1
145 |
146 | /* Hardware Drivers Config */
147 |
148 | #define SOC_STM32F103C8
149 |
150 | /* Onboard Peripheral Drivers */
151 |
152 | #define BSP_USING_USB_TO_USART
153 |
154 | /* On-chip Peripheral Drivers */
155 |
156 | #define BSP_USING_GPIO
157 | #define BSP_USING_UART
158 | #define BSP_USING_UART1
159 | #define BSP_UART1_RX_USING_DMA
160 |
161 | /* Board extended module Drivers */
162 |
163 |
164 | #endif
165 |
--------------------------------------------------------------------------------
/rtthread/src/SConscript:
--------------------------------------------------------------------------------
1 | Import('RTT_ROOT')
2 | Import('rtconfig')
3 | from building import *
4 |
5 | src = Glob('*.c')
6 |
7 | CPPPATH = [RTT_ROOT + '/include']
8 |
9 | if GetDepend('RT_USING_MODULE') == False:
10 | SrcRemove(src, ['module.c'])
11 |
12 | if GetDepend('RT_USING_HEAP') == False or GetDepend('RT_USING_SMALL_MEM') == False:
13 | SrcRemove(src, ['mem.c'])
14 |
15 | if GetDepend('RT_USING_HEAP') == False or GetDepend('RT_USING_SLAB') == False:
16 | SrcRemove(src, ['slab.c'])
17 |
18 | if GetDepend('RT_USING_MEMPOOL') == False:
19 | SrcRemove(src, ['mempool.c'])
20 |
21 | if GetDepend('RT_USING_MEMHEAP') == False:
22 | SrcRemove(src, ['memheap.c'])
23 | if GetDepend('RT_USING_MEMHEAP_AS_HEAP'):
24 | SrcRemove(src, ['mem.c'])
25 |
26 | if GetDepend('RT_USING_DEVICE') == False:
27 | SrcRemove(src, ['device.c'])
28 |
29 | if GetDepend('RT_USING_SMP') == False:
30 | SrcRemove(src, ['cpu.c'])
31 |
32 | group = DefineGroup('Kernel', src, depend = [''], CPPPATH = CPPPATH)
33 |
34 | Return('group')
35 |
--------------------------------------------------------------------------------
/rtthread/src/clock.c:
--------------------------------------------------------------------------------
1 | /*
2 | * Copyright (c) 2006-2018, RT-Thread Development Team
3 | *
4 | * SPDX-License-Identifier: Apache-2.0
5 | *
6 | * Change Logs:
7 | * Date Author Notes
8 | * 2006-03-12 Bernard first version
9 | * 2006-05-27 Bernard add support for same priority thread schedule
10 | * 2006-08-10 Bernard remove the last rt_schedule in rt_tick_increase
11 | * 2010-03-08 Bernard remove rt_passed_second
12 | * 2010-05-20 Bernard fix the tick exceeds the maximum limits
13 | * 2010-07-13 Bernard fix rt_tick_from_millisecond issue found by kuronca
14 | * 2011-06-26 Bernard add rt_tick_set function.
15 | * 2018-11-22 Jesven add per cpu tick
16 | */
17 |
18 | #include
19 | #include
20 |
21 | #ifdef RT_USING_SMP
22 | #define rt_tick rt_cpu_index(0)->tick
23 | #else
24 | static rt_tick_t rt_tick = 0;
25 | #endif
26 |
27 | /**
28 | * This function will init system tick and set it to zero.
29 | * @ingroup SystemInit
30 | *
31 | * @deprecated since 1.1.0, this function does not need to be invoked
32 | * in the system initialization.
33 | */
34 | void rt_system_tick_init(void)
35 | {
36 | }
37 |
38 | /**
39 | * @addtogroup Clock
40 | */
41 |
42 | /**@{*/
43 |
44 | /**
45 | * This function will return current tick from operating system startup
46 | *
47 | * @return current tick
48 | */
49 | rt_tick_t rt_tick_get(void)
50 | {
51 | /* return the global tick */
52 | return rt_tick;
53 | }
54 | RTM_EXPORT(rt_tick_get);
55 |
56 | /**
57 | * This function will set current tick
58 | */
59 | void rt_tick_set(rt_tick_t tick)
60 | {
61 | rt_base_t level;
62 |
63 | level = rt_hw_interrupt_disable();
64 | rt_tick = tick;
65 | rt_hw_interrupt_enable(level);
66 | }
67 |
68 | /**
69 | * This function will notify kernel there is one tick passed. Normally,
70 | * this function is invoked by clock ISR.
71 | */
72 | void rt_tick_increase(void)
73 | {
74 | struct rt_thread *thread;
75 |
76 | /* increase the global tick */
77 | #ifdef RT_USING_SMP
78 | rt_cpu_self()->tick ++;
79 | #else
80 | ++ rt_tick;
81 | #endif
82 |
83 | /* check time slice */
84 | thread = rt_thread_self();
85 |
86 | -- thread->remaining_tick;
87 | if (thread->remaining_tick == 0)
88 | {
89 | /* change to initialized tick */
90 | thread->remaining_tick = thread->init_tick;
91 |
92 | /* yield */
93 | rt_thread_yield();
94 | }
95 |
96 | /* check timer */
97 | rt_timer_check();
98 | }
99 |
100 | /**
101 | * This function will calculate the tick from millisecond.
102 | *
103 | * @param ms the specified millisecond
104 | * - Negative Number wait forever
105 | * - Zero not wait
106 | * - Max 0x7fffffff
107 | *
108 | * @return the calculated tick
109 | */
110 | rt_tick_t rt_tick_from_millisecond(rt_int32_t ms)
111 | {
112 | rt_tick_t tick;
113 |
114 | if (ms < 0)
115 | {
116 | tick = (rt_tick_t)RT_WAITING_FOREVER;
117 | }
118 | else
119 | {
120 | tick = RT_TICK_PER_SECOND * (ms / 1000);
121 | tick += (RT_TICK_PER_SECOND * (ms % 1000) + 999) / 1000;
122 | }
123 |
124 | /* return the calculated tick */
125 | return tick;
126 | }
127 | RTM_EXPORT(rt_tick_from_millisecond);
128 |
129 | /**@}*/
130 |
131 |
--------------------------------------------------------------------------------
/rtthread/src/cpu.c:
--------------------------------------------------------------------------------
1 | /*
2 | * Copyright (c) 2006-2018, RT-Thread Development Team
3 | *
4 | * SPDX-License-Identifier: Apache-2.0
5 | *
6 | * Change Logs:
7 | * Date Author Notes
8 | * 2018-10-30 Bernard The first version
9 | */
10 | #include
11 | #include
12 |
13 | #ifdef RT_USING_SMP
14 | static struct rt_cpu rt_cpus[RT_CPUS_NR];
15 | rt_hw_spinlock_t _cpus_lock;
16 |
17 | /*
18 | * disable scheduler
19 | */
20 | static void rt_preempt_disable(void)
21 | {
22 | register rt_base_t level;
23 | struct rt_thread *current_thread;
24 |
25 | /* disable interrupt */
26 | level = rt_hw_local_irq_disable();
27 |
28 | current_thread = rt_thread_self();
29 | if (!current_thread)
30 | {
31 | rt_hw_local_irq_enable(level);
32 | return;
33 | }
34 |
35 | /* lock scheduler for local cpu */
36 | current_thread->scheduler_lock_nest ++;
37 |
38 | /* enable interrupt */
39 | rt_hw_local_irq_enable(level);
40 | }
41 |
42 | /*
43 | * enable scheduler
44 | */
45 | static void rt_preempt_enable(void)
46 | {
47 | register rt_base_t level;
48 | struct rt_thread *current_thread;
49 |
50 | /* disable interrupt */
51 | level = rt_hw_local_irq_disable();
52 |
53 | current_thread = rt_thread_self();
54 | if (!current_thread)
55 | {
56 | rt_hw_local_irq_enable(level);
57 | return;
58 | }
59 |
60 | /* unlock scheduler for local cpu */
61 | current_thread->scheduler_lock_nest --;
62 |
63 | rt_schedule();
64 | /* enable interrupt */
65 | rt_hw_local_irq_enable(level);
66 | }
67 |
68 | void rt_spin_lock_init(struct rt_spinlock *lock)
69 | {
70 | rt_hw_spin_lock_init(&lock->lock);
71 | }
72 | RTM_EXPORT(rt_spin_lock_init)
73 |
74 | void rt_spin_lock(struct rt_spinlock *lock)
75 | {
76 | rt_preempt_disable();
77 | rt_hw_spin_lock(&lock->lock);
78 | }
79 | RTM_EXPORT(rt_spin_lock)
80 |
81 | void rt_spin_unlock(struct rt_spinlock *lock)
82 | {
83 | rt_hw_spin_unlock(&lock->lock);
84 | rt_preempt_enable();
85 | }
86 | RTM_EXPORT(rt_spin_unlock)
87 |
88 | rt_base_t rt_spin_lock_irqsave(struct rt_spinlock *lock)
89 | {
90 | unsigned long level;
91 |
92 | rt_preempt_disable();
93 |
94 | level = rt_hw_local_irq_disable();
95 | rt_hw_spin_lock(&lock->lock);
96 |
97 | return level;
98 | }
99 | RTM_EXPORT(rt_spin_lock_irqsave)
100 |
101 | void rt_spin_unlock_irqrestore(struct rt_spinlock *lock, rt_base_t level)
102 | {
103 | rt_hw_spin_unlock(&lock->lock);
104 | rt_hw_local_irq_enable(level);
105 |
106 | rt_preempt_enable();
107 | }
108 | RTM_EXPORT(rt_spin_unlock_irqrestore)
109 |
110 | /**
111 | * This fucntion will return current cpu.
112 | */
113 | struct rt_cpu *rt_cpu_self(void)
114 | {
115 | return &rt_cpus[rt_hw_cpu_id()];
116 | }
117 |
118 | struct rt_cpu *rt_cpu_index(int index)
119 | {
120 | return &rt_cpus[index];
121 | }
122 |
123 | /**
124 | * This function will lock all cpus's scheduler and disable local irq.
125 | */
126 | rt_base_t rt_cpus_lock(void)
127 | {
128 | rt_base_t level;
129 | struct rt_cpu* pcpu;
130 |
131 | level = rt_hw_local_irq_disable();
132 |
133 | pcpu = rt_cpu_self();
134 | if (pcpu->current_thread != RT_NULL)
135 | {
136 | register rt_ubase_t lock_nest = pcpu->current_thread->cpus_lock_nest;
137 |
138 | pcpu->current_thread->cpus_lock_nest++;
139 | if (lock_nest == 0)
140 | {
141 | pcpu->current_thread->scheduler_lock_nest++;
142 | rt_hw_spin_lock(&_cpus_lock);
143 | }
144 | }
145 |
146 | return level;
147 | }
148 | RTM_EXPORT(rt_cpus_lock);
149 |
150 | /**
151 | * This function will restore all cpus's scheduler and restore local irq.
152 | */
153 | void rt_cpus_unlock(rt_base_t level)
154 | {
155 | struct rt_cpu* pcpu = rt_cpu_self();
156 |
157 | if (pcpu->current_thread != RT_NULL)
158 | {
159 | pcpu->current_thread->cpus_lock_nest--;
160 |
161 | if (pcpu->current_thread->cpus_lock_nest == 0)
162 | {
163 | pcpu->current_thread->scheduler_lock_nest--;
164 | rt_hw_spin_unlock(&_cpus_lock);
165 | }
166 | }
167 | rt_hw_local_irq_enable(level);
168 | }
169 | RTM_EXPORT(rt_cpus_unlock);
170 |
171 | /**
172 | * This function is invoked by scheduler.
173 | * It will restore the lock state to whatever the thread's counter expects.
174 | * If target thread not locked the cpus then unlock the cpus lock.
175 | */
176 | void rt_cpus_lock_status_restore(struct rt_thread *thread)
177 | {
178 | struct rt_cpu* pcpu = rt_cpu_self();
179 |
180 | pcpu->current_thread = thread;
181 | if (!thread->cpus_lock_nest)
182 | {
183 | rt_hw_spin_unlock(&_cpus_lock);
184 | }
185 | }
186 | RTM_EXPORT(rt_cpus_lock_status_restore);
187 |
188 | #endif
189 |
--------------------------------------------------------------------------------
/rtthread/src/idle.c:
--------------------------------------------------------------------------------
1 | /*
2 | * Copyright (c) 2006-2018, RT-Thread Development Team
3 | *
4 | * SPDX-License-Identifier: Apache-2.0
5 | *
6 | * Change Logs:
7 | * Date Author Notes
8 | * 2006-03-23 Bernard the first version
9 | * 2010-11-10 Bernard add cleanup callback function in thread exit.
10 | * 2012-12-29 Bernard fix compiling warning.
11 | * 2013-12-21 Grissiom let rt_thread_idle_excute loop until there is no
12 | * dead thread.
13 | * 2016-08-09 ArdaFu add method to get the handler of the idle thread.
14 | * 2018-02-07 Bernard lock scheduler to protect tid->cleanup.
15 | * 2018-07-14 armink add idle hook list
16 | * 2018-11-22 Jesven add per cpu idle task
17 | * combine the code of primary and secondary cpu
18 | */
19 |
20 | #include
21 | #include
22 |
23 | #ifdef RT_USING_MODULE
24 | #include
25 | #endif
26 |
27 | #if defined (RT_USING_HOOK)
28 | #ifndef RT_USING_IDLE_HOOK
29 | #define RT_USING_IDLE_HOOK
30 | #endif
31 | #endif
32 |
33 | #ifndef IDLE_THREAD_STACK_SIZE
34 | #if defined (RT_USING_IDLE_HOOK) || defined(RT_USING_HEAP)
35 | #define IDLE_THREAD_STACK_SIZE 256
36 | #else
37 | #define IDLE_THREAD_STACK_SIZE 128
38 | #endif
39 | #endif
40 |
41 | #ifdef RT_USING_SMP
42 | #define _CPUS_NR RT_CPUS_NR
43 | #else
44 | #define _CPUS_NR 1
45 | #endif
46 |
47 | extern rt_list_t rt_thread_defunct;
48 |
49 | static struct rt_thread idle[_CPUS_NR];
50 | ALIGN(RT_ALIGN_SIZE)
51 | static rt_uint8_t rt_thread_stack[_CPUS_NR][IDLE_THREAD_STACK_SIZE];
52 |
53 | #ifdef RT_USING_IDLE_HOOK
54 | #ifndef RT_IDLE_HOOK_LIST_SIZE
55 | #define RT_IDLE_HOOK_LIST_SIZE 4
56 | #endif
57 |
58 | static void (*idle_hook_list[RT_IDLE_HOOK_LIST_SIZE])(void);
59 |
60 | /**
61 | * @ingroup Hook
62 | * This function sets a hook function to idle thread loop. When the system performs
63 | * idle loop, this hook function should be invoked.
64 | *
65 | * @param hook the specified hook function
66 | *
67 | * @return RT_EOK: set OK
68 | * -RT_EFULL: hook list is full
69 | *
70 | * @note the hook function must be simple and never be blocked or suspend.
71 | */
72 | rt_err_t rt_thread_idle_sethook(void (*hook)(void))
73 | {
74 | rt_size_t i;
75 | rt_base_t level;
76 | rt_err_t ret = -RT_EFULL;
77 |
78 | /* disable interrupt */
79 | level = rt_hw_interrupt_disable();
80 |
81 | for (i = 0; i < RT_IDLE_HOOK_LIST_SIZE; i++)
82 | {
83 | if (idle_hook_list[i] == RT_NULL)
84 | {
85 | idle_hook_list[i] = hook;
86 | ret = RT_EOK;
87 | break;
88 | }
89 | }
90 | /* enable interrupt */
91 | rt_hw_interrupt_enable(level);
92 |
93 | return ret;
94 | }
95 |
96 | /**
97 | * delete the idle hook on hook list
98 | *
99 | * @param hook the specified hook function
100 | *
101 | * @return RT_EOK: delete OK
102 | * -RT_ENOSYS: hook was not found
103 | */
104 | rt_err_t rt_thread_idle_delhook(void (*hook)(void))
105 | {
106 | rt_size_t i;
107 | rt_base_t level;
108 | rt_err_t ret = -RT_ENOSYS;
109 |
110 | /* disable interrupt */
111 | level = rt_hw_interrupt_disable();
112 |
113 | for (i = 0; i < RT_IDLE_HOOK_LIST_SIZE; i++)
114 | {
115 | if (idle_hook_list[i] == hook)
116 | {
117 | idle_hook_list[i] = RT_NULL;
118 | ret = RT_EOK;
119 | break;
120 | }
121 | }
122 | /* enable interrupt */
123 | rt_hw_interrupt_enable(level);
124 |
125 | return ret;
126 | }
127 |
128 | #endif
129 |
130 | /* Return whether there is defunctional thread to be deleted. */
131 | rt_inline int _has_defunct_thread(void)
132 | {
133 | /* The rt_list_isempty has prototype of "int rt_list_isempty(const rt_list_t *l)".
134 | * So the compiler has a good reason that the rt_thread_defunct list does
135 | * not change within rt_thread_idle_excute thus optimize the "while" loop
136 | * into a "if".
137 | *
138 | * So add the volatile qualifier here. */
139 | const volatile rt_list_t *l = (const volatile rt_list_t *)&rt_thread_defunct;
140 |
141 | return l->next != l;
142 | }
143 |
144 | /**
145 | * @ingroup Thread
146 | *
147 | * This function will perform system background job when system idle.
148 | */
149 | void rt_thread_idle_excute(void)
150 | {
151 | /* Loop until there is no dead thread. So one call to rt_thread_idle_excute
152 | * will do all the cleanups. */
153 | while (_has_defunct_thread())
154 | {
155 | rt_base_t lock;
156 | rt_thread_t thread;
157 | #ifdef RT_USING_MODULE
158 | struct rt_dlmodule *module = RT_NULL;
159 | #endif
160 | RT_DEBUG_NOT_IN_INTERRUPT;
161 |
162 | /* disable interrupt */
163 | lock = rt_hw_interrupt_disable();
164 |
165 | /* re-check whether list is empty */
166 | if (_has_defunct_thread())
167 | {
168 | /* get defunct thread */
169 | thread = rt_list_entry(rt_thread_defunct.next,
170 | struct rt_thread,
171 | tlist);
172 | #ifdef RT_USING_MODULE
173 | module = (struct rt_dlmodule*)thread->module_id;
174 | if (module)
175 | {
176 | dlmodule_destroy(module);
177 | }
178 | #endif
179 | /* remove defunct thread */
180 | rt_list_remove(&(thread->tlist));
181 |
182 | /* lock scheduler to prevent scheduling in cleanup function. */
183 | rt_enter_critical();
184 |
185 | /* invoke thread cleanup */
186 | if (thread->cleanup != RT_NULL)
187 | thread->cleanup(thread);
188 |
189 | #ifdef RT_USING_SIGNALS
190 | rt_thread_free_sig(thread);
191 | #endif
192 |
193 | /* if it's a system object, not delete it */
194 | if (rt_object_is_systemobject((rt_object_t)thread) == RT_TRUE)
195 | {
196 | /* detach this object */
197 | rt_object_detach((rt_object_t)thread);
198 | /* unlock scheduler */
199 | rt_exit_critical();
200 |
201 | /* enable interrupt */
202 | rt_hw_interrupt_enable(lock);
203 |
204 | return;
205 | }
206 |
207 | /* unlock scheduler */
208 | rt_exit_critical();
209 | }
210 | else
211 | {
212 | /* enable interrupt */
213 | rt_hw_interrupt_enable(lock);
214 |
215 | /* may the defunct thread list is removed by others, just return */
216 | return;
217 | }
218 |
219 | /* enable interrupt */
220 | rt_hw_interrupt_enable(lock);
221 |
222 | #ifdef RT_USING_HEAP
223 | /* release thread's stack */
224 | RT_KERNEL_FREE(thread->stack_addr);
225 | /* delete thread object */
226 | rt_object_delete((rt_object_t)thread);
227 | #endif
228 | }
229 | }
230 |
231 | extern void rt_system_power_manager(void);
232 | static void rt_thread_idle_entry(void *parameter)
233 | {
234 | #ifdef RT_USING_SMP
235 | if (rt_hw_cpu_id() != 0)
236 | {
237 | while (1)
238 | {
239 | rt_hw_secondary_cpu_idle_exec();
240 | }
241 | }
242 | #endif
243 |
244 | while (1)
245 | {
246 | #ifdef RT_USING_IDLE_HOOK
247 | rt_size_t i;
248 |
249 | for (i = 0; i < RT_IDLE_HOOK_LIST_SIZE; i++)
250 | {
251 | if (idle_hook_list[i] != RT_NULL)
252 | {
253 | idle_hook_list[i]();
254 | }
255 | }
256 | #endif
257 |
258 | rt_thread_idle_excute();
259 | #ifdef RT_USING_PM
260 | rt_system_power_manager();
261 | #endif
262 | }
263 | }
264 |
265 | /**
266 | * @ingroup SystemInit
267 | *
268 | * This function will initialize idle thread, then start it.
269 | *
270 | * @note this function must be invoked when system init.
271 | */
272 | void rt_thread_idle_init(void)
273 | {
274 | rt_ubase_t i;
275 | char tidle_name[RT_NAME_MAX];
276 |
277 | for (i = 0; i < _CPUS_NR; i++)
278 | {
279 | rt_sprintf(tidle_name, "tidle%d", i);
280 | rt_thread_init(&idle[i],
281 | tidle_name,
282 | rt_thread_idle_entry,
283 | RT_NULL,
284 | &rt_thread_stack[i][0],
285 | sizeof(rt_thread_stack[i]),
286 | RT_THREAD_PRIORITY_MAX - 1,
287 | 32);
288 | #ifdef RT_USING_SMP
289 | rt_thread_control(&idle[i], RT_THREAD_CTRL_BIND_CPU, (void*)i);
290 | #endif
291 | /* startup */
292 | rt_thread_startup(&idle[i]);
293 | }
294 | }
295 |
296 | /**
297 | * @ingroup Thread
298 | *
299 | * This function will get the handler of the idle thread.
300 | *
301 | */
302 | rt_thread_t rt_thread_idle_gethandler(void)
303 | {
304 | #ifdef RT_USING_SMP
305 | register int id = rt_hw_cpu_id();
306 | #else
307 | register int id = 0;
308 | #endif
309 |
310 | return (rt_thread_t)(&idle[id]);
311 | }
312 |
--------------------------------------------------------------------------------
/rtthread/src/irq.c:
--------------------------------------------------------------------------------
1 | /*
2 | * Copyright (c) 2006-2018, RT-Thread Development Team
3 | *
4 | * SPDX-License-Identifier: Apache-2.0
5 | *
6 | * Change Logs:
7 | * Date Author Notes
8 | * 2006-02-24 Bernard first version
9 | * 2006-05-03 Bernard add IRQ_DEBUG
10 | * 2016-08-09 ArdaFu add interrupt enter and leave hook.
11 | * 2018-11-22 Jesven rt_interrupt_get_nest function add disable irq
12 | */
13 |
14 | #include
15 | #include
16 |
17 | #ifdef RT_USING_HOOK
18 |
19 | static void (*rt_interrupt_enter_hook)(void);
20 | static void (*rt_interrupt_leave_hook)(void);
21 |
22 | /**
23 | * @ingroup Hook
24 | * This function set a hook function when the system enter a interrupt
25 | *
26 | * @note the hook function must be simple and never be blocked or suspend.
27 | */
28 | void rt_interrupt_enter_sethook(void (*hook)(void))
29 | {
30 | rt_interrupt_enter_hook = hook;
31 | }
32 | /**
33 | * @ingroup Hook
34 | * This function set a hook function when the system exit a interrupt.
35 | *
36 | * @note the hook function must be simple and never be blocked or suspend.
37 | */
38 | void rt_interrupt_leave_sethook(void (*hook)(void))
39 | {
40 | rt_interrupt_leave_hook = hook;
41 | }
42 | #endif
43 |
44 | /* #define IRQ_DEBUG */
45 |
46 | /**
47 | * @addtogroup Kernel
48 | */
49 |
50 | /**@{*/
51 |
52 | #ifdef RT_USING_SMP
53 | #define rt_interrupt_nest rt_cpu_self()->irq_nest
54 | #else
55 | volatile rt_uint8_t rt_interrupt_nest = 0;
56 | #endif
57 |
58 | /**
59 | * This function will be invoked by BSP, when enter interrupt service routine
60 | *
61 | * @note please don't invoke this routine in application
62 | *
63 | * @see rt_interrupt_leave
64 | */
65 | void rt_interrupt_enter(void)
66 | {
67 | rt_base_t level;
68 |
69 | RT_DEBUG_LOG(RT_DEBUG_IRQ, ("irq coming..., irq nest:%d\n",
70 | rt_interrupt_nest));
71 |
72 | level = rt_hw_interrupt_disable();
73 | rt_interrupt_nest ++;
74 | RT_OBJECT_HOOK_CALL(rt_interrupt_enter_hook,());
75 | rt_hw_interrupt_enable(level);
76 | }
77 | RTM_EXPORT(rt_interrupt_enter);
78 |
79 | /**
80 | * This function will be invoked by BSP, when leave interrupt service routine
81 | *
82 | * @note please don't invoke this routine in application
83 | *
84 | * @see rt_interrupt_enter
85 | */
86 | void rt_interrupt_leave(void)
87 | {
88 | rt_base_t level;
89 |
90 | RT_DEBUG_LOG(RT_DEBUG_IRQ, ("irq leave, irq nest:%d\n",
91 | rt_interrupt_nest));
92 |
93 | level = rt_hw_interrupt_disable();
94 | rt_interrupt_nest --;
95 | RT_OBJECT_HOOK_CALL(rt_interrupt_leave_hook,());
96 | rt_hw_interrupt_enable(level);
97 | }
98 | RTM_EXPORT(rt_interrupt_leave);
99 |
100 | /**
101 | * This function will return the nest of interrupt.
102 | *
103 | * User application can invoke this function to get whether current
104 | * context is interrupt context.
105 | *
106 | * @return the number of nested interrupts.
107 | */
108 | RT_WEAK rt_uint8_t rt_interrupt_get_nest(void)
109 | {
110 | rt_uint8_t ret;
111 | rt_base_t level;
112 |
113 | level = rt_hw_interrupt_disable();
114 | ret = rt_interrupt_nest;
115 | rt_hw_interrupt_enable(level);
116 | return ret;
117 | }
118 | RTM_EXPORT(rt_interrupt_get_nest);
119 |
120 | RTM_EXPORT(rt_hw_interrupt_disable);
121 | RTM_EXPORT(rt_hw_interrupt_enable);
122 |
123 | /**@}*/
124 |
125 |
--------------------------------------------------------------------------------
/user/real_main.c:
--------------------------------------------------------------------------------
1 | #include "system.h"
2 | #include "SysTick.h"
3 | #include "led.h"
4 | #include "usart.h"
5 | #include "tftlcd.h"
6 | #include "time.h"
7 | #include "key.h"
8 | #include "touch.h"
9 | #include "rtc.h"
10 | #include "stdlib.h"
11 |
12 | #include "tkc/thread.h"
13 | #include "platforms/common/rtos.h"
14 |
15 | extern ret_t platform_prepare(void);
16 | extern void systick_enable_int(void);
17 | extern int gui_app_start(int lcd_w, int lcd_h);
18 |
19 | void* awtk_thread(void* args) {
20 | gui_app_start(tftlcd_data.width, tftlcd_data.height);
21 |
22 | return NULL;
23 | }
24 |
25 | static ret_t awtk_start_ui_thread(void) {
26 | tk_thread_t* ui_thread = tk_thread_create(awtk_thread, NULL);
27 | return_value_if_fail(ui_thread != NULL, RET_BAD_PARAMS);
28 |
29 | tk_thread_set_priority(ui_thread, 3);
30 | tk_thread_set_name(ui_thread, "awtk");
31 | tk_thread_set_stack_size(ui_thread, 8000);
32 |
33 | return tk_thread_start(ui_thread);
34 | }
35 |
36 | void hardware_prepare(void) {
37 | SysTick_Init();
38 | NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
39 | LED_Init();
40 | USART1_Init(9600);
41 | TFTLCD_Init();
42 | KEY_Init();
43 | TOUCH_Init();
44 | TIM3_Init(50,7199);
45 | RTC_Init();
46 | }
47 |
48 | int main() {
49 | hardware_prepare();
50 | platform_prepare();
51 | systick_enable_int();
52 |
53 | rtos_init();
54 | awtk_start_ui_thread();
55 | rtos_start();
56 |
57 | return 0;
58 | }
59 |
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/user/stm32f10x.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/zlgopen/awtk-stm32f103ze-rtthread/a675a9cca36ed6ce5a7d0876bee783552fa52287/user/stm32f10x.h
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/user/stm32f10x_conf.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_conf.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 08-April-2011
7 | * @brief Library configuration file.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /* Define to prevent recursive inclusion -------------------------------------*/
23 | #ifndef __STM32F10x_CONF_H
24 | #define __STM32F10x_CONF_H
25 |
26 | /* Includes ------------------------------------------------------------------*/
27 | /* Uncomment/Comment the line below to enable/disable peripheral header file inclusion */
28 | #include "stm32f10x_adc.h"
29 | #include "stm32f10x_bkp.h"
30 | #include "stm32f10x_can.h"
31 | #include "stm32f10x_cec.h"
32 | #include "stm32f10x_crc.h"
33 | #include "stm32f10x_dac.h"
34 | #include "stm32f10x_dbgmcu.h"
35 | #include "stm32f10x_dma.h"
36 | #include "stm32f10x_exti.h"
37 | #include "stm32f10x_flash.h"
38 | #include "stm32f10x_fsmc.h"
39 | #include "stm32f10x_gpio.h"
40 | #include "stm32f10x_i2c.h"
41 | #include "stm32f10x_iwdg.h"
42 | #include "stm32f10x_pwr.h"
43 | #include "stm32f10x_rcc.h"
44 | #include "stm32f10x_rtc.h"
45 | #include "stm32f10x_sdio.h"
46 | #include "stm32f10x_spi.h"
47 | #include "stm32f10x_tim.h"
48 | #include "stm32f10x_usart.h"
49 | #include "stm32f10x_wwdg.h"
50 | #include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
51 |
52 | /* Exported types ------------------------------------------------------------*/
53 | /* Exported constants --------------------------------------------------------*/
54 | /* Uncomment the line below to expanse the "assert_param" macro in the
55 | Standard Peripheral Library drivers code */
56 | /* #define USE_FULL_ASSERT 1 */
57 |
58 | /* Exported macro ------------------------------------------------------------*/
59 | #ifdef USE_FULL_ASSERT
60 |
61 | /**
62 | * @brief The assert_param macro is used for function's parameters check.
63 | * @param expr: If expr is false, it calls assert_failed function which reports
64 | * the name of the source file and the source line number of the call
65 | * that failed. If expr is true, it returns no value.
66 | * @retval None
67 | */
68 | #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
69 | /* Exported functions ------------------------------------------------------- */
70 | void assert_failed(uint8_t* file, uint32_t line);
71 | #else
72 | #define assert_param(expr) ((void)0)
73 | #endif /* USE_FULL_ASSERT */
74 |
75 | #endif /* __STM32F10x_CONF_H */
76 |
77 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
78 |
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/user/stm32f10x_it.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_it.c
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 08-April-2011
7 | * @brief Main Interrupt Service Routines.
8 | * This file provides template for all exceptions handler and
9 | * peripherals interrupt service routine.
10 | ******************************************************************************
11 | * @attention
12 | *
13 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
14 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
15 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
16 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
17 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
18 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
19 | *
20 | * © COPYRIGHT 2011 STMicroelectronics
21 | ******************************************************************************
22 | */
23 |
24 | /* Includes ------------------------------------------------------------------*/
25 | #include "stm32f10x_it.h"
26 |
27 | /** @addtogroup STM32F10x_StdPeriph_Template
28 | * @{
29 | */
30 |
31 | /* Private typedef -----------------------------------------------------------*/
32 | /* Private define ------------------------------------------------------------*/
33 | /* Private macro -------------------------------------------------------------*/
34 | /* Private variables ---------------------------------------------------------*/
35 | /* Private function prototypes -----------------------------------------------*/
36 | /* Private functions ---------------------------------------------------------*/
37 |
38 | /******************************************************************************/
39 | /* Cortex-M3 Processor Exceptions Handlers */
40 | /******************************************************************************/
41 |
42 | /**
43 | * @brief This function handles NMI exception.
44 | * @param None
45 | * @retval None
46 | */
47 | void NMI_Handler(void)
48 | {
49 | }
50 |
51 |
52 | /**
53 | * @brief This function handles Memory Manage exception.
54 | * @param None
55 | * @retval None
56 | */
57 | void MemManage_Handler(void)
58 | {
59 | /* Go to infinite loop when Memory Manage exception occurs */
60 | while (1)
61 | {
62 | }
63 | }
64 |
65 | /**
66 | * @brief This function handles Bus Fault exception.
67 | * @param None
68 | * @retval None
69 | */
70 | void BusFault_Handler(void)
71 | {
72 | /* Go to infinite loop when Bus Fault exception occurs */
73 | while (1)
74 | {
75 | }
76 | }
77 |
78 | /**
79 | * @brief This function handles Usage Fault exception.
80 | * @param None
81 | * @retval None
82 | */
83 | void UsageFault_Handler(void)
84 | {
85 | /* Go to infinite loop when Usage Fault exception occurs */
86 | while (1)
87 | {
88 | }
89 | }
90 |
91 | /**
92 | * @brief This function handles SVCall exception.
93 | * @param None
94 | * @retval None
95 | */
96 | void SVC_Handler(void)
97 | {
98 | }
99 |
100 | /**
101 | * @brief This function handles Debug Monitor exception.
102 | * @param None
103 | * @retval None
104 | */
105 | void DebugMon_Handler(void)
106 | {
107 | }
108 |
109 |
110 | /**
111 | * @brief This function handles SysTick Handler.
112 | * @param None
113 | * @retval None
114 | */
115 | //void SysTick_Handler(void)
116 | //{
117 | //}
118 |
119 | /******************************************************************************/
120 | /* STM32F10x Peripherals Interrupt Handlers */
121 | /* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
122 | /* available peripheral interrupt handler's name please refer to the startup */
123 | /* file (startup_stm32f10x_xx.s). */
124 | /******************************************************************************/
125 |
126 | /**
127 | * @brief This function handles PPP interrupt request.
128 | * @param None
129 | * @retval None
130 | */
131 | /*void PPP_IRQHandler(void)
132 | {
133 | }*/
134 |
135 | /**
136 | * @}
137 | */
138 |
139 |
140 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
141 |
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/user/stm32f10x_it.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_it.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 08-April-2011
7 | * @brief This file contains the headers of the interrupt handlers.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /* Define to prevent recursive inclusion -------------------------------------*/
23 | #ifndef __STM32F10x_IT_H
24 | #define __STM32F10x_IT_H
25 |
26 | #ifdef __cplusplus
27 | extern "C" {
28 | #endif
29 |
30 | /* Includes ------------------------------------------------------------------*/
31 | #include "stm32f10x.h"
32 |
33 | /* Exported types ------------------------------------------------------------*/
34 | /* Exported constants --------------------------------------------------------*/
35 | /* Exported macro ------------------------------------------------------------*/
36 | /* Exported functions ------------------------------------------------------- */
37 |
38 | void NMI_Handler(void);
39 | void HardFault_Handler(void);
40 | void MemManage_Handler(void);
41 | void BusFault_Handler(void);
42 | void UsageFault_Handler(void);
43 | void SVC_Handler(void);
44 | void DebugMon_Handler(void);
45 | void PendSV_Handler(void);
46 | void SysTick_Handler(void);
47 |
48 | #ifdef __cplusplus
49 | }
50 | #endif
51 |
52 | #endif /* __STM32F10x_IT_H */
53 |
54 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
55 |
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